Mesa (vulkan): anv: Implement VK_REMAINING_{MIP_LEVELS,ARRAY_LAYERS}

2016-03-04 Thread Nanley Chery 
Module: Mesa
Branch: vulkan
Commit: 4e75f9b219f674ea79e6d521dd8a6b1ccd8b3c10
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=4e75f9b219f674ea79e6d521dd8a6b1ccd8b3c10

Author: Nanley Chery 
Date:   Fri Mar  4 20:41:05 2016 -0800

anv: Implement VK_REMAINING_{MIP_LEVELS,ARRAY_LAYERS}

v2: Subtract the baseMipLevel and baseArrayLayer (Jason)

Signed-off-by: Nanley Chery 
Reviewed-by: Jason Ekstrand 

---

 src/intel/vulkan/anv_image.c  | 12 ++--
 src/intel/vulkan/anv_meta_clear.c |  4 ++--
 src/intel/vulkan/anv_private.h| 17 +
 3 files changed, 25 insertions(+), 8 deletions(-)

diff --git a/src/intel/vulkan/anv_image.c b/src/intel/vulkan/anv_image.c
index c76a5f6..143a084 100644
--- a/src/intel/vulkan/anv_image.c
+++ b/src/intel/vulkan/anv_image.c
@@ -388,9 +388,9 @@ anv_validate_CreateImageView(VkDevice _device,
assert(subresource->levelCount > 0);
assert(subresource->layerCount > 0);
assert(subresource->baseMipLevel < image->levels);
-   assert(subresource->baseMipLevel + subresource->levelCount <= 
image->levels);
+   assert(subresource->baseMipLevel + anv_get_levelCount(image, subresource) 
<= image->levels);
assert(subresource->baseArrayLayer < image->array_size);
-   assert(subresource->baseArrayLayer + subresource->layerCount <= 
image->array_size);
+   assert(subresource->baseArrayLayer + anv_get_layerCount(image, subresource) 
<= image->array_size);
assert(pView);
 
const VkImageAspectFlags ds_flags = VK_IMAGE_ASPECT_DEPTH_BIT
@@ -496,10 +496,10 @@ anv_image_view_init(struct anv_image_view *iview,
   unreachable("bad VkImageType");
case VK_IMAGE_TYPE_1D:
case VK_IMAGE_TYPE_2D:
-  assert(range->baseArrayLayer + range->layerCount - 1 <= 
image->array_size);
+  assert(range->baseArrayLayer + anv_get_layerCount(image, range) - 1 <= 
image->array_size);
   break;
case VK_IMAGE_TYPE_3D:
-  assert(range->baseArrayLayer + range->layerCount - 1
+  assert(range->baseArrayLayer + anv_get_layerCount(image, range) - 1
  <= anv_minify(image->extent.depth, range->baseMipLevel));
   break;
}
@@ -525,9 +525,9 @@ anv_image_view_init(struct anv_image_view *iview,
struct isl_view isl_view = {
   .format = format,
   .base_level = range->baseMipLevel,
-  .levels = range->levelCount,
+  .levels = anv_get_levelCount(image, range),
   .base_array_layer = range->baseArrayLayer,
-  .array_len = range->layerCount,
+  .array_len = anv_get_layerCount(image, range),
   .channel_select = {
  remap_swizzle(pCreateInfo->components.r,
VK_COMPONENT_SWIZZLE_R, swizzle),
diff --git a/src/intel/vulkan/anv_meta_clear.c 
b/src/intel/vulkan/anv_meta_clear.c
index 8f92a9d..bce9446 100644
--- a/src/intel/vulkan/anv_meta_clear.c
+++ b/src/intel/vulkan/anv_meta_clear.c
@@ -795,8 +795,8 @@ anv_cmd_clear_image(struct anv_cmd_buffer *cmd_buffer,
for (uint32_t r = 0; r < range_count; r++) {
   const VkImageSubresourceRange *range = [r];
 
-  for (uint32_t l = 0; l < range->levelCount; ++l) {
- for (uint32_t s = 0; s < range->layerCount; ++s) {
+  for (uint32_t l = 0; l < anv_get_levelCount(image, range); ++l) {
+ for (uint32_t s = 0; s < anv_get_layerCount(image, range); ++s) {
 struct anv_image_view iview;
 anv_image_view_init(, cmd_buffer->device,
&(VkImageViewCreateInfo) {
diff --git a/src/intel/vulkan/anv_private.h b/src/intel/vulkan/anv_private.h
index cb4f973..f872704 100644
--- a/src/intel/vulkan/anv_private.h
+++ b/src/intel/vulkan/anv_private.h
@@ -1641,6 +1641,23 @@ struct anv_image {
};
 };
 
+static inline uint32_t
+anv_get_layerCount(const struct anv_image *image,
+   const VkImageSubresourceRange *range)
+{
+   return range->layerCount == VK_REMAINING_ARRAY_LAYERS ?
+  image->array_size - range->baseArrayLayer : range->layerCount;
+}
+
+static inline uint32_t
+anv_get_levelCount(const struct anv_image *image,
+   const VkImageSubresourceRange *range)
+{
+   return range->levelCount == VK_REMAINING_MIP_LEVELS ?
+  image->levels - range->baseMipLevel : range->levelCount;
+}
+
+
 struct anv_image_view {
const struct anv_image *image; /**< VkImageViewCreateInfo::image */
struct anv_bo *bo;

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Mesa (master): i965: Only magnify depth for 3D textures, not array textures.

2016-03-04 Thread Kenneth Graunke 
Module: Mesa
Branch: master
Commit: 4ba7ad6cc13b087e5e95073ab2e24de591d8b5a5
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=4ba7ad6cc13b087e5e95073ab2e24de591d8b5a5

Author: Kenneth Graunke 
Date:   Thu Mar  3 11:13:29 2016 -0800

i965: Only magnify depth for 3D textures, not array textures.

When BaseLevel > 0, we magnify the dimensions to fill out the size of
miplevels [0..BaseLevel).  In particular, this was magnifying depth,
thinking that the depth doubles at each level.  This is perfectly
reasonable for 3D textures, but dead wrong for array textures.

Changing the depth != 1 condition to a target == GL_TEXTURE_3D check
should make this only happen in the appropriate cases.

Fixes about 32 dEQP tests:
- dEQP-GLES31.functional.texture.gather.*.level_{1,2}

Signed-off-by: Kenneth Graunke 
Reviewed-by: Matt Turner 
Cc: mesa-sta...@lists.freedesktop.org

---

 src/mesa/drivers/dri/i965/intel_tex_image.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/mesa/drivers/dri/i965/intel_tex_image.c 
b/src/mesa/drivers/dri/i965/intel_tex_image.c
index 8525902..1601edd 100644
--- a/src/mesa/drivers/dri/i965/intel_tex_image.c
+++ b/src/mesa/drivers/dri/i965/intel_tex_image.c
@@ -50,7 +50,7 @@ intel_miptree_create_for_teximage(struct brw_context *brw,
   width <<= 1;
   if (height != 1)
  height <<= 1;
-  if (depth != 1)
+  if (intelObj->base.Target == GL_TEXTURE_3D)
  depth <<= 1;
}
 

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Mesa (master): i965/vec4: add opportunistic behaviour to opt_vector_float( )

2016-03-04 Thread Matt Turner 
Module: Mesa
Branch: master
Commit: 2f76a9924e7b0b33a508ee3651b0cb2ab536a7dc
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=2f76a9924e7b0b33a508ee3651b0cb2ab536a7dc

Author: Juan A. Suarez Romero 
Date:   Wed Mar  2 13:21:02 2016 +0100

i965/vec4: add opportunistic behaviour to opt_vector_float()

opt_vector_float() transforms several scalar MOV operations to a single
vectorial MOV.

This is done when those MOV covers all the components of the destination
register. So something like:

mov vgrf3.0.xy:D, 0D
mov vgrf3.0.w:D, 1065353216D
mov vgrf3.0.z:D, 0D

is transformed in:

mov vgrf3.0:F, [0F, 0F, 0F, 1F]

But there are cases where not all the components are written. For
example, in:

mov vgrf2.0.x:D, 1073741824D
mov vgrf3.0.xy:D, 0D
mov vgrf3.0.w:D, 1065353216D
mov vgrf4.0.xy:D, 1065353216D
mov vgrf4.0.w:D, 0D
mov vgrf6.0:UD, u4.xyzw:UD

Nor vgrf3 nor vgrf4 .z components are written, so the optimization is
not applied.

But it could be applied anyway with the components covered, using a
writemask to select the ones written. So we could transform it in:

mov vgrf2.0.x:D, 1073741824D
mov vgrf3.0.xyw:F, [0F, 0F, 0F, 1F]
mov vgrf4.0.xyw:F, [1F, 1F, 0F, 0F]
mov vgrf6.0:UD, u4.xyzw:UD

This commit does precisely that: opportunistically apply
opt_vector_float() when possible.

total instructions in shared programs: 7124660 -> 7114784 (-0.14%)
instructions in affected programs: 443078 -> 433202 (-2.23%)
helped: 4998
HURT: 0

total cycles in shared programs: 64757760 -> 64728016 (-0.05%)
cycles in affected programs: 1401686 -> 1371942 (-2.12%)
helped: 3243
HURT: 38

v2: change vectorize_mov() signature (Matt).
v3: take in account predicates (Juan).
v4 [mattst88]: Update shader-db numbers. Fix some whitespace issues.

Reviewed-by: Matt Turner 
Signed-off-by: Juan A. Suarez Romero 

---

 src/mesa/drivers/dri/i965/brw_vec4.cpp | 60 ++
 src/mesa/drivers/dri/i965/brw_vec4.h   |  4 +++
 2 files changed, 43 insertions(+), 21 deletions(-)

diff --git a/src/mesa/drivers/dri/i965/brw_vec4.cpp 
b/src/mesa/drivers/dri/i965/brw_vec4.cpp
index 3618c72..cf62ed9 100644
--- a/src/mesa/drivers/dri/i965/brw_vec4.cpp
+++ b/src/mesa/drivers/dri/i965/brw_vec4.cpp
@@ -321,6 +321,28 @@ src_reg::equals(const src_reg ) const
 }
 
 bool
+vec4_visitor::vectorize_mov(bblock_t *block, vec4_instruction *inst,
+uint8_t imm[4], vec4_instruction *imm_inst[4],
+int inst_count, unsigned writemask)
+{
+   if (inst_count < 2)
+  return false;
+
+   unsigned vf;
+   memcpy(, imm, sizeof(vf));
+   vec4_instruction *mov = MOV(imm_inst[0]->dst, brw_imm_vf(vf));
+   mov->dst.type = BRW_REGISTER_TYPE_F;
+   mov->dst.writemask = writemask;
+   inst->insert_before(block, mov);
+
+   for (int i = 0; i < inst_count; i++) {
+  imm_inst[i]->remove(block);
+   }
+
+   return true;
+}
+
+bool
 vec4_visitor::opt_vector_float()
 {
bool progress = false;
@@ -328,27 +350,38 @@ vec4_visitor::opt_vector_float()
int last_reg = -1, last_reg_offset = -1;
enum brw_reg_file last_reg_file = BAD_FILE;
 
-   int remaining_channels = 0;
-   uint8_t imm[4];
+   uint8_t imm[4] = { 0 };
int inst_count = 0;
vec4_instruction *imm_inst[4];
+   unsigned writemask = 0;
 
foreach_block_and_inst_safe(block, vec4_instruction, inst, cfg) {
   if (last_reg != inst->dst.nr ||
   last_reg_offset != inst->dst.reg_offset ||
   last_reg_file != inst->dst.file) {
+ progress |= vectorize_mov(block, inst, imm, imm_inst, inst_count,
+   writemask);
+ inst_count = 0;
+ writemask = 0;
  last_reg = inst->dst.nr;
  last_reg_offset = inst->dst.reg_offset;
  last_reg_file = inst->dst.file;
- remaining_channels = WRITEMASK_XYZW;
 
- inst_count = 0;
+ for (int i = 0; i < 4; i++) {
+imm[i] = 0;
+ }
   }
 
   if (inst->opcode != BRW_OPCODE_MOV ||
   inst->dst.writemask == WRITEMASK_XYZW ||
-  inst->src[0].file != IMM)
+  inst->src[0].file != IMM ||
+  inst->predicate != BRW_PREDICATE_NONE) {
+ progress |= vectorize_mov(block, inst, imm, imm_inst, inst_count,
+   writemask);
+ inst_count = 0;
+ last_reg = -1;
  continue;
+  }
 
   int vf = brw_float_to_vf(inst->src[0].f);
   if (vf == -1)
@@ -363,23 +396,8 @@ vec4_visitor::opt_vector_float()
   if ((inst->dst.writemask & WRITEMASK_W) != 0)
  imm[3] = vf;
 
+  writemask |= inst->dst.writemask;
   imm_inst[inst_count++] = inst;
-
-  remaining_channels &= ~inst->dst.writemask;
-  if (remaining_channels == 0) {
- unsigned vf;
- memcpy(, imm, sizeof(vf));
- vec4_instruction *mov = MOV(inst->dst, brw_imm_vf(vf));
- mov->dst.type = BRW_REGISTER_TYPE_F;
-

Mesa (vulkan): anv/meta_clear: Set the right number of dynamic states

2016-03-04 Thread Jason Ekstrand 
Module: Mesa
Branch: vulkan
Commit: c1436e80efee072f1fc3e3b4af0d5e7ad9dd3fb7
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=c1436e80efee072f1fc3e3b4af0d5e7ad9dd3fb7

Author: Jason Ekstrand 
Date:   Fri Mar  4 19:14:48 2016 -0800

anv/meta_clear: Set the right number of dynamic states

---

 src/intel/vulkan/anv_meta_clear.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/intel/vulkan/anv_meta_clear.c 
b/src/intel/vulkan/anv_meta_clear.c
index c052b8b..8f92a9d 100644
--- a/src/intel/vulkan/anv_meta_clear.c
+++ b/src/intel/vulkan/anv_meta_clear.c
@@ -192,7 +192,7 @@ create_pipeline(struct anv_device *device,
  * we need only restore dynamic state was vkCmdSet.
  */
 .sType = VK_STRUCTURE_TYPE_PIPELINE_DYNAMIC_STATE_CREATE_INFO,
-.dynamicStateCount = 9,
+.dynamicStateCount = 8,
 .pDynamicStates = (VkDynamicState[]) {
/* Everything except stencil write mask */
VK_DYNAMIC_STATE_VIEWPORT,

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Mesa (vulkan): anv/cmd_buffer: Reset the state streams when resetting the command buffer

2016-03-04 Thread Jason Ekstrand 
Module: Mesa
Branch: vulkan
Commit: 653261285e1758f6fde0fb49b3fe30d6d2631077
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=653261285e1758f6fde0fb49b3fe30d6d2631077

Author: Jason Ekstrand 
Date:   Fri Mar  4 12:42:03 2016 -0800

anv/cmd_buffer: Reset the state streams when resetting the command buffer

---

 src/intel/vulkan/anv_cmd_buffer.c | 8 
 1 file changed, 8 insertions(+)

diff --git a/src/intel/vulkan/anv_cmd_buffer.c 
b/src/intel/vulkan/anv_cmd_buffer.c
index aa54bde..6ff5f35 100644
--- a/src/intel/vulkan/anv_cmd_buffer.c
+++ b/src/intel/vulkan/anv_cmd_buffer.c
@@ -333,6 +333,14 @@ VkResult anv_ResetCommandBuffer(
anv_cmd_buffer_reset_batch_bo_chain(cmd_buffer);
anv_cmd_state_reset(cmd_buffer);
 
+   anv_state_stream_finish(_buffer->surface_state_stream);
+   anv_state_stream_init(_buffer->surface_state_stream,
+ _buffer->device->surface_state_block_pool);
+
+   anv_state_stream_finish(_buffer->dynamic_state_stream);
+   anv_state_stream_init(_buffer->dynamic_state_stream,
+ _buffer->device->dynamic_state_block_pool);
+
return VK_SUCCESS;
 }
 

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Mesa (vulkan): anv/pipeline: Fix depthBiasEnable on gen7

2016-03-04 Thread Jason Ekstrand 
Module: Mesa
Branch: vulkan
Commit: cc57efc67abb5b81ebc2648775d8829ab27b7df8
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=cc57efc67abb5b81ebc2648775d8829ab27b7df8

Author: Jason Ekstrand 
Date:   Fri Mar  4 17:56:12 2016 -0800

anv/pipeline: Fix depthBiasEnable on gen7

The first time I tried to fix this, I set the wrong fields.

---

 src/intel/vulkan/gen7_pipeline.c | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/src/intel/vulkan/gen7_pipeline.c b/src/intel/vulkan/gen7_pipeline.c
index d563a8c..5235d39 100644
--- a/src/intel/vulkan/gen7_pipeline.c
+++ b/src/intel/vulkan/gen7_pipeline.c
@@ -67,9 +67,9 @@ gen7_emit_rs_state(struct anv_pipeline *pipeline,
   /* uint32_t 
VertexSubPixelPrecisionSelect; */
   .UsePointWidthState   = !pipeline->writes_point_size,
   .PointWidth   = 1.0,
-  .GlobalDepthOffsetConstant= info->depthBiasEnable,
-  .GlobalDepthOffsetScale   = info->depthBiasEnable,
-  .GlobalDepthOffsetClamp   = info->depthBiasEnable,
+  .GlobalDepthOffsetEnableSolid = info->depthBiasEnable,
+  .GlobalDepthOffsetEnableWireframe = info->depthBiasEnable,
+  .GlobalDepthOffsetEnablePoint = info->depthBiasEnable,
};
 
GENX(3DSTATE_SF_pack)(NULL, >gen7.sf, );

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Mesa (master): st/xlib: Don't destroy screen on XCloseDisplay()

2016-03-04 Thread Brian Paul 
Module: Mesa
Branch: master
Commit: feb71117aebc0932a96b548b4c402b010a008b2d
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=feb71117aebc0932a96b548b4c402b010a008b2d

Author: George Kyriazis 
Date:   Fri Mar  4 12:26:00 2016 -0700

st/xlib: Don't destroy screen on XCloseDisplay()

screen may still be used by other resources that are not yet freed.
To correctly fix this there will be a need to account for resources
differently, but this quick fix is not any worse than the original
code that leaked screens anyway.

Reviewed-by: Brian Paul 

---

 src/gallium/state_trackers/glx/xlib/xm_api.c | 10 +++---
 1 file changed, 7 insertions(+), 3 deletions(-)

diff --git a/src/gallium/state_trackers/glx/xlib/xm_api.c 
b/src/gallium/state_trackers/glx/xlib/xm_api.c
index cee4f18..5799cce 100644
--- a/src/gallium/state_trackers/glx/xlib/xm_api.c
+++ b/src/gallium/state_trackers/glx/xlib/xm_api.c
@@ -174,9 +174,13 @@ xmesa_close_display(Display *display)
/* don't forget to clean up mesaDisplay */
XMesaDisplay xmdpy = >mesaDisplay;
 
-   if (xmdpy->screen) {
-  xmdpy->screen->destroy(xmdpy->screen);
-   }
+   /**
+* XXX: Don't destroy the screens here, since there may still
+* be some dangling screen pointers that are used after this point
+* if (xmdpy->screen) {
+*xmdpy->screen->destroy(xmdpy->screen);
+* }
+*/
free(xmdpy->smapi);
 
XFree((char *) info);

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Mesa (vulkan): isl: Fix RenderTargetViewExtent for mipmapped 3D surfaces

2016-03-04 Thread Nanley Chery 
Module: Mesa
Branch: vulkan
Commit: a6fb62a86441ce7296f9d06cf7a71d2f51f3a3f5
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=a6fb62a86441ce7296f9d06cf7a71d2f51f3a3f5

Author: Nanley Chery 
Date:   Thu Mar  3 15:49:13 2016 -0800

isl: Fix RenderTargetViewExtent for mipmapped 3D surfaces

Match the comment stated above the assignment.

Signed-off-by: Nanley Chery 
Reviewed-by: Jason Ekstrand 

---

 src/intel/isl/isl_surface_state.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/src/intel/isl/isl_surface_state.c 
b/src/intel/isl/isl_surface_state.c
index fe8f07c..f3390a6 100644
--- a/src/intel/isl/isl_surface_state.c
+++ b/src/intel/isl/isl_surface_state.c
@@ -346,7 +346,8 @@ isl_genX(surf_fill_state_s)(const struct isl_device *dev, 
void *state,
*indicates the extent of the accessible 'R' coordinates minus 1 on
*the LOD currently being rendered to.
*/
-  s.RenderTargetViewExtent = info->surf->logical_level0_px.depth - 1;
+  s.RenderTargetViewExtent = 
isl_minify(info->surf->logical_level0_px.depth,
+info->view->base_level) - 1;
   break;
default:
   unreachable(!"bad SurfaceType");

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Mesa (vulkan): isl: Get rid of isl_surf_fill_state_info::level0_extent_px

2016-03-04 Thread Nanley Chery 
Module: Mesa
Branch: vulkan
Commit: b80c8ebc4587a15c823b5223419eadb0ca51cdd1
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=b80c8ebc4587a15c823b5223419eadb0ca51cdd1

Author: Nanley Chery 
Date:   Thu Mar  3 15:40:13 2016 -0800

isl: Get rid of isl_surf_fill_state_info::level0_extent_px

This field is no longer needed.

Signed-off-by: Nanley Chery 
Reviewed-by: Jason Ekstrand 

---

 src/intel/isl/isl.h   |  9 -
 src/intel/isl/isl_surface_state.c |  8 
 src/intel/vulkan/anv_image.c  | 33 +++--
 3 files changed, 7 insertions(+), 43 deletions(-)

diff --git a/src/intel/isl/isl.h b/src/intel/isl/isl.h
index 5a48bce..248a94d 100644
--- a/src/intel/isl/isl.h
+++ b/src/intel/isl/isl.h
@@ -773,15 +773,6 @@ struct isl_surf_fill_state_info {
uint32_t mocs;
 
/**
-* This allows the caller to over-ride the dimensions of the surface.
-* This is used at the moment for compressed surfaces to let us hack
-* around the fact that we can't actually render to them.
-*
-* FIXME: We really need to get rid of this.  It's a lie.
-*/
-   struct isl_extent4d level0_extent_px;
-
-   /**
 * The clear color for this surface
 *
 * Valid values depend on hardware generation.
diff --git a/src/intel/isl/isl_surface_state.c 
b/src/intel/isl/isl_surface_state.c
index 1607aa6..fe8f07c 100644
--- a/src/intel/isl/isl_surface_state.c
+++ b/src/intel/isl/isl_surface_state.c
@@ -257,8 +257,8 @@ isl_genX(surf_fill_state_s)(const struct isl_device *dev, 
void *state,
   .SurfaceQPitch = get_qpitch(info->surf) >> 2,
 #endif
 
-  .Width = info->level0_extent_px.width - 1,
-  .Height = info->level0_extent_px.height - 1,
+  .Width = info->surf->logical_level0_px.width - 1,
+  .Height = info->surf->logical_level0_px.height - 1,
   .Depth = 0, /* TEMPLATE */
 
   .SurfacePitch = info->surf->row_pitch - 1,
@@ -338,7 +338,7 @@ isl_genX(surf_fill_state_s)(const struct isl_device *dev, 
void *state,
*If the volume texture is MIP-mapped, this field specifies the
*depth of the base MIP level.
*/
-  s.Depth = info->level0_extent_px.depth - 1;
+  s.Depth = info->surf->logical_level0_px.depth - 1;
 
   /* From the Broadwell PRM >> 
RENDER_SURFACE_STATE::RenderTargetViewExtent:
*
@@ -346,7 +346,7 @@ isl_genX(surf_fill_state_s)(const struct isl_device *dev, 
void *state,
*indicates the extent of the accessible 'R' coordinates minus 1 on
*the LOD currently being rendered to.
*/
-  s.RenderTargetViewExtent = info->level0_extent_px.depth - 1;
+  s.RenderTargetViewExtent = info->surf->logical_level0_px.depth - 1;
   break;
default:
   unreachable(!"bad SurfaceType");
diff --git a/src/intel/vulkan/anv_image.c b/src/intel/vulkan/anv_image.c
index dc1ea9c..c76a5f6 100644
--- a/src/intel/vulkan/anv_image.c
+++ b/src/intel/vulkan/anv_image.c
@@ -540,30 +540,6 @@ anv_image_view_init(struct anv_image_view *iview,
   },
};
 
-   struct isl_extent4d level0_extent_px;
-
-   if (!isl_format_is_compressed(format) &&
-   isl_format_is_compressed(image->format->isl_format)) {
-  /* Scale the ImageView extent by the backing Image. This is used
-   * internally when an uncompressed ImageView is created on a
-   * compressed Image. The ImageView can therefore be used for copying
-   * data from a source Image to a destination Image.
-   */
-  const struct isl_format_layout * isl_layout = image->format->isl_layout;
-
-  level0_extent_px.depth  = anv_minify(image->extent.depth, 
range->baseMipLevel);
-  level0_extent_px.depth  = DIV_ROUND_UP(level0_extent_px.depth, 
isl_layout->bd);
-
-  level0_extent_px.height = 
isl_surf_get_array_pitch_el_rows(>isl) * image->array_size;
-  level0_extent_px.width  = isl_surf_get_row_pitch_el(>isl);
-  isl_view.base_level = 0;
-  isl_view.base_array_layer = 0;
-   } else {
-  level0_extent_px.width  = image->extent.width;
-  level0_extent_px.height = image->extent.height;
-  level0_extent_px.depth  = image->extent.depth;
-   }
-
iview->extent = (VkExtent3D) {
   .width  = anv_minify(image->extent.width , range->baseMipLevel),
   .height = anv_minify(image->extent.height, range->baseMipLevel),
@@ -586,8 +562,7 @@ anv_image_view_init(struct anv_image_view *iview,
   iview->sampler_surface_state.map,
   .surf = >isl,
   .view = _view,
-  .mocs = device->default_mocs,
-  .level0_extent_px = level0_extent_px);
+  .mocs = device->default_mocs);
 
   if (!device->info.has_llc)
  anv_state_clflush(iview->sampler_surface_state);
@@ -603,8 +578,7 @@ anv_image_view_init(struct anv_image_view *iview,

Mesa (vulkan): anv/cmd_buffer: Mask stencil reference values

2016-03-04 Thread Jason Ekstrand 
Module: Mesa
Branch: vulkan
Commit: f374765ce685d30b4eabe8085dc3daa95a75f8f8
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=f374765ce685d30b4eabe8085dc3daa95a75f8f8

Author: Jason Ekstrand 
Date:   Fri Mar  4 12:22:32 2016 -0800

anv/cmd_buffer: Mask stencil reference values

---

 src/intel/vulkan/gen7_cmd_buffer.c | 4 ++--
 src/intel/vulkan/gen8_cmd_buffer.c | 8 
 2 files changed, 6 insertions(+), 6 deletions(-)

diff --git a/src/intel/vulkan/gen7_cmd_buffer.c 
b/src/intel/vulkan/gen7_cmd_buffer.c
index 7101058..9859078 100644
--- a/src/intel/vulkan/gen7_cmd_buffer.c
+++ b/src/intel/vulkan/gen7_cmd_buffer.c
@@ -561,8 +561,8 @@ genX(cmd_buffer_flush_state)(struct anv_cmd_buffer 
*cmd_buffer)
  .BlendConstantColorGreen = 
cmd_buffer->state.dynamic.blend_constants[1],
  .BlendConstantColorBlue = 
cmd_buffer->state.dynamic.blend_constants[2],
  .BlendConstantColorAlpha = 
cmd_buffer->state.dynamic.blend_constants[3],
- .StencilReferenceValue = d->stencil_reference.front,
- .BackFaceStencilReferenceValue = d->stencil_reference.back,
+ .StencilReferenceValue = d->stencil_reference.front & 0xff,
+ .BackFaceStencilReferenceValue = d->stencil_reference.back & 0xff,
   };
   GENX(COLOR_CALC_STATE_pack)(NULL, cc_state.map, );
   if (!cmd_buffer->device->info.has_llc)
diff --git a/src/intel/vulkan/gen8_cmd_buffer.c 
b/src/intel/vulkan/gen8_cmd_buffer.c
index 8e7a078..dc0d557 100644
--- a/src/intel/vulkan/gen8_cmd_buffer.c
+++ b/src/intel/vulkan/gen8_cmd_buffer.c
@@ -361,8 +361,8 @@ genX(cmd_buffer_flush_state)(struct anv_cmd_buffer 
*cmd_buffer)
  .BlendConstantColorGreen = 
cmd_buffer->state.dynamic.blend_constants[1],
  .BlendConstantColorBlue = 
cmd_buffer->state.dynamic.blend_constants[2],
  .BlendConstantColorAlpha = 
cmd_buffer->state.dynamic.blend_constants[3],
- .StencilReferenceValue = d->stencil_reference.front,
- .BackFaceStencilReferenceValue = d->stencil_reference.back,
+ .StencilReferenceValue = d->stencil_reference.front & 0xff,
+ .BackFaceStencilReferenceValue = d->stencil_reference.back & 0xff,
   };
   GENX(COLOR_CALC_STATE_pack)(NULL, cc_state.map, );
 
@@ -437,8 +437,8 @@ genX(cmd_buffer_flush_state)(struct anv_cmd_buffer 
*cmd_buffer)
  .BackfaceStencilTestMask = d->stencil_compare_mask.back & 0xff,
  .BackfaceStencilWriteMask = d->stencil_write_mask.back & 0xff,
 
- .StencilReferenceValue = d->stencil_reference.front,
- .BackfaceStencilReferenceValue = d->stencil_reference.back
+ .StencilReferenceValue = d->stencil_reference.front & 0xff,
+ .BackfaceStencilReferenceValue = d->stencil_reference.back & 0xff,
   };
   GEN9_3DSTATE_WM_DEPTH_STENCIL_pack(NULL, dwords, _depth_stencil);
 

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Mesa (vulkan): anv/cmd_buffer: Let the pipeline set StencilBufferWriteEnable on gen9

2016-03-04 Thread Jason Ekstrand 
Module: Mesa
Branch: vulkan
Commit: d154a5ebd68b3d1f465d6bb77e34b3ff04bc8a9f
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=d154a5ebd68b3d1f465d6bb77e34b3ff04bc8a9f

Author: Jason Ekstrand 
Date:   Fri Mar  4 12:23:01 2016 -0800

anv/cmd_buffer: Let the pipeline set StencilBufferWriteEnable on gen9

---

 src/intel/vulkan/gen8_cmd_buffer.c | 3 ---
 1 file changed, 3 deletions(-)

diff --git a/src/intel/vulkan/gen8_cmd_buffer.c 
b/src/intel/vulkan/gen8_cmd_buffer.c
index dc0d557..8972a8d 100644
--- a/src/intel/vulkan/gen8_cmd_buffer.c
+++ b/src/intel/vulkan/gen8_cmd_buffer.c
@@ -428,9 +428,6 @@ genX(cmd_buffer_flush_state)(struct anv_cmd_buffer 
*cmd_buffer)
   struct GEN9_3DSTATE_WM_DEPTH_STENCIL wm_depth_stencil = {
  GEN9_3DSTATE_WM_DEPTH_STENCIL_header,
 
- .StencilBufferWriteEnable = d->stencil_write_mask.front != 0 ||
- d->stencil_write_mask.back != 0,
-
  .StencilTestMask = d->stencil_compare_mask.front & 0xff,
  .StencilWriteMask = d->stencil_write_mask.front & 0xff,
 

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Mesa (vulkan): anv/pipeline: Set StencilBufferWriteEnable from the pipeline

2016-03-04 Thread Jason Ekstrand 
Module: Mesa
Branch: vulkan
Commit: ec18fef88d8a7a1a3541b0d40708a6637412f50e
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=ec18fef88d8a7a1a3541b0d40708a6637412f50e

Author: Jason Ekstrand 
Date:   Fri Mar  4 10:45:24 2016 -0800

anv/pipeline: Set StencilBufferWriteEnable from the pipeline

The hardware docs say that StencilBufferWriteEnable should only be set if
StencilTestEnable is set.  It seems reasonable to set them together.

---

 src/intel/vulkan/gen7_cmd_buffer.c | 3 ---
 src/intel/vulkan/gen7_pipeline.c   | 1 +
 src/intel/vulkan/gen8_cmd_buffer.c | 3 ---
 src/intel/vulkan/gen8_pipeline.c   | 1 +
 4 files changed, 2 insertions(+), 6 deletions(-)

diff --git a/src/intel/vulkan/gen7_cmd_buffer.c 
b/src/intel/vulkan/gen7_cmd_buffer.c
index 1713cc1..7101058 100644
--- a/src/intel/vulkan/gen7_cmd_buffer.c
+++ b/src/intel/vulkan/gen7_cmd_buffer.c
@@ -581,9 +581,6 @@ genX(cmd_buffer_flush_state)(struct anv_cmd_buffer 
*cmd_buffer)
   struct anv_dynamic_state *d = _buffer->state.dynamic;
 
   struct GENX(DEPTH_STENCIL_STATE) depth_stencil = {
- .StencilBufferWriteEnable = d->stencil_write_mask.front != 0 ||
- d->stencil_write_mask.back != 0,
-
  .StencilTestMask = d->stencil_compare_mask.front & 0xff,
  .StencilWriteMask = d->stencil_write_mask.front & 0xff,
 
diff --git a/src/intel/vulkan/gen7_pipeline.c b/src/intel/vulkan/gen7_pipeline.c
index 22a892b..d563a8c 100644
--- a/src/intel/vulkan/gen7_pipeline.c
+++ b/src/intel/vulkan/gen7_pipeline.c
@@ -95,6 +95,7 @@ gen7_emit_ds_state(struct anv_pipeline *pipeline,
   .DoubleSidedStencilEnable = true,
 
   .StencilTestEnable = info->stencilTestEnable,
+  .StencilBufferWriteEnable = info->stencilTestEnable,
   .StencilFailOp = vk_to_gen_stencil_op[info->front.failOp],
   .StencilPassDepthPassOp = vk_to_gen_stencil_op[info->front.passOp],
   .StencilPassDepthFailOp = vk_to_gen_stencil_op[info->front.depthFailOp],
diff --git a/src/intel/vulkan/gen8_cmd_buffer.c 
b/src/intel/vulkan/gen8_cmd_buffer.c
index d506cf4..8e7a078 100644
--- a/src/intel/vulkan/gen8_cmd_buffer.c
+++ b/src/intel/vulkan/gen8_cmd_buffer.c
@@ -384,9 +384,6 @@ genX(cmd_buffer_flush_state)(struct anv_cmd_buffer 
*cmd_buffer)
   struct GENX(3DSTATE_WM_DEPTH_STENCIL wm_depth_stencil) = {
  GENX(3DSTATE_WM_DEPTH_STENCIL_header),
 
- .StencilBufferWriteEnable = d->stencil_write_mask.front != 0 ||
- d->stencil_write_mask.back != 0,
-
  .StencilTestMask = d->stencil_compare_mask.front & 0xff,
  .StencilWriteMask = d->stencil_write_mask.front & 0xff,
 
diff --git a/src/intel/vulkan/gen8_pipeline.c b/src/intel/vulkan/gen8_pipeline.c
index ecb8f6d..e8a0678 100644
--- a/src/intel/vulkan/gen8_pipeline.c
+++ b/src/intel/vulkan/gen8_pipeline.c
@@ -227,6 +227,7 @@ emit_ds_state(struct anv_pipeline *pipeline,
   .DoubleSidedStencilEnable = true,
 
   .StencilTestEnable = info->stencilTestEnable,
+  .StencilBufferWriteEnable = info->stencilTestEnable,
   .StencilFailOp = vk_to_gen_stencil_op[info->front.failOp],
   .StencilPassDepthPassOp = vk_to_gen_stencil_op[info->front.passOp],
   .StencilPassDepthFailOp = vk_to_gen_stencil_op[info->front.depthFailOp],

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Mesa (vulkan): anv/clear: Pull the stencil write mask from the pipeline

2016-03-04 Thread Jason Ekstrand 
Module: Mesa
Branch: vulkan
Commit: d61dcec64dc66fea7f15f296212c68f18fe5aaa0
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=d61dcec64dc66fea7f15f296212c68f18fe5aaa0

Author: Jason Ekstrand 
Date:   Fri Mar  4 11:07:27 2016 -0800

anv/clear: Pull the stencil write mask from the pipeline

The stencil write mask wasn't getting set at all so we were using whatever
write mask happend to be left over by the application.

---

 src/intel/vulkan/anv_meta_clear.c | 5 +++--
 1 file changed, 3 insertions(+), 2 deletions(-)

diff --git a/src/intel/vulkan/anv_meta_clear.c 
b/src/intel/vulkan/anv_meta_clear.c
index 227f8f3..c052b8b 100644
--- a/src/intel/vulkan/anv_meta_clear.c
+++ b/src/intel/vulkan/anv_meta_clear.c
@@ -45,7 +45,8 @@ meta_clear_begin(struct anv_meta_saved_state *saved_state,
anv_meta_save(saved_state, cmd_buffer,
  (1 << VK_DYNAMIC_STATE_VIEWPORT) |
  (1 << VK_DYNAMIC_STATE_SCISSOR) |
- (1 << VK_DYNAMIC_STATE_STENCIL_REFERENCE));
+ (1 << VK_DYNAMIC_STATE_STENCIL_REFERENCE) |
+ (1 << VK_DYNAMIC_STATE_STENCIL_WRITE_MASK));
 
cmd_buffer->state.dynamic.viewport.count = 0;
cmd_buffer->state.dynamic.scissor.count = 0;
@@ -193,6 +194,7 @@ create_pipeline(struct anv_device *device,
 .sType = VK_STRUCTURE_TYPE_PIPELINE_DYNAMIC_STATE_CREATE_INFO,
 .dynamicStateCount = 9,
 .pDynamicStates = (VkDynamicState[]) {
+   /* Everything except stencil write mask */
VK_DYNAMIC_STATE_VIEWPORT,
VK_DYNAMIC_STATE_SCISSOR,
VK_DYNAMIC_STATE_LINE_WIDTH,
@@ -200,7 +202,6 @@ create_pipeline(struct anv_device *device,
VK_DYNAMIC_STATE_BLEND_CONSTANTS,
VK_DYNAMIC_STATE_DEPTH_BOUNDS,
VK_DYNAMIC_STATE_STENCIL_COMPARE_MASK,
-   VK_DYNAMIC_STATE_STENCIL_WRITE_MASK,
VK_DYNAMIC_STATE_STENCIL_REFERENCE,
 },
  },

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Mesa (vulkan): anv/pipeline: More competent gen8 clipping

2016-03-04 Thread Jason Ekstrand 
Module: Mesa
Branch: vulkan
Commit: fcd8e571851c18a259fdc4ccb34f6ba23f3d29ea
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=fcd8e571851c18a259fdc4ccb34f6ba23f3d29ea

Author: Jason Ekstrand 
Date:   Tue Mar  1 13:39:04 2016 -0800

anv/pipeline: More competent gen8 clipping

---

 src/intel/vulkan/gen8_pipeline.c | 14 ++
 1 file changed, 14 insertions(+)

diff --git a/src/intel/vulkan/gen8_pipeline.c b/src/intel/vulkan/gen8_pipeline.c
index 52629a7..ecb8f6d 100644
--- a/src/intel/vulkan/gen8_pipeline.c
+++ b/src/intel/vulkan/gen8_pipeline.c
@@ -326,7 +326,21 @@ genX(graphics_pipeline_create)(
 
anv_batch_emit(>batch, GENX(3DSTATE_CLIP),
   .ClipEnable = true,
+  .EarlyCullEnable = true,
+  .APIMode = 1, /* D3D */
   .ViewportXYClipTestEnable = !(extra && 
extra->disable_viewport),
+
+  .ClipMode =
+ pCreateInfo->pRasterizationState->rasterizerDiscardEnable 
?
+ REJECT_ALL : NORMAL,
+
+  .NonPerspectiveBarycentricEnable =
+ (pipeline->wm_prog_data.barycentric_interp_modes & 0x38) 
!= 0,
+
+  .TriangleStripListProvokingVertexSelect = 0,
+  .LineStripListProvokingVertexSelect = 0,
+  .TriangleFanProvokingVertexSelect = 1,
+
   .MinimumPointWidth = 0.125,
   .MaximumPointWidth = 255.875,
   .MaximumVPIndex = pCreateInfo->pViewportState->viewportCount 
- 1);

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Mesa (vulkan): anv/pipeline: Use the right provoking vertex for triangle fans

2016-03-04 Thread Jason Ekstrand 
Module: Mesa
Branch: vulkan
Commit: a8afd296537a0e61fd12c817c3003309346a5e75
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=a8afd296537a0e61fd12c817c3003309346a5e75

Author: Jason Ekstrand 
Date:   Fri Mar  4 00:02:18 2016 -0800

anv/pipeline: Use the right provoking vertex for triangle fans

---

 src/intel/vulkan/gen7_pipeline.c | 4 ++--
 src/intel/vulkan/gen8_pipeline.c | 2 +-
 2 files changed, 3 insertions(+), 3 deletions(-)

diff --git a/src/intel/vulkan/gen7_pipeline.c b/src/intel/vulkan/gen7_pipeline.c
index c114bfe..22a892b 100644
--- a/src/intel/vulkan/gen7_pipeline.c
+++ b/src/intel/vulkan/gen7_pipeline.c
@@ -61,7 +61,7 @@ gen7_emit_rs_state(struct anv_pipeline *pipeline,
 
   .TriangleStripListProvokingVertexSelect   = 0,
   .LineStripListProvokingVertexSelect   = 0,
-  .TriangleFanProvokingVertexSelect = 0,
+  .TriangleFanProvokingVertexSelect = 1,
 
   /* uint32_t AALineDistanceMode; */
   /* uint32_t 
VertexSubPixelPrecisionSelect; */
@@ -230,7 +230,7 @@ genX(graphics_pipeline_create)(
   .ClipMode = CLIPMODE_NORMAL,
   .TriangleStripListProvokingVertexSelect   = 0,
   .LineStripListProvokingVertexSelect   = 0,
-  .TriangleFanProvokingVertexSelect = 0,
+  .TriangleFanProvokingVertexSelect = 1,
   .MinimumPointWidth= 0.125,
   .MaximumPointWidth= 255.875,
   .MaximumVPIndex = pCreateInfo->pViewportState->viewportCount - 1);
diff --git a/src/intel/vulkan/gen8_pipeline.c b/src/intel/vulkan/gen8_pipeline.c
index a464006..52629a7 100644
--- a/src/intel/vulkan/gen8_pipeline.c
+++ b/src/intel/vulkan/gen8_pipeline.c
@@ -59,7 +59,7 @@ emit_rs_state(struct anv_pipeline *pipeline,
   .ViewportTransformEnable = !(extra && extra->disable_viewport),
   .TriangleStripListProvokingVertexSelect = 0,
   .LineStripListProvokingVertexSelect = 0,
-  .TriangleFanProvokingVertexSelect = 0,
+  .TriangleFanProvokingVertexSelect = 1,
   .PointWidthSource = pipeline->writes_point_size ? Vertex : State,
   .PointWidth = 1.0,
};

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Mesa (vulkan): anv/pipeline: Respect pRasterizationState->depthBiasEnable

2016-03-04 Thread Jason Ekstrand 
Module: Mesa
Branch: vulkan
Commit: fa8539dd6b1fd9bb1fc7f2f79889aacf14231d13
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=fa8539dd6b1fd9bb1fc7f2f79889aacf14231d13

Author: Jason Ekstrand 
Date:   Fri Mar  4 00:01:25 2016 -0800

anv/pipeline: Respect pRasterizationState->depthBiasEnable

---

 src/intel/vulkan/gen7_cmd_buffer.c | 6 --
 src/intel/vulkan/gen7_pipeline.c   | 3 +++
 src/intel/vulkan/gen8_cmd_buffer.c | 6 --
 src/intel/vulkan/gen8_pipeline.c   | 3 +++
 4 files changed, 6 insertions(+), 12 deletions(-)

diff --git a/src/intel/vulkan/gen7_cmd_buffer.c 
b/src/intel/vulkan/gen7_cmd_buffer.c
index 3ed9313..1713cc1 100644
--- a/src/intel/vulkan/gen7_cmd_buffer.c
+++ b/src/intel/vulkan/gen7_cmd_buffer.c
@@ -525,9 +525,6 @@ genX(cmd_buffer_flush_state)(struct anv_cmd_buffer 
*cmd_buffer)
   ANV_CMD_DIRTY_DYNAMIC_LINE_WIDTH |
   ANV_CMD_DIRTY_DYNAMIC_DEPTH_BIAS)) {
 
-  bool enable_bias = cmd_buffer->state.dynamic.depth_bias.bias != 0.0f ||
- cmd_buffer->state.dynamic.depth_bias.slope != 0.0f;
-
   const struct anv_image_view *iview =
  anv_cmd_buffer_get_depth_stencil_view(cmd_buffer);
   const struct anv_image *image = iview ? iview->image : NULL;
@@ -543,9 +540,6 @@ genX(cmd_buffer_flush_state)(struct anv_cmd_buffer 
*cmd_buffer)
  GENX(3DSTATE_SF_header),
  .DepthBufferSurfaceFormat = depth_format,
  .LineWidth = cmd_buffer->state.dynamic.line_width,
- .GlobalDepthOffsetEnableSolid = enable_bias,
- .GlobalDepthOffsetEnableWireframe = enable_bias,
- .GlobalDepthOffsetEnablePoint = enable_bias,
  .GlobalDepthOffsetConstant = 
cmd_buffer->state.dynamic.depth_bias.bias,
  .GlobalDepthOffsetScale = cmd_buffer->state.dynamic.depth_bias.slope,
  .GlobalDepthOffsetClamp = cmd_buffer->state.dynamic.depth_bias.clamp
diff --git a/src/intel/vulkan/gen7_pipeline.c b/src/intel/vulkan/gen7_pipeline.c
index 7d283f1..c114bfe 100644
--- a/src/intel/vulkan/gen7_pipeline.c
+++ b/src/intel/vulkan/gen7_pipeline.c
@@ -67,6 +67,9 @@ gen7_emit_rs_state(struct anv_pipeline *pipeline,
   /* uint32_t 
VertexSubPixelPrecisionSelect; */
   .UsePointWidthState   = !pipeline->writes_point_size,
   .PointWidth   = 1.0,
+  .GlobalDepthOffsetConstant= info->depthBiasEnable,
+  .GlobalDepthOffsetScale   = info->depthBiasEnable,
+  .GlobalDepthOffsetClamp   = info->depthBiasEnable,
};
 
GENX(3DSTATE_SF_pack)(NULL, >gen7.sf, );
diff --git a/src/intel/vulkan/gen8_cmd_buffer.c 
b/src/intel/vulkan/gen8_cmd_buffer.c
index 9d4926f..d506cf4 100644
--- a/src/intel/vulkan/gen8_cmd_buffer.c
+++ b/src/intel/vulkan/gen8_cmd_buffer.c
@@ -331,15 +331,9 @@ genX(cmd_buffer_flush_state)(struct anv_cmd_buffer 
*cmd_buffer)
 
if (cmd_buffer->state.dirty & (ANV_CMD_DIRTY_PIPELINE |
   ANV_CMD_DIRTY_DYNAMIC_DEPTH_BIAS)){
-  bool enable_bias = cmd_buffer->state.dynamic.depth_bias.bias != 0.0f ||
- cmd_buffer->state.dynamic.depth_bias.slope != 0.0f;
-
   uint32_t raster_dw[GENX(3DSTATE_RASTER_length)];
   struct GENX(3DSTATE_RASTER) raster = {
  GENX(3DSTATE_RASTER_header),
- .GlobalDepthOffsetEnableSolid = enable_bias,
- .GlobalDepthOffsetEnableWireframe = enable_bias,
- .GlobalDepthOffsetEnablePoint = enable_bias,
  .GlobalDepthOffsetConstant = 
cmd_buffer->state.dynamic.depth_bias.bias,
  .GlobalDepthOffsetScale = cmd_buffer->state.dynamic.depth_bias.slope,
  .GlobalDepthOffsetClamp = cmd_buffer->state.dynamic.depth_bias.clamp
diff --git a/src/intel/vulkan/gen8_pipeline.c b/src/intel/vulkan/gen8_pipeline.c
index 494a649..a464006 100644
--- a/src/intel/vulkan/gen8_pipeline.c
+++ b/src/intel/vulkan/gen8_pipeline.c
@@ -90,6 +90,9 @@ emit_rs_state(struct anv_pipeline *pipeline,
   .ViewportZFarClipTestEnable = true,
   .ViewportZNearClipTestEnable = true,
 #endif
+  .GlobalDepthOffsetEnableSolid = info->depthBiasEnable,
+  .GlobalDepthOffsetEnableWireframe = info->depthBiasEnable,
+  .GlobalDepthOffsetEnablePoint = info->depthBiasEnable,
};
 
GENX(3DSTATE_RASTER_pack)(NULL, pipeline->gen8.raster, );

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Mesa (master): nir: Recognize open-coded extract_u8.

2016-03-04 Thread Matt Turner 
Module: Mesa
Branch: master
Commit: 76289fbfa84a06ef4db8ad44ea0eb88ad0be8d5c
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=76289fbfa84a06ef4db8ad44ea0eb88ad0be8d5c

Author: Matt Turner 
Date:   Thu Jan 21 09:09:48 2016 -0800

nir: Recognize open-coded extract_u8.

Two shaders that appear in Unigine benchmarks (Heaven and Valley) unpack
three bytes from an integer and convert each into a float:

   float((val >> 16u) & 0xffu)
   float((val >>  8u) & 0xffu)
   float((val >>  0u) & 0xffu)

Instead of shifting, masking, and type converting like this:

   shr(8)  g15<1>UDg25<8,8,1>UD0x0010UD
   and(8)  g16<1>UDg15<8,8,1>UD0x00ffUD
   mov(8)  g17<1>F g16<8,8,1>UD

   shr(8)  g18<1>UDg25<8,8,1>UD0x0008UD
   and(8)  g19<1>UDg18<8,8,1>UD0x00ffUD
   mov(8)  g20<1>F g19<8,8,1>UD

   and(8)  g21<1>UDg25<8,8,1>UD0x00ffUD
   mov(8)  g22<1>F g21<8,8,1>UD

i965 can simply extract a byte and convert to float in a single
instruction:

   mov(8)  g17<1>F g25.2<32,8,4>UB
   mov(8)  g20<1>F g25.1<32,8,4>UB
   mov(8)  g22<1>F g25.0<32,8,4>UB

This patch implements the first step: recognizing byte extraction. A
later patch will optimize out the conversion to float.

   instructions in affected programs: 28568 -> 27450 (-3.91%)
   helped: 7

   cycles in affected programs: 210076 -> 203144 (-3.30%)
   helped: 7

This patch decreases the number of instructions in the two Unigine
programs by:

 #1721: 4520 -> 4374 instructions (-3.23%)
 #1706: 3752 -> 3582 instructions (-4.53%)

Reviewed-by: Kenneth Graunke 
Reviewed-by: Iago Toral Quiroga 

---

 src/compiler/nir/nir_opt_algebraic.py | 7 +++
 1 file changed, 7 insertions(+)

diff --git a/src/compiler/nir/nir_opt_algebraic.py 
b/src/compiler/nir/nir_opt_algebraic.py
index cc2c229..dd26805 100644
--- a/src/compiler/nir/nir_opt_algebraic.py
+++ b/src/compiler/nir/nir_opt_algebraic.py
@@ -162,6 +162,7 @@ optimizations = [
(('ishr', a, 0), a),
(('ushr', 0, a), 0),
(('ushr', a, 0), a),
+   (('iand', 0xff, ('ushr', a, 24)), ('ushr', a, 24)),
# Exponential/logarithmic identities
(('fexp2', ('flog2', a)), a), # 2^lg2(a) = a
(('flog2', ('fexp2', a)), a), # lg2(2^a) = a
@@ -213,6 +214,12 @@ optimizations = [
(('f2i', ('ftrunc', a)), ('f2i', a)),
(('f2u', ('ftrunc', a)), ('f2u', a)),
 
+   # Byte extraction
+   (('ushr', a, 24), ('extract_u8', a, 3), '!options->lower_extract_byte'),
+   (('iand', 0xff, ('ushr', a, 16)), ('extract_u8', a, 2), 
'!options->lower_extract_byte'),
+   (('iand', 0xff, ('ushr', a,  8)), ('extract_u8', a, 1), 
'!options->lower_extract_byte'),
+   (('iand', 0xff, a), ('extract_u8', a, 0), '!options->lower_extract_byte'),
+
# Subtracts
(('fsub', a, ('fsub', 0.0, b)), ('fadd', a, b)),
(('isub', a, ('isub', 0, b)), ('iadd', a, b)),

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Mesa (master): nir: Recognize open-coded extract_u16.

2016-03-04 Thread Matt Turner 
Module: Mesa
Branch: master
Commit: 905ff861982450831a56d112036f68a751337441
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=905ff861982450831a56d112036f68a751337441

Author: Matt Turner 
Date:   Wed Feb  3 14:28:31 2016 -0800

nir: Recognize open-coded extract_u16.

No shader-db changes, but does recognize some extract_u16 which enables
the next patch to optimize some code.

Reviewed-by: Kenneth Graunke 
Reviewed-by: Iago Toral Quiroga 

---

 src/compiler/nir/nir_opt_algebraic.py | 5 +
 1 file changed, 5 insertions(+)

diff --git a/src/compiler/nir/nir_opt_algebraic.py 
b/src/compiler/nir/nir_opt_algebraic.py
index dd26805..39be85f 100644
--- a/src/compiler/nir/nir_opt_algebraic.py
+++ b/src/compiler/nir/nir_opt_algebraic.py
@@ -163,6 +163,7 @@ optimizations = [
(('ushr', 0, a), 0),
(('ushr', a, 0), a),
(('iand', 0xff, ('ushr', a, 24)), ('ushr', a, 24)),
+   (('iand', 0x, ('ushr', a, 16)), ('ushr', a, 16)),
# Exponential/logarithmic identities
(('fexp2', ('flog2', a)), a), # 2^lg2(a) = a
(('flog2', ('fexp2', a)), a), # lg2(2^a) = a
@@ -220,6 +221,10 @@ optimizations = [
(('iand', 0xff, ('ushr', a,  8)), ('extract_u8', a, 1), 
'!options->lower_extract_byte'),
(('iand', 0xff, a), ('extract_u8', a, 0), '!options->lower_extract_byte'),
 
+# Word extraction
+   (('ushr', a, 16), ('extract_u16', a, 1), '!options->lower_extract_word'),
+   (('iand', 0x, a), ('extract_u16', a, 0), 
'!options->lower_extract_word'),
+
# Subtracts
(('fsub', a, ('fsub', 0.0, b)), ('fadd', a, b)),
(('isub', a, ('isub', 0, b)), ('iadd', a, b)),

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Mesa (master): i965/fs: Optimize float conversions of byte/word extract.

2016-03-04 Thread Matt Turner 
Module: Mesa
Branch: master
Commit: 1f862e923cba1d5cd54a707f70f0be113635e855
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=1f862e923cba1d5cd54a707f70f0be113635e855

Author: Matt Turner 
Date:   Thu Jan 21 09:10:09 2016 -0800

i965/fs: Optimize float conversions of byte/word extract.

   instructions in affected programs: 31535 -> 29966 (-4.98%)
   helped: 23

   cycles in affected programs: 272648 -> 266022 (-2.43%)
   helped: 14
   HURT: 1

The patch decreases the number of instructions in the two Unigine
programs by:

 #1721: 4374 -> 4155 instructions (-5.01%)
 #1706: 3582 -> 3363 instructions (-6.11%)

Reviewed-by: Kenneth Graunke 
Reviewed-by: Iago Toral Quiroga 

---

 src/mesa/drivers/dri/i965/brw_fs.h   |  2 ++
 src/mesa/drivers/dri/i965/brw_fs_nir.cpp | 46 
 2 files changed, 48 insertions(+)

diff --git a/src/mesa/drivers/dri/i965/brw_fs.h 
b/src/mesa/drivers/dri/i965/brw_fs.h
index 7446ca1..21c7813 100644
--- a/src/mesa/drivers/dri/i965/brw_fs.h
+++ b/src/mesa/drivers/dri/i965/brw_fs.h
@@ -272,6 +272,8 @@ public:
void emit_percomp(const brw::fs_builder , const fs_inst ,
  unsigned wr_mask);
 
+   bool optimize_extract_to_float(nir_alu_instr *instr,
+  const fs_reg );
bool optimize_frontfacing_ternary(nir_alu_instr *instr,
  const fs_reg );
 
diff --git a/src/mesa/drivers/dri/i965/brw_fs_nir.cpp 
b/src/mesa/drivers/dri/i965/brw_fs_nir.cpp
index db20c71..04e9b8f 100644
--- a/src/mesa/drivers/dri/i965/brw_fs_nir.cpp
+++ b/src/mesa/drivers/dri/i965/brw_fs_nir.cpp
@@ -500,6 +500,49 @@ fs_visitor::nir_emit_instr(nir_instr *instr)
}
 }
 
+/**
+ * Recognizes a parent instruction of nir_op_extract_* and changes the type to
+ * match instr.
+ */
+bool
+fs_visitor::optimize_extract_to_float(nir_alu_instr *instr,
+  const fs_reg )
+{
+   if (!instr->src[0].src.is_ssa ||
+   !instr->src[0].src.ssa->parent_instr)
+  return false;
+
+   if (instr->src[0].src.ssa->parent_instr->type != nir_instr_type_alu)
+  return false;
+
+   nir_alu_instr *src0 =
+  nir_instr_as_alu(instr->src[0].src.ssa->parent_instr);
+
+   if (src0->op != nir_op_extract_u8 && src0->op != nir_op_extract_u16 &&
+   src0->op != nir_op_extract_i8 && src0->op != nir_op_extract_i16)
+  return false;
+
+   nir_const_value *element = nir_src_as_const_value(src0->src[1].src);
+   assert(element != NULL);
+
+   enum opcode extract_op;
+   if (src0->op == nir_op_extract_u16 || src0->op == nir_op_extract_i16) {
+  assert(element->u[0] <= 1);
+  extract_op = SHADER_OPCODE_EXTRACT_WORD;
+   } else {
+  assert(element->u[0] <= 3);
+  extract_op = SHADER_OPCODE_EXTRACT_BYTE;
+   }
+
+   fs_reg op0 = get_nir_src(src0->src[0].src);
+   op0.type = brw_type_for_nir_type(nir_op_infos[src0->op].input_types[0]);
+   op0 = offset(op0, bld, src0->src[0].swizzle[0]);
+
+   set_saturate(instr->dest.saturate,
+bld.emit(extract_op, result, op0, brw_imm_ud(element->u[0])));
+   return true;
+}
+
 bool
 fs_visitor::optimize_frontfacing_ternary(nir_alu_instr *instr,
  const fs_reg )
@@ -671,6 +714,9 @@ fs_visitor::nir_emit_alu(const fs_builder , 
nir_alu_instr *instr)
switch (instr->op) {
case nir_op_i2f:
case nir_op_u2f:
+  if (optimize_extract_to_float(instr, result))
+ return;
+
   inst = bld.MOV(result, op[0]);
   inst->saturate = instr->dest.saturate;
   break;

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Mesa (vulkan): anv: Fix backwards shadow comparisons

2016-03-04 Thread Kenneth Graunke 
Module: Mesa
Branch: vulkan
Commit: 9d7faadd8a319d07616d7288451562bf8b9a4be8
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=9d7faadd8a319d07616d7288451562bf8b9a4be8

Author: Kenneth Graunke 
Date:   Thu Mar  3 16:43:49 2016 -0800

anv: Fix backwards shadow comparisons

sample_c is backwards from what GL and Vulkan expect.

See intel_state.c in i965.

v2: Drop unused vk_to_gen_compare_op.

Reviewed-by: Jason Ekstrand 

---

 src/intel/vulkan/genX_state.c | 31 +--
 1 file changed, 21 insertions(+), 10 deletions(-)

diff --git a/src/intel/vulkan/genX_state.c b/src/intel/vulkan/genX_state.c
index 63ea269..900f6dc 100644
--- a/src/intel/vulkan/genX_state.c
+++ b/src/intel/vulkan/genX_state.c
@@ -173,15 +173,26 @@ static const uint32_t vk_to_gen_tex_address[] = {
[VK_SAMPLER_ADDRESS_MODE_CLAMP_TO_BORDER] = TCM_CLAMP_BORDER,
 };
 
-static const uint32_t vk_to_gen_compare_op[] = {
-   [VK_COMPARE_OP_NEVER] = PREFILTEROPNEVER,
-   [VK_COMPARE_OP_LESS]  = PREFILTEROPLESS,
-   [VK_COMPARE_OP_EQUAL] = PREFILTEROPEQUAL,
-   [VK_COMPARE_OP_LESS_OR_EQUAL] = PREFILTEROPLEQUAL,
-   [VK_COMPARE_OP_GREATER]   = PREFILTEROPGREATER,
-   [VK_COMPARE_OP_NOT_EQUAL] = PREFILTEROPNOTEQUAL,
-   [VK_COMPARE_OP_GREATER_OR_EQUAL]  = PREFILTEROPGEQUAL,
-   [VK_COMPARE_OP_ALWAYS]= PREFILTEROPALWAYS,
+/* Vulkan specifies the result of shadow comparisons as:
+ * 1 if   ref  texel,
+ * 0 otherwise.
+ *
+ * The hardware does:
+ * 0 if texel  ref,
+ * 1 otherwise.
+ *
+ * So, these look a bit strange because there's both a negation
+ * and swapping of the arguments involved.
+ */
+static const uint32_t vk_to_gen_shadow_compare_op[] = {
+   [VK_COMPARE_OP_NEVER]= PREFILTEROPALWAYS,
+   [VK_COMPARE_OP_LESS] = PREFILTEROPLEQUAL,
+   [VK_COMPARE_OP_EQUAL]= PREFILTEROPNOTEQUAL,
+   [VK_COMPARE_OP_LESS_OR_EQUAL]= PREFILTEROPLESS,
+   [VK_COMPARE_OP_GREATER]  = PREFILTEROPGEQUAL,
+   [VK_COMPARE_OP_NOT_EQUAL]= PREFILTEROPEQUAL,
+   [VK_COMPARE_OP_GREATER_OR_EQUAL] = PREFILTEROPGREATER,
+   [VK_COMPARE_OP_ALWAYS]   = PREFILTEROPNEVER,
 };
 
 VkResult genX(CreateSampler)(
@@ -228,7 +239,7 @@ VkResult genX(CreateSampler)(
   .ChromaKeyEnable = 0,
   .ChromaKeyIndex = 0,
   .ChromaKeyMode = 0,
-  .ShadowFunction = vk_to_gen_compare_op[pCreateInfo->compareOp],
+  .ShadowFunction = vk_to_gen_shadow_compare_op[pCreateInfo->compareOp],
   .CubeSurfaceControlMode = OVERRIDE,
 
   .BorderColorPointer = border_color_offset,

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Mesa (vulkan): hack to make dota 2 menus work

2016-03-04 Thread Kenneth Graunke 
Module: Mesa
Branch: vulkan
Commit: 3ed260f54cc353398965037f12f39aafa086bcc5
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=3ed260f54cc353398965037f12f39aafa086bcc5

Author: Kenneth Graunke 
Date:   Thu Mar  3 16:21:09 2016 -0800

hack to make dota 2 menus work

---

 src/intel/vulkan/genX_cmd_buffer.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/src/intel/vulkan/genX_cmd_buffer.c 
b/src/intel/vulkan/genX_cmd_buffer.c
index a888c36..a31ecc3 100644
--- a/src/intel/vulkan/genX_cmd_buffer.c
+++ b/src/intel/vulkan/genX_cmd_buffer.c
@@ -721,8 +721,8 @@ void genX(CmdBeginRenderPass)(
const VkRect2D *render_area = >renderArea;
 
anv_batch_emit(_buffer->batch, GENX(3DSTATE_DRAWING_RECTANGLE),
-  .ClippedDrawingRectangleYMin = render_area->offset.y,
-  .ClippedDrawingRectangleXMin = render_area->offset.x,
+  .ClippedDrawingRectangleYMin = MAX2(render_area->offset.y, 
0),
+  .ClippedDrawingRectangleXMin = MAX2(render_area->offset.x, 
0),
   .ClippedDrawingRectangleYMax =
  render_area->offset.y + render_area->extent.height - 1,
   .ClippedDrawingRectangleXMax =

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Mesa (master): svga: reorder SVGA_QUERY_ switch cases to match declaration order

2016-03-04 Thread Brian Paul 
Module: Mesa
Branch: master
Commit: 6fc8d90fa97f7cce059b1046d76b31d266f06a92
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=6fc8d90fa97f7cce059b1046d76b31d266f06a92

Author: Brian Paul 
Date:   Mon Feb 29 12:01:10 2016 -0700

svga: reorder SVGA_QUERY_ switch cases to match declaration order

Reviewed-by: Charmaine Lee 

---

 src/gallium/drivers/svga/svga_pipe_query.c | 18 +-
 1 file changed, 9 insertions(+), 9 deletions(-)

diff --git a/src/gallium/drivers/svga/svga_pipe_query.c 
b/src/gallium/drivers/svga/svga_pipe_query.c
index 255494a..a67ab1f 100644
--- a/src/gallium/drivers/svga/svga_pipe_query.c
+++ b/src/gallium/drivers/svga/svga_pipe_query.c
@@ -723,15 +723,15 @@ svga_create_query(struct pipe_context *pipe,
case SVGA_QUERY_NUM_DRAW_CALLS:
case SVGA_QUERY_NUM_FALLBACKS:
case SVGA_QUERY_NUM_FLUSHES:
+   case SVGA_QUERY_NUM_VALIDATIONS:
+   case SVGA_QUERY_MAP_BUFFER_TIME:
+   case SVGA_QUERY_NUM_RESOURCES_MAPPED:
+   case SVGA_QUERY_NUM_BYTES_UPLOADED:
case SVGA_QUERY_MEMORY_USED:
case SVGA_QUERY_NUM_SHADERS:
case SVGA_QUERY_NUM_RESOURCES:
case SVGA_QUERY_NUM_STATE_OBJECTS:
-   case SVGA_QUERY_NUM_VALIDATIONS:
-   case SVGA_QUERY_MAP_BUFFER_TIME:
case SVGA_QUERY_NUM_SURFACE_VIEWS:
-   case SVGA_QUERY_NUM_RESOURCES_MAPPED:
-   case SVGA_QUERY_NUM_BYTES_UPLOADED:
case SVGA_QUERY_NUM_GENERATE_MIPMAP:
   break;
default:
@@ -792,15 +792,15 @@ svga_destroy_query(struct pipe_context *pipe, struct 
pipe_query *q)
case SVGA_QUERY_NUM_DRAW_CALLS:
case SVGA_QUERY_NUM_FALLBACKS:
case SVGA_QUERY_NUM_FLUSHES:
+   case SVGA_QUERY_NUM_VALIDATIONS:
+   case SVGA_QUERY_MAP_BUFFER_TIME:
+   case SVGA_QUERY_NUM_RESOURCES_MAPPED:
+   case SVGA_QUERY_NUM_BYTES_UPLOADED:
case SVGA_QUERY_MEMORY_USED:
case SVGA_QUERY_NUM_SHADERS:
case SVGA_QUERY_NUM_RESOURCES:
case SVGA_QUERY_NUM_STATE_OBJECTS:
-   case SVGA_QUERY_NUM_VALIDATIONS:
-   case SVGA_QUERY_MAP_BUFFER_TIME:
case SVGA_QUERY_NUM_SURFACE_VIEWS:
-   case SVGA_QUERY_NUM_RESOURCES_MAPPED:
-   case SVGA_QUERY_NUM_BYTES_UPLOADED:
case SVGA_QUERY_NUM_GENERATE_MIPMAP:
   /* nothing */
   break;
@@ -1073,9 +1073,9 @@ svga_get_query_result(struct pipe_context *pipe,
case SVGA_QUERY_NUM_FALLBACKS:
case SVGA_QUERY_NUM_FLUSHES:
case SVGA_QUERY_NUM_VALIDATIONS:
+   case SVGA_QUERY_MAP_BUFFER_TIME:
case SVGA_QUERY_NUM_RESOURCES_MAPPED:
case SVGA_QUERY_NUM_BYTES_UPLOADED:
-   case SVGA_QUERY_MAP_BUFFER_TIME:
   vresult->u64 = sq->end_count - sq->begin_count;
   break;
/* These are running total counters */

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Mesa (master): st/xlib: Support unlimited number of display connections

2016-03-04 Thread Brian Paul 
Module: Mesa
Branch: master
Commit: 51e562c3ea984f476efc0c4cbd01a4b718f3a007
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=51e562c3ea984f476efc0c4cbd01a4b718f3a007

Author: George Kyriazis 
Date:   Wed Mar  2 18:28:00 2016 -0700

st/xlib: Support unlimited number of display connections

There is a limit of 10 display connections, which was a
problem for apps/tests that were continuously opening/closing display
connections.

This fix uses XAddExtension() and XESetCloseDisplay() to keep track
of the status of the display connections from the X server, freeing
mesa-related data as X displays get destroyed by the X server.

Poster child is the VTK "TimingTests"

Tested-by: Brian Paul 
Reviewed-by: Brian Paul 

---

 src/gallium/state_trackers/glx/xlib/xm_api.c | 122 ++-
 1 file changed, 103 insertions(+), 19 deletions(-)

diff --git a/src/gallium/state_trackers/glx/xlib/xm_api.c 
b/src/gallium/state_trackers/glx/xlib/xm_api.c
index 2f5e1f5..2f1bfae 100644
--- a/src/gallium/state_trackers/glx/xlib/xm_api.c
+++ b/src/gallium/state_trackers/glx/xlib/xm_api.c
@@ -110,14 +110,6 @@ void xmesa_set_driver( const struct xm_driver *templ )
 }
 
 
-/*
- * XXX replace this with a linked list, or better yet, try to attach the
- * gallium/mesa extra bits to the X Display object with XAddExtension().
- */
-#define MAX_DISPLAYS 10
-static struct xmesa_display Displays[MAX_DISPLAYS];
-static int NumDisplays = 0;
-
 static int
 xmesa_get_param(struct st_manager *smapi,
 enum st_manager_param param)
@@ -130,34 +122,125 @@ xmesa_get_param(struct st_manager *smapi,
}
 }
 
+/* linked list of XMesaDisplay hooks per display */
+typedef struct _XMesaExtDisplayInfo {
+   struct _XMesaExtDisplayInfo *next;
+   Display *display;
+   XExtCodes *codes;
+   struct xmesa_display mesaDisplay;
+} XMesaExtDisplayInfo;
+
+typedef struct _XMesaExtInfo {
+   XMesaExtDisplayInfo *head;
+   int ndisplays;
+} XMesaExtInfo;
+
+static XMesaExtInfo MesaExtInfo;
+
+/* hook to delete XMesaDisplay on XDestroyDisplay */
+static int
+xmesa_close_display(Display *display, XExtCodes *codes)
+{
+   XMesaExtDisplayInfo *info, *prev;
+
+   assert(MesaExtInfo.ndisplays > 0);
+   assert(MesaExtInfo.head);
+
+   _XLockMutex(_Xglobal_lock);
+   /* first find display */
+   prev = NULL;
+   for (info = MesaExtInfo.head; info; info = info->next) {
+  if (info->display == display) {
+ prev = info;
+ break;
+  }
+   }
+
+   if (info == NULL) {
+  /* no display found */
+  _XUnlockMutex(_Xglobal_lock);
+  return 0;
+   }
+
+   /* remove display entry from list */
+   if (prev != MesaExtInfo.head) {
+  prev->next = info->next;
+   } else {
+  MesaExtInfo.head = info->next;
+   }
+   MesaExtInfo.ndisplays--;
+
+   _XUnlockMutex(_Xglobal_lock);
+
+   /* don't forget to clean up mesaDisplay */
+   XMesaDisplay xmdpy = >mesaDisplay;
+
+   if (xmdpy->screen) {
+  xmdpy->screen->destroy(xmdpy->screen);
+   }
+   free(xmdpy->smapi);
+
+   XFree((char *) info);
+   return 1;
+}
+
 static XMesaDisplay
 xmesa_init_display( Display *display )
 {
pipe_static_mutex(init_mutex);
XMesaDisplay xmdpy;
-   int i;
+   XMesaExtDisplayInfo *info;
+
+   if (display == NULL) {
+  return NULL;
+   }
 
pipe_mutex_lock(init_mutex);
 
-   /* Look for XMesaDisplay which corresponds to 'display' */
-   for (i = 0; i < NumDisplays; i++) {
-  if (Displays[i].display == display) {
+   /* Look for XMesaDisplay which corresponds to this display */
+   info = MesaExtInfo.head;
+   while(info) {
+  if (info->display == display) {
  /* Found it */
  pipe_mutex_unlock(init_mutex);
- return [i];
+ return  >mesaDisplay;
   }
+  info = info->next;
}
 
-   /* Create new XMesaDisplay */
+   /* Not found.  Create new XMesaDisplay */
+   /* first allocate X-related resources and hook destroy callback */
 
-   assert(NumDisplays < MAX_DISPLAYS);
-   xmdpy = [NumDisplays];
-   NumDisplays++;
-
-   if (!xmdpy->display && display) {
+   /* allocate mesa display info */
+   info = (XMesaExtDisplayInfo *) Xmalloc(sizeof(XMesaExtDisplayInfo));
+   if (info == NULL) {
+  pipe_mutex_unlock(init_mutex);
+  return NULL;
+   }
+   info->display = display;
+   info->codes = XAddExtension(display);
+   if (info->codes == NULL) {
+  /* could not allocate extension.  Fail */
+  Xfree(info);
+  pipe_mutex_unlock(init_mutex);
+  return NULL;
+   }
+   XESetCloseDisplay(display, info->codes->extension, xmesa_close_display);
+   xmdpy = >mesaDisplay; /* to be filled out below */
+
+   /* chain to the list of displays */
+   _XLockMutex(_Xglobal_lock);
+   info->next = MesaExtInfo.head;
+   MesaExtInfo.head = info;
+   MesaExtInfo.ndisplays++;
+   _XUnlockMutex(_Xglobal_lock);
+
+   /* now create the new XMesaDisplay info */
+   if (display) {
   xmdpy->display = display;

Mesa (master): svga: Force an RGBA view creation for an RGBA resource

2016-03-04 Thread Brian Paul 
Module: Mesa
Branch: master
Commit: f1410c5b910911e690290e8a95aeb9f95e7cc470
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=f1410c5b910911e690290e8a95aeb9f95e7cc470

Author: Sinclair Yeh 
Date:   Tue Mar  1 15:55:53 2016 -0800

svga: Force an RGBA view creation for an RGBA resource

glXCreatePixmap() may specify a GLX_TEXTURE_FORMAT_RGB_EXT format
for an RGBA resource, causing us to create an RGBX view for an
RGBA resource, a combination vgpu10 does not support.

When this is detected, change the request to create an RGBA view
instead.

Reviewed-by: Brian Paul 

---

 src/gallium/drivers/svga/svga_state_sampler.c | 11 ++-
 1 file changed, 10 insertions(+), 1 deletion(-)

diff --git a/src/gallium/drivers/svga/svga_state_sampler.c 
b/src/gallium/drivers/svga/svga_state_sampler.c
index e7b540c..6179a79 100644
--- a/src/gallium/drivers/svga/svga_state_sampler.c
+++ b/src/gallium/drivers/svga/svga_state_sampler.c
@@ -103,8 +103,17 @@ svga_validate_pipe_sampler_view(struct svga_context *svga,
   SVGA3dSurfaceFormat format;
   SVGA3dResourceType resourceDim;
   SVGA3dShaderResourceViewDesc viewDesc;
+  enum pipe_format pformat = sv->base.format;
 
-  format = svga_translate_format(ss, sv->base.format,
+  /* vgpu10 cannot create a BGRX view for a BGRA resource, so force it to
+   * create a BGRA view.
+   */
+  if (pformat == PIPE_FORMAT_B8G8R8X8_UNORM &&
+  sv->base.texture->format == PIPE_FORMAT_B8G8R8A8_UNORM) {
+ pformat = PIPE_FORMAT_B8G8R8A8_UNORM;
+  }
+
+  format = svga_translate_format(ss, pformat,
  PIPE_BIND_SAMPLER_VIEW);
   assert(format != SVGA3D_FORMAT_INVALID);
 

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Mesa (master): st/xlib: Hang off screen destructor off main XCloseDisplay( ) callback.

2016-03-04 Thread Brian Paul 
Module: Mesa
Branch: master
Commit: 01e92e7010aebee111e70bdc18081b483511cac0
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=01e92e7010aebee111e70bdc18081b483511cac0

Author: George Kyriazis 
Date:   Wed Mar  2 18:28:00 2016 -0700

st/xlib: Hang off screen destructor off main XCloseDisplay() callback.

This resolves some order dependencies between the already existing
callback the newly created one.

Tested-by: Brian Paul 
Reviewed-by: Brian Paul 

---

 src/gallium/state_trackers/glx/xlib/glx_api.c |  1 +
 src/gallium/state_trackers/glx/xlib/xm_api.c  | 58 +++
 src/gallium/state_trackers/glx/xlib/xm_api.h  |  3 ++
 3 files changed, 27 insertions(+), 35 deletions(-)

diff --git a/src/gallium/state_trackers/glx/xlib/glx_api.c 
b/src/gallium/state_trackers/glx/xlib/glx_api.c
index 0456d44..1c541b7 100644
--- a/src/gallium/state_trackers/glx/xlib/glx_api.c
+++ b/src/gallium/state_trackers/glx/xlib/glx_api.c
@@ -615,6 +615,7 @@ close_display_callback(Display *dpy, XExtCodes *codes)
 {
xmesa_destroy_buffers_on_display(dpy);
destroy_visuals_on_display(dpy);
+   xmesa_close_display(dpy);
return 0;
 }
 
diff --git a/src/gallium/state_trackers/glx/xlib/xm_api.c 
b/src/gallium/state_trackers/glx/xlib/xm_api.c
index 2f1bfae..cee4f18 100644
--- a/src/gallium/state_trackers/glx/xlib/xm_api.c
+++ b/src/gallium/state_trackers/glx/xlib/xm_api.c
@@ -126,7 +126,6 @@ xmesa_get_param(struct st_manager *smapi,
 typedef struct _XMesaExtDisplayInfo {
struct _XMesaExtDisplayInfo *next;
Display *display;
-   XExtCodes *codes;
struct xmesa_display mesaDisplay;
 } XMesaExtDisplayInfo;
 
@@ -138,8 +137,8 @@ typedef struct _XMesaExtInfo {
 static XMesaExtInfo MesaExtInfo;
 
 /* hook to delete XMesaDisplay on XDestroyDisplay */
-static int
-xmesa_close_display(Display *display, XExtCodes *codes)
+extern void
+xmesa_close_display(Display *display)
 {
XMesaExtDisplayInfo *info, *prev;
 
@@ -159,7 +158,7 @@ xmesa_close_display(Display *display, XExtCodes *codes)
if (info == NULL) {
   /* no display found */
   _XUnlockMutex(_Xglobal_lock);
-  return 0;
+  return;
}
 
/* remove display entry from list */
@@ -181,7 +180,6 @@ xmesa_close_display(Display *display, XExtCodes *codes)
free(xmdpy->smapi);
 
XFree((char *) info);
-   return 1;
 }
 
 static XMesaDisplay
@@ -218,14 +216,6 @@ xmesa_init_display( Display *display )
   return NULL;
}
info->display = display;
-   info->codes = XAddExtension(display);
-   if (info->codes == NULL) {
-  /* could not allocate extension.  Fail */
-  Xfree(info);
-  pipe_mutex_unlock(init_mutex);
-  return NULL;
-   }
-   XESetCloseDisplay(display, info->codes->extension, xmesa_close_display);
xmdpy = >mesaDisplay; /* to be filled out below */
 
/* chain to the list of displays */
@@ -236,32 +226,30 @@ xmesa_init_display( Display *display )
_XUnlockMutex(_Xglobal_lock);
 
/* now create the new XMesaDisplay info */
-   if (display) {
-  xmdpy->display = display;
-  xmdpy->screen = driver.create_pipe_screen(display);
-  xmdpy->smapi = CALLOC_STRUCT(st_manager);
-  xmdpy->pipe = NULL;
-  if (xmdpy->smapi) {
- xmdpy->smapi->screen = xmdpy->screen;
- xmdpy->smapi->get_param = xmesa_get_param;
-  }
+   assert(display);
+
+   xmdpy->display = display;
+   xmdpy->screen = driver.create_pipe_screen(display);
+   xmdpy->smapi = CALLOC_STRUCT(st_manager);
+   xmdpy->pipe = NULL;
+   if (xmdpy->smapi) {
+  xmdpy->smapi->screen = xmdpy->screen;
+  xmdpy->smapi->get_param = xmesa_get_param;
+   }
 
-  if (xmdpy->screen && xmdpy->smapi) {
- pipe_mutex_init(xmdpy->mutex);
+   if (xmdpy->screen && xmdpy->smapi) {
+  pipe_mutex_init(xmdpy->mutex);
+   }
+   else {
+  if (xmdpy->screen) {
+ xmdpy->screen->destroy(xmdpy->screen);
+ xmdpy->screen = NULL;
   }
-  else {
- if (xmdpy->screen) {
-xmdpy->screen->destroy(xmdpy->screen);
-xmdpy->screen = NULL;
- }
- free(xmdpy->smapi);
- xmdpy->smapi = NULL;
+  free(xmdpy->smapi);
+  xmdpy->smapi = NULL;
 
- xmdpy->display = NULL;
-  }
+  xmdpy->display = NULL;
}
-   if (!xmdpy->display || xmdpy->display != display)
-  xmdpy = NULL;
 
pipe_mutex_unlock(init_mutex);
 
diff --git a/src/gallium/state_trackers/glx/xlib/xm_api.h 
b/src/gallium/state_trackers/glx/xlib/xm_api.h
index ffdffc0..ccf35a5 100644
--- a/src/gallium/state_trackers/glx/xlib/xm_api.h
+++ b/src/gallium/state_trackers/glx/xlib/xm_api.h
@@ -378,6 +378,9 @@ xmesa_check_buffer_size(XMesaBuffer b);
 extern void
 xmesa_destroy_buffers_on_display(Display *dpy);
 
+extern void
+xmesa_close_display(Display *dpy);
+
 static inline GLuint
 xmesa_buffer_width(XMesaBuffer b)
 {

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Mesa (master): svga: fix an error in svga_texture_generate_mipmap

2016-03-04 Thread Brian Paul 
Module: Mesa
Branch: master
Commit: 8366701f4cb6d297623607e922d151dc05f69811
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=8366701f4cb6d297623607e922d151dc05f69811

Author: Charmaine Lee 
Date:   Mon Feb 29 12:00:12 2016 -0800

svga: fix an error in svga_texture_generate_mipmap

With this patch, make sure the shader resource view is properly created
before referencing it in the generate mipmap command.

Reviewed-by: Brian Paul 

---

 src/gallium/drivers/svga/svga_resource_texture.c | 7 ++-
 1 file changed, 6 insertions(+), 1 deletion(-)

diff --git a/src/gallium/drivers/svga/svga_resource_texture.c 
b/src/gallium/drivers/svga/svga_resource_texture.c
index 3f754c4..e898ff2 100644
--- a/src/gallium/drivers/svga/svga_resource_texture.c
+++ b/src/gallium/drivers/svga/svga_resource_texture.c
@@ -1038,7 +1038,12 @@ svga_texture_generate_mipmap(struct pipe_context *pipe,
   return FALSE;
 
sv = svga_pipe_sampler_view(psv);
-   svga_validate_pipe_sampler_view(svga, sv);
+   ret = svga_validate_pipe_sampler_view(svga, sv);
+   if (ret != PIPE_OK) {
+  svga_context_flush(svga, NULL);
+  ret = svga_validate_pipe_sampler_view(svga, sv);
+  assert(ret == PIPE_OK);
+   }
 
ret = SVGA3D_vgpu10_GenMips(svga->swc, sv->id, tex->handle);
if (ret != PIPE_OK) {

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Mesa (master): svga: add new svga_winsys_context::get_command_buffer_size( )

2016-03-04 Thread Brian Paul 
Module: Mesa
Branch: master
Commit: 1258f907f4f8371391ad7e30ae7365c223203a97
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=1258f907f4f8371391ad7e30ae7365c223203a97

Author: Brian Paul 
Date:   Mon Feb 29 14:25:09 2016 -0700

svga: add new svga_winsys_context::get_command_buffer_size()

To ask how large the current command buffer is.  Will be used for
a new GALLIUM_HUD graph.

Reviewed-by: Charmaine Lee 

---

 src/gallium/drivers/svga/svga_winsys.h| 6 ++
 src/gallium/winsys/svga/drm/vmw_context.c | 8 
 2 files changed, 14 insertions(+)

diff --git a/src/gallium/drivers/svga/svga_winsys.h 
b/src/gallium/drivers/svga/svga_winsys.h
index 562c669..0ad6b5e 100644
--- a/src/gallium/drivers/svga/svga_winsys.h
+++ b/src/gallium/drivers/svga/svga_winsys.h
@@ -108,6 +108,12 @@ struct svga_winsys_context
  uint32_t nr_bytes, uint32_t nr_relocs );

/**
+* Returns current size of command buffer, in bytes.
+*/
+   unsigned
+   (*get_command_buffer_size)(struct svga_winsys_context *swc);
+
+   /**
 * Emit a relocation for a host surface.
 * 
 * @param flags bitmask of SVGA_RELOC_* flags
diff --git a/src/gallium/winsys/svga/drm/vmw_context.c 
b/src/gallium/winsys/svga/drm/vmw_context.c
index dae121e..8d23bff 100644
--- a/src/gallium/winsys/svga/drm/vmw_context.c
+++ b/src/gallium/winsys/svga/drm/vmw_context.c
@@ -315,6 +315,13 @@ vmw_swc_reserve(struct svga_winsys_context *swc,
return vswc->command.buffer + vswc->command.used;
 }
 
+static unsigned
+vmw_swc_get_command_buffer_size(struct svga_winsys_context *swc)
+{
+   const struct vmw_svga_winsys_context *vswc = vmw_svga_winsys_context(swc);
+   return vswc->command.used;
+}
+
 static void
 vmw_swc_context_relocation(struct svga_winsys_context *swc,
   uint32 *cid)
@@ -761,6 +768,7 @@ vmw_svga_winsys_context_create(struct svga_winsys_screen 
*sws)
 
vswc->base.destroy = vmw_swc_destroy;
vswc->base.reserve = vmw_swc_reserve;
+   vswc->base.get_command_buffer_size = vmw_swc_get_command_buffer_size;
vswc->base.surface_relocation = vmw_swc_surface_relocation;
vswc->base.region_relocation = vmw_swc_region_relocation;
vswc->base.mob_relocation = vmw_swc_mob_relocation;

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Mesa (master): svga: add new command-buffer-size HUD query

2016-03-04 Thread Brian Paul 
Module: Mesa
Branch: master
Commit: 192ee9adb1c092cf01860d23e13f373fb041c698
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=192ee9adb1c092cf01860d23e13f373fb041c698

Author: Brian Paul 
Date:   Mon Feb 29 14:26:12 2016 -0700

svga: add new command-buffer-size HUD query

To plot a graph of the command buffer size.

Reviewed-by: Charmaine Lee 

---

 src/gallium/drivers/svga/svga_context.c|  3 +++
 src/gallium/drivers/svga/svga_context.h| 16 +---
 src/gallium/drivers/svga/svga_pipe_query.c |  9 +
 src/gallium/drivers/svga/svga_screen.c |  2 ++
 4 files changed, 23 insertions(+), 7 deletions(-)

diff --git a/src/gallium/drivers/svga/svga_context.c 
b/src/gallium/drivers/svga/svga_context.c
index b10eb45..32917cd 100644
--- a/src/gallium/drivers/svga/svga_context.c
+++ b/src/gallium/drivers/svga/svga_context.c
@@ -307,6 +307,9 @@ void svga_context_flush( struct svga_context *svga,
 */
svga_context_flush_buffers(svga);
 
+   svga->hud.command_buffer_size +=
+  svga->swc->get_command_buffer_size(svga->swc);
+
/* Flush pending commands to hardware:
 */
svga->swc->flush(svga->swc, );
diff --git a/src/gallium/drivers/svga/svga_context.h 
b/src/gallium/drivers/svga/svga_context.h
index f1a2041..2a1ad14 100644
--- a/src/gallium/drivers/svga/svga_context.h
+++ b/src/gallium/drivers/svga/svga_context.h
@@ -52,16 +52,17 @@
 #define SVGA_QUERY_MAP_BUFFER_TIME (PIPE_QUERY_DRIVER_SPECIFIC + 4)
 #define SVGA_QUERY_NUM_RESOURCES_MAPPED(PIPE_QUERY_DRIVER_SPECIFIC + 5)
 #define SVGA_QUERY_NUM_BYTES_UPLOADED  (PIPE_QUERY_DRIVER_SPECIFIC + 6)
+#define SVGA_QUERY_COMMAND_BUFFER_SIZE (PIPE_QUERY_DRIVER_SPECIFIC + 7)
 
 /* running total counters */
-#define SVGA_QUERY_MEMORY_USED (PIPE_QUERY_DRIVER_SPECIFIC + 7)
-#define SVGA_QUERY_NUM_SHADERS (PIPE_QUERY_DRIVER_SPECIFIC + 8)
-#define SVGA_QUERY_NUM_RESOURCES   (PIPE_QUERY_DRIVER_SPECIFIC + 9)
-#define SVGA_QUERY_NUM_STATE_OBJECTS   (PIPE_QUERY_DRIVER_SPECIFIC + 10)
-#define SVGA_QUERY_NUM_SURFACE_VIEWS   (PIPE_QUERY_DRIVER_SPECIFIC + 11)
-#define SVGA_QUERY_NUM_GENERATE_MIPMAP (PIPE_QUERY_DRIVER_SPECIFIC + 12)
+#define SVGA_QUERY_MEMORY_USED (PIPE_QUERY_DRIVER_SPECIFIC + 8)
+#define SVGA_QUERY_NUM_SHADERS (PIPE_QUERY_DRIVER_SPECIFIC + 9)
+#define SVGA_QUERY_NUM_RESOURCES   (PIPE_QUERY_DRIVER_SPECIFIC + 10)
+#define SVGA_QUERY_NUM_STATE_OBJECTS   (PIPE_QUERY_DRIVER_SPECIFIC + 11)
+#define SVGA_QUERY_NUM_SURFACE_VIEWS   (PIPE_QUERY_DRIVER_SPECIFIC + 12)
+#define SVGA_QUERY_NUM_GENERATE_MIPMAP (PIPE_QUERY_DRIVER_SPECIFIC + 13)
 /*SVGA_QUERY_MAX has to be last because it is size of an array*/
-#define SVGA_QUERY_MAX (PIPE_QUERY_DRIVER_SPECIFIC + 13)
+#define SVGA_QUERY_MAX (PIPE_QUERY_DRIVER_SPECIFIC + 14)
 
 /**
  * Maximum supported number of constant buffers per shader
@@ -502,6 +503,7 @@ struct svga_context
   uint64_t num_validations;  /**< SVGA_QUERY_NUM_VALIDATIONS */
   uint64_t map_buffer_time;  /**< SVGA_QUERY_MAP_BUFFER_TIME */
   uint64_t num_resources_mapped; /**< SVGA_QUERY_NUM_RESOURCES_MAPPED */
+  uint64_t command_buffer_size;  /**< SVGA_QUERY_COMMAND_BUFFER_SIZE */
   uint64_t num_shaders;  /**< SVGA_QUERY_NUM_SHADERS */
   uint64_t num_state_objects;/**< SVGA_QUERY_NUM_STATE_OBJECTS */
   uint64_t num_surface_views;/**< SVGA_QUERY_NUM_SURFACE_VIEWS */
diff --git a/src/gallium/drivers/svga/svga_pipe_query.c 
b/src/gallium/drivers/svga/svga_pipe_query.c
index a67ab1f..08adaed 100644
--- a/src/gallium/drivers/svga/svga_pipe_query.c
+++ b/src/gallium/drivers/svga/svga_pipe_query.c
@@ -727,6 +727,7 @@ svga_create_query(struct pipe_context *pipe,
case SVGA_QUERY_MAP_BUFFER_TIME:
case SVGA_QUERY_NUM_RESOURCES_MAPPED:
case SVGA_QUERY_NUM_BYTES_UPLOADED:
+   case SVGA_QUERY_COMMAND_BUFFER_SIZE:
case SVGA_QUERY_MEMORY_USED:
case SVGA_QUERY_NUM_SHADERS:
case SVGA_QUERY_NUM_RESOURCES:
@@ -796,6 +797,7 @@ svga_destroy_query(struct pipe_context *pipe, struct 
pipe_query *q)
case SVGA_QUERY_MAP_BUFFER_TIME:
case SVGA_QUERY_NUM_RESOURCES_MAPPED:
case SVGA_QUERY_NUM_BYTES_UPLOADED:
+   case SVGA_QUERY_COMMAND_BUFFER_SIZE:
case SVGA_QUERY_MEMORY_USED:
case SVGA_QUERY_NUM_SHADERS:
case SVGA_QUERY_NUM_RESOURCES:
@@ -884,6 +886,9 @@ svga_begin_query(struct pipe_context *pipe, struct 
pipe_query *q)
case SVGA_QUERY_NUM_BYTES_UPLOADED:
   sq->begin_count = svga->hud.num_bytes_uploaded;
   break;
+   case SVGA_QUERY_COMMAND_BUFFER_SIZE:
+  sq->begin_count = svga->hud.command_buffer_size;
+  break;
case SVGA_QUERY_MEMORY_USED:
case SVGA_QUERY_NUM_SHADERS:
case SVGA_QUERY_NUM_RESOURCES:
@@ -978,6 +983,9 @@ svga_end_query(struct pipe_context *pipe, struct pipe_query 
*q)
case SVGA_QUERY_NUM_BYTES_UPLOADED:

Mesa (master): winsys/svga: Fix an uninitialized return value

2016-03-04 Thread Thomas Hellstrom 
Module: Mesa
Branch: master
Commit: 24ad7e16cd0fb67c8646e8860cfb382a260a9126
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=24ad7e16cd0fb67c8646e8860cfb382a260a9126

Author: Thomas Hellstrom 
Date:   Thu Feb 25 11:02:02 2016 +0100

winsys/svga: Fix an uninitialized return value

Reported-by: Brian Paul 
Signed-off-by: Thomas Hellstrom 
Reviwed-by: Brian Paul 
Cc: "11.0 11.1" 

---

 src/gallium/winsys/svga/drm/vmw_surface.c | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/src/gallium/winsys/svga/drm/vmw_surface.c 
b/src/gallium/winsys/svga/drm/vmw_surface.c
index 6c0ad3b..a438b1a 100644
--- a/src/gallium/winsys/svga/drm/vmw_surface.c
+++ b/src/gallium/winsys/svga/drm/vmw_surface.c
@@ -170,6 +170,8 @@ vmw_svga_winsys_surface_unmap(struct svga_winsys_context 
*swc,
   *rebind = vsrf->rebind;
   vsrf->rebind = FALSE;
   vmw_svga_winsys_buffer_unmap(>screen->base, vsrf->buf);
+   } else {
+  *rebind = FALSE;
}
pipe_mutex_unlock(vsrf->mutex);
 }

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Mesa (master): winsys/svga: Increase the fence timeout

2016-03-04 Thread Thomas Hellstrom 
Module: Mesa
Branch: master
Commit: 395c7b8fa17069fe996a63a8bca2bfd0fe3f16a0
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=395c7b8fa17069fe996a63a8bca2bfd0fe3f16a0

Author: Thomas Hellstrom 
Date:   Thu Feb 25 11:02:03 2016 +0100

winsys/svga: Increase the fence timeout

If running with a software renderer backend, the timeout may be
insufficient, and we don't want to release busy buffers too early.

In practice, SVGA gpu lockups are extremely rare.

Signed-off-by: Thomas Hellstrom 
Reviewed-by: Brian Paul 
Cc: "11.0 11.1" 

---

 src/gallium/winsys/svga/drm/vmw_screen_ioctl.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/src/gallium/winsys/svga/drm/vmw_screen_ioctl.c 
b/src/gallium/winsys/svga/drm/vmw_screen_ioctl.c
index c86d95a..7fc93e7 100644
--- a/src/gallium/winsys/svga/drm/vmw_screen_ioctl.c
+++ b/src/gallium/winsys/svga/drm/vmw_screen_ioctl.c
@@ -52,6 +52,7 @@
 #include 
 
 #define VMW_MAX_DEFAULT_TEXTURE_SIZE   (128 * 1024 * 1024)
+#define VMW_FENCE_TIMEOUT_SECONDS 60
 
 struct vmw_region
 {
@@ -721,7 +722,7 @@ vmw_ioctl_fence_finish(struct vmw_winsys_screen *vws,
memset(, 0, sizeof(arg));
 
arg.handle = handle;
-   arg.timeout_us = 10*100;
+   arg.timeout_us = VMW_FENCE_TIMEOUT_SECONDS*100;
arg.lazy = 0;
arg.flags = vflags;
 

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