Mesa (master): tgsi: Fix return of uninitialized memory in tgsi_*_instruction_memory

[Ilia Mirkin]

Module: Mesa
Branch: master
Commit: b72156c8e0fe9dd2c4d9614f3f7d1e8bdea0e4dd
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=b72156c8e0fe9dd2c4d9614f3f7d1e8bdea0e4dd

Author: Hans de Goede 
Date:   Wed Mar 16 09:46:05 2016 +0100

tgsi: Fix return of uninitialized memory in tgsi_*_instruction_memory

tgsi_default_instruction_memory / tgsi_build_instruction_memory were
returning uninitialized memory for tgsi_instruction_memory.Texture and
tgsi_instruction_memory.Format. Note 0 means not set, and thus is a
correct default initializer for these.

Fixes: 3243b6fc97 ("tgsi: add Texture and Format to tgsi_instruction_memory")
Cc: Nicolai Hähnle 
Signed-off-by: Hans de Goede 
Reviewed-by: Marek Olšák 
Reviewed-by: Nicolai Hähnle 

---

 src/gallium/auxiliary/tgsi/tgsi_build.c | 4 
 1 file changed, 4 insertions(+)

diff --git a/src/gallium/auxiliary/tgsi/tgsi_build.c 
b/src/gallium/auxiliary/tgsi/tgsi_build.c
index e5355f5..638730a 100644
--- a/src/gallium/auxiliary/tgsi/tgsi_build.c
+++ b/src/gallium/auxiliary/tgsi/tgsi_build.c
@@ -775,6 +775,8 @@ tgsi_default_instruction_memory( void )
struct tgsi_instruction_memory instruction_memory;
 
instruction_memory.Qualifier = 0;
+   instruction_memory.Texture = 0;
+   instruction_memory.Format = 0;
instruction_memory.Padding = 0;
 
return instruction_memory;
@@ -790,6 +792,8 @@ tgsi_build_instruction_memory(
struct tgsi_instruction_memory instruction_memory;
 
instruction_memory.Qualifier = qualifier;
+   instruction_memory.Texture = 0;
+   instruction_memory.Format = 0;
instruction_memory.Padding = 0;
instruction->Memory = 1;
 

___
mesa-commit mailing list
mesa-commit@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/mesa-commit

Mesa (master): st/mesa: report correct precision information for low/ medium/high ints

[Ilia Mirkin]

Module: Mesa
Branch: master
Commit: bbbdcdcf75f05f97ea346fd6d84ecc3d8ec61d24
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=bbbdcdcf75f05f97ea346fd6d84ecc3d8ec61d24

Author: Ilia Mirkin 
Date:   Sat Mar 19 23:27:56 2016 -0400

st/mesa: report correct precision information for low/medium/high ints

When we have native integers, these have full precision. Whether they're
low/medium/high isn't piped through the TGSI yet, but eventually those
might have differing precisions. For now they're just 32-bit ints.

Fixes the following dEQP tests:

  dEQP-GLES3.functional.state_query.shader.precision_vertex_highp_int
  dEQP-GLES3.functional.state_query.shader.precision_fragment_highp_int

which expected highp ints to have full 32-bit precision, not the default
23-bit float precision.

Signed-off-by: Ilia Mirkin 
Reviewed-by: Dave Airlie 

---

 src/mesa/state_tracker/st_extensions.c | 7 +++
 1 file changed, 7 insertions(+)

diff --git a/src/mesa/state_tracker/st_extensions.c 
b/src/mesa/state_tracker/st_extensions.c
index 3666ece..988e904 100644
--- a/src/mesa/state_tracker/st_extensions.c
+++ b/src/mesa/state_tracker/st_extensions.c
@@ -253,6 +253,13 @@ void st_init_limits(struct pipe_screen *screen,
   pc->MaxLocalParams = MIN2(pc->MaxParameters, MAX_PROGRAM_LOCAL_PARAMS);
   pc->MaxEnvParams = MIN2(pc->MaxParameters, MAX_PROGRAM_ENV_PARAMS);
 
+  if (screen->get_shader_param(screen, sh, PIPE_SHADER_CAP_INTEGERS)) {
+ pc->LowInt.RangeMin = 31;
+ pc->LowInt.RangeMax = 30;
+ pc->LowInt.Precision = 0;
+ pc->MediumInt = pc->HighInt = pc->LowInt;
+  }
+
   options->EmitNoNoise = TRUE;
 
   /* TODO: make these more fine-grained if anyone needs it */

___
mesa-commit mailing list
mesa-commit@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/mesa-commit

Mesa (master): st/omx: Remove trailing spaces

[Leo Liu]

Module: Mesa
Branch: master
Commit: 46de6bbb775602ab237d0054e5351b0fc90d942b
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=46de6bbb775602ab237d0054e5351b0fc90d942b

Author: Nishanth Peethambaran 
Date:   Tue Mar 15 01:56:18 2016 -0400

st/omx: Remove trailing spaces

Reviewed-by: Christian König 
Signed-off-by: Nishanth Peethambaran 
Cc: "11.1 11.2" 

---

 src/gallium/state_trackers/omx/vid_dec.c  | 10 +++---
 src/gallium/state_trackers/omx/vid_dec_h264.c |  8 ++---
 src/gallium/state_trackers/omx/vid_enc.c  | 44 +--
 3 files changed, 31 insertions(+), 31 deletions(-)

diff --git a/src/gallium/state_trackers/omx/vid_dec.c 
b/src/gallium/state_trackers/omx/vid_dec.c
index 5584348..9fcf20e 100644
--- a/src/gallium/state_trackers/omx/vid_dec.c
+++ b/src/gallium/state_trackers/omx/vid_dec.c
@@ -140,7 +140,7 @@ static OMX_ERRORTYPE vid_dec_Constructor(OMX_COMPONENTTYPE 
*comp, OMX_STRING nam
 
r = omx_base_filter_Constructor(comp, name);
if (r)
-   return r;
+  return r;
 
priv->profile = PIPE_VIDEO_PROFILE_UNKNOWN;
 
@@ -268,7 +268,7 @@ static OMX_ERRORTYPE vid_dec_SetParameter(OMX_HANDLETYPE 
handle, OMX_INDEXTYPE i
   r = checkHeader(param, sizeof(OMX_PARAM_COMPONENTROLETYPE));
   if (r)
  return r;
- 
+
   if (!strcmp((char *)role->cRole, OMX_VID_DEC_MPEG2_ROLE)) {
  priv->profile = PIPE_VIDEO_PROFILE_MPEG2_MAIN;
   } else if (!strcmp((char *)role->cRole, OMX_VID_DEC_AVC_ROLE)) {
@@ -321,7 +321,7 @@ static OMX_ERRORTYPE vid_dec_GetParameter(OMX_HANDLETYPE 
handle, OMX_INDEXTYPE i
  strcpy((char *)role->cRole, OMX_VID_DEC_MPEG2_ROLE);
   else if (priv->profile == PIPE_VIDEO_PROFILE_MPEG4_AVC_HIGH)
  strcpy((char *)role->cRole, OMX_VID_DEC_AVC_ROLE);
- 
+
   break;
}
 
@@ -474,7 +474,7 @@ static OMX_ERRORTYPE vid_dec_DecodeBuffer(omx_base_PortType 
*port, OMX_BUFFERHEA
   if (r)
  return r;
}
- 
+
return OMX_ErrorNone;
 }
 
@@ -513,7 +513,7 @@ static void vid_dec_FillOutput(vid_dec_PrivateType *priv, 
struct pipe_video_buff
 
box.width = def->nFrameWidth / 2;
box.height = def->nFrameHeight / 2;
- 
+
src = priv->pipe->transfer_map(priv->pipe, views[1]->texture, 0,
   PIPE_TRANSFER_READ, , );
util_copy_rect(dst, views[1]->texture->format, def->nStride, 0, 0,
diff --git a/src/gallium/state_trackers/omx/vid_dec_h264.c 
b/src/gallium/state_trackers/omx/vid_dec_h264.c
index b453682..75f27d2 100644
--- a/src/gallium/state_trackers/omx/vid_dec_h264.c
+++ b/src/gallium/state_trackers/omx/vid_dec_h264.c
@@ -91,7 +91,7 @@ void vid_dec_h264_Init(vid_dec_PrivateType *priv)
priv->Decode = vid_dec_h264_Decode;
priv->EndFrame = vid_dec_h264_EndFrame;
priv->Flush = vid_dec_h264_Flush;
-   
+
LIST_INITHEAD(>codec_data.h264.dpb_list);
priv->picture.h264.field_order_cnt[0] = 
priv->picture.h264.field_order_cnt[1] = INT_MAX;
 }
@@ -829,7 +829,7 @@ static void slice_header(vid_dec_PrivateType *priv, struct 
vl_rbsp *rbsp,
  priv->picture.h264.field_order_cnt[0] = expectedPicOrderCnt + 
priv->codec_data.h264.delta_pic_order_cnt[0];
  priv->picture.h264.field_order_cnt[1] = 
priv->picture.h264.field_order_cnt[0] +
 sps->offset_for_top_to_bottom_field + 
priv->codec_data.h264.delta_pic_order_cnt[1];
- 
+
   } else if (!priv->picture.h264.bottom_field_flag)
  priv->picture.h264.field_order_cnt[0] = expectedPicOrderCnt + 
priv->codec_data.h264.delta_pic_order_cnt[0];
   else
@@ -859,7 +859,7 @@ static void slice_header(vid_dec_PrivateType *priv, struct 
vl_rbsp *rbsp,
   if (!priv->picture.h264.field_pic_flag) {
  priv->picture.h264.field_order_cnt[0] = tempPicOrderCnt;
  priv->picture.h264.field_order_cnt[1] = tempPicOrderCnt;
- 
+
   } else if (!priv->picture.h264.bottom_field_flag)
  priv->picture.h264.field_order_cnt[0] = tempPicOrderCnt;
   else
@@ -876,7 +876,7 @@ static void slice_header(vid_dec_PrivateType *priv, struct 
vl_rbsp *rbsp,
 
priv->picture.h264.num_ref_idx_l0_active_minus1 = 
pps->num_ref_idx_l0_default_active_minus1;
priv->picture.h264.num_ref_idx_l1_active_minus1 = 
pps->num_ref_idx_l1_default_active_minus1;
- 
+
if (slice_type == PIPE_H264_SLICE_TYPE_P ||
slice_type == PIPE_H264_SLICE_TYPE_SP ||
slice_type == PIPE_H264_SLICE_TYPE_B) {
diff --git a/src/gallium/state_trackers/omx/vid_enc.c 
b/src/gallium/state_trackers/omx/vid_enc.c
index df22a97..4505fe1 100644
--- a/src/gallium/state_trackers/omx/vid_enc.c
+++ b/src/gallium/state_trackers/omx/vid_enc.c
@@ -179,7 +179,7 @@ static OMX_ERRORTYPE vid_enc_Constructor(OMX_COMPONENTTYPE 
*comp, OMX_STRING nam
if (!screen->get_video_param(screen, PIPE_VIDEO_PROFILE_MPEG4_AVC_HIGH,
 

Mesa (master): st/omx/dec: Correct the timestamping

[Leo Liu]

Module: Mesa
Branch: master
Commit: eeb117a09d6c0eb2b4fa94d55e8015c8aa982727
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=eeb117a09d6c0eb2b4fa94d55e8015c8aa982727

Author: Nishanth Peethambaran 
Date:   Fri Mar 11 01:23:00 2016 -0500

st/omx/dec: Correct the timestamping

Attach the timestamp to the dpb buffer and use that timestamp
while pushing buffer from dpb list to the omx client.

Reviewed-by: Christian König 
Signed-off-by: Nishanth Peethambaran 
Cc: "11.1 11.2" 

---

 src/gallium/state_trackers/omx/vid_dec.c| 11 +--
 src/gallium/state_trackers/omx/vid_dec.h|  7 ++-
 src/gallium/state_trackers/omx/vid_dec_h264.c   | 18 +++---
 src/gallium/state_trackers/omx/vid_dec_mpeg12.c |  6 --
 4 files changed, 34 insertions(+), 8 deletions(-)

diff --git a/src/gallium/state_trackers/omx/vid_dec.c 
b/src/gallium/state_trackers/omx/vid_dec.c
index 9fcf20e..108a460 100644
--- a/src/gallium/state_trackers/omx/vid_dec.c
+++ b/src/gallium/state_trackers/omx/vid_dec.c
@@ -419,6 +419,7 @@ static OMX_ERRORTYPE vid_dec_DecodeBuffer(omx_base_PortType 
*port, OMX_BUFFERHEA
priv->in_buffers[i] = buf;
priv->sizes[i] = buf->nFilledLen;
priv->inputs[i] = buf->pBuffer;
+   priv->timestamps[i] = buf->nTimeStamp;
 
while (priv->num_in_buffers > (!!(buf->nFlags & OMX_BUFFERFLAG_EOS) ? 0 : 
1)) {
   bool eos = !!(priv->in_buffers[0]->nFlags & OMX_BUFFERFLAG_EOS);
@@ -469,6 +470,7 @@ static OMX_ERRORTYPE vid_dec_DecodeBuffer(omx_base_PortType 
*port, OMX_BUFFERHEA
  priv->in_buffers[0] = priv->in_buffers[1];
  priv->sizes[0] = priv->sizes[1] - delta;
  priv->inputs[0] = priv->inputs[1] + delta;
+ priv->timestamps[0] = priv->timestamps[1];
   }
 
   if (r)
@@ -526,9 +528,13 @@ static void vid_dec_FrameDecoded(OMX_COMPONENTTYPE *comp, 
OMX_BUFFERHEADERTYPE*
 {
vid_dec_PrivateType *priv = comp->pComponentPrivate;
bool eos = !!(input->nFlags & OMX_BUFFERFLAG_EOS);
+   OMX_TICKS timestamp;
 
-   if (!input->pInputPortPrivate)
-  input->pInputPortPrivate = priv->Flush(priv);
+   if (!input->pInputPortPrivate) {
+  input->pInputPortPrivate = priv->Flush(priv, );
+  if (timestamp != OMX_VID_DEC_TIMESTAMP_INVALID)
+ input->nTimeStamp = timestamp;
+   }
 
if (input->pInputPortPrivate) {
   if (output->pInputPortPrivate) {
@@ -539,6 +545,7 @@ static void vid_dec_FrameDecoded(OMX_COMPONENTTYPE *comp, 
OMX_BUFFERHEADERTYPE*
  vid_dec_FillOutput(priv, input->pInputPortPrivate, output);
   }
   output->nFilledLen = output->nAllocLen;
+  output->nTimeStamp = input->nTimeStamp;
}
 
if (eos && input->pInputPortPrivate)
diff --git a/src/gallium/state_trackers/omx/vid_dec.h 
b/src/gallium/state_trackers/omx/vid_dec.h
index 3b39826..649d745 100644
--- a/src/gallium/state_trackers/omx/vid_dec.h
+++ b/src/gallium/state_trackers/omx/vid_dec.h
@@ -59,6 +59,8 @@
 #define OMX_VID_DEC_AVC_NAME "OMX.mesa.video_decoder.avc"
 #define OMX_VID_DEC_AVC_ROLE "video_decoder.avc"
 
+#define OMX_VID_DEC_TIMESTAMP_INVALID ((OMX_TICKS) -1)
+
 struct vl_vlc;
 
 DERIVEDCLASS(vid_dec_PrivateType, omx_base_filter_PrivateType)
@@ -69,7 +71,7 @@ DERIVEDCLASS(vid_dec_PrivateType, omx_base_filter_PrivateType)
struct pipe_video_codec *codec; \
void (*Decode)(vid_dec_PrivateType *priv, struct vl_vlc *vlc, unsigned 
min_bits_left); \
void (*EndFrame)(vid_dec_PrivateType *priv); \
-   struct pipe_video_buffer *(*Flush)(vid_dec_PrivateType *priv); \
+   struct pipe_video_buffer *(*Flush)(vid_dec_PrivateType *priv, OMX_TICKS 
*timestamp); \
struct pipe_video_buffer *target, *shadow; \
union { \
   struct { \
@@ -100,6 +102,9 @@ DERIVEDCLASS(vid_dec_PrivateType, 
omx_base_filter_PrivateType)
OMX_BUFFERHEADERTYPE *in_buffers[2]; \
const void *inputs[2]; \
unsigned sizes[2]; \
+   OMX_TICKS timestamps[2]; \
+   OMX_TICKS timestamp; \
+   bool first_buf_in_frame; \
bool frame_finished; \
bool frame_started; \
unsigned bytes_left; \
diff --git a/src/gallium/state_trackers/omx/vid_dec_h264.c 
b/src/gallium/state_trackers/omx/vid_dec_h264.c
index 75f27d2..9aab6d1 100644
--- a/src/gallium/state_trackers/omx/vid_dec_h264.c
+++ b/src/gallium/state_trackers/omx/vid_dec_h264.c
@@ -45,6 +45,7 @@
 struct dpb_list {
struct list_head list;
struct pipe_video_buffer *buffer;
+   OMX_TICKS timestamp;
unsigned poc;
 };
 
@@ -82,7 +83,7 @@ static const uint8_t Default_8x8_Inter[64] = {
 
 static void vid_dec_h264_Decode(vid_dec_PrivateType *priv, struct vl_vlc *vlc, 
unsigned min_bits_left);
 static void vid_dec_h264_EndFrame(vid_dec_PrivateType *priv);
-static struct pipe_video_buffer *vid_dec_h264_Flush(vid_dec_PrivateType *priv);
+static struct pipe_video_buffer *vid_dec_h264_Flush(vid_dec_PrivateType *priv, 
OMX_TICKS *timestamp);
 
 void 

Mesa (master): st/mesa: only minify depth for 3d targets

[Ilia Mirkin]

Module: Mesa
Branch: master
Commit: adb40a739943d62508b9c79cbd85e3c67ee3b43b
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=adb40a739943d62508b9c79cbd85e3c67ee3b43b

Author: Ilia Mirkin 
Date:   Sat Mar 19 21:25:36 2016 -0400

st/mesa: only minify depth for 3d targets

We make sure that that image depth matches the level's depth before
copying it into place. However we should only be minifying the first
level's depth for 3d textures - array textures have the same depth for
all levels.

This fixes tests such as
dEQP-GLES3.functional.texture.specification.texsubimage3d_depth.* and I
suspect account for a number of other odd situations I've run into where
level > 0 of array textures was messed up.

Signed-off-by: Ilia Mirkin 
Reviewed-by: Dave Airlie 
Cc: "11.1 11.2" 

---

 src/mesa/state_tracker/st_cb_texture.c | 5 -
 1 file changed, 4 insertions(+), 1 deletion(-)

diff --git a/src/mesa/state_tracker/st_cb_texture.c 
b/src/mesa/state_tracker/st_cb_texture.c
index bffa4d0..460c179 100644
--- a/src/mesa/state_tracker/st_cb_texture.c
+++ b/src/mesa/state_tracker/st_cb_texture.c
@@ -2886,10 +2886,13 @@ st_finalize_texture(struct gl_context *ctx,
  /* Need to import images in main memory or held in other textures.
   */
  if (stImage && stObj->pt != stImage->pt) {
+GLuint depth = stObj->depth0;
+if (stObj->base.Target == GL_TEXTURE_3D)
+   depth = u_minify(depth, level);
 if (level == 0 ||
 (stImage->base.Width == u_minify(stObj->width0, level) &&
  stImage->base.Height == u_minify(stObj->height0, level) &&
- stImage->base.Depth == u_minify(stObj->depth0, level))) {
+ stImage->base.Depth == depth)) {
/* src image fits expected dest mipmap level size */
copy_image_data_to_texture(st, stObj, level, stImage);
 }

___
mesa-commit mailing list
mesa-commit@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/mesa-commit

Mesa (master): nv50/ir: normalize cube coordinates after derivatives have been computed

[Ilia Mirkin]

Module: Mesa
Branch: master
Commit: 6eeb284e4f74a2fe5ae6cba90f97f219935e24df
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=6eeb284e4f74a2fe5ae6cba90f97f219935e24df

Author: Ilia Mirkin 
Date:   Sat Mar 19 11:58:25 2016 -0400

nv50/ir: normalize cube coordinates after derivatives have been computed

In "manual" derivative mode (always used on nv50 and sometimes on nvc0
but always for cube), the idea is that using the quadop instruction, we
set up the "other" quads to have values such that the derivatives work
out, and then run the texture instruction as if nothing were strange. It
pulls values from the other lanes, and does its magic.

However cube coordinates have to be normalized - one of the 3 coords has
to be 1, to determine which is the major axis, to say which face is
being sampled. We were normalizing the coordinates first, and then
adding the derivatives. This is wrong for two reasons:

- the coordinates got normalized by a scaling factor but the
  derivatives didn't
- the result of the addition didn't end up normalized

To resolve this, we flip the logic around to normalize *after* the
per-lane coordinates are set up.

This fixes a bunch of textureGrad cube dEQP tests.

NOTE: nv50 cube arrays with explicit derivatives are still broken, to be
resolved at a later date.

Signed-off-by: Ilia Mirkin 
Cc: "11.1 11.2" 

---

 .../drivers/nouveau/codegen/nv50_ir_from_tgsi.cpp  | 12 
 .../nouveau/codegen/nv50_ir_lowering_gm107.cpp | 18 ++-
 .../nouveau/codegen/nv50_ir_lowering_nv50.cpp  | 34 -
 .../nouveau/codegen/nv50_ir_lowering_nvc0.cpp  | 35 +-
 4 files changed, 84 insertions(+), 15 deletions(-)

diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_from_tgsi.cpp 
b/src/gallium/drivers/nouveau/codegen/nv50_ir_from_tgsi.cpp
index 4bebfdc..39cd986 100644
--- a/src/gallium/drivers/nouveau/codegen/nv50_ir_from_tgsi.cpp
+++ b/src/gallium/drivers/nouveau/codegen/nv50_ir_from_tgsi.cpp
@@ -1989,7 +1989,6 @@ Converter::loadProjTexCoords(Value *dst[4], Value 
*src[4], unsigned int mask)
 void
 Converter::handleTEX(Value *dst[4], int R, int S, int L, int C, int Dx, int Dy)
 {
-   Value *val;
Value *arg[4], *src[8];
Value *lod = NULL, *shd = NULL;
unsigned int s, c, d;
@@ -2032,17 +2031,6 @@ Converter::handleTEX(Value *dst[4], int R, int S, int L, 
int C, int Dx, int Dy)
  shd = src[n - 1];
}
 
-   if (tgt.isCube()) {
-  for (c = 0; c < 3; ++c)
- src[c] = mkOp1v(OP_ABS, TYPE_F32, getSSA(), arg[c]);
-  val = getScratch();
-  mkOp2(OP_MAX, TYPE_F32, val, src[0], src[1]);
-  mkOp2(OP_MAX, TYPE_F32, val, src[2], val);
-  mkOp1(OP_RCP, TYPE_F32, val, val);
-  for (c = 0; c < 3; ++c)
- src[c] = mkOp2v(OP_MUL, TYPE_F32, getSSA(), arg[c], val);
-   }
-
for (c = 0, d = 0; c < 4; ++c) {
   if (dst[c]) {
  texi->setDef(d++, dst[c]);
diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_gm107.cpp 
b/src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_gm107.cpp
index 0b90378..a5deaef 100644
--- a/src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_gm107.cpp
+++ b/src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_gm107.cpp
@@ -67,6 +67,7 @@ GM107LoweringPass::handleManualTXD(TexInstruction *i)
tmp = bld.getScratch();
 
for (l = 0; l < 4; ++l) {
+  Value *src[3], *val;
   // mov coordinates from lane l to all lanes
   bld.mkOp(OP_QUADON, TYPE_NONE, NULL);
   for (c = 0; c < dim; ++c) {
@@ -92,10 +93,25 @@ GM107LoweringPass::handleManualTXD(TexInstruction *i)
  add->lanes = 1; /* abused for .ndv */
   }
 
+  // normalize cube coordinates if necessary
+  if (i->tex.target.isCube()) {
+ for (c = 0; c < 3; ++c)
+src[c] = bld.mkOp1v(OP_ABS, TYPE_F32, bld.getSSA(), crd[c]);
+ val = bld.getScratch();
+ bld.mkOp2(OP_MAX, TYPE_F32, val, src[0], src[1]);
+ bld.mkOp2(OP_MAX, TYPE_F32, val, src[2], val);
+ bld.mkOp1(OP_RCP, TYPE_F32, val, val);
+ for (c = 0; c < 3; ++c)
+src[c] = bld.mkOp2v(OP_MUL, TYPE_F32, bld.getSSA(), crd[c], val);
+  } else {
+ for (c = 0; c < dim; ++c)
+src[c] = crd[c];
+  }
+
   // texture
   bld.insert(tex = cloneForward(func, i));
   for (c = 0; c < dim; ++c)
- tex->setSrc(c + array, crd[c]);
+ tex->setSrc(c + array, src[c]);
   bld.mkOp(OP_QUADPOP, TYPE_NONE, NULL);
 
   // save results
diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_nv50.cpp 
b/src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_nv50.cpp
index 6987503..02c4f1a 100644
--- a/src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_nv50.cpp
+++ b/src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_nv50.cpp
@@ -724,6 +724,23 @@ NV50LoweringPreSSA::handleTEX(TexInstruction *i)
const int dref = arg;
   

Mesa (master): nv50/ir: fix indirect texturing for non-array textures on nvc0

[Ilia Mirkin]

Module: Mesa
Branch: master
Commit: 7d98bfedd73d632041d27ff12ccf7c7be74a2ddd
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=7d98bfedd73d632041d27ff12ccf7c7be74a2ddd

Author: Ilia Mirkin 
Date:   Sun Mar 20 13:43:43 2016 -0400

nv50/ir: fix indirect texturing for non-array textures on nvc0

If a layer parameter is provided, we want to flip it to position 0 (and
combine it with any indirect params). However if the target is not an
array, there is no layer, so we have to shift all of the arguments down
by one to make room for it.

This fixes situations where there were non-coordinate parameters, such
as bias, lod, depth compare, explicit derivatives. Instead of adding a
new parameter at the front for the indirect reference, we would swap one
of those in its place.

Fixes 
dEQP-GLES31.functional.shaders.opaque_type_indexing.sampler.uniform.compute.*shadow

Signed-off-by: Ilia Mirkin 
Reported-by: Samuel Pitoiset 
Tested-by: Samuel Pitoiset 
Cc: "11.1 11.2" 

---

 src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_nvc0.cpp | 10 +++---
 1 file changed, 7 insertions(+), 3 deletions(-)

diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_nvc0.cpp 
b/src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_nvc0.cpp
index 8e3529f..e8f8e30 100644
--- a/src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_nvc0.cpp
+++ b/src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_nvc0.cpp
@@ -746,9 +746,13 @@ NVC0LoweringPass::handleTEX(TexInstruction *i)
   }
 
   Value *arrayIndex = i->tex.target.isArray() ? i->getSrc(lyr) : NULL;
-  for (int s = dim; s >= 1; --s)
- i->setSrc(s, i->getSrc(s - 1));
-  i->setSrc(0, arrayIndex);
+  if (arrayIndex) {
+ for (int s = dim; s >= 1; --s)
+i->setSrc(s, i->getSrc(s - 1));
+ i->setSrc(0, arrayIndex);
+  } else {
+ i->moveSources(0, 1);
+  }
 
   if (arrayIndex) {
  int sat = (i->op == OP_TXF) ? 1 : 0;

___
mesa-commit mailing list
mesa-commit@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/mesa-commit

Mesa (master): nir/types: add a function to get the bitsize of a base type

[Samuel Iglesias Gonsálvez]

Module: Mesa
Branch: master
Commit: 3d37de930d04da1d067b40593b55fc248eaf7b3b
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=3d37de930d04da1d067b40593b55fc248eaf7b3b

Author: Connor Abbott 
Date:   Fri Aug 14 10:36:15 2015 -0700

nir/types: add a function to get the bitsize of a base type

v2: fix it for GLSL_TYPE_SUBROUTINE (Iago)

Signed-off-by: Iago Toral Quiroga 
Reviewed-by: Jason Ekstrand 
Reviewed-by: Samuel Iglesias Gonsálvez 
Reviewed-by: Iago Toral Quiroga 

---

 src/compiler/nir_types.h | 21 +
 1 file changed, 21 insertions(+)

diff --git a/src/compiler/nir_types.h b/src/compiler/nir_types.h
index 18d64b7..0748783 100644
--- a/src/compiler/nir_types.h
+++ b/src/compiler/nir_types.h
@@ -77,6 +77,27 @@ enum glsl_base_type glsl_get_sampler_result_type(const 
struct glsl_type *type);
 unsigned glsl_get_record_location_offset(const struct glsl_type *type,
  unsigned length);
 
+static inline unsigned
+glsl_get_bit_size(enum glsl_base_type type)
+{
+   switch (type) {
+   case GLSL_TYPE_INT:
+   case GLSL_TYPE_UINT:
+   case GLSL_TYPE_BOOL:
+   case GLSL_TYPE_FLOAT: /* TODO handle mediump */
+   case GLSL_TYPE_SUBROUTINE:
+  return 32;
+
+   case GLSL_TYPE_DOUBLE:
+  return 64;
+
+   default:
+  unreachable("unknown base type");
+   }
+
+   return 0;
+}
+
 bool glsl_type_is_void(const struct glsl_type *type);
 bool glsl_type_is_error(const struct glsl_type *type);
 bool glsl_type_is_vector(const struct glsl_type *type);

___
mesa-commit mailing list
mesa-commit@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/mesa-commit

Mesa (master): nv50: rename 3d dirty flags to NV50_NEW_3D_XXX

[Samuel Pitoiset]

Module: Mesa
Branch: master
Commit: 9374fc1e67f524a27fa3f2eb8821be1af5ea9895
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=9374fc1e67f524a27fa3f2eb8821be1af5ea9895

Author: Samuel Pitoiset 
Date:   Tue Mar 15 14:24:49 2016 +0100

nv50: rename 3d dirty flags to NV50_NEW_3D_XXX

Signed-off-by: Samuel Pitoiset 
Reviewed-by: Pierre Moreau 
Tested-by: Pierre Moreau 

---

 src/gallium/drivers/nouveau/nv50/nv50_compute.c|  2 +-
 src/gallium/drivers/nouveau/nv50/nv50_context.c| 10 +--
 src/gallium/drivers/nouveau/nv50/nv50_context.h| 44 +--
 .../drivers/nouveau/nv50/nv50_shader_state.c   | 10 +--
 src/gallium/drivers/nouveau/nv50/nv50_state.c  | 42 +-
 .../drivers/nouveau/nv50/nv50_state_validate.c | 90 +++---
 src/gallium/drivers/nouveau/nv50/nv50_surface.c| 22 +++---
 src/gallium/drivers/nouveau/nv50/nv50_vbo.c|  4 +-
 8 files changed, 112 insertions(+), 112 deletions(-)

diff --git a/src/gallium/drivers/nouveau/nv50/nv50_compute.c 
b/src/gallium/drivers/nouveau/nv50/nv50_compute.c
index ac411ee..da448c4 100644
--- a/src/gallium/drivers/nouveau/nv50/nv50_compute.c
+++ b/src/gallium/drivers/nouveau/nv50/nv50_compute.c
@@ -314,5 +314,5 @@ nv50_launch_grid(struct pipe_context *pipe, const struct 
pipe_grid_info *info)
PUSH_DATA (push, 0);
 
/* bind a compute shader clobbers fragment shader state */
-   nv50->dirty_3d |= NV50_NEW_FRAGPROG;
+   nv50->dirty_3d |= NV50_NEW_3D_FRAGPROG;
 }
diff --git a/src/gallium/drivers/nouveau/nv50/nv50_context.c 
b/src/gallium/drivers/nouveau/nv50/nv50_context.c
index 08981f5..18e2ab0 100644
--- a/src/gallium/drivers/nouveau/nv50/nv50_context.c
+++ b/src/gallium/drivers/nouveau/nv50/nv50_context.c
@@ -176,7 +176,7 @@ nv50_invalidate_resource_storage(struct nouveau_context 
*ctx,
   for (i = 0; i < nv50->framebuffer.nr_cbufs; ++i) {
  if (nv50->framebuffer.cbufs[i] &&
  nv50->framebuffer.cbufs[i]->texture == res) {
-nv50->dirty_3d |= NV50_NEW_FRAMEBUFFER;
+nv50->dirty_3d |= NV50_NEW_3D_FRAMEBUFFER;
 nouveau_bufctx_reset(nv50->bufctx_3d, NV50_BIND_FB);
 if (!--ref)
return ref;
@@ -186,7 +186,7 @@ nv50_invalidate_resource_storage(struct nouveau_context 
*ctx,
if (bind & PIPE_BIND_DEPTH_STENCIL) {
   if (nv50->framebuffer.zsbuf &&
   nv50->framebuffer.zsbuf->texture == res) {
- nv50->dirty_3d |= NV50_NEW_FRAMEBUFFER;
+ nv50->dirty_3d |= NV50_NEW_3D_FRAMEBUFFER;
  nouveau_bufctx_reset(nv50->bufctx_3d, NV50_BIND_FB);
  if (!--ref)
 return ref;
@@ -202,7 +202,7 @@ nv50_invalidate_resource_storage(struct nouveau_context 
*ctx,
   assert(nv50->num_vtxbufs <= PIPE_MAX_ATTRIBS);
   for (i = 0; i < nv50->num_vtxbufs; ++i) {
  if (nv50->vtxbuf[i].buffer == res) {
-nv50->dirty_3d |= NV50_NEW_ARRAYS;
+nv50->dirty_3d |= NV50_NEW_3D_ARRAYS;
 nouveau_bufctx_reset(nv50->bufctx_3d, NV50_BIND_VERTEX);
 if (!--ref)
return ref;
@@ -222,7 +222,7 @@ nv50_invalidate_resource_storage(struct nouveau_context 
*ctx,
   for (i = 0; i < nv50->num_textures[s]; ++i) {
  if (nv50->textures[s][i] &&
  nv50->textures[s][i]->texture == res) {
-nv50->dirty_3d |= NV50_NEW_TEXTURES;
+nv50->dirty_3d |= NV50_NEW_3D_TEXTURES;
 nouveau_bufctx_reset(nv50->bufctx_3d, NV50_BIND_TEXTURES);
 if (!--ref)
return ref;
@@ -236,7 +236,7 @@ nv50_invalidate_resource_storage(struct nouveau_context 
*ctx,
 continue;
  if (!nv50->constbuf[s][i].user &&
  nv50->constbuf[s][i].u.buf == res) {
-nv50->dirty_3d |= NV50_NEW_CONSTBUF;
+nv50->dirty_3d |= NV50_NEW_3D_CONSTBUF;
 nv50->constbuf_dirty[s] |= 1 << i;
 nouveau_bufctx_reset(nv50->bufctx_3d, NV50_BIND_CB(s, i));
 if (!--ref)
diff --git a/src/gallium/drivers/nouveau/nv50/nv50_context.h 
b/src/gallium/drivers/nouveau/nv50/nv50_context.h
index dc82bdc..89a4da5 100644
--- a/src/gallium/drivers/nouveau/nv50/nv50_context.h
+++ b/src/gallium/drivers/nouveau/nv50/nv50_context.h
@@ -26,28 +26,28 @@
 #include "nv50/nv50_3d.xml.h"
 #include "nv50/nv50_2d.xml.h"
 
-#define NV50_NEW_BLEND(1 << 0)
-#define NV50_NEW_RASTERIZER   (1 << 1)
-#define NV50_NEW_ZSA  (1 << 2)
-#define NV50_NEW_VERTPROG (1 << 3)
-#define NV50_NEW_GMTYPROG (1 << 6)
-#define NV50_NEW_FRAGPROG (1 << 7)
-#define NV50_NEW_BLEND_COLOUR (1 << 8)
-#define NV50_NEW_STENCIL_REF  (1 << 9)
-#define NV50_NEW_CLIP (1 << 10)
-#define NV50_NEW_SAMPLE_MASK  (1 << 11)
-#define NV50_NEW_FRAMEBUFFER  (1 << 12)
-#define NV50_NEW_STIPPLE  (1 << 13)
-#define NV50_NEW_SCISSOR  (1 << 14)
-#define NV50_NEW_VIEWPORT (1 << 

Mesa (vulkan): anv/blit2d: Use texel fetch in frag shader

[Nanley Chery]

Module: Mesa
Branch: vulkan
Commit: f8f98869157b678320ab8b8fcd50ab7285dac0be
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=f8f98869157b678320ab8b8fcd50ab7285dac0be

Author: Nanley Chery 
Date:   Thu Mar 10 16:06:14 2016 -0800

anv/blit2d: Use texel fetch in frag shader

The texelFetch operation requires that the sampled texture coordinates
be unnormalized integers. This will simplify the copy shader for
w-tiled images (stencil buffers).

v2 (Jason):
   Use f2i for texel coords
   Fix num_components indirectly
   Use float inputs for interpolation
   Nest tex_pos functions

Suggested-by: Jason Ekstrand 
Signed-off-by: Nanley Chery 
Reviewed-by: Jason Ekstrand 

---

 src/intel/vulkan/anv_meta_blit2d.c | 43 --
 1 file changed, 18 insertions(+), 25 deletions(-)

diff --git a/src/intel/vulkan/anv_meta_blit2d.c 
b/src/intel/vulkan/anv_meta_blit2d.c
index 78d4b04..839ab02 100644
--- a/src/intel/vulkan/anv_meta_blit2d.c
+++ b/src/intel/vulkan/anv_meta_blit2d.c
@@ -83,11 +83,9 @@ meta_emit_blit2d(struct anv_cmd_buffer *cmd_buffer,
  dest_offset.y + dest_extent.height,
   },
   .tex_coord = {
- (float)(src_offset.x + src_extent.width)
-/ (float)src_iview->extent.width,
- (float)(src_offset.y + src_extent.height)
-/ (float)src_iview->extent.height,
- (float)src_offset.z / (float)src_iview->extent.depth,
+ src_offset.x + src_extent.width,
+ src_offset.y + src_extent.height,
+ src_offset.z,
   },
};
 
@@ -97,10 +95,9 @@ meta_emit_blit2d(struct anv_cmd_buffer *cmd_buffer,
  dest_offset.y + dest_extent.height,
   },
   .tex_coord = {
- (float)src_offset.x / (float)src_iview->extent.width,
- (float)(src_offset.y + src_extent.height) /
-(float)src_iview->extent.height,
- (float)src_offset.z / (float)src_iview->extent.depth,
+ src_offset.x,
+ src_offset.y + src_extent.height,
+ src_offset.z,
   },
};
 
@@ -110,9 +107,9 @@ meta_emit_blit2d(struct anv_cmd_buffer *cmd_buffer,
  dest_offset.y,
   },
   .tex_coord = {
- (float)src_offset.x / (float)src_iview->extent.width,
- (float)src_offset.y / (float)src_iview->extent.height,
- (float)src_offset.z / (float)src_iview->extent.depth,
+ src_offset.x,
+ src_offset.y,
+ src_offset.z,
   },
};
 
@@ -438,22 +435,16 @@ static nir_shader *
 build_nir_copy_fragment_shader(enum glsl_sampler_dim tex_dim)
 {
const struct glsl_type *vec4 = glsl_vec4_type();
+   const struct glsl_type *vec3 = glsl_vector_type(GLSL_TYPE_FLOAT, 3);
nir_builder b;
 
nir_builder_init_simple_shader(, NULL, MESA_SHADER_FRAGMENT, NULL);
-   b.shader->info.name = ralloc_strdup(b.shader, "meta_blit_fs");
+   b.shader->info.name = ralloc_strdup(b.shader, "meta_blit2d_fs");
 
nir_variable *tex_pos_in = nir_variable_create(b.shader, nir_var_shader_in,
-  vec4, "v_tex_pos");
+  vec3, "v_tex_pos");
tex_pos_in->data.location = VARYING_SLOT_VAR0;
-
-   /* Swizzle the array index which comes in as Z coordinate into the right
-* position.
-*/
-   unsigned swz[] = { 0, (tex_dim == GLSL_SAMPLER_DIM_1D ? 2 : 1), 2 };
-   nir_ssa_def *const tex_pos =
-  nir_swizzle(, nir_load_var(, tex_pos_in), swz,
-  (tex_dim == GLSL_SAMPLER_DIM_1D ? 2 : 3), false);
+   nir_ssa_def *const tex_pos = nir_f2i(, nir_load_var(, tex_pos_in));
 
const struct glsl_type *sampler_type =
   glsl_sampler_type(tex_dim, false, tex_dim != GLSL_SAMPLER_DIM_3D,
@@ -463,16 +454,18 @@ build_nir_copy_fragment_shader(enum glsl_sampler_dim 
tex_dim)
sampler->data.descriptor_set = 0;
sampler->data.binding = 0;
 
-   nir_tex_instr *tex = nir_tex_instr_create(b.shader, 1);
+   nir_tex_instr *tex = nir_tex_instr_create(b.shader, 2);
tex->sampler_dim = tex_dim;
-   tex->op = nir_texop_tex;
+   tex->op = nir_texop_txf;
tex->src[0].src_type = nir_tex_src_coord;
tex->src[0].src = nir_src_for_ssa(tex_pos);
+   tex->src[1].src_type = nir_tex_src_lod;
+   tex->src[1].src = nir_src_for_ssa(nir_imm_int(, 0));
tex->dest_type = nir_type_float; /* TODO */
tex->is_array = glsl_sampler_type_is_array(sampler_type);
tex->coord_components = tex_pos->num_components;
tex->texture = nir_deref_var_create(tex, sampler);
-   tex->sampler = nir_deref_var_create(tex, sampler);
+   tex->sampler = NULL;
 
nir_ssa_dest_init(>instr, >dest, 4, "tex");
nir_builder_instr_insert(, >instr);

___
mesa-commit mailing list
mesa-commit@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/mesa-commit

Mesa (master): i965/vec4/gen6: fix exec_size for instructions with width of 4 in generate_gs_svb_write()

[Samuel Iglesias Gonsálvez]

Module: Mesa
Branch: master
Commit: 30fc3fa24d90c1ceda33ba95832e17c67584e2bc
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=30fc3fa24d90c1ceda33ba95832e17c67584e2bc

Author: Samuel Iglesias Gonsalvez 
Date:   Thu Dec  3 18:27:39 2015 +0100

i965/vec4/gen6: fix exec_size for instructions with width of 4 in 
generate_gs_svb_write()

Signed-off-by: Samuel Iglesias Gonsalvez 
Reviewed-by: Topi Pohjolainen 

---

 src/mesa/drivers/dri/i965/brw_vec4_generator.cpp | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/src/mesa/drivers/dri/i965/brw_vec4_generator.cpp 
b/src/mesa/drivers/dri/i965/brw_vec4_generator.cpp
index 549b707..871b49a 100644
--- a/src/mesa/drivers/dri/i965/brw_vec4_generator.cpp
+++ b/src/mesa/drivers/dri/i965/brw_vec4_generator.cpp
@@ -485,10 +485,13 @@ generate_gs_svb_write(struct brw_codegen *p,
bool final_write = inst->sol_final_write;
 
brw_push_insn_state(p);
+   brw_set_default_exec_size(p, BRW_EXECUTE_4);
/* Copy Vertex data into M0.x */
brw_MOV(p, stride(dst, 4, 4, 1),
stride(retype(src0, BRW_REGISTER_TYPE_UD), 4, 4, 1));
+   brw_pop_insn_state(p);
 
+   brw_push_insn_state(p);
/* Send SVB Write */
brw_svb_write(p,
  final_write ? src1 : brw_null_reg(), /* dest == src1 */

___
mesa-commit mailing list
mesa-commit@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/mesa-commit