Mesa (master): i965: Rename intelScreen to screen.

2016-09-20 Thread Kenneth Graunke
Module: Mesa
Branch: master
Commit: 9694b23f66f4c41407289fb7d3ff25321042ef49
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=9694b23f66f4c41407289fb7d3ff25321042ef49

Author: Kenneth Graunke 
Date:   Mon Nov 30 15:47:13 2015 -0800

i965: Rename intelScreen to screen.

"intelScreen" is wordy and also doesn't fit our style guidelines.
"screen" is shorter, which is nice, because we use it fairly often.

Signed-off-by: Kenneth Graunke 
Reviewed-by: Anuj Phogat 

---

 src/mesa/drivers/dri/i965/brw_blorp.c|   2 +-
 src/mesa/drivers/dri/i965/brw_clip.c |   4 +-
 src/mesa/drivers/dri/i965/brw_context.c  |  44 +++---
 src/mesa/drivers/dri/i965/brw_context.h  |   4 +-
 src/mesa/drivers/dri/i965/brw_cs.c   |   6 +-
 src/mesa/drivers/dri/i965/brw_ff_gs.c|   4 +-
 src/mesa/drivers/dri/i965/brw_gs.c   |   8 +-
 src/mesa/drivers/dri/i965/brw_link.cpp   |   4 +-
 src/mesa/drivers/dri/i965/brw_program.c  |  20 +--
 src/mesa/drivers/dri/i965/brw_queryobj.c |   2 +-
 src/mesa/drivers/dri/i965/brw_sf.c   |   4 +-
 src/mesa/drivers/dri/i965/brw_state_dump.c   |   2 +-
 src/mesa/drivers/dri/i965/brw_surface_formats.c  |   2 +-
 src/mesa/drivers/dri/i965/brw_tcs.c  |   2 +-
 src/mesa/drivers/dri/i965/brw_tes.c  |   4 +-
 src/mesa/drivers/dri/i965/brw_vs.c   |   6 +-
 src/mesa/drivers/dri/i965/brw_wm.c   |   4 +-
 src/mesa/drivers/dri/i965/brw_wm_surface_state.c |   8 +-
 src/mesa/drivers/dri/i965/gen7_cs_state.c|   4 +-
 src/mesa/drivers/dri/i965/gen7_l3_state.c|  10 +-
 src/mesa/drivers/dri/i965/gen7_urb.c |   2 +-
 src/mesa/drivers/dri/i965/intel_batchbuffer.c|   6 +-
 src/mesa/drivers/dri/i965/intel_extensions.c |   8 +-
 src/mesa/drivers/dri/i965/intel_fbo.c|   4 +-
 src/mesa/drivers/dri/i965/intel_mipmap_tree.c|   4 +-
 src/mesa/drivers/dri/i965/intel_screen.c | 166 +++
 src/mesa/drivers/dri/i965/intel_tex.c|   4 +-
 src/mesa/drivers/dri/i965/intel_tex_image.c  |   2 +-
 28 files changed, 170 insertions(+), 170 deletions(-)

Diff:   
http://cgit.freedesktop.org/mesa/mesa/diff/?id=9694b23f66f4c41407289fb7d3ff25321042ef49
___
mesa-commit mailing list
mesa-commit@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/mesa-commit


Mesa (master): i965: Rename __DRIScreen pointers to "dri_screen".

2016-09-20 Thread Kenneth Graunke
Module: Mesa
Branch: master
Commit: 8fec9fbb9f78c1cbc539b28cd914fe366fa7e344
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=8fec9fbb9f78c1cbc539b28cd914fe366fa7e344

Author: Kenneth Graunke 
Date:   Mon Nov 30 16:04:08 2015 -0800

i965: Rename __DRIScreen pointers to "dri_screen".

I want to use "screen" as the variable name for a struct intel_screen
pointer.  This means that we can't use it for __DRIscreen pointers.

Sometimes we called it "screen", sometimes "sPriv", sometimes
"driScrnPriv", and sometimes "psp" (Pointer to Screen Private?).
The last one is particularly confusing because we use "psp" to refer to
the Gen4 PIPELINED_STATE_POINTERS packet as well.

Let's be consistent.  "dri_screen" is clear, and it's not used often
enough that I'm worried about the verbosity.

Signed-off-by: Kenneth Graunke 
Reviewed-by: Anuj Phogat 

---

 src/mesa/drivers/dri/i965/brw_context.c   |  42 +-
 src/mesa/drivers/dri/i965/intel_batchbuffer.c |   4 +-
 src/mesa/drivers/dri/i965/intel_fbo.c |   7 +-
 src/mesa/drivers/dri/i965/intel_screen.c  | 106 +-
 src/mesa/drivers/dri/i965/intel_syncobj.c |   2 +-
 src/mesa/drivers/dri/i965/intel_tex_image.c   |   7 +-
 6 files changed, 85 insertions(+), 83 deletions(-)

diff --git a/src/mesa/drivers/dri/i965/brw_context.c 
b/src/mesa/drivers/dri/i965/brw_context.c
index 3af4555..27e7d59 100644
--- a/src/mesa/drivers/dri/i965/brw_context.c
+++ b/src/mesa/drivers/dri/i965/brw_context.c
@@ -366,10 +366,10 @@ intel_flush_front(struct gl_context *ctx)
struct brw_context *brw = brw_context(ctx);
__DRIcontext *driContext = brw->driContext;
__DRIdrawable *driDrawable = driContext->driDrawablePriv;
-   __DRIscreen *const screen = brw->intelScreen->driScrnPriv;
+   __DRIscreen *const dri_screen = brw->intelScreen->driScrnPriv;
 
if (brw->front_buffer_dirty && _mesa_is_winsys_fbo(ctx->DrawBuffer)) {
-  if (flushFront(screen) && driDrawable &&
+  if (flushFront(dri_screen) && driDrawable &&
   driDrawable->loaderPrivate) {
 
  /* Resolve before flushing FAKE_FRONT_LEFT to FRONT_LEFT.
@@ -382,7 +382,7 @@ intel_flush_front(struct gl_context *ctx)
  intel_resolve_for_dri2_flush(brw, driDrawable);
  intel_batchbuffer_flush(brw);
 
- flushFront(screen)(driDrawable, driDrawable->loaderPrivate);
+ flushFront(dri_screen)(driDrawable, driDrawable->loaderPrivate);
 
  /* We set the dirty bit in intel_prepare_render() if we're
   * front buffer rendering once we get there.
@@ -917,9 +917,8 @@ brwCreateContext(gl_api api,
  unsigned *dri_ctx_error,
 void *sharedContextPrivate)
 {
-   __DRIscreen *sPriv = driContextPriv->driScreenPriv;
struct gl_context *shareCtx = (struct gl_context *) sharedContextPrivate;
-   struct intel_screen *screen = sPriv->driverPrivate;
+   struct intel_screen *screen = driContextPriv->driScreenPriv->driverPrivate;
const struct gen_device_info *devinfo = screen->devinfo;
struct dd_function_table functions;
 
@@ -1443,7 +1442,7 @@ void
 intel_update_renderbuffers(__DRIcontext *context, __DRIdrawable *drawable)
 {
struct brw_context *brw = context->driverPrivate;
-   __DRIscreen *screen = brw->intelScreen->driScrnPriv;
+   __DRIscreen *dri_screen = brw->intelScreen->driScrnPriv;
 
/* Set this up front, so that in case our buffers get invalidated
 * while we're getting new buffers, we don't clobber the stamp and
@@ -1453,7 +1452,7 @@ intel_update_renderbuffers(__DRIcontext *context, 
__DRIdrawable *drawable)
if (unlikely(INTEL_DEBUG & DEBUG_DRI))
   fprintf(stderr, "enter %s, drawable %p\n", __func__, drawable);
 
-   if (screen->image.loader)
+   if (dri_screen->image.loader)
   intel_update_image_buffers(brw, drawable);
else
   intel_update_dri2_buffers(brw, drawable);
@@ -1517,7 +1516,7 @@ intel_query_dri2_buffers(struct brw_context *brw,
  __DRIbuffer **buffers,
  int *buffer_count)
 {
-   __DRIscreen *screen = brw->intelScreen->driScrnPriv;
+   __DRIscreen *dri_screen = brw->intelScreen->driScrnPriv;
struct gl_framebuffer *fb = drawable->driverPrivate;
int i = 0;
unsigned attachments[8];
@@ -1561,12 +1560,13 @@ intel_query_dri2_buffers(struct brw_context *brw,
 
assert(i <= ARRAY_SIZE(attachments));
 
-   *buffers = screen->dri2.loader->getBuffersWithFormat(drawable,
-&drawable->w,
-&drawable->h,
-attachments, i / 2,
-buffer_count,
-
drawable->loaderPrivate);
+   *buffers =
+  dri_screen->dri2.loader->getBuffersWithFormat(drawable,
+&drawable->w,
+ 

Mesa (master): mesa: Implement ARB_shader_viewport_layer_array for i965

2016-09-20 Thread Kenneth Graunke
Module: Mesa
Branch: master
Commit: d4bf9baa43e2cf7b4b877141ee472779ced219bf
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=d4bf9baa43e2cf7b4b877141ee472779ced219bf

Author: Dylan Baker 
Date:   Mon Sep 19 15:36:09 2016 -0700

mesa: Implement ARB_shader_viewport_layer_array for i965

This extension is a combination of AMD_vertex_shader_viewport_index and
AMD_vertex_shader_layer, making it rather trivial to implement.

For gallium I *think* this needs a new cap because of the addition of
support in tessellation evaluation shaders, and since I don't have any
hardware to test it on, I've left that for someone else to wire up.

Signed-off-by: Dylan Baker 
Reviewed-by: Ilia Mirkin 
Reviewed-by: Kenneth Graunke 

---

 docs/features.txt|  2 +-
 docs/relnotes/12.1.0.html|  1 +
 src/compiler/glsl/builtin_variables.cpp  | 14 --
 src/compiler/glsl/glsl_parser_extras.cpp |  1 +
 src/compiler/glsl/glsl_parser_extras.h   |  2 ++
 src/mesa/drivers/dri/i965/intel_extensions.c |  1 +
 src/mesa/main/extensions_table.h |  1 +
 src/mesa/main/mtypes.h   |  1 +
 8 files changed, 20 insertions(+), 3 deletions(-)

diff --git a/docs/features.txt b/docs/features.txt
index df81f91..ab98d60 100644
--- a/docs/features.txt
+++ b/docs/features.txt
@@ -297,7 +297,7 @@ Khronos, ARB, and OES extensions that are not part of any 
OpenGL or OpenGL ES ve
   GL_ARB_shader_draw_parameters DONE (i965, nvc0, 
radeonsi)
   GL_ARB_shader_group_vote  DONE (nvc0)
   GL_ARB_shader_stencil_export  DONE (i965/gen9+, 
radeonsi, softpipe, llvmpipe, swr)
-  GL_ARB_shader_viewport_layer_arraynot started
+  GL_ARB_shader_viewport_layer_arrayDONE (i965/gen6+)
   GL_ARB_sparse_buffer  not started
   GL_ARB_sparse_texture not started
   GL_ARB_sparse_texture2not started
diff --git a/docs/relnotes/12.1.0.html b/docs/relnotes/12.1.0.html
index 8e0a84e..f411614 100644
--- a/docs/relnotes/12.1.0.html
+++ b/docs/relnotes/12.1.0.html
@@ -53,6 +53,7 @@ Note: some of the new features are only available with 
certain drivers.
 GL_ARB_indirect_parameters on radeonsi
 GL_ARB_shader_draw_parameters on radeonsi
 GL_ARB_shader_group_vote on nvc0
+GL_ARB_shader_viewport_layer_array on i965/gen6+
 GL_ARB_stencil_texturing on i965/hsw
 GL_ARB_texture_stencil8 on i965/hsw
 GL_EXT_window_rectangles on nv50, nvc0
diff --git a/src/compiler/glsl/builtin_variables.cpp 
b/src/compiler/glsl/builtin_variables.cpp
index f47daab..b66ad00 100644
--- a/src/compiler/glsl/builtin_variables.cpp
+++ b/src/compiler/glsl/builtin_variables.cpp
@@ -1000,11 +1000,13 @@ builtin_variable_generator::generate_vs_special_vars()
   add_system_value(SYSTEM_VALUE_BASE_INSTANCE, int_t, 
"gl_BaseInstanceARB");
   add_system_value(SYSTEM_VALUE_DRAW_ID, int_t, "gl_DrawIDARB");
}
-   if (state->AMD_vertex_shader_layer_enable) {
+   if (state->AMD_vertex_shader_layer_enable ||
+   state->ARB_shader_viewport_layer_array_enable) {
   var = add_output(VARYING_SLOT_LAYER, int_t, "gl_Layer");
   var->data.interpolation = INTERP_MODE_FLAT;
}
-   if (state->AMD_vertex_shader_viewport_index_enable) {
+   if (state->AMD_vertex_shader_viewport_index_enable ||
+   state->ARB_shader_viewport_layer_array_enable) {
   var = add_output(VARYING_SLOT_VIEWPORT, int_t, "gl_ViewportIndex");
   var->data.interpolation = INTERP_MODE_FLAT;
}
@@ -1066,6 +1068,8 @@ builtin_variable_generator::generate_tcs_special_vars()
 void
 builtin_variable_generator::generate_tes_special_vars()
 {
+   ir_variable *var;
+
add_system_value(SYSTEM_VALUE_PRIMITIVE_ID, int_t, "gl_PrimitiveID");
add_system_value(SYSTEM_VALUE_VERTICES_IN, int_t, "gl_PatchVerticesIn");
add_system_value(SYSTEM_VALUE_TESS_COORD, vec3_t, "gl_TessCoord");
@@ -1073,6 +1077,12 @@ builtin_variable_generator::generate_tes_special_vars()
 "gl_TessLevelOuter");
add_system_value(SYSTEM_VALUE_TESS_LEVEL_INNER, array(float_t, 2),
 "gl_TessLevelInner");
+   if (state->ARB_shader_viewport_layer_array_enable) {
+  var = add_output(VARYING_SLOT_LAYER, int_t, "gl_Layer");
+  var->data.interpolation = INTERP_MODE_FLAT;
+  var = add_output(VARYING_SLOT_VIEWPORT, int_t, "gl_ViewportIndex");
+  var->data.interpolation = INTERP_MODE_FLAT;
+   }
 }
 
 
diff --git a/src/compiler/glsl/glsl_parser_extras.cpp 
b/src/compiler/glsl/glsl_parser_extras.cpp
index 0e9bfa7..84d923f 100644
--- a/src/compiler/glsl/glsl_parser_extras.cpp
+++ b/src/compiler/glsl/glsl_parser_extras.cpp
@@ -618,6 +618,7 @@ static const _mesa_glsl_extension 
_mesa_glsl_supported_extensions[] = {
EXT(ARB_shader_subroutine),
EXT(ARB_shader_texture_image_samples),
EXT(ARB_shader_texture_lo

Mesa (master): radeon/vce: add firmware support for version 52.8.3

2016-09-20 Thread Leo Liu
Module: Mesa
Branch: master
Commit: 956f3e3bcd426b97a4d73d6903bbeb93ec4fd3f3
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=956f3e3bcd426b97a4d73d6903bbeb93ec4fd3f3

Author: Leo Liu 
Date:   Tue Sep 20 10:09:23 2016 -0400

radeon/vce: add firmware support for version 52.8.3

Signed-off-by: Leo Liu 
Reviewed-by: Christian König 

---

 src/gallium/drivers/radeon/radeon_vce.c | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/src/gallium/drivers/radeon/radeon_vce.c 
b/src/gallium/drivers/radeon/radeon_vce.c
index 92cb8ce..8504d93 100644
--- a/src/gallium/drivers/radeon/radeon_vce.c
+++ b/src/gallium/drivers/radeon/radeon_vce.c
@@ -51,6 +51,7 @@
 #define FW_50_17_3 ((50 << 24) | (17 << 16) | (3 << 8))
 #define FW_52_0_3 ((52 << 24) | (0 << 16) | (3 << 8))
 #define FW_52_4_3 ((52 << 24) | (4 << 16) | (3 << 8))
+#define FW_52_8_3 ((52 << 24) | (8 << 16) | (3 << 8))
 
 /**
  * flush commands to the hardware
@@ -488,6 +489,7 @@ struct pipe_video_codec *rvce_create_encoder(struct 
pipe_context *context,
 
case FW_52_0_3:
case FW_52_4_3:
+   case FW_52_8_3:
radeon_vce_52_init(enc);
get_pic_param = radeon_vce_52_get_param;
break;
@@ -522,6 +524,7 @@ bool rvce_is_fw_version_supported(struct r600_common_screen 
*rscreen)
case FW_50_17_3:
case FW_52_0_3:
case FW_52_4_3:
+   case FW_52_8_3:
return true;
default:
return false;

___
mesa-commit mailing list
mesa-commit@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/mesa-commit


Mesa (master): st/omx/dec/h265: Correct the timestamping

2016-09-20 Thread Leo Liu
Module: Mesa
Branch: master
Commit: f9311265bfa2d716490a89be09bec9c5e253a56a
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=f9311265bfa2d716490a89be09bec9c5e253a56a

Author: Indrajit Das 
Date:   Thu Sep 15 10:49:15 2016 +0530

st/omx/dec/h265: Correct the timestamping

(derived from commit 3b6bda665a5a890f2c98e19d2939d7de92b8cb4c)

v2: fix the tabs(Leo)

Reviewed-by: Christian König 
Reviewed-by: Nishanth Peethambaran 
Signed-off-by: Indrajit Das 
Signed-off-by: Leo Liu 

---

 src/gallium/state_trackers/omx/vid_dec_h265.c | 13 -
 1 file changed, 12 insertions(+), 1 deletion(-)

diff --git a/src/gallium/state_trackers/omx/vid_dec_h265.c 
b/src/gallium/state_trackers/omx/vid_dec_h265.c
index 7c0f75d..0772b4d 100644
--- a/src/gallium/state_trackers/omx/vid_dec_h265.c
+++ b/src/gallium/state_trackers/omx/vid_dec_h265.c
@@ -60,6 +60,7 @@ enum {
 struct dpb_list {
struct list_head list;
struct pipe_video_buffer *buffer;
+   OMX_TICKS timestamp;
unsigned poc;
 };
 
@@ -518,6 +519,9 @@ static void vid_dec_h265_BeginFrame(vid_dec_PrivateType 
*priv)
   return;
 
vid_dec_NeedTarget(priv);
+   if (priv->first_buf_in_frame)
+  priv->timestamp = priv->timestamps[0];
+   priv->first_buf_in_frame = false;
 
if (!priv->codec) {
   struct pipe_video_codec templat = {};
@@ -558,6 +562,8 @@ static struct pipe_video_buffer 
*vid_dec_h265_Flush(vid_dec_PrivateType *priv,
   return NULL;
 
buf = result->buffer;
+   if (timestamp)
+  *timestamp = result->timestamp;
 
--priv->codec_data.h265.dpb_num;
LIST_DEL(&result->list);
@@ -572,6 +578,7 @@ static void vid_dec_h265_EndFrame(vid_dec_PrivateType *priv)
struct pipe_video_buffer *tmp;
struct ref_pic_set *rps;
int i;
+   OMX_TICKS timestamp;
 
if (!priv->frame_started)
   return;
@@ -621,7 +628,9 @@ static void vid_dec_h265_EndFrame(vid_dec_PrivateType *priv)
if (!entry)
   return;
 
+   priv->first_buf_in_frame = true;
entry->buffer = priv->target;
+   entry->timestamp = priv->timestamp;
entry->poc = get_poc(priv);
 
LIST_ADDTAIL(&entry->list, &priv->codec_data.h265.dpb_list);
@@ -632,7 +641,8 @@ static void vid_dec_h265_EndFrame(vid_dec_PrivateType *priv)
   return;
 
tmp = priv->in_buffers[0]->pInputPortPrivate;
-   priv->in_buffers[0]->pInputPortPrivate = vid_dec_h265_Flush(priv, NULL);
+   priv->in_buffers[0]->pInputPortPrivate = vid_dec_h265_Flush(priv, 
×tamp);
+   priv->in_buffers[0]->nTimeStamp = timestamp;
priv->target = tmp;
priv->frame_finished = priv->in_buffers[0]->pInputPortPrivate != NULL;
if (priv->frame_finished &&
@@ -894,4 +904,5 @@ void vid_dec_h265_Init(vid_dec_PrivateType *priv)
priv->Decode = vid_dec_h265_Decode;
priv->EndFrame = vid_dec_h265_EndFrame;
priv->Flush = vid_dec_h265_Flush;
+   priv->first_buf_in_frame = true;
 }

___
mesa-commit mailing list
mesa-commit@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/mesa-commit


Mesa (master): aubinator: add a custom handler for immediate register load

2016-09-20 Thread Lionel Landwerlin
Module: Mesa
Branch: master
Commit: 792d77165be40691d0c3b6dc025a792cb076109e
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=792d77165be40691d0c3b6dc025a792cb076109e

Author: Lionel Landwerlin 
Date:   Fri Sep  9 11:22:59 2016 +0100

aubinator: add a custom handler for immediate register load

Transforming this :

0x00c77084:  0x1101:  MI_LOAD_REGISTER_IMM
0x00c77088:  0xb020 : Dword 1
Register Offset: 0xb020
0x00c7708c:  0x00880038 : Dword 2
Data DWord: 8912952

Into this:

0x007880f0:  0x1101:  MI_LOAD_REGISTER_IMM
0x007880f4:  0xb020 : Dword 1
Register Offset: 0xb020
0x007880f8:  0x00080040 : Dword 2
Data DWord: 524352
register L3CNTLREG2 (0xb020) : 0x80040
SLM Enable: 0
URB Allocation: 32
URB Low Bandwidth: 0
RO Allocation: 32
RO Low Bandwidth: 0
DC Allocation: 0
DC Low Bandwidth: 0

v2: Drop unused arguments (Sirisha)
Print out register name

Signed-off-by: Lionel Landwerlin 

---

 src/intel/tools/aubinator.c | 17 -
 src/intel/tools/decoder.c   | 29 +++--
 src/intel/tools/decoder.h   |  4 
 3 files changed, 47 insertions(+), 3 deletions(-)

diff --git a/src/intel/tools/aubinator.c b/src/intel/tools/aubinator.c
index fad8aaa..a31dcb2 100644
--- a/src/intel/tools/aubinator.c
+++ b/src/intel/tools/aubinator.c
@@ -616,6 +616,18 @@ handle_3dstate_scissor_state_pointers(struct gen_spec 
*spec, uint32_t *p)
decode_structure(spec, scissor_rect, gtt + start);
 }
 
+static void
+handle_load_register_imm(struct gen_spec *spec, uint32_t *p)
+{
+   struct gen_group *reg = gen_spec_find_register(spec, p[1]);
+
+   if (reg != NULL) {
+  printf("register %s (0x%x): 0x%x\n",
+ reg->name, reg->register_offset, p[2]);
+  decode_structure(spec, reg, &p[2]);
+   }
+}
+
 #define ARRAY_LENGTH(a) (sizeof (a) / sizeof (a)[0])
 
 #define STATE_BASE_ADDRESS  0x6101
@@ -654,6 +666,8 @@ handle_3dstate_scissor_state_pointers(struct gen_spec 
*spec, uint32_t *p)
 #define _3DSTATE_CC_STATE_POINTERS  0x780e
 #define _3DSTATE_SCISSOR_STATE_POINTERS 0x780f
 
+#define _MI_LOAD_REGISTER_IMM   0x1100
+
 struct custom_handler {
uint32_t opcode;
void (*handle)(struct gen_spec *spec, uint32_t *p);
@@ -687,7 +701,8 @@ struct custom_handler {
{ _3DSTATE_VIEWPORT_STATE_POINTERS_SF_CLIP, 
handle_3dstate_viewport_state_pointers_sf_clip },
{ _3DSTATE_BLEND_STATE_POINTERS, handle_3dstate_blend_state_pointers },
{ _3DSTATE_CC_STATE_POINTERS, handle_3dstate_cc_state_pointers },
-   { _3DSTATE_SCISSOR_STATE_POINTERS, handle_3dstate_scissor_state_pointers }
+   { _3DSTATE_SCISSOR_STATE_POINTERS, handle_3dstate_scissor_state_pointers },
+   { _MI_LOAD_REGISTER_IMM, handle_load_register_imm }
 };
 
 static void
diff --git a/src/intel/tools/decoder.c b/src/intel/tools/decoder.c
index f080437..b5f557c 100644
--- a/src/intel/tools/decoder.c
+++ b/src/intel/tools/decoder.c
@@ -88,6 +88,16 @@ gen_spec_find_struct(struct gen_spec *spec, const char *name)
return NULL;
 }
 
+struct gen_group *
+gen_spec_find_register(struct gen_spec *spec, uint32_t offset)
+{
+   for (int i = 0; i < spec->nregisters; i++)
+  if (spec->registers[i]->register_offset == offset)
+ return spec->registers[i];
+
+   return NULL;
+}
+
 uint32_t
 gen_spec_get_gen(struct gen_spec *spec)
 {
@@ -168,6 +178,19 @@ get_group_offset_count(struct parser_context *ctx, const 
char *name,
return;
 }
 
+static void
+get_register_offset(const char **atts, uint32_t *offset)
+{
+   char *p;
+   int i;
+
+   for (i = 0; atts[i]; i += 2) {
+  if (strcmp(atts[i], "num") == 0)
+ *offset = strtoul(atts[i + 1], &p, 0);
+   }
+   return;
+}
+
 static inline uint64_t
 mask(int start, int end)
 {
@@ -288,9 +311,11 @@ start_element(void *data, const char *element_name, const 
char **atts)
 
   ctx->spec->gen = MAKE_GEN(major, minor);
} else if (strcmp(element_name, "instruction") == 0 ||
-  strcmp(element_name, "struct") == 0 ||
-  strcmp(element_name, "register") == 0) {
+  strcmp(element_name, "struct") == 0) {
+  ctx->group = create_group(ctx, name, atts);
+   } else if (strcmp(element_name, "register") == 0) {
   ctx->group = create_group(ctx, name, atts);
+  get_register_offset(atts, &ctx->group->register_offset);
} else if (strcmp(element_name, "group") == 0) {
   get_group_offset_count(ctx, name, atts, &ctx->group->group_offset,
  &ctx->group->group_count);
diff --git a/src/intel/tools/decoder.h b/src/intel/tools/decoder.h
index 4ab0765..f688ba5 100644
--- a/src/intel/tools/decoder.h
+++ b/src/intel/tools/decoder.h
@@ -39,6 +39,7 @@ struct gen_group *gen_spec_find_struct(struct gen_spec *spec, 
const char *name);
 struct gen_spec *gen_spec_load(const char *filename);
 uint32_t gen_spec_get_gen(struct gen_spec *spec);
 struct gen_group *gen_spec_find_ins

Mesa (master): vl/dri3: handle the case of different GPU(v4.2)

2016-09-20 Thread Christian König
Module: Mesa
Branch: master
Commit: 853e80f5a09f85477167aac2789a91a2755e23f0
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=853e80f5a09f85477167aac2789a91a2755e23f0

Author: Nayan Deshmukh 
Date:   Tue Sep 20 10:40:10 2016 +0530

vl/dri3: handle the case of different GPU(v4.2)

In case of prime when rendering is done on GPU other then the
server GPU, use a seprate linear buffer for each back buffer
which will be displayed using present extension.

v2: Use a seprate linear buffer for each back buffer (Michel)
v3: Change variable names and fix coding style (Leo and Emil)
v4: Use PIPE_BIND_SAMPLER_VIEW for back buffer in case when
a seprate linear buffer is used (Michel)
v4.1: remove empty line
v4.2: destroy the context and handle the case when
  create_context fails (Emil)

Signed-off-by: Nayan Deshmukh 
Reviewed-by: Leo Liu 
Acked-by: Michel Dänzer 
Acked-by: Christian König 

---

 src/gallium/auxiliary/vl/vl_winsys_dri3.c | 66 +--
 1 file changed, 53 insertions(+), 13 deletions(-)

diff --git a/src/gallium/auxiliary/vl/vl_winsys_dri3.c 
b/src/gallium/auxiliary/vl/vl_winsys_dri3.c
index 3d596a6..191a64b 100644
--- a/src/gallium/auxiliary/vl/vl_winsys_dri3.c
+++ b/src/gallium/auxiliary/vl/vl_winsys_dri3.c
@@ -49,6 +49,7 @@
 struct vl_dri3_buffer
 {
struct pipe_resource *texture;
+   struct pipe_resource *linear_texture;
 
uint32_t pixmap;
uint32_t sync_fence;
@@ -69,6 +70,8 @@ struct vl_dri3_screen
xcb_present_event_t eid;
xcb_special_event_t *special_event;
 
+   struct pipe_context *pipe;
+
struct vl_dri3_buffer *back_buffers[BACK_BUFFER_NUM];
int cur_back;
 
@@ -82,6 +85,7 @@ struct vl_dri3_screen
int64_t last_ust, ns_frame, last_msc, next_msc;
 
bool flushed;
+   bool is_different_gpu;
 };
 
 static void
@@ -102,6 +106,8 @@ dri3_free_back_buffer(struct vl_dri3_screen *scrn,
xcb_sync_destroy_fence(scrn->conn, buffer->sync_fence);
xshmfence_unmap_shm(buffer->shm_fence);
pipe_resource_reference(&buffer->texture, NULL);
+   if (buffer->linear_texture)
+   pipe_resource_reference(&buffer->linear_texture, NULL);
FREE(buffer);
 }
 
@@ -209,7 +215,7 @@ dri3_alloc_back_buffer(struct vl_dri3_screen *scrn)
xcb_sync_fence_t sync_fence;
struct xshmfence *shm_fence;
int buffer_fd, fence_fd;
-   struct pipe_resource templ;
+   struct pipe_resource templ, *pixmap_buffer_texture;
struct winsys_handle whandle;
unsigned usage;
 
@@ -226,8 +232,7 @@ dri3_alloc_back_buffer(struct vl_dri3_screen *scrn)
   goto close_fd;
 
memset(&templ, 0, sizeof(templ));
-   templ.bind = PIPE_BIND_RENDER_TARGET | PIPE_BIND_SAMPLER_VIEW |
-PIPE_BIND_SCANOUT | PIPE_BIND_SHARED;
+   templ.bind = PIPE_BIND_RENDER_TARGET | PIPE_BIND_SAMPLER_VIEW;
templ.format = PIPE_FORMAT_B8G8R8X8_UNORM;
templ.target = PIPE_TEXTURE_2D;
templ.last_level = 0;
@@ -235,16 +240,34 @@ dri3_alloc_back_buffer(struct vl_dri3_screen *scrn)
templ.height0 = scrn->height;
templ.depth0 = 1;
templ.array_size = 1;
-   buffer->texture = scrn->base.pscreen->resource_create(scrn->base.pscreen,
- &templ);
-   if (!buffer->texture)
-  goto unmap_shm;
 
+   if (scrn->is_different_gpu) {
+  buffer->texture = scrn->base.pscreen->resource_create(scrn->base.pscreen,
+&templ);
+  if (!buffer->texture)
+ goto unmap_shm;
+
+  templ.bind |= PIPE_BIND_SCANOUT | PIPE_BIND_SHARED |
+PIPE_BIND_LINEAR;
+  buffer->linear_texture = 
scrn->base.pscreen->resource_create(scrn->base.pscreen,
+  &templ);
+  pixmap_buffer_texture = buffer->linear_texture;
+
+  if (!buffer->linear_texture)
+ goto no_linear_texture;
+   } else {
+  templ.bind |= PIPE_BIND_SCANOUT | PIPE_BIND_SHARED;
+  buffer->texture = scrn->base.pscreen->resource_create(scrn->base.pscreen,
+&templ);
+  if (!buffer->texture)
+ goto unmap_shm;
+  pixmap_buffer_texture = buffer->texture;
+   }
memset(&whandle, 0, sizeof(whandle));
whandle.type= DRM_API_HANDLE_TYPE_FD;
usage = PIPE_HANDLE_USAGE_EXPLICIT_FLUSH | PIPE_HANDLE_USAGE_READ;
scrn->base.pscreen->resource_get_handle(scrn->base.pscreen, NULL,
-   buffer->texture, &whandle,
+   pixmap_buffer_texture, &whandle,
usage);
buffer_fd = whandle.handle;
buffer->pitch = whandle.stride;
@@ -271,6 +294,8 @@ dri3_alloc_back_buffer(struct vl_dri3_screen *scrn)
 
return buffer;
 
+no_linear_texture:
+   pipe_resource_reference(&buffer->texture, NULL);
 unmap_shm:
xshmfence_unmap_shm(shm_fence);
 close_fd:
@@ -474,6 +499,7 @@ vl_dri3_flush_frontbuffer(struc

Mesa (master): st/va: flush the context before calling flush_frontbuffer( v2)

2016-09-20 Thread Christian König
Module: Mesa
Branch: master
Commit: 0301858a316af7d831655778cf69bc49b12ee6ac
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=0301858a316af7d831655778cf69bc49b12ee6ac

Author: Nayan Deshmukh 
Date:   Tue Sep 20 10:40:12 2016 +0530

st/va: flush the context before calling flush_frontbuffer(v2)

so that the texture is rendered to back buffer before calling
flush_frontbuffer and can be copied to a different buffer in
the function

v2: change comment style

Signed-off-by: Nayan Deshmukh 
Reviewed-by: Michel Dänzer 
Acked-by: Christian König 

---

 src/gallium/state_trackers/va/surface.c | 6 +-
 1 file changed, 5 insertions(+), 1 deletion(-)

diff --git a/src/gallium/state_trackers/va/surface.c 
b/src/gallium/state_trackers/va/surface.c
index 00df69d..115db43 100644
--- a/src/gallium/state_trackers/va/surface.c
+++ b/src/gallium/state_trackers/va/surface.c
@@ -321,10 +321,14 @@ vlVaPutSurface(VADriverContextP ctx, VASurfaceID 
surface_id, void* draw, short s
   return status;
}
 
+   /* flush before calling flush_frontbuffer so that rendering is flushed
+* to back buffer so the texture can be copied in flush_frontbuffer
+*/
+   drv->pipe->flush(drv->pipe, NULL, 0);
+
screen->flush_frontbuffer(screen, tex, 0, 0,
  vscreen->get_private(vscreen), NULL);
 
-   drv->pipe->flush(drv->pipe, NULL, 0);
 
pipe_resource_reference(&tex, NULL);
pipe_surface_reference(&surf_draw, NULL);

___
mesa-commit mailing list
mesa-commit@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/mesa-commit


Mesa (master): st/vdpau: flush the context before calling flush_frontbuffer

2016-09-20 Thread Christian König
Module: Mesa
Branch: master
Commit: e4cc2276c1fce9bce81834c348c3fc7e97ed6321
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=e4cc2276c1fce9bce81834c348c3fc7e97ed6321

Author: Nayan Deshmukh 
Date:   Tue Sep 20 10:40:11 2016 +0530

st/vdpau: flush the context before calling flush_frontbuffer

so that the texture is rendered to back buffer before calling
flush_frontbuffer and can be copied to a different buffer in
the function

Signed-off-by: Nayan Deshmukh 
Reviewed-by: Michel Dänzer 
Acked-by: Christian König 

---

 src/gallium/state_trackers/vdpau/presentation.c | 7 +--
 1 file changed, 5 insertions(+), 2 deletions(-)

diff --git a/src/gallium/state_trackers/vdpau/presentation.c 
b/src/gallium/state_trackers/vdpau/presentation.c
index 2862eaf..f35d73a 100644
--- a/src/gallium/state_trackers/vdpau/presentation.c
+++ b/src/gallium/state_trackers/vdpau/presentation.c
@@ -271,11 +271,14 @@ vlVdpPresentationQueueDisplay(VdpPresentationQueue 
presentation_queue,
}
 
vscreen->set_next_timestamp(vscreen, earliest_presentation_time);
-   pipe->screen->flush_frontbuffer(pipe->screen, tex, 0, 0,
-   vscreen->get_private(vscreen), NULL);
 
+   // flush before calling flush_frontbuffer so that rendering is flushed
+   //  to back buffer so the texture can be copied in flush_frontbuffer
pipe->screen->fence_reference(pipe->screen, &surf->fence, NULL);
pipe->flush(pipe, &surf->fence, 0);
+   pipe->screen->flush_frontbuffer(pipe->screen, tex, 0, 0,
+   vscreen->get_private(vscreen), NULL);
+
pq->last_surf = surf;
 
if (dump_window == -1) {

___
mesa-commit mailing list
mesa-commit@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/mesa-commit


Mesa (master): st/vdpau: fix argument type to vlVdpOutputSurfaceDMABuf

2016-09-20 Thread Christian König
Module: Mesa
Branch: master
Commit: 40d787ab05784bf2cc1443805d7fde56c68ba025
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=40d787ab05784bf2cc1443805d7fde56c68ba025

Author: Ilia Mirkin 
Date:   Wed Sep 14 19:16:43 2016 -0400

st/vdpau: fix argument type to vlVdpOutputSurfaceDMABuf

Signed-off-by: Ilia Mirkin 
Reviewed-by: Christian König 

---

 src/gallium/include/state_tracker/vdpau_dmabuf.h | 2 +-
 src/gallium/state_trackers/vdpau/output.c| 2 +-
 2 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/src/gallium/include/state_tracker/vdpau_dmabuf.h 
b/src/gallium/include/state_tracker/vdpau_dmabuf.h
index 886c344..f838c92 100644
--- a/src/gallium/include/state_tracker/vdpau_dmabuf.h
+++ b/src/gallium/include/state_tracker/vdpau_dmabuf.h
@@ -87,7 +87,7 @@ typedef VdpStatus VdpVideoSurfaceDMABuf(
 );
 
 typedef VdpStatus VdpOutputSurfaceDMABuf(
-   VdpVideoSurface   surface,
+   VdpOutputSurface  surface,
struct VdpSurfaceDMABufDesc * result
 );
 
diff --git a/src/gallium/state_trackers/vdpau/output.c 
b/src/gallium/state_trackers/vdpau/output.c
index 85751ea..f4d62a3 100644
--- a/src/gallium/state_trackers/vdpau/output.c
+++ b/src/gallium/state_trackers/vdpau/output.c
@@ -773,7 +773,7 @@ struct pipe_resource 
*vlVdpOutputSurfaceGallium(VdpOutputSurface surface)
return vlsurface->surface->texture;
 }
 
-VdpStatus vlVdpOutputSurfaceDMABuf(VdpVideoSurface surface,
+VdpStatus vlVdpOutputSurfaceDMABuf(VdpOutputSurface surface,
struct VdpSurfaceDMABufDesc *result)
 {
vlVdpOutputSurface *vlsurface;

___
mesa-commit mailing list
mesa-commit@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/mesa-commit