Mesa (master): anv: Silence warning about heap_size.

2018-03-16 Thread Eric Anholt 
Module: Mesa
Branch: master
Commit: 7db1c09d12bac50d66feaf981ff52b319091dd2d
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=7db1c09d12bac50d66feaf981ff52b319091dd2d

Author: Eric Anholt 
Date:   Sat Feb 10 11:25:48 2018 +

anv: Silence warning about heap_size.

We only get VK_SUCCESS if it was initialized, but apparently my compiler
doesn't track that far.

Reviewed-by: Lionel Landwerlin 

---

 src/intel/vulkan/anv_device.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/intel/vulkan/anv_device.c b/src/intel/vulkan/anv_device.c
index 82b237e76d..4cacba9343 100644
--- a/src/intel/vulkan/anv_device.c
+++ b/src/intel/vulkan/anv_device.c
@@ -110,7 +110,7 @@ anv_physical_device_init_heaps(struct anv_physical_device 
*device, int fd)
device->supports_48bit_addresses =
   (device->info.gen >= 8) && anv_gem_supports_48b_addresses(fd);
 
-   uint64_t heap_size;
+   uint64_t heap_size = 0;
VkResult result = anv_compute_heap_size(fd, _size);
if (result != VK_SUCCESS)
   return result;

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Mesa (master): anv: Silence compiler warnings about uninitialized bind_offset.

2018-03-16 Thread Eric Anholt 
Module: Mesa
Branch: master
Commit: 9f89452ea36327b1a7faefd401784599288c1be0
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=9f89452ea36327b1a7faefd401784599288c1be0

Author: Eric Anholt 
Date:   Sat Feb 10 11:11:14 2018 +

anv: Silence compiler warnings about uninitialized bind_offset.

This is a legitimate warning: if anv's blorp_alloc_binding_table() throws
an error from anv_cmd_buffer_alloc_blorp_binding_table(), we silently
continue to use this undefined value.  The rest of this code doesn't seem
very allocation-error-proof, though, either.

Reviewed-by: Lionel Landwerlin 

---

 src/intel/blorp/blorp_genX_exec.h | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/intel/blorp/blorp_genX_exec.h 
b/src/intel/blorp/blorp_genX_exec.h
index b612709035..992bc9959a 100644
--- a/src/intel/blorp/blorp_genX_exec.h
+++ b/src/intel/blorp/blorp_genX_exec.h
@@ -1388,7 +1388,7 @@ blorp_emit_surface_states(struct blorp_batch *batch,
   const struct blorp_params *params)
 {
const struct isl_device *isl_dev = batch->blorp->isl_dev;
-   uint32_t bind_offset, surface_offsets[2];
+   uint32_t bind_offset = 0, surface_offsets[2];
void *surface_maps[2];
 
MAYBE_UNUSED bool has_indirect_clear_color = false;

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Mesa (master): i965: Silence compiler warning about promoted_constants.

2018-03-16 Thread Eric Anholt 
Module: Mesa
Branch: master
Commit: d25640c3a3b914059abd661f0651d88b4fe408e8
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=d25640c3a3b914059abd661f0651d88b4fe408e8

Author: Eric Anholt 
Date:   Sat Feb 10 11:22:53 2018 +

i965: Silence compiler warning about promoted_constants.

We only have a cfg != NULL if we went through one of the paths that set
it, but my compiler doesn't figure that out.

Reviewed-by: Lionel Landwerlin 
Fixes: 6411defdcd6f ("intel/cs: Re-run final NIR optimizations for each SIMD 
size")

---

 src/intel/compiler/brw_fs.cpp | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/intel/compiler/brw_fs.cpp b/src/intel/compiler/brw_fs.cpp
index f65e5d9d8b..6eea532f56 100644
--- a/src/intel/compiler/brw_fs.cpp
+++ b/src/intel/compiler/brw_fs.cpp
@@ -7223,7 +7223,7 @@ brw_compile_cs(const struct brw_compiler *compiler, void 
*log_data,
fs_visitor *v8 = NULL, *v16 = NULL, *v32 = NULL;
cfg_t *cfg = NULL;
const char *fail_msg = NULL;
-   unsigned promoted_constants;
+   unsigned promoted_constants = 0;
 
/* Now the main event: Visit the shader IR and generate our CS IR for it.
 */

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Mesa (master): intel: Add cfl to gen_device_name_to_pci_device_id()

2018-03-16 Thread Matt Turner 
Module: Mesa
Branch: master
Commit: 54db78b196d883a878301651af3313fd50c39fd5
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=54db78b196d883a878301651af3313fd50c39fd5

Author: Matt Turner 
Date:   Fri Mar 16 10:50:51 2018 -0700

intel: Add cfl to gen_device_name_to_pci_device_id()

Reviewed-by: Rafael Antognolli 

---

 src/intel/dev/gen_device_info.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/src/intel/dev/gen_device_info.c b/src/intel/dev/gen_device_info.c
index 1773009d33..3365bdd4dd 100644
--- a/src/intel/dev/gen_device_info.c
+++ b/src/intel/dev/gen_device_info.c
@@ -55,6 +55,7 @@ gen_device_name_to_pci_device_id(const char *name)
   { "bxt", 0x5A85 },
   { "kbl", 0x5912 },
   { "glk", 0x3185 },
+  { "cfl", 0x3E9B },
   { "cnl", 0x5a52 },
   { "icl", 0x8a52 },
};

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Mesa (master): intel/compiler: Use gen_get_device_info() in test_eu_validate

2018-03-16 Thread Matt Turner 
Module: Mesa
Branch: master
Commit: f3833f1ca79960a944760914b8a208c4e6bc12e7
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=f3833f1ca79960a944760914b8a208c4e6bc12e7

Author: Matt Turner 
Date:   Fri Mar 16 10:52:55 2018 -0700

intel/compiler: Use gen_get_device_info() in test_eu_validate

Previously the unit test filled out a minimal devinfo struct. A previous
patch caused the test to begin assert failing because the devinfo was
not complete. Avoid this by using the real mechanism to create devinfo.

Note that we have to drop icl from the table, since we now rely on the
name -> PCI ID translation done by gen_device_name_to_pci_device_id(),
and ICL's PCI IDs are not upstream yet.

Fixes: f89e735719a6 ("intel/compiler: Check for unsupported register sizes.")
Reviewed-by: Rafael Antognolli 

---

 src/intel/Makefile.compiler.am  |  1 +
 src/intel/compiler/meson.build  |  2 +-
 src/intel/compiler/test_eu_validate.cpp | 55 ++---
 3 files changed, 19 insertions(+), 39 deletions(-)

diff --git a/src/intel/Makefile.compiler.am b/src/intel/Makefile.compiler.am
index 45e7a6ccce..af30a58a1d 100644
--- a/src/intel/Makefile.compiler.am
+++ b/src/intel/Makefile.compiler.am
@@ -48,6 +48,7 @@ TEST_LIBS = \
$(top_builddir)/src/gtest/libgtest.la \
compiler/libintel_compiler.la \
common/libintel_common.la \
+   dev/libintel_dev.la \
$(top_builddir)/src/compiler/nir/libnir.la \
$(top_builddir)/src/util/libmesautil.la \
$(top_builddir)/src/intel/isl/libisl.la \
diff --git a/src/intel/compiler/meson.build b/src/intel/compiler/meson.build
index 602206c725..72b7a6796c 100644
--- a/src/intel/compiler/meson.build
+++ b/src/intel/compiler/meson.build
@@ -152,7 +152,7 @@ if with_tests
 'test_@0@.cpp'.format(t),
 include_directories : [inc_common, inc_intel],
 link_with : [
-  libintel_compiler, libintel_common, libmesa_util, libisl,
+  libintel_compiler, libintel_common, libintel_dev, libmesa_util, 
libisl,
 ],
 dependencies : [dep_thread, dep_dl, idep_gtest, idep_nir],
   )
diff --git a/src/intel/compiler/test_eu_validate.cpp 
b/src/intel/compiler/test_eu_validate.cpp
index d987311ef8..161db994b2 100644
--- a/src/intel/compiler/test_eu_validate.cpp
+++ b/src/intel/compiler/test_eu_validate.cpp
@@ -25,38 +25,24 @@
 #include "brw_eu.h"
 #include "util/ralloc.h"
 
-enum subgen {
-   IS_G45 = 1,
-   IS_BYT,
-   IS_HSW,
-   IS_CHV,
-   IS_BXT,
-   IS_KBL,
-   IS_GLK,
-   IS_CFL,
-};
-
 static const struct gen_info {
const char *name;
-   int gen;
-   enum subgen subgen;
 } gens[] = {
-   { "brw", 4 },
-   { "g45", 4, IS_G45 },
-   { "ilk", 5 },
-   { "snb", 6 },
-   { "ivb", 7 },
-   { "byt", 7, IS_BYT },
-   { "hsw", 7, IS_HSW },
-   { "bdw", 8 },
-   { "chv", 8, IS_CHV },
-   { "skl", 9 },
-   { "bxt", 9, IS_BXT },
-   { "kbl", 9, IS_KBL },
-   { "glk", 9, IS_GLK },
-   { "cfl", 9, IS_CFL },
-   { "cnl", 10 },
-   { "icl", 11 },
+   { "brw", },
+   { "g4x", },
+   { "ilk", },
+   { "snb", },
+   { "ivb", },
+   { "byt", },
+   { "hsw", },
+   { "bdw", },
+   { "chv", },
+   { "skl", },
+   { "bxt", },
+   { "kbl", },
+   { "glk", },
+   { "cfl", },
+   { "cnl", },
 };
 
 class validation_test: public ::testing::TestWithParam {
@@ -84,16 +70,9 @@ validation_test::~validation_test()
 void validation_test::SetUp()
 {
struct gen_info info = GetParam();
+   int devid = gen_device_name_to_pci_device_id(info.name);
 
-   devinfo.gen   = info.gen;
-   devinfo.is_g4x= info.subgen == IS_G45;
-   devinfo.is_baytrail   = info.subgen == IS_BYT;
-   devinfo.is_haswell= info.subgen == IS_HSW;
-   devinfo.is_cherryview = info.subgen == IS_CHV;
-   devinfo.is_broxton= info.subgen == IS_BXT;
-   devinfo.is_kabylake   = info.subgen == IS_KBL;
-   devinfo.is_geminilake = info.subgen == IS_GLK;
-   devinfo.is_coffeelake = info.subgen == IS_CFL;
+   gen_get_device_info(devid, );
 
brw_init_codegen(, p, p);
 }

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Mesa (master): meson+dri3: allow building against older xcb (v3)

2018-03-16 Thread Rob Clark 
Module: Mesa
Branch: master
Commit: bc5001325b876afbd9fbb7186174e085e0b06206
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=bc5001325b876afbd9fbb7186174e085e0b06206

Author: Rob Clark 
Date:   Tue Mar 13 19:00:45 2018 -0400

meson+dri3: allow building against older xcb (v3)

Similar to previous patch, make xcb 1.13 optional.

Signed-off-by: Rob Clark 
Reviewed-by: Dylan Baker 

---

 meson.build | 11 ---
 1 file changed, 8 insertions(+), 3 deletions(-)

diff --git a/meson.build b/meson.build
index 557e9ef339..a59736f50a 100644
--- a/meson.build
+++ b/meson.build
@@ -1235,9 +1235,14 @@ if with_platform_x11
 dep_xcb_dri2 = dependency('xcb-dri2', version : '>= 1.8')
 
 if with_dri3
-  pre_args += '-DHAVE_DRI3 -DHAVE_DRI3_MODIFIERS'
-  dep_xcb_dri3 = dependency('xcb-dri3', version : '>= 1.13')
-  dep_xcb_present = dependency('xcb-present', version: '>= 1.13')
+  pre_args += '-DHAVE_DRI3'
+  dep_xcb_dri3 = dependency('xcb-dri3')
+  dep_xcb_present = dependency('xcb-present')
+  # until xcb-dri3 has been around long enough to make a hard-dependency:
+  if (dep_xcb_dri3.version().version_compare('>= 1.13') and
+  dep_xcb_present.version().version_compare('>= 1.13'))
+pre_args += '-DHAVE_DRI3_MODIFIERS'
+  endif
   dep_xcb_sync = dependency('xcb-sync')
   dep_xshmfence = dependency('xshmfence', version : '>= 1.1')
 endif

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Mesa (master): dri3: allow building against older xcb (v3)

2018-03-16 Thread Marek Olšák 
Module: Mesa
Branch: master
Commit: 7aeef2d4efdc809a698e9b983c8be8e4ccb27134
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=7aeef2d4efdc809a698e9b983c8be8e4ccb27134

Author: Dave Airlie 
Date:   Wed Mar 14 06:06:00 2018 +1000

dri3: allow building against older xcb (v3)

I'm not sure everyone wants to be updating their dri3 in a forced
march setting, this allows a nicer approach, esp when you want
to build on distro that aren't brand new.

I'm sure there are plenty of ways this patch could be cleaner,
and I've also not built it against an updated dri3.

For meson I've just left it alone, since if you are using meson
you probably don't mind xcb updates, and if you are using meson
you can fix this better than me.

v3: just don't put a version in for dri3/present without
modifiers, should allow building with 1.11 as well

(feel free to supply meson followups)

Signed-off-by: Dave Airlie 
Signed-off-by: Marek Olšák 

---

 configure.ac | 12 +---
 meson.build  |  2 +-
 src/egl/drivers/dri2/platform_x11_dri3.c |  4 
 src/loader/loader_dri3_helper.c  | 22 --
 src/loader/loader_dri3_helper.h  |  3 ++-
 src/vulkan/wsi/wsi_common_x11.c  | 12 ++--
 6 files changed, 42 insertions(+), 13 deletions(-)

diff --git a/configure.ac b/configure.ac
index 8ec5b26b6d..d1c8bb82da 100644
--- a/configure.ac
+++ b/configure.ac
@@ -92,9 +92,9 @@ WAYLAND_REQUIRED=1.11
 WAYLAND_PROTOCOLS_REQUIRED=1.8
 XCB_REQUIRED=1.9.3
 XCBDRI2_REQUIRED=1.8
-XCBDRI3_REQUIRED=1.13
+XCBDRI3_MODIFIERS_REQUIRED=1.13
 XCBGLX_REQUIRED=1.8.1
-XCBPRESENT_REQUIRED=1.13
+XCBPRESENT_MODIFIERS_REQUIRED=1.13
 XDAMAGE_REQUIRED=1.1
 XSHMFENCE_REQUIRED=1.1
 XVMC_REQUIRED=1.0.6
@@ -1850,8 +1850,14 @@ fi
 if test x"$enable_dri3" = xyes; then
 DEFINES="$DEFINES -DHAVE_DRI3"
 
-dri3_modules="x11-xcb xcb >= $XCB_REQUIRED xcb-dri3 >= $XCBDRI3_REQUIRED 
xcb-xfixes xcb-present >= $XCBPRESENT_REQUIRED xcb-sync xshmfence >= 
$XSHMFENCE_REQUIRED"
+dri3_modules="x11-xcb xcb >= $XCB_REQUIRED xcb-dri3 xcb-xfixes xcb-present 
xcb-sync xshmfence >= $XSHMFENCE_REQUIRED"
 PKG_CHECK_MODULES([XCB_DRI3], [$dri3_modules])
+dri3_modifier_modules="xcb-dri3 >= $XCBDRI3_MODIFIERS_REQUIRED xcb-present 
>= $XCBPRESENT_MODIFIERS_REQUIRES"
+PKG_CHECK_MODULES([XCB_DRI3_MODIFIERS], [$dri3_modifier_modules], 
[have_dri3_modifiers=yes], [have_dri3_modifiers=no])
+
+if test "x$have_dri3_modifiers" == xyes; then
+DEFINES="$DEFINES -DHAVE_DRI3_MODIFIERS"
+fi
 fi
 
 AM_CONDITIONAL(HAVE_PLATFORM_X11, echo "$platforms" | grep -q 'x11')
diff --git a/meson.build b/meson.build
index e21ac74a1e..557e9ef339 100644
--- a/meson.build
+++ b/meson.build
@@ -1235,7 +1235,7 @@ if with_platform_x11
 dep_xcb_dri2 = dependency('xcb-dri2', version : '>= 1.8')
 
 if with_dri3
-  pre_args += '-DHAVE_DRI3'
+  pre_args += '-DHAVE_DRI3 -DHAVE_DRI3_MODIFIERS'
   dep_xcb_dri3 = dependency('xcb-dri3', version : '>= 1.13')
   dep_xcb_present = dependency('xcb-present', version: '>= 1.13')
   dep_xcb_sync = dependency('xcb-sync')
diff --git a/src/egl/drivers/dri2/platform_x11_dri3.c 
b/src/egl/drivers/dri2/platform_x11_dri3.c
index dce33561a6..de60e952da 100644
--- a/src/egl/drivers/dri2/platform_x11_dri3.c
+++ b/src/egl/drivers/dri2/platform_x11_dri3.c
@@ -327,6 +327,7 @@ dri3_create_image_khr_pixmap_from_buffers(_EGLDisplay 
*disp, _EGLContext *ctx,
   EGLClientBuffer buffer,
   const EGLint *attr_list)
 {
+#ifdef HAVE_DRI3_MODIFIERS
struct dri2_egl_display *dri2_dpy = dri2_egl_display(disp);
struct dri2_egl_image *dri2_img;
xcb_dri3_buffers_from_pixmap_cookie_t bp_cookie;
@@ -376,6 +377,9 @@ dri3_create_image_khr_pixmap_from_buffers(_EGLDisplay 
*disp, _EGLContext *ctx,
}
 
return _img->base;
+#else
+   return NULL;
+#endif
 }
 
 static _EGLImage *
diff --git a/src/loader/loader_dri3_helper.c b/src/loader/loader_dri3_helper.c
index 585f7ce3ec..c1d94c3c21 100644
--- a/src/loader/loader_dri3_helper.c
+++ b/src/loader/loader_dri3_helper.c
@@ -389,6 +389,7 @@ dri3_handle_present_event(struct loader_dri3_drawable *draw,
 /* If the server tells us that our allocation is suboptimal, we
   * reallocate once.
   */
+#ifdef HAVE_DRI3_MODIFIERS
  if (ce->mode == XCB_PRESENT_COMPLETE_MODE_SUBOPTIMAL_COPY &&
  draw->last_present_mode != ce->mode) {
 for (int b = 0; b < ARRAY_SIZE(draw->buffers); b++) {
@@ -396,7 +397,7 @@ dri3_handle_present_event(struct loader_dri3_drawable *draw,
   draw->buffers[b]->reallocate = true;
 }
  }
-
+#endif
  draw->last_present_mode = ce->mode;
 
  if (draw->vtable->show_fps)
@@ -903,10 +904,10 @@ loader_dri3_swap_buffers_msc(struct

Mesa (master): r600: consolidate PIPE_BIND_SHARED/SCANOUT handling

2018-03-16 Thread Michel Dänzer 
Module: Mesa
Branch: master
Commit: f099c3aef1635f05f295969d296375fe9983a53a
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=f099c3aef1635f05f295969d296375fe9983a53a

Author: Marek Olšák 
Date:   Thu Mar 15 18:39:52 2018 +0100

r600: consolidate PIPE_BIND_SHARED/SCANOUT handling

(Ported from radeonsi commit f70f6baaa3bb0f8b280ac2eaea69bbffaf7de840)

Allows cached BOs to be reused in more cases.

Bugzilla: https://bugs.freedesktop.org/105171
Reviewed-by: Marek Olšák 
Signed-off-by: Michel Dänzer 

---

 src/gallium/drivers/r600/r600_buffer_common.c | 14 --
 src/gallium/drivers/r600/r600_texture.c   |  4 
 2 files changed, 4 insertions(+), 14 deletions(-)

diff --git a/src/gallium/drivers/r600/r600_buffer_common.c 
b/src/gallium/drivers/r600/r600_buffer_common.c
index 501b96fa0b..ca19af9b2e 100644
--- a/src/gallium/drivers/r600/r600_buffer_common.c
+++ b/src/gallium/drivers/r600/r600_buffer_common.c
@@ -167,21 +167,15 @@ void r600_init_resource_fields(struct r600_common_screen 
*rscreen,
 RADEON_FLAG_GTT_WC;
}
 
-   /* Only displayable single-sample textures can be shared between
-* processes. */
-   if (res->b.b.target == PIPE_BUFFER ||
-   res->b.b.nr_samples >= 2 ||
-   (rtex->surface.micro_tile_mode != RADEON_MICRO_MODE_DISPLAY &&
-/* Raven doesn't use display micro mode for 32bpp, so check this: 
*/
-!(res->b.b.bind & PIPE_BIND_SCANOUT)))
+   /* Displayable and shareable surfaces are not suballocated. */
+   if (res->b.b.bind & (PIPE_BIND_SHARED | PIPE_BIND_SCANOUT))
+   res->flags |= RADEON_FLAG_NO_SUBALLOC; /* shareable */
+   else
res->flags |= RADEON_FLAG_NO_INTERPROCESS_SHARING;
 
if (rscreen->debug_flags & DBG_NO_WC)
res->flags &= ~RADEON_FLAG_GTT_WC;
 
-   if (res->b.b.bind & PIPE_BIND_SHARED)
-   res->flags |= RADEON_FLAG_NO_SUBALLOC;
-
/* Set expected VRAM and GART usage for the buffer. */
res->vram_usage = 0;
res->gart_usage = 0;
diff --git a/src/gallium/drivers/r600/r600_texture.c 
b/src/gallium/drivers/r600/r600_texture.c
index fbcc878a24..806bc278b0 100644
--- a/src/gallium/drivers/r600/r600_texture.c
+++ b/src/gallium/drivers/r600/r600_texture.c
@@ -953,10 +953,6 @@ r600_texture_create_object(struct pipe_screen *screen,
r600_init_resource_fields(rscreen, resource, rtex->size,
  rtex->surface.surf_alignment);
 
-   /* Displayable surfaces are not suballocated. */
-   if (resource->b.b.bind & PIPE_BIND_SCANOUT)
-   resource->flags |= RADEON_FLAG_NO_SUBALLOC;
-
if (!r600_alloc_resource(rscreen, resource)) {
FREE(rtex);
return NULL;

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Mesa (master): intel/compiler: Check for unsupported register sizes.

2018-03-16 Thread Rafael Antognolli 
Module: Mesa
Branch: master
Commit: f89e735719a63d674f12a892341ce86e10d82d82
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=f89e735719a63d674f12a892341ce86e10d82d82

Author: Rafael Antognolli 
Date:   Tue Mar 13 16:58:21 2018 -0700

intel/compiler: Check for unsupported register sizes.

Make sure we don't emit 64 bit types if the hardware doesn't support
them.

Signed-off-by: Rafael Antognolli 
Suggested-by: Kenneth Graunke 
Reviewed-by: Matt Turner 

---

 src/intel/compiler/brw_reg_type.c | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/src/intel/compiler/brw_reg_type.c 
b/src/intel/compiler/brw_reg_type.c
index 704d6c9e1d..60240ba151 100644
--- a/src/intel/compiler/brw_reg_type.c
+++ b/src/intel/compiler/brw_reg_type.c
@@ -204,6 +204,9 @@ brw_reg_type_to_hw_type(const struct gen_device_info 
*devinfo,
   table = gen4_hw_type;
}
 
+   assert(devinfo->has_64bit_types || brw_reg_type_to_size(type) < 8 ||
+  type == BRW_REGISTER_TYPE_NF);
+
if (file == BRW_IMMEDIATE_VALUE) {
   assert(table[type].imm_type != (enum hw_imm_type)INVALID);
   return table[type].imm_type;

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Mesa (master): loader: Include include/drm-uapi in the autotools build

2018-03-16 Thread Jason Ekstrand 
Module: Mesa
Branch: master
Commit: 315ee5faecf3c3d2a435485ce9ee8523759b5da9
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=315ee5faecf3c3d2a435485ce9ee8523759b5da9

Author: Jason Ekstrand 
Date:   Thu Mar 15 14:13:27 2018 -0700

loader: Include include/drm-uapi in the autotools build

We're already including it in the meson build.  This fixes build issues
on systems which have a drm_fourcc.h that doesn't have modifiers.

Reviewed-by: Dylan Baker 
Reviewed-by: Emil Velikov 

---

 src/loader/Makefile.am | 1 +
 1 file changed, 1 insertion(+)

diff --git a/src/loader/Makefile.am b/src/loader/Makefile.am
index a0e52c1c89..7625256428 100644
--- a/src/loader/Makefile.am
+++ b/src/loader/Makefile.am
@@ -30,6 +30,7 @@ AM_CPPFLAGS = \
-DUSE_DRICONF \
$(DEFINES) \
-I$(top_srcdir)/include \
+   -I$(top_srcdir)/include/drm-uapi \
-I$(top_srcdir)/src \
$(VISIBILITY_CFLAGS) \
$(XCB_DRI3_CFLAGS) \

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Mesa (master): egl/dri2: move wayland header inclusion where applicable

2018-03-16 Thread Emil Velikov 
Module: Mesa
Branch: master
Commit: 9fa1d822bf0e70ff982aa73fe6ad68d9883b4b0a
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=9fa1d822bf0e70ff982aa73fe6ad68d9883b4b0a

Author: Emil Velikov 
Date:   Wed Mar 14 17:31:27 2018 +

egl/dri2: move wayland header inclusion where applicable

Instead of indirectly pulling the wayland headers everywhere, use
forward declarations and #include only as needed.

Should effectively fix build errors like the following:

make[5]: Entering directory
'/.../src/gallium/state_trackers/omx/tizonia'
   CC   h264dprc.lo
In file included from h264dprc.c:45:0:
.../src/egl/drivers/dri2/egl_dri2.h:47:10: fatal error:
wayland/wayland-egl/wayland-egl-backend.h: No such file or directory
  #include "wayland/wayland-egl/wayland-egl-backend.h"

Cc: Dylan Baker 
Signed-off-by: Emil Velikov 
Acked-by: Eric Engestrom 
Tested-by: Andy Furniss 

---

 src/egl/drivers/dri2/egl_dri2.c |  1 +
 src/egl/drivers/dri2/egl_dri2.h | 12 +---
 src/egl/drivers/dri2/platform_wayland.c |  2 ++
 3 files changed, 12 insertions(+), 3 deletions(-)

diff --git a/src/egl/drivers/dri2/egl_dri2.c b/src/egl/drivers/dri2/egl_dri2.c
index 864f7eb0c6..535806e4bf 100644
--- a/src/egl/drivers/dri2/egl_dri2.c
+++ b/src/egl/drivers/dri2/egl_dri2.c
@@ -48,6 +48,7 @@
 #include 
 
 #ifdef HAVE_WAYLAND_PLATFORM
+#include 
 #include "wayland-drm.h"
 #include "wayland-drm-client-protocol.h"
 #include "linux-dmabuf-unstable-v1-client-protocol.h"
diff --git a/src/egl/drivers/dri2/egl_dri2.h b/src/egl/drivers/dri2/egl_dri2.h
index bd637f73c9..adabc527f8 100644
--- a/src/egl/drivers/dri2/egl_dri2.h
+++ b/src/egl/drivers/dri2/egl_dri2.h
@@ -43,9 +43,15 @@
 #endif
 
 #ifdef HAVE_WAYLAND_PLATFORM
-#include 
-#include "wayland/wayland-egl/wayland-egl-backend.h"
-/* forward declarations of protocol elements */
+/* forward declarations to avoid pulling wayland headers everywhere */
+struct wl_egl_window;
+struct wl_event_queue;
+struct wl_callback;
+struct wl_display;
+struct wl_drm;
+struct wl_registry;
+struct wl_shm;
+struct wl_surface;
 struct zwp_linux_dmabuf_v1;
 #endif
 
diff --git a/src/egl/drivers/dri2/platform_wayland.c 
b/src/egl/drivers/dri2/platform_wayland.c
index 877f7933b9..94f7defa65 100644
--- a/src/egl/drivers/dri2/platform_wayland.c
+++ b/src/egl/drivers/dri2/platform_wayland.c
@@ -49,6 +49,8 @@
 #include "wayland-drm-client-protocol.h"
 #include "linux-dmabuf-unstable-v1-client-protocol.h"
 
+#include "wayland/wayland-egl/wayland-egl-backend.h"
+
 #ifndef DRM_FORMAT_MOD_INVALID
 #define DRM_FORMAT_MOD_INVALID ((1ULL << 56) - 1)
 #endif

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Mesa (master): tgsi: move tgsi_processor_to_shader_stage() to a header

2018-03-16 Thread Emil Velikov 
Module: Mesa
Branch: master
Commit: f7f95310f0ac3a89419c866caf962c17ea1d599d
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=f7f95310f0ac3a89419c866caf962c17ea1d599d

Author: Emil Velikov 
Date:   Thu Mar 15 12:12:58 2018 +

tgsi: move tgsi_processor_to_shader_stage() to a header

This way we can utilise it with later patches.

Signed-off-by: Emil Velikov 
Reviewed-by: Brian Paul 
Reviewed-by: Marek Olšák 

---

 src/gallium/auxiliary/nir/tgsi_to_nir.c | 16 +---
 src/gallium/auxiliary/tgsi/tgsi_from_mesa.h | 15 +++
 2 files changed, 16 insertions(+), 15 deletions(-)

diff --git a/src/gallium/auxiliary/nir/tgsi_to_nir.c 
b/src/gallium/auxiliary/nir/tgsi_to_nir.c
index f8df4c1013..bbbf101157 100644
--- a/src/gallium/auxiliary/nir/tgsi_to_nir.c
+++ b/src/gallium/auxiliary/nir/tgsi_to_nir.c
@@ -34,6 +34,7 @@
 #include "tgsi/tgsi_dump.h"
 #include "tgsi/tgsi_info.h"
 #include "tgsi/tgsi_scan.h"
+#include "tgsi/tgsi_from_mesa.h"
 
 #define SWIZ(X, Y, Z, W) (unsigned[4]){  \
   TGSI_SWIZZLE_##X,  \
@@ -1887,21 +1888,6 @@ ttn_add_output_stores(struct ttn_compile *c)
}
 }
 
-static gl_shader_stage
-tgsi_processor_to_shader_stage(unsigned processor)
-{
-   switch (processor) {
-   case PIPE_SHADER_FRAGMENT:  return MESA_SHADER_FRAGMENT;
-   case PIPE_SHADER_VERTEX:return MESA_SHADER_VERTEX;
-   case PIPE_SHADER_GEOMETRY:  return MESA_SHADER_GEOMETRY;
-   case PIPE_SHADER_TESS_CTRL: return MESA_SHADER_TESS_CTRL;
-   case PIPE_SHADER_TESS_EVAL: return MESA_SHADER_TESS_EVAL;
-   case PIPE_SHADER_COMPUTE:   return MESA_SHADER_COMPUTE;
-   default:
-  unreachable("invalid TGSI processor");
-   }
-}
-
 struct nir_shader *
 tgsi_to_nir(const void *tgsi_tokens,
 const nir_shader_compiler_options *options)
diff --git a/src/gallium/auxiliary/tgsi/tgsi_from_mesa.h 
b/src/gallium/auxiliary/tgsi/tgsi_from_mesa.h
index bfaa48d7fa..b4d540baab 100644
--- a/src/gallium/auxiliary/tgsi/tgsi_from_mesa.h
+++ b/src/gallium/auxiliary/tgsi/tgsi_from_mesa.h
@@ -68,4 +68,19 @@ pipe_shader_type_from_mesa(gl_shader_stage stage)
}
 }
 
+static inline gl_shader_stage
+tgsi_processor_to_shader_stage(unsigned processor)
+{
+   switch (processor) {
+   case PIPE_SHADER_FRAGMENT:  return MESA_SHADER_FRAGMENT;
+   case PIPE_SHADER_VERTEX:return MESA_SHADER_VERTEX;
+   case PIPE_SHADER_GEOMETRY:  return MESA_SHADER_GEOMETRY;
+   case PIPE_SHADER_TESS_CTRL: return MESA_SHADER_TESS_CTRL;
+   case PIPE_SHADER_TESS_EVAL: return MESA_SHADER_TESS_EVAL;
+   case PIPE_SHADER_COMPUTE:   return MESA_SHADER_COMPUTE;
+   default:
+  unreachable("invalid TGSI processor");
+   }
+}
+
 #endif /* TGSI_FROM_MESA_H */

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Mesa (master): vulkan/wsi/x11: use ARRAY_SIZE where applicable

2018-03-16 Thread Emil Velikov 
Module: Mesa
Branch: master
Commit: 19ec81775636171af4386fe17fc301917c4e97f7
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=19ec81775636171af4386fe17fc301917c4e97f7

Author: Emil Velikov 
Date:   Tue Mar 13 11:06:28 2018 +

vulkan/wsi/x11: use ARRAY_SIZE where applicable

Use the handy macro instead of hard coded numbers.

Fixes: c80c08e2260 ("vulkan/wsi/x11: Add support for DRI3 v1.2")
Signed-off-by: Emil Velikov 
Reviewed-by: Daniel Stone 

---

 src/vulkan/wsi/wsi_common_x11.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/src/vulkan/wsi/wsi_common_x11.c b/src/vulkan/wsi/wsi_common_x11.c
index 5f29ead3f2..e7a7da1928 100644
--- a/src/vulkan/wsi/wsi_common_x11.c
+++ b/src/vulkan/wsi/wsi_common_x11.c
@@ -1398,7 +1398,7 @@ x11_surface_create_swapchain(VkIcdSurfaceBase 
*icd_surface,
   }
}
 
-   for (int i = 0; i < 2; i++)
+   for (int i = 0; i < ARRAY_SIZE(modifiers); i++)
   vk_free(pAllocator, modifiers[i]);
*swapchain_out = >base;
 
@@ -1409,7 +1409,7 @@ fail_init_images:
   x11_image_finish(chain, pAllocator, >images[j]);
 
 fail_register:
-   for (int i = 0; i < 2; i++)
+   for (int i = 0; i < ARRAY_SIZE(modifiers); i++)
   vk_free(pAllocator, modifiers[i]);
 
xcb_unregister_for_special_event(chain->conn, chain->special_event);

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Mesa (master): vulkan/wsi/x11: correct DRI3 version in comment

2018-03-16 Thread Emil Velikov 
Module: Mesa
Branch: master
Commit: d091c9c4cf6f872d444d02d50e36aa65b49e95fa
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=d091c9c4cf6f872d444d02d50e36aa65b49e95fa

Author: Emil Velikov 
Date:   Tue Mar 13 11:29:52 2018 +

vulkan/wsi/x11: correct DRI3 version in comment

During development the version was bumped, yet the comment did not get
an update.

Fixes: c80c08e2260 ("vulkan/wsi/x11: Add support for DRI3 v1.2")
Signed-off-by: Emil Velikov 
Reviewed-by: Daniel Stone 

---

 src/vulkan/wsi/wsi_common_x11.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/vulkan/wsi/wsi_common_x11.c b/src/vulkan/wsi/wsi_common_x11.c
index e7a7da1928..0667aa1dbc 100644
--- a/src/vulkan/wsi/wsi_common_x11.c
+++ b/src/vulkan/wsi/wsi_common_x11.c
@@ -1047,7 +1047,7 @@ x11_image_init(VkDevice device_h, struct x11_swapchain 
*chain,
image->pixmap = xcb_generate_id(chain->conn);
 
if (image->base.drm_modifier != DRM_FORMAT_MOD_INVALID) {
-  /* If the image has a modifier, we must have DRI3 v1.1. */
+  /* If the image has a modifier, we must have DRI3 v1.2. */
   assert(chain->has_dri3_modifiers);
 
   cookie =

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Mesa (master): st/mesa: simplify st_init_limits() via tgsi_processor_to_shader_stage

2018-03-16 Thread Emil Velikov 
Module: Mesa
Branch: master
Commit: 3a9fb4f7ad6de14b5560b85d5f1c723d0555a49b
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=3a9fb4f7ad6de14b5560b85d5f1c723d0555a49b

Author: Emil Velikov 
Date:   Thu Mar 15 12:51:03 2018 +

st/mesa: simplify st_init_limits() via tgsi_processor_to_shader_stage

Reuse the tgis helper and remove a bunch of duplicated code.

Signed-off-by: Emil Velikov 
Reviewed-by: Brian Paul 
Reviewed-by: Marek Olšák 

---

 src/mesa/state_tracker/st_extensions.c | 45 +-
 1 file changed, 6 insertions(+), 39 deletions(-)

diff --git a/src/mesa/state_tracker/st_extensions.c 
b/src/mesa/state_tracker/st_extensions.c
index 3b8e226e67..bea61f21cb 100644
--- a/src/mesa/state_tracker/st_extensions.c
+++ b/src/mesa/state_tracker/st_extensions.c
@@ -36,6 +36,7 @@
 #include "pipe/p_context.h"
 #include "pipe/p_defines.h"
 #include "pipe/p_screen.h"
+#include "tgsi/tgsi_from_mesa.h"
 #include "util/u_math.h"
 
 #include "st_context.h"
@@ -166,52 +167,18 @@ void st_init_limits(struct pipe_screen *screen,
 screen->get_compiler_options(screen, PIPE_SHADER_IR_NIR, sh);
   }
 
-  switch (sh) {
-  case PIPE_SHADER_FRAGMENT:
- pc = >Program[MESA_SHADER_FRAGMENT];
- options = >ShaderCompilerOptions[MESA_SHADER_FRAGMENT];
- c->ShaderCompilerOptions[MESA_SHADER_FRAGMENT].NirOptions =
-nir_options;
- break;
-  case PIPE_SHADER_VERTEX:
- pc = >Program[MESA_SHADER_VERTEX];
- options = >ShaderCompilerOptions[MESA_SHADER_VERTEX];
- c->ShaderCompilerOptions[MESA_SHADER_VERTEX].NirOptions =
-nir_options;
- break;
-  case PIPE_SHADER_GEOMETRY:
- pc = >Program[MESA_SHADER_GEOMETRY];
- options = >ShaderCompilerOptions[MESA_SHADER_GEOMETRY];
- c->ShaderCompilerOptions[MESA_SHADER_GEOMETRY].NirOptions =
-nir_options;
- break;
-  case PIPE_SHADER_TESS_CTRL:
- pc = >Program[MESA_SHADER_TESS_CTRL];
- options = >ShaderCompilerOptions[MESA_SHADER_TESS_CTRL];
- c->ShaderCompilerOptions[MESA_SHADER_TESS_CTRL].NirOptions =
-nir_options;
- break;
-  case PIPE_SHADER_TESS_EVAL:
- pc = >Program[MESA_SHADER_TESS_EVAL];
- options = >ShaderCompilerOptions[MESA_SHADER_TESS_EVAL];
- c->ShaderCompilerOptions[MESA_SHADER_TESS_EVAL].NirOptions =
-nir_options;
- break;
-  case PIPE_SHADER_COMPUTE:
- pc = >Program[MESA_SHADER_COMPUTE];
- options = >ShaderCompilerOptions[MESA_SHADER_COMPUTE];
- c->ShaderCompilerOptions[MESA_SHADER_COMPUTE].NirOptions =
-nir_options;
+  const gl_shader_stage stage = tgsi_processor_to_shader_stage(sh);
+  pc = >Program[stage];
+  options = >ShaderCompilerOptions[stage];
+  c->ShaderCompilerOptions[stage].NirOptions = nir_options;
 
+  if (sh == PIPE_SHADER_COMPUTE) {
  if (!screen->get_param(screen, PIPE_CAP_COMPUTE))
 continue;
  supported_irs =
 screen->get_shader_param(screen, sh, 
PIPE_SHADER_CAP_SUPPORTED_IRS);
  if (!(supported_irs & (1 << PIPE_SHADER_IR_TGSI)))
 continue;
- break;
-  default:
- assert(0);
   }
 
   pc->MaxTextureImageUnits =

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Mesa (master): egl/android: Implement the eglSwapinterval for Android.

2018-03-16 Thread Emil Velikov 
Module: Mesa
Branch: master
Commit: 5fc21c6044166b199d32006d37f94e6d54aef62a
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=5fc21c6044166b199d32006d37f94e6d54aef62a

Author: Wu, Zhongmin 
Date:   Thu Jan 18 15:39:22 2018 +0800

egl/android: Implement the eglSwapinterval for Android.

Implement the eglSwapinterval for Android platform to
enable the async mode for some GFX benchmarks such as
Daimler C217, CityBench.

Results of the dEQP-EGL.*swap_interval tests

'dEQP-EGL.functional.query_config.get_config_attrib.max_swap_interval'..
'dEQP-EGL.functional.query_config.get_config_attrib.min_swap_interval'..
'dEQP-EGL.functional.choose_config.simple.selection_only.max_swap_interval'..
'dEQP-EGL.functional.choose_config.simple.selection_only.min_swap_interval'..
'dEQP-EGL.functional.choose_config.simple.selection_and_sort.max_swap_interval'..
'dEQP-EGL.functional.choose_config.simple.selection_and_sort.min_swap_interval'..
'dEQP-EGL.functional.negative_api.swap_interval'..

 Test run totals:
   Passed:7/7 (100.0%)
   Failed:0/7 (0.0%)
   Not supported: 0/7 (0.0%)
   Warnings:  0/7 (0.0%)

Signed-off-by: Zhongmin Wu 
Reviewed-by: Eric Engestrom 
Reviewed-by: Emil Velikov 
Reviewed-by: Tomasz Figa 
[Emil Velikov: polish inline comment, add dEQP stats, s/dpy/disp/]
Signed-off-by: Emil Velikov 

---

 src/egl/drivers/dri2/platform_android.c | 21 +
 1 file changed, 21 insertions(+)

diff --git a/src/egl/drivers/dri2/platform_android.c 
b/src/egl/drivers/dri2/platform_android.c
index 4f25cb7469..7f1a496ea2 100644
--- a/src/egl/drivers/dri2/platform_android.c
+++ b/src/egl/drivers/dri2/platform_android.c
@@ -417,6 +417,20 @@ droid_destroy_surface(_EGLDriver *drv, _EGLDisplay *disp, 
_EGLSurface *surf)
return EGL_TRUE;
 }
 
+static EGLBoolean
+droid_swap_interval(_EGLDriver *drv, _EGLDisplay *dpy,
+   _EGLSurface *surf, EGLint interval)
+{
+   struct dri2_egl_surface *dri2_surf = dri2_egl_surface(surf);
+   struct ANativeWindow *window = dri2_surf->window;
+
+   if (window->setSwapInterval(window, interval))
+  return EGL_FALSE;
+
+   surf->SwapInterval = interval;
+   return EGL_TRUE;
+}
+
 static int
 update_buffers(struct dri2_egl_surface *dri2_surf)
 {
@@ -1127,6 +1141,7 @@ static const struct dri2_egl_display_vtbl 
droid_display_vtbl = {
.swap_buffers = droid_swap_buffers,
.swap_buffers_with_damage = dri2_fallback_swap_buffers_with_damage, /* 
Android implements the function */
.swap_buffers_region = dri2_fallback_swap_buffers_region,
+   .swap_interval = droid_swap_interval,
 #if ANDROID_API_LEVEL >= 23
.set_damage_region = droid_set_damage_region,
 #else
@@ -1241,6 +1256,12 @@ dri2_initialize_android(_EGLDriver *drv, _EGLDisplay 
*disp)
 
dri2_setup_screen(disp);
 
+   /* We set the maximum swap interval as 1 for Android platform, since it is
+* the maximum value supported by Android according to the value of
+* ANativeWindow::maxSwapInterval.
+*/
+   dri2_setup_swap_interval(disp, 1);
+
if (!droid_add_configs_for_visuals(drv, disp)) {
   err = "DRI2: failed to add configs";
   goto cleanup;

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Mesa (master): mesa: RGB9_E5 invalid for CopyTexSubImage* in GLES

2018-03-16 Thread Juan Antonio Suárez Romero 
Module: Mesa
Branch: master
Commit: 705a6446b4301498b83789a19d81aed4e922548b
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=705a6446b4301498b83789a19d81aed4e922548b

Author: Juan A. Suarez Romero 
Date:   Wed Mar 14 17:09:34 2018 +

mesa: RGB9_E5 invalid for CopyTexSubImage* in GLES

According to OpenGL ES 3.2, section 8.6, CopyTexSubImage* should return
an INVALID_OPERATION if the internalformat of the texture is RGB9_E5.

This fixes
dEQP-GLES31.functional.debug.negative_coverage.*.copytexsubimage2d_texture_internalformat.

Reviewed-by: Tapani Pälli 

---

 src/mesa/main/teximage.c | 14 ++
 1 file changed, 14 insertions(+)

diff --git a/src/mesa/main/teximage.c b/src/mesa/main/teximage.c
index 928e50d472..9c13e6d7cf 100644
--- a/src/mesa/main/teximage.c
+++ b/src/mesa/main/teximage.c
@@ -2623,6 +2623,20 @@ copytexsubimage_error_check(struct gl_context *ctx, 
GLuint dimensions,
   return GL_TRUE;
}
 
+   /* From OpenGL ES 3.2 spec, section 8.6:
+*
+* "An INVALID_OPERATION error is generated by CopyTexSubImage3D,
+*  CopyTexImage2D, or CopyTexSubImage2D if the internalformat of the
+*  texture image being (re)specified is RGB9_E5"
+*/
+   if (texImage->InternalFormat == GL_RGB9_E5 &&
+   !_mesa_is_desktop_gl(ctx)) {
+  _mesa_error(ctx, GL_INVALID_OPERATION,
+  "%s(invalid internal format %s)", caller,
+  _mesa_enum_to_string(texImage->InternalFormat));
+  return GL_TRUE;
+   }
+
if (!_mesa_source_buffer_exists(ctx, texImage->_BaseFormat)) {
   _mesa_error(ctx, GL_INVALID_OPERATION,
   "%s(missing readbuffer, format=%s)", caller,

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Mesa (17.3): 66 new commits

2018-03-16 Thread Juan Antonio Suárez Romero 
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=6393cf2fa3c949b8c9e0ba4b14262591dbde9957
Author: Kenneth Graunke 
Date:   Tue Oct 31 10:02:02 2017 -0700

i965: Emit CS stall before MEDIA_VFE_STATE.

This fixes hangs on GFXBench 5's Aztec Ruins benchmark.

Unfortunately, it regresses OglCSCloth performance by about 10%. There
are some ideas for fixing that.

The Vulkan driver already emits this stall.

Reviewed-by: Matt Turner 
(cherry picked from commit 55a97db52347f62111a24715078c6035380d3e19)

Squashed with:

i965: Move PIPE_CONTROL defines and prototypes to brw_pipe_control.h.

We need to be able to emit PIPE_CONTROLs from genX_state_upload.c,
which can't safely include brw_defines.h because it conflicts with
genxml.  Move all the PIPE_CONTROL related stuff together into a
separate header.

Reviewed-by: Matt Turner 
(cherry picked from commit bfe0f3a7027c3104a6ddc662129091c8093e7410)

Squashed with:

i965: include brw_pipe_control.h in the tarball

Fixes: bfe0f3a7027 ("i965: Move PIPE_CONTROL defines and prototypes to
brw_pipe_control.h.")
Signed-off-by: Emil Velikov 
(cherry picked from commit 526945f7dc425ffbb8511b33301f6b1827ee4956)

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=4fd242e9902690c1f3048206802dc6feb069134a
Author: Vadym Shovkoplias 
Date:   Tue Feb 13 11:38:22 2018 -0700

mesa: add glsl version query (v4)

Add support for GL_NUM_SHADING_LANGUAGE_VERSIONS
and glGetStringi for GL_SHADING_LANGUAGE_VERSION

v2:
  - Combine similar functionality into
_mesa_get_shading_language_version() function.
  - Change GLSL version return mechanism.
v3:
  - Add return of empty string for GLSL ver 1.10.
  - Move _mesa_get_shading_language_version() function
to src/mesa/main/version.c.
v4:
  - Add OpenGL version check.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=104915
Signed-off-by: Andriy Khulap 
Signed-off-by: Vadym Shovkoplias 
Reviewed-by: Brian Paul 
(cherry picked from commit a553c54abf92533daf442073dd3408c35f57d8ba)

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=893d60585068ce3d4c85d71ddb48b6c169431a4a
Author: Iago Toral Quiroga 
Date:   Wed Nov 29 10:50:42 2017 +0100

i965/vec4: use a temp register to compute offsets for pull loads

64-bit pull loads are implemented by emitting 2 separate
32-bit pull load messages, where the second message loads from
an offset at +16B.

That addition of 16B to the original offset should not alter the
original offset register used as source for the pull load instruction
though, since the compiler might use that same offset register in other
instructions (for example, for other pull loads in the shader code
that take that same offset as reference).

If the pull load is 32-bit then we only need to emit one message and
we don't need to do offset calculations, but in that case the optimizer
should be able to drop the redundant MOV.

Fixes the following test on Haswell:
KHR-GL45.gpu_shader_fp64.fp64.max_uniform_components

Reviewed-by: Matt Turner 
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=103007
(cherry picked from commit 8620f7ebbc763dc1bbbc825d31cacfdd84433e05)

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=b093ff9574525217cb880e1c8473cb3c41ab5b9b
Author: Jordan Justen 
Date:   Tue Dec 12 11:44:01 2017 -0800

program: Don't reset SamplersValidated when restoring from shader cache

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=103988
Signed-off-by: Jordan Justen 
Reviewed-by: Timothy Arceri 
(cherry picked from commit dc07bb5fd188a4352ec90edb6c6107ae1ce11b50)

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=98b6a6860c97cec1323573f4ca47d966a43da3ea
Author: Tim Rowley 
Date:   Tue Jan 2 10:48:21 2018 -0600

swr/rast: fix MemoryBuffer build break for llvm-6

LLVM api change.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=104381
Tested-by: Laurent Carlier 
Reviewed-By: Bruce Cherniak 
(cherry picked from commit ad218754c79e0af61d5ba225a4b195cb55c2cac9)

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=5cb505b3517324b2f432fb3d538d925bbad88c0a
Author: Tobias Droste 
Date:   Mon Nov 6 22:09:50 2017 +0100

gallivm: Use new LLVM fast-math-flags API

LLVM 6 changed the API on the fast-math-flags:

Mesa (master): etnaviv: remove superfluous \n from DBG(..) callers

2018-03-16 Thread Christian Gmeiner 
Module: Mesa
Branch: master
Commit: 5e51f72374ddd9394e69ae8c5733b004887a5d89
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=5e51f72374ddd9394e69ae8c5733b004887a5d89

Author: Christian Gmeiner 
Date:   Sat Mar 10 15:56:17 2018 +0100

etnaviv: remove superfluous \n from DBG(..) callers

The DBG(..) macro appends a \n already so there is no
need to do it twice.

Signed-off-by: Christian Gmeiner 

---

 src/gallium/drivers/etnaviv/etnaviv_blt.c   | 2 +-
 src/gallium/drivers/etnaviv/etnaviv_rs.c| 2 +-
 src/gallium/drivers/etnaviv/etnaviv_screen.c| 6 +++---
 src/gallium/drivers/etnaviv/etnaviv_texture_state.c | 2 +-
 4 files changed, 6 insertions(+), 6 deletions(-)

diff --git a/src/gallium/drivers/etnaviv/etnaviv_blt.c 
b/src/gallium/drivers/etnaviv/etnaviv_blt.c
index ec3eac9b2a..5d783a4ad9 100644
--- a/src/gallium/drivers/etnaviv/etnaviv_blt.c
+++ b/src/gallium/drivers/etnaviv/etnaviv_blt.c
@@ -556,7 +556,7 @@ etna_blit_blt(struct pipe_context *pctx, const struct 
pipe_blit_info *blit_info)
 void
 etna_clear_blit_blt_init(struct pipe_context *pctx)
 {
-   DBG("etnaviv: Using BLT blit engine\n");
+   DBG("etnaviv: Using BLT blit engine");
pctx->clear = etna_clear_blt;
pctx->blit = etna_blit_blt;
 }
diff --git a/src/gallium/drivers/etnaviv/etnaviv_rs.c 
b/src/gallium/drivers/etnaviv/etnaviv_rs.c
index bd40cebb53..b8a3b12ae4 100644
--- a/src/gallium/drivers/etnaviv/etnaviv_rs.c
+++ b/src/gallium/drivers/etnaviv/etnaviv_rs.c
@@ -801,7 +801,7 @@ etna_blit_rs(struct pipe_context *pctx, const struct 
pipe_blit_info *blit_info)
 void
 etna_clear_blit_rs_init(struct pipe_context *pctx)
 {
-   DBG("etnaviv: Using RS blit engine\n");
+   DBG("etnaviv: Using RS blit engine");
pctx->clear = etna_clear_rs;
pctx->blit = etna_blit_rs;
 }
diff --git a/src/gallium/drivers/etnaviv/etnaviv_screen.c 
b/src/gallium/drivers/etnaviv/etnaviv_screen.c
index de341c855b..6c5c00bf2d 100644
--- a/src/gallium/drivers/etnaviv/etnaviv_screen.c
+++ b/src/gallium/drivers/etnaviv/etnaviv_screen.c
@@ -703,9 +703,9 @@ etna_get_specs(struct etna_screen *screen)
else
   screen->specs.halti = -1; /* GC7000nanolite / pre-GC2000 except GC880 */
if (screen->specs.halti >= 0)
-  DBG("etnaviv: GPU arch: HALTI%d\n", screen->specs.halti);
+  DBG("etnaviv: GPU arch: HALTI%d", screen->specs.halti);
else
-  DBG("etnaviv: GPU arch: pre-HALTI\n");
+  DBG("etnaviv: GPU arch: pre-HALTI");
 
screen->specs.can_supertile =
   VIV_FEATURE(screen, chipMinorFeatures0, SUPER_TILED);
@@ -821,7 +821,7 @@ etna_get_specs(struct etna_screen *screen)
 
screen->specs.single_buffer = VIV_FEATURE(screen, chipMinorFeatures4, 
SINGLE_BUFFER);
if (screen->specs.single_buffer)
-  DBG("etnaviv: Single buffer mode enabled with %d pixel pipes\n", 
screen->specs.pixel_pipes);
+  DBG("etnaviv: Single buffer mode enabled with %d pixel pipes", 
screen->specs.pixel_pipes);
 
screen->specs.tex_astc = VIV_FEATURE(screen, chipMinorFeatures4, 
TEXTURE_ASTC);
 
diff --git a/src/gallium/drivers/etnaviv/etnaviv_texture_state.c 
b/src/gallium/drivers/etnaviv/etnaviv_texture_state.c
index 0b00ad4969..faa073a71a 100644
--- a/src/gallium/drivers/etnaviv/etnaviv_texture_state.c
+++ b/src/gallium/drivers/etnaviv/etnaviv_texture_state.c
@@ -319,7 +319,7 @@ void
 etna_texture_state_init(struct pipe_context *pctx)
 {
struct etna_context *ctx = etna_context(pctx);
-   DBG("etnaviv: Using state-based texturing\n");
+   DBG("etnaviv: Using state-based texturing");
ctx->base.create_sampler_state = etna_create_sampler_state_state;
ctx->base.delete_sampler_state = etna_delete_sampler_state_state;
ctx->base.create_sampler_view = etna_create_sampler_view_state;

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Mesa (master): nir: add nir_opt_move_load_ubo() optimization pass

2018-03-16 Thread Samuel Pitoiset 
Module: Mesa
Branch: master
Commit: af355aaa07173abdc6861992f4c05ad334b9595b
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=af355aaa07173abdc6861992f4c05ad334b9595b

Author: Samuel Pitoiset 
Date:   Fri Jan 26 12:38:57 2018 +0100

nir: add nir_opt_move_load_ubo() optimization pass

This pass moves load UBO operations just before their first use,
loosely based on nir_opt_move_comparisons.

Signed-off-by: Samuel Pitoiset 
Reviewed-by: Timothy Arceri 

---

 src/compiler/Makefile.sources|   1 +
 src/compiler/nir/meson.build |   1 +
 src/compiler/nir/nir.h   |   2 +
 src/compiler/nir/nir_opt_move_load_ubo.c | 117 +++
 4 files changed, 121 insertions(+)

diff --git a/src/compiler/Makefile.sources b/src/compiler/Makefile.sources
index 37340ba809..55143dbc66 100644
--- a/src/compiler/Makefile.sources
+++ b/src/compiler/Makefile.sources
@@ -266,6 +266,7 @@ NIR_FILES = \
nir/nir_opt_intrinsics.c \
nir/nir_opt_loop_unroll.c \
nir/nir_opt_move_comparisons.c \
+   nir/nir_opt_move_load_ubo.c \
nir/nir_opt_peephole_select.c \
nir/nir_opt_remove_phis.c \
nir/nir_opt_shrink_load.c \
diff --git a/src/compiler/nir/meson.build b/src/compiler/nir/meson.build
index a70c236b95..289bb9ea78 100644
--- a/src/compiler/nir/meson.build
+++ b/src/compiler/nir/meson.build
@@ -160,6 +160,7 @@ files_libnir = files(
   'nir_opt_intrinsics.c',
   'nir_opt_loop_unroll.c',
   'nir_opt_move_comparisons.c',
+  'nir_opt_move_load_ubo.c',
   'nir_opt_peephole_select.c',
   'nir_opt_remove_phis.c',
   'nir_opt_shrink_load.c',
diff --git a/src/compiler/nir/nir.h b/src/compiler/nir/nir.h
index 6a51b7c4ab..7ad19b42c1 100644
--- a/src/compiler/nir/nir.h
+++ b/src/compiler/nir/nir.h
@@ -2791,6 +2791,8 @@ bool nir_opt_loop_unroll(nir_shader *shader, 
nir_variable_mode indirect_mask);
 
 bool nir_opt_move_comparisons(nir_shader *shader);
 
+bool nir_opt_move_load_ubo(nir_shader *shader);
+
 bool nir_opt_peephole_select(nir_shader *shader, unsigned limit);
 
 bool nir_opt_remove_phis(nir_shader *shader);
diff --git a/src/compiler/nir/nir_opt_move_load_ubo.c 
b/src/compiler/nir/nir_opt_move_load_ubo.c
new file mode 100644
index 00..a32f170442
--- /dev/null
+++ b/src/compiler/nir/nir_opt_move_load_ubo.c
@@ -0,0 +1,117 @@
+/*
+ * Copyright © 2016 Intel Corporation
+ * Copyright © 2018 Valve Corporation
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the next
+ * paragraph) shall be included in all copies or substantial portions of the
+ * Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
+ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
+ * IN THE SOFTWARE.
+ */
+
+#include "nir.h"
+
+/**
+ * \file nir_opt_move_load_ubo.c
+ *
+ * This pass moves load UBO operations just before their first use inside
+ * the same basic block.
+ */
+static bool
+move_load_ubo_source(nir_src *src, nir_block *block, nir_instr *before)
+{
+   if (!src->is_ssa)
+  return false;
+
+   nir_instr *src_instr = src->ssa->parent_instr;
+
+   if (src_instr->block == block &&
+   src_instr->type == nir_instr_type_intrinsic &&
+   nir_instr_as_intrinsic(src_instr)->intrinsic == nir_intrinsic_load_ubo) 
{
+
+  exec_node_remove(_instr->node);
+
+  if (before)
+ exec_node_insert_node_before(>node, _instr->node);
+  else
+ exec_list_push_tail(>instr_list, _instr->node);
+
+  return true;
+   }
+   return false;
+}
+
+static bool
+move_load_ubo_source_cb(nir_src *src, void *data)
+{
+   bool *progress = data;
+
+   nir_instr *instr = src->parent_instr;
+   if (move_load_ubo_source(src, instr->block, instr))
+  *progress = true;
+
+   return true; /* nir_foreach_src should keep going */
+}
+
+static bool
+move_load_ubo(nir_block *block)
+{
+   bool progress = false;
+
+   nir_if *iff = nir_block_get_following_if(block);
+   if (iff) {
+  progress |= move_load_ubo_source(>condition, block, NULL);
+   }
+
+   nir_foreach_instr_reverse(instr, block) {
+
+  if (instr->type ==

Mesa (master): radv: run nir_opt_move_load_ubo

2018-03-16 Thread Samuel Pitoiset 
Module: Mesa
Branch: master
Commit: e96a1d27dc69b039575f912d6705546b9c7b3141
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=e96a1d27dc69b039575f912d6705546b9c7b3141

Author: Samuel Pitoiset 
Date:   Thu Mar  8 15:31:14 2018 +0100

radv: run nir_opt_move_load_ubo

Polaris10:
SGPRS: 108560 -> 107856 (-0.65 %)
VGPRS: 74576 -> 74520 (-0.08 %)
Spilled SGPRs: 7375 -> 7113 (-3.55 %)
Code Size: 4273464 -> 4274364 (0.02 %) bytes
Max Waves: 9434 -> 9446 (0.13 %)

Vega10:
Totals from affected shaders:
SGPRS: 108264 -> 107576 (-0.64 %)
VGPRS: 69068 -> 69000 (-0.10 %)
Spilled SGPRs: 7221 -> 6959 (-3.63 %)
Code Size: 3800796 -> 3801496 (0.02 %) bytes
Max Waves: 10687 -> 10709 (0.21 %)

Signed-off-by: Samuel Pitoiset 
Reviewed-by: Timothy Arceri 

---

 src/amd/vulkan/radv_shader.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/src/amd/vulkan/radv_shader.c b/src/amd/vulkan/radv_shader.c
index 704461e02c..180b427a44 100644
--- a/src/amd/vulkan/radv_shader.c
+++ b/src/amd/vulkan/radv_shader.c
@@ -152,6 +152,7 @@ radv_optimize_nir(struct nir_shader *shader)
 } while (progress);
 
 NIR_PASS(progress, shader, nir_opt_shrink_load);
+NIR_PASS(progress, shader, nir_opt_move_load_ubo);
 }
 
 nir_shader *

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