Mesa (master): i965: Use %x instead of %u in debug print.
Module: Mesa Branch: master Commit: a3782a612f1a4aaf8d16bed2113c6c798afd3011 URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=a3782a612f1a4aaf8d16bed2113c6c798afd3011 Author: Kenneth Graunke Date: Fri Apr 6 22:56:48 2018 -0700 i965: Use %x instead of %u in debug print. I mistakenly printed out the address as 0x instead of printing a proper hex number. This was...surprising. --- src/mesa/drivers/dri/i965/intel_batchbuffer.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/mesa/drivers/dri/i965/intel_batchbuffer.c b/src/mesa/drivers/dri/i965/intel_batchbuffer.c index 7286140bcc..55889be732 100644 --- a/src/mesa/drivers/dri/i965/intel_batchbuffer.c +++ b/src/mesa/drivers/dri/i965/intel_batchbuffer.c @@ -64,7 +64,7 @@ dump_validation_list(struct intel_batchbuffer *batch) uint64_t flags = batch->validation_list[i].flags; assert(batch->validation_list[i].handle == batch->exec_bos[i]->gem_handle); - fprintf(stderr, "[%2d]: %2d %-14s %p %s%-7s @ 0x%016llu%s (%"PRIu64"B)\n", + fprintf(stderr, "[%2d]: %2d %-14s %p %s%-7s @ 0x%016llx%s (%"PRIu64"B)\n", i, batch->validation_list[i].handle, batch->exec_bos[i]->name, ___ mesa-commit mailing list mesa-commit@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/mesa-commit
Mesa (master): meson: fix warnings about comparing unlike types
Module: Mesa
Branch: master
Commit: b5f92b6fd4e4ef0358fe464d951893de20048bf6
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=b5f92b6fd4e4ef0358fe464d951893de20048bf6
Author: Dylan Baker
Date: Thu Mar 15 13:30:22 2018 -0700
meson: fix warnings about comparing unlike types
In the old days (0.42.x), when mesa's meson system was written the
recommendation for handling conditional dependencies was to define them
as empty lists. When meson would evaluate the dependencies of a target
it would recursively flatten all of the arguments, and empty lists would
be removed. There are some problems with this, among them that lists and
dependencies have different methods (namely .found()), so the
recommendation changed to use `dependency('', required : false)` for
such cases. This has the advantage of providing a .found() method, so
there is no need to do things like `dep_foo != [] and dep_foo.found()`,
such a dependency should never exist.
I've tested this with 0.42 (the minimum we claim to support) and 0.45.
On 0.45 this removes warnings about comparing unlike types, such as:
meson.build:1337: WARNING: Trying to compare values of different types
(DependencyHolder, list) using !=.
v2: - Use dependency('', required : false) instead of
declare_dependency(), the later will always report that it is
found, which is not what we want.
Signed-off-by: Dylan Baker
Reviewed-by: Caio Marcelo de Oliveira Filho
---
meson.build | 89 ---
src/gallium/auxiliary/meson.build | 2 +-
src/glx/apple/meson.build | 2 +-
src/glx/meson.build | 2 +-
4 files changed, 49 insertions(+), 46 deletions(-)
diff --git a/meson.build b/meson.build
index ee2b4151e2..7b01d0ab4b 100644
--- a/meson.build
+++ b/meson.build
@@ -29,6 +29,8 @@ project(
default_options : ['buildtype=debugoptimized', 'c_std=c99', 'cpp_std=c++11']
)
+null_dep = dependency('', required : false)
+
system_has_kms_drm = ['openbsd', 'netbsd', 'freebsd', 'dragonfly',
'linux'].contains(host_machine.system())
# Arguments for the preprocessor, put these in a separate array from the C and
@@ -422,7 +424,7 @@ elif _vdpau == 'auto'
_vdpau = 'true'
endif
with_gallium_vdpau = _vdpau == 'true'
-dep_vdpau = []
+dep_vdpau = null_dep
if with_gallium_vdpau
dep_vdpau = dependency('vdpau', version : '>= 1.1')
dep_vdpau = declare_dependency(
@@ -461,7 +463,7 @@ elif _xvmc == 'auto'
_xvmc = 'true'
endif
with_gallium_xvmc = _xvmc == 'true'
-dep_xvmc = []
+dep_xvmc = null_dep
if with_gallium_xvmc
dep_xvmc = dependency('xvmc', version : '>= 1.0.6')
endif
@@ -491,7 +493,8 @@ elif not (with_gallium_r600 or with_gallium_radeonsi or
with_gallium_nouveau)
error('OMX state tracker requires at least one of the following gallium
drivers: r600, radeonsi, nouveau.')
endif
endif
-dep_omx = []
+with_gallium_omx = _omx
+dep_omx = null_dep
dep_omx_other = []
if ['auto', 'bellagio'].contains(_omx)
dep_omx = dependency(
@@ -579,7 +582,7 @@ elif _va == 'auto'
_va = 'true'
endif
with_gallium_va = _va == 'true'
-dep_va = []
+dep_va = null_dep
if with_gallium_va
dep_va = dependency('libva', version : '>= 0.38.0')
dep_va_headers = declare_dependency(
@@ -638,7 +641,7 @@ if _opencl != 'disabled'
with_gallium_opencl = true
with_opencl_icd = _opencl == 'icd'
else
- dep_clc = []
+ dep_clc = null_dep
with_gallium_opencl = false
with_gallium_icd = false
endif
@@ -831,7 +834,7 @@ else
endif
# Check for GCC style atomics
-dep_atomic = declare_dependency()
+dep_atomic = null_dep
if cc.compiles('int main() { int n; return __atomic_load_n(&n,
__ATOMIC_ACQUIRE); }',
name : 'GCC atomic builtins')
@@ -976,7 +979,7 @@ endif
# check for dl support
if cc.has_function('dlopen')
- dep_dl = []
+ dep_dl = null_dep
else
dep_dl = cc.find_library('dl')
endif
@@ -995,7 +998,7 @@ endif
# Determine whether or not the rt library is needed for time functions
if cc.has_function('clock_gettime')
- dep_clock = []
+ dep_clock = null_dep
else
dep_clock = cc.find_library('rt')
endif
@@ -1013,7 +1016,7 @@ if with_amd_vk or with_gallium_radeonsi or
with_gallium_r600 or with_gallium_ope
dep_elf = cc.find_library('elf')
endif
else
- dep_elf = []
+ dep_elf = null_dep
endif
dep_expat = dependency('expat')
# this only exists on linux so either this is linux and it will be found, or
@@ -1024,12 +1027,12 @@ dep_m = cc.find_library('m', required : false)
# but we always want to use the same version for all libdrm modules. That means
# even if driver foo requires 2.4.0 and driver bar requires 2.4.3, if foo and
# bar are both on use 2.4.3 for both of them
-dep_libdrm_amdgpu = []
-dep_libdrm_radeon = []
-dep_libdrm_nouveau = []
-dep_libdrm_etnaviv = []
-dep_libdrm_freedreno = []
-dep_libdrm_intel = []
+dep_libdrm_amdgpu = null_dep
+dep_libdrm_radeon = null_dep
+dep_libdrm_nouveau = null_dep
+dep_libdrm_etnaviv = null_
Mesa (master): intel/compiler: Explicitly cast register type in switch
Module: Mesa
Branch: master
Commit: 81ed629b385af62bbac2d7975986ea7ad4ed2d1a
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=81ed629b385af62bbac2d7975986ea7ad4ed2d1a
Author: Ian Romanick
Date: Thu Mar 29 11:29:09 2018 -0700
intel/compiler: Explicitly cast register type in switch
brw_reg::type is "enum brw_reg_type type:4". For whatever reason, GCC
is treating this as an int instead of an enum. As a result, it doesn't
detect missing switch cases and it doesn't detect that flow can get out
of the switch.
This silences the warning:
src/intel/compiler/brw_reg.h: In function ‘bool brw_regs_negative_equal(const
brw_reg*, const brw_reg*)’:
src/intel/compiler/brw_reg.h:305:1: warning: control reaches end of non-void
function [-Wreturn-type]
}
^
Signed-off-by: Ian Romanick
Reviewed-by: Matt Turner
Reviewed-by: Brian Paul
---
src/intel/compiler/brw_reg.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/src/intel/compiler/brw_reg.h b/src/intel/compiler/brw_reg.h
index afcd146de2..dff9b970b2 100644
--- a/src/intel/compiler/brw_reg.h
+++ b/src/intel/compiler/brw_reg.h
@@ -262,7 +262,7 @@ brw_regs_negative_equal(const struct brw_reg *a, const
struct brw_reg *b)
if (a->bits != b->bits)
return false;
- switch (a->type) {
+ switch ((enum brw_reg_type) a->type) {
case BRW_REGISTER_TYPE_UQ:
case BRW_REGISTER_TYPE_Q:
return a->d64 == -b->d64;
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Mesa (master): st/nine: Declare lighting consts for ff shaders
Module: Mesa Branch: master Commit: 39240926cd45519f35a6fa576c387f727b057aa1 URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=39240926cd45519f35a6fa576c387f727b057aa1 Author: Axel Davy Date: Mon Apr 2 18:25:35 2018 +0200 st/nine: Declare lighting consts for ff shaders The lighting constants were not declared previously, but were accessed with indirect addressing, which is illegal. Fixes: https://bugs.freedesktop.org/show_bug.cgi?id=105442 Signed-off-by: Axel Davy Tested-by: Dieter Nützel CC: "17.3 18.0" --- src/gallium/state_trackers/nine/nine_ff.c | 4 1 file changed, 4 insertions(+) diff --git a/src/gallium/state_trackers/nine/nine_ff.c b/src/gallium/state_trackers/nine/nine_ff.c index d7b697caee..fabc1d3b88 100644 --- a/src/gallium/state_trackers/nine/nine_ff.c +++ b/src/gallium/state_trackers/nine/nine_ff.c @@ -810,6 +810,10 @@ nine_ff_build_vs(struct NineDevice9 *device, struct vs_build_ctx *vs) const unsigned loop_label = l++; +/* Declare all light constants to allow indirect adressing */ +for (i = 32; i < 96; i++) +ureg_DECL_constant(ureg, i); + ureg_MOV(ureg, rCtr, ureg_imm1f(ureg, 32.0f)); /* &lightconst(0) */ ureg_MOV(ureg, rD, ureg_imm1f(ureg, 0.0f)); ureg_MOV(ureg, rA, ureg_imm1f(ureg, 0.0f)); ___ mesa-commit mailing list mesa-commit@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/mesa-commit
Mesa (master): nir: rename variables in nir_lower_io_to_temporaries for clarity
Module: Mesa
Branch: master
Commit: 67c728f7a9450b04d4de1a29f1dcfb9265a7ebfd
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=67c728f7a9450b04d4de1a29f1dcfb9265a7ebfd
Author: Caio Marcelo de Oliveira Filho
Date: Wed Apr 4 16:16:39 2018 -0700
nir: rename variables in nir_lower_io_to_temporaries for clarity
In the emit_copies() function, the use of "newv" and "temp" names made
sense when only copies from temporaries to the new variables were
being done. But now there are other calls to copy with other pairings,
and "temp" doesn't always refer to a temporary created in this
pass. Use the names "dest" and "src" instead.
Reviewed-by: Samuel Iglesias Gonsálvez
Reviewed-by: Jason Ekstrand
---
src/compiler/nir/nir_lower_io_to_temporaries.c | 22 +++---
1 file changed, 11 insertions(+), 11 deletions(-)
diff --git a/src/compiler/nir/nir_lower_io_to_temporaries.c
b/src/compiler/nir/nir_lower_io_to_temporaries.c
index 301ba65892..bff04b9768 100644
--- a/src/compiler/nir/nir_lower_io_to_temporaries.c
+++ b/src/compiler/nir/nir_lower_io_to_temporaries.c
@@ -40,34 +40,34 @@ struct lower_io_state {
};
static void
-emit_copies(nir_cursor cursor, nir_shader *shader, struct exec_list *new_vars,
- struct exec_list *old_vars)
+emit_copies(nir_cursor cursor, nir_shader *shader, struct exec_list *dest_vars,
+struct exec_list *src_vars)
{
- assert(exec_list_length(new_vars) == exec_list_length(old_vars));
+ assert(exec_list_length(dest_vars) == exec_list_length(src_vars));
- foreach_two_lists(new_node, new_vars, old_node, old_vars) {
- nir_variable *newv = exec_node_data(nir_variable, new_node, node);
- nir_variable *temp = exec_node_data(nir_variable, old_node, node);
+ foreach_two_lists(dest_node, dest_vars, src_node, src_vars) {
+ nir_variable *dest = exec_node_data(nir_variable, dest_node, node);
+ nir_variable *src = exec_node_data(nir_variable, src_node, node);
/* No need to copy the contents of a non-fb_fetch_output output variable
* to the temporary allocated for it, since its initial value is
* undefined.
*/
- if (temp->data.mode == nir_var_shader_out &&
- !temp->data.fb_fetch_output)
+ if (src->data.mode == nir_var_shader_out &&
+ !src->data.fb_fetch_output)
continue;
/* Can't copy the contents of the temporary back to a read-only
* interface variable. The value of the temporary won't have been
* modified by the shader anyway.
*/
- if (newv->data.read_only)
+ if (dest->data.read_only)
continue;
nir_intrinsic_instr *copy =
nir_intrinsic_instr_create(shader, nir_intrinsic_copy_var);
- copy->variables[0] = nir_deref_var_create(copy, newv);
- copy->variables[1] = nir_deref_var_create(copy, temp);
+ copy->variables[0] = nir_deref_var_create(copy, dest);
+ copy->variables[1] = nir_deref_var_create(copy, src);
nir_instr_insert(cursor, ©->instr);
}
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Mesa (master): radv: rename radv_cmd_buffer_update_vertex_descriptors()
Module: Mesa
Branch: master
Commit: 2bd50cceff6d4b26b2e9fe6993fd04c6e9c69e66
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=2bd50cceff6d4b26b2e9fe6993fd04c6e9c69e66
Author: Samuel Pitoiset
Date: Thu Apr 5 11:30:53 2018 +0200
radv: rename radv_cmd_buffer_update_vertex_descriptors()
... to radv_flush_vertex_descriptors().
Signed-off-by: Samuel Pitoiset
---
src/amd/vulkan/radv_cmd_buffer.c | 5 +++--
1 file changed, 3 insertions(+), 2 deletions(-)
diff --git a/src/amd/vulkan/radv_cmd_buffer.c b/src/amd/vulkan/radv_cmd_buffer.c
index 792c4f4fed..230b3e6f54 100644
--- a/src/amd/vulkan/radv_cmd_buffer.c
+++ b/src/amd/vulkan/radv_cmd_buffer.c
@@ -1478,7 +1478,8 @@ radv_flush_constants(struct radv_cmd_buffer *cmd_buffer,
}
static void
-radv_cmd_buffer_update_vertex_descriptors(struct radv_cmd_buffer *cmd_buffer,
bool pipeline_is_dirty)
+radv_flush_vertex_descriptors(struct radv_cmd_buffer *cmd_buffer,
+ bool pipeline_is_dirty)
{
if ((pipeline_is_dirty ||
(cmd_buffer->state.dirty & RADV_CMD_DIRTY_VERTEX_BUFFER)) &&
@@ -1532,7 +1533,7 @@ radv_cmd_buffer_update_vertex_descriptors(struct
radv_cmd_buffer *cmd_buffer, bo
static void
radv_upload_graphics_shader_descriptors(struct radv_cmd_buffer *cmd_buffer,
bool pipeline_is_dirty)
{
- radv_cmd_buffer_update_vertex_descriptors(cmd_buffer,
pipeline_is_dirty);
+ radv_flush_vertex_descriptors(cmd_buffer, pipeline_is_dirty);
radv_flush_descriptors(cmd_buffer, VK_SHADER_STAGE_ALL_GRAPHICS);
radv_flush_constants(cmd_buffer, cmd_buffer->state.pipeline,
VK_SHADER_STAGE_ALL_GRAPHICS);
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Mesa (master): radv: don't pass the pipeline to radv_flush_constants()
Module: Mesa
Branch: master
Commit: 8f9f62c2db85a7fe394265154bce4c189eb295b1
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=8f9f62c2db85a7fe394265154bce4c189eb295b1
Author: Samuel Pitoiset
Date: Thu Apr 5 11:34:57 2018 +0200
radv: don't pass the pipeline to radv_flush_constants()
Signed-off-by: Samuel Pitoiset
Reviewed-by: Bas Nieuwenhuizen
---
src/amd/vulkan/radv_cmd_buffer.c | 10 +-
1 file changed, 5 insertions(+), 5 deletions(-)
diff --git a/src/amd/vulkan/radv_cmd_buffer.c b/src/amd/vulkan/radv_cmd_buffer.c
index 230b3e6f54..d9f12a351e 100644
--- a/src/amd/vulkan/radv_cmd_buffer.c
+++ b/src/amd/vulkan/radv_cmd_buffer.c
@@ -1438,9 +1438,11 @@ radv_flush_descriptors(struct radv_cmd_buffer
*cmd_buffer,
static void
radv_flush_constants(struct radv_cmd_buffer *cmd_buffer,
-struct radv_pipeline *pipeline,
VkShaderStageFlags stages)
{
+ struct radv_pipeline *pipeline = stages & VK_SHADER_STAGE_COMPUTE_BIT
+? cmd_buffer->state.compute_pipeline
+: cmd_buffer->state.pipeline;
struct radv_pipeline_layout *layout = pipeline->layout;
unsigned offset;
void *ptr;
@@ -1535,8 +1537,7 @@ radv_upload_graphics_shader_descriptors(struct
radv_cmd_buffer *cmd_buffer, bool
{
radv_flush_vertex_descriptors(cmd_buffer, pipeline_is_dirty);
radv_flush_descriptors(cmd_buffer, VK_SHADER_STAGE_ALL_GRAPHICS);
- radv_flush_constants(cmd_buffer, cmd_buffer->state.pipeline,
-VK_SHADER_STAGE_ALL_GRAPHICS);
+ radv_flush_constants(cmd_buffer, VK_SHADER_STAGE_ALL_GRAPHICS);
}
static void
@@ -3392,8 +3393,7 @@ static void
radv_upload_compute_shader_descriptors(struct radv_cmd_buffer *cmd_buffer)
{
radv_flush_descriptors(cmd_buffer, VK_SHADER_STAGE_COMPUTE_BIT);
- radv_flush_constants(cmd_buffer, cmd_buffer->state.compute_pipeline,
-VK_SHADER_STAGE_COMPUTE_BIT);
+ radv_flush_constants(cmd_buffer, VK_SHADER_STAGE_COMPUTE_BIT);
}
static void
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Mesa (master): radv: do not try to skip draw calls when VBOs upload failed
Module: Mesa
Branch: master
Commit: e829a0cc1ed2eb14a907acb71a235d21854525b7
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=e829a0cc1ed2eb14a907acb71a235d21854525b7
Author: Samuel Pitoiset
Date: Thu Apr 5 11:27:10 2018 +0200
radv: do not try to skip draw calls when VBOs upload failed
This is unnecessary because we record an error which should
be returned by vkEndCommandBuffer(), and the app shouldn't
submit a command buffer when this happens.
Signed-off-by: Samuel Pitoiset
Reviewed-by: Bas Nieuwenhuizen
---
src/amd/vulkan/radv_cmd_buffer.c | 20 ++--
1 file changed, 6 insertions(+), 14 deletions(-)
diff --git a/src/amd/vulkan/radv_cmd_buffer.c b/src/amd/vulkan/radv_cmd_buffer.c
index cbf3320a05..792c4f4fed 100644
--- a/src/amd/vulkan/radv_cmd_buffer.c
+++ b/src/amd/vulkan/radv_cmd_buffer.c
@@ -1477,7 +1477,7 @@ radv_flush_constants(struct radv_cmd_buffer *cmd_buffer,
assert(cmd_buffer->cs->cdw <= cdw_max);
}
-static bool
+static void
radv_cmd_buffer_update_vertex_descriptors(struct radv_cmd_buffer *cmd_buffer,
bool pipeline_is_dirty)
{
if ((pipeline_is_dirty ||
@@ -1494,7 +1494,7 @@ radv_cmd_buffer_update_vertex_descriptors(struct
radv_cmd_buffer *cmd_buffer, bo
/* allocate some descriptor state for vertex buffers */
if (!radv_cmd_buffer_upload_alloc(cmd_buffer, count * 16, 256,
&vb_offset, &vb_ptr))
- return false;
+ return;
for (i = 0; i < count; i++) {
uint32_t *desc = &((uint32_t *)vb_ptr)[i * 4];
@@ -1527,21 +1527,15 @@ radv_cmd_buffer_update_vertex_descriptors(struct
radv_cmd_buffer *cmd_buffer, bo
cmd_buffer->state.prefetch_L2_mask |=
RADV_PREFETCH_VBO_DESCRIPTORS;
}
cmd_buffer->state.dirty &= ~RADV_CMD_DIRTY_VERTEX_BUFFER;
-
- return true;
}
-static bool
+static void
radv_upload_graphics_shader_descriptors(struct radv_cmd_buffer *cmd_buffer,
bool pipeline_is_dirty)
{
- if (!radv_cmd_buffer_update_vertex_descriptors(cmd_buffer,
pipeline_is_dirty))
- return false;
-
+ radv_cmd_buffer_update_vertex_descriptors(cmd_buffer,
pipeline_is_dirty);
radv_flush_descriptors(cmd_buffer, VK_SHADER_STAGE_ALL_GRAPHICS);
radv_flush_constants(cmd_buffer, cmd_buffer->state.pipeline,
VK_SHADER_STAGE_ALL_GRAPHICS);
-
- return true;
}
static void
@@ -3068,8 +3062,7 @@ radv_draw(struct radv_cmd_buffer *cmd_buffer,
si_emit_cache_flush(cmd_buffer);
/* <-- CUs are idle here --> */
- if (!radv_upload_graphics_shader_descriptors(cmd_buffer,
pipeline_is_dirty))
- return;
+ radv_upload_graphics_shader_descriptors(cmd_buffer,
pipeline_is_dirty);
radv_emit_draw_packets(cmd_buffer, info);
/* <-- CUs are busy here --> */
@@ -3096,8 +3089,7 @@ radv_draw(struct radv_cmd_buffer *cmd_buffer,
cmd_buffer->state.pipeline, true);
}
- if (!radv_upload_graphics_shader_descriptors(cmd_buffer,
pipeline_is_dirty))
- return;
+ radv_upload_graphics_shader_descriptors(cmd_buffer,
pipeline_is_dirty);
radv_emit_all_graphics_states(cmd_buffer, info);
radv_emit_draw_packets(cmd_buffer, info);
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Mesa (master): radv: fix prefetching compute shaders on CIK and older chips
Module: Mesa
Branch: master
Commit: f1d7c16e8504a941ae481a20aa5294b964c801ce
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=f1d7c16e8504a941ae481a20aa5294b964c801ce
Author: Samuel Pitoiset
Date: Thu Apr 5 11:19:21 2018 +0200
radv: fix prefetching compute shaders on CIK and older chips
Because the check was moved to radv_emit_prefetch_L2().
Fixes: 4ad7595f35 ("radv: rename radv_emit_prefetch() to
radv_emit_prefetch_L2()")
Signed-off-by: Samuel Pitoiset
Reviewed-by: Bas Nieuwenhuizen
---
src/amd/vulkan/radv_cmd_buffer.c | 15 ---
1 file changed, 8 insertions(+), 7 deletions(-)
diff --git a/src/amd/vulkan/radv_cmd_buffer.c b/src/amd/vulkan/radv_cmd_buffer.c
index c0f60ac0d2..cbf3320a05 100644
--- a/src/amd/vulkan/radv_cmd_buffer.c
+++ b/src/amd/vulkan/radv_cmd_buffer.c
@@ -646,9 +646,6 @@ radv_emit_prefetch_L2(struct radv_cmd_buffer *cmd_buffer,
struct radv_cmd_state *state = &cmd_buffer->state;
uint32_t mask = state->prefetch_L2_mask;
- if (cmd_buffer->device->physical_device->rad_info.chip_class < CIK)
- return;
-
if (vertex_stage_only) {
/* Fast prefetch path for starting draws as soon as possible.
*/
@@ -3042,6 +3039,8 @@ static void
radv_draw(struct radv_cmd_buffer *cmd_buffer,
const struct radv_draw_info *info)
{
+ bool has_prefetch =
+ cmd_buffer->device->physical_device->rad_info.chip_class >= CIK;
bool pipeline_is_dirty =
(cmd_buffer->state.dirty & RADV_CMD_DIRTY_PIPELINE) &&
cmd_buffer->state.pipeline &&
@@ -3079,7 +3078,7 @@ radv_draw(struct radv_cmd_buffer *cmd_buffer,
* run in parallel, but starting the draw first is more
* important.
*/
- if (cmd_buffer->state.prefetch_L2_mask) {
+ if (has_prefetch && cmd_buffer->state.prefetch_L2_mask) {
radv_emit_prefetch_L2(cmd_buffer,
cmd_buffer->state.pipeline,
false);
}
@@ -3106,7 +3105,7 @@ radv_draw(struct radv_cmd_buffer *cmd_buffer,
/* Prefetch the remaining shaders after the draw has been
* started.
*/
- if (cmd_buffer->state.prefetch_L2_mask) {
+ if (has_prefetch && cmd_buffer->state.prefetch_L2_mask) {
radv_emit_prefetch_L2(cmd_buffer,
cmd_buffer->state.pipeline,
false);
}
@@ -3409,6 +3408,8 @@ radv_dispatch(struct radv_cmd_buffer *cmd_buffer,
const struct radv_dispatch_info *info)
{
struct radv_pipeline *pipeline = cmd_buffer->state.compute_pipeline;
+ bool has_prefetch =
+ cmd_buffer->device->physical_device->rad_info.chip_class >= CIK;
bool pipeline_is_dirty = pipeline &&
pipeline !=
cmd_buffer->state.emitted_compute_pipeline;
@@ -3436,7 +3437,7 @@ radv_dispatch(struct radv_cmd_buffer *cmd_buffer,
* will run in parallel, but starting the dispatch first is
* more important.
*/
- if (pipeline_is_dirty) {
+ if (has_prefetch && pipeline_is_dirty) {
radv_emit_shader_prefetch(cmd_buffer,
pipeline->shaders[MESA_SHADER_COMPUTE]);
}
@@ -3446,7 +3447,7 @@ radv_dispatch(struct radv_cmd_buffer *cmd_buffer,
*/
si_emit_cache_flush(cmd_buffer);
- if (pipeline_is_dirty) {
+ if (has_prefetch && pipeline_is_dirty) {
radv_emit_shader_prefetch(cmd_buffer,
pipeline->shaders[MESA_SHADER_COMPUTE]);
}
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Mesa (master): radv: only enable PERFECT_ZPASS_COUNTS for precision occlusion queries
Module: Mesa
Branch: master
Commit: 7fe586f6fb69cd829d687dd58562ef5922667905
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=7fe586f6fb69cd829d687dd58562ef5922667905
Author: Samuel Pitoiset
Date: Thu Apr 5 10:27:22 2018 +0200
radv: only enable PERFECT_ZPASS_COUNTS for precision occlusion queries
This unnecessary when the precision bit flag is not set, and this
might hurt performance. The Vulkan explains that not setting
VK_QUERY_CONTROL_PRECISE_BIT might be more efficient on some
implementations.
Signed-off-by: Samuel Pitoiset
Reviewed-by: Bas Nieuwenhuizen
---
src/amd/vulkan/radv_cmd_buffer.c | 4 +++-
src/amd/vulkan/radv_private.h| 1 +
src/amd/vulkan/radv_query.c | 36 +++-
3 files changed, 35 insertions(+), 6 deletions(-)
diff --git a/src/amd/vulkan/radv_cmd_buffer.c b/src/amd/vulkan/radv_cmd_buffer.c
index 526b618f2a..c0f60ac0d2 100644
--- a/src/amd/vulkan/radv_cmd_buffer.c
+++ b/src/amd/vulkan/radv_cmd_buffer.c
@@ -1217,9 +1217,11 @@ void radv_set_db_count_control(struct radv_cmd_buffer
*cmd_buffer)
} else {
const struct radv_subpass *subpass = cmd_buffer->state.subpass;
uint32_t sample_rate = subpass ?
util_logbase2(subpass->max_sample_count) : 0;
+ bool perfect =
cmd_buffer->state.perfect_occlusion_queries_enabled;
if (cmd_buffer->device->physical_device->rad_info.chip_class >=
CIK) {
- db_count_control = S_028004_PERFECT_ZPASS_COUNTS(1) |
+ db_count_control =
+ S_028004_PERFECT_ZPASS_COUNTS(perfect) |
S_028004_SAMPLE_RATE(sample_rate) |
S_028004_ZPASS_ENABLE(1) |
S_028004_SLICE_EVEN_ENABLE(1) |
diff --git a/src/amd/vulkan/radv_private.h b/src/amd/vulkan/radv_private.h
index ca3beba2d4..9e655af844 100644
--- a/src/amd/vulkan/radv_private.h
+++ b/src/amd/vulkan/radv_private.h
@@ -946,6 +946,7 @@ struct radv_cmd_state {
uint32_t last_primitive_reset_index;
enum radv_cmd_flush_bits flush_bits;
unsigned active_occlusion_queries;
+ bool
perfect_occlusion_queries_enabled;
floatoffset_scale;
uint32_t trace_id;
uint32_t last_ia_multi_vgt_param;
diff --git a/src/amd/vulkan/radv_query.c b/src/amd/vulkan/radv_query.c
index cc943d5de0..859a4a1d68 100644
--- a/src/amd/vulkan/radv_query.c
+++ b/src/amd/vulkan/radv_query.c
@@ -1079,7 +1079,8 @@ void radv_CmdResetQueryPool(
static void emit_begin_query(struct radv_cmd_buffer *cmd_buffer,
uint64_t va,
-VkQueryType query_type)
+VkQueryType query_type,
+VkQueryControlFlags flags)
{
struct radeon_winsys_cs *cs = cmd_buffer->cs;
switch (query_type) {
@@ -1087,8 +1088,27 @@ static void emit_begin_query(struct radv_cmd_buffer
*cmd_buffer,
radeon_check_space(cmd_buffer->device->ws, cs, 7);
++cmd_buffer->state.active_occlusion_queries;
- if (cmd_buffer->state.active_occlusion_queries == 1)
+ if (cmd_buffer->state.active_occlusion_queries == 1) {
+ if (flags & VK_QUERY_CONTROL_PRECISE_BIT) {
+ /* This is the first occlusion query, enable
+* the hint if the precision bit is set.
+*/
+
cmd_buffer->state.perfect_occlusion_queries_enabled = true;
+ }
+
radv_set_db_count_control(cmd_buffer);
+ } else {
+ if ((flags & VK_QUERY_CONTROL_PRECISE_BIT) &&
+
!cmd_buffer->state.perfect_occlusion_queries_enabled) {
+ /* This is not the first query, but this one
+* needs to enable precision, DB_COUNT_CONTROL
+* has to be updated accordingly.
+*/
+
cmd_buffer->state.perfect_occlusion_queries_enabled = true;
+
+ radv_set_db_count_control(cmd_buffer);
+ }
+ }
radeon_emit(cs, PKT3(PKT3_EVENT_WRITE, 2, 0));
radeon_emit(cs, EVENT_TYPE(V_028A90_ZPASS_DONE) |
EVENT_INDEX(1));
@@ -1119,8 +1139,14 @@ static void emit_end_query(struct radv_cmd_buffer
*cmd_buffer,
radeon_check_space(cmd_buffer->device->ws, cs, 14);
cmd_buffer->state.active_occlusion_queries--;
-
Mesa (master): radv: enable the Polaris small primitive filter control
Module: Mesa
Branch: master
Commit: d53dff3bfced4cf573c558ca8873af63a66cd014
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=d53dff3bfced4cf573c558ca8873af63a66cd014
Author: Samuel Pitoiset
Date: Thu Apr 5 10:27:07 2018 +0200
radv: enable the Polaris small primitive filter control
Enable it directly in the preamble, but do not enable line
on Polaris10/11/12 because there is a hw bug.
There is possibly an issue when MSAA is off, but this doesn't
regress any CTS and AMDVLK doesn't have a workaround as well.
Signed-off-by: Samuel Pitoiset
Reviewed-by: Bas Nieuwenhuizen
---
src/amd/vulkan/si_cmd_buffer.c | 15 +++
1 file changed, 15 insertions(+)
diff --git a/src/amd/vulkan/si_cmd_buffer.c b/src/amd/vulkan/si_cmd_buffer.c
index 0970eff103..aed291be35 100644
--- a/src/amd/vulkan/si_cmd_buffer.c
+++ b/src/amd/vulkan/si_cmd_buffer.c
@@ -539,6 +539,21 @@ si_emit_config(struct radv_physical_device
*physical_device,
S_028004_ZPASS_INCREMENT_DISABLE(1));
}
+ /* Enable the Polaris small primitive filter control.
+* XXX: There is possibly an issue when MSAA is off (see RadeonSI
+* has_msaa_sample_loc_bug). But this doesn't seem to regress anything,
+* and AMDVLK doesn't have a workaround as well.
+*/
+ if (physical_device->rad_info.family >= CHIP_POLARIS10) {
+ unsigned small_prim_filter_cntl =
+ S_028830_SMALL_PRIM_FILTER_ENABLE(1) |
+ /* Workaround for a hw line bug. */
+
S_028830_LINE_FILTER_DISABLE(physical_device->rad_info.family <=
CHIP_POLARIS12);
+
+ radeon_set_context_reg(cs,
R_028830_PA_SU_SMALL_PRIM_FILTER_CNTL,
+ small_prim_filter_cntl);
+ }
+
si_emit_compute(physical_device, cs);
}
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