Mesa (master): radv/winsys: fix missing initializations of shader info in the null device

[GitLab Mirror]

Module: Mesa
Branch: master
Commit: ba29c050a3b370ff75d229317a6c2107d736c583
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=ba29c050a3b370ff75d229317a6c2107d736c583

Author: Samuel Pitoiset 
Date:   Fri Feb 28 18:15:39 2020 +0100

radv/winsys: fix missing initializations of shader info in the null device

To avoid divide by zero when computing shader stats.

Signed-off-by: Samuel Pitoiset 
Reviewed-by: Bas Nieuwenhuizen 
Tested-by: Marge Bot 

Part-of: 

---

 src/amd/vulkan/winsys/null/radv_null_winsys.c | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/src/amd/vulkan/winsys/null/radv_null_winsys.c 
b/src/amd/vulkan/winsys/null/radv_null_winsys.c
index 105402144da..7ffd8c44db7 100644
--- a/src/amd/vulkan/winsys/null/radv_null_winsys.c
+++ b/src/amd/vulkan/winsys/null/radv_null_winsys.c
@@ -121,6 +121,8 @@ static void radv_null_winsys_query_info(struct 
radeon_winsys *rws,
info->num_physical_sgprs_per_simd = 512;
 
info->num_physical_wave64_vgprs_per_simd = info->chip_class >= GFX10 ? 
512 : 256;
+   info->num_simd_per_compute_unit = info->chip_class >= GFX10 ? 2 : 4;
+   info->lds_size_per_workgroup = info->chip_class >= GFX10 ? 128 * 1024 : 
64 * 1024;
 }
 
 static void radv_null_winsys_destroy(struct radeon_winsys *rws)

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Mesa (master): iris: Don't skip fast depth clears if the color changed

[GitLab Mirror]

Module: Mesa
Branch: master
Commit: 9d07d598423e4015bbc7beb7a2fdc4c657d5e0cf
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=9d07d598423e4015bbc7beb7a2fdc4c657d5e0cf

Author: Jason Ekstrand 
Date:   Thu Mar  5 17:17:40 2020 -0600

iris: Don't skip fast depth clears if the color changed

We depend on BLORP to convert the clear color and write it into the
clear color buffer for us.  However, we weren't bothering to call blorp
in the case where the state is ISL_AUX_STATE_CLEAR.  This leads to the
clear color not getting properly updated if we have back-to-back clears
with different clear colors.  Technically, we could go out of our way to
set the clear color directly from iris in this case but this is a case
we're unlikely to see in the wild so let's not bother.  This matches
what we already do for color surfaces.

Cc: mesa-sta...@lists.freedesktop.org
Reported-by: Mark Janes 
Reviewed-by: Nanley Chery 
Tested-by: Marge Bot 

Part-of: 

---

 src/gallium/drivers/iris/iris_clear.c | 6 +-
 1 file changed, 5 insertions(+), 1 deletion(-)

diff --git a/src/gallium/drivers/iris/iris_clear.c 
b/src/gallium/drivers/iris/iris_clear.c
index 5f7914a5ba0..087b32f7180 100644
--- a/src/gallium/drivers/iris/iris_clear.c
+++ b/src/gallium/drivers/iris/iris_clear.c
@@ -521,7 +521,11 @@ fast_clear_depth(struct iris_context *ice,
for (unsigned l = 0; l < box->depth; l++) {
   enum isl_aux_state aux_state =
  iris_resource_get_aux_state(res, level, box->z + l);
-  if (aux_state != ISL_AUX_STATE_CLEAR) {
+  if (update_clear_depth || aux_state != ISL_AUX_STATE_CLEAR) {
+ if (aux_state == ISL_AUX_STATE_CLEAR) {
+perf_debug(>dbg, "Performing HiZ clear just to update the "
+  "depth clear value\n");
+ }
  iris_hiz_exec(ice, batch, res, level,
box->z + l, 1, ISL_AUX_OP_FAST_CLEAR,
update_clear_depth);

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Mesa (master): swr: Fix non-pod-varargs error.

[GitLab Mirror]

Module: Mesa
Branch: master
Commit: 382b902a6db87a2b0409b760c320555d1f4eadca
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=382b902a6db87a2b0409b760c320555d1f4eadca

Author: Vinson Lee 
Date:   Sat Feb 29 15:18:58 2020 -0800

swr: Fix non-pod-varargs error.

../src/gallium/drivers/swr/rasterizer/jitter/functionpasses/lower_x86.cpp:391:24:
 error: cannot pass object of non-trivial type 'std::string' (aka 
'basic_string') through variadic function; call will abort at runtime 
[-Wnon-pod-varargs]
   pFunc->getName().str());
   ^

Fixes: ff8265b64ff1 ("gallium/swr: Fix llvm11 compilation issues")
Signed-off-by: Vinson Lee 
Reviewed-by: Jan Zielinski 
Tested-by: Marge Bot 

Part-of: 

---

 src/gallium/drivers/swr/rasterizer/jitter/functionpasses/lower_x86.cpp | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git 
a/src/gallium/drivers/swr/rasterizer/jitter/functionpasses/lower_x86.cpp 
b/src/gallium/drivers/swr/rasterizer/jitter/functionpasses/lower_x86.cpp
index f9ae0e96b9c..4eb0162d5d9 100644
--- a/src/gallium/drivers/swr/rasterizer/jitter/functionpasses/lower_x86.cpp
+++ b/src/gallium/drivers/swr/rasterizer/jitter/functionpasses/lower_x86.cpp
@@ -388,7 +388,7 @@ namespace SwrJit
 
 SWR_ASSERT(intrinsicMap.find(pFunc->getName().str()) != 
intrinsicMap.end(),
"Unimplemented intrinsic %s.",
-   pFunc->getName().str());
+   pFunc->getName().str().c_str());
 
 Intrinsic::ID x86Intrinsic = intrinsicMap[pFunc->getName().str()];
 Function* pX86IntrinFunc =

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Mesa (master): 28 new commits

[GitLab Mirror]

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=ed0bea4495aef3dd50fc0c9b8b05836b58a3cfc1
Author: Marek Olšák 
Date:   Mon Feb 24 20:52:06 2020 -0500

glthread: fall back if a param size is non-zero and a pointer param is NULL

So that we don't crash. This is a GL error anyway.

Reviewed-by: Timothy Arceri 
Tested-by: Marge Bot 

Part-of: 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=57a9c1ee478c5af8cc2f9ffe78b24917deebb1b3
Author: Marek Olšák 
Date:   Mon Feb 24 20:46:02 2020 -0500

glthread: fix a crash with incorrect glShaderSource parameters

Reviewed-by: Timothy Arceri 
Part-of: 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=c5825b7b6e734c991c65246aff59c04ea8cde102
Author: Marek Olšák 
Date:   Mon Feb 24 20:30:23 2020 -0500

glthread: add custom marshalling for glNamedBuffer(Sub)DataEXT

Reviewed-by: Timothy Arceri 
Part-of: 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=b8aa5edfc5632e7c7a164566b61c21a6658025b3
Author: Marek Olšák 
Date:   Mon Feb 24 19:58:38 2020 -0500

glthread: merge glBufferSubData and glNamedBufferSubData into 1 set of 
functions

This is a big cleanup.
GL_EXTERNAL_VIRTUAL_MEMORY_BUFFER_AMD also doesn't sync anymore.

Reviewed-by: Timothy Arceri 
Part-of: 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=8eb03327497f3f0c0147ceea5c22213c4dfd1b13
Author: Marek Olšák 
Date:   Mon Feb 24 19:58:38 2020 -0500

glthread: merge glBufferData and glNamedBufferData into 1 set of functions

This is a big cleanup.
GL_EXTERNAL_VIRTUAL_MEMORY_BUFFER_AMD also doesn't sync anymore.

Reviewed-by: Timothy Arceri 
Part-of: 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=93b2ee18a1c00f8b60a60e34cee3743dca45bd47
Author: Marek Olšák 
Date:   Mon Feb 24 19:26:12 2020 -0500

glthread: replace custom glBindBuffer marshalling with generated one

Reviewed-by: Timothy Arceri 
Part-of: 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=85276e2c1b8dfdf090a656a7fa1b5613d373515e
Author: Marek Olšák 
Date:   Thu Feb 20 20:40:31 2020 -0500

glthread: sync instead of disabling glthread for non-VBO pointers

Reviewed-by: Timothy Arceri 
Part-of: 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=28a2ad7ddf76702a5de56a7bc0d8754b7dbd66a0
Author: Marek Olšák 
Date:   Thu Feb 20 19:28:56 2020 -0500

glthread: track for each VAO whether the user has set a user pointer

This commit mainly adds basic infrastructure for tracking vertex array
state.

If glthread gets a non-VBO pointer, this commit delays disabling
glthread until glDraw is called. The next will change that to "sync"
instead of "disable".

Reviewed-by: Timothy Arceri 
Part-of: 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=d510e652d46f471a93eae5a07f7e7508633d1040
Author: Marek Olšák 
Date:   Thu Feb 20 18:15:42 2020 -0500

glthread: add marshal_call_after and remove custom glFlush and glEnable code

Instead of implementing marshalling manually, this XML property allows us
to insert additional code into code-generated functions.

Reviewed-by: Timothy Arceri 
Part-of: 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=4970199d11907833858bbb2700ba313ae12f3a95
Author: Marek Olšák 
Date:   Thu Feb 20 18:10:37 2020 -0500

glthread: don't insert an empty line after (void) cmd;

Reviewed-by: Timothy Arceri 
Part-of: 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=b9eef27920ca7b670225cdc529f200b30140dc39
Author: Marek Olšák 
Date:   Wed Feb 19 22:15:51 2020 -0500

glthread: add support for glMemoryObjectParameteriv, 
glSemaphoreParameterui64v

Reviewed-by: Timothy Arceri 
Part-of: 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=b5c58bbf6ce49199eca076225a7985f3e149ffd3
Author: Marek Olšák 
Date:   Wed Feb 19 22:06:53 2020 -0500

glthread: add support for glCallLists, glPatchParameterfv

Reviewed-by: Timothy Arceri 
Part-of: 

URL:

Mesa (master): docs: add relnotes for 20.0.1

[GitLab Mirror]

Module: Mesa
Branch: master
Commit: 7c8766402ec6f43cd45219dc7cac310fc14101b6
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=7c8766402ec6f43cd45219dc7cac310fc14101b6

Author: Dylan Baker 
Date:   Thu Mar  5 13:33:09 2020 -0800

docs: add relnotes for 20.0.1

Part-of: 

---

 docs/relnotes/20.0.1.html | 172 ++
 1 file changed, 172 insertions(+)

diff --git a/docs/relnotes/20.0.1.html b/docs/relnotes/20.0.1.html
new file mode 100644
index 000..8066fc41c03
--- /dev/null
+++ b/docs/relnotes/20.0.1.html
@@ -0,0 +1,172 @@
+
+http://www.w3.org/TR/html4/loose.dtd;>
+
+
+
+Mesa Release Notes
+
+
+
+
+
+The Mesa 3D Graphics Library
+
+
+
+
+
+Mesa 20.0.1 Release Notes / 2020-03-05
+
+
+Mesa 20.0.1 is a bug fix release which fixes bugs found since the 20.0.0 
release.
+
+
+Mesa 20.0.1 implements the OpenGL 4.6 API, but the version reported by
+glGetString(GL_VERSION) or glGetIntegerv(GL_MAJOR_VERSION) /
+glGetIntegerv(GL_MINOR_VERSION) depends on the particular driver being used.
+Some drivers don't support all the features required in OpenGL 4.6. OpenGL
+4.6 is only available if requested at context creation.
+Compatibility contexts may report a lower version depending on each driver.
+
+
+Mesa 20.0.1 implements the Vulkan 1.1 API, but the version reported by
+the apiVersion property of the VkPhysicalDeviceProperties struct
+depends on the particular driver being used.
+
+
+SHA256 checksum
+
+TBD.
+
+
+
+New features
+
+
+
+
+Bug fixes
+
+
+V3D/Broadcom (Raspberry Pi 4) - GLES 3.1 - GL_EXT_texture_norm16 
advertised, but not usable
+i965 assertion failure in fallback_rgbx_to_rgba
+Compute copies do not handle SUBSAMPLED formats
+
+
+Changes
+
+
+Andreas Baierl (1):
+  gitlab-ci: lima: Add flaky tests to the skips list
+
+Andrii Simiklit (1):
+  Revert glx: convert glx_config_create_list to one big 
calloc
+
+Arcady Goldmints-Orlov (1):
+  spirv: Remove outdated SPIR-V decoration warnings
+
+Bas Nieuwenhuizen (1):
+  radeonsi: Fix compute copies for subsampled formats.
+
+Caio Marcelo de Oliveira Filho (1):
+  intel/gen12: Take into account opcode when decoding SWSB
+
+Chris Wilson (1):
+  iris: Fix import sync-file into syncobj
+
+Danylo Piliaiev (1):
+  i965: Do not generate D16 B5G6R5_UNORM configs on gen  8
+
+Dave Airlie (7):
+  dri: add another get shm variant.
+  glx/drisw: add getImageShm2 path
+  glx/drisw: return false if shmid == -1
+  glx/drisw: fix shm put image fallback
+  gallivm/tgsi: fix stream id regression
+  gallivm/nir: fix integer divide SIGFPE
+  gallivm/nir: handle mod 0 better.
+
+Dylan Baker (7):
+  docs: Add release notes for 20.0.0
+  .pick_status.json: Update to 
8291d728dc997e87b4d2e4e451692643a1dba881
+  .pick_status.json: Update to 
e4baff90812d799d586296fcad992ddcc553c359
+  .pick_status.json: Update to 
01496e3d1ea0370af03e6645dbd2b864c2ace94c
+  .pick_status.json: Update to 
09323634898ab3efc0150dc7d756bf36b1b89b76
+  .pick_status.json: Update to 
3503cb4c28e01b34f3a25546c058150709c22348
+  .pick_status.json: Update to 
0ac731b1ff96de46998948aa06081efa5140d50e
+
+Eric Anholt (3):
+  llvmpipe: Fix real uninitialized use of atype for 
SEMANTIC_FACE
+  turnip: Fix compiler warning about casting a nondispatchable 
handle.
+  aco: Fix signed-vs-unsigned warning.
+
+Erik Faye-Lund (1):
+  util: promote u_debug_memory.c to src/util
+
+Ian Romanick (2):
+  nir/search: Use larger type to hold linearized index
+  intel/fs: Correctly handle multiply of fsign with a source 
modifier
+
+James Xiong (1):
+  iris: handle the failure of converting unsupported yuv formats 
to isl
+
+Jason Ekstrand (1):
+  anv: Always enable the data cache
+
+Jonathan Marek (1):
+  turnip: fix srgb MRT
+
+Jordan Justen (1):
+  intel/compiler: Restrict cs_threads to 64
+
+Jose Maria Casanova Crespo (1):
+  v3d: Sync on last CS when non-compute stage uses resource 
written by CS
+
+Kenneth Graunke (2):
+  iris: Make mocs an inline helper in iris_resource.h
+  iris: Fix BLORP vertex buffers to respect ISL MOCS settings
+
+Marek Olšák (5):
+  mesa: fix immediate mode with tessellation and varying patch 
vertices
+  util: remove the dependency on kcmp.h
+  tgsi_to_nir: set num_images and num_samplers with holes 
correctly
+  mesa: call FLUSH_VERTICES before updating CoordReplace
+  mesa: fix incorrect prim.begin/end for glMultiDrawElements
+
+Mathias Fröhlich (2):
+  egl: Fix A2RGB10 platform_{device,surfaceless} 

Mesa (master): docs: Add sha256sums for 20.0.1

[GitLab Mirror]

Module: Mesa
Branch: master
Commit: 6b1f94e9f22e9c70da9e96bc490def5b8165c2a9
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=6b1f94e9f22e9c70da9e96bc490def5b8165c2a9

Author: Dylan Baker 
Date:   Thu Mar  5 13:59:11 2020 -0800

docs: Add sha256sums for 20.0.1

Part-of: 

---

 docs/relnotes/20.0.1.html | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/docs/relnotes/20.0.1.html b/docs/relnotes/20.0.1.html
index 8066fc41c03..6be69638a19 100644
--- a/docs/relnotes/20.0.1.html
+++ b/docs/relnotes/20.0.1.html
@@ -36,7 +36,7 @@ depends on the particular driver being used.
 
 SHA256 checksum
 
-TBD.
+  6153ba3f8cb0524bbfc08e4db76b408126b2d1be8f789dffe28d1a0461eedde4  
mesa-20.0.1.tar.xz
 
 
 

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Mesa (master): docs: update news, calendar, and link release notes for 20.0.1

[GitLab Mirror]

Module: Mesa
Branch: master
Commit: a19c9290f44e6e73a104067a98420c273d98721b
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=a19c9290f44e6e73a104067a98420c273d98721b

Author: Dylan Baker 
Date:   Thu Mar  5 15:36:54 2020 -0800

docs: update news, calendar, and link release notes for 20.0.1

Also fix a couple of dates that are wrong.

Tested-by: Marge Bot 

Part-of: 

---

 docs/index.html|  4 ++--
 docs/release-calendar.html | 16 +---
 docs/relnotes.html |  4 ++--
 3 files changed, 9 insertions(+), 15 deletions(-)

diff --git a/docs/index.html b/docs/index.html
index e00b5121289..9605d4672fa 100644
--- a/docs/index.html
+++ b/docs/index.html
@@ -16,7 +16,7 @@
 
 News
 
-February 19, 2020Mesa 20.0.0 is 
released. This is a new development release. See the release notes for more 
information about this release.February 13, 2020Mesa 19.3.4 is released. This is a bug fix 
release.January 28, 2020Mesa 
19.3.3 is released. This is a bug fix release.January 9, 
2020Mesa 19.3.2 is released. This is 
a bug fix release.December 18, 2019Mesa 19.2.8 is released. This is a bug fix 
release.December 18, 2019Mesa 
19.3.1 is released. This is a bug fix release.December 12, 
2019Mesa 19.3.0 is released. This is 
a new development release. See the release notes for mor information about this 
release.December 4, 2019<
 p>Mesa 19.2.7 is released. This is a bug 
fix release.November 21, 2019Mesa 19.2.6 is released. This is a bug fix 
release.November 20, 2019Mesa 
19.2.5 is released. This is a bug fix release.November 13, 
2019Mesa 19.2.4 is released. This is 
an emergency bugfix release, all users of 19.2.3 are recomended to upgrade 
immediately.
+March 5, 2020Mesa 20.0.1 is 
released. This is a bug fix release.February 19, 2020Mesa 20.0.0 is released. This is a new 
development release. See the release notes for more information about this 
release.February 13, 2020Mesa 
19.3.4 is released. This is a bug fix release.January 28, 
2020Mesa 19.3.3 is released. This is 
a bug fix release.January 9, 2020Mesa 19.3.2 is released. This is a bug fix 
release.December 18, 2019Mesa 
19.2.8 is released. This is a bug fix release.December 18, 
2019Mesa 19.3.1 is released. This is 
a bug fix release.December 12, 2019Mesa 19.3.0 is released. This is a n
 ew development release. See the release notes for mor information about this 
release.December 4, 2019Mesa 
19.2.7 is released. This is a bug fix release.November 21, 
2019Mesa 19.2.6 is released. This is 
a bug fix release.November 20, 2019Mesa 19.2.5 is released. This is a bug fix 
release.November 13, 2019Mesa 
19.2.4 is released. This is an emergency bugfix release, all users of 
19.2.3 are recomended to upgrade immediately.
 November 6, 2019Mesa 19.2.3 is 
released. This is a bug fix release.October 24, 2019Mesa 19.2.2 is released. This is a bug fix 
release.October 21, 2019
 
 Mesa 19.1.8 is released.
@@ -2702,4 +2702,4 @@ http://www.quake3arena.com/news/glopt.html
 
 
 
-
+
\ No newline at end of file
diff --git a/docs/release-calendar.html b/docs/release-calendar.html
index f409f8d7b21..62de66a600f 100644
--- a/docs/release-calendar.html
+++ b/docs/release-calendar.html
@@ -66,27 +66,21 @@ if you'd like to nominate a patch in the next stable 
release.
 Last planned release of 19.3.x
 
 
-20.0
-2020-03-04
-20.0.1
-Dylan Baker
-
-
-
+20.0
 2020-03-18
 20.0.2
 Dylan Baker
 
 
 
-2020-04-04
-20.0.2
+2020-04-01
+20.0.3
 Dylan Baker
 
 
 
-2020-04-18
-20.0.3
+2020-04-15
+20.0.4
 Dylan Baker
 
 
diff --git a/docs/relnotes.html b/docs/relnotes.html
index 2b8f0fa61fd..e16cce2e7ef 100644
--- a/docs/relnotes.html
+++ b/docs/relnotes.html
@@ -21,7 +21,7 @@ The release notes summarize what's new or changed in each 
Mesa release.
 
 
 
-20.0.0 release notes19.3.4 release notes19.3.3 release notes19.3.2 release notes19.2.8 release notes19.3.1 release notes19.3.0 release notes19.2.7 release notes19.2.6 release notes19.2.5 release notes19.2.4 release notes19.2.3 release notes19.2.2 release notes19.1.8 release notes
+20.0.1 release notes20.0.0 release notes19.3.4 release notes19.3.3 release notes19.3.2 release notes19.2.8 release notes19.3.1 release notes19.3.0 release notes19.2.7 release notes19.2.6 release notes19.2.5 release notes19.2.4 release notes19.2.3 release notes19.2.2 release notes19.1.8 release notes
 19.2.1 release notes19.2.0 release notes
 19.1.7 release notes
 19.1.6 release notes
@@ -303,4 +303,4 @@ Versions of Mesa prior to 6.4 are summarized in the
 
 
 
-
+
\ No newline at end of file

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Mesa (master): docs: update releasing to cover updated post_version.py

[GitLab Mirror]

Module: Mesa
Branch: master
Commit: f1890b7ad85b74bd92c858919a304dce8f7aae10
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=f1890b7ad85b74bd92c858919a304dce8f7aae10

Author: Dylan Baker 
Date:   Mon Oct 28 08:48:44 2019 -0700

docs: update releasing to cover updated post_version.py

Reviewed-by: Eric Engestrom 
Reviewed-by: Juan A. Suarez 
Tested-by: Marge Bot 

Part-of: 

---

 docs/releasing.html | 11 +--
 1 file changed, 5 insertions(+), 6 deletions(-)

diff --git a/docs/releasing.html b/docs/releasing.html
index e5a453799bb..15ec38a3771 100644
--- a/docs/releasing.html
+++ b/docs/releasing.html
@@ -381,15 +381,14 @@ git cherry-pick -x X.Y~1
 git cherry-pick -x X.Y
 
 
-Then run the ./bin/post_verison.py X.Y.Z, where X.Y.Z is the
-version you just made. This will updated docs/relnotes.html and
-docs/index.html. Remove the new release from docs/release-calendar.html. Then
-commit and push:
+Then run the ./bin/post_verison.py X.Y.Z, where X.Y.Z is the
+version you just made. This will updated docs/relnotes.html,
+docs/index.html, and docs/release-calendar.html. It will then generate
+a git commit automatically. Check that everything looks correct and push:
 
 
 
-git commit -as -m "docs: update calendar, add news item and link release notes 
for X.Y.Z"
-git push origin master X.Y
+   git push origin master X.Y
 
 
 

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Mesa (master): bin/post_version.py: Make the git commit as well.

[GitLab Mirror]

Module: Mesa
Branch: master
Commit: 5cdaa06221f73fcb9476c30f52e3210f1e3f65b7
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=5cdaa06221f73fcb9476c30f52e3210f1e3f65b7

Author: Dylan Baker 
Date:   Mon Oct 28 08:47:14 2019 -0700

bin/post_version.py: Make the git commit as well.

Reviewed-by: Eric Engestrom 
Reviewed-by: Juan A. Suarez 
Part-of: 

---

 bin/post_version.py  | 8 
 bin/post_version_test.py | 2 ++
 2 files changed, 10 insertions(+)

diff --git a/bin/post_version.py b/bin/post_version.py
index 3fbb5e2107c..5cf5f48615e 100755
--- a/bin/post_version.py
+++ b/bin/post_version.py
@@ -25,6 +25,8 @@ import argparse
 import calendar
 import datetime
 import pathlib
+import subprocess
+
 from lxml import (
 etree,
 html,
@@ -84,6 +86,7 @@ def update_index(is_point: bool, version: str, 
previous_version: str) -> None:
 root.insert(index, header)
 
 tree.write(p.as_posix(), method='html', pretty_print=True)
+subprocess.run(['git', 'add', p])
 
 
 def update_release_notes(previous_version: str) -> None:
@@ -99,6 +102,7 @@ def update_release_notes(previous_version: str) -> None:
 ul.insert(0, li)
 
 tree.write(p.as_posix(), method='html', pretty_print=True)
+subprocess.run(['git', 'add', p])
 
 
 def update_calendar(previous_version: str) -> None:
@@ -132,6 +136,7 @@ def update_calendar(previous_version: str) -> None:
 new.insert(0, td)
 
 tree.write(p.as_posix(), method='html', pretty_print=True)
+subprocess.run(['git', 'add', p])
 
 
 def main() -> None:
@@ -145,6 +150,9 @@ def main() -> None:
 update_index(is_point, args.version, previous_version)
 update_release_notes(previous_version)
 update_calendar(previous_version)
+subprocess.run(['git', 'commit', '-m',
+'docs: update calendar, add news item, and link releases '
+f'notes for {previous_version}'])
 
 
 if __name__ == "__main__":
diff --git a/bin/post_version_test.py b/bin/post_version_test.py
index 11b28061e57..d0794a609f4 100644
--- a/bin/post_version_test.py
+++ b/bin/post_version_test.py
@@ -27,6 +27,8 @@ import pytest
 from . import post_version
 
 
+# Mock out subprocess.run to avoid having git commits
+@mock.patch('bin.post_version.subprocess.run', mock.Mock())
 class TestUpdateCalendar:
 
 HEAD = textwrap.dedent("""\

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Mesa (master): bin/post_version.py: Update the release calendar as well

[GitLab Mirror]

Module: Mesa
Branch: master
Commit: d7ada7d7e06359b01fcb6c25b295f58f10f50682
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=d7ada7d7e06359b01fcb6c25b295f58f10f50682

Author: Dylan Baker 
Date:   Thu Oct 24 15:51:30 2019 -0700

bin/post_version.py: Update the release calendar as well

Acked-by: Eric Engestrom 
Reviewed-by: Juan A. Suarez 
Part-of: 

---

 bin/post_version.py  |  34 +++
 bin/post_version_test.py | 156 +++
 2 files changed, 190 insertions(+)

diff --git a/bin/post_version.py b/bin/post_version.py
index d9b2a1de324..5bf68fe35d2 100755
--- a/bin/post_version.py
+++ b/bin/post_version.py
@@ -101,6 +101,39 @@ def update_release_notes(previous_version: str) -> None:
 tree.write(p.as_posix(), method='html')
 
 
+def update_calendar(previous_version: str) -> None:
+p = pathlib.Path(__file__).parent.parent / 'docs' / 'release-calendar.html'
+with p.open('rt') as f:
+tree = html.parse(f)
+
+base_version = previous_version[:-2]
+
+old = None
+new = None
+
+for tr in tree.xpath('.//tr'):
+if old is not None:
+new = tr
+break
+
+for td in tr.xpath('./td'):
+if td.text == base_version:
+old = tr
+break
+
+assert old is not None
+assert new is not None
+old.getparent().remove(old)
+
+# rowspan is 1 based in html, but 0 based in lxml
+rowspan = int(td.get("rowspan")) - 1
+if rowspan:
+td.set("rowspan", str(rowspan))
+new.insert(0, td)
+
+tree.write(p.as_posix(), method='html')
+
+
 def main() -> None:
 parser = argparse.ArgumentParser()
 parser.add_argument('version', help="The released version.")
@@ -111,6 +144,7 @@ def main() -> None:
 
 update_index(is_point, args.version, previous_version)
 update_release_notes(previous_version)
+update_calendar(previous_version)
 
 
 if __name__ == "__main__":
diff --git a/bin/post_version_test.py b/bin/post_version_test.py
new file mode 100644
index 000..11b28061e57
--- /dev/null
+++ b/bin/post_version_test.py
@@ -0,0 +1,156 @@
+# Copyright © 2019 Intel Corporation
+
+# Permission is hereby granted, free of charge, to any person obtaining a copy
+# of this software and associated documentation files (the "Software"), to deal
+# in the Software without restriction, including without limitation the rights
+# to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+# copies of the Software, and to permit persons to whom the Software is
+# furnished to do so, subject to the following conditions:
+
+# The above copyright notice and this permission notice shall be included in
+# all copies or substantial portions of the Software.
+
+# THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+# IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+# FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+# AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+# LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+# OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+# SOFTWARE.
+
+from unittest import mock
+import textwrap
+
+from lxml import html
+import pytest
+
+from . import post_version
+
+
+class TestUpdateCalendar:
+
+HEAD = textwrap.dedent("""\
+http://www.w3.org/TR/html4/loose.dtd;>
+
+
+
+Release Calendar
+
+
+
+""")
+
+TABLE = textwrap.dedent("""\
+
+
+Branch
+Expected date
+Release
+Release manager
+Notes
+
+""")
+
+FOOT = ""
+
+TABLE_FOOT = ""
+
+def wrap_table(self, table: str) -> str:
+return self.HEAD + self.TABLE + table + self.TABLE_FOOT + self.FOOT
+
+def test_basic(self):
+data = self.wrap_table(textwrap.dedent("""\
+
+19.2
+2019-11-06
+19.2.3
+Dylan Baker
+
+
+2019-11-20
+19.2.4
+Dylan Baker
+
+
+2019-12-04
+19.2.5
+Dylan Baker
+Last planned 19.2.x release
+
+"""))
+
+parsed = html.fromstring(data)
+parsed.write = mock.Mock()
+
+with mock.patch('bin.post_version.html.parse',
+mock.Mock(return_value=parsed)):
+post_version.update_calendar('19.2.3')
+
+assert len(parsed.findall('.//tr')) == 3
+# we need the second element becouse the first is the header
+
+tr = parsed.findall('.//tr')[1]
+tds = tr.findall('.//td')
+assert tds[0].get("rowspan") == "2"
+assert tds[0].text == "19.2"
+assert 

Mesa (master): bin/post_version.py: Pretty print the html

[GitLab Mirror]

Module: Mesa
Branch: master
Commit: e3d3abb1bcc67891094f03c924fcc7110848eed2
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=e3d3abb1bcc67891094f03c924fcc7110848eed2

Author: Dylan Baker 
Date:   Thu Oct 24 16:14:57 2019 -0700

bin/post_version.py: Pretty print the html

Reviewed-by: Eric Engestrom 
Reviewed-by: Juan A. Suarez 
Part-of: 

---

 bin/post_version.py | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/bin/post_version.py b/bin/post_version.py
index 5bf68fe35d2..3fbb5e2107c 100755
--- a/bin/post_version.py
+++ b/bin/post_version.py
@@ -83,7 +83,7 @@ def update_index(is_point: bool, version: str, 
previous_version: str) -> None:
 root.insert(index, body)
 root.insert(index, header)
 
-tree.write(p.as_posix(), method='html')
+tree.write(p.as_posix(), method='html', pretty_print=True)
 
 
 def update_release_notes(previous_version: str) -> None:
@@ -98,7 +98,7 @@ def update_release_notes(previous_version: str) -> None:
 ul = tree.xpath('.//ul')[0]
 ul.insert(0, li)
 
-tree.write(p.as_posix(), method='html')
+tree.write(p.as_posix(), method='html', pretty_print=True)
 
 
 def update_calendar(previous_version: str) -> None:
@@ -131,7 +131,7 @@ def update_calendar(previous_version: str) -> None:
 td.set("rowspan", str(rowspan))
 new.insert(0, td)
 
-tree.write(p.as_posix(), method='html')
+tree.write(p.as_posix(), method='html', pretty_print=True)
 
 
 def main() -> None:

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Mesa (master): docs/submittingpatches: Fix confusing typo + missing pronoun

[GitLab Mirror]

Module: Mesa
Branch: master
Commit: 7451eb9a2773a2dcde90ddc93fb5ef361b6f1b1e
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=7451eb9a2773a2dcde90ddc93fb5ef361b6f1b1e

Author: Dylan Baker 
Date:   Thu Mar  5 10:49:51 2020 -0800

docs/submittingpatches: Fix confusing typo + missing pronoun

Reviewed-by: Eric Engestrom 
Part-of: 

---

 docs/submittingpatches.html | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/docs/submittingpatches.html b/docs/submittingpatches.html
index 9113e417009..7378dda6b83 100644
--- a/docs/submittingpatches.html
+++ b/docs/submittingpatches.html
@@ -386,7 +386,8 @@ yourself warned.
 
 By default merge conflicts are resolved by the stable-release manager. The
 release maintainer should resolve trivial conflicts, but for complex conflicts
-should ask the original author to provide a backport of de-nominate.
+they should ask the original author to provide a backport or de-nominate the
+patch.
 
 
 

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Mesa (master): docs: Update release notes with current process

[GitLab Mirror]

Module: Mesa
Branch: master
Commit: d4cb9ef8260ced0a5693db18dedbdd11cbcfa7e6
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=d4cb9ef8260ced0a5693db18dedbdd11cbcfa7e6

Author: Dylan Baker 
Date:   Thu Mar  5 10:31:22 2020 -0800

docs: Update release notes with current process

There's a lot of stuff here that's out of date, update it to something
more modern.

Reviewed-by: Eric Engestrom 
Tested-by: Marge Bot 

Part-of: 

---

 docs/releasing.html | 234 +---
 1 file changed, 20 insertions(+), 214 deletions(-)

diff --git a/docs/releasing.html b/docs/releasing.html
index 644486bf37b..e5a453799bb 100644
--- a/docs/releasing.html
+++ b/docs/releasing.html
@@ -23,7 +23,6 @@
 Cherry-pick and test
 Staging branch
 Making a branchpoint
-Pre-release announcement
 Making a new release
 Announce the release
 Update Gitlab Issues
@@ -74,16 +73,11 @@ on the mesa-announce@ mailing list.
 Typically, the final release will happen after 4
 candidates. Additional ones may be needed in order to resolve blocking
 regressions, though.
-A pre-release announcement should be available
-approximately 24 hours before the final (non-rc) release.
-
 
 Stable releases
 
 Normally available once every two weeks.
 Only the latest branch has releases. See note below.
-A pre-release announcement should be available
-approximately 48 hours before the actual release.
 
 
 
@@ -113,20 +107,24 @@ described in the same section.
 
 
 
-Nomination happens in the mesa-stable@ mailing list. However,
-maintainer is responsible of checking for forgotten candidates in the
-master branch. This is achieved by a combination of ad-hoc scripts and
-a casual search for terms such as regression, fix, broken and similar.
+Nominations happen via special tags in the commit messages, and via gitlab
+merge requests against the staging branches. There are special scripts used
+to read the tags.
 
 
 
-Maintainer is also responsible for testing in various possible permutations of
-the meson and scons build.
+The maintainer should watch or be in contact with the Intel CI team, as well
+as watch the gitlab CI for regressions.
 
 
-Cherry-picking and build/check testing
+
+Cherry picking should be done with the '-x' switch (to automatically add
+"cherry picked from ..." to the commit message):
+
 
-Done continuously up-to the pre-release 
announcement.
+
+git cherry-pick -x abcdef12345667890
+
 
 
 Developers can request, as an exception, patches to be applied up-to
@@ -141,20 +139,7 @@ well contained. Thus it cannot affect more than one 
driver/subsystem.
 AMD team
 
 
-The following must pass:
-
-meson test, scons and scons check
-Testing with different version of system components - LLVM and others is 
also
-performed where possible.
-As a general rule, testing with various combinations of configure
-switches, depending on the specific patchset.
-
-
-
-These are achieved by combination of local testing,
-which includes mingw-w64 cross compilation and AppVeyor plus Travis-CI, the
-latter two as part of their Github integration.
-
+The gitlab CI must pass.
 
 
 For Windows related changes, the main contact point is Brian
@@ -178,10 +163,6 @@ fix(es), then they should be squashed together. The commit 
messages and the
 cherry picked from-tags must be preserved.
 
 
-
-This should be noted in the pre-announce email.
-
-
 
 git show b10859ec41d09c57663a258f43fe57c12332698e
 
@@ -208,27 +189,12 @@ Date:   Wed Mar 1 18:11:10 2017 +0100
 
 Regression/functionality testing
 
-
-Less often (once or twice), shortly before the pre-release announcement.
-Ensure that testing is redone if Intel devs have requested an exception, as 
per above.
-
-
 
 no regressions should be observed for Piglit/dEQP/CTS/Vulkan on Intel 
platforms
 no regressions should be observed for Piglit using the swrast, softpipe
 and llvmpipe drivers
 
 
-
-Currently testing is performed courtesy of the Intel OTC team and their 
Jenkins CI setup. Check with the Intel team over IRC how to get things setup.
-
-
-
-Installing the built driver from the pre-announced RC branch in the
-system and making some every day's use until the release may be a good
-idea too.
-
-
 Staging branch
 
 
@@ -277,8 +243,8 @@ git checkout -b X.Y
 git checkout master
 $EDITOR VERSION # bump the version number
 git commit -as
-cp docs/relnotes/{X.Y,X.Y+1}.html # copy/create relnotes template
-git commit -as
+truncate docs/relnotes/new_features.txt
+git commit -a
 git push origin X.Y-branchpoint X.Y
 
 
@@ -293,162 +259,6 @@ For example: files being overwritten on install, etc. 
Happens extremely rarely -
 we had only one case so far (see commit 
2ced8eb136528914e1bf4e000dea06a9d53c7e04).
 
 
-
-Proceed to release -rc1.
-
-
-
-Pre-release announcement
-
-
-It comes shortly after outstanding patches in the respective branch are pushed.
-Developers 

Mesa (staging/20.0): gitlab-ci: Add add a set of lima flakes

[GitLab Mirror]

Module: Mesa
Branch: staging/20.0
Commit: 2f0a18d276b82ddfab5c7632b38658693ccc340b
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=2f0a18d276b82ddfab5c7632b38658693ccc340b

Author: Andreas Baierl 
Date:   Wed Feb 26 09:17:57 2020 +0100

gitlab-ci: Add add a set of lima flakes

Reviewed-by: Vasily Khoruzhick 
Signed-off-by: Andreas Baierl 
(cherry picked from commit ef0abe5404ca3bb983e4afcbf2306291a15579ca)

Tested-by: Marge Bot 

Part-of: 

---

 .gitlab-ci/deqp-lima-skips.txt | 4 +---
 1 file changed, 1 insertion(+), 3 deletions(-)

diff --git a/.gitlab-ci/deqp-lima-skips.txt b/.gitlab-ci/deqp-lima-skips.txt
index faafcf8d83e..0ee015e 100644
--- a/.gitlab-ci/deqp-lima-skips.txt
+++ b/.gitlab-ci/deqp-lima-skips.txt
@@ -16,9 +16,7 @@ 
dEQP-GLES2.functional.shaders.invariance.lowp.common_subexpression_1
 
 # Flaky
 
dEQP-GLES2.functional.clipping.triangle_vertex.clip_three.clip_neg_x_neg_z_and_pos_x_pos_z_and_neg_x_neg_y_pos_z
-dEQP-GLES2.functional.default_vertex_attrib.float.vertex_attrib_1f
-dEQP-GLES2.functional.default_vertex_attrib.float.vertex_attrib_2f
-dEQP-GLES2.functional.default_vertex_attrib.float.vertex_attrib_3f
+dEQP-GLES2.functional.default_vertex_attrib.*
 dEQP-GLES2.functional.fbo.completeness.size.distinct
 dEQP-GLES2.functional.negative_api.shader.uniform_matrixfv_invalid_transpose
 
dEQP-GLES2.functional.negative_api.texture.generatemipmap_zero_level_array_compressed

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Mesa (20.0): docs: Add sha256sums for 20.0.1

[GitLab Mirror]

Module: Mesa
Branch: 20.0
Commit: 4392cf2d6dec421ad0a585885ecfcdf1ee0e83db
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=4392cf2d6dec421ad0a585885ecfcdf1ee0e83db

Author: Dylan Baker 
Date:   Thu Mar  5 13:59:11 2020 -0800

docs: Add sha256sums for 20.0.1

---

 docs/relnotes/20.0.1.html | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/docs/relnotes/20.0.1.html b/docs/relnotes/20.0.1.html
index 8066fc41c03..6be69638a19 100644
--- a/docs/relnotes/20.0.1.html
+++ b/docs/relnotes/20.0.1.html
@@ -36,7 +36,7 @@ depends on the particular driver being used.
 
 SHA256 checksum
 
-TBD.
+  6153ba3f8cb0524bbfc08e4db76b408126b2d1be8f789dffe28d1a0461eedde4  
mesa-20.0.1.tar.xz
 
 
 

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Mesa: tag mesa-20.0.1: mesa-20.0.1

[GitLab Mirror]

Module: Mesa
Branch: refs/tags/mesa-20.0.1
Tag:c8cb74348faf1fa22fce72bf10edb140f133db4d
URL:
http://cgit.freedesktop.org/mesa/mesa/tag/?id=c8cb74348faf1fa22fce72bf10edb140f133db4d

Tagger: Dylan Baker 
Date:   Thu Mar  5 13:48:57 2020 -0800

mesa-20.0.1
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Mesa (20.0): 57 new commits

[GitLab Mirror]

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=53b2b224dc2de982c37915a0ad218e33365ff75e
Author: Dylan Baker 
Date:   Thu Mar 5 13:33:32 2020 -0800

Bump version for 20.0.1

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=bc67340ea551e3c7361cf90f7edb48c57dba424f
Author: Dylan Baker 
Date:   Thu Mar 5 13:33:09 2020 -0800

docs: add relnotes for 20.0.1

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=1defcf02b49975a92e20997e5c5bd41e7794677f
Author: Andrii Simiklit 
Date:   Wed Jan 15 12:34:38 2020 +0200

Revert "glx: convert glx_config_create_list to one big calloc"

This reverts commit 35fc7bdf0e6ad6547e39099e7060a3d89539b56d.

Unfortunately mentioned commit introduced a memory leak because
`driwindowsMapConfigs` and `createDriMode` functions allocate
small memory portions for each element:
 21,576 (232 direct, 21,344 indirect) bytes in 1 blocks are definitely lost 
in loss record 1,411 of 1,414
at 0x483A7F3: malloc (in 
/usr/lib/x86_64-linux-gnu/valgrind/vgpreload_memcheck-amd64-linux.so)
by 0x5D4AA09: createDriMode (dri_common.c:291)
by 0x5D4ABF5: driConvertConfigs (dri_common.c:310)
by 0x5D58414: dri3_create_screen (dri3_glx.c:945)
by 0x5D39829: AllocAndFetchScreenConfigs (glxext.c:815)
by 0x5D39C57: __glXInitialize (glxext.c:941)
by 0x5D3290A: GetGLXPrivScreenConfig (glxcmds.c:174)
by 0x5D34F38: glXQueryExtensionsString (glxcmds.c:1307)
by 0x4F83038: glXQueryExtensionsString (in 
/usr/local/lib/libGL.so.1.7.0)
by 0x4F2EA6B: ??? (in /usr/lib/x86_64-linux-gnu/libwaffle-1.so.0.6.0)
by 0x4F2A0D7: waffle_display_connect (in 
/usr/lib/x86_64-linux-gnu/libwaffle-1.so.0.6.0)
by 0x498F42A: wfl_checked_display_connect (piglit-util-waffle.h:74)

There is one more thing which disallow us to easily fix it are different 
element sizes
for instance: `glx_config_create_list` allocates memory just for 
`glx_config`,
`driwindowsMapConfigs` for `driwindows_config` and
`createDriMode` for `__GLXDRIconfigPrivate`.
Yes it is possible but size of such fix
will be more big and complex than original one.
So it make sense only if the malloc overhead
really is a big problem there.

Acked-by: Eric Engestrom 
Signed-off-by: Andrii Simiklit 
Tested-by: Marge Bot 

Part-of: 
(cherry picked from commit 311c82e1923f63070b198881d90c1098f4ff7a08)

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=3d203789a93ae69d4e438b28171686871cc07c7e
Author: Rafael Antognolli 
Date:   Tue Mar 3 08:07:32 2020 -0800

intel/gen12+: Disable mid thread preemption.

Fixes a GPU hang in Car Chase.

Cc: mesa-sta...@lists.freedesktop.org

v2: Add comment explaining why (Jason).

Reviewed-by: Jason Ekstrand 
Reviewed-by: Lionel Landwerlin 
Tested-by: Marge Bot 

Part-of: 
(cherry picked from commit 5f13996262a6d72ca5b5c235647d5257ae961b66)

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=5620cd4bcaf5d8f0a90d9e087b35e0632ec44c1c
Author: Rhys Perry 
Date:   Fri Feb 21 12:00:38 2020 +

aco: fix carry-out size for wave32 v_add_co_u32_e64

Signed-off-by: Rhys Perry 
Reviewed-By: Timur Kristóf 
Fixes: e0bcefc3a0a ('aco/wave32: Use lane mask regclass for exec/vcc.')
Part-of: 
(cherry picked from commit 215df21dea143581c9d84a186221cf834c7d)

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=fe1ba4a04176ec588b26fcc1d56e2433ab16d5f3
Author: Rhys Perry 
Date:   Tue Feb 11 16:52:20 2020 +

aco: keep track of which events are used in a barrier

And properly handle unordered events so that they always wait for 0.

Signed-off-by: Rhys Perry 
Fixes: 93c8ebfa780 ('aco: Initial commit of independent AMD compiler')
Reviewed-by: Daniel Schürmann 
Tested-by: Marge Bot 

Part-of: 
(cherry picked from commit 9fea90ad5170dd64376d22a14ac88c392813c96c)

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=d80837467488f6bef2e53b3d26a8d6fd4e46ea37
Author: Paulo Zanoni 
Date:   Fri Jan 24 14:41:25 2020 -0800

intel/device: bdw_gt1 actually has 6 eus per subslice

Found by inspection, I'm not aware of any bugs caused by this typo.

According to Lionel, it seems we only use this to generate masks
of available EUs for perfromance queries, and it's only used when we
can't query the fused parts of the GPU through DRM_IOCTL_I915_QUERY.
So 

Mesa (staging/20.0): Revert "mesa: check for z=0 in _mesa_Vertex3dv()"

[GitLab Mirror]

Module: Mesa
Branch: staging/20.0
Commit: fd04f6166ebd8fa3bf72e8d031dfd91e80231c6e
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=fd04f6166ebd8fa3bf72e8d031dfd91e80231c6e

Author: Marek Olšák 
Date:   Thu Feb 27 16:06:47 2020 -0500

Revert "mesa: check for z=0 in _mesa_Vertex3dv()"

This reverts commit f04d7439a0ad6e13ff2912ff824553b6bcf511a4.

It no longer helps performance and the current vbo implementation is
faster anyway.

The app that hit this was a CAD program called Spazio3D. It made pretty
terrible use of the OpenGL API and we sent them some tips for improvements.
I'm assuming they've fixed this by now.

Reviewed-by: Mathias Fröhlich 
Reviewed-by: Ian Romanick 
Part-of: 
(cherry picked from commit df3891e74a72d275aceba91adc94a9e7dc9aa029)

---

 .pick_status.json| 2 +-
 src/mesa/main/api_loopback.c | 5 +
 2 files changed, 2 insertions(+), 5 deletions(-)

diff --git a/.pick_status.json b/.pick_status.json
index 8ef6f7a7d4e..7d6cdb1dc6f 100644
--- a/.pick_status.json
+++ b/.pick_status.json
@@ -490,7 +490,7 @@
 "description": "Revert \"mesa: check for z=0 in _mesa_Vertex3dv()\"",
 "nominated": true,
 "nomination_type": 2,
-"resolution": 0,
+"resolution": 1,
 "master_sha": null,
 "because_sha": "f04d7439a0ad6e13ff2912ff824553b6bcf511a4"
 },
diff --git a/src/mesa/main/api_loopback.c b/src/mesa/main/api_loopback.c
index c03c33ee339..53873eae29e 100644
--- a/src/mesa/main/api_loopback.c
+++ b/src/mesa/main/api_loopback.c
@@ -631,10 +631,7 @@ _mesa_Vertex2sv( const GLshort *v )
 void GLAPIENTRY
 _mesa_Vertex3dv( const GLdouble *v )
 {
-   if (v[2] == 0.0)
-  VERTEX2( (GLfloat) v[0], (GLfloat) v[1] );
-   else
-  VERTEX3( (GLfloat) v[0], (GLfloat) v[1], (GLfloat) v[2] );
+   VERTEX3( (GLfloat) v[0], (GLfloat) v[1], (GLfloat) v[2] );
 }
 
 void GLAPIENTRY

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Mesa (staging/20.0): Revert "glsl: Use a simpler formula for tanh"

[GitLab Mirror]

Module: Mesa
Branch: staging/20.0
Commit: 2797cf57be81c857444b72b4bf4db8ad29c7d539
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=2797cf57be81c857444b72b4bf4db8ad29c7d539

Author: Kristian H. Kristensen 
Date:   Wed Feb 26 16:52:45 2020 -0800

Revert "glsl: Use a simpler formula for tanh"

This reverts commit 9807f502eb7a023be619a14119388b2a43271b0e.

The simplified formula doesn't pass the tanh dEQP tests when we lower
to fp16 math.

Part-of: 
(cherry picked from commit 986e92f0ea803caf014adc40e900bc774af71da3)

---

 .pick_status.json   |  2 +-
 src/compiler/glsl/builtin_functions.cpp | 18 --
 2 files changed, 9 insertions(+), 11 deletions(-)

diff --git a/.pick_status.json b/.pick_status.json
index 61486b325f4..90b880eb570 100644
--- a/.pick_status.json
+++ b/.pick_status.json
@@ -40,7 +40,7 @@
 "description": "Revert \"glsl: Use a simpler formula for tanh\"",
 "nominated": true,
 "nomination_type": 2,
-"resolution": 0,
+"resolution": 1,
 "master_sha": null,
 "because_sha": "9807f502eb7a023be619a14119388b2a43271b0e"
 },
diff --git a/src/compiler/glsl/builtin_functions.cpp 
b/src/compiler/glsl/builtin_functions.cpp
index d77404ee77f..82e00a64ad9 100644
--- a/src/compiler/glsl/builtin_functions.cpp
+++ b/src/compiler/glsl/builtin_functions.cpp
@@ -5169,19 +5169,17 @@ builtin_builder::_tanh(const glsl_type *type)
ir_variable *x = in_var(type, "x");
MAKE_SIG(type, v130, 1, x);
 
-   /* tanh(x) := (0.5 * (e^x - e^(-x))) / (0.5 * (e^x + e^(-x)))
-*
-* With a little algebra this reduces to (e^2x - 1) / (e^2x + 1)
-*
-* Clamp x to (-inf, +10] to avoid precision problems.  When x > 10, e^2x
-* is so much larger than 1.0 that 1.0 gets flushed to zero in the
-* computation e^2x +/- 1 so it can be ignored.
+   /* Clamp x to [-10, +10] to avoid precision problems.
+* When x > 10, e^(-x) is so small relative to e^x that it gets flushed to
+* zero in the computation e^x + e^(-x). The same happens in the other
+* direction when x < -10.
 */
ir_variable *t = body.make_temp(type, "tmp");
-   body.emit(assign(t, min2(x, imm(10.0f;
+   body.emit(assign(t, min2(max2(x, imm(-10.0f)), imm(10.0f;
 
-   body.emit(ret(div(sub(exp(mul(t, imm(2.0f))), imm(1.0f)),
- add(exp(mul(t, imm(2.0f))), imm(1.0f);
+   /* (e^x - e^(-x)) / (e^x + e^(-x)) */
+   body.emit(ret(div(sub(exp(t), exp(neg(t))),
+ add(exp(t), exp(neg(t));
 
return sig;
 }

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Mesa (staging/20.0): aco: fix image load/store with lod and 1D images

[GitLab Mirror]

Module: Mesa
Branch: staging/20.0
Commit: 370d00a1af9858a4795e81957a84eb122f4dfbd3
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=370d00a1af9858a4795e81957a84eb122f4dfbd3

Author: Samuel Pitoiset 
Date:   Thu Mar  5 11:32:06 2020 +0100

aco: fix image load/store with lod and 1D images

Make sure to add the lod value if non-null as the 2nd operand.

Fixes dEQP-VK.image.load_store_lod.with_format.1d.* on all gens
except GFX9.

Fixes: 4d49a7ac737 ("aco: handle nir_intrinsic_image_deref_{load,store} with 
lod")
Signed-off-by: Samuel Pitoiset 
Reviewed-by: Daniel Schürmann 
Reviewed-by: Samuel Iglesias Gonsálvez 
Tested-by: Marge Bot 

Part-of: 
(cherry picked from commit 7618fe1b484eecc2246202df1e53ee607c6d70c4)

---

 .pick_status.json  | 2 +-
 src/amd/compiler/aco_instruction_selection.cpp | 3 ---
 2 files changed, 1 insertion(+), 4 deletions(-)

diff --git a/.pick_status.json b/.pick_status.json
index 7d6cdb1dc6f..61486b325f4 100644
--- a/.pick_status.json
+++ b/.pick_status.json
@@ -418,7 +418,7 @@
 "description": "aco: fix image load/store with lod and 1D images",
 "nominated": true,
 "nomination_type": 1,
-"resolution": 0,
+"resolution": 1,
 "master_sha": null,
 "because_sha": "4d49a7ac737f298b136ab6447e18c6e4654f8ad5"
 },
diff --git a/src/amd/compiler/aco_instruction_selection.cpp 
b/src/amd/compiler/aco_instruction_selection.cpp
index 24be495dbb5..c5bb4f12dba 100644
--- a/src/amd/compiler/aco_instruction_selection.cpp
+++ b/src/amd/compiler/aco_instruction_selection.cpp
@@ -4314,9 +4314,6 @@ static Temp get_image_coords(isel_context *ctx, const 
nir_intrinsic_instr *instr
   }
}
 
-   if (count == 1 && !gfx9_1d)
-  return emit_extract_vector(ctx, src0, 0, v1);
-
if (gfx9_1d) {
   coords[0] = emit_extract_vector(ctx, src0, 0, v1);
   coords.resize(coords.size() + 1);

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Mesa (staging/20.0): .pick_status.json: Update to 07f1ef5656e0721282d01a8421eaca056348137d

[GitLab Mirror]

Module: Mesa
Branch: staging/20.0
Commit: 60b35c74892c0bb8fbe194c7020c90cd696d535d
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=60b35c74892c0bb8fbe194c7020c90cd696d535d

Author: Dylan Baker 
Date:   Thu Mar  5 12:56:11 2020 -0800

.pick_status.json: Update to 07f1ef5656e0721282d01a8421eaca056348137d

---

 .pick_status.json | 612 ++
 1 file changed, 612 insertions(+)

diff --git a/.pick_status.json b/.pick_status.json
index 414cbf394c5..8ef6f7a7d4e 100644
--- a/.pick_status.json
+++ b/.pick_status.json
@@ -1,4 +1,616 @@
 [
+{
+"sha": "07f1ef5656e0721282d01a8421eaca056348137d",
+"description": "docs: Update stable process around using fixes: and 
gitlab",
+"nominated": false,
+"nomination_type": null,
+"resolution": 4,
+"master_sha": null,
+"because_sha": null
+},
+{
+"sha": "55dac91adc40db191c385f9a2ce393f46dd9b859",
+"description": "turnip: fix tile->slot calculation",
+"nominated": false,
+"nomination_type": null,
+"resolution": 4,
+"master_sha": null,
+"because_sha": null
+},
+{
+"sha": "036230341f4f2e7b11791708015342cf9385cf76",
+"description": "turnip: improve binning pipe layout config",
+"nominated": false,
+"nomination_type": null,
+"resolution": 4,
+"master_sha": null,
+"because_sha": null
+},
+{
+"sha": "9f9432d56c055b9704a76cad44da88d5e12f825c",
+"description": "Revert \"spirv: Use a simpler and more correct 
implementaiton of tanh()\"",
+"nominated": true,
+"nomination_type": 2,
+"resolution": 0,
+"master_sha": null,
+"because_sha": "da1c49171d0df185545cfbbd600e287f7c6160fa"
+},
+{
+"sha": "986e92f0ea803caf014adc40e900bc774af71da3",
+"description": "Revert \"glsl: Use a simpler formula for tanh\"",
+"nominated": true,
+"nomination_type": 2,
+"resolution": 0,
+"master_sha": null,
+"because_sha": "9807f502eb7a023be619a14119388b2a43271b0e"
+},
+{
+"sha": "bc5724faf40df9aec6c8e2e52f4017db35d21330",
+"description": "pan/bi: Add bi_print_shader",
+"nominated": false,
+"nomination_type": null,
+"resolution": 4,
+"master_sha": null,
+"because_sha": null
+},
+{
+"sha": "c152d4c8352aca678386eaf75da83ae95e1bd7b5",
+"description": "pan/bi: Add bi_print_block",
+"nominated": false,
+"nomination_type": null,
+"resolution": 4,
+"master_sha": null,
+"because_sha": null
+},
+{
+"sha": "c316d1553bc27e9f64a14fcce147de96bea430e0",
+"description": "pan/bi: Add bi_print_clause",
+"nominated": false,
+"nomination_type": null,
+"resolution": 4,
+"master_sha": null,
+"because_sha": null
+},
+{
+"sha": "919cdf15b3a88cf745e3aed1a52ea45a44846b35",
+"description": "pan/bi: Add bi_print_bundle for printing bi_bundle",
+"nominated": false,
+"nomination_type": null,
+"resolution": 4,
+"master_sha": null,
+"because_sha": null
+},
+{
+"sha": "bde54cb6d319fd9516507c1040d9e5fe8e7b81f2",
+"description": "pan/bi: Add bi_instruction printing",
+"nominated": false,
+"nomination_type": null,
+"resolution": 4,
+"master_sha": null,
+"because_sha": null
+},
+{
+"sha": "aef0f00cbc976a29e5b66da4b2abbd2bcd9c0d52",
+"description": "pan/bi: Move bi_interp_mode_name to bi_print",
+"nominated": false,
+"nomination_type": null,
+"resolution": 4,
+"master_sha": null,
+"because_sha": null
+},
+{
+"sha": "5d16a8109c88c869ce17e6b680e2922bb983caa6",
+"description": "pan/bi: Add BIR manipulation routines to bir.c",
+"nominated": false,
+"nomination_type": null,
+"resolution": 4,
+"master_sha": null,
+"because_sha": null
+},
+{
+"sha": "5f7a3ba872c90afc251035f24f7fc7faf6498fe3",
+"description": "pan/bi: Move some print routines out of the disasm",
+"nominated": false,
+"nomination_type": null,
+"resolution": 4,
+"master_sha": null,
+"because_sha": null
+},
+{
+"sha": "8ec671801a8decdd5c733f2fec53726d34666a0b",
+"description": "pan/bi: Add IR iteration macros",
+"nominated": false,
+"nomination_type": null,
+"resolution": 4,
+"master_sha": null,
+"because_sha": null
+},
+{
+"sha": "0b26cb194cc433a9910247051024bd6468d9b05c",
+"description": "pan/bi: Add quirks system",
+"nominated": false,
+"nomination_type": null,
+"resolution": 4,
+"master_sha": null,
+  

Mesa (staging/20.0): Revert "spirv: Use a simpler and more correct implementaiton of tanh()"

[GitLab Mirror]

Module: Mesa
Branch: staging/20.0
Commit: de16a033a8c8ff6e4dd9325aa8fd1beabf6b34f9
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=de16a033a8c8ff6e4dd9325aa8fd1beabf6b34f9

Author: Kristian H. Kristensen 
Date:   Thu Feb 27 11:38:53 2020 -0800

Revert "spirv: Use a simpler and more correct implementaiton of tanh()"

This reverts commit da1c49171d0df185545cfbbd600e287f7c6160fa.

The reduced formula has precision problems on fp16 around 0.  Bring
back the old formula, but make sure to keep the clamping.

Tested-by: Marge Bot 

Part-of: 
(cherry picked from commit 9f9432d56c055b9704a76cad44da88d5e12f825c)

---

 .pick_status.json|  2 +-
 src/compiler/spirv/vtn_glsl450.c | 27 +--
 2 files changed, 14 insertions(+), 15 deletions(-)

diff --git a/.pick_status.json b/.pick_status.json
index 90b880eb570..de39e28fb5b 100644
--- a/.pick_status.json
+++ b/.pick_status.json
@@ -31,7 +31,7 @@
 "description": "Revert \"spirv: Use a simpler and more correct 
implementaiton of tanh()\"",
 "nominated": true,
 "nomination_type": 2,
-"resolution": 0,
+"resolution": 1,
 "master_sha": null,
 "because_sha": "da1c49171d0df185545cfbbd600e287f7c6160fa"
 },
diff --git a/src/compiler/spirv/vtn_glsl450.c b/src/compiler/spirv/vtn_glsl450.c
index 2d66512bc42..5ae75ff4a15 100644
--- a/src/compiler/spirv/vtn_glsl450.c
+++ b/src/compiler/spirv/vtn_glsl450.c
@@ -458,25 +458,24 @@ handle_glsl450_alu(struct vtn_builder *b, enum GLSLstd450 
entrypoint,
   return;
 
case GLSLstd450Tanh: {
-  /* tanh(x) := (0.5 * (e^x - e^(-x))) / (0.5 * (e^x + e^(-x)))
+  /* tanh(x) := (e^x - e^(-x)) / (e^x + e^(-x))
*
-   * With a little algebra this reduces to (e^2x - 1) / (e^2x + 1)
+   * We clamp x to [-10, +10] to avoid precision problems.  When x > 10,
+   * e^x dominates the sum, e^(-x) is lost and tanh(x) is 1.0 for 32 bit
+   * floating point.
*
-   * We clamp x to (-inf, +10] to avoid precision problems.  When x > 10,
-   * e^2x is so much larger than 1.0 that 1.0 gets flushed to zero in the
-   * computation e^2x +/- 1 so it can be ignored.
-   *
-   * For 16-bit precision we clamp x to (-inf, +4.2] since the maximum
-   * representable number is only 65,504 and e^(2*6) exceeds that. Also,
-   * if x > 4.2, tanh(x) will return 1.0 in fp16.
+   * For 16-bit precision this we clamp x to [-4.2, +4.2].
*/
   const uint32_t bit_size = src[0]->bit_size;
   const double clamped_x = bit_size > 16 ? 10.0 : 4.2;
-  nir_ssa_def *x = nir_fmin(nb, src[0],
-nir_imm_floatN_t(nb, clamped_x, bit_size));
-  nir_ssa_def *exp2x = build_exp(nb, nir_fmul_imm(nb, x, 2.0));
-  val->ssa->def = nir_fdiv(nb, nir_fadd_imm(nb, exp2x, -1.0),
-   nir_fadd_imm(nb, exp2x, 1.0));
+  nir_ssa_def *x = nir_fclamp(nb, src[0],
+  nir_imm_floatN_t(nb, -clamped_x, bit_size),
+  nir_imm_floatN_t(nb, clamped_x, bit_size));
+  val->ssa->def =
+ nir_fdiv(nb, nir_fsub(nb, build_exp(nb, x),
+   build_exp(nb, nir_fneg(nb, x))),
+  nir_fadd(nb, build_exp(nb, x),
+   build_exp(nb, nir_fneg(nb, x;
   return;
}
 

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Mesa (master): gitlab-ci: enable building the test image for VK unconditionally

[GitLab Mirror]

Module: Mesa
Branch: master
Commit: af1cd4585824e3efc941483d74915903439f27ba
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=af1cd4585824e3efc941483d74915903439f27ba

Author: Samuel Pitoiset 
Date:   Wed Feb 26 08:49:27 2020 +0100

gitlab-ci: enable building the test image for VK unconditionally

It was diabled because RADV is the only driver that tests Vulkan
and running CTS on my personal machine and without recovery is
not safe enough for CI (too long and too unstable).

Now that we are going to test Fossilize with RADV, it's needed to
build the test image for VK unconditionally. As RADV now supports
creating NULL devices, the fossilize jobs can run everywhere.

Signed-off-by: Samuel Pitoiset 
Reviewed-by: Michel Dänzer 
Part-of: 

---

 .gitlab-ci.yml | 17 ++---
 1 file changed, 2 insertions(+), 15 deletions(-)

diff --git a/.gitlab-ci.yml b/.gitlab-ci.yml
index 62cdb24a412..fe282c62970 100644
--- a/.gitlab-ci.yml
+++ b/.gitlab-ci.yml
@@ -138,18 +138,6 @@ x86_test-vk:
   extends: x86_build
   variables:
 DEBIAN_TAG: _test-vk "2020-03-05"
-  # Can only be triggered manually on personal branches because RADV is the 
only
-  # driver that does Vulkan testing at the moment.
-  rules:
-# Never build the test image for VK by default in the main project.
-- if: '$CI_PROJECT_PATH == "mesa/mesa"'
-  when: never
-# Never build the test image for VK by default for merge requests.
-- if: '$CI_MERGE_REQUEST_SOURCE_BRANCH_NAME == $CI_COMMIT_REF_NAME'
-  when: never
-# Otherwise, allow building it manually for personal branches.
-- when: manual
-
 
 # Debian 9 based x86 build image (old LLVM)
 x86_build_old:
@@ -727,9 +715,8 @@ arm64_a306_gles2:
 # Never test RADV by default for merge requests.
 - if: '$CI_MERGE_REQUEST_SOURCE_BRANCH_NAME == $CI_COMMIT_REF_NAME'
   when: never
-# Otherwise, allow testing RADV if the test image for VK has been manually
-# started.
-- when: on_success
+# Otherwise, allow testing RADV manually for personal branches.
+- when: manual
 
 radv_polaris10_vkcts:
   extends:

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Mesa (master): gitlab-ci: add a job that runs Fossilize on RADV/Polaris10

[GitLab Mirror]

Module: Mesa
Branch: master
Commit: 42a3d821cbd513db9abf31c4b61172dd7717f53c
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=42a3d821cbd513db9abf31c4b61172dd7717f53c

Author: Samuel Pitoiset 
Date:   Wed Feb  5 17:04:20 2020 +0100

gitlab-ci: add a job that runs Fossilize on RADV/Polaris10

RADV_FORCE_FAMILY forces creating a null device that allows RADV
to be instanced without AMDGPU.

The Fossilize database only contains pipelines from the Sascha
Vulkan triangle demos at the moment. I will add more once this
is merged.

Signed-off-by: Samuel Pitoiset 
Reviewed-by: Michel Dänzer 
Tested-by: Marge Bot 

Part-of: 

---

 .gitlab-ci.yml  | 17 +++--
 .gitlab-ci/fossils.yml  |  6 ++
 .gitlab-ci/prepare-artifacts.sh |  1 +
 3 files changed, 22 insertions(+), 2 deletions(-)

diff --git a/.gitlab-ci.yml b/.gitlab-ci.yml
index fe282c62970..f91830fe3ba 100644
--- a/.gitlab-ci.yml
+++ b/.gitlab-ci.yml
@@ -706,6 +706,9 @@ arm64_a306_gles2:
   variables:
 VK_DRIVER: radeon
 RADV_DEBUG: checkir
+
+.test-radv-unsafe:
+  extends: .test-radv
   # Can only be triggered manually on personal branches because RADV is the 
only
   # driver that does Vulkan testing at the moment.
   rules:
@@ -718,16 +721,26 @@ arm64_a306_gles2:
 # Otherwise, allow testing RADV manually for personal branches.
 - when: manual
 
+.test-radv-fossilize:
+  extends:
+- .fossilize-test
+- .test-radv
+
 radv_polaris10_vkcts:
   extends:
 - .deqp-test-vk
-- .test-radv
+- .test-radv-unsafe
   variables:
 DEQP_PARALLEL: 4
 DEQP_SKIPS: deqp-radv-polaris10-skips.txt
   tags:
 - polaris10
 
+radv-polaris10-fossils:
+  extends: .test-radv-fossilize
+  variables:
+RADV_FORCE_FAMILY: "polaris10" # Force creating a null device
+
 # Traces CI
 .traces-test:
   stage: misc-tests
@@ -760,7 +773,7 @@ llvmpipe-traces:
 radv-polaris10-traces:
   extends:
 - .traces-test-vk
-- .test-radv
+- .test-radv-unsafe
   variables:
 DEVICE_NAME: "vk-amd-polaris10"
   tags:
diff --git a/.gitlab-ci/fossils.yml b/.gitlab-ci/fossils.yml
new file mode 100644
index 000..5b2b2412dac
--- /dev/null
+++ b/.gitlab-ci/fossils.yml
@@ -0,0 +1,6 @@
+fossils-db:
+  repo: "https://gitlab.freedesktop.org/hakzsam/fossils-db;
+  commit: "49a8278432f7afcb54dd059f667a70561592ecbf"
+
+fossils:
+  - path: sascha-willems/triangle.f93c6e96adcd7946.1.foz
diff --git a/.gitlab-ci/prepare-artifacts.sh b/.gitlab-ci/prepare-artifacts.sh
index 8a4b2510714..3a8ec2083dd 100755
--- a/.gitlab-ci/prepare-artifacts.sh
+++ b/.gitlab-ci/prepare-artifacts.sh
@@ -30,6 +30,7 @@ cp -Rp .gitlab-ci/traces.yml artifacts/
 cp -Rp .gitlab-ci/tracie artifacts/
 cp -Rp .gitlab-ci/tracie-runner-gl.sh artifacts/
 cp -Rp .gitlab-ci/tracie-runner-vk.sh artifacts/
+cp -Rp .gitlab-ci/fossils.yml artifacts/
 cp -Rp .gitlab-ci/fossils artifacts/
 cp -Rp .gitlab-ci/fossilize-runner.sh artifacts/
 

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Mesa (master): gitlab-ci: add Fossilize support to detect compiler regressions

[GitLab Mirror]

Module: Mesa
Branch: master
Commit: 1cdb6edbe6dcfa3b0d254dc0f1f31e35be3b10ff
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=1cdb6edbe6dcfa3b0d254dc0f1f31e35be3b10ff

Author: Samuel Pitoiset 
Date:   Wed Feb 26 09:33:14 2020 +0100

gitlab-ci: add Fossilize support to detect compiler regressions

Fossilize is equivalent to vkpipeline-db but it's definitely more
robust. This is based on the CI traces system.

Signed-off-by: Samuel Pitoiset 
Reviewed-by: Alexandros Frantzis 
Part-of: 

---

 .gitlab-ci.yml   |  5 +++
 .gitlab-ci/fossilize-runner.sh   | 16 +++
 .gitlab-ci/fossils/fossils.sh| 71 
 .gitlab-ci/fossils/query_fossils_yaml.py | 69 +++
 .gitlab-ci/prepare-artifacts.sh  |  2 +
 5 files changed, 163 insertions(+)

diff --git a/.gitlab-ci.yml b/.gitlab-ci.yml
index ce35c57df3e..62cdb24a412 100644
--- a/.gitlab-ci.yml
+++ b/.gitlab-ci.yml
@@ -639,6 +639,11 @@ piglit-quick_shader:
   variables:
 DEQP_VER: vk
 
+.fossilize-test:
+  extends: .test-vk
+  script:
+- ./artifacts/fossilize-runner.sh
+
 llvmpipe-gles2:
   variables:
 DEQP_VER: gles2
diff --git a/.gitlab-ci/fossilize-runner.sh b/.gitlab-ci/fossilize-runner.sh
new file mode 100755
index 000..618c2aa5b72
--- /dev/null
+++ b/.gitlab-ci/fossilize-runner.sh
@@ -0,0 +1,16 @@
+#!/bin/sh
+
+set -ex
+
+if [ -z "$VK_DRIVER" ]; then
+   echo 'VK_DRIVER must be to something like "radeon" or "intel" for the test 
run'
+   exit 1
+fi
+
+ARTIFACTS=`pwd`/artifacts
+
+# Set up the driver environment.
+export LD_LIBRARY_PATH=`pwd`/install/lib/
+export 
VK_ICD_FILENAMES=`pwd`/install/share/vulkan/icd.d/"$VK_DRIVER"_icd.x86_64.json
+
+"$ARTIFACTS/fossils/fossils.sh" "$ARTIFACTS/fossils.yml"
diff --git a/.gitlab-ci/fossils/fossils.sh b/.gitlab-ci/fossils/fossils.sh
new file mode 100755
index 000..fa49efca2ce
--- /dev/null
+++ b/.gitlab-ci/fossils/fossils.sh
@@ -0,0 +1,71 @@
+#!/usr/bin/env bash
+
+FOSSILS_SCRIPT_DIR="$(dirname "$(readlink -f "$0")")"
+FOSSILS_YAML="$(readlink -f "$1")"
+
+clone_fossils_db()
+{
+local repo="$1"
+local commit="$2"
+rm -rf fossils-db
+git clone --no-checkout "$repo" fossils-db
+(cd fossils-db; git reset "$commit" || git reset "origin/$commit")
+}
+
+query_fossils_yaml()
+{
+python3 "$FOSSILS_SCRIPT_DIR/query_fossils_yaml.py" \
+--file "$FOSSILS_YAML" "$@"
+}
+
+create_clean_git()
+{
+rm -rf .clean_git
+cp -R .git .clean_git
+}
+
+restore_clean_git()
+{
+rm -rf .git
+cp -R .clean_git .git
+}
+
+fetch_fossil()
+{
+local fossil="${1//,/?}"
+echo -n "[fetch_fossil] Fetching $1... "
+local output=$(git lfs pull -I "$fossil" 2>&1)
+local ret=0
+if [[ $? -ne 0 || ! -f "$1" ]]; then
+echo "ERROR"
+echo "$output"
+ret=1
+else
+echo "OK"
+fi
+restore_clean_git
+return $ret
+}
+
+if [[ -n "$(query_fossils_yaml fossils_db_repo)" ]]; then
+clone_fossils_db "$(query_fossils_yaml fossils_db_repo)" \
+ "$(query_fossils_yaml fossils_db_commit)"
+cd fossils-db
+else
+echo "Warning: No fossils-db entry in $FOSSILS_YAML, assuming fossils-db 
is current directory"
+fi
+
+# During git operations various git objects get created which
+# may take up significant space. Store a clean .git instance,
+# which we restore after various git operations to keep our
+# storage consumption low.
+create_clean_git
+
+for fossil in $(query_fossils_yaml fossils)
+do
+fetch_fossil "$fossil" || exit $?
+fossilize-replay $fossil || exit $?
+rm $fossil
+done
+
+exit $ret
diff --git a/.gitlab-ci/fossils/query_fossils_yaml.py 
b/.gitlab-ci/fossils/query_fossils_yaml.py
new file mode 100644
index 000..42e4b8e1c08
--- /dev/null
+++ b/.gitlab-ci/fossils/query_fossils_yaml.py
@@ -0,0 +1,69 @@
+#!/usr/bin/python3
+
+# Copyright (c) 2019 Collabora Ltd
+# Copyright (c) 2020 Valve Corporation
+#
+# Permission is hereby granted, free of charge, to any person obtaining a
+# copy of this software and associated documentation files (the "Software"),
+# to deal in the Software without restriction, including without limitation
+# the rights to use, copy, modify, merge, publish, distribute, sublicense,
+# and/or sell copies of the Software, and to permit persons to whom the
+# Software is furnished to do so, subject to the following conditions:
+#
+# The above copyright notice and this permission notice shall be included
+# in all copies or substantial portions of the Software.
+#
+# THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
+# OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+# FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
+# THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
+# OTHER LIABILITY, WHETHER IN AN 

Mesa (master): gitlab-ci: build Fossilize in the test image for VK

[GitLab Mirror]

Module: Mesa
Branch: master
Commit: 93fcc9ad57a7e0e64ae45988e62b24563ff9fdc3
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=93fcc9ad57a7e0e64ae45988e62b24563ff9fdc3

Author: Samuel Pitoiset 
Date:   Wed Feb 26 09:32:41 2020 +0100

gitlab-ci: build Fossilize in the test image for VK

Signed-off-by: Samuel Pitoiset 
Reviewed-by: Michel Dänzer 
Part-of: 

---

 .gitlab-ci.yml  |  2 +-
 .gitlab-ci/build-fossilize.sh   | 14 ++
 .gitlab-ci/container/x86_test-vk.sh |  4 
 3 files changed, 19 insertions(+), 1 deletion(-)

diff --git a/.gitlab-ci.yml b/.gitlab-ci.yml
index 3beed8d4982..ce35c57df3e 100644
--- a/.gitlab-ci.yml
+++ b/.gitlab-ci.yml
@@ -137,7 +137,7 @@ x86_test-gl:
 x86_test-vk:
   extends: x86_build
   variables:
-DEBIAN_TAG: _test-vk "2020-03-04"
+DEBIAN_TAG: _test-vk "2020-03-05"
   # Can only be triggered manually on personal branches because RADV is the 
only
   # driver that does Vulkan testing at the moment.
   rules:
diff --git a/.gitlab-ci/build-fossilize.sh b/.gitlab-ci/build-fossilize.sh
new file mode 100644
index 000..35af32baa5b
--- /dev/null
+++ b/.gitlab-ci/build-fossilize.sh
@@ -0,0 +1,14 @@
+#!/bin/bash
+
+set -ex
+
+git clone https://github.com/ValveSoftware/Fossilize.git
+cd Fossilize
+git checkout 6b5b570008c9ab5269e341f04c811fe49a1bb72c
+git submodule update --init
+mkdir build
+cd build
+cmake .. -DCMAKE_BUILD_TYPE=Release -G Ninja
+ninja -C . -j4 install
+cd ../..
+rm -rf Fossilize
diff --git a/.gitlab-ci/container/x86_test-vk.sh 
b/.gitlab-ci/container/x86_test-vk.sh
index a2ae583a65e..416adece99e 100644
--- a/.gitlab-ci/container/x86_test-vk.sh
+++ b/.gitlab-ci/container/x86_test-vk.sh
@@ -72,6 +72,10 @@ apt-get install -y --no-remove \
 
 . .gitlab-ci/build-cts-runner.sh
 
+### Build Fossilize
+
+. .gitlab-ci/build-fossilize.sh
+
 ### Build dEQP VK
 
 . .gitlab-ci/build-deqp-vk.sh

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Mesa (master): aco: only reserve sgprs for vcc if it's used

[GitLab Mirror]

Module: Mesa
Branch: master
Commit: b088a4b113f530ef8c1ad07df33b8fca8586c5d1
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=b088a4b113f530ef8c1ad07df33b8fca8586c5d1

Author: Rhys Perry 
Date:   Fri Feb 21 12:23:28 2020 +

aco: only reserve sgprs for vcc if it's used

pipeline-db (Vega):

Totals:
SGPRS: 5186302 -> 5075616 (-2.13 %)
VGPRS: 3704580 -> 3704580 (0.00 %)
Spilled SGPRs: 144859 -> 144859 (0.00 %)
Spilled VGPRs: 0 -> 0 (0.00 %)
Scratch size: 4124 -> 4124 (0.00 %) dwords per thread
Code Size: 247315944 -> 247315944 (0.00 %) bytes
LDS: 1311 -> 1311 (0.00 %) blocks
Max Waves: 674560 -> 674562 (0.00 %)

Totals from affected shaders:
SGPRS: 536992 -> 426306 (-20.61 %)
VGPRS: 356404 -> 356404 (0.00 %)
Spilled SGPRs: 0 -> 0 (0.00 %)
Spilled VGPRs: 0 -> 0 (0.00 %)
Scratch size: 0 -> 0 (0.00 %) dwords per thread
Code Size: 8498748 -> 8498748 (0.00 %) bytes
LDS: 8 -> 8 (0.00 %) blocks
Max Waves: 113832 -> 113834 (0.00 %)

There are some small code size changes in a few RotTR shaders and a small
increase in max_waves in two Detroit: Become Human shaders.

Signed-off-by: Rhys Perry 
Reviewed-by: Daniel Schürmann 
Tested-by: Marge Bot 

Part-of: 

---

 src/amd/compiler/aco_instruction_selection_setup.cpp |  3 ---
 src/amd/compiler/aco_live_var_analysis.cpp   | 16 
 src/amd/compiler/aco_validate.cpp|  4 
 3 files changed, 16 insertions(+), 7 deletions(-)

diff --git a/src/amd/compiler/aco_instruction_selection_setup.cpp 
b/src/amd/compiler/aco_instruction_selection_setup.cpp
index 12c2910a8a0..b3c7ff059ad 100644
--- a/src/amd/compiler/aco_instruction_selection_setup.cpp
+++ b/src/amd/compiler/aco_instruction_selection_setup.cpp
@@ -1007,9 +1007,6 @@ setup_isel_context(Program* program,
   program->sgpr_limit = 104;
}
 
-   /* TODO: we don't have to allocate VCC if we don't need it */
-   program->needs_vcc = true;
-
calc_min_waves(program);
program->vgpr_limit = get_addr_vgpr_from_waves(program, program->min_waves);
program->sgpr_limit = get_addr_sgpr_from_waves(program, program->min_waves);
diff --git a/src/amd/compiler/aco_live_var_analysis.cpp 
b/src/amd/compiler/aco_live_var_analysis.cpp
index 1f02e67bc1a..eb965e4e05c 100644
--- a/src/amd/compiler/aco_live_var_analysis.cpp
+++ b/src/amd/compiler/aco_live_var_analysis.cpp
@@ -87,6 +87,8 @@ void process_live_temps_per_block(Program *program, live& 
lives, Block* block,
  if (!definition.isTemp()) {
 continue;
  }
+ if ((definition.isFixed() || definition.hasHint()) && 
definition.physReg() == vcc)
+program->needs_vcc = true;
 
  const Temp temp = definition.getTemp();
  size_t n = 0;
@@ -120,9 +122,10 @@ void process_live_temps_per_block(Program *program, live& 
lives, Block* block,
  for (unsigned i = 0; i < insn->operands.size(); ++i)
  {
 Operand& operand = insn->operands[i];
-if (!operand.isTemp()) {
+if (!operand.isTemp())
continue;
-}
+if (operand.isFixed() && operand.physReg() == vcc)
+   program->needs_vcc = true;
 const Temp temp = operand.getTemp();
 const bool inserted = temp.is_linear()
 ? live_sgprs.insert(temp).second
@@ -161,6 +164,8 @@ void process_live_temps_per_block(Program *program, live& 
lives, Block* block,
   assert(is_phi(insn));
   assert(insn->definitions.size() == 1 && insn->definitions[0].isTemp());
   Definition& definition = insn->definitions[0];
+  if ((definition.isFixed() || definition.hasHint()) && 
definition.physReg() == vcc)
+ program->needs_vcc = true;
   const Temp temp = definition.getTemp();
   size_t n = 0;
 
@@ -205,9 +210,10 @@ void process_live_temps_per_block(Program *program, live& 
lives, Block* block,
: block->linear_preds;
   for (unsigned i = 0; i < preds.size(); ++i) {
  Operand  = insn->operands[i];
- if (!operand.isTemp()) {
+ if (!operand.isTemp())
 continue;
- }
+ if (operand.isFixed() && operand.physReg() == vcc)
+program->needs_vcc = true;
  /* check if we changed an already processed block */
  const bool inserted = 
live_temps[preds[i]].insert(operand.getTemp()).second;
  if (inserted) {
@@ -364,6 +370,8 @@ live live_var_analysis(Program* program,
std::vector phi_sgpr_ops(program->blocks.size());
RegisterDemand new_demand;
 
+   program->needs_vcc = false;
+
/* this implementation assumes that the block idx corresponds to the 
block's position in program->blocks vector */
for (Block& block : program->blocks)
   worklist.insert(block.index);
diff --git a/src/amd/compiler/aco_validate.cpp 

Mesa (master): aco: add new NOP insertion pass for GFX6-9

[GitLab Mirror]

Module: Mesa
Branch: master
Commit: 7f1b537304d4837c907a9299dab3a7acf2518b0b
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=7f1b537304d4837c907a9299dab3a7acf2518b0b

Author: Rhys Perry 
Date:   Tue Feb 25 11:27:33 2020 +

aco: add new NOP insertion pass for GFX6-9

This new pass is more similar to the GFX10 pass and should be able to
handle control flow better.

No pipeline-db changes.

Signed-off-by: Rhys Perry 
Reviewed-by: Daniel Schürmann 
Part-of: 

---

 src/amd/compiler/aco_insert_NOPs.cpp | 753 ---
 src/amd/compiler/aco_ir.h|   3 +
 2 files changed, 438 insertions(+), 318 deletions(-)

diff --git a/src/amd/compiler/aco_insert_NOPs.cpp 
b/src/amd/compiler/aco_insert_NOPs.cpp
index 9ff3d580736..7c6e100faf1 100644
--- a/src/amd/compiler/aco_insert_NOPs.cpp
+++ b/src/amd/compiler/aco_insert_NOPs.cpp
@@ -26,22 +26,120 @@
 
 #include "aco_ir.h"
 #include 
+#include 
+
+#include 
 
 namespace aco {
 namespace {
 
-struct NOP_ctx_gfx8_9 {
-   enum chip_class chip_class;
-   unsigned vcc_physical;
+struct NOP_ctx_gfx6 {
+   void join(const NOP_ctx_gfx6 ) {
+  set_vskip_mode_then_vector = MAX2(set_vskip_mode_then_vector, 
other.set_vskip_mode_then_vector);
+  valu_wr_vcc_then_vccz = MAX2(valu_wr_vcc_then_vccz, 
other.valu_wr_vcc_then_vccz);
+  valu_wr_exec_then_execz = MAX2(valu_wr_exec_then_execz, 
other.valu_wr_exec_then_execz);
+  valu_wr_vcc_then_div_fmas = MAX2(valu_wr_vcc_then_div_fmas, 
other.valu_wr_vcc_then_div_fmas);
+  salu_wr_m0_then_gds_msg_ttrace = MAX2(salu_wr_m0_then_gds_msg_ttrace, 
other.salu_wr_m0_then_gds_msg_ttrace);
+  valu_wr_exec_then_dpp = MAX2(valu_wr_exec_then_dpp, 
other.valu_wr_exec_then_dpp);
+  salu_wr_m0_then_lds = MAX2(salu_wr_m0_then_lds, 
other.salu_wr_m0_then_lds);
+  salu_wr_m0_then_moverel = MAX2(salu_wr_m0_then_moverel, 
other.salu_wr_m0_then_moverel);
+  setreg_then_getsetreg = MAX2(setreg_then_getsetreg, 
other.setreg_then_getsetreg);
+  vmem_store_then_wr_data |= other.vmem_store_then_wr_data;
+  smem_clause |= other.smem_clause;
+  smem_write |= other.smem_write;
+  for (unsigned i = 0; i < BITSET_WORDS(128); i++) {
+ smem_clause_read_write[i] |= other.smem_clause_read_write[i];
+ smem_clause_write[i] |= other.smem_clause_write[i];
+  }
+   }
+
+   bool operator==(const NOP_ctx_gfx6 )
+   {
+  return
+ set_vskip_mode_then_vector == other.set_vskip_mode_then_vector &&
+ valu_wr_vcc_then_vccz == other.valu_wr_vcc_then_vccz &&
+ valu_wr_exec_then_execz == other.valu_wr_exec_then_execz &&
+ valu_wr_vcc_then_div_fmas == other.valu_wr_vcc_then_div_fmas &&
+ vmem_store_then_wr_data == other.vmem_store_then_wr_data &&
+ salu_wr_m0_then_gds_msg_ttrace == 
other.salu_wr_m0_then_gds_msg_ttrace &&
+ valu_wr_exec_then_dpp == other.valu_wr_exec_then_dpp &&
+ salu_wr_m0_then_lds == other.salu_wr_m0_then_lds &&
+ salu_wr_m0_then_moverel == other.salu_wr_m0_then_moverel &&
+ setreg_then_getsetreg == other.setreg_then_getsetreg &&
+ smem_clause == other.smem_clause &&
+ smem_write == other.smem_write &&
+ BITSET_EQUAL(smem_clause_read_write, other.smem_clause_read_write) &&
+ BITSET_EQUAL(smem_clause_write, other.smem_clause_write);
+   }
+
+   void add_wait_states(unsigned amount)
+   {
+  if ((set_vskip_mode_then_vector -= amount) < 0)
+ set_vskip_mode_then_vector = 0;
+
+  if ((valu_wr_vcc_then_vccz -= amount) < 0)
+ valu_wr_vcc_then_vccz = 0;
+
+  if ((valu_wr_exec_then_execz -= amount) < 0)
+ valu_wr_exec_then_execz = 0;
+
+  if ((valu_wr_vcc_then_div_fmas -= amount) < 0)
+ valu_wr_vcc_then_div_fmas = 0;
+
+  if ((salu_wr_m0_then_gds_msg_ttrace -= amount) < 0)
+ salu_wr_m0_then_gds_msg_ttrace = 0;
+
+  if ((valu_wr_exec_then_dpp -= amount) < 0)
+ valu_wr_exec_then_dpp = 0;
 
-   /* just initialize these with something less than max NOPs */
-   int VALU_wrexec = -10;
-   int VALU_wrvcc = -10;
-   int VALU_wrsgpr = -10;
+  if ((salu_wr_m0_then_lds -= amount) < 0)
+ salu_wr_m0_then_lds = 0;
 
-   NOP_ctx_gfx8_9(Program* program) : chip_class(program->chip_class) {
-  vcc_physical = program->config->num_sgprs - 2;
+  if ((salu_wr_m0_then_moverel -= amount) < 0)
+ salu_wr_m0_then_moverel = 0;
+
+  if ((setreg_then_getsetreg -= amount) < 0)
+ setreg_then_getsetreg = 0;
+
+  vmem_store_then_wr_data.reset();
}
+
+   /* setting MODE.vskip and then any vector op requires 2 wait states */
+   int8_t set_vskip_mode_then_vector = 0;
+
+   /* VALU writing VCC/EXEC and then a VALU reading VCCZ/EXECZ requires 5 wait 
states */
+   int8_t valu_wr_vcc_then_vccz = 0;
+   int8_t valu_wr_exec_then_execz = 0;
+
+   /* VALU writing VCC followed by v_div_fmas require 4 wait 

Mesa (master): aco: consider non-hazard writes in handle_raw_hazard_internal

[GitLab Mirror]

Module: Mesa
Branch: master
Commit: 47b7f104a0aa3692e9fb202741406a0c6d9ac8ad
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=47b7f104a0aa3692e9fb202741406a0c6d9ac8ad

Author: Rhys Perry 
Date:   Thu Feb 27 19:47:01 2020 +

aco: consider non-hazard writes in handle_raw_hazard_internal

I think this helps GFX6 in particular because code like this is common:
s_add_i32   s4, 0x60, s3
s_mov_b32   s5, 0
s_load_dwordx4  s[4:7], s[4:5], 0x0
s_buffer_load_dword s4, s[4:7], 0xcc

pipeline-db (Tahiti):
Totals from affected shaders:
SGPRS: 1923878 -> 1923878 (0.00 %)
VGPRS: 1528964 -> 1528964 (0.00 %)
Spilled SGPRs: 476 -> 476 (0.00 %)
Spilled VGPRs: 0 -> 0 (0.00 %)
Scratch size: 0 -> 0 (0.00 %) dwords per thread
Code Size: 88723604 -> 88528880 (-0.22 %) bytes
LDS: 241 -> 241 (0.00 %) blocks
Max Waves: 145402 -> 145402 (0.00 %)

pipeline-db (Polaris):
Totals from affected shaders:
SGPRS: 428128 -> 428128 (0.00 %)
VGPRS: 353092 -> 353092 (0.00 %)
Spilled SGPRs: 119251 -> 119251 (0.00 %)
Spilled VGPRs: 0 -> 0 (0.00 %)
Scratch size: 0 -> 0 (0.00 %) dwords per thread
Code Size: 57580468 -> 57563964 (-0.03 %) bytes
LDS: 0 -> 0 (0.00 %) blocks
Max Waves: 11631 -> 11631 (0.00 %)

piepline-db (Vega):
Totals from affected shaders:
SGPRS: 425016 -> 425016 (0.00 %)
VGPRS: 349588 -> 349588 (0.00 %)
Spilled SGPRs: 117835 -> 117835 (0.00 %)
Spilled VGPRs: 0 -> 0 (0.00 %)
Scratch size: 0 -> 0 (0.00 %) dwords per thread
Code Size: 54890792 -> 54874432 (-0.03 %) bytes
LDS: 0 -> 0 (0.00 %) blocks
Max Waves: 54 -> 54 (0.00 %)

Signed-off-by: Rhys Perry 
Reviewed-by: Daniel Schürmann 
Part-of: 

---

 src/amd/compiler/aco_insert_NOPs.cpp | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/src/amd/compiler/aco_insert_NOPs.cpp 
b/src/amd/compiler/aco_insert_NOPs.cpp
index 9c5b1c8b7c6..4302711ba81 100644
--- a/src/amd/compiler/aco_insert_NOPs.cpp
+++ b/src/amd/compiler/aco_insert_NOPs.cpp
@@ -218,9 +218,10 @@ int handle_raw_hazard_internal(Program *program, Block 
*block,
   if (is_hazard)
  return nops_needed;
 
+  mask &= ~writemask;
   nops_needed -= get_wait_states(pred);
 
-  if (nops_needed <= 0)
+  if (nops_needed <= 0 || mask == 0)
  return 0;
}
 

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Mesa (master): aco: improve control flow handling in GFX6-9 NOP pass

[GitLab Mirror]

Module: Mesa
Branch: master
Commit: c6e0c062daa55269661b190deaec40e9749198bc
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=c6e0c062daa55269661b190deaec40e9749198bc

Author: Rhys Perry 
Date:   Thu Feb 27 19:56:22 2020 +

aco: improve control flow handling in GFX6-9 NOP pass

Fixes Detroit: Become Human hang. Also affects World of Warships.

pipeline-db (Tahiti):
Totals from affected shaders:
SGPRS: 0 -> 0 (0.00 %)
VGPRS: 0 -> 0 (0.00 %)
Spilled SGPRs: 0 -> 0 (0.00 %)
Spilled VGPRs: 0 -> 0 (0.00 %)
Scratch size: 0 -> 0 (0.00 %) dwords per thread
Code Size: 0 -> 0 (0.00 %) bytes
LDS: 0 -> 0 (0.00 %) blocks
Max Waves: 0 -> 0 (0.00 %)

pipeline-db (Polaris):
Totals from affected shaders:
SGPRS: 17168 -> 17168 (0.00 %)
VGPRS: 11296 -> 11296 (0.00 %)
Spilled SGPRs: 1870 -> 1870 (0.00 %)
Spilled VGPRs: 0 -> 0 (0.00 %)
Scratch size: 0 -> 0 (0.00 %) dwords per thread
Code Size: 1472628 -> 1473292 (0.05 %) bytes
LDS: 0 -> 0 (0.00 %) blocks
Max Waves: 628 -> 628 (0.00 %)

pipeline-db (Vega):
Totals from affected shaders:
SGPRS: 17168 -> 17168 (0.00 %)
VGPRS: 11296 -> 11296 (0.00 %)
Spilled SGPRs: 1870 -> 1870 (0.00 %)
Spilled VGPRs: 0 -> 0 (0.00 %)
Scratch size: 0 -> 0 (0.00 %) dwords per thread
Code Size: 1409716 -> 1410380 (0.05 %) bytes
LDS: 0 -> 0 (0.00 %) blocks
Max Waves: 0 -> 0 (0.00 %)

Max Waves is lower than it should be because of a null winsys bug.

Signed-off-by: Rhys Perry 
Reviewed-by: Daniel Schürmann 
Tested-by: Marge Bot 

Part-of: 

---

 src/amd/compiler/aco_insert_NOPs.cpp | 21 +
 1 file changed, 13 insertions(+), 8 deletions(-)

diff --git a/src/amd/compiler/aco_insert_NOPs.cpp 
b/src/amd/compiler/aco_insert_NOPs.cpp
index 4302711ba81..75dbe852174 100644
--- a/src/amd/compiler/aco_insert_NOPs.cpp
+++ b/src/amd/compiler/aco_insert_NOPs.cpp
@@ -225,7 +225,16 @@ int handle_raw_hazard_internal(Program *program, Block 
*block,
  return 0;
}
 
-   return 0;
+   int res = 0;
+
+   /* Loops require branch instructions, which count towards the wait
+* states. So even with loops this should finish unless nops_needed is some
+* huge value. */
+   for (unsigned lin_pred : block->linear_preds) {
+  res = std::max(res, handle_raw_hazard_internal(
+ program, >blocks[lin_pred], nops_needed, reg, mask));
+   }
+   return res;
 }
 
 template 
@@ -763,14 +772,10 @@ void mitigate_hazards(Program *program)
 
 void insert_NOPs(Program* program)
 {
-   if (program->chip_class >= GFX10) {
+   if (program->chip_class >= GFX10)
   mitigate_hazards(program);
-   } else {
-  for (Block& block : program->blocks) {
- NOP_ctx_gfx6 ctx;
- handle_block(program, ctx, 
block);
-  }
-   }
+   else
+  mitigate_hazards(program);
 }
 
 }

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Mesa (master): aco: improve get_wait_states()

[GitLab Mirror]

Module: Mesa
Branch: master
Commit: 38743577f8b47c68ba01a9b9a982db52ef0f605d
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=38743577f8b47c68ba01a9b9a982db52ef0f605d

Author: Rhys Perry 
Date:   Fri Feb 28 15:56:43 2020 +

aco: improve get_wait_states()

pipeline-db (Tahiti):
Totals from affected shaders:
SGPRS: 21208 -> 21208 (0.00 %)
VGPRS: 22388 -> 22388 (0.00 %)
Spilled SGPRs: 0 -> 0 (0.00 %)
Spilled VGPRs: 0 -> 0 (0.00 %)
Scratch size: 0 -> 0 (0.00 %) dwords per thread
Code Size: 3278596 -> 3277004 (-0.05 %) bytes
LDS: 19 -> 19 (0.00 %) blocks
Max Waves: 238 -> 238 (0.00 %)

pipeline-db (Polaris):
Totals from affected shaders:
SGPRS: 64 -> 64 (0.00 %)
VGPRS: 96 -> 96 (0.00 %)
Spilled SGPRs: 0 -> 0 (0.00 %)
Spilled VGPRs: 0 -> 0 (0.00 %)
Scratch size: 0 -> 0 (0.00 %) dwords per thread
Code Size: 5200 -> 5192 (-0.15 %) bytes
LDS: 0 -> 0 (0.00 %) blocks
Max Waves: 10 -> 10 (0.00 %)

pipeline-db (Vega):
Totals from affected shaders:
SGPRS: 0 -> 0 (0.00 %)
VGPRS: 0 -> 0 (0.00 %)
Spilled SGPRs: 0 -> 0 (0.00 %)
Spilled VGPRs: 0 -> 0 (0.00 %)
Scratch size: 0 -> 0 (0.00 %) dwords per thread
Code Size: 0 -> 0 (0.00 %) bytes
LDS: 0 -> 0 (0.00 %) blocks
Max Waves: 0 -> 0 (0.00 %)

Signed-off-by: Rhys Perry 
Reviewed-by: Daniel Schürmann 
Part-of: 

---

 src/amd/compiler/aco_insert_NOPs.cpp | 7 ++-
 1 file changed, 6 insertions(+), 1 deletion(-)

diff --git a/src/amd/compiler/aco_insert_NOPs.cpp 
b/src/amd/compiler/aco_insert_NOPs.cpp
index 7c6e100faf1..9c5b1c8b7c6 100644
--- a/src/amd/compiler/aco_insert_NOPs.cpp
+++ b/src/amd/compiler/aco_insert_NOPs.cpp
@@ -179,7 +179,12 @@ struct NOP_ctx_gfx10 {
 
 int get_wait_states(aco_ptr& instr)
 {
-   return 1;
+   if (instr->opcode == aco_opcode::s_nop)
+  return static_cast(instr.get())->imm + 1;
+   else if (instr->opcode == aco_opcode::p_constaddr)
+  return 3; /* lowered to 3 instructions in the assembler */
+   else
+  return 1;
 }
 
 bool regs_intersect(PhysReg a_reg, unsigned a_size, PhysReg b_reg, unsigned 
b_size)

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Mesa (master): blorp: Write to depth/stencil images as depth/stencil when possible

[GitLab Mirror]

Module: Mesa
Branch: master
Commit: 6cec618e82aa233eee4e412a211a7bec0c40b090
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=6cec618e82aa233eee4e412a211a7bec0c40b090

Author: Jason Ekstrand 
Date:   Wed Feb  5 03:59:01 2020 -0600

blorp: Write to depth/stencil images as depth/stencil when possible

On Gen4 and G45 and earlier, we have to handle weird offsetting to write
to depth and stencil due to a lack of proper depth mipmapping support in
hardware.  On Gen6, we have to deal with strange HiZ and stencil
layouts.  Prior to Gen9, we also had to do crazy things for stencil
writes because we didn't support GL_ARB_shader_stencil_export and
friends in hardware.  However, starting with Gen7 for depth and Gen9 for
stencil, we can easily write out with the "right" hardware.  This allows
us to leave HiZ and other compression enabled for blorp_blit() and
blorp_copy() operations.

Reviewed-by: Nanley Chery 
Part-of: 

---

 src/intel/blorp/blorp_blit.c  | 85 +++
 src/intel/blorp/blorp_genX_exec.h |  8 +++-
 src/intel/blorp/blorp_priv.h  |  2 +
 3 files changed, 77 insertions(+), 18 deletions(-)

diff --git a/src/intel/blorp/blorp_blit.c b/src/intel/blorp/blorp_blit.c
index 5c38ba6adb6..cff57a356ac 100644
--- a/src/intel/blorp/blorp_blit.c
+++ b/src/intel/blorp/blorp_blit.c
@@ -59,9 +59,6 @@ struct brw_blorp_blit_vars {
nir_variable *v_src_offset;
nir_variable *v_dst_offset;
nir_variable *v_src_inv_size;
-
-   /* gl_FragColor */
-   nir_variable *color_out;
 };
 
 static void
@@ -80,10 +77,6 @@ brw_blorp_blit_vars_init(nir_builder *b, struct 
brw_blorp_blit_vars *v,
LOAD_INPUT(src_inv_size, glsl_vector_type(GLSL_TYPE_FLOAT, 2))
 
 #undef LOAD_INPUT
-
-   v->color_out = nir_variable_create(b->shader, nir_var_shader_out,
-  glsl_vec4_type(), "gl_FragColor");
-   v->color_out->data.location = FRAG_RESULT_COLOR;
 }
 
 static nir_ssa_def *
@@ -1472,7 +1465,27 @@ brw_blorp_build_nir_shader(struct blorp_context *blorp, 
void *mem_ctx,
   color = nir_vec4(, color_component, u, u, u);
}
 
-   nir_store_var(, v.color_out, color, 0xf);
+   if (key->dst_usage == ISL_SURF_USAGE_RENDER_TARGET_BIT) {
+  nir_variable *color_out =
+ nir_variable_create(b.shader, nir_var_shader_out,
+ glsl_vec4_type(), "gl_FragColor");
+  color_out->data.location = FRAG_RESULT_COLOR;
+  nir_store_var(, color_out, color, 0xf);
+   } else if (key->dst_usage == ISL_SURF_USAGE_DEPTH_BIT) {
+  nir_variable *depth_out =
+ nir_variable_create(b.shader, nir_var_shader_out,
+ glsl_float_type(), "gl_FragDepth");
+  depth_out->data.location = FRAG_RESULT_DEPTH;
+  nir_store_var(, depth_out, nir_channel(, color, 0), 0x1);
+   } else if (key->dst_usage == ISL_SURF_USAGE_STENCIL_BIT) {
+  nir_variable *stencil_out =
+ nir_variable_create(b.shader, nir_var_shader_out,
+ glsl_int_type(), "gl_FragStencilRef");
+  stencil_out->data.location = FRAG_RESULT_STENCIL;
+  nir_store_var(, stencil_out, nir_channel(, color, 0), 0x1);
+   } else {
+  unreachable("Invalid destination usage");
+   }
 
return b.shader;
 }
@@ -1808,6 +1821,30 @@ try_blorp_blit(struct blorp_batch *batch,
 {
const struct gen_device_info *devinfo = batch->blorp->isl_dev->info;
 
+   if (params->dst.surf.usage & ISL_SURF_USAGE_DEPTH_BIT) {
+  if (devinfo->gen >= 7) {
+ /* We can render as depth on Gen5 but there's no real advantage since
+  * it doesn't support MSAA or HiZ.  On Gen4, we can't always render
+  * to depth due to issues with depth buffers and mip-mapping.  On
+  * Gen6, we can do everything but we have weird offsetting for HiZ
+  * and stencil.  It's easier to just render using the color pipe
+  * on those platforms.
+  */
+ wm_prog_key->dst_usage = ISL_SURF_USAGE_DEPTH_BIT;
+  } else {
+ wm_prog_key->dst_usage = ISL_SURF_USAGE_RENDER_TARGET_BIT;
+  }
+   } else if (params->dst.surf.usage & ISL_SURF_USAGE_STENCIL_BIT) {
+  assert(params->dst.surf.format == ISL_FORMAT_R8_UINT);
+  if (devinfo->gen >= 9) {
+ wm_prog_key->dst_usage = ISL_SURF_USAGE_STENCIL_BIT;
+  } else {
+ wm_prog_key->dst_usage = ISL_SURF_USAGE_RENDER_TARGET_BIT;
+  }
+   } else {
+  wm_prog_key->dst_usage = ISL_SURF_USAGE_RENDER_TARGET_BIT;
+   }
+
if (isl_format_has_sint_channel(params->src.view.format)) {
   wm_prog_key->texture_data_type = nir_type_int;
} else if (isl_format_has_uint_channel(params->src.view.format)) {
@@ -1862,6 +1899,7 @@ try_blorp_blit(struct blorp_batch *batch,
}
 
if (devinfo->gen > 6 &&
+   !isl_surf_usage_is_depth_or_stencil(wm_prog_key->dst_usage) &&
params->dst.surf.msaa_layout == ISL_MSAA_LAYOUT_INTERLEAVED) {
 

Mesa (master): anv: Enable HiZ for VK_IMAGE_LAYOUT_TRANSFER_DST_OPTIMAL

[GitLab Mirror]

Module: Mesa
Branch: master
Commit: 83b641a038704d7fe834d13dad39b0a9f841baca
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=83b641a038704d7fe834d13dad39b0a9f841baca

Author: Jason Ekstrand 
Date:   Wed Feb  5 10:12:26 2020 -0600

anv: Enable HiZ for VK_IMAGE_LAYOUT_TRANSFER_DST_OPTIMAL

Reviewed-by: Nanley Chery 
Part-of: 

---

 src/intel/vulkan/anv_image.c | 27 +++
 1 file changed, 19 insertions(+), 8 deletions(-)

diff --git a/src/intel/vulkan/anv_image.c b/src/intel/vulkan/anv_image.c
index fbb14cc996b..39f61a99467 100644
--- a/src/intel/vulkan/anv_image.c
+++ b/src/intel/vulkan/anv_image.c
@@ -1123,22 +1123,33 @@ anv_layout_to_aux_state(const struct gen_device_info * 
const devinfo,
case VK_IMAGE_LAYOUT_PREINITIALIZED:
   return ISL_AUX_STATE_AUX_INVALID;
 
-   /* Transfer layouts */
+   /* General layout */
case VK_IMAGE_LAYOUT_GENERAL:
-   case VK_IMAGE_LAYOUT_TRANSFER_DST_OPTIMAL:
   if (aspect == VK_IMAGE_ASPECT_DEPTH_BIT) {
- /* This buffer could be a depth buffer used in a transfer operation.
-  * BLORP currently doesn't use HiZ for transfer operations so we must
-  * use the main buffer for this layout. TODO: Enable HiZ in BLORP.
-  */
- assert(image->planes[plane].aux_usage == ISL_AUX_USAGE_HIZ);
- return ISL_AUX_STATE_AUX_INVALID;
+ if (image->usage & VK_IMAGE_USAGE_INPUT_ATTACHMENT_BIT) {
+/* This buffer could be used as both a depth and input attachment
+ * at the same time in which case compression could cause issues.
+ */
+return ISL_AUX_STATE_AUX_INVALID;
+ } else if (anv_can_sample_with_hiz(devinfo, image)) {
+return ISL_AUX_STATE_COMPRESSED_CLEAR;
+ } else {
+return ISL_AUX_STATE_AUX_INVALID;
+ }
   } else if (image->planes[plane].aux_usage == ISL_AUX_USAGE_CCS_D) {
  return ISL_AUX_STATE_PASS_THROUGH;
   } else {
  return ISL_AUX_STATE_COMPRESSED_CLEAR;
   }
 
+   /* Transfer layouts */
+   case VK_IMAGE_LAYOUT_TRANSFER_DST_OPTIMAL:
+  if (image->planes[plane].aux_usage == ISL_AUX_USAGE_CCS_D) {
+ return ISL_AUX_STATE_PASS_THROUGH;
+  } else {
+ return ISL_AUX_STATE_COMPRESSED_CLEAR;
+  }
+
/* Sampling layouts */
case VK_IMAGE_LAYOUT_DEPTH_READ_ONLY_OPTIMAL_KHR:
case VK_IMAGE_LAYOUT_DEPTH_STENCIL_READ_ONLY_OPTIMAL:

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Mesa (master): isl: Set 3DSTATE_DEPTH_BUFFER::Depth correctly for 3D surfaces

[GitLab Mirror]

Module: Mesa
Branch: master
Commit: 9f5f4269a66eebfcaa3ae5cd7bdf91d88a7fc69c
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=9f5f4269a66eebfcaa3ae5cd7bdf91d88a7fc69c

Author: Jason Ekstrand 
Date:   Wed Feb  5 09:03:30 2020 -0600

isl: Set 3DSTATE_DEPTH_BUFFER::Depth correctly for 3D surfaces

Cc: mesa-sta...@lists.freedesktop.org
Reviewed-by: Nanley Chery 
Part-of: 

---

 src/intel/isl/isl_emit_depth_stencil.c | 20 +++-
 1 file changed, 19 insertions(+), 1 deletion(-)

diff --git a/src/intel/isl/isl_emit_depth_stencil.c 
b/src/intel/isl/isl_emit_depth_stencil.c
index 782ca649156..c62639955eb 100644
--- a/src/intel/isl/isl_emit_depth_stencil.c
+++ b/src/intel/isl/isl_emit_depth_stencil.c
@@ -71,11 +71,15 @@ isl_genX(emit_depth_stencil_hiz_s)(const struct isl_device 
*dev, void *batch,
   db.SurfaceFormat = isl_surf_get_depth_format(dev, info->depth_surf);
   db.Width = info->depth_surf->logical_level0_px.width - 1;
   db.Height = info->depth_surf->logical_level0_px.height - 1;
+  if (db.SurfaceType == SURFTYPE_3D)
+ db.Depth = info->depth_surf->logical_level0_px.depth - 1;
} else if (info->stencil_surf) {
   db.SurfaceType = isl_to_gen_ds_surftype[info->stencil_surf->dim];
   db.SurfaceFormat = D32_FLOAT;
   db.Width = info->stencil_surf->logical_level0_px.width - 1;
   db.Height = info->stencil_surf->logical_level0_px.height - 1;
+  if (db.SurfaceType == SURFTYPE_3D)
+ db.Depth = info->stencil_surf->logical_level0_px.depth - 1;
} else {
   db.SurfaceType = SURFTYPE_NULL;
   db.SurfaceFormat = D32_FLOAT;
@@ -83,9 +87,23 @@ isl_genX(emit_depth_stencil_hiz_s)(const struct isl_device 
*dev, void *batch,
 
if (info->depth_surf || info->stencil_surf) {
   /* These are based entirely on the view */
-  db.Depth = db.RenderTargetViewExtent = info->view->array_len - 1;
+  db.RenderTargetViewExtent = info->view->array_len - 1;
   db.LOD  = info->view->base_level;
   db.MinimumArrayElement  = info->view->base_array_layer;
+
+  /* From the Haswell PRM docs for 3DSTATE_DEPTH_BUFFER::Depth
+   *
+   *"This field specifies the total number of levels for a volume
+   *texture or the number of array elements allowed to be accessed
+   *starting at the Minimum Array Element for arrayed surfaces. If the
+   *volume texture is MIP-mapped, this field specifies the depth of
+   *the base MIP level."
+   *
+   * For 3D surfaces, we set it to the correct depth above.  For non-3D
+   * surfaces, this is the same as RenderTargetViewExtent.
+   */
+  if (db.SurfaceType != SURFTYPE_3D)
+ db.Depth = db.RenderTargetViewExtent;
}
 
if (info->depth_surf) {

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Mesa (master): iris: Enable CCS for copies from HiZ+CCS depth buffers

[GitLab Mirror]

Module: Mesa
Branch: master
Commit: a0d5c7da18c9ace4a2153d1352ac44cb3bd65425
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=a0d5c7da18c9ace4a2153d1352ac44cb3bd65425

Author: Jason Ekstrand 
Date:   Fri Feb  7 16:20:32 2020 -0600

iris: Enable CCS for copies from HiZ+CCS depth buffers

Ever since b274469daae, BLORP is able to sample from whatever the
sampler supports.  In c0c899cf7892, we added HiZ support for copies from
HiZ compressed depth buffers but forgot HiZ+CCS.

Reviewed-by: Nanley Chery 
Part-of: 

---

 src/gallium/drivers/iris/iris_blit.c | 20 
 1 file changed, 12 insertions(+), 8 deletions(-)

diff --git a/src/gallium/drivers/iris/iris_blit.c 
b/src/gallium/drivers/iris/iris_blit.c
index 10a157b3ef4..9cb67105f79 100644
--- a/src/gallium/drivers/iris/iris_blit.c
+++ b/src/gallium/drivers/iris/iris_blit.c
@@ -566,20 +566,25 @@ iris_blit(struct pipe_context *ctx, const struct 
pipe_blit_info *info)
 }
 
 static void
-get_copy_region_aux_settings(const struct gen_device_info *devinfo,
+get_copy_region_aux_settings(struct iris_context *ice,
  struct iris_resource *res,
  enum isl_aux_usage *out_aux_usage,
  bool *out_clear_supported,
  bool is_render_target)
 {
+   struct iris_screen *screen = (void *) ice->ctx.screen;
+   const struct gen_device_info *devinfo = >devinfo;
+
switch (res->aux.usage) {
case ISL_AUX_USAGE_HIZ:
-  if (!is_render_target && iris_sample_with_depth_aux(devinfo, res)) {
- *out_aux_usage = ISL_AUX_USAGE_HIZ;
- *out_clear_supported = true;
-  } else {
+   case ISL_AUX_USAGE_HIZ_CCS:
+  if (is_render_target) {
  *out_aux_usage = ISL_AUX_USAGE_NONE;
  *out_clear_supported = false;
+  } else {
+ *out_aux_usage = iris_resource_texture_aux_usage(ice, res,
+  res->surf.format);
+ *out_clear_supported = (*out_aux_usage != ISL_AUX_USAGE_NONE);
   }
   break;
case ISL_AUX_USAGE_MCS:
@@ -630,15 +635,14 @@ iris_copy_region(struct blorp_context *blorp,
struct blorp_batch blorp_batch;
struct iris_context *ice = blorp->driver_ctx;
struct iris_screen *screen = (void *) ice->ctx.screen;
-   const struct gen_device_info *devinfo = >devinfo;
struct iris_resource *src_res = (void *) src;
struct iris_resource *dst_res = (void *) dst;
 
enum isl_aux_usage src_aux_usage, dst_aux_usage;
bool src_clear_supported, dst_clear_supported;
-   get_copy_region_aux_settings(devinfo, src_res, _aux_usage,
+   get_copy_region_aux_settings(ice, src_res, _aux_usage,
 _clear_supported, false);
-   get_copy_region_aux_settings(devinfo, dst_res, _aux_usage,
+   get_copy_region_aux_settings(ice, dst_res, _aux_usage,
 _clear_supported, true);
 
if (iris_batch_references(batch, src_res->bo))

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Mesa (master): iris: Enable HiZ and stencil CCS for blorp blit destinations

[GitLab Mirror]

Module: Mesa
Branch: master
Commit: ce196812579d48df8da05118a2a5098d048da83d
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=ce196812579d48df8da05118a2a5098d048da83d

Author: Jason Ekstrand 
Date:   Mon Feb 10 18:18:02 2020 -0600

iris: Enable HiZ and stencil CCS for blorp blit destinations

Now that blorp blits write to depth and stencil as depth and stencil, we
can leave HiZ and stencil CCS enabled for blorp blit destinations.

Reviewed-by: Nanley Chery 
Tested-by: Marge Bot 

Part-of: 

---

 src/gallium/drivers/iris/iris_blit.c | 61 +++-
 1 file changed, 25 insertions(+), 36 deletions(-)

diff --git a/src/gallium/drivers/iris/iris_blit.c 
b/src/gallium/drivers/iris/iris_blit.c
index 9cb67105f79..8dca0c4a362 100644
--- a/src/gallium/drivers/iris/iris_blit.c
+++ b/src/gallium/drivers/iris/iris_blit.c
@@ -319,6 +319,21 @@ tex_cache_flush_hack(struct iris_batch *batch,
 PIPE_CONTROL_TEXTURE_CACHE_INVALIDATE);
 }
 
+static enum isl_aux_usage
+iris_resource_blorp_write_aux_usage(struct iris_context *ice,
+struct iris_resource *res,
+enum isl_format render_format)
+{
+   if (res->surf.usage & (ISL_SURF_USAGE_DEPTH_BIT |
+  ISL_SURF_USAGE_STENCIL_BIT)) {
+  assert(render_format == res->surf.format);
+  return res->aux.usage;
+   } else {
+  return iris_resource_render_aux_usage(ice, res, render_format,
+false, false);
+   }
+}
+
 /**
  * The pipe->blit() driver hook.
  *
@@ -368,7 +383,7 @@ iris_blit(struct pipe_context *ctx, const struct 
pipe_blit_info *info)
   iris_format_for_usage(devinfo, info->dst.format,
 ISL_SURF_USAGE_RENDER_TARGET_BIT);
enum isl_aux_usage dst_aux_usage =
-  iris_resource_render_aux_usage(ice, dst_res, dst_fmt.fmt, false, false);
+  iris_resource_blorp_write_aux_usage(ice, dst_res, dst_fmt.fmt);
bool dst_clear_supported = isl_aux_usage_has_fast_clears(dst_aux_usage);
 
struct blorp_surf src_surf, dst_surf;
@@ -500,23 +515,7 @@ iris_blit(struct pipe_context *ctx, const struct 
pipe_blit_info *info)
  iris_format_for_usage(devinfo, stc_dst->base.format,
ISL_SURF_USAGE_RENDER_TARGET_BIT);
   stc_dst_aux_usage =
- iris_resource_render_aux_usage(ice, stc_dst, dst_fmt.fmt, false, 
false);
-
-  /* Resolve destination surface before blit because :
-   *1. when we try to blit from the same surface, we can't read and
-   *write to the same surfaces at the same time when we have
-   *compression enabled so it's safe to resolve surface first and then
-   *do blit.
-   *2. While bliting from one surface to another surface, we might be
-   *mixing compression formats, Our experiments shows that if after
-   *blit if we set DepthStencilResource flag to 0, blit passes but
-   *clear fails.
-   *
-   *XXX: In second case by destructing the compression, we might lose
-   *some performance.
-   */
-  if (devinfo->gen >= 12)
- stc_dst_aux_usage = ISL_AUX_USAGE_NONE;
+ iris_resource_blorp_write_aux_usage(ice, stc_dst, dst_fmt.fmt);
 
   iris_resource_prepare_access(ice, batch, src_res, info->src.level, 1,
info->src.box.z, info->src.box.depth,
@@ -579,33 +578,23 @@ get_copy_region_aux_settings(struct iris_context *ice,
case ISL_AUX_USAGE_HIZ:
case ISL_AUX_USAGE_HIZ_CCS:
   if (is_render_target) {
- *out_aux_usage = ISL_AUX_USAGE_NONE;
- *out_clear_supported = false;
+ *out_aux_usage = res->aux.usage;
   } else {
  *out_aux_usage = iris_resource_texture_aux_usage(ice, res,
   res->surf.format);
- *out_clear_supported = (*out_aux_usage != ISL_AUX_USAGE_NONE);
   }
+  *out_clear_supported = (*out_aux_usage != ISL_AUX_USAGE_NONE);
   break;
case ISL_AUX_USAGE_MCS:
case ISL_AUX_USAGE_MCS_CCS:
case ISL_AUX_USAGE_CCS_E:
-  /* A stencil resolve operation must be performed prior to doing resource
-   * copies or used by CPU.
-   * (see HSD 1209978162)
+  *out_aux_usage = res->aux.usage;
+  /* Prior to Gen9, fast-clear only supported 0/1 clear colors.  Since
+   * we're going to re-interpret the format as an integer format possibly
+   * with a different number of components, we can't handle clear colors
+   * until Gen9.
*/
-  if (is_render_target && isl_surf_usage_is_stencil(res->surf.usage)) {
- *out_aux_usage = ISL_AUX_USAGE_NONE;
- *out_clear_supported = false;
-  } else {
- *out_aux_usage = res->aux.usage;

Mesa (master): iris: Allow HiZ on blit sources

[GitLab Mirror]

Module: Mesa
Branch: master
Commit: 4531f0ffcec591e3853e78ce58f5d83cf276fb0d
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=4531f0ffcec591e3853e78ce58f5d83cf276fb0d

Author: Jason Ekstrand 
Date:   Mon Mar  2 13:54:22 2020 -0600

iris: Allow HiZ on blit sources

Ever since 95cc5438ebf, BLORP has been able to read from HiZ-compressed
depth buffers as long as the sampler supports HiZ.  This just makes iris
stop doing the unneeded resolve.

Closes: #2583
Reviewed-by: Nanley Chery 
Part-of: 

---

 src/gallium/drivers/iris/iris_blit.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/gallium/drivers/iris/iris_blit.c 
b/src/gallium/drivers/iris/iris_blit.c
index 20b73406383..10a157b3ef4 100644
--- a/src/gallium/drivers/iris/iris_blit.c
+++ b/src/gallium/drivers/iris/iris_blit.c
@@ -355,7 +355,7 @@ iris_blit(struct pipe_context *ctx, const struct 
pipe_blit_info *info)
   iris_resource_texture_aux_usage(ice, src_res, src_fmt.fmt);
 
if (iris_resource_level_has_hiz(src_res, info->src.level))
-  src_aux_usage = ISL_AUX_USAGE_NONE;
+  assert(src_res->surf.format == src_fmt.fmt);
 
bool src_clear_supported = isl_aux_usage_has_fast_clears(src_aux_usage) &&
   src_res->surf.format == src_fmt.fmt;

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Mesa (master): docs: Update stable process around using fixes: and gitlab

[GitLab Mirror]

Module: Mesa
Branch: master
Commit: 07f1ef5656e0721282d01a8421eaca056348137d
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=07f1ef5656e0721282d01a8421eaca056348137d

Author: Dylan Baker 
Date:   Wed Dec 11 11:01:57 2019 -0800

docs: Update stable process around using fixes: and gitlab

Currently the docs still recommend using
mesa-sta...@lists.freedesktop.org, which is pretty awful. We really
don't want a second mailing list and it's mostly full of junk because of
CC: tags anyway.

This changes the preferred actions to be:
1) use a fixes: tag ahead of time
2) use a Cc tag ahead of time if fixes isn't appropriate
3) Use a gitlab MR against the staging/ branch for post-merge/backport
   nominations

Reviewed-by: Timothy Arceri 
Tested-by: Marge Bot 

Part-of: 

---

 docs/submittingpatches.html | 58 +++--
 1 file changed, 30 insertions(+), 28 deletions(-)

diff --git a/docs/submittingpatches.html b/docs/submittingpatches.html
index 97fae5484a3..9113e417009 100644
--- a/docs/submittingpatches.html
+++ b/docs/submittingpatches.html
@@ -278,13 +278,14 @@ release.
 
 
  By adding the Cc: mesa-stable@ tag as described below.
- Sending the commit ID (as seen in master branch) to the mesa-stable@ 
mailing list.
- Forwarding the patch from the mesa-dev@ mailing list.
+ By adding the fixes: tag as described below.
+ By submitting a merge requestion against the "staging/year.quarter" 
branch on gitlab.
 
 
 
-Note: resending patch identical to one on mesa-dev@ or one that differs only
-by the extra mesa-stable@ tag is not recommended.
+Please DO NOT send patches to
+mesa-sta...@lists.freedektop.org, it is not monitored actively and is a
+historical artifact.
 
 
 If you are not the author of the original patch, please Cc: them in your
@@ -303,31 +304,27 @@ you should add an appropriate note to the commit message.
 
 
 
+Using a "fixes tag" as described in Patch formatting
+is the prefered way to nominate a commit that you know ahead of time should be
+backported. There are scripts that will figure out which releases to apply the
+patch to automatically, so you don't need to figure it out.
+
+
+
+Alternatively, you maye use a "CC:" tag.
+
 Here are some examples of such a note:
 
 
-CC: mesa-sta...@lists.freedesktop.org
+CC: 20.0 19.3 mesa-sta...@lists.freedesktop.org
 
 
-Simply adding the CC to the mesa-stable list address is adequate to nominate
-the commit for all the active stable branches. If the commit is not applicable
-for said branch the stable-release manager will reply stating so.
-
-This "CC" syntax for patch nomination will cause patches to automatically be
-copied to the mesa-stable@ mailing list when you use "git send-email" to send
-patches to the mesa-dev@ mailing list. If you prefer using --suppress-cc that
-won't have any negative effect on the patch nomination.
-
 
-Note: by removing the tag [as the commit is pushed] the patch is
-explicitly rejected from inclusion in the stable branch(es).
-Thus, drop the line only if you want to cancel the nomination.
+Using the CC tag should include the stable branches you want
+to nominate the patch to. If you do not provide any version it is nominated to
+all active stable branches.
 
 
-Alternatively, if one uses the "Fixes" tag as described in the "Patch 
formatting"
-section, it nominates a commit for all active stable branches that include the
-commit that is referred to.
-
 Criteria for accepting patches to the stable branch
 
 Mesa has a designated release manager for each stable branch, and the release
@@ -387,16 +384,21 @@ yourself warned.
 
 Sending backports for the stable branch
 
-By default merge conflicts are resolved by the stable-release manager. In which
-case he/she should provide a comment about the changes required, alongside the
-Conflicts section. Summary of which will be provided in the
-pre-release announcement.
+By default merge conflicts are resolved by the stable-release manager. The
+release maintainer should resolve trivial conflicts, but for complex conflicts
+should ask the original author to provide a backport of de-nominate.
 
 
 
-Developers are interested in sending backports are recommended to use either a
-[BACKPORT #branch] subject prefix or provides similar information
-within the commit summary.
+For patches that either need to be nominated after they've landed in master, or
+that are known ahead of time to not not apply cleanly to a stable branch (such
+as due to a rename), using a gitlab MR is most appropirate.
+
+The MR should be based on and target the staging/year.quarter branch, not on
+the year.quarter branch, per the stable branch policy.
+
+Assinging the MR to release maintainer for said branch or mentioning them is
+helpful, but not required.
 
 
 Git tips

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Mesa (master): turnip: fix tile->slot calculation

[GitLab Mirror]

Module: Mesa
Branch: master
Commit: 55dac91adc40db191c385f9a2ce393f46dd9b859
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=55dac91adc40db191c385f9a2ce393f46dd9b859

Author: Jonathan Marek 
Date:   Tue Dec 17 17:29:02 2019 -0500

turnip: fix tile->slot calculation

Fixes HW binning cases when the horizontal number of tiles isn't divisible
by the horizontal number of pipes (only happens with more than 32 tiles).

Signed-off-by: Jonathan Marek 
Tested-by: Marge Bot 

Part-of: 

---

 src/freedreno/vulkan/tu_cmd_buffer.c | 6 +-
 1 file changed, 5 insertions(+), 1 deletion(-)

diff --git a/src/freedreno/vulkan/tu_cmd_buffer.c 
b/src/freedreno/vulkan/tu_cmd_buffer.c
index b9408f87a4b..74997b31933 100644
--- a/src/freedreno/vulkan/tu_cmd_buffer.c
+++ b/src/freedreno/vulkan/tu_cmd_buffer.c
@@ -318,6 +318,10 @@ tu_tiling_config_get_tile(const struct tu_tiling_config 
*tiling,
const uint32_t py = ty / tiling->pipe0.height;
const uint32_t sx = tx - tiling->pipe0.width * px;
const uint32_t sy = ty - tiling->pipe0.height * py;
+   /* last pipe has different width */
+   const uint32_t pipe_width =
+  MIN2(tiling->pipe0.width,
+   tiling->tile_count.width - px * tiling->pipe0.width);
 
assert(tx < tiling->tile_count.width && ty < tiling->tile_count.height);
assert(px < tiling->pipe_count.width && py < tiling->pipe_count.height);
@@ -325,7 +329,7 @@ tu_tiling_config_get_tile(const struct tu_tiling_config 
*tiling,
 
/* convert to 1D indices */
tile->pipe = tiling->pipe_count.width * py + px;
-   tile->slot = tiling->pipe0.width * sy + sx;
+   tile->slot = pipe_width * sy + sx;
 
/* get the blit area for the tile */
tile->begin = (VkOffset2D) {

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Mesa (master): turnip: improve binning pipe layout config

[GitLab Mirror]

Module: Mesa
Branch: master
Commit: 036230341f4f2e7b11791708015342cf9385cf76
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=036230341f4f2e7b11791708015342cf9385cf76

Author: Jonathan Marek 
Date:   Tue Dec 17 17:22:46 2019 -0500

turnip: improve binning pipe layout config

The old code looks the same as GL driver, but we get things like
pipe_count = {32, 1}, which seems bad.

This uses similar logic as for tiles which produces a balanced pipe_count
width/height.

Signed-off-by: Jonathan Marek 
Part-of: 

---

 src/freedreno/vulkan/tu_cmd_buffer.c | 25 ++---
 1 file changed, 10 insertions(+), 15 deletions(-)

diff --git a/src/freedreno/vulkan/tu_cmd_buffer.c 
b/src/freedreno/vulkan/tu_cmd_buffer.c
index 27295cfdb25..b9408f87a4b 100644
--- a/src/freedreno/vulkan/tu_cmd_buffer.c
+++ b/src/freedreno/vulkan/tu_cmd_buffer.c
@@ -254,21 +254,16 @@ tu_tiling_config_update_pipe_layout(struct 
tu_tiling_config *tiling,
};
tiling->pipe_count = tiling->tile_count;
 
-   /* do not exceed max pipe count vertically */
-   while (tiling->pipe_count.height > max_pipe_count) {
-  tiling->pipe0.height += 2;
-  tiling->pipe_count.height =
- (tiling->tile_count.height + tiling->pipe0.height - 1) /
- tiling->pipe0.height;
-   }
-
-   /* do not exceed max pipe count */
-   while (tiling->pipe_count.width * tiling->pipe_count.height >
-  max_pipe_count) {
-  tiling->pipe0.width += 1;
-  tiling->pipe_count.width =
- (tiling->tile_count.width + tiling->pipe0.width - 1) /
- tiling->pipe0.width;
+   while (tiling->pipe_count.width * tiling->pipe_count.height > 
max_pipe_count) {
+  if (tiling->pipe0.width < tiling->pipe0.height) {
+ tiling->pipe0.width += 1;
+ tiling->pipe_count.width =
+DIV_ROUND_UP(tiling->tile_count.width, tiling->pipe0.width);
+  } else {
+ tiling->pipe0.height += 1;
+ tiling->pipe_count.height =
+DIV_ROUND_UP(tiling->tile_count.height, tiling->pipe0.height);
+  }
}
 }
 

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Mesa (master): Revert "glsl: Use a simpler formula for tanh"

[GitLab Mirror]

Module: Mesa
Branch: master
Commit: 986e92f0ea803caf014adc40e900bc774af71da3
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=986e92f0ea803caf014adc40e900bc774af71da3

Author: Kristian H. Kristensen 
Date:   Wed Feb 26 16:52:45 2020 -0800

Revert "glsl: Use a simpler formula for tanh"

This reverts commit 9807f502eb7a023be619a14119388b2a43271b0e.

The simplified formula doesn't pass the tanh dEQP tests when we lower
to fp16 math.

Part-of: 

---

 src/compiler/glsl/builtin_functions.cpp | 18 --
 1 file changed, 8 insertions(+), 10 deletions(-)

diff --git a/src/compiler/glsl/builtin_functions.cpp 
b/src/compiler/glsl/builtin_functions.cpp
index d77404ee77f..82e00a64ad9 100644
--- a/src/compiler/glsl/builtin_functions.cpp
+++ b/src/compiler/glsl/builtin_functions.cpp
@@ -5169,19 +5169,17 @@ builtin_builder::_tanh(const glsl_type *type)
ir_variable *x = in_var(type, "x");
MAKE_SIG(type, v130, 1, x);
 
-   /* tanh(x) := (0.5 * (e^x - e^(-x))) / (0.5 * (e^x + e^(-x)))
-*
-* With a little algebra this reduces to (e^2x - 1) / (e^2x + 1)
-*
-* Clamp x to (-inf, +10] to avoid precision problems.  When x > 10, e^2x
-* is so much larger than 1.0 that 1.0 gets flushed to zero in the
-* computation e^2x +/- 1 so it can be ignored.
+   /* Clamp x to [-10, +10] to avoid precision problems.
+* When x > 10, e^(-x) is so small relative to e^x that it gets flushed to
+* zero in the computation e^x + e^(-x). The same happens in the other
+* direction when x < -10.
 */
ir_variable *t = body.make_temp(type, "tmp");
-   body.emit(assign(t, min2(x, imm(10.0f;
+   body.emit(assign(t, min2(max2(x, imm(-10.0f)), imm(10.0f;
 
-   body.emit(ret(div(sub(exp(mul(t, imm(2.0f))), imm(1.0f)),
- add(exp(mul(t, imm(2.0f))), imm(1.0f);
+   /* (e^x - e^(-x)) / (e^x + e^(-x)) */
+   body.emit(ret(div(sub(exp(t), exp(neg(t))),
+ add(exp(t), exp(neg(t));
 
return sig;
 }

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Mesa (master): Revert "spirv: Use a simpler and more correct implementaiton of tanh()"

[GitLab Mirror]

Module: Mesa
Branch: master
Commit: 9f9432d56c055b9704a76cad44da88d5e12f825c
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=9f9432d56c055b9704a76cad44da88d5e12f825c

Author: Kristian H. Kristensen 
Date:   Thu Feb 27 11:38:53 2020 -0800

Revert "spirv: Use a simpler and more correct implementaiton of tanh()"

This reverts commit da1c49171d0df185545cfbbd600e287f7c6160fa.

The reduced formula has precision problems on fp16 around 0.  Bring
back the old formula, but make sure to keep the clamping.

Tested-by: Marge Bot 

Part-of: 

---

 src/compiler/spirv/vtn_glsl450.c | 27 +--
 1 file changed, 13 insertions(+), 14 deletions(-)

diff --git a/src/compiler/spirv/vtn_glsl450.c b/src/compiler/spirv/vtn_glsl450.c
index a074b6f3fb4..571f06cbed2 100644
--- a/src/compiler/spirv/vtn_glsl450.c
+++ b/src/compiler/spirv/vtn_glsl450.c
@@ -458,25 +458,24 @@ handle_glsl450_alu(struct vtn_builder *b, enum GLSLstd450 
entrypoint,
   return;
 
case GLSLstd450Tanh: {
-  /* tanh(x) := (0.5 * (e^x - e^(-x))) / (0.5 * (e^x + e^(-x)))
+  /* tanh(x) := (e^x - e^(-x)) / (e^x + e^(-x))
*
-   * With a little algebra this reduces to (e^2x - 1) / (e^2x + 1)
+   * We clamp x to [-10, +10] to avoid precision problems.  When x > 10,
+   * e^x dominates the sum, e^(-x) is lost and tanh(x) is 1.0 for 32 bit
+   * floating point.
*
-   * We clamp x to (-inf, +10] to avoid precision problems.  When x > 10,
-   * e^2x is so much larger than 1.0 that 1.0 gets flushed to zero in the
-   * computation e^2x +/- 1 so it can be ignored.
-   *
-   * For 16-bit precision we clamp x to (-inf, +4.2] since the maximum
-   * representable number is only 65,504 and e^(2*6) exceeds that. Also,
-   * if x > 4.2, tanh(x) will return 1.0 in fp16.
+   * For 16-bit precision this we clamp x to [-4.2, +4.2].
*/
   const uint32_t bit_size = src[0]->bit_size;
   const double clamped_x = bit_size > 16 ? 10.0 : 4.2;
-  nir_ssa_def *x = nir_fmin(nb, src[0],
-nir_imm_floatN_t(nb, clamped_x, bit_size));
-  nir_ssa_def *exp2x = build_exp(nb, nir_fmul_imm(nb, x, 2.0));
-  val->ssa->def = nir_fdiv(nb, nir_fadd_imm(nb, exp2x, -1.0),
-   nir_fadd_imm(nb, exp2x, 1.0));
+  nir_ssa_def *x = nir_fclamp(nb, src[0],
+  nir_imm_floatN_t(nb, -clamped_x, bit_size),
+  nir_imm_floatN_t(nb, clamped_x, bit_size));
+  val->ssa->def =
+ nir_fdiv(nb, nir_fsub(nb, build_exp(nb, x),
+   build_exp(nb, nir_fneg(nb, x))),
+  nir_fadd(nb, build_exp(nb, x),
+   build_exp(nb, nir_fneg(nb, x;
   return;
}
 

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Mesa (master): 41 new commits

[GitLab Mirror]

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=bc5724faf40df9aec6c8e2e52f4017db35d21330
Author: Alyssa Rosenzweig 
Date:   Thu Mar 5 08:23:43 2020 -0500

pan/bi: Add bi_print_shader

Woot! That's the last of it! IR printing is now complete*

*until the IR gets updated when new shiny things are added.

Signed-off-by: Alyssa Rosenzweig 
Tested-by: Marge Bot 

Part-of: 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=c152d4c8352aca678386eaf75da83ae95e1bd7b5
Author: Alyssa Rosenzweig 
Date:   Thu Mar 5 08:22:07 2020 -0500

pan/bi: Add bi_print_block

Almost there...

Signed-off-by: Alyssa Rosenzweig 
Part-of: 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=c316d1553bc27e9f64a14fcce147de96bea430e0
Author: Alyssa Rosenzweig 
Date:   Thu Mar 5 08:10:02 2020 -0500

pan/bi: Add bi_print_clause

Again for post-sched purposes.

Signed-off-by: Alyssa Rosenzweig 
Part-of: 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=919cdf15b3a88cf745e3aed1a52ea45a44846b35
Author: Alyssa Rosenzweig 
Date:   Thu Mar 5 07:57:49 2020 -0500

pan/bi: Add bi_print_bundle for printing bi_bundle

Post-schedule, nops are significnat here.

Signed-off-by: Alyssa Rosenzweig 
Part-of: 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=bde54cb6d319fd9516507c1040d9e5fe8e7b81f2
Author: Alyssa Rosenzweig 
Date:   Wed Mar 4 09:21:50 2020 -0500

pan/bi: Add bi_instruction printing

So we can debug the IR in memory before code emit has happened. We'd
like to have a complete dump of the IR -- neglecting this with Midgard
was one of those mistakes I've regretted so let's get this right for the
first time around.

Signed-off-by: Alyssa Rosenzweig 
Part-of: 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=aef0f00cbc976a29e5b66da4b2abbd2bcd9c0d52
Author: Alyssa Rosenzweig 
Date:   Wed Mar 4 09:21:25 2020 -0500

pan/bi: Move bi_interp_mode_name to bi_print

Instead of open-coding it in the middle of the disassembler.

Signed-off-by: Alyssa Rosenzweig 
Part-of: 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=5d16a8109c88c869ce17e6b680e2922bb983caa6
Author: Alyssa Rosenzweig 
Date:   Wed Mar 4 09:19:06 2020 -0500

pan/bi: Add BIR manipulation routines to bir.c

New file.

Signed-off-by: Alyssa Rosenzweig 
Part-of: 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=5f7a3ba872c90afc251035f24f7fc7faf6498fe3
Author: Alyssa Rosenzweig 
Date:   Tue Mar 3 15:39:04 2020 -0500

pan/bi: Move some print routines out of the disasm

These are generally useful for debug of the compiler IR even prior to
code emit; let's share these.

Signed-off-by: Alyssa Rosenzweig 
Part-of: 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=8ec671801a8decdd5c733f2fec53726d34666a0b
Author: Alyssa Rosenzweig 
Date:   Tue Mar 3 14:32:28 2020 -0500

pan/bi: Add IR iteration macros

Copypaste from Midgard, for the most part.

Signed-off-by: Alyssa Rosenzweig 
Part-of: 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=0b26cb194cc433a9910247051024bd6468d9b05c
Author: Alyssa Rosenzweig 
Date:   Tue Mar 3 14:27:05 2020 -0500

pan/bi: Add quirks system

Modeled after the Midgard system. Already we know of two
compiler-visible differences between G52 and G71, so let's keep track so
we can eventually port the compiler to other Bifrost systems.

Signed-off-by: Alyssa Rosenzweig 
Part-of: 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=07228a6895b4b57efaf55e7e6b180e308ceab879
Author: Alyssa Rosenzweig 
Date:   Tue Mar 3 13:55:33 2020 -0500

pan/bi: Add high-latency property for classes

This is required to know how to schedule legally, and also influences
some issues relating to RA.

Signed-off-by: Alyssa Rosenzweig 
Part-of: 

URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=546c301ff6d12cad678b6feb1c83cf75eb36def1
Author: Alyssa Rosenzweig 
Date:   Thu Mar 5 07:46:00 2020 -0500

pan/bi: Add CSEL condition

Along 

Mesa (master): aco: fix image load/store with lod and 1D images

[GitLab Mirror]

Module: Mesa
Branch: master
Commit: 7618fe1b484eecc2246202df1e53ee607c6d70c4
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=7618fe1b484eecc2246202df1e53ee607c6d70c4

Author: Samuel Pitoiset 
Date:   Thu Mar  5 11:32:06 2020 +0100

aco: fix image load/store with lod and 1D images

Make sure to add the lod value if non-null as the 2nd operand.

Fixes dEQP-VK.image.load_store_lod.with_format.1d.* on all gens
except GFX9.

Fixes: 4d49a7ac737 ("aco: handle nir_intrinsic_image_deref_{load,store} with 
lod")
Signed-off-by: Samuel Pitoiset 
Reviewed-by: Daniel Schürmann 
Reviewed-by: Samuel Iglesias Gonsálvez 
Tested-by: Marge Bot 

Part-of: 

---

 src/amd/compiler/aco_instruction_selection.cpp | 3 ---
 1 file changed, 3 deletions(-)

diff --git a/src/amd/compiler/aco_instruction_selection.cpp 
b/src/amd/compiler/aco_instruction_selection.cpp
index 414fd811a30..a60e57189e3 100644
--- a/src/amd/compiler/aco_instruction_selection.cpp
+++ b/src/amd/compiler/aco_instruction_selection.cpp
@@ -4314,9 +4314,6 @@ static Temp get_image_coords(isel_context *ctx, const 
nir_intrinsic_instr *instr
   }
}
 
-   if (count == 1 && !gfx9_1d)
-  return emit_extract_vector(ctx, src0, 0, v1);
-
if (gfx9_1d) {
   coords[0] = emit_extract_vector(ctx, src0, 0, v1);
   coords.resize(coords.size() + 1);

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Mesa (master): gitlab-ci: Distribute jobs across more stages

[GitLab Mirror]

Module: Mesa
Branch: master
Commit: cc9493f78ed3b366aaf1f4933c76984180a81a60
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=cc9493f78ed3b366aaf1f4933c76984180a81a60

Author: Michel Dänzer 
Date:   Thu Feb 27 18:27:56 2020 +0100

gitlab-ci: Distribute jobs across more stages

The stages and mapping of jobs to them are somewhat arbitrary; the goal
is to avoid having to scroll through large numbers of jobs.

v2: (Pierre-Eric Pelloux-Prayer)
* Use even more stages for test jobs
* Give somewhat meaningful names to stages

Reviewed-by: Pierre-Eric Pelloux-Prayer 
Reviewed-by: Eric Engestrom 
Tested-by: Marge Bot 

Part-of: 

---

 .gitlab-ci.yml| 23 +++
 .gitlab-ci/lava-gitlab-ci.yml |  9 -
 2 files changed, 27 insertions(+), 5 deletions(-)

diff --git a/.gitlab-ci.yml b/.gitlab-ci.yml
index 6ac82357d03..3beed8d4982 100644
--- a/.gitlab-ci.yml
+++ b/.gitlab-ci.yml
@@ -9,8 +9,14 @@ include:
 
 stages:
   - container
-  - build
-  - test
+  - meson-x86_64
+  - scons
+  - meson-misc
+  - llvmpipe
+  - softpipe
+  - freedreno
+  - panfrost
+  - misc-tests
   - success
 
 
@@ -194,7 +200,6 @@ arm_test:
 # Shared between windows and Linux
 .build-common:
   extends: .ci-run-policy
-  stage: build
   artifacts:
 when: always
 paths:
@@ -231,6 +236,7 @@ arm_test:
   extends:
 - .build-linux
 - .use-x86_build
+  stage: meson-x86_64
   variables:
 LLVM_VERSION: 9
   script:
@@ -240,6 +246,7 @@ arm_test:
   extends:
 - .build-linux
 - .use-x86_build
+  stage: scons
   variables:
 SCONSFLAGS: "-j4"
   script:
@@ -298,6 +305,7 @@ meson-main:
 .meson-cross:
   extends:
 - .meson-build
+  stage: meson-misc
   variables:
 UNWIND: "false"
 DRI_LOADERS: >
@@ -376,6 +384,7 @@ meson-clang:
 .meson-windows:
   extends:
 - .build-windows
+  stage: meson-misc
   before_script:
 - $ENV:ARCH = "x86"
 - $ENV:VERSION = "2019\Community"
@@ -503,6 +512,7 @@ meson-ppc64el:
 
 meson-mingw32-x86_64:
   extends: .meson-build
+  stage: meson-misc
   variables:
 UNWIND: "false"
 DRI_DRIVERS: ""
@@ -531,7 +541,6 @@ scons-old-llvm:
 .test:
   extends:
 - .ci-run-policy
-  stage: test
   variables:
 GIT_STRATEGY: none # testing doesn't build anything from source
   before_script:
@@ -569,6 +578,7 @@ scons-old-llvm:
 
 .piglit-test:
   extends: .test-gl
+  stage: llvmpipe
   artifacts:
 when: on_failure
 name: "$CI_JOB_NAME-$CI_COMMIT_REF_NAME"
@@ -640,9 +650,11 @@ llvmpipe-gles2:
 DEQP_EXPECTED_FAILS: deqp-llvmpipe-fails.txt
 LIBGL_ALWAYS_SOFTWARE: "true"
   extends: .deqp-test-gl
+  stage: llvmpipe
 
 softpipe-gles2:
   extends: llvmpipe-gles2
+  stage: softpipe
   variables:
 DEQP_EXPECTED_FAILS: deqp-softpipe-fails.txt
 DEQP_SKIPS: deqp-softpipe-skips.txt
@@ -664,6 +676,7 @@ arm64_a630_gles2:
   extends:
 - .deqp-test-gl
 - .use-arm_test
+  stage: freedreno
   variables:
 DEQP_VER: gles2
 DEQP_EXPECTED_FAILS: deqp-freedreno-a630-fails.txt
@@ -696,6 +709,7 @@ arm64_a306_gles2:
 
 # RADV CI
 .test-radv:
+  stage: misc-tests
   variables:
 VK_DRIVER: radeon
 RADV_DEBUG: checkir
@@ -724,6 +738,7 @@ radv_polaris10_vkcts:
 
 # Traces CI
 .traces-test:
+  stage: misc-tests
   cache:
 key: ${CI_JOB_NAME}
 paths:
diff --git a/.gitlab-ci/lava-gitlab-ci.yml b/.gitlab-ci/lava-gitlab-ci.yml
index 64d84ada31d..9b254e4579b 100644
--- a/.gitlab-ci/lava-gitlab-ci.yml
+++ b/.gitlab-ci/lava-gitlab-ci.yml
@@ -1,7 +1,6 @@
 .lava-test:
   extends:
 - .ci-run-policy
-  stage: test
   variables:
 GIT_STRATEGY: none # testing doesn't build anything from source
 ENV_VARS: "DEQP_PARALLEL=6"
@@ -68,6 +67,7 @@
 
 panfrost-t720-gles2:arm64:
   extends: .lava-test:arm64
+  stage: panfrost
   variables:
 DEVICE_TYPE: sun50i-h6-pine-h64
 GPU_VERSION: panfrost-t720
@@ -77,6 +77,7 @@ panfrost-t720-gles2:arm64:
 
 panfrost-t760-gles2:armhf:
   extends: .lava-test:armhf
+  stage: panfrost
   variables:
 DEVICE_TYPE: rk3288-veyron-jaq
 GPU_VERSION: panfrost-t760
@@ -88,6 +89,7 @@ panfrost-t760-gles2:armhf:
 
 panfrost-t860-gles2:arm64:
   extends: .lava-test:arm64
+  stage: panfrost
   variables:
 DEVICE_TYPE: rk3399-gru-kevin
 GPU_VERSION: panfrost-t860
@@ -99,6 +101,7 @@ panfrost-t860-gles2:arm64:
 
 panfrost-t860-gles3:arm64:
   extends: .lava-test:arm64
+  stage: panfrost
   variables:
 DEVICE_TYPE: rk3399-gru-kevin
 GPU_VERSION: panfrost-t860
@@ -113,6 +116,7 @@ panfrost-t860-gles3:arm64:
 
 .panfrost-t820-gles2:arm64:
   extends: .lava-test:arm64
+  stage: panfrost
   variables:
 DEVICE_TYPE: meson-gxm-khadas-vim2
 GPU_VERSION: panfrost-t820
@@ -124,6 +128,7 @@ panfrost-t860-gles3:arm64:
 .lima-mali400-test:armhf:
   parallel: 2
   extends: .lava-test:armhf
+  stage: misc-tests
   variables:
 DEVICE_TYPE: 

Mesa (master): gitlab-ci: Drop "test-" prefix from llvmpipe/softpipe job names

[GitLab Mirror]

Module: Mesa
Branch: master
Commit: 71436f9640647e21651ae24bb57db36968a24ba0
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=71436f9640647e21651ae24bb57db36968a24ba0

Author: Michel Dänzer 
Date:   Tue Mar  3 18:17:12 2020 +0100

gitlab-ci: Drop "test-" prefix from llvmpipe/softpipe job names

Redundant.

Reviewed-by: Pierre-Eric Pelloux-Prayer 
Reviewed-by: Eric Engestrom 
Part-of: 

---

 .gitlab-ci.yml | 14 +++---
 1 file changed, 7 insertions(+), 7 deletions(-)

diff --git a/.gitlab-ci.yml b/.gitlab-ci.yml
index 63d3539c62b..6ac82357d03 100644
--- a/.gitlab-ci.yml
+++ b/.gitlab-ci.yml
@@ -629,7 +629,7 @@ piglit-quick_shader:
   variables:
 DEQP_VER: vk
 
-test-llvmpipe-gles2:
+llvmpipe-gles2:
   variables:
 DEQP_VER: gles2
 DEQP_PARALLEL: 4
@@ -641,24 +641,24 @@ test-llvmpipe-gles2:
 LIBGL_ALWAYS_SOFTWARE: "true"
   extends: .deqp-test-gl
 
-test-softpipe-gles2:
-  extends: test-llvmpipe-gles2
+softpipe-gles2:
+  extends: llvmpipe-gles2
   variables:
 DEQP_EXPECTED_FAILS: deqp-softpipe-fails.txt
 DEQP_SKIPS: deqp-softpipe-skips.txt
 GALLIUM_DRIVER: "softpipe"
 
-test-softpipe-gles3:
+softpipe-gles3:
   parallel: 2
   variables:
 DEQP_VER: gles3
-  extends: test-softpipe-gles2
+  extends: softpipe-gles2
 
-test-softpipe-gles31:
+softpipe-gles31:
   parallel: 4
   variables:
 DEQP_VER: gles31
-  extends: test-softpipe-gles2
+  extends: softpipe-gles2
 
 arm64_a630_gles2:
   extends:

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