Mesa (master): ilo: fix scratch space setup in core
Module: Mesa
Branch: master
Commit: 4a7d18296a9e80d2c5458bf77f8eb88913433c90
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=4a7d18296a9e80d2c5458bf77f8eb88913433c90
Author: Chia-I Wu <olva...@gmail.com>
Date: Fri Oct 23 00:24:26 2015 +0800
ilo: fix scratch space setup in core
Move scratch_size out of ilo_state_shader_kernel_info and
ilo_state_compute_interface_info. A scratch space is shared by all
kernels/interfaces. Update builder to emit relocs for scratch bos.
---
.../drivers/ilo/core/ilo_builder_3d_bottom.h | 33 +--
src/gallium/drivers/ilo/core/ilo_builder_3d_top.h | 99
src/gallium/drivers/ilo/core/ilo_state_compute.c | 95 +--
src/gallium/drivers/ilo/core/ilo_state_compute.h | 12 ++-
src/gallium/drivers/ilo/core/ilo_state_shader.c| 74 ++-
src/gallium/drivers/ilo/core/ilo_state_shader.h| 43 -
src/gallium/drivers/ilo/core/ilo_state_shader_ps.c | 52 +-
src/gallium/drivers/ilo/ilo_render_gen6.c | 18 ++--
src/gallium/drivers/ilo/ilo_render_gen7.c | 28 +++---
src/gallium/drivers/ilo/ilo_render_gen8.c |2 +-
src/gallium/drivers/ilo/ilo_shader.c |4 +-
11 files changed, 327 insertions(+), 133 deletions(-)
diff --git a/src/gallium/drivers/ilo/core/ilo_builder_3d_bottom.h
b/src/gallium/drivers/ilo/core/ilo_builder_3d_bottom.h
index 5efe9da..2e9470e 100644
--- a/src/gallium/drivers/ilo/core/ilo_builder_3d_bottom.h
+++ b/src/gallium/drivers/ilo/core/ilo_builder_3d_bottom.h
@@ -202,14 +202,16 @@ static inline void
gen6_3DSTATE_WM(struct ilo_builder *builder,
const struct ilo_state_raster *rs,
const struct ilo_state_ps *ps,
-uint32_t kernel_offset)
+uint32_t kernel_offset,
+struct intel_bo *scratch_bo)
{
const uint8_t cmd_len = 9;
uint32_t *dw;
+ unsigned pos;
ILO_DEV_ASSERT(builder->dev, 6, 6);
- ilo_builder_batch_pointer(builder, cmd_len, );
+ pos = ilo_builder_batch_pointer(builder, cmd_len, );
dw[0] = GEN6_RENDER_CMD(3D, 3DSTATE_WM) | (cmd_len - 2);
dw[1] = kernel_offset;
@@ -221,6 +223,11 @@ gen6_3DSTATE_WM(struct ilo_builder *builder,
dw[6] = rs->wm[2] | ps->ps[4];
dw[7] = 0; /* kernel 1 */
dw[8] = 0; /* kernel 2 */
+
+ if (ilo_state_ps_get_scratch_size(ps)) {
+ ilo_builder_batch_reloc(builder, pos + 2, scratch_bo,
+ps->ps[0], 0);
+ }
}
static inline void
@@ -329,14 +336,16 @@ gen8_3DSTATE_WM_CHROMAKEY(struct ilo_builder *builder)
static inline void
gen7_3DSTATE_PS(struct ilo_builder *builder,
const struct ilo_state_ps *ps,
-uint32_t kernel_offset)
+uint32_t kernel_offset,
+struct intel_bo *scratch_bo)
{
const uint8_t cmd_len = 8;
uint32_t *dw;
+ unsigned pos;
ILO_DEV_ASSERT(builder->dev, 7, 7.5);
- ilo_builder_batch_pointer(builder, cmd_len, );
+ pos = ilo_builder_batch_pointer(builder, cmd_len, );
dw[0] = GEN7_RENDER_CMD(3D, 3DSTATE_PS) | (cmd_len - 2);
dw[1] = kernel_offset;
@@ -347,19 +356,26 @@ gen7_3DSTATE_PS(struct ilo_builder *builder,
dw[5] = ps->ps[5];
dw[6] = 0; /* kernel 1 */
dw[7] = 0; /* kernel 2 */
+
+ if (ilo_state_ps_get_scratch_size(ps)) {
+ ilo_builder_batch_reloc(builder, pos + 3, scratch_bo,
+ps->ps[3], 0);
+ }
}
static inline void
gen8_3DSTATE_PS(struct ilo_builder *builder,
const struct ilo_state_ps *ps,
-uint32_t kernel_offset)
+uint32_t kernel_offset,
+struct intel_bo *scratch_bo)
{
const uint8_t cmd_len = 12;
uint32_t *dw;
+ unsigned pos;
ILO_DEV_ASSERT(builder->dev, 8, 8);
- ilo_builder_batch_pointer(builder, cmd_len, );
+ pos = ilo_builder_batch_pointer(builder, cmd_len, );
dw[0] = GEN7_RENDER_CMD(3D, 3DSTATE_PS) | (cmd_len - 2);
dw[1] = kernel_offset;
@@ -374,6 +390,11 @@ gen8_3DSTATE_PS(struct ilo_builder *builder,
dw[9] = 0;
dw[10] = 0; /* kernel 2 */
dw[11] = 0;
+
+ if (ilo_state_ps_get_scratch_size(ps)) {
+ ilo_builder_batch_reloc64(builder, pos + 4, scratch_bo,
+ps->ps[1], 0);
+ }
}
static inline void
diff --git a/src/gallium/drivers/ilo/core/ilo_builder_3d_top.h
b/src/gallium/drivers/ilo/core/ilo_builder_3d_top.h
index 6e94fb2..3a44871 100644
--- a/src/gallium/drivers/ilo/core/ilo_builder_3d_top.h
+++ b/src/gallium/drivers/ilo/core/ilo_builder_3d_top.h
@@ -477,14 +477,16 @@ gen8_3DSTATE_INDEX_BUFFER(struct ilo_builder *builder,
static inline void
gen6_3DSTATE_VS(struct ilo_builder *builder,
const struct ilo_state_vs *vs,
-uint32_t kernel_offset)
+uint32_t kernel_offset,
+struct intel_bo *scratch_bo)
{
const uint8_t cmd_len = 6;
uint32_t *dw;
+ unsigned pos;
Mesa (master): ilo: add support for scratch spaces
Module: Mesa
Branch: master
Commit: 582ecb3b9132ff3690900e5426c982187d640c87
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=582ecb3b9132ff3690900e5426c982187d640c87
Author: Chia-I Wu <olva...@gmail.com>
Date: Fri Oct 23 00:45:49 2015 +0800
ilo: add support for scratch spaces
When a kernel reports a non-zero per-thread scratch space size, make sure the
hardware state is correctly set up, and a scratch bo is allocated.
---
src/gallium/drivers/ilo/ilo_draw.c |8
src/gallium/drivers/ilo/ilo_render.c | 39 +++
src/gallium/drivers/ilo/ilo_render.h |6 +++
src/gallium/drivers/ilo/ilo_render_gen.h |5 ++
src/gallium/drivers/ilo/ilo_render_gen6.c | 19 +---
src/gallium/drivers/ilo/ilo_render_gen7.c | 13 +++--
src/gallium/drivers/ilo/ilo_render_gen8.c |2 +-
src/gallium/drivers/ilo/ilo_shader.c | 50 ++--
src/gallium/drivers/ilo/ilo_shader.h |6 +++
.../drivers/ilo/shader/ilo_shader_internal.h |1 +
10 files changed, 133 insertions(+), 16 deletions(-)
diff --git a/src/gallium/drivers/ilo/ilo_draw.c
b/src/gallium/drivers/ilo/ilo_draw.c
index 433348d..69f36ae 100644
--- a/src/gallium/drivers/ilo/ilo_draw.c
+++ b/src/gallium/drivers/ilo/ilo_draw.c
@@ -547,6 +547,7 @@ static void
ilo_draw_vbo(struct pipe_context *pipe, const struct pipe_draw_info *info)
{
struct ilo_context *ilo = ilo_context(pipe);
+ int vs_scratch_size, gs_scratch_size, fs_scratch_size;
if (ilo_debug & ILO_DEBUG_DRAW) {
if (info->indexed) {
@@ -574,8 +575,15 @@ ilo_draw_vbo(struct pipe_context *pipe, const struct
pipe_draw_info *info)
ilo_finalize_3d_states(ilo, info);
+ /* upload kernels */
ilo_shader_cache_upload(ilo->shader_cache, >cp->builder);
+ /* prepare scratch spaces */
+ ilo_shader_cache_get_max_scratch_sizes(ilo->shader_cache,
+ _scratch_size, _scratch_size, _scratch_size);
+ ilo_render_prepare_scratch_spaces(ilo->render,
+ vs_scratch_size, gs_scratch_size, fs_scratch_size);
+
ilo_blit_resolve_framebuffer(ilo);
/* If draw_vbo ever fails, return immediately. */
diff --git a/src/gallium/drivers/ilo/ilo_render.c
b/src/gallium/drivers/ilo/ilo_render.c
index 21f75de..8bc04df 100644
--- a/src/gallium/drivers/ilo/ilo_render.c
+++ b/src/gallium/drivers/ilo/ilo_render.c
@@ -67,10 +67,49 @@ ilo_render_create(struct ilo_builder *builder)
void
ilo_render_destroy(struct ilo_render *render)
{
+ intel_bo_unref(render->vs_scratch.bo);
+ intel_bo_unref(render->gs_scratch.bo);
+ intel_bo_unref(render->fs_scratch.bo);
+
intel_bo_unref(render->workaround_bo);
FREE(render);
}
+static bool
+resize_scratch_space(struct ilo_render *render,
+ struct ilo_render_scratch_space *scratch,
+ const char *name, int new_size)
+{
+ struct intel_bo *bo;
+
+ if (scratch->size >= new_size)
+ return true;
+
+ bo = intel_winsys_alloc_bo(render->builder->winsys, name, new_size, false);
+ if (!bo)
+ return false;
+
+ intel_bo_unref(scratch->bo);
+ scratch->bo = bo;
+ scratch->size = new_size;
+
+ return true;
+}
+
+bool
+ilo_render_prepare_scratch_spaces(struct ilo_render *render,
+ int vs_scratch_size,
+ int gs_scratch_size,
+ int fs_scratch_size)
+{
+ return (resize_scratch_space(render, >vs_scratch,
+"vs scratch", vs_scratch_size) &&
+ resize_scratch_space(render, >gs_scratch,
+"gs scratch", gs_scratch_size) &&
+ resize_scratch_space(render, >fs_scratch,
+"fs scratch", fs_scratch_size));
+}
+
void
ilo_render_get_sample_position(const struct ilo_render *render,
unsigned sample_count,
diff --git a/src/gallium/drivers/ilo/ilo_render.h
b/src/gallium/drivers/ilo/ilo_render.h
index 098af73..31fd1e6 100644
--- a/src/gallium/drivers/ilo/ilo_render.h
+++ b/src/gallium/drivers/ilo/ilo_render.h
@@ -43,6 +43,12 @@ ilo_render_create(struct ilo_builder *builder);
void
ilo_render_destroy(struct ilo_render *render);
+bool
+ilo_render_prepare_scratch_spaces(struct ilo_render *render,
+ int vs_scratch_size,
+ int gs_scratch_size,
+ int fs_scratch_size);
+
void
ilo_render_get_sample_position(const struct ilo_render *render,
unsigned sample_count,
diff --git a/src/gallium/drivers/ilo/ilo_render_gen.h
b/src/gallium/drivers/ilo/ilo_render_gen.h
index 6b13375..f227d6b 100644
--- a/src/gallium/drivers/ilo/ilo_render_gen.h
+++ b/src/gallium/drivers/ilo/ilo_render_gen.h
@@ -51,6 +51,11 @@ struct ilo_render {
Mesa (master): ilo: fix max thread count for HS on Gen8
Module: Mesa Branch: master Commit: 0b6f6ee50f3b25c21dd8c9ca339d006141340666 URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=0b6f6ee50f3b25c21dd8c9ca339d006141340666 Author: Chia-I Wu <olva...@gmail.com> Date: Thu Oct 22 11:19:05 2015 +0800 ilo: fix max thread count for HS on Gen8 It is in DW2 on Gen8. --- src/gallium/drivers/ilo/core/ilo_state_shader.c |8 +--- 1 file changed, 5 insertions(+), 3 deletions(-) diff --git a/src/gallium/drivers/ilo/core/ilo_state_shader.c b/src/gallium/drivers/ilo/core/ilo_state_shader.c index f67326c..2e06b07 100644 --- a/src/gallium/drivers/ilo/core/ilo_state_shader.c +++ b/src/gallium/drivers/ilo/core/ilo_state_shader.c @@ -282,13 +282,15 @@ hs_set_gen7_3DSTATE_HS(struct ilo_state_hs *hs, dw1 = ff.sampler_count << GEN6_THREADDISP_SAMPLER_COUNT__SHIFT | ff.surface_count << GEN6_THREADDISP_BINDING_TABLE_SIZE__SHIFT; - if (ilo_dev_gen(dev) >= ILO_GEN(7.5)) + dw2 = 0 << GEN7_HS_DW2_INSTANCE_COUNT__SHIFT; + + if (ilo_dev_gen(dev) >= ILO_GEN(8)) + dw2 |= thread_count << GEN8_HS_DW2_MAX_THREADS__SHIFT; + else if (ilo_dev_gen(dev) >= ILO_GEN(7.5)) dw1 |= thread_count << GEN75_HS_DW1_DISPATCH_MAX_THREADS__SHIFT; else dw1 |= thread_count << GEN7_HS_DW1_DISPATCH_MAX_THREADS__SHIFT; - dw2 = 0 << GEN7_HS_DW2_INSTANCE_COUNT__SHIFT; - if (info->dispatch_enable) dw2 |= GEN7_HS_DW2_HS_ENABLE; if (info->stats_enable) ___ mesa-commit mailing list mesa-commit@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-commit
Mesa (master): ilo: make sure there is HiZ before resolving
Module: Mesa
Branch: master
Commit: 13a5805b646b19fd9c155d5c586ad1967d7d9e00
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=13a5805b646b19fd9c155d5c586ad1967d7d9e00
Author: Chia-I Wu <olva...@gmail.com>
Date: Thu Oct 22 11:29:17 2015 +0800
ilo: make sure there is HiZ before resolving
We do not want to perform a depth resolve on an MCS enabled surface.
---
src/gallium/drivers/ilo/ilo_blit.h |6 --
1 file changed, 4 insertions(+), 2 deletions(-)
diff --git a/src/gallium/drivers/ilo/ilo_blit.h
b/src/gallium/drivers/ilo/ilo_blit.h
index da0bfe9..bad4dab 100644
--- a/src/gallium/drivers/ilo/ilo_blit.h
+++ b/src/gallium/drivers/ilo/ilo_blit.h
@@ -58,10 +58,12 @@ ilo_blit_resolve_slices(struct ilo_context *ilo,
* As it is only used to resolve HiZ right now, return early when there is
* no HiZ.
*/
- if (!ilo_image_can_enable_aux(>image, level))
+ if (tex->image.aux.type != ILO_IMAGE_AUX_HIZ ||
+ !ilo_image_can_enable_aux(>image, level))
return;
- if (ilo_image_can_enable_aux(>image, level)) {
+ if (tex->image.aux.type == ILO_IMAGE_AUX_HIZ &&
+ ilo_image_can_enable_aux(>image, level)) {
ilo_blit_resolve_slices_for_hiz(ilo, res, level,
first_slice, num_slices, resolve_flags);
}
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Mesa (master): ilo: remove some unused kernel params
Module: Mesa
Branch: master
Commit: a445e0f7efcaa0ff21b5fe4faa3f73f3b73dcfe8
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=a445e0f7efcaa0ff21b5fe4faa3f73f3b73dcfe8
Author: Chia-I Wu <olva...@gmail.com>
Date: Fri Oct 16 09:50:12 2015 +0800
ilo: remove some unused kernel params
---
src/gallium/drivers/ilo/ilo_shader.c | 16
src/gallium/drivers/ilo/ilo_shader.h |6 --
2 files changed, 22 deletions(-)
diff --git a/src/gallium/drivers/ilo/ilo_shader.c
b/src/gallium/drivers/ilo/ilo_shader.c
index 1ba3edc..73b625e 100644
--- a/src/gallium/drivers/ilo/ilo_shader.c
+++ b/src/gallium/drivers/ilo/ilo_shader.c
@@ -1248,9 +1248,6 @@ ilo_shader_get_kernel_param(const struct ilo_shader_state
*shader,
case ILO_KERNEL_SAMPLER_COUNT:
val = shader->info.num_samplers;
break;
- case ILO_KERNEL_URB_DATA_START_REG:
- val = kernel->in.start_grf;
- break;
case ILO_KERNEL_SKIP_CBUF0_UPLOAD:
val = kernel->skip_cbuf0_upload;
break;
@@ -1302,9 +1299,6 @@ ilo_shader_get_kernel_param(const struct ilo_shader_state
*shader,
case ILO_KERNEL_VS_GEN6_SO:
val = kernel->stream_output;
break;
- case ILO_KERNEL_VS_GEN6_SO_START_REG:
- val = kernel->gs_start_grf;
- break;
case ILO_KERNEL_VS_GEN6_SO_POINT_OFFSET:
val = kernel->gs_offsets[0];
break;
@@ -1331,16 +1325,6 @@ ilo_shader_get_kernel_param(const struct
ilo_shader_state *shader,
val = kernel->bt.gen6_so_count;
break;
- case ILO_KERNEL_FS_INPUT_Z:
- case ILO_KERNEL_FS_INPUT_W:
- val = kernel->in.has_pos;
- break;
- case ILO_KERNEL_FS_OUTPUT_Z:
- val = kernel->out.has_pos;
- break;
- case ILO_KERNEL_FS_USE_KILL:
- val = kernel->has_kill;
- break;
case ILO_KERNEL_FS_BARYCENTRIC_INTERPOLATIONS:
val = kernel->in.barycentric_interpolation_mode;
break;
diff --git a/src/gallium/drivers/ilo/ilo_shader.h
b/src/gallium/drivers/ilo/ilo_shader.h
index afa1efa..01de541 100644
--- a/src/gallium/drivers/ilo/ilo_shader.h
+++ b/src/gallium/drivers/ilo/ilo_shader.h
@@ -36,7 +36,6 @@ enum ilo_kernel_param {
ILO_KERNEL_INPUT_COUNT,
ILO_KERNEL_OUTPUT_COUNT,
ILO_KERNEL_SAMPLER_COUNT,
- ILO_KERNEL_URB_DATA_START_REG,
ILO_KERNEL_SKIP_CBUF0_UPLOAD,
ILO_KERNEL_PCB_CBUF0_SIZE,
@@ -53,7 +52,6 @@ enum ilo_kernel_param {
ILO_KERNEL_VS_INPUT_EDGEFLAG,
ILO_KERNEL_VS_PCB_UCP_SIZE,
ILO_KERNEL_VS_GEN6_SO,
- ILO_KERNEL_VS_GEN6_SO_START_REG,
ILO_KERNEL_VS_GEN6_SO_POINT_OFFSET,
ILO_KERNEL_VS_GEN6_SO_LINE_OFFSET,
ILO_KERNEL_VS_GEN6_SO_TRI_OFFSET,
@@ -64,10 +62,6 @@ enum ilo_kernel_param {
ILO_KERNEL_GS_GEN6_SURFACE_SO_BASE,
ILO_KERNEL_GS_GEN6_SURFACE_SO_COUNT,
- ILO_KERNEL_FS_INPUT_Z,
- ILO_KERNEL_FS_INPUT_W,
- ILO_KERNEL_FS_OUTPUT_Z,
- ILO_KERNEL_FS_USE_KILL,
ILO_KERNEL_FS_BARYCENTRIC_INTERPOLATIONS,
ILO_KERNEL_FS_DISPATCH_16_OFFSET,
ILO_KERNEL_FS_SURFACE_RT_BASE,
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Mesa (master): ilo: remove u_memory.h inclusion from ilo_core.h
Module: Mesa Branch: master Commit: 3fe568e2a472b764e96b67cf57ef63f40cdce5a6 URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=3fe568e2a472b764e96b67cf57ef63f40cdce5a6 Author: Chia-I Wu <olva...@gmail.com> Date: Tue Oct 13 14:05:41 2015 +0800 ilo: remove u_memory.h inclusion from ilo_core.h We do not make allocations generally in the core. --- src/gallium/drivers/ilo/core/ilo_builder.c |2 ++ src/gallium/drivers/ilo/core/ilo_core.h|1 - src/gallium/drivers/ilo/ilo_common.h |1 + 3 files changed, 3 insertions(+), 1 deletion(-) diff --git a/src/gallium/drivers/ilo/core/ilo_builder.c b/src/gallium/drivers/ilo/core/ilo_builder.c index 4e05a3a..9d51951 100644 --- a/src/gallium/drivers/ilo/core/ilo_builder.c +++ b/src/gallium/drivers/ilo/core/ilo_builder.c @@ -25,6 +25,8 @@ * Chia-I Wu <o...@lunarg.com> */ +#include "util/u_memory.h" + #include "ilo_builder.h" #include "ilo_builder_render.h" /* for ilo_builder_batch_patch_sba() */ diff --git a/src/gallium/drivers/ilo/core/ilo_core.h b/src/gallium/drivers/ilo/core/ilo_core.h index da7db90..36d14b0 100644 --- a/src/gallium/drivers/ilo/core/ilo_core.h +++ b/src/gallium/drivers/ilo/core/ilo_core.h @@ -32,6 +32,5 @@ #include "util/u_debug.h" #include "util/u_math.h" -#include "util/u_memory.h" #endif /* ILO_CORE_H */ diff --git a/src/gallium/drivers/ilo/ilo_common.h b/src/gallium/drivers/ilo/ilo_common.h index 3dbe79f..d301659 100644 --- a/src/gallium/drivers/ilo/ilo_common.h +++ b/src/gallium/drivers/ilo/ilo_common.h @@ -34,6 +34,7 @@ #include "util/list.h" #include "util/u_format.h" #include "util/u_inlines.h" +#include "util/u_memory.h" #include "util/u_pointer.h" #include "core/ilo_core.h" ___ mesa-commit mailing list mesa-commit@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-commit
Mesa (master): ilo: set VME for 3DSTATE_PS
Module: Mesa Branch: master Commit: 86ccb2a16f6d21be29cd99d38831eab6079ce107 URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=86ccb2a16f6d21be29cd99d38831eab6079ce107 Author: Chia-I Wu <olva...@gmail.com> Date: Fri Oct 16 22:53:05 2015 +0800 ilo: set VME for 3DSTATE_PS When the bit is not set, we can see sampling artifacts on triangle edges when the mip filter is not GEN6_MIPFILTER_NONE. --- src/gallium/drivers/ilo/core/ilo_state_shader_ps.c |7 ++- 1 file changed, 6 insertions(+), 1 deletion(-) diff --git a/src/gallium/drivers/ilo/core/ilo_state_shader_ps.c b/src/gallium/drivers/ilo/core/ilo_state_shader_ps.c index f4d801e..ceeb68a 100644 --- a/src/gallium/drivers/ilo/core/ilo_state_shader_ps.c +++ b/src/gallium/drivers/ilo/core/ilo_state_shader_ps.c @@ -592,7 +592,12 @@ ps_set_gen8_3DSTATE_PS(struct ilo_state_ps *ps, ILO_DEV_ASSERT(dev, 8, 8); - dw3 = ff->sampler_count << GEN6_THREADDISP_SAMPLER_COUNT__SHIFT | + /* +* Set VME here for correct computation of LODs and others. Not sure why +* it is needed now. +*/ + dw3 = GEN6_THREADDISP_VME | + ff->sampler_count << GEN6_THREADDISP_SAMPLER_COUNT__SHIFT | ff->surface_count << GEN6_THREADDISP_BINDING_TABLE_SIZE__SHIFT; if (false) ___ mesa-commit mailing list mesa-commit@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-commit
Mesa (master): ilo: remove unused ilo_shader_get_type()
Module: Mesa
Branch: master
Commit: 6e132f4730a41baa36bf31c1b5f47933d07cee8c
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=6e132f4730a41baa36bf31c1b5f47933d07cee8c
Author: Chia-I Wu <olva...@gmail.com>
Date: Fri Oct 16 09:46:25 2015 +0800
ilo: remove unused ilo_shader_get_type()
---
src/gallium/drivers/ilo/ilo_shader.c |9 -
src/gallium/drivers/ilo/ilo_shader.h |3 ---
2 files changed, 12 deletions(-)
diff --git a/src/gallium/drivers/ilo/ilo_shader.c
b/src/gallium/drivers/ilo/ilo_shader.c
index 5f2b010..1ba3edc 100644
--- a/src/gallium/drivers/ilo/ilo_shader.c
+++ b/src/gallium/drivers/ilo/ilo_shader.c
@@ -987,15 +987,6 @@ ilo_shader_destroy(struct ilo_shader_state *shader)
}
/**
- * Return the type (PIPE_SHADER_x) of the shader.
- */
-int
-ilo_shader_get_type(const struct ilo_shader_state *shader)
-{
- return shader->info.type;
-}
-
-/**
* Select a kernel for the given context. This will compile a new kernel if
* none of the existing kernels work with the context.
*
diff --git a/src/gallium/drivers/ilo/ilo_shader.h
b/src/gallium/drivers/ilo/ilo_shader.h
index d9f02a4..afa1efa 100644
--- a/src/gallium/drivers/ilo/ilo_shader.h
+++ b/src/gallium/drivers/ilo/ilo_shader.h
@@ -149,9 +149,6 @@ ilo_shader_create_cs(const struct ilo_dev *dev,
void
ilo_shader_destroy(struct ilo_shader_state *shader);
-int
-ilo_shader_get_type(const struct ilo_shader_state *shader);
-
bool
ilo_shader_select_kernel(struct ilo_shader_state *shader,
const struct ilo_state_vector *vec,
___
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Mesa (master): ilo: remove u_debug.h inclusion from ilo_core.h
Module: Mesa Branch: master Commit: 29a0f7479dd09ca60bed084fd6e5f736a6340cb5 URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=29a0f7479dd09ca60bed084fd6e5f736a6340cb5 Author: Chia-I Wu <olva...@gmail.com> Date: Tue Oct 13 14:09:24 2015 +0800 ilo: remove u_debug.h inclusion from ilo_core.h Move it to ilo_debug.h. --- src/gallium/drivers/ilo/core/ilo_core.h |1 - src/gallium/drivers/ilo/core/ilo_debug.h |2 ++ 2 files changed, 2 insertions(+), 1 deletion(-) diff --git a/src/gallium/drivers/ilo/core/ilo_core.h b/src/gallium/drivers/ilo/core/ilo_core.h index 36d14b0..cbc568c 100644 --- a/src/gallium/drivers/ilo/core/ilo_core.h +++ b/src/gallium/drivers/ilo/core/ilo_core.h @@ -30,7 +30,6 @@ #include "pipe/p_compiler.h" -#include "util/u_debug.h" #include "util/u_math.h" #endif /* ILO_CORE_H */ diff --git a/src/gallium/drivers/ilo/core/ilo_debug.h b/src/gallium/drivers/ilo/core/ilo_debug.h index 9833233..532a2aa 100644 --- a/src/gallium/drivers/ilo/core/ilo_debug.h +++ b/src/gallium/drivers/ilo/core/ilo_debug.h @@ -28,6 +28,8 @@ #ifndef ILO_DEBUG_H #define ILO_DEBUG_H +#include "util/u_debug.h" + #include "ilo_core.h" /* enable debug flags affecting hot pathes only with debug builds */ ___ mesa-commit mailing list mesa-commit@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-commit
Mesa (master): ilo: ignore prefer_linear_threshold when zero
Module: Mesa
Branch: master
Commit: d04126a773f8a70ff6ae549751dc674133ea26b0
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=d04126a773f8a70ff6ae549751dc674133ea26b0
Author: Chia-I Wu <olva...@gmail.com>
Date: Fri Oct 16 16:19:30 2015 +0800
ilo: ignore prefer_linear_threshold when zero
This was the intended behavior but it did not work as intended until now.
---
src/gallium/drivers/ilo/core/ilo_image.c |4 ++--
src/gallium/drivers/ilo/core/ilo_image.h |2 +-
2 files changed, 3 insertions(+), 3 deletions(-)
diff --git a/src/gallium/drivers/ilo/core/ilo_image.c
b/src/gallium/drivers/ilo/core/ilo_image.c
index fa547ac..6eefc8f 100644
--- a/src/gallium/drivers/ilo/core/ilo_image.c
+++ b/src/gallium/drivers/ilo/core/ilo_image.c
@@ -286,8 +286,8 @@ image_get_gen6_tiling(const struct ilo_dev *dev,
info->bind_surface_dp_typed))
return GEN6_TILING_NONE;
- if (estimated_size <= 64 ||
- estimated_size > info->prefer_linear_threshold)
+ if (estimated_size <= 64 || (info->prefer_linear_threshold &&
+ estimated_size > info->prefer_linear_threshold))
return GEN6_TILING_NONE;
if (estimated_size <= 2048)
diff --git a/src/gallium/drivers/ilo/core/ilo_image.h
b/src/gallium/drivers/ilo/core/ilo_image.h
index 646ed6f..546e0ff 100644
--- a/src/gallium/drivers/ilo/core/ilo_image.h
+++ b/src/gallium/drivers/ilo/core/ilo_image.h
@@ -102,7 +102,7 @@ struct ilo_image_info {
/*
* prefer GEN6_TILING_NONE when the (estimated) image size exceeds the
-* threshold
+* threshold; ignored when zero
*/
uint32_t prefer_linear_threshold;
___
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Mesa (master): ilo: improve Gen8 defines based on its PRMs
Module: Mesa Branch: master Commit: c8083b1adc79073c0d6fc3bb87d6a18e41c779c4 URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=c8083b1adc79073c0d6fc3bb87d6a18e41c779c4 Author: Chia-I Wu <olva...@gmail.com> Date: Thu Oct 8 16:51:50 2015 +0800 ilo: improve Gen8 defines based on its PRMs --- src/gallium/drivers/ilo/core/ilo_state_cc.c| 12 +- src/gallium/drivers/ilo/core/ilo_state_raster.c| 14 +- src/gallium/drivers/ilo/core/ilo_state_sbe.c | 12 +- src/gallium/drivers/ilo/core/ilo_state_surface.c |4 - src/gallium/drivers/ilo/core/ilo_state_vf.c|8 +- src/gallium/drivers/ilo/genhw/gen_eu_message.xml.h |3 + src/gallium/drivers/ilo/genhw/gen_mi.xml.h | 96 ++- src/gallium/drivers/ilo/genhw/gen_regs.xml.h | 17 +- src/gallium/drivers/ilo/genhw/gen_render.xml.h | 16 ++ src/gallium/drivers/ilo/genhw/gen_render_3d.xml.h | 278 +++- .../drivers/ilo/genhw/gen_render_dynamic.xml.h | 18 +- .../drivers/ilo/genhw/gen_render_media.xml.h |6 +- .../drivers/ilo/genhw/gen_render_surface.xml.h | 36 ++- 13 files changed, 399 insertions(+), 121 deletions(-) Diff: http://cgit.freedesktop.org/mesa/mesa/diff/?id=c8083b1adc79073c0d6fc3bb87d6a18e41c779c4 ___ mesa-commit mailing list mesa-commit@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-commit
Mesa (master): ilo: add image_get_gen{6,7}_alignment()
Module: Mesa
Branch: master
Commit: f1946546c7d4ac22799a8b4944d6c36b77e22626
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=f1946546c7d4ac22799a8b4944d6c36b77e22626
Author: Chia-I Wu olva...@gmail.com
Date: Mon Jun 29 16:16:11 2015 +0800
ilo: add image_get_gen{6,7}_alignment()
They replace img_init_alignments().
---
src/gallium/drivers/ilo/core/ilo_image.c | 336 --
1 file changed, 177 insertions(+), 159 deletions(-)
diff --git a/src/gallium/drivers/ilo/core/ilo_image.c
b/src/gallium/drivers/ilo/core/ilo_image.c
index c22c119..d28cb07 100644
--- a/src/gallium/drivers/ilo/core/ilo_image.c
+++ b/src/gallium/drivers/ilo/core/ilo_image.c
@@ -57,6 +57,9 @@ struct ilo_image_layout {
enum gen_surface_tiling tiling;
enum ilo_image_aux_type aux;
+
+ int align_i;
+ int align_j;
};
static enum ilo_image_walk_type
@@ -382,6 +385,154 @@ image_get_gen7_mcs_enable(const struct ilo_dev *dev,
}
}
+static void
+image_get_gen6_alignments(const struct ilo_dev *dev,
+ const struct ilo_image_info *info,
+ int *align_i, int *align_j)
+{
+ ILO_DEV_ASSERT(dev, 6, 6);
+
+ /*
+* From the Sandy Bridge PRM, volume 1 part 1, page 113:
+*
+* surface format align_i align_j
+* YUV 4:2:2 formats4 *see below
+* BC1-54 4
+* FXT1 8 4
+* all other formats4 *see below
+*
+* - align_j = 4 for any depth buffer
+* - align_j = 2 for separate stencil buffer
+* - align_j = 4 for any render target surface is multisampled (4x)
+* - align_j = 4 for any render target surface with Surface Vertical
+*Alignment = VALIGN_4
+* - align_j = 2 for any render target surface with Surface Vertical
+*Alignment = VALIGN_2
+* - align_j = 2 for all other render target surface
+* - align_j = 2 for any sampling engine surface with Surface Vertical
+*Alignment = VALIGN_2
+* - align_j = 4 for any sampling engine surface with Surface Vertical
+*Alignment = VALIGN_4
+*
+* From the Sandy Bridge PRM, volume 4 part 1, page 86:
+*
+* This field (Surface Vertical Alignment) must be set to VALIGN_2 if
+* the Surface Format is 96 bits per element (BPE).
+*
+* They can be rephrased as
+*
+* align_ialign_j
+* compressed formats block widthblock height
+* GEN6_FORMAT_R8_UINT4 2
+* other depth/stencil formats4 4
+* 4x multisampled4 4
+* bpp 96 4 2
+* others 4 2 or 4
+*/
+
+ *align_i = (info-compressed) ? info-block_width : 4;
+ if (info-compressed) {
+ *align_j = info-block_height;
+ } else if (info-bind_zs) {
+ *align_j = (info-format == GEN6_FORMAT_R8_UINT) ? 2 : 4;
+ } else {
+ *align_j = (info-sample_count 1 || info-block_size != 12) ? 4 : 2;
+ }
+}
+
+static void
+image_get_gen7_alignments(const struct ilo_dev *dev,
+ const struct ilo_image_info *info,
+ enum gen_surface_tiling tiling,
+ int *align_i, int *align_j)
+{
+ int i, j;
+
+ ILO_DEV_ASSERT(dev, 7, 8);
+
+ /*
+* From the Ivy Bridge PRM, volume 1 part 1, page 110:
+*
+* surface defined by surface format align_i align_j
+* 3DSTATE_DEPTH_BUFFERD16_UNORM 8 4
+* not D16_UNORM 4 4
+* 3DSTATE_STENCIL_BUFFER N/A8 8
+* SURFACE_STATE BC*, ETC*, EAC*4 4
+* FXT1 8 4
+* all others (set by SURFACE_STATE)
+*
+* From the Ivy Bridge PRM, volume 4 part 1, page 63:
+*
+* - This field (Surface Vertical Aligment) is intended to be set to
+*VALIGN_4 if the surface was rendered as a depth buffer, for a
+*multisampled (4x) render target, or for a multisampled (8x)
+*render target, since these surfaces support only alignment of 4.
+* - Use of VALIGN_4 for other surfaces is supported, but uses more
+*memory.
+* - This field must be set to VALIGN_4 for all tiled Y Render Target
+*surfaces.
+* - Value of 1 is not supported for format YCRCB_NORMAL (0x182),
+*YCRCB_SWAPUVY (0x183), YCRCB_SWAPUV (0x18f), YCRCB_SWAPY (0x190)
+* - If Number of Multisamples is not MULTISAMPLECOUNT_1, this field
+*must be set to VALIGN_4.
+* - VALIGN_4
Mesa (master): ilo: add image_set_gen6_bo_size()
Module: Mesa
Branch: master
Commit: 3c6af396f9526bdc8351ff61bcc6c42a3892e6b8
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=3c6af396f9526bdc8351ff61bcc6c42a3892e6b8
Author: Chia-I Wu olva...@gmail.com
Date: Mon Jun 29 16:46:34 2015 +0800
ilo: add image_set_gen6_bo_size()
It replaces img_calculate_bo_size().
---
src/gallium/drivers/ilo/core/ilo_image.c | 191 --
src/gallium/drivers/ilo/core/ilo_image.h |8 +-
src/gallium/drivers/ilo/ilo_resource.c |8 ++
3 files changed, 89 insertions(+), 118 deletions(-)
diff --git a/src/gallium/drivers/ilo/core/ilo_image.c
b/src/gallium/drivers/ilo/core/ilo_image.c
index 4b53233..ec5ae04 100644
--- a/src/gallium/drivers/ilo/core/ilo_image.c
+++ b/src/gallium/drivers/ilo/core/ilo_image.c
@@ -43,7 +43,6 @@ enum {
struct ilo_image_params {
const struct ilo_dev *dev;
const struct ilo_image_info *info;
- unsigned valid_tilings;
unsigned h0, h1;
unsigned max_x, max_y;
@@ -295,7 +294,8 @@ image_get_gen6_tiling(const struct ilo_dev *dev,
info-bind_surface_dp_typed))
return GEN6_TILING_NONE;
- if (estimated_size = 64)
+ if (estimated_size = 64 ||
+ estimated_size info-prefer_linear_threshold)
return GEN6_TILING_NONE;
if (estimated_size = 2048)
@@ -987,114 +987,87 @@ img_init_size_and_format(struct ilo_image *img,
img-sample_count = info-sample_count;
}
-/* note that this may force the texture to be linear */
-static void
-img_calculate_bo_size(struct ilo_image *img,
- const struct ilo_image_params *params)
+static bool
+image_set_gen6_bo_size(struct ilo_image *img,
+ const struct ilo_dev *dev,
+ const struct ilo_image_info *info,
+ const struct ilo_image_layout *layout)
{
- assert(params-max_x % img-block_width == 0);
- assert(params-max_y % img-block_height == 0);
- assert(img-walk_layer_height % img-block_height == 0);
+ int stride, height;
+ int align_w, align_h;
- img-bo_stride =
- (params-max_x / img-block_width) * img-block_size;
- img-bo_height = params-max_y / img-block_height;
+ ILO_DEV_ASSERT(dev, 6, 8);
- while (true) {
- unsigned w = img-bo_stride, h = img-bo_height;
- unsigned align_w, align_h;
+ stride = (layout-monolithic_width / info-block_width) * info-block_size;
+ height = layout-monolithic_height / info-block_height;
- /*
- * From the Haswell PRM, volume 5, page 163:
- *
- * For linear surfaces, additional padding of 64 bytes is required
- * at the bottom of the surface. This is in addition to the padding
- * required above.
- */
- if (ilo_dev_gen(params-dev) = ILO_GEN(7.5)
- params-info-bind_surface_sampler
- img-tiling == GEN6_TILING_NONE)
- h += (64 + img-bo_stride - 1) / img-bo_stride;
+ /*
+* From the Haswell PRM, volume 5, page 163:
+*
+* For linear surfaces, additional padding of 64 bytes is required
+* at the bottom of the surface. This is in addition to the padding
+* required above.
+*/
+ if (ilo_dev_gen(dev) = ILO_GEN(7.5) info-bind_surface_sampler
+ layout-tiling == GEN6_TILING_NONE)
+ height += (64 + stride - 1) / stride;
+ /*
+* From the Sandy Bridge PRM, volume 4 part 1, page 81:
+*
+* - For linear render target surfaces, the pitch must be a multiple
+*of the element size for non-YUV surface formats. Pitch must be a
+*multiple of 2 * element size for YUV surface formats.
+*
+* - For other linear surfaces, the pitch can be any multiple of
+*bytes.
+* - For tiled surfaces, the pitch must be a multiple of the tile
+*width.
+*
+* Different requirements may exist when the image is used in different
+* places, but our alignments here should be good enough that we do not
+* need to check info-bind_x.
+*/
+ switch (layout-tiling) {
+ case GEN6_TILING_X:
+ align_w = 512;
+ align_h = 8;
+ break;
+ case GEN6_TILING_Y:
+ align_w = 128;
+ align_h = 32;
+ break;
+ case GEN8_TILING_W:
/*
- * From the Sandy Bridge PRM, volume 4 part 1, page 81:
+ * From the Sandy Bridge PRM, volume 1 part 2, page 22:
*
- * - For linear render target surfaces, the pitch must be a
- *multiple of the element size for non-YUV surface formats.
- *Pitch must be a multiple of 2 * element size for YUV surface
- *formats.
- * - For other linear surfaces, the pitch can be any multiple of
- *bytes.
- * - For tiled surfaces, the pitch must be a multiple of the tile
- *width.
- *
- * Different requirements may exist when the bo is used in different
- * places
Mesa (master): ilo: add image_get_gen6_{hiz,mcs}_enable()
Module: Mesa
Branch: master
Commit: c88e6cdfbfd7a7727dbae6b47a803b18aca5d9f4
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=c88e6cdfbfd7a7727dbae6b47a803b18aca5d9f4
Author: Chia-I Wu olva...@gmail.com
Date: Mon Jun 29 16:14:36 2015 +0800
ilo: add image_get_gen6_{hiz,mcs}_enable()
They replace img_init_aux().
---
src/gallium/drivers/ilo/core/ilo_image.c | 198 +++---
1 file changed, 97 insertions(+), 101 deletions(-)
diff --git a/src/gallium/drivers/ilo/core/ilo_image.c
b/src/gallium/drivers/ilo/core/ilo_image.c
index 84001d8..c22c119 100644
--- a/src/gallium/drivers/ilo/core/ilo_image.c
+++ b/src/gallium/drivers/ilo/core/ilo_image.c
@@ -55,6 +55,8 @@ struct ilo_image_layout {
uint8_t valid_tilings;
enum gen_surface_tiling tiling;
+
+ enum ilo_image_aux_type aux;
};
static enum ilo_image_walk_type
@@ -296,6 +298,91 @@ image_get_gen6_tiling(const struct ilo_dev *dev,
}
static bool
+image_get_gen6_hiz_enable(const struct ilo_dev *dev,
+ const struct ilo_image_info *info)
+{
+ ILO_DEV_ASSERT(dev, 6, 8);
+
+ /* depth buffer? */
+ if (!info-bind_zs ||
+ info-format == GEN6_FORMAT_R8_UINT ||
+ info-interleaved_stencil)
+ return false;
+
+ /* we want to be able to force 8x4 alignments */
+ if (info-type == GEN6_SURFTYPE_1D)
+ return false;
+
+ if (info-aux_disable)
+ return false;
+
+ if (ilo_debug ILO_DEBUG_NOHIZ)
+ return false;
+
+ return true;
+}
+
+static bool
+image_get_gen7_mcs_enable(const struct ilo_dev *dev,
+ const struct ilo_image_info *info,
+ enum gen_surface_tiling tiling)
+{
+ ILO_DEV_ASSERT(dev, 7, 8);
+
+ if (!info-bind_surface_sampler !info-bind_surface_dp_render)
+ return false;
+
+ /*
+* From the Ivy Bridge PRM, volume 4 part 1, page 77:
+*
+* For Render Target and Sampling Engine Surfaces:If the surface is
+* multisampled (Number of Multisamples any value other than
+* MULTISAMPLECOUNT_1), this field (MCS Enable) must be enabled.
+*
+* This field must be set to 0 for all SINT MSRTs when all RT channels
+* are not written
+*/
+ if (info-sample_count 1) {
+ if (ilo_dev_gen(dev) ILO_GEN(8))
+ assert(!info-is_integer);
+ return true;
+ }
+
+ if (info-aux_disable)
+ return false;
+
+ /*
+* From the Ivy Bridge PRM, volume 2 part 1, page 326:
+*
+* When MCS is buffer is used for color clear of non-multisampler
+* render target, the following restrictions apply.
+* - Support is limited to tiled render targets.
+* - Support is for non-mip-mapped and non-array surface types only.
+* - Clear is supported only on the full RT; i.e., no partial clear or
+*overlapping clears.
+* - MCS buffer for non-MSRT is supported only for RT formats 32bpp,
+*64bpp and 128bpp.
+* ...
+*
+* How about SURFTYPE_3D?
+*/
+ if (!info-bind_surface_dp_render ||
+ tiling == GEN6_TILING_NONE ||
+ info-level_count 1 ||
+ info-array_size 1)
+ return false;
+
+ switch (info-block_size) {
+ case 4:
+ case 8:
+ case 16:
+ return true;
+ default:
+ return false;
+ }
+}
+
+static bool
image_get_gen6_layout(const struct ilo_dev *dev,
const struct ilo_image_info *info,
struct ilo_image_layout *layout)
@@ -316,6 +403,14 @@ image_get_gen6_layout(const struct ilo_dev *dev,
layout-tiling = image_get_gen6_tiling(dev, info, layout-valid_tilings);
+ if (image_get_gen6_hiz_enable(dev, info))
+ layout-aux = ILO_IMAGE_AUX_HIZ;
+ else if (ilo_dev_gen(dev) = ILO_GEN(7)
+image_get_gen7_mcs_enable(dev, info, layout-tiling))
+ layout-aux = ILO_IMAGE_AUX_MCS;
+ else
+ layout-aux = ILO_IMAGE_AUX_NONE;
+
return true;
}
@@ -755,106 +850,6 @@ img_init_size_and_format(struct ilo_image *img,
img-sample_count = info-sample_count;
}
-static bool
-img_want_mcs(const struct ilo_image *img,
- const struct ilo_image_params *params)
-{
- const struct ilo_image_info *info = params-info;
- bool want_mcs = false;
-
- /* MCS is for RT on GEN7+ */
- if (ilo_dev_gen(params-dev) ILO_GEN(7))
- return false;
-
- if (info-type != GEN6_SURFTYPE_2D || !info-bind_surface_dp_render)
- return false;
-
- /*
-* From the Ivy Bridge PRM, volume 4 part 1, page 77:
-*
-* For Render Target and Sampling Engine Surfaces:If the surface is
-* multisampled (Number of Multisamples any value other than
-* MULTISAMPLECOUNT_1), this field (MCS Enable) must be enabled.
-*
-* This field must be set to 0 for all SINT MSRTs when all RT channels
-* are not written
-*/
- if (info-sample_count 1 !info-is_integer) {
- want_mcs = true;
- } else if (info
Mesa (master): ilo: add image_set_gen6_{hiz,mcs}
Module: Mesa
Branch: master
Commit: 0896d629fded96178daa79c393ba4dae0d56f2ff
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=0896d629fded96178daa79c393ba4dae0d56f2ff
Author: Chia-I Wu olva...@gmail.com
Date: Mon Jun 29 16:42:04 2015 +0800
ilo: add image_set_gen6_{hiz,mcs}
They replace img_calculate_{hiz,mcs}_size().
---
src/gallium/drivers/ilo/core/ilo_image.c | 110 +-
1 file changed, 61 insertions(+), 49 deletions(-)
diff --git a/src/gallium/drivers/ilo/core/ilo_image.c
b/src/gallium/drivers/ilo/core/ilo_image.c
index 535407f..4b53233 100644
--- a/src/gallium/drivers/ilo/core/ilo_image.c
+++ b/src/gallium/drivers/ilo/core/ilo_image.c
@@ -1097,20 +1097,24 @@ img_calculate_bo_size(struct ilo_image *img,
}
}
-static void
-img_calculate_hiz_size(struct ilo_image *img,
- const struct ilo_image_params *params)
+static bool
+image_set_gen6_hiz(struct ilo_image *img,
+ const struct ilo_dev *dev,
+ const struct ilo_image_info *info,
+ const struct ilo_image_layout *layout)
{
- const struct ilo_image_info *info = params-info;
- const unsigned hz_align_j = 8;
+ const int hz_align_j = 8;
enum ilo_image_walk_type hz_walk;
- unsigned hz_width, hz_height, lv;
- unsigned hz_clear_w, hz_clear_h;
+ int hz_width, hz_height;
+ int hz_clear_w, hz_clear_h;
+ uint8_t lv;
+
+ ILO_DEV_ASSERT(dev, 6, 8);
- assert(img-aux.type == ILO_IMAGE_AUX_HIZ);
+ assert(layout-aux == ILO_IMAGE_AUX_HIZ);
- assert(img-walk == ILO_IMAGE_WALK_LAYER ||
- img-walk == ILO_IMAGE_WALK_3D);
+ assert(layout-walk == ILO_IMAGE_WALK_LAYER ||
+ layout-walk == ILO_IMAGE_WALK_3D);
/*
* From the Sandy Bridge PRM, volume 2 part 1, page 312:
@@ -1123,8 +1127,8 @@ img_calculate_hiz_size(struct ilo_image *img,
*
* We will put all LODs in a single bo with ILO_IMAGE_WALK_LOD.
*/
- if (ilo_dev_gen(params-dev) = ILO_GEN(7))
- hz_walk = img-walk;
+ if (ilo_dev_gen(dev) = ILO_GEN(7))
+ hz_walk = layout-walk;
else
hz_walk = ILO_IMAGE_WALK_LOD;
@@ -1138,16 +1142,16 @@ img_calculate_hiz_size(struct ilo_image *img,
switch (hz_walk) {
case ILO_IMAGE_WALK_LAYER:
{
- const unsigned h0 = align(params-h0, hz_align_j);
- const unsigned h1 = align(params-h1, hz_align_j);
- const unsigned htail =
-((ilo_dev_gen(params-dev) = ILO_GEN(7)) ? 12 : 11) * hz_align_j;
- const unsigned hz_qpitch = h0 + h1 + htail;
+ const int h0 = align(layout-walk_layer_h0, hz_align_j);
+ const int h1 = align(layout-walk_layer_h1, hz_align_j);
+ const int htail =
+((ilo_dev_gen(dev) = ILO_GEN(7)) ? 12 : 11) * hz_align_j;
+ const int hz_qpitch = h0 + h1 + htail;
- hz_width = align(img-lods[0].slice_width, 16);
+ hz_width = align(layout-lods[0].slice_width, 16);
hz_height = hz_qpitch * info-array_size / 2;
- if (ilo_dev_gen(params-dev) = ILO_GEN(7))
+ if (ilo_dev_gen(dev) = ILO_GEN(7))
hz_height = align(hz_height, 8);
img-aux.walk_layer_height = hz_qpitch;
@@ -1155,9 +1159,9 @@ img_calculate_hiz_size(struct ilo_image *img,
break;
case ILO_IMAGE_WALK_LOD:
{
- unsigned lod_tx[ILO_IMAGE_MAX_LEVEL_COUNT];
- unsigned lod_ty[ILO_IMAGE_MAX_LEVEL_COUNT];
- unsigned cur_tx, cur_ty;
+ int lod_tx[ILO_IMAGE_MAX_LEVEL_COUNT];
+ int lod_ty[ILO_IMAGE_MAX_LEVEL_COUNT];
+ int cur_tx, cur_ty;
/* figure out the tile offsets of LODs */
hz_width = 0;
@@ -1165,17 +1169,17 @@ img_calculate_hiz_size(struct ilo_image *img,
cur_tx = 0;
cur_ty = 0;
for (lv = 0; lv info-level_count; lv++) {
-unsigned tw, th;
+int tw, th;
lod_tx[lv] = cur_tx;
lod_ty[lv] = cur_ty;
-tw = align(img-lods[lv].slice_width, 16);
-th = align(img-lods[lv].slice_height, hz_align_j) *
+tw = align(layout-lods[lv].slice_width, 16);
+th = align(layout-lods[lv].slice_height, hz_align_j) *
info-array_size / 2;
/* convert to Y-tiles */
-tw = align(tw, 128) / 128;
-th = align(th, 32) / 32;
+tw = (tw + 127) / 128;
+th = (th + 31) / 32;
if (hz_width cur_tx + tw)
hz_width = cur_tx + tw;
@@ -1193,16 +1197,17 @@ img_calculate_hiz_size(struct ilo_image *img,
img-aux.walk_lod_offsets[lv] =
(lod_ty[lv] * hz_width + lod_tx[lv]) * 4096;
}
+
hz_width *= 128;
hz_height *= 32;
}
break;
case ILO_IMAGE_WALK_3D:
- hz_width = align(img-lods[0].slice_width, 16);
+ hz_width = align(layout-lods[0].slice_width, 16);
hz_height = 0;
for (lv = 0; lv info
Mesa (master): ilo: add image_get_gen6_monolithic_size()
Module: Mesa
Branch: master
Commit: 0da3b732ad156f63e32e7520bc1af97e1b733be7
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=0da3b732ad156f63e32e7520bc1af97e1b733be7
Author: Chia-I Wu olva...@gmail.com
Date: Mon Jun 29 16:38:49 2015 +0800
ilo: add image_get_gen6_monolithic_size()
It replaces img_align().
---
src/gallium/drivers/ilo/core/ilo_image.c | 134 +++---
1 file changed, 67 insertions(+), 67 deletions(-)
diff --git a/src/gallium/drivers/ilo/core/ilo_image.c
b/src/gallium/drivers/ilo/core/ilo_image.c
index c2a8487..535407f 100644
--- a/src/gallium/drivers/ilo/core/ilo_image.c
+++ b/src/gallium/drivers/ilo/core/ilo_image.c
@@ -765,6 +765,72 @@ image_get_gen6_walk_layer_heights(const struct ilo_dev
*dev,
}
static void
+image_get_gen6_monolithic_size(const struct ilo_dev *dev,
+ const struct ilo_image_info *info,
+ struct ilo_image_layout *layout,
+ int max_x, int max_y)
+{
+ int align_w = 1, align_h = 1, pad_h = 0;
+
+ ILO_DEV_ASSERT(dev, 6, 8);
+
+ /*
+* From the Sandy Bridge PRM, volume 1 part 1, page 118:
+*
+* To determine the necessary padding on the bottom and right side of
+* the surface, refer to the table in Section 7.18.3.4 for the i and j
+* parameters for the surface format in use. The surface must then be
+* extended to the next multiple of the alignment unit size in each
+* dimension, and all texels contained in this extended surface must
+* have valid GTT entries.
+*
+* For cube surfaces, an additional two rows of padding are required
+* at the bottom of the surface. This must be ensured regardless of
+* whether the surface is stored tiled or linear. This is due to the
+* potential rotation of cache line orientation from memory to cache.
+*
+* For compressed textures (BC* and FXT1 surface formats), padding at
+* the bottom of the surface is to an even compressed row, which is
+* equal to a multiple of 8 uncompressed texel rows. Thus, for padding
+* purposes, these surfaces behave as if j = 8 only for surface
+* padding purposes. The value of 4 for j still applies for mip level
+* alignment and QPitch calculation.
+*/
+ if (info-bind_surface_sampler) {
+ align_w = MAX2(align_w, layout-align_i);
+ align_h = MAX2(align_h, layout-align_j);
+
+ if (info-type == GEN6_SURFTYPE_CUBE)
+ pad_h += 2;
+
+ if (info-compressed)
+ align_h = MAX2(align_h, layout-align_j * 2);
+ }
+
+ /*
+* From the Sandy Bridge PRM, volume 1 part 1, page 118:
+*
+* If the surface contains an odd number of rows of data, a final row
+* below the surface must be allocated.
+*/
+ if (info-bind_surface_dp_render)
+ align_h = MAX2(align_h, 2);
+
+ /*
+* Depth Buffer Clear/Resolve works in 8x4 sample blocks. Pad to allow HiZ
+* for unaligned non-mipmapped and non-array images.
+*/
+ if (layout-aux == ILO_IMAGE_AUX_HIZ
+ info-level_count == 1 info-array_size == 1 info-depth == 1) {
+ align_w = MAX2(align_w, 8);
+ align_h = MAX2(align_h, 4);
+ }
+
+ layout-monolithic_width = align(max_x, align_w);
+ layout-monolithic_height = align(max_y + pad_h, align_h);
+}
+
+static void
image_get_gen6_lods(const struct ilo_dev *dev,
const struct ilo_image_info *info,
struct ilo_image_layout *layout)
@@ -852,8 +918,7 @@ image_get_gen6_lods(const struct ilo_dev *dev,
layout-walk_layer_height = 0;
}
- layout-monolithic_width = max_x;
- layout-monolithic_height = max_y;
+ image_get_gen6_monolithic_size(dev, info, layout, max_x, max_y);
}
static bool
@@ -922,70 +987,6 @@ img_init_size_and_format(struct ilo_image *img,
img-sample_count = info-sample_count;
}
-static void
-img_align(struct ilo_image *img, struct ilo_image_params *params)
-{
- const struct ilo_image_info *info = params-info;
- int align_w = 1, align_h = 1, pad_h = 0;
-
- /*
-* From the Sandy Bridge PRM, volume 1 part 1, page 118:
-*
-* To determine the necessary padding on the bottom and right side of
-* the surface, refer to the table in Section 7.18.3.4 for the i and j
-* parameters for the surface format in use. The surface must then be
-* extended to the next multiple of the alignment unit size in each
-* dimension, and all texels contained in this extended surface must
-* have valid GTT entries.
-*
-* For cube surfaces, an additional two rows of padding are required
-* at the bottom of the surface. This must be ensured regardless of
-* whether the surface is stored tiled or linear. This is due to the
-* potential rotation of cache line orientation from memory to cache
Mesa (master): ilo: add image_get_gen6_layout()
Module: Mesa
Branch: master
Commit: 9e13f5c85f23ff67e685b41a4d439fc443de2dd0
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=9e13f5c85f23ff67e685b41a4d439fc443de2dd0
Author: Chia-I Wu olva...@gmail.com
Date: Mon Jun 29 16:02:52 2015 +0800
ilo: add image_get_gen6_layout()
It replaces only img_init_walk() right now. It will replace all img_init_*().
---
src/gallium/drivers/ilo/core/ilo_image.c | 189 +-
1 file changed, 107 insertions(+), 82 deletions(-)
diff --git a/src/gallium/drivers/ilo/core/ilo_image.c
b/src/gallium/drivers/ilo/core/ilo_image.c
index 3209674..d4adffc 100644
--- a/src/gallium/drivers/ilo/core/ilo_image.c
+++ b/src/gallium/drivers/ilo/core/ilo_image.c
@@ -49,6 +49,102 @@ struct ilo_image_params {
unsigned max_x, max_y;
};
+struct ilo_image_layout {
+ enum ilo_image_walk_type walk;
+ bool interleaved_samples;
+};
+
+static enum ilo_image_walk_type
+image_get_gen6_walk(const struct ilo_dev *dev,
+const struct ilo_image_info *info)
+{
+ ILO_DEV_ASSERT(dev, 6, 6);
+
+ /* TODO we want LODs to be page-aligned */
+ if (info-type == GEN6_SURFTYPE_3D)
+ return ILO_IMAGE_WALK_3D;
+
+ /*
+* From the Sandy Bridge PRM, volume 1 part 1, page 115:
+*
+* The separate stencil buffer does not support mip mapping, thus the
+* storage for LODs other than LOD 0 is not needed. The following
+* QPitch equation applies only to the separate stencil buffer:
+*
+*QPitch = h_0
+*
+* Use ILO_IMAGE_WALK_LOD and manually offset to the (page-aligned) levels
+* when bound.
+*/
+ if (info-bind_zs info-format == GEN6_FORMAT_R8_UINT)
+ return ILO_IMAGE_WALK_LOD;
+
+ /* compact spacing is not supported otherwise */
+ return ILO_IMAGE_WALK_LAYER;
+}
+
+static enum ilo_image_walk_type
+image_get_gen7_walk(const struct ilo_dev *dev,
+const struct ilo_image_info *info)
+{
+ ILO_DEV_ASSERT(dev, 7, 8);
+
+ if (info-type == GEN6_SURFTYPE_3D)
+ return ILO_IMAGE_WALK_3D;
+
+ /*
+* From the Ivy Bridge PRM, volume 1 part 1, page 111:
+*
+* note that the depth buffer and stencil buffer have an implied value
+* of ARYSPC_FULL
+*
+* From the Ivy Bridge PRM, volume 4 part 1, page 66:
+*
+* If Multisampled Surface Storage Format is MSFMT_MSS and Number of
+* Multisamples is not MULTISAMPLECOUNT_1, this field (Surface Array
+* Spacing) must be set to ARYSPC_LOD0.
+*/
+ if (info-sample_count 1)
+ assert(info-level_count == 1);
+ return (info-bind_zs || info-level_count 1) ?
+ ILO_IMAGE_WALK_LAYER : ILO_IMAGE_WALK_LOD;
+}
+
+static bool
+image_get_gen6_interleaved_samples(const struct ilo_dev *dev,
+ const struct ilo_image_info *info)
+{
+ ILO_DEV_ASSERT(dev, 6, 8);
+
+ /*
+* Gen6 supports only interleaved samples. It is not explicitly stated,
+* but on Gen7+, render targets are expected to be UMS/CMS (samples
+* non-interleaved) and depth/stencil buffers are expected to be IMS
+* (samples interleaved).
+*
+* See Multisampled Surface Storage Format field of SURFACE_STATE.
+*/
+ return (ilo_dev_gen(dev) == ILO_GEN(6) || info-bind_zs);
+}
+
+static bool
+image_get_gen6_layout(const struct ilo_dev *dev,
+ const struct ilo_image_info *info,
+ struct ilo_image_layout *layout)
+{
+ ILO_DEV_ASSERT(dev, 6, 8);
+
+ if (ilo_dev_gen(dev) = ILO_GEN(7))
+ layout-walk = image_get_gen7_walk(dev, info);
+ else
+ layout-walk = image_get_gen6_walk(dev, info);
+
+ layout-interleaved_samples =
+ image_get_gen6_interleaved_samples(dev, info);
+
+ return true;
+}
+
static void
img_get_slice_size(const struct ilo_image *img,
const struct ilo_image_params *params,
@@ -492,87 +588,6 @@ img_init_tiling(struct ilo_image *img,
img-tiling = GEN6_TILING_NONE;
}
-static void
-img_init_walk_gen7(struct ilo_image *img,
- const struct ilo_image_params *params)
-{
- const struct ilo_image_info *info = params-info;
-
- /*
-* It is not explicitly states, but render targets are expected to be
-* UMS/CMS (samples non-interleaved) and depth/stencil buffers are expected
-* to be IMS (samples interleaved).
-*
-* See Multisampled Surface Storage Format field of SURFACE_STATE.
-*/
- if (info-bind_zs) {
- /*
- * From the Ivy Bridge PRM, volume 1 part 1, page 111:
- *
- * note that the depth buffer and stencil buffer have an implied
- * value of ARYSPC_FULL
- */
- img-walk = (info-type == GEN6_SURFTYPE_3D) ?
- ILO_IMAGE_WALK_3D : ILO_IMAGE_WALK_LAYER;
-
- img-interleaved_samples = true;
- } else {
- /*
- * From the Ivy Bridge PRM, volume 4 part 1, page 66:
- *
- * If Multisampled Surface Storage Format
Mesa (master): ilo: add image_init_gen6_transfer_layout()
Module: Mesa
Branch: master
Commit: b4c66e4d3eadc04bdffbf4821636299bc49c89a4
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=b4c66e4d3eadc04bdffbf4821636299bc49c89a4
Author: Chia-I Wu olva...@gmail.com
Date: Mon Jun 29 16:51:46 2015 +0800
ilo: add image_init_gen6_transfer_layout()
It replaces img_init_for_transfer().
---
src/gallium/drivers/ilo/core/ilo_image.c | 112 ++
1 file changed, 37 insertions(+), 75 deletions(-)
diff --git a/src/gallium/drivers/ilo/core/ilo_image.c
b/src/gallium/drivers/ilo/core/ilo_image.c
index ec5ae04..c1edffb 100644
--- a/src/gallium/drivers/ilo/core/ilo_image.c
+++ b/src/gallium/drivers/ilo/core/ilo_image.c
@@ -580,6 +580,25 @@ image_init_gen6_hardware_layout(const struct ilo_dev *dev,
return true;
}
+static bool
+image_init_gen6_transfer_layout(const struct ilo_dev *dev,
+const struct ilo_image_info *info,
+struct ilo_image_layout *layout)
+{
+ ILO_DEV_ASSERT(dev, 6, 8);
+
+ /* we can define our own layout to save space */
+ layout-walk = ILO_IMAGE_WALK_LOD;
+ layout-interleaved_samples = false;
+ layout-valid_tilings = IMAGE_TILING_NONE;
+ layout-tiling = GEN6_TILING_NONE;
+ layout-aux = ILO_IMAGE_AUX_NONE;
+ layout-align_i = info-block_width;
+ layout-align_j = info-block_height;
+
+ return true;
+}
+
static void
image_get_gen6_slice_size(const struct ilo_dev *dev,
const struct ilo_image_info *info,
@@ -922,14 +941,30 @@ image_get_gen6_lods(const struct ilo_dev *dev,
}
static bool
+image_bind_gpu(const struct ilo_image_info *info)
+{
+ return (info-bind_surface_sampler ||
+ info-bind_surface_dp_render ||
+ info-bind_surface_dp_typed ||
+ info-bind_zs ||
+ info-bind_scanout ||
+ info-bind_cursor);
+}
+
+static bool
image_get_gen6_layout(const struct ilo_dev *dev,
const struct ilo_image_info *info,
struct ilo_image_layout *layout)
{
ILO_DEV_ASSERT(dev, 6, 8);
- if (!image_init_gen6_hardware_layout(dev, info, layout))
- return false;
+ if (image_bind_gpu(info) || info-level_count 1) {
+ if (!image_init_gen6_hardware_layout(dev, info, layout))
+ return false;
+ } else {
+ if (!image_init_gen6_transfer_layout(dev, info, layout))
+ return false;
+ }
/*
* the fact that align i and j are multiples of block width and height
@@ -1422,71 +1457,6 @@ img_init(struct ilo_image *img,
}
/**
- * The texutre is for transfer only. We can define our own layout to save
- * space.
- */
-static void
-img_init_for_transfer(struct ilo_image *img,
- const struct ilo_dev *dev,
- const struct ilo_image_info *info)
-{
- const unsigned num_layers = (info-type == GEN6_SURFTYPE_3D) ?
- info-depth : info-array_size;
- unsigned layer_width, layer_height;
-
- assert(info-level_count == 1);
- assert(info-sample_count == 1);
-
- img-aux.type = ILO_IMAGE_AUX_NONE;
-
- img-type = info-type;
- img-width0 = info-width;
- img-height0 = info-height;
- img-depth0 = info-depth;
- img-array_size = info-array_size;
- img-level_count = 1;
- img-sample_count = 1;
-
- img-format = info-format;
- img-block_width = info-block_width;
- img-block_height = info-block_height;
- img-block_size = info-block_size;
-
- img-walk = ILO_IMAGE_WALK_LOD;
-
- img-tiling = GEN6_TILING_NONE;
-
- img-align_i = img-block_width;
- img-align_j = img-block_height;
-
- assert(util_is_power_of_two(img-block_width)
- util_is_power_of_two(img-block_height));
-
- /* use packed layout */
- layer_width = align(info-width, img-align_i);
- layer_height = align(info-height, img-align_j);
-
- img-lods[0].slice_width = layer_width;
- img-lods[0].slice_height = layer_height;
-
- img-bo_stride = (layer_width / img-block_width) * img-block_size;
- img-bo_stride = align(img-bo_stride, 64);
-
- img-bo_height = (layer_height / img-block_height) * num_layers;
-}
-
-static bool
-img_is_bind_gpu(const struct ilo_image_info *info)
-{
- return (info-bind_surface_sampler ||
- info-bind_surface_dp_render ||
- info-bind_surface_dp_typed ||
- info-bind_zs ||
- info-bind_scanout ||
- info-bind_cursor);
-}
-
-/**
* Initialize the image. Callers should zero-initialize \p img first.
*/
bool
@@ -1498,14 +1468,6 @@ ilo_image_init(struct ilo_image *img,
assert(ilo_is_zeroed(img, sizeof(*img)));
- /* use transfer layout when the texture is never bound to GPU */
- if (!img_is_bind_gpu(info)
- info-level_count == 1
- info-sample_count == 1) {
- img_init_for_transfer(img, dev, info);
- return true;
- }
-
memset(params, 0, sizeof(params));
params.dev = dev;
params.info = info;
___
mesa
Mesa (master): ilo: introduce ilo_vma
Module: Mesa Branch: master Commit: 36d107e92cc4c1d2b60e0017dbe998af3a2e8b75 URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=36d107e92cc4c1d2b60e0017dbe998af3a2e8b75 Author: Chia-I Wu olva...@gmail.com Date: Tue Jun 23 23:59:31 2015 -0600 ilo: introduce ilo_vma This cleans up the code a bit and makes ilo_state_vector_resource_renamed() simpler and more robust. It also allows a single bo to back mulitple VMAs. --- src/gallium/drivers/ilo/Makefile.sources |5 +- src/gallium/drivers/ilo/core/ilo_buffer.h |5 - .../drivers/ilo/core/ilo_builder_3d_bottom.h | 43 src/gallium/drivers/ilo/core/ilo_builder_3d_top.h | 65 +++- src/gallium/drivers/ilo/core/ilo_image.h |7 -- src/gallium/drivers/ilo/core/ilo_state_sol.c | 36 +++ src/gallium/drivers/ilo/core/ilo_state_sol.h | 22 ++-- src/gallium/drivers/ilo/core/ilo_state_surface.c | 25 - src/gallium/drivers/ilo/core/ilo_state_surface.h | 32 +++--- src/gallium/drivers/ilo/core/ilo_state_vf.c| 34 +++ src/gallium/drivers/ilo/core/ilo_state_vf.h| 16 +-- src/gallium/drivers/ilo/core/ilo_state_zs.c| 52 ++ src/gallium/drivers/ilo/core/ilo_state_zs.h| 25 ++--- src/gallium/drivers/ilo/core/ilo_vma.h | 73 ++ src/gallium/drivers/ilo/ilo_blitter_blt.c | 41 src/gallium/drivers/ilo/ilo_draw.c | 11 +- src/gallium/drivers/ilo/ilo_render_surface.c | 27 ++--- src/gallium/drivers/ilo/ilo_resource.c | 37 --- src/gallium/drivers/ilo/ilo_resource.h | 21 ++-- src/gallium/drivers/ilo/ilo_state.c| 106 src/gallium/drivers/ilo/ilo_transfer.c | 51 ++ 21 files changed, 419 insertions(+), 315 deletions(-) Diff: http://cgit.freedesktop.org/mesa/mesa/diff/?id=36d107e92cc4c1d2b60e0017dbe998af3a2e8b75 ___ mesa-commit mailing list mesa-commit@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-commit
Mesa (master): ilo: replace pipe_texture_target by gen_surface_type
Module: Mesa
Branch: master
Commit: dc2e92b2d3d216fc9657f2ef594d7c5d0b03370e
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=dc2e92b2d3d216fc9657f2ef594d7c5d0b03370e
Author: Chia-I Wu olva...@gmail.com
Date: Wed Jun 24 22:47:30 2015 +0800
ilo: replace pipe_texture_target by gen_surface_type
Replace pipe_texture_target by gen_surface_type in ilo_image. Change how
GEN6_SURFTYPE_CUBE is specified in ilo_state_surface and ilo_state_zs.
---
src/gallium/drivers/ilo/core/ilo_image.c | 18 ++---
src/gallium/drivers/ilo/core/ilo_image.h |4 +-
src/gallium/drivers/ilo/core/ilo_state_surface.c | 77 +++-
src/gallium/drivers/ilo/core/ilo_state_surface.h |3 +-
src/gallium/drivers/ilo/core/ilo_state_zs.c | 83 +++---
src/gallium/drivers/ilo/core/ilo_state_zs.h |4 +-
src/gallium/drivers/ilo/ilo_resource.c | 24 ++-
src/gallium/drivers/ilo/ilo_state.c | 10 ++-
8 files changed, 98 insertions(+), 125 deletions(-)
diff --git a/src/gallium/drivers/ilo/core/ilo_image.c
b/src/gallium/drivers/ilo/core/ilo_image.c
index 39c6daa..9ec6792 100644
--- a/src/gallium/drivers/ilo/core/ilo_image.c
+++ b/src/gallium/drivers/ilo/core/ilo_image.c
@@ -514,7 +514,7 @@ img_init_walk_gen7(struct ilo_image *img,
* note that the depth buffer and stencil buffer have an implied
* value of ARYSPC_FULL
*/
- img-walk = (info-target == PIPE_TEXTURE_3D) ?
+ img-walk = (info-type == GEN6_SURFTYPE_3D) ?
ILO_IMAGE_WALK_3D : ILO_IMAGE_WALK_LAYER;
img-interleaved_samples = true;
@@ -533,7 +533,7 @@ img_init_walk_gen7(struct ilo_image *img,
assert(info-level_count == 1);
img-walk =
- (info-target == PIPE_TEXTURE_3D) ? ILO_IMAGE_WALK_3D :
+ (info-type == GEN6_SURFTYPE_3D) ? ILO_IMAGE_WALK_3D :
(info-level_count 1) ? ILO_IMAGE_WALK_LAYER :
ILO_IMAGE_WALK_LOD;
@@ -557,7 +557,7 @@ img_init_walk_gen6(struct ilo_image *img,
* GEN6 does not support compact spacing otherwise.
*/
img-walk =
- (params-info-target == PIPE_TEXTURE_3D) ? ILO_IMAGE_WALK_3D :
+ (params-info-type == GEN6_SURFTYPE_3D) ? ILO_IMAGE_WALK_3D :
(img-format == PIPE_FORMAT_S8_UINT) ? ILO_IMAGE_WALK_LOD :
ILO_IMAGE_WALK_LAYER;
@@ -674,7 +674,7 @@ img_init_size_and_format(struct ilo_image *img,
enum pipe_format format = info-format;
bool require_separate_stencil = false;
- img-target = info-target;
+ img-type = info-type;
img-width0 = info-width;
img-height0 = info-height;
img-depth0 = info-depth;
@@ -737,7 +737,7 @@ img_want_mcs(const struct ilo_image *img,
if (ilo_dev_gen(params-dev) ILO_GEN(7))
return false;
- if (info-target != PIPE_TEXTURE_2D || !info-bind_surface_dp_render)
+ if (info-type != GEN6_SURFTYPE_2D || !info-bind_surface_dp_render)
return false;
/*
@@ -799,7 +799,7 @@ img_want_hiz(const struct ilo_image *img,
return false;
/* we want 8x4 aligned levels */
- if (info-target == PIPE_TEXTURE_1D)
+ if (info-type == GEN6_SURFTYPE_1D)
return false;
if (!info-bind_zs)
@@ -865,7 +865,7 @@ img_align(struct ilo_image *img, struct ilo_image_params
*params)
align_w = MAX2(align_w, img-align_i);
align_h = MAX2(align_h, img-align_j);
- if (info-target == PIPE_TEXTURE_CUBE)
+ if (info-type == GEN6_SURFTYPE_CUBE)
pad_h += 2;
if (params-compressed)
@@ -1339,7 +1339,7 @@ img_init_for_transfer(struct ilo_image *img,
const struct ilo_dev *dev,
const struct ilo_image_info *info)
{
- const unsigned num_layers = (info-target == PIPE_TEXTURE_3D) ?
+ const unsigned num_layers = (info-type == GEN6_SURFTYPE_3D) ?
info-depth : info-array_size;
unsigned layer_width, layer_height;
@@ -1348,7 +1348,7 @@ img_init_for_transfer(struct ilo_image *img,
img-aux.type = ILO_IMAGE_AUX_NONE;
- img-target = info-target;
+ img-type = info-type;
img-width0 = info-width;
img-height0 = info-height;
img-depth0 = info-depth;
diff --git a/src/gallium/drivers/ilo/core/ilo_image.h
b/src/gallium/drivers/ilo/core/ilo_image.h
index e488bef..1c4f86c 100644
--- a/src/gallium/drivers/ilo/core/ilo_image.h
+++ b/src/gallium/drivers/ilo/core/ilo_image.h
@@ -68,7 +68,7 @@ enum ilo_image_walk_type {
};
struct ilo_image_info {
- enum pipe_texture_target target;
+ enum gen_surface_type type;
enum pipe_format format;
@@ -117,7 +117,7 @@ struct ilo_image_lod {
* Texture layout.
*/
struct ilo_image {
- enum pipe_texture_target target;
+ enum gen_surface_type type;
/* size, format, etc for programming hardware states */
unsigned width0;
diff --git a/src/gallium/drivers/ilo/core/ilo_state_surface.c
b/src/gallium/drivers/ilo/core/ilo_state_surface.c
index 2caba6d..40fe15f 100644
--- a/src/gallium/drivers/ilo/core
Mesa (master): ilo: replace pipe_format by gen_surface_format
Module: Mesa
Branch: master
Commit: cbdc26aa3f76dc20285caa7e62ca8809cb2fe638
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=cbdc26aa3f76dc20285caa7e62ca8809cb2fe638
Author: Chia-I Wu olva...@gmail.com
Date: Thu Jun 25 22:27:04 2015 +0800
ilo: replace pipe_format by gen_surface_format
Replace pipe_format by gen_surface_format in ilo_image. Change how depth
format is specified in ilo_state_zs.
---
src/gallium/drivers/ilo/core/ilo_core.h|2 -
src/gallium/drivers/ilo/core/ilo_image.c | 70 -
src/gallium/drivers/ilo/core/ilo_image.h | 12 ++-
src/gallium/drivers/ilo/core/ilo_state_zs.c| 99
src/gallium/drivers/ilo/core/ilo_state_zs.h| 11 +--
src/gallium/drivers/ilo/ilo_blitter_blt.c |2 +-
src/gallium/drivers/ilo/ilo_blitter_rectlist.c |4 +-
src/gallium/drivers/ilo/ilo_common.h |3 +
src/gallium/drivers/ilo/ilo_format.h | 35 +
src/gallium/drivers/ilo/ilo_resource.c | 49 +---
src/gallium/drivers/ilo/ilo_resource.h |1 +
src/gallium/drivers/ilo/ilo_state.c|8 +-
src/gallium/drivers/ilo/ilo_transfer.c | 20 ++---
13 files changed, 174 insertions(+), 142 deletions(-)
diff --git a/src/gallium/drivers/ilo/core/ilo_core.h
b/src/gallium/drivers/ilo/core/ilo_core.h
index 0a7f7d9..d95a80a 100644
--- a/src/gallium/drivers/ilo/core/ilo_core.h
+++ b/src/gallium/drivers/ilo/core/ilo_core.h
@@ -30,11 +30,9 @@
#include pipe/p_compiler.h
#include pipe/p_defines.h
-#include pipe/p_format.h
#include util/u_debug.h
#include util/list.h
-#include util/u_format.h
#include util/u_inlines.h
#include util/u_math.h
#include util/u_memory.h
diff --git a/src/gallium/drivers/ilo/core/ilo_image.c
b/src/gallium/drivers/ilo/core/ilo_image.c
index 7da5deb..7a11002 100644
--- a/src/gallium/drivers/ilo/core/ilo_image.c
+++ b/src/gallium/drivers/ilo/core/ilo_image.c
@@ -45,8 +45,6 @@ struct ilo_image_params {
const struct ilo_image_info *info;
unsigned valid_tilings;
- bool compressed;
-
unsigned h0, h1;
unsigned max_x, max_y;
};
@@ -261,7 +259,7 @@ img_init_lods(struct ilo_image *img,
/* every LOD begins at tile boundaries */
if (info-level_count 1) {
-assert(img-format == PIPE_FORMAT_S8_UINT);
+assert(img-format == GEN6_FORMAT_R8_UINT);
cur_x = align(cur_x, 64);
cur_y = align(cur_y, 64);
}
@@ -334,7 +332,7 @@ img_init_alignments(struct ilo_image *img,
*
* align_ialign_j
* compressed formats block widthblock height
-* PIPE_FORMAT_S8_UINT4 2
+* GEN6_FORMAT_R8_UINT4 2
* other depth/stencil formats4 4
* 4x multisampled4 4
* bpp 96 4 2
@@ -382,27 +380,27 @@ img_init_alignments(struct ilo_image *img,
*
* align_ialign_j
* compressed formats block widthblock height
-* PIPE_FORMAT_Z16_UNORM 8 4
-* PIPE_FORMAT_S8_UINT 8 8
+* GEN6_FORMAT_R16_UNORM 8 4
+* GEN6_FORMAT_R8_UINT 8 8
* other depth/stencil formats 4 4
* 2x or 4x multisampled 4 or 8 4
* tiled Y 4 or 8 4 (if rt)
-* PIPE_FORMAT_R32G32B32_FLOAT 4 or 8 2
+* GEN6_FORMAT_R32G32B32_FLOAT 4 or 8 2
* others 4 or 8 2 or 4
*/
- if (params-compressed) {
+ if (info-compressed) {
/* this happens to be the case */
img-align_i = img-block_width;
img-align_j = img-block_height;
} else if (info-bind_zs) {
if (ilo_dev_gen(params-dev) = ILO_GEN(7)) {
switch (img-format) {
- case PIPE_FORMAT_Z16_UNORM:
+ case GEN6_FORMAT_R16_UNORM:
img-align_i = 8;
img-align_j = 4;
break;
- case PIPE_FORMAT_S8_UINT:
+ case GEN6_FORMAT_R8_UINT:
img-align_i = 8;
img-align_j = 8;
break;
@@ -413,7 +411,7 @@ img_init_alignments(struct ilo_image *img,
}
} else {
switch (img-format) {
- case PIPE_FORMAT_S8_UINT:
+ case GEN6_FORMAT_R8_UINT:
img-align_i = 4;
img-align_j = 2;
break;
@@ -433,7 +431,7 @@ img_init_alignments(struct ilo_image *img,
if (ilo_dev_gen(params-dev) = ILO_GEN(7)
ilo_dev_gen(params-dev) = ILO_GEN(7.5) valign_4)
- assert(img-format != PIPE_FORMAT_R32G32B32_FLOAT);
+ assert(img-format != GEN6_FORMAT_R32G32B32_FLOAT);
img-align_i = 4
Mesa (master): ilo: initialize ilo_image from ilo_image_info
Module: Mesa
Branch: master
Commit: 934e4a469fd37dac03b8280cce41df4d9f4ed123
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=934e4a469fd37dac03b8280cce41df4d9f4ed123
Author: Chia-I Wu olva...@gmail.com
Date: Wed Jun 24 22:46:36 2015 +0800
ilo: initialize ilo_image from ilo_image_info
Convert pipe_resource to ilo_image_info for image initialization.
---
src/gallium/drivers/ilo/core/ilo_image.c | 281 ++
src/gallium/drivers/ilo/core/ilo_image.h | 43 +++--
src/gallium/drivers/ilo/ilo_resource.c | 97 ---
3 files changed, 242 insertions(+), 179 deletions(-)
diff --git a/src/gallium/drivers/ilo/core/ilo_image.c
b/src/gallium/drivers/ilo/core/ilo_image.c
index ed9b288..39c6daa 100644
--- a/src/gallium/drivers/ilo/core/ilo_image.c
+++ b/src/gallium/drivers/ilo/core/ilo_image.c
@@ -42,7 +42,7 @@ enum {
struct ilo_image_params {
const struct ilo_dev *dev;
- const struct pipe_resource *templ;
+ const struct ilo_image_info *info;
unsigned valid_tilings;
bool compressed;
@@ -56,7 +56,7 @@ img_get_slice_size(const struct ilo_image *img,
const struct ilo_image_params *params,
unsigned level, unsigned *width, unsigned *height)
{
- const struct pipe_resource *templ = params-templ;
+ const struct ilo_image_info *info = params-info;
unsigned w, h;
w = u_minify(img-width0, level);
@@ -112,8 +112,7 @@ img_get_slice_size(const struct ilo_image *img,
* y = align(y, 2) * 2;
*/
if (img-interleaved_samples) {
- switch (templ-nr_samples) {
- case 0:
+ switch (info-sample_count) {
case 1:
break;
case 2:
@@ -157,12 +156,12 @@ static unsigned
img_get_num_layers(const struct ilo_image *img,
const struct ilo_image_params *params)
{
- const struct pipe_resource *templ = params-templ;
- unsigned num_layers = templ-array_size;
+ const struct ilo_image_info *info = params-info;
+ unsigned num_layers = info-array_size;
/* samples of the same index are stored in a layer */
- if (templ-nr_samples 1 !img-interleaved_samples)
- num_layers *= templ-nr_samples;
+ if (info-sample_count 1 !img-interleaved_samples)
+ num_layers *= info-sample_count;
return num_layers;
}
@@ -171,7 +170,7 @@ static void
img_init_layer_height(struct ilo_image *img,
struct ilo_image_params *params)
{
- const struct pipe_resource *templ = params-templ;
+ const struct ilo_image_info *info = params-info;
unsigned num_layers;
if (img-walk != ILO_IMAGE_WALK_LAYER)
@@ -218,7 +217,7 @@ img_init_layer_height(struct ilo_image *img,
img-walk_layer_height = params-h0 + params-h1 +
((ilo_dev_gen(params-dev) = ILO_GEN(7)) ? 12 : 11) * img-align_j;
- if (ilo_dev_gen(params-dev) == ILO_GEN(6) templ-nr_samples 1
+ if (ilo_dev_gen(params-dev) == ILO_GEN(6) info-sample_count 1
img-height0 % 4 == 1)
img-walk_layer_height += 4;
@@ -229,13 +228,13 @@ static void
img_init_lods(struct ilo_image *img,
struct ilo_image_params *params)
{
- const struct pipe_resource *templ = params-templ;
+ const struct ilo_image_info *info = params-info;
unsigned cur_x, cur_y;
unsigned lv;
cur_x = 0;
cur_y = 0;
- for (lv = 0; lv = templ-last_level; lv++) {
+ for (lv = 0; lv info-level_count; lv++) {
unsigned lod_w, lod_h;
img_get_slice_size(img, params, lv, lod_w, lod_h);
@@ -261,7 +260,7 @@ img_init_lods(struct ilo_image *img,
cur_y += lod_h;
/* every LOD begins at tile boundaries */
- if (templ-last_level 0) {
+ if (info-level_count 1) {
assert(img-format == PIPE_FORMAT_S8_UINT);
cur_x = align(cur_x, 64);
cur_y = align(cur_y, 64);
@@ -269,7 +268,7 @@ img_init_lods(struct ilo_image *img,
break;
case ILO_IMAGE_WALK_3D:
{
-const unsigned num_slices = u_minify(templ-depth0, lv);
+const unsigned num_slices = u_minify(info-depth, lv);
const unsigned num_slices_per_row = 1 lv;
const unsigned num_rows =
(num_slices + num_slices_per_row - 1) / num_slices_per_row;
@@ -291,7 +290,7 @@ img_init_lods(struct ilo_image *img,
if (img-walk == ILO_IMAGE_WALK_LAYER) {
params-h0 = img-lods[0].slice_height;
- if (templ-last_level 0)
+ if (info-level_count 1)
params-h1 = img-lods[1].slice_height;
else
img_get_slice_size(img, params, 1, cur_x, params-h1);
@@ -302,7 +301,7 @@ static void
img_init_alignments(struct ilo_image *img,
const struct ilo_image_params *params)
{
- const struct pipe_resource *templ = params-templ;
+ const struct ilo_image_info *info = params-info;
/*
* From the Sandy Bridge PRM, volume 1 part 1, page 113:
@@ -396,7 +395,7 @@ img_init_alignments(struct ilo_image
Mesa (master): ilo: remove ilo_buffer
Module: Mesa
Branch: master
Commit: 9871646c132ba137709b0bfebfe285985dc351e6
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=9871646c132ba137709b0bfebfe285985dc351e6
Author: Chia-I Wu olva...@gmail.com
Date: Fri Jun 26 13:08:32 2015 +0800
ilo: remove ilo_buffer
Since the addition of ilo_vma, it was used only to pad a bo for sampling
engine surfaces. Replace it entirely with these functions
ilo_state_surface_buffer_size()
ilo_state_vertex_buffer_size()
ilo_state_index_buffer_size()
ilo_state_sol_buffer_size()
---
src/gallium/drivers/ilo/Makefile.sources |1 -
src/gallium/drivers/ilo/core/ilo_buffer.h| 59 --
src/gallium/drivers/ilo/core/ilo_state_sol.c |9
src/gallium/drivers/ilo/core/ilo_state_sol.h |4 ++
src/gallium/drivers/ilo/core/ilo_state_surface.c | 48 ++
src/gallium/drivers/ilo/core/ilo_state_surface.h |5 ++
src/gallium/drivers/ilo/core/ilo_state_vf.c | 18 +++
src/gallium/drivers/ilo/core/ilo_state_vf.h |8 +++
src/gallium/drivers/ilo/ilo_resource.c | 22 +---
src/gallium/drivers/ilo/ilo_resource.h |3 +-
10 files changed, 109 insertions(+), 68 deletions(-)
diff --git a/src/gallium/drivers/ilo/Makefile.sources
b/src/gallium/drivers/ilo/Makefile.sources
index 35d76bd..7a7db93 100644
--- a/src/gallium/drivers/ilo/Makefile.sources
+++ b/src/gallium/drivers/ilo/Makefile.sources
@@ -1,5 +1,4 @@
C_SOURCES := \
- core/ilo_buffer.h \
core/ilo_builder.c \
core/ilo_builder.h \
core/ilo_builder_3d.h \
diff --git a/src/gallium/drivers/ilo/core/ilo_buffer.h
b/src/gallium/drivers/ilo/core/ilo_buffer.h
deleted file mode 100644
index f2fb630..000
--- a/src/gallium/drivers/ilo/core/ilo_buffer.h
+++ /dev/null
@@ -1,59 +0,0 @@
-/*
- * Mesa 3-D graphics library
- *
- * Copyright (C) 2012-2013 LunarG, Inc.
- *
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the Software),
- * to deal in the Software without restriction, including without limitation
- * the rights to use, copy, modify, merge, publish, distribute, sublicense,
- * and/or sell copies of the Software, and to permit persons to whom the
- * Software is furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be included
- * in all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED AS IS, WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
- * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
- * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
- * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
- * DEALINGS IN THE SOFTWARE.
- *
- * Authors:
- *Chia-I Wu o...@lunarg.com
- */
-
-#ifndef ILO_BUFFER_H
-#define ILO_BUFFER_H
-
-#include ilo_core.h
-#include ilo_debug.h
-#include ilo_dev.h
-
-struct ilo_buffer {
- unsigned bo_size;
-};
-
-static inline void
-ilo_buffer_init(struct ilo_buffer *buf, const struct ilo_dev *dev,
-unsigned size, uint32_t bind, uint32_t flags)
-{
- assert(ilo_is_zeroed(buf, sizeof(*buf)));
-
- buf-bo_size = size;
-
- /*
-* From the Sandy Bridge PRM, volume 1 part 1, page 118:
-*
-* For buffers, which have no inherent height, padding requirements
-* are different. A buffer must be padded to the next multiple of 256
-* array elements, with an additional 16 bytes added beyond that to
-* account for the L1 cache line.
-*/
- if (bind PIPE_BIND_SAMPLER_VIEW)
- buf-bo_size = align(buf-bo_size, 256) + 16;
-}
-
-#endif /* ILO_BUFFER_H */
diff --git a/src/gallium/drivers/ilo/core/ilo_state_sol.c
b/src/gallium/drivers/ilo/core/ilo_state_sol.c
index dd1ef5e..6ef2c91 100644
--- a/src/gallium/drivers/ilo/core/ilo_state_sol.c
+++ b/src/gallium/drivers/ilo/core/ilo_state_sol.c
@@ -424,6 +424,15 @@ ilo_state_sol_init_disabled(struct ilo_state_sol *sol,
return ilo_state_sol_init(sol, dev, info);
}
+uint32_t
+ilo_state_sol_buffer_size(const struct ilo_dev *dev, uint32_t size,
+ uint32_t *alignment)
+{
+ /* DWord aligned without padding */
+ *alignment = 4;
+ return size;
+}
+
bool
ilo_state_sol_buffer_init(struct ilo_state_sol_buffer *sb,
const struct ilo_dev *dev,
diff --git a/src/gallium/drivers/ilo/core/ilo_state_sol.h
b/src/gallium/drivers/ilo/core/ilo_state_sol.h
index f0968b3..92c5f94 100644
--- a/src/gallium/drivers/ilo/core/ilo_state_sol.h
+++ b/src/gallium/drivers/ilo/core/ilo_state_sol.h
@@ -150,6 +150,10 @@ ilo_state_sol_init_disabled(struct ilo_state_sol *sol,
const struct
Mesa (master): ilo: improve SURFTYPE_BUFFER validations
Module: Mesa
Branch: master
Commit: 07acf9cb167d4e1f7aebd6837d22e3523ad63109
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=07acf9cb167d4e1f7aebd6837d22e3523ad63109
Author: Chia-I Wu olva...@gmail.com
Date: Wed Jun 24 12:57:57 2015 +0800
ilo: improve SURFTYPE_BUFFER validations
Reorganize the validations to make them more systematic.
---
src/gallium/drivers/ilo/core/ilo_state_surface.c | 219 ++
src/gallium/drivers/ilo/core/ilo_state_surface.h |1 +
2 files changed, 139 insertions(+), 81 deletions(-)
diff --git a/src/gallium/drivers/ilo/core/ilo_state_surface.c
b/src/gallium/drivers/ilo/core/ilo_state_surface.c
index d358174..2caba6d 100644
--- a/src/gallium/drivers/ilo/core/ilo_state_surface.c
+++ b/src/gallium/drivers/ilo/core/ilo_state_surface.c
@@ -94,31 +94,13 @@ surface_set_gen7_null_SURFACE_STATE(struct
ilo_state_surface *surf,
return true;
}
-static bool
-surface_validate_gen6_buffer(const struct ilo_dev *dev,
- const struct ilo_state_surface_buffer_info *info)
+static uint32_t
+surface_get_gen6_buffer_offset_alignment(const struct ilo_dev *dev,
+ const struct
ilo_state_surface_buffer_info *info)
{
- ILO_DEV_ASSERT(dev, 6, 8);
-
- /* SVB writes are Gen6-only */
- if (ilo_dev_gen(dev) = ILO_GEN(7))
- assert(info-access != ILO_STATE_SURFACE_ACCESS_DP_SVB);
-
- if (info-offset + info-size info-vma-vm_size) {
- ilo_warn(invalid buffer range\n);
- return false;
- }
+ uint32_t alignment;
- /*
-* From the Sandy Bridge PRM, volume 4 part 1, page 81:
-*
-* For surfaces of type SURFTYPE_BUFFER: [0,2047] - [1B, 2048B]
-* For surfaces of type SURFTYPE_STRBUF: [0,2047] - [1B, 2048B]
-*/
- if (!info-struct_size || info-struct_size 2048) {
- ilo_warn(invalid buffer struct size\n);
- return false;
- }
+ ILO_DEV_ASSERT(dev, 6, 8);
/*
* From the Ivy Bridge PRM, volume 4 part 1, page 68:
@@ -132,77 +114,153 @@ surface_validate_gen6_buffer(const struct ilo_dev *dev,
* Certain message types used to access surfaces have more stringent
* alignment requirements. Please refer to the specific message
* documentation for additional restrictions.
-*
-* From the Ivy Bridge PRM, volume 4 part 1, page 233, 235, and 237:
-*
-* the surface base address must be OWord aligned
-*
-* for OWord Block Read/Write, Unaligned OWord Block Read, and OWord Dual
-* Block Read/Write.
-*
-* From the Ivy Bridge PRM, volume 4 part 1, page 246 and 249:
-*
-* The surface base address must be DWord aligned
-*
-* for DWord Scattered Read/Write and Byte Scattered Read/Write.
-*
-* We have to rely on users to correctly set info-struct_size here. DWord
-* Scattered Read/Write has conflicting pitch and alignment, but we do not
-* use them yet so we are fine.
-*
-* It is unclear if sampling engine surfaces require aligned offsets.
*/
- if (info-access != ILO_STATE_SURFACE_ACCESS_DP_SVB) {
- assert(info-struct_size % info-format_size == 0);
+ switch (info-access) {
+ case ILO_STATE_SURFACE_ACCESS_SAMPLER:
+ /* no alignment requirements */
+ alignment = 1;
+ break;
+ case ILO_STATE_SURFACE_ACCESS_DP_RENDER:
+ case ILO_STATE_SURFACE_ACCESS_DP_TYPED:
+ /* element-size aligned */
+ alignment = info-format_size;
- if (info-offset % info-struct_size ||
- info-vma-vm_alignment % info-struct_size) {
- ilo_warn(bad buffer offset\n);
- return false;
- }
- }
+ assert(info-struct_size % alignment == 0);
+ break;
+ case ILO_STATE_SURFACE_ACCESS_DP_UNTYPED:
+ /*
+ * Nothing is said about Untyped* messages, but I think they require the
+ * base address to be DWord aligned.
+ */
+ alignment = 4;
- if (info-format == GEN6_FORMAT_RAW) {
/*
- * From the Sandy Bridge PRM, volume 4 part 1, page 97:
+ * From the Ivy Bridge PRM, volume 4 part 1, page 70:
+ *
+ * For linear surfaces with Surface Type of SURFTYPE_STRBUF, the
+ * pitch must be a multiple of 4 bytes.
+ */
+ if (info-struct_size 1)
+ assert(info-struct_size % alignment == 0);
+ break;
+ case ILO_STATE_SURFACE_ACCESS_DP_DATA:
+ /*
+ * From the Ivy Bridge PRM, volume 4 part 1, page 233, 235, and 237:
*
- * RAW is supported only with buffers and structured buffers
- * accessed via the untyped surface read/write and untyped atomic
- * operation messages, which do not have a column in the table.
+ * the surface base address must be OWord aligned
*
- * We do not have a specific access mode for untyped messages.
+ * for OWord Block Read/Write, Unaligned OWord Block Read, and OWord
+ * Dual Block Read/Write
Mesa (master): ilo: remove ilo_image_disable_aux()
Module: Mesa
Branch: master
Commit: f825fe8e13adfec4cd488bac3663b7e9c90a8c06
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=f825fe8e13adfec4cd488bac3663b7e9c90a8c06
Author: Chia-I Wu olva...@gmail.com
Date: Thu Jun 25 07:18:31 2015 +0800
ilo: remove ilo_image_disable_aux()
Fail resource creation when aux bo allocation fails.
---
src/gallium/drivers/ilo/core/ilo_image.c | 19 ---
src/gallium/drivers/ilo/core/ilo_image.h |3 ---
src/gallium/drivers/ilo/ilo_resource.c |8 ++--
3 files changed, 2 insertions(+), 28 deletions(-)
diff --git a/src/gallium/drivers/ilo/core/ilo_image.c
b/src/gallium/drivers/ilo/core/ilo_image.c
index 0d837d8..ed9b288 100644
--- a/src/gallium/drivers/ilo/core/ilo_image.c
+++ b/src/gallium/drivers/ilo/core/ilo_image.c
@@ -1449,22 +1449,3 @@ ilo_image_init_for_imported(struct ilo_image *img,
return true;
}
-
-bool
-ilo_image_disable_aux(struct ilo_image *img, const struct ilo_dev *dev)
-{
- /* HiZ is required for separate stencil on Gen6 */
- if (ilo_dev_gen(dev) == ILO_GEN(6)
- img-aux.type == ILO_IMAGE_AUX_HIZ
- img-separate_stencil)
- return false;
-
- /* MCS is required for multisample images */
- if (img-aux.type == ILO_IMAGE_AUX_MCS
- img-sample_count 1)
- return false;
-
- img-aux.enables = 0x0;
-
- return true;
-}
diff --git a/src/gallium/drivers/ilo/core/ilo_image.h
b/src/gallium/drivers/ilo/core/ilo_image.h
index 77747ed..e5dcc43 100644
--- a/src/gallium/drivers/ilo/core/ilo_image.h
+++ b/src/gallium/drivers/ilo/core/ilo_image.h
@@ -157,9 +157,6 @@ ilo_image_init_for_imported(struct ilo_image *img,
enum gen_surface_tiling tiling,
unsigned bo_stride);
-bool
-ilo_image_disable_aux(struct ilo_image *img, const struct ilo_dev *dev);
-
static inline bool
ilo_image_can_enable_aux(const struct ilo_image *img, unsigned level)
{
diff --git a/src/gallium/drivers/ilo/ilo_resource.c
b/src/gallium/drivers/ilo/ilo_resource.c
index a0074e5..3b8e607 100644
--- a/src/gallium/drivers/ilo/ilo_resource.c
+++ b/src/gallium/drivers/ilo/ilo_resource.c
@@ -283,8 +283,6 @@ tex_destroy(struct ilo_texture *tex)
static bool
tex_alloc_bos(struct ilo_texture *tex)
{
- struct ilo_screen *is = ilo_screen(tex-base.screen);
-
if (!tex-imported !tex_create_bo(tex))
return false;
@@ -294,13 +292,11 @@ tex_alloc_bos(struct ilo_texture *tex)
switch (tex-image.aux.type) {
case ILO_IMAGE_AUX_HIZ:
- if (!tex_create_hiz(tex)
- !ilo_image_disable_aux(tex-image, is-dev))
+ if (!tex_create_hiz(tex))
return false;
break;
case ILO_IMAGE_AUX_MCS:
- if (!tex_create_mcs(tex)
- !ilo_image_disable_aux(tex-image, is-dev))
+ if (!tex_create_mcs(tex))
return false;
break;
default:
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Mesa (master): ilo: always use the specified image format
Module: Mesa
Branch: master
Commit: 2ee95f6d64aca9e9490c1ac293dd711b5f60a16b
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=2ee95f6d64aca9e9490c1ac293dd711b5f60a16b
Author: Chia-I Wu olva...@gmail.com
Date: Thu Jun 25 07:43:47 2015 +0800
ilo: always use the specified image format
Move silent promotion of PIPE_FORMAT_ETC1_RGB8 or combined depth/stencil out
of core.
---
src/gallium/drivers/ilo/core/ilo_image.c | 78 +++
src/gallium/drivers/ilo/core/ilo_image.h |4 +-
src/gallium/drivers/ilo/ilo_resource.c | 100 ++
src/gallium/drivers/ilo/ilo_state.c |2 +-
4 files changed, 115 insertions(+), 69 deletions(-)
diff --git a/src/gallium/drivers/ilo/core/ilo_image.c
b/src/gallium/drivers/ilo/core/ilo_image.c
index 9ec6792..7da5deb 100644
--- a/src/gallium/drivers/ilo/core/ilo_image.c
+++ b/src/gallium/drivers/ilo/core/ilo_image.c
@@ -671,56 +671,36 @@ img_init_size_and_format(struct ilo_image *img,
struct ilo_image_params *params)
{
const struct ilo_image_info *info = params-info;
- enum pipe_format format = info-format;
- bool require_separate_stencil = false;
img-type = info-type;
- img-width0 = info-width;
- img-height0 = info-height;
- img-depth0 = info-depth;
- img-array_size = info-array_size;
- img-level_count = info-level_count;
- img-sample_count = info-sample_count;
/*
-* From the Sandy Bridge PRM, volume 2 part 1, page 317:
-*
-* This field (Separate Stencil Buffer Enable) must be set to the same
-* value (enabled or disabled) as Hierarchical Depth Buffer Enable.
+* From the Ivy Bridge PRM, volume 2 part 1, page 314:
*
-* GEN7+ requires separate stencil buffers.
+* The separate stencil buffer is always enabled, thus the field in
+* 3DSTATE_DEPTH_BUFFER to explicitly enable the separate stencil
+* buffer has been removed Surface formats with interleaved depth and
+* stencil are no longer supported
*/
- if (info-bind_zs) {
- if (ilo_dev_gen(params-dev) = ILO_GEN(7))
- require_separate_stencil = true;
- else
- require_separate_stencil = (img-aux.type == ILO_IMAGE_AUX_HIZ);
- }
+ if (ilo_dev_gen(params-dev) = ILO_GEN(7) info-bind_zs) {
+ const struct util_format_description *desc =
+ util_format_description(info-format);
- switch (format) {
- case PIPE_FORMAT_ETC1_RGB8:
- format = PIPE_FORMAT_R8G8B8X8_UNORM;
- break;
- case PIPE_FORMAT_Z24_UNORM_S8_UINT:
- if (require_separate_stencil) {
- format = PIPE_FORMAT_Z24X8_UNORM;
- img-separate_stencil = true;
- }
- break;
- case PIPE_FORMAT_Z32_FLOAT_S8X24_UINT:
- if (require_separate_stencil) {
- format = PIPE_FORMAT_Z32_FLOAT;
- img-separate_stencil = true;
- }
- break;
- default:
- break;
+ assert(info-format == PIPE_FORMAT_S8_UINT ||
+ !util_format_has_stencil(desc));
}
- img-format = format;
- img-block_width = util_format_get_blockwidth(format);
- img-block_height = util_format_get_blockheight(format);
- img-block_size = util_format_get_blocksize(format);
+ img-format = info-format;
+ img-block_width = util_format_get_blockwidth(info-format);
+ img-block_height = util_format_get_blockheight(info-format);
+ img-block_size = util_format_get_blocksize(info-format);
+
+ img-width0 = info-width;
+ img-height0 = info-height;
+ img-depth0 = info-depth;
+ img-array_size = info-array_size;
+ img-level_count = info-level_count;
+ img-sample_count = info-sample_count;
params-valid_tilings = img_get_valid_tilings(img, params);
params-compressed = util_format_is_compressed(img-format);
@@ -805,19 +785,7 @@ img_want_hiz(const struct ilo_image *img,
if (!info-bind_zs)
return false;
- if (!util_format_has_depth(desc))
- return false;
-
- /*
-* As can be seen in img_calculate_hiz_size(), HiZ may not be enabled
-* for every level. This is generally fine except on GEN6, where HiZ and
-* separate stencil are enabled and disabled at the same time. When the
-* format is PIPE_FORMAT_Z32_FLOAT_S8X24_UINT, enabling and disabling HiZ
-* can result in incompatible formats.
-*/
- if (ilo_dev_gen(params-dev) == ILO_GEN(6)
- info-format == PIPE_FORMAT_Z32_FLOAT_S8X24_UINT
- info-level_count 1)
+ if (!util_format_has_depth(desc) || util_format_has_stencil(desc))
return false;
return true;
@@ -1303,8 +1271,8 @@ img_init(struct ilo_image *img,
{
/* there are hard dependencies between every function here */
- img_init_aux(img, params);
img_init_size_and_format(img, params);
+ img_init_aux(img, params);
img_init_walk(img, params);
img_init_tiling(img, params);
img_init_alignments(img, params);
diff --git a/src/gallium/drivers/ilo/core/ilo_image.h
b/src/gallium/drivers/ilo
Mesa (master): ilo: define ILO_IMAGE_MAX_LEVEL_COUNT
Module: Mesa
Branch: master
Commit: 7de85694fa606b112b8badd4f07969aef782efb8
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=7de85694fa606b112b8badd4f07969aef782efb8
Author: Chia-I Wu olva...@gmail.com
Date: Fri Jun 26 11:38:46 2015 +0800
ilo: define ILO_IMAGE_MAX_LEVEL_COUNT
Define ILO_IMAGE_MAX_LEVEL_COUNT for ilo_image and remove unnecessary header
includes.
---
src/gallium/drivers/ilo/core/ilo_core.h |4
src/gallium/drivers/ilo/core/ilo_image.c |4 ++--
src/gallium/drivers/ilo/core/ilo_image.h | 11 +--
src/gallium/drivers/ilo/ilo_common.h |5 +
4 files changed, 16 insertions(+), 8 deletions(-)
diff --git a/src/gallium/drivers/ilo/core/ilo_core.h
b/src/gallium/drivers/ilo/core/ilo_core.h
index d95a80a..da7db90 100644
--- a/src/gallium/drivers/ilo/core/ilo_core.h
+++ b/src/gallium/drivers/ilo/core/ilo_core.h
@@ -29,13 +29,9 @@
#define ILO_CORE_H
#include pipe/p_compiler.h
-#include pipe/p_defines.h
#include util/u_debug.h
-#include util/list.h
-#include util/u_inlines.h
#include util/u_math.h
#include util/u_memory.h
-#include util/u_pointer.h
#endif /* ILO_CORE_H */
diff --git a/src/gallium/drivers/ilo/core/ilo_image.c
b/src/gallium/drivers/ilo/core/ilo_image.c
index 7a11002..3209674 100644
--- a/src/gallium/drivers/ilo/core/ilo_image.c
+++ b/src/gallium/drivers/ilo/core/ilo_image.c
@@ -1029,8 +1029,8 @@ img_calculate_hiz_size(struct ilo_image *img,
break;
case ILO_IMAGE_WALK_LOD:
{
- unsigned lod_tx[PIPE_MAX_TEXTURE_LEVELS];
- unsigned lod_ty[PIPE_MAX_TEXTURE_LEVELS];
+ unsigned lod_tx[ILO_IMAGE_MAX_LEVEL_COUNT];
+ unsigned lod_ty[ILO_IMAGE_MAX_LEVEL_COUNT];
unsigned cur_tx, cur_ty;
/* figure out the tile offsets of LODs */
diff --git a/src/gallium/drivers/ilo/core/ilo_image.h
b/src/gallium/drivers/ilo/core/ilo_image.h
index 0fe0d4d..cfe18b9 100644
--- a/src/gallium/drivers/ilo/core/ilo_image.h
+++ b/src/gallium/drivers/ilo/core/ilo_image.h
@@ -33,6 +33,13 @@
#include ilo_core.h
#include ilo_dev.h
+/*
+ * From the Ivy Bridge PRM, volume 4 part 1, page 75:
+ *
+ * (MIP Count / LOD) representing [1,15] MIP levels
+ */
+#define ILO_IMAGE_MAX_LEVEL_COUNT 15
+
enum ilo_image_aux_type {
ILO_IMAGE_AUX_NONE,
ILO_IMAGE_AUX_HIZ,
@@ -154,7 +161,7 @@ struct ilo_image {
unsigned align_i;
unsigned align_j;
- struct ilo_image_lod lods[PIPE_MAX_TEXTURE_LEVELS];
+ struct ilo_image_lod lods[ILO_IMAGE_MAX_LEVEL_COUNT];
/* physical layer height for ILO_IMAGE_WALK_LAYER */
unsigned walk_layer_height;
@@ -173,7 +180,7 @@ struct ilo_image {
unsigned enables;
/* LOD offsets for ILO_IMAGE_WALK_LOD */
- unsigned walk_lod_offsets[PIPE_MAX_TEXTURE_LEVELS];
+ unsigned walk_lod_offsets[ILO_IMAGE_MAX_LEVEL_COUNT];
unsigned walk_layer_height;
unsigned bo_stride;
diff --git a/src/gallium/drivers/ilo/ilo_common.h
b/src/gallium/drivers/ilo/ilo_common.h
index 4d6604b..3dbe79f 100644
--- a/src/gallium/drivers/ilo/ilo_common.h
+++ b/src/gallium/drivers/ilo/ilo_common.h
@@ -29,7 +29,12 @@
#define ILO_COMMON_H
#include pipe/p_format.h
+#include pipe/p_defines.h
+
+#include util/list.h
#include util/u_format.h
+#include util/u_inlines.h
+#include util/u_pointer.h
#include core/ilo_core.h
#include core/ilo_debug.h
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Mesa (master): ilo: add ilo_state_vf_valid_element_format()
Module: Mesa
Branch: master
Commit: aa3e5e0dded4d732ea46083201940bd23214785c
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=aa3e5e0dded4d732ea46083201940bd23214785c
Author: Chia-I Wu olva...@gmail.com
Date: Mon Jun 22 13:15:24 2015 +0800
ilo: add ilo_state_vf_valid_element_format()
Check if a surface format can be used as a VE format.
---
src/gallium/drivers/ilo/core/ilo_format.c | 126 +--
src/gallium/drivers/ilo/core/ilo_state_vf.c | 126 +++
src/gallium/drivers/ilo/core/ilo_state_vf.h |4 +
3 files changed, 132 insertions(+), 124 deletions(-)
diff --git a/src/gallium/drivers/ilo/core/ilo_format.c
b/src/gallium/drivers/ilo/core/ilo_format.c
index 280e499..c1b001b 100644
--- a/src/gallium/drivers/ilo/core/ilo_format.c
+++ b/src/gallium/drivers/ilo/core/ilo_format.c
@@ -26,12 +26,9 @@
*/
#include genhw/genhw.h
+#include ilo_state_vf.h
#include ilo_format.h
-struct ilo_vf_cap {
- int vertex_element;
-};
-
struct ilo_sol_cap {
int buffer;
};
@@ -54,122 +51,6 @@ struct ilo_dp_cap {
* This table is based on:
*
* - the Sandy Bridge PRM, volume 4 part 1, page 88-97
- * - the Ivy Bridge PRM, volume 2 part 1, page 97-99
- * - the Haswell PRM, volume 7, page 467-470
- */
-static const struct ilo_vf_cap ilo_vf_caps[] = {
-#define CAP(vertex_element) { ILO_GEN(vertex_element) }
- [GEN6_FORMAT_R32G32B32A32_FLOAT] = CAP( 1),
- [GEN6_FORMAT_R32G32B32A32_SINT]= CAP( 1),
- [GEN6_FORMAT_R32G32B32A32_UINT]= CAP( 1),
- [GEN6_FORMAT_R32G32B32A32_UNORM] = CAP( 1),
- [GEN6_FORMAT_R32G32B32A32_SNORM] = CAP( 1),
- [GEN6_FORMAT_R64G64_FLOAT] = CAP( 1),
- [GEN6_FORMAT_R32G32B32A32_SSCALED] = CAP( 1),
- [GEN6_FORMAT_R32G32B32A32_USCALED] = CAP( 1),
- [GEN6_FORMAT_R32G32B32A32_SFIXED] = CAP(7.5),
- [GEN6_FORMAT_R32G32B32_FLOAT] = CAP( 1),
- [GEN6_FORMAT_R32G32B32_SINT] = CAP( 1),
- [GEN6_FORMAT_R32G32B32_UINT] = CAP( 1),
- [GEN6_FORMAT_R32G32B32_UNORM] = CAP( 1),
- [GEN6_FORMAT_R32G32B32_SNORM] = CAP( 1),
- [GEN6_FORMAT_R32G32B32_SSCALED]= CAP( 1),
- [GEN6_FORMAT_R32G32B32_USCALED]= CAP( 1),
- [GEN6_FORMAT_R32G32B32_SFIXED] = CAP(7.5),
- [GEN6_FORMAT_R16G16B16A16_UNORM] = CAP( 1),
- [GEN6_FORMAT_R16G16B16A16_SNORM] = CAP( 1),
- [GEN6_FORMAT_R16G16B16A16_SINT]= CAP( 1),
- [GEN6_FORMAT_R16G16B16A16_UINT]= CAP( 1),
- [GEN6_FORMAT_R16G16B16A16_FLOAT] = CAP( 1),
- [GEN6_FORMAT_R32G32_FLOAT] = CAP( 1),
- [GEN6_FORMAT_R32G32_SINT] = CAP( 1),
- [GEN6_FORMAT_R32G32_UINT] = CAP( 1),
- [GEN6_FORMAT_R32G32_UNORM] = CAP( 1),
- [GEN6_FORMAT_R32G32_SNORM] = CAP( 1),
- [GEN6_FORMAT_R64_FLOAT]= CAP( 1),
- [GEN6_FORMAT_R16G16B16A16_SSCALED] = CAP( 1),
- [GEN6_FORMAT_R16G16B16A16_USCALED] = CAP( 1),
- [GEN6_FORMAT_R32G32_SSCALED] = CAP( 1),
- [GEN6_FORMAT_R32G32_USCALED] = CAP( 1),
- [GEN6_FORMAT_R32G32_SFIXED]= CAP(7.5),
- [GEN6_FORMAT_B8G8R8A8_UNORM] = CAP( 1),
- [GEN6_FORMAT_R10G10B10A2_UNORM]= CAP( 1),
- [GEN6_FORMAT_R10G10B10A2_UINT] = CAP( 1),
- [GEN6_FORMAT_R10G10B10_SNORM_A2_UNORM] = CAP( 1),
- [GEN6_FORMAT_R8G8B8A8_UNORM] = CAP( 1),
- [GEN6_FORMAT_R8G8B8A8_SNORM] = CAP( 1),
- [GEN6_FORMAT_R8G8B8A8_SINT]= CAP( 1),
- [GEN6_FORMAT_R8G8B8A8_UINT]= CAP( 1),
- [GEN6_FORMAT_R16G16_UNORM] = CAP( 1),
- [GEN6_FORMAT_R16G16_SNORM] = CAP( 1),
- [GEN6_FORMAT_R16G16_SINT] = CAP( 1),
- [GEN6_FORMAT_R16G16_UINT] = CAP( 1),
- [GEN6_FORMAT_R16G16_FLOAT] = CAP( 1),
- [GEN6_FORMAT_B10G10R10A2_UNORM]= CAP(7.5),
- [GEN6_FORMAT_R11G11B10_FLOAT] = CAP( 1),
- [GEN6_FORMAT_R32_SINT] = CAP( 1),
- [GEN6_FORMAT_R32_UINT] = CAP( 1),
- [GEN6_FORMAT_R32_FLOAT]= CAP( 1),
- [GEN6_FORMAT_R32_UNORM]= CAP( 1),
- [GEN6_FORMAT_R32_SNORM]= CAP( 1),
- [GEN6_FORMAT_R10G10B10X2_USCALED] = CAP( 1),
- [GEN6_FORMAT_R8G8B8A8_SSCALED] = CAP( 1),
- [GEN6_FORMAT_R8G8B8A8_USCALED] = CAP( 1),
- [GEN6_FORMAT_R16G16_SSCALED] = CAP( 1),
- [GEN6_FORMAT_R16G16_USCALED] = CAP( 1),
- [GEN6_FORMAT_R32_SSCALED] = CAP( 1),
- [GEN6_FORMAT_R32_USCALED] = CAP( 1),
- [GEN6_FORMAT_R8G8_UNORM] = CAP( 1),
- [GEN6_FORMAT_R8G8_SNORM] = CAP( 1),
- [GEN6_FORMAT_R8G8_SINT]= CAP( 1),
- [GEN6_FORMAT_R8G8_UINT]= CAP( 1),
- [GEN6_FORMAT_R16_UNORM]= CAP( 1),
- [GEN6_FORMAT_R16_SNORM
Mesa (master): ilo: move ilo_format.[ch] out of core
Module: Mesa
Branch: master
Commit: 513bc5d90b8e9237bd6a04da5d0dee175ff134f6
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=513bc5d90b8e9237bd6a04da5d0dee175ff134f6
Author: Chia-I Wu olva...@gmail.com
Date: Mon Jun 22 14:06:13 2015 +0800
ilo: move ilo_format.[ch] out of core
They provide PIPE_FORMAT_x to GEN6_FORMAT_x translation as well as some
convenient helpers. Move them out of core.
---
src/gallium/drivers/ilo/Makefile.sources|4 ++--
src/gallium/drivers/ilo/{core = }/ilo_format.c |4 ++--
src/gallium/drivers/ilo/{core = }/ilo_format.h |4 ++--
src/gallium/drivers/ilo/ilo_screen.c|2 +-
src/gallium/drivers/ilo/ilo_state.c |2 +-
5 files changed, 8 insertions(+), 8 deletions(-)
diff --git a/src/gallium/drivers/ilo/Makefile.sources
b/src/gallium/drivers/ilo/Makefile.sources
index ed024e3..e1bbb9a 100644
--- a/src/gallium/drivers/ilo/Makefile.sources
+++ b/src/gallium/drivers/ilo/Makefile.sources
@@ -15,8 +15,6 @@ C_SOURCES := \
core/ilo_debug.h \
core/ilo_dev.c \
core/ilo_dev.h \
- core/ilo_format.c \
- core/ilo_format.h \
core/ilo_image.c \
core/ilo_image.h \
core/ilo_state_cc.c \
@@ -60,6 +58,8 @@ C_SOURCES := \
ilo_cp.h \
ilo_draw.c \
ilo_draw.h \
+ ilo_format.c \
+ ilo_format.h \
ilo_gpgpu.c \
ilo_gpgpu.h \
ilo_public.h \
diff --git a/src/gallium/drivers/ilo/core/ilo_format.c
b/src/gallium/drivers/ilo/ilo_format.c
similarity index 99%
rename from src/gallium/drivers/ilo/core/ilo_format.c
rename to src/gallium/drivers/ilo/ilo_format.c
index b96f71c..ca7e6b5 100644
--- a/src/gallium/drivers/ilo/core/ilo_format.c
+++ b/src/gallium/drivers/ilo/ilo_format.c
@@ -26,8 +26,8 @@
*/
#include genhw/genhw.h
-#include ilo_state_surface.h
-#include ilo_state_vf.h
+#include core/ilo_state_surface.h
+#include core/ilo_state_vf.h
#include ilo_format.h
bool
diff --git a/src/gallium/drivers/ilo/core/ilo_format.h
b/src/gallium/drivers/ilo/ilo_format.h
similarity index 99%
rename from src/gallium/drivers/ilo/core/ilo_format.h
rename to src/gallium/drivers/ilo/ilo_format.h
index 6b73ea1..4e955c0 100644
--- a/src/gallium/drivers/ilo/core/ilo_format.h
+++ b/src/gallium/drivers/ilo/ilo_format.h
@@ -29,8 +29,8 @@
#define ILO_FORMAT_H
#include genhw/genhw.h
-#include ilo_core.h
-#include ilo_dev.h
+
+#include ilo_common.h
bool
ilo_format_support_vb(const struct ilo_dev *dev,
diff --git a/src/gallium/drivers/ilo/ilo_screen.c
b/src/gallium/drivers/ilo/ilo_screen.c
index b75a259..9410555 100644
--- a/src/gallium/drivers/ilo/ilo_screen.c
+++ b/src/gallium/drivers/ilo/ilo_screen.c
@@ -31,10 +31,10 @@
#include vl/vl_decoder.h
#include vl/vl_video_buffer.h
#include genhw/genhw.h /* for GEN6_REG_TIMESTAMP */
-#include core/ilo_format.h
#include core/intel_winsys.h
#include ilo_context.h
+#include ilo_format.h
#include ilo_resource.h
#include ilo_transfer.h /* for ILO_TRANSFER_MAP_BUFFER_ALIGNMENT */
#include ilo_public.h
diff --git a/src/gallium/drivers/ilo/ilo_state.c
b/src/gallium/drivers/ilo/ilo_state.c
index 62e3180..4252dbe 100644
--- a/src/gallium/drivers/ilo/ilo_state.c
+++ b/src/gallium/drivers/ilo/ilo_state.c
@@ -26,7 +26,6 @@
*/
#include core/ilo_builder_3d.h /* for gen6_3d_translate_pipe_prim() */
-#include core/ilo_format.h
#include util/u_dual_blend.h
#include util/u_dynarray.h
#include util/u_framebuffer.h
@@ -35,6 +34,7 @@
#include util/u_upload_mgr.h
#include ilo_context.h
+#include ilo_format.h
#include ilo_resource.h
#include ilo_shader.h
#include ilo_state.h
___
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Mesa (master): ilo: align vertex buffer size in buf_create()
Module: Mesa
Branch: master
Commit: 58f95b332d0cbad226f5bb2e96cd0cad8864fe79
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=58f95b332d0cbad226f5bb2e96cd0cad8864fe79
Author: Chia-I Wu olva...@gmail.com
Date: Mon Jun 22 14:15:52 2015 +0800
ilo: align vertex buffer size in buf_create()
With ilo_format.[ch] moved out of core, the aligning of vertex buffers does
not belong to core anymore.
---
src/gallium/drivers/ilo/core/ilo_buffer.h | 17 -
src/gallium/drivers/ilo/ilo_resource.c| 22 --
2 files changed, 20 insertions(+), 19 deletions(-)
diff --git a/src/gallium/drivers/ilo/core/ilo_buffer.h
b/src/gallium/drivers/ilo/core/ilo_buffer.h
index 99c7b01..ca3c61f 100644
--- a/src/gallium/drivers/ilo/core/ilo_buffer.h
+++ b/src/gallium/drivers/ilo/core/ilo_buffer.h
@@ -59,23 +59,6 @@ ilo_buffer_init(struct ilo_buffer *buf, const struct ilo_dev
*dev,
*/
if (bind PIPE_BIND_SAMPLER_VIEW)
buf-bo_size = align(buf-bo_size, 256) + 16;
-
- if ((bind PIPE_BIND_VERTEX_BUFFER) ilo_dev_gen(dev) ILO_GEN(7.5)) {
- /*
- * As noted in ilo_format_translate(), we treat some 3-component formats
- * as 4-component formats to work around hardware limitations. Imagine
- * the case where the vertex buffer holds a single
- * PIPE_FORMAT_R16G16B16_FLOAT vertex, and buf-bo_size is 6. The
- * hardware would fail to fetch it at boundary check because the vertex
- * buffer is expected to hold a PIPE_FORMAT_R16G16B16A16_FLOAT vertex
- * and that takes at least 8 bytes.
- *
- * For the workaround to work, we should add 2 to the bo size. But that
- * would waste a page when the bo size is already page aligned. Let's
- * round it to page size for now and revisit this when needed.
- */
- buf-bo_size = align(buf-bo_size, 4096);
- }
}
#endif /* ILO_BUFFER_H */
diff --git a/src/gallium/drivers/ilo/ilo_resource.c
b/src/gallium/drivers/ilo/ilo_resource.c
index b6f5d26..be9fd10 100644
--- a/src/gallium/drivers/ilo/ilo_resource.c
+++ b/src/gallium/drivers/ilo/ilo_resource.c
@@ -443,6 +443,7 @@ buf_create(struct pipe_screen *screen, const struct
pipe_resource *templ)
{
const struct ilo_screen *is = ilo_screen(screen);
struct ilo_buffer_resource *buf;
+ unsigned size;
buf = CALLOC_STRUCT(ilo_buffer_resource);
if (!buf)
@@ -452,8 +453,25 @@ buf_create(struct pipe_screen *screen, const struct
pipe_resource *templ)
buf-base.screen = screen;
pipe_reference_init(buf-base.reference, 1);
- ilo_buffer_init(buf-buffer, is-dev,
- templ-width0, templ-bind, templ-flags);
+ size = templ-width0;
+
+ /*
+* As noted in ilo_format_translate(), we treat some 3-component formats as
+* 4-component formats to work around hardware limitations. Imagine the
+* case where the vertex buffer holds a single PIPE_FORMAT_R16G16B16_FLOAT
+* vertex, and buf-bo_size is 6. The hardware would fail to fetch it at
+* boundary check because the vertex buffer is expected to hold a
+* PIPE_FORMAT_R16G16B16A16_FLOAT vertex and that takes at least 8 bytes.
+*
+* For the workaround to work, we should add 2 to the bo size. But that
+* would waste a page when the bo size is already page aligned. Let's
+* round it to page size for now and revisit this when needed.
+*/
+ if ((templ-bind PIPE_BIND_VERTEX_BUFFER)
+ ilo_dev_gen(is-dev) ILO_GEN(7.5))
+ size = align(size, 4096);
+
+ ilo_buffer_init(buf-buffer, is-dev, size, templ-bind, templ-flags);
if (buf-buffer.bo_size templ-width0 ||
buf-buffer.bo_size ilo_max_resource_size ||
___
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Mesa (master): ilo: emit 3DPRIMITIVE from gen6_3dprimitive_info
Module: Mesa
Branch: master
Commit: 878714142999ca6a6aa03d962e01da94d44c8574
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=878714142999ca6a6aa03d962e01da94d44c8574
Author: Chia-I Wu olva...@gmail.com
Date: Mon Jun 22 14:27:19 2015 +0800
ilo: emit 3DPRIMITIVE from gen6_3dprimitive_info
It allows us to remove ilo_ib_state::draw_start_offset and
ILO_PRIM_RECTANGLES. gen6_3d_translate_pipe_prim() is also replaced by
ilo_translate_draw_mode().
---
src/gallium/drivers/ilo/core/ilo_builder_3d.h | 54 +++
src/gallium/drivers/ilo/core/ilo_builder_3d_top.h | 29 ---
src/gallium/drivers/ilo/core/ilo_core.h |3 --
src/gallium/drivers/ilo/ilo_blitter.h |2 +-
src/gallium/drivers/ilo/ilo_blitter_rectlist.c|6 +--
src/gallium/drivers/ilo/ilo_render_gen.h |9 ++--
src/gallium/drivers/ilo/ilo_render_gen6.c |4 +-
src/gallium/drivers/ilo/ilo_render_gen7.c |4 +-
src/gallium/drivers/ilo/ilo_render_gen8.c |5 +-
src/gallium/drivers/ilo/ilo_state.c | 58 -
src/gallium/drivers/ilo/ilo_state.h |4 +-
11 files changed, 91 insertions(+), 87 deletions(-)
diff --git a/src/gallium/drivers/ilo/core/ilo_builder_3d.h
b/src/gallium/drivers/ilo/core/ilo_builder_3d.h
index 8d8a795..fb8b53c 100644
--- a/src/gallium/drivers/ilo/core/ilo_builder_3d.h
+++ b/src/gallium/drivers/ilo/core/ilo_builder_3d.h
@@ -35,41 +35,45 @@
#include ilo_builder_3d_top.h
#include ilo_builder_3d_bottom.h
+struct gen6_3dprimitive_info {
+ enum gen_3dprim_type topology;
+ bool indexed;
+
+ uint32_t vertex_count;
+ uint32_t vertex_start;
+ uint32_t instance_count;
+ uint32_t instance_start;
+ int32_t vertex_base;
+};
+
static inline void
gen6_3DPRIMITIVE(struct ilo_builder *builder,
- const struct pipe_draw_info *info,
- int64_t start_offset)
+ const struct gen6_3dprimitive_info *info)
{
const uint8_t cmd_len = 6;
- const int prim = gen6_3d_translate_pipe_prim(info-mode);
- const int vb_access = (info-indexed) ?
- GEN6_3DPRIM_DW0_ACCESS_RANDOM : GEN6_3DPRIM_DW0_ACCESS_SEQUENTIAL;
uint32_t *dw;
ILO_DEV_ASSERT(builder-dev, 6, 6);
ilo_builder_batch_pointer(builder, cmd_len, dw);
- dw[0] = GEN6_RENDER_CMD(3D, 3DPRIMITIVE) |
- vb_access |
- prim GEN6_3DPRIM_DW0_TYPE__SHIFT |
- (cmd_len - 2);
- dw[1] = info-count;
- dw[2] = info-start + start_offset;
+ dw[0] = GEN6_RENDER_CMD(3D, 3DPRIMITIVE) | (cmd_len - 2) |
+ info-topology GEN6_3DPRIM_DW0_TYPE__SHIFT;
+ if (info-indexed)
+ dw[0] |= GEN6_3DPRIM_DW0_ACCESS_RANDOM;
+
+ dw[1] = info-vertex_count;
+ dw[2] = info-vertex_start;
dw[3] = info-instance_count;
- dw[4] = info-start_instance;
- dw[5] = info-index_bias;
+ dw[4] = info-instance_start;
+ dw[5] = info-vertex_base;
}
static inline void
gen7_3DPRIMITIVE(struct ilo_builder *builder,
- const struct pipe_draw_info *info,
- int64_t start_offset)
+ const struct gen6_3dprimitive_info *info)
{
const uint8_t cmd_len = 7;
- const int prim = gen6_3d_translate_pipe_prim(info-mode);
- const int vb_access = (info-indexed) ?
- GEN7_3DPRIM_DW1_ACCESS_RANDOM : GEN7_3DPRIM_DW1_ACCESS_SEQUENTIAL;
uint32_t *dw;
ILO_DEV_ASSERT(builder-dev, 7, 8);
@@ -77,12 +81,16 @@ gen7_3DPRIMITIVE(struct ilo_builder *builder,
ilo_builder_batch_pointer(builder, cmd_len, dw);
dw[0] = GEN6_RENDER_CMD(3D, 3DPRIMITIVE) | (cmd_len - 2);
- dw[1] = vb_access | prim;
- dw[2] = info-count;
- dw[3] = info-start + start_offset;
+
+ dw[1] = info-topology GEN7_3DPRIM_DW1_TYPE__SHIFT;
+ if (info-indexed)
+ dw[1] |= GEN7_3DPRIM_DW1_ACCESS_RANDOM;
+
+ dw[2] = info-vertex_count;
+ dw[3] = info-vertex_start;
dw[4] = info-instance_count;
- dw[5] = info-start_instance;
- dw[6] = info-index_bias;
+ dw[5] = info-instance_start;
+ dw[6] = info-vertex_base;
}
#endif /* ILO_BUILDER_3D_H */
diff --git a/src/gallium/drivers/ilo/core/ilo_builder_3d_top.h
b/src/gallium/drivers/ilo/core/ilo_builder_3d_top.h
index 42d171f..8d30095 100644
--- a/src/gallium/drivers/ilo/core/ilo_builder_3d_top.h
+++ b/src/gallium/drivers/ilo/core/ilo_builder_3d_top.h
@@ -217,35 +217,6 @@ gen6_3DSTATE_VF_STATISTICS(struct ilo_builder *builder,
ilo_builder_batch_write(builder, cmd_len, dw0);
}
-/**
- * Translate a pipe primitive type to the matching hardware primitive type.
- */
-static inline int
-gen6_3d_translate_pipe_prim(unsigned prim)
-{
- static const int prim_mapping[ILO_PRIM_MAX] = {
- [PIPE_PRIM_POINTS] = GEN6_3DPRIM_POINTLIST,
- [PIPE_PRIM_LINES] = GEN6_3DPRIM_LINELIST,
- [PIPE_PRIM_LINE_LOOP] = GEN6_3DPRIM_LINELOOP,
- [PIPE_PRIM_LINE_STRIP
Mesa (master): ilo: add ilo_state_surface_valid_format()
Module: Mesa
Branch: master
Commit: 3547bb078307995e92d509037bc86af7fd60c8c3
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=3547bb078307995e92d509037bc86af7fd60c8c3
Author: Chia-I Wu olva...@gmail.com
Date: Mon Jun 22 13:37:05 2015 +0800
ilo: add ilo_state_surface_valid_format()
Check if a surface format can be used for the specified access type.
---
src/gallium/drivers/ilo/Makefile.sources |1 +
src/gallium/drivers/ilo/core/ilo_format.c | 291 +---
src/gallium/drivers/ilo/core/ilo_state_surface.h |5 +
.../drivers/ilo/core/ilo_state_surface_format.c| 351
4 files changed, 364 insertions(+), 284 deletions(-)
diff --git a/src/gallium/drivers/ilo/Makefile.sources
b/src/gallium/drivers/ilo/Makefile.sources
index 95b6b7a..ed024e3 100644
--- a/src/gallium/drivers/ilo/Makefile.sources
+++ b/src/gallium/drivers/ilo/Makefile.sources
@@ -35,6 +35,7 @@ C_SOURCES := \
core/ilo_state_sol.c \
core/ilo_state_sol.h \
core/ilo_state_surface.c \
+ core/ilo_state_surface_format.c \
core/ilo_state_surface.h \
core/ilo_state_urb.c \
core/ilo_state_urb.h \
diff --git a/src/gallium/drivers/ilo/core/ilo_format.c
b/src/gallium/drivers/ilo/core/ilo_format.c
index c1b001b..b96f71c 100644
--- a/src/gallium/drivers/ilo/core/ilo_format.c
+++ b/src/gallium/drivers/ilo/core/ilo_format.c
@@ -26,264 +26,10 @@
*/
#include genhw/genhw.h
+#include ilo_state_surface.h
#include ilo_state_vf.h
#include ilo_format.h
-struct ilo_sol_cap {
- int buffer;
-};
-
-struct ilo_sampler_cap {
- int sampling;
- int filtering;
- int shadow_map;
- int chroma_key;
-};
-
-struct ilo_dp_cap {
- int rt_write;
- int rt_write_blending;
- int typed_write;
- int media_color_processing;
-};
-
-/*
- * This table is based on:
- *
- * - the Sandy Bridge PRM, volume 4 part 1, page 88-97
- * - the Ivy Bridge PRM, volume 2 part 1, page 195
- * - the Haswell PRM, volume 7, page 535
- */
-static const struct ilo_sol_cap ilo_sol_caps[] = {
-#define CAP(buffer) { ILO_GEN(buffer) }
- [GEN6_FORMAT_R32G32B32A32_FLOAT] = CAP( 1),
- [GEN6_FORMAT_R32G32B32A32_SINT]= CAP( 1),
- [GEN6_FORMAT_R32G32B32A32_UINT]= CAP( 1),
- [GEN6_FORMAT_R32G32B32_FLOAT] = CAP( 1),
- [GEN6_FORMAT_R32G32B32_SINT] = CAP( 1),
- [GEN6_FORMAT_R32G32B32_UINT] = CAP( 1),
- [GEN6_FORMAT_R32G32_FLOAT] = CAP( 1),
- [GEN6_FORMAT_R32G32_SINT] = CAP( 1),
- [GEN6_FORMAT_R32G32_UINT] = CAP( 1),
- [GEN6_FORMAT_R32_SINT] = CAP( 1),
- [GEN6_FORMAT_R32_UINT] = CAP( 1),
- [GEN6_FORMAT_R32_FLOAT]= CAP( 1),
-#undef CAP
-};
-
-/*
- * This table is based on:
- *
- * - the Sandy Bridge PRM, volume 4 part 1, page 88-97
- * - the Ivy Bridge PRM, volume 4 part 1, page 84-87
- */
-static const struct ilo_sampler_cap ilo_sampler_caps[] = {
-#define CAP(sampling, filtering, shadow_map, chroma_key) \
- { ILO_GEN(sampling), ILO_GEN(filtering), ILO_GEN(shadow_map),
ILO_GEN(chroma_key) }
- [GEN6_FORMAT_R32G32B32A32_FLOAT] = CAP( 1, 5, 0, 0),
- [GEN6_FORMAT_R32G32B32A32_SINT]= CAP( 1, 0, 0, 0),
- [GEN6_FORMAT_R32G32B32A32_UINT]= CAP( 1, 0, 0, 0),
- [GEN6_FORMAT_R32G32B32X32_FLOAT] = CAP( 1, 5, 0, 0),
- [GEN6_FORMAT_R32G32B32_FLOAT] = CAP( 1, 5, 0, 0),
- [GEN6_FORMAT_R32G32B32_SINT] = CAP( 1, 0, 0, 0),
- [GEN6_FORMAT_R32G32B32_UINT] = CAP( 1, 0, 0, 0),
- [GEN6_FORMAT_R16G16B16A16_UNORM] = CAP( 1, 1, 0, 0),
- [GEN6_FORMAT_R16G16B16A16_SNORM] = CAP( 1, 1, 0, 0),
- [GEN6_FORMAT_R16G16B16A16_SINT]= CAP( 1, 0, 0, 0),
- [GEN6_FORMAT_R16G16B16A16_UINT]= CAP( 1, 0, 0, 0),
- [GEN6_FORMAT_R16G16B16A16_FLOAT] = CAP( 1, 1, 0, 0),
- [GEN6_FORMAT_R32G32_FLOAT] = CAP( 1, 5, 0, 0),
- [GEN6_FORMAT_R32G32_SINT] = CAP( 1, 0, 0, 0),
- [GEN6_FORMAT_R32G32_UINT] = CAP( 1, 0, 0, 0),
- [GEN6_FORMAT_R32_FLOAT_X8X24_TYPELESS] = CAP( 1, 5, 1, 0),
- [GEN6_FORMAT_X32_TYPELESS_G8X24_UINT] = CAP( 1, 0, 0, 0),
- [GEN6_FORMAT_L32A32_FLOAT] = CAP( 1, 5, 0, 0),
- [GEN6_FORMAT_R16G16B16X16_UNORM] = CAP( 1, 1, 0, 0),
- [GEN6_FORMAT_R16G16B16X16_FLOAT] = CAP( 1, 1, 0, 0),
- [GEN6_FORMAT_A32X32_FLOAT] = CAP( 1, 5, 0, 0),
- [GEN6_FORMAT_L32X32_FLOAT] = CAP( 1, 5, 0, 0),
- [GEN6_FORMAT_I32X32_FLOAT] = CAP( 1, 5, 0, 0),
- [GEN6_FORMAT_B8G8R8A8_UNORM] = CAP( 1, 1, 0, 1),
- [GEN6_FORMAT_B8G8R8A8_UNORM_SRGB] = CAP( 1, 1, 0, 0),
- [GEN6_FORMAT_R10G10B10A2_UNORM]= CAP( 1, 1, 0, 0
Mesa (master): ilo: add ilo_state_compute
Module: Mesa
Branch: master
Commit: 57bdcae9e0fbf639014cd375543a8dd356406ac0
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=57bdcae9e0fbf639014cd375543a8dd356406ac0
Author: Chia-I Wu olva...@gmail.com
Date: Sat Jun 20 23:27:08 2015 +0800
ilo: add ilo_state_compute
Replace gen6_idrt_data with ilo_state_compute, which has a bunch of
validations and is now preferred.
---
src/gallium/drivers/ilo/Makefile.sources |2 +
src/gallium/drivers/ilo/core/ilo_builder_media.h | 106 ++
src/gallium/drivers/ilo/core/ilo_state_compute.c | 435 ++
src/gallium/drivers/ilo/core/ilo_state_compute.h | 92 +
src/gallium/drivers/ilo/ilo_render_dynamic.c | 36 +-
src/gallium/drivers/ilo/ilo_render_gen.h |3 +
src/gallium/drivers/ilo/ilo_render_media.c |3 +-
src/gallium/drivers/ilo/ilo_state.h |1 +
8 files changed, 586 insertions(+), 92 deletions(-)
diff --git a/src/gallium/drivers/ilo/Makefile.sources
b/src/gallium/drivers/ilo/Makefile.sources
index e5a0950..95b6b7a 100644
--- a/src/gallium/drivers/ilo/Makefile.sources
+++ b/src/gallium/drivers/ilo/Makefile.sources
@@ -21,6 +21,8 @@ C_SOURCES := \
core/ilo_image.h \
core/ilo_state_cc.c \
core/ilo_state_cc.h \
+ core/ilo_state_compute.c \
+ core/ilo_state_compute.h \
core/ilo_state_raster.c \
core/ilo_state_raster.h \
core/ilo_state_sampler.c \
diff --git a/src/gallium/drivers/ilo/core/ilo_builder_media.h
b/src/gallium/drivers/ilo/core/ilo_builder_media.h
index 7fbe6d4..7197104 100644
--- a/src/gallium/drivers/ilo/core/ilo_builder_media.h
+++ b/src/gallium/drivers/ilo/core/ilo_builder_media.h
@@ -29,57 +29,30 @@
#define ILO_BUILDER_MEDIA_H
#include genhw/genhw.h
-#include ../ilo_shader.h
#include intel_winsys.h
#include ilo_core.h
#include ilo_dev.h
+#include ilo_state_compute.h
#include ilo_builder.h
-struct gen6_idrt_data {
- const struct ilo_shader_state *cs;
-
- uint32_t sampler_offset;
- uint32_t binding_table_offset;
-
- unsigned curbe_size;
- unsigned thread_group_size;
-};
-
static inline void
gen6_MEDIA_VFE_STATE(struct ilo_builder *builder,
- unsigned curbe_alloc, bool use_slm)
+ const struct ilo_state_compute *compute)
{
const uint8_t cmd_len = 8;
- const unsigned idrt_alloc =
- ((ilo_dev_gen(builder-dev) = ILO_GEN(7.5)) ? 64 : 32) * 32;
- int max_threads;
uint32_t *dw;
- ILO_DEV_ASSERT(builder-dev, 7, 7.5);
-
- max_threads = builder-dev-thread_count;
-
- curbe_alloc = align(curbe_alloc, 32);
- assert(idrt_alloc + curbe_alloc = builder-dev-urb_size / (use_slm + 1));
+ ILO_DEV_ASSERT(builder-dev, 6, 7.5);
ilo_builder_batch_pointer(builder, cmd_len, dw);
dw[0] = GEN6_RENDER_CMD(MEDIA, MEDIA_VFE_STATE) | (cmd_len - 2);
- dw[1] = 0; /* scratch */
-
- dw[2] = (max_threads - 1) GEN6_VFE_DW2_MAX_THREADS__SHIFT |
- 0 GEN6_VFE_DW2_URB_ENTRY_COUNT__SHIFT |
- GEN6_VFE_DW2_RESET_GATEWAY_TIMER |
- GEN6_VFE_DW2_BYPASS_GATEWAY_CONTROL;
- if (ilo_dev_gen(builder-dev) = ILO_GEN(7))
- dw[2] |= GEN7_VFE_DW2_GPGPU_MODE;
-
+ /* see compute_set_gen6_MEDIA_VFE_STATE() */
+ dw[1] = compute-vfe[0];
+ dw[2] = compute-vfe[1];
dw[3] = 0;
-
- dw[4] = 0 GEN6_VFE_DW4_URB_ENTRY_SIZE__SHIFT |
- (curbe_alloc / 32);
-
+ dw[4] = compute-vfe[2];
dw[5] = 0;
dw[6] = 0;
dw[7] = 0;
@@ -194,8 +167,10 @@ gen7_GPGPU_WALKER(struct ilo_builder *builder,
static inline uint32_t
gen6_INTERFACE_DESCRIPTOR_DATA(struct ilo_builder *builder,
- const struct gen6_idrt_data *data,
- int idrt_count)
+ const struct ilo_state_compute *compute,
+ const uint32_t *kernel_offsets,
+ const uint32_t *sampler_offsets,
+ const uint32_t *binding_table_offsets)
{
/*
* From the Sandy Bridge PRM, volume 2 part 2, page 34:
@@ -211,61 +186,26 @@ gen6_INTERFACE_DESCRIPTOR_DATA(struct ilo_builder
*builder,
* aligned address of the Interface Descriptor data.
*/
const int state_align = 32;
- const int state_len = (32 / 4) * idrt_count;
+ const int state_len = (32 / 4) * compute-idrt_count;
uint32_t state_offset, *dw;
int i;
- ILO_DEV_ASSERT(builder-dev, 7, 7.5);
+ ILO_DEV_ASSERT(builder-dev, 6, 7.5);
state_offset = ilo_builder_dynamic_pointer(builder,
ILO_BUILDER_ITEM_INTERFACE_DESCRIPTOR, state_align, state_len, dw);
- for (i = 0; i idrt_count; i++) {
- const struct gen6_idrt_data *idrt = data[i];
- const struct ilo_shader_state *cs = idrt-cs;
- unsigned sampler_count, bt_size, slm_size;
-
- sampler_count =
- ilo_shader_get_kernel_param(cs, ILO_KERNEL_SAMPLER_COUNT);
- assert(sampler_count = 16
Mesa (master): ilo: add ilo_state_index_buffer
Module: Mesa
Branch: master
Commit: 9904e647cca0a15c80557ed7bcc6893faf147436
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=9904e647cca0a15c80557ed7bcc6893faf147436
Author: Chia-I Wu olva...@gmail.com
Date: Fri Jun 19 15:10:02 2015 +0800
ilo: add ilo_state_index_buffer
It serves the same purpose as ilo_state_vertex_buffer does.
---
src/gallium/drivers/ilo/core/ilo_builder_3d_top.h | 95 ++-
src/gallium/drivers/ilo/core/ilo_state_vf.c | 104 +
src/gallium/drivers/ilo/core/ilo_state_vf.h | 22 +
src/gallium/drivers/ilo/ilo_render_gen6.c |4 +-
src/gallium/drivers/ilo/ilo_render_gen8.c |2 +-
src/gallium/drivers/ilo/ilo_state.c | 13 +++
src/gallium/drivers/ilo/ilo_state.h |1 +
7 files changed, 171 insertions(+), 70 deletions(-)
diff --git a/src/gallium/drivers/ilo/core/ilo_builder_3d_top.h
b/src/gallium/drivers/ilo/core/ilo_builder_3d_top.h
index bb20c7f..6a45d70 100644
--- a/src/gallium/drivers/ilo/core/ilo_builder_3d_top.h
+++ b/src/gallium/drivers/ilo/core/ilo_builder_3d_top.h
@@ -437,102 +437,63 @@ gen6_3DSTATE_VERTEX_ELEMENTS(struct ilo_builder *builder,
static inline void
gen6_3DSTATE_INDEX_BUFFER(struct ilo_builder *builder,
const struct ilo_state_vf *vf,
- const struct ilo_ib_state *ib)
+ const struct ilo_state_index_buffer *ib)
{
const uint8_t cmd_len = 3;
- struct ilo_buffer *buf = ilo_buffer(ib-hw_resource);
- uint32_t start_offset, end_offset;
- enum gen_index_format format;
- uint32_t *dw;
+ uint32_t dw0, *dw;
unsigned pos;
ILO_DEV_ASSERT(builder-dev, 6, 7.5);
- if (!buf)
- return;
-
- switch (ib-hw_index_size) {
- case 4:
- format = GEN6_INDEX_DWORD;
- break;
- case 2:
- format = GEN6_INDEX_WORD;
- break;
- case 1:
- format = GEN6_INDEX_BYTE;
- break;
- default:
- assert(!unknown index size);
- format = GEN6_INDEX_BYTE;
- break;
- }
+ dw0 = GEN6_RENDER_CMD(3D, 3DSTATE_INDEX_BUFFER) | (cmd_len - 2) |
+ builder-mocs GEN6_IB_DW0_MOCS__SHIFT;
/*
-* set start_offset to 0 here and adjust pipe_draw_info::start with
-* ib-draw_start_offset in 3DPRIMITIVE
+* see index_buffer_set_gen8_3DSTATE_INDEX_BUFFER() and
+* vf_params_set_gen6_3dstate_index_buffer()
*/
- start_offset = 0;
- end_offset = buf-bo_size;
-
- /* end_offset must also be aligned and is inclusive */
- end_offset -= (end_offset % ib-hw_index_size);
- end_offset--;
+ dw0 |= ib-ib[0];
+ if (ilo_dev_gen(builder-dev) = ILO_GEN(7))
+ dw0 |= vf-cut[0];
pos = ilo_builder_batch_pointer(builder, cmd_len, dw);
- dw[0] = GEN6_RENDER_CMD(3D, 3DSTATE_INDEX_BUFFER) | (cmd_len - 2) |
- builder-mocs GEN6_IB_DW0_MOCS__SHIFT |
- format GEN6_IB_DW0_FORMAT__SHIFT;
-
- /* see vf_params_set_gen6_3dstate_index_buffer() */
- if (ilo_dev_gen(builder-dev) = ILO_GEN(7))
- dw[0] |= vf-cut[0];
-
- ilo_builder_batch_reloc(builder, pos + 1, buf-bo, start_offset, 0);
- ilo_builder_batch_reloc(builder, pos + 2, buf-bo, end_offset, 0);
+ dw[0] = dw0;
+ if (ib-need_bo) {
+ ilo_builder_batch_reloc(builder, pos + 1, ib-bo, ib-ib[1], 0);
+ ilo_builder_batch_reloc(builder, pos + 2, ib-bo, ib-ib[2], 0);
+ } else {
+ dw[1] = 0;
+ dw[2] = 0;
+ }
}
static inline void
gen8_3DSTATE_INDEX_BUFFER(struct ilo_builder *builder,
const struct ilo_state_vf *vf,
- const struct ilo_ib_state *ib)
+ const struct ilo_state_index_buffer *ib)
{
const uint8_t cmd_len = 5;
- struct ilo_buffer *buf = ilo_buffer(ib-hw_resource);
- int format;
uint32_t *dw;
unsigned pos;
ILO_DEV_ASSERT(builder-dev, 8, 8);
- if (!buf)
- return;
-
- switch (ib-hw_index_size) {
- case 4:
- format = GEN6_INDEX_DWORD;
- break;
- case 2:
- format = GEN6_INDEX_WORD;
- break;
- case 1:
- format = GEN6_INDEX_BYTE;
- break;
- default:
- assert(!unknown index size);
- format = GEN6_INDEX_BYTE;
- break;
- }
-
pos = ilo_builder_batch_pointer(builder, cmd_len, dw);
dw[0] = GEN6_RENDER_CMD(3D, 3DSTATE_INDEX_BUFFER) | (cmd_len - 2);
- dw[1] = format GEN8_IB_DW1_FORMAT__SHIFT |
+ /* see index_buffer_set_gen8_3DSTATE_INDEX_BUFFER() */
+ dw[1] = ib-ib[0] |
builder-mocs GEN8_IB_DW1_MOCS__SHIFT;
- dw[4] = buf-bo_size;
- /* ignore ib-offset here in favor of adjusting 3DPRIMITIVE */
- ilo_builder_batch_reloc64(builder, pos + 2, buf-bo, 0, 0);
+ if (ib-need_bo) {
+ ilo_builder_batch_reloc64(builder, pos + 2, ib-bo, ib-ib[1], 0);
+ } else {
+ dw[2] = 0;
+ dw[3] = 0;
+ }
+
+ dw[4] = ib-ib[2];
}
static inline void
diff --git a/src/gallium/drivers/ilo/core/ilo_state_vf.c
b/src/gallium
Mesa (master): ilo: embed pipe_index_buffer in ilo_ib_state
Module: Mesa
Branch: master
Commit: 7b3432b62d25494b3662d12634e34d75e29ec865
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=7b3432b62d25494b3662d12634e34d75e29ec865
Author: Chia-I Wu olva...@gmail.com
Date: Thu Jun 18 13:55:32 2015 +0800
ilo: embed pipe_index_buffer in ilo_ib_state
Make it obvious that we save a copy of pipe_index_buffer.
---
src/gallium/drivers/ilo/ilo_draw.c | 20 ++--
src/gallium/drivers/ilo/ilo_state.c | 60 +--
src/gallium/drivers/ilo/ilo_state.h |5 +--
3 files changed, 40 insertions(+), 45 deletions(-)
diff --git a/src/gallium/drivers/ilo/ilo_draw.c
b/src/gallium/drivers/ilo/ilo_draw.c
index fc91fd3..e8e1a4c 100644
--- a/src/gallium/drivers/ilo/ilo_draw.c
+++ b/src/gallium/drivers/ilo/ilo_draw.c
@@ -452,12 +452,12 @@ draw_vbo_with_sw_restart(struct ilo_context *ilo,
} u;
/* we will draw with IB mapped */
- if (ib-buffer) {
- u.ptr = intel_bo_map(ilo_buffer(ib-buffer)-bo, false);
+ if (ib-state.buffer) {
+ u.ptr = intel_bo_map(ilo_buffer(ib-state.buffer)-bo, false);
if (u.ptr)
- u.u8 += ib-offset;
+ u.u8 += ib-state.offset;
} else {
- u.ptr = ib-user_buffer;
+ u.ptr = ib-state.user_buffer;
}
if (!u.ptr)
@@ -483,7 +483,7 @@ draw_vbo_with_sw_restart(struct ilo_context *ilo,
(pipe)-draw_vbo(pipe, subinfo); \
} while (0)
- switch (ib-index_size) {
+ switch (ib-state.index_size) {
case 1:
DRAW_VBO_WITH_SW_RESTART(ilo-base, info, u.u8);
break;
@@ -500,8 +500,8 @@ draw_vbo_with_sw_restart(struct ilo_context *ilo,
#undef DRAW_VBO_WITH_SW_RESTART
- if (ib-buffer)
- intel_bo_unmap(ilo_buffer(ib-buffer)-bo);
+ if (ib-state.buffer)
+ intel_bo_unmap(ilo_buffer(ib-state.buffer)-bo);
}
static bool
@@ -511,9 +511,9 @@ draw_vbo_need_sw_restart(const struct ilo_context *ilo,
/* the restart index is fixed prior to GEN7.5 */
if (ilo_dev_gen(ilo-dev) ILO_GEN(7.5)) {
const unsigned cut_index =
- (ilo-state_vector.ib.index_size == 1) ? 0xff :
- (ilo-state_vector.ib.index_size == 2) ? 0x :
- (ilo-state_vector.ib.index_size == 4) ? 0x : 0;
+ (ilo-state_vector.ib.state.index_size == 1) ? 0xff :
+ (ilo-state_vector.ib.state.index_size == 2) ? 0x :
+ (ilo-state_vector.ib.state.index_size == 4) ? 0x : 0;
if (info-restart_index cut_index)
return true;
diff --git a/src/gallium/drivers/ilo/ilo_state.c
b/src/gallium/drivers/ilo/ilo_state.c
index 84fd799..0b16f3b 100644
--- a/src/gallium/drivers/ilo/ilo_state.c
+++ b/src/gallium/drivers/ilo/ilo_state.c
@@ -368,7 +368,8 @@ finalize_index_buffer(struct ilo_context *ilo)
{
struct ilo_state_vector *vec = ilo-state_vector;
const bool need_upload = (vec-draw-indexed
- (vec-ib.user_buffer || vec-ib.offset % vec-ib.index_size));
+ (vec-ib.state.user_buffer ||
+ vec-ib.state.offset % vec-ib.state.index_size));
struct pipe_resource *current_hw_res = NULL;
if (!(vec-dirty ILO_DIRTY_IB) !need_upload)
@@ -377,45 +378,47 @@ finalize_index_buffer(struct ilo_context *ilo)
pipe_resource_reference(current_hw_res, vec-ib.hw_resource);
if (need_upload) {
- const unsigned offset = vec-ib.index_size * vec-draw-start;
- const unsigned size = vec-ib.index_size * vec-draw-count;
+ const unsigned offset = vec-ib.state.index_size * vec-draw-start;
+ const unsigned size = vec-ib.state.index_size * vec-draw-count;
unsigned hw_offset;
- if (vec-ib.user_buffer) {
+ if (vec-ib.state.user_buffer) {
u_upload_data(ilo-uploader, 0, size,
- vec-ib.user_buffer + offset, hw_offset, vec-ib.hw_resource);
- }
- else {
- u_upload_buffer(ilo-uploader, 0, vec-ib.offset + offset, size,
- vec-ib.buffer, hw_offset, vec-ib.hw_resource);
+ vec-ib.state.user_buffer + offset,
+ hw_offset, vec-ib.hw_resource);
+ } else {
+ u_upload_buffer(ilo-uploader, 0,
+ vec-ib.state.offset + offset, size, vec-ib.state.buffer,
+ hw_offset, vec-ib.hw_resource);
}
/* the HW offset should be aligned */
- assert(hw_offset % vec-ib.index_size == 0);
- vec-ib.draw_start_offset = hw_offset / vec-ib.index_size;
+ assert(hw_offset % vec-ib.state.index_size == 0);
+ vec-ib.draw_start_offset = hw_offset / vec-ib.state.index_size;
/*
* INDEX[vec-draw-start] in the original buffer is INDEX[0] in the HW
* resource
*/
vec-ib.draw_start_offset -= vec-draw-start;
- }
- else {
- pipe_resource_reference(vec-ib.hw_resource, vec-ib.buffer);
+ } else {
+ pipe_resource_reference(vec-ib.hw_resource, vec-ib.state.buffer);
/* note that index size may be zero when the draw is not indexed */
- if (vec-draw-indexed
Mesa (master): ilo: add 3DSTATE_VF_INSTANCING to ilo_state_vf
Module: Mesa
Branch: master
Commit: 4555211028394673f8ad68f3de9c12e9a1f93160
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=4555211028394673f8ad68f3de9c12e9a1f93160
Author: Chia-I Wu olva...@gmail.com
Date: Thu Jun 18 14:26:29 2015 +0800
ilo: add 3DSTATE_VF_INSTANCING to ilo_state_vf
3DSTATE_VF_INSTANCING specifies instancing enable and step rate. They are
specified along with 3DSTATE_VERTEX_BUFFERS instead prior to Gen8. Both
commands are added.
---
src/gallium/drivers/ilo/core/ilo_builder_3d_top.h | 50 +
src/gallium/drivers/ilo/core/ilo_state_vf.c | 117 +
src/gallium/drivers/ilo/core/ilo_state_vf.h | 26 +++--
src/gallium/drivers/ilo/genhw/gen_render_3d.xml.h |4 +-
src/gallium/drivers/ilo/ilo_blitter.h |2 +-
src/gallium/drivers/ilo/ilo_render_gen6.c |7 +-
src/gallium/drivers/ilo/ilo_render_gen8.c | 18 ++--
src/gallium/drivers/ilo/ilo_state.c |8 +-
src/gallium/drivers/ilo/ilo_state.h |3 +-
9 files changed, 168 insertions(+), 67 deletions(-)
diff --git a/src/gallium/drivers/ilo/core/ilo_builder_3d_top.h
b/src/gallium/drivers/ilo/core/ilo_builder_3d_top.h
index e4ee9cf..7827465 100644
--- a/src/gallium/drivers/ilo/core/ilo_builder_3d_top.h
+++ b/src/gallium/drivers/ilo/core/ilo_builder_3d_top.h
@@ -264,7 +264,8 @@ gen8_3DSTATE_VF_TOPOLOGY(struct ilo_builder *builder,
static inline void
gen8_3DSTATE_VF_INSTANCING(struct ilo_builder *builder,
- int vb_index, uint32_t step_rate)
+ const struct ilo_state_vf *vf,
+ uint32_t attr)
{
const uint8_t cmd_len = 3;
uint32_t *dw;
@@ -274,10 +275,15 @@ gen8_3DSTATE_VF_INSTANCING(struct ilo_builder *builder,
ilo_builder_batch_pointer(builder, cmd_len, dw);
dw[0] = GEN8_RENDER_CMD(3D, 3DSTATE_VF_INSTANCING) | (cmd_len - 2);
- dw[1] = vb_index;
- if (step_rate)
- dw[1] |= GEN8_INSTANCING_DW1_ENABLE;
- dw[2] = step_rate;
+ dw[1] = attr GEN8_INSTANCING_DW1_VE_INDEX__SHIFT;
+ dw[2] = 0;
+ /* see vf_set_gen8_3DSTATE_VF_INSTANCING() */
+ if (attr = vf-internal_ve_count) {
+ attr -= vf-internal_ve_count;
+
+ dw[1] |= vf-user_instancing[attr][0];
+ dw[2] |= vf-user_instancing[attr][1];
+ }
}
static inline void
@@ -298,9 +304,9 @@ gen8_3DSTATE_VF_SGVS(struct ilo_builder *builder,
static inline void
gen6_3DSTATE_VERTEX_BUFFERS(struct ilo_builder *builder,
+const struct ilo_state_vf *vf,
const struct ilo_vb_state *vb,
const unsigned *vb_mapping,
-const unsigned *instance_divisors,
unsigned vb_count)
{
uint8_t cmd_len;
@@ -327,9 +333,9 @@ gen6_3DSTATE_VERTEX_BUFFERS(struct ilo_builder *builder,
pos++;
for (hw_idx = 0; hw_idx vb_count; hw_idx++) {
- const unsigned instance_divisor = instance_divisors[hw_idx];
const unsigned pipe_idx = vb_mapping[hw_idx];
const struct pipe_vertex_buffer *cso = vb-states[pipe_idx];
+ const int8_t elem = vf-vb_to_first_elem[hw_idx];
dw[0] = hw_idx GEN6_VB_DW0_INDEX__SHIFT;
@@ -341,19 +347,19 @@ gen6_3DSTATE_VERTEX_BUFFERS(struct ilo_builder *builder,
if (ilo_dev_gen(builder-dev) = ILO_GEN(7))
dw[0] |= GEN7_VB_DW0_ADDR_MODIFIED;
- if (instance_divisor)
- dw[0] |= GEN6_VB_DW0_ACCESS_INSTANCEDATA;
- else
- dw[0] |= GEN6_VB_DW0_ACCESS_VERTEXDATA;
+ dw[1] = 0;
+ dw[2] = 0;
+ dw[3] = 0;
- /* use null vb if there is no buffer or the stride is out of range */
- if (!cso-buffer || cso-stride 2048) {
- dw[0] |= GEN6_VB_DW0_IS_NULL;
- dw[1] = 0;
- dw[2] = 0;
- dw[3] = (ilo_dev_gen(builder-dev) = ILO_GEN(8)) ?
-0 : instance_divisor;
+ /* see vf_set_gen6_vertex_buffer_state() */
+ if (ilo_dev_gen(builder-dev) ILO_GEN(8) elem = 0) {
+ dw[0] |= vf-user_instancing[elem][0];
+ dw[3] |= vf-user_instancing[elem][1];
+ }
+ /* use null vb if there is no VE/buffer or the stride is out of range */
+ if (elem 0 || !cso-buffer || cso-stride 2048) {
+ dw[0] |= GEN6_VB_DW0_IS_NULL;
continue;
}
@@ -371,8 +377,6 @@ gen6_3DSTATE_VERTEX_BUFFERS(struct ilo_builder *builder,
const uint32_t start_offset = cso-buffer_offset;
const uint32_t end_offset = buf-bo_size - 1;
- dw[3] = instance_divisor;
-
ilo_builder_batch_reloc(builder, pos + 1, buf-bo, start_offset, 0);
ilo_builder_batch_reloc(builder, pos + 2, buf-bo, end_offset, 0);
}
@@ -431,12 +435,16 @@ gen6_3DSTATE_VERTEX_ELEMENTS(struct ilo_builder *builder,
dw[0] = GEN6_RENDER_CMD(3D, 3DSTATE_VERTEX_ELEMENTS) | (cmd_len - 2);
dw++;
- /* see vf_set_gen6_3DSTATE_VERTEX_ELEMENTS
Mesa (master): ilo: add 3DSTATE_VF to ilo_state_vf
Module: Mesa
Branch: master
Commit: e8d297b7a108fcf1cb688fe1db89e83b8f85e091
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=e8d297b7a108fcf1cb688fe1db89e83b8f85e091
Author: Chia-I Wu olva...@gmail.com
Date: Tue Jun 16 23:11:06 2015 +0800
ilo: add 3DSTATE_VF to ilo_state_vf
3DSTATE_VF specifies cut index enable and cut index. Cut index enable is
specified in 3DSTATE_INDEX_BUFFER instead prior to Gen7.5. Both commands are
added.
---
src/gallium/drivers/ilo/core/ilo_builder_3d_top.h | 49 +
src/gallium/drivers/ilo/core/ilo_state_vf.c | 109 -
src/gallium/drivers/ilo/core/ilo_state_vf.h | 13 ++-
src/gallium/drivers/ilo/genhw/gen_render_3d.xml.h | 12 +--
src/gallium/drivers/ilo/ilo_render.c |4 -
src/gallium/drivers/ilo/ilo_render_gen.h |2 -
src/gallium/drivers/ilo/ilo_render_gen6.c | 24 ++---
src/gallium/drivers/ilo/ilo_render_gen8.c | 11 +--
src/gallium/drivers/ilo/ilo_state.c | 32 +-
9 files changed, 190 insertions(+), 66 deletions(-)
diff --git a/src/gallium/drivers/ilo/core/ilo_builder_3d_top.h
b/src/gallium/drivers/ilo/core/ilo_builder_3d_top.h
index bfd9434..e4ee9cf 100644
--- a/src/gallium/drivers/ilo/core/ilo_builder_3d_top.h
+++ b/src/gallium/drivers/ilo/core/ilo_builder_3d_top.h
@@ -190,8 +190,7 @@ gen7_3DSTATE_URB_GS(struct ilo_builder *builder,
static inline void
gen75_3DSTATE_VF(struct ilo_builder *builder,
- bool enable_cut_index,
- uint32_t cut_index)
+ const struct ilo_state_vf *vf)
{
const uint8_t cmd_len = 2;
uint32_t *dw;
@@ -200,11 +199,10 @@ gen75_3DSTATE_VF(struct ilo_builder *builder,
ilo_builder_batch_pointer(builder, cmd_len, dw);
- dw[0] = GEN75_RENDER_CMD(3D, 3DSTATE_VF) | (cmd_len - 2);
- if (enable_cut_index)
- dw[0] |= GEN75_VF_DW0_CUT_INDEX_ENABLE;
-
- dw[1] = cut_index;
+ /* see vf_params_set_gen75_3DSTATE_VF() */
+ dw[0] = GEN75_RENDER_CMD(3D, 3DSTATE_VF) | (cmd_len - 2) |
+ vf-cut[0];
+ dw[1] = vf-cut[1];
}
static inline void
@@ -444,13 +442,13 @@ gen6_3DSTATE_VERTEX_ELEMENTS(struct ilo_builder *builder,
static inline void
gen6_3DSTATE_INDEX_BUFFER(struct ilo_builder *builder,
- const struct ilo_ib_state *ib,
- bool enable_cut_index)
+ const struct ilo_state_vf *vf,
+ const struct ilo_ib_state *ib)
{
const uint8_t cmd_len = 3;
struct ilo_buffer *buf = ilo_buffer(ib-hw_resource);
uint32_t start_offset, end_offset;
- int format;
+ enum gen_index_format format;
uint32_t *dw;
unsigned pos;
@@ -459,23 +457,19 @@ gen6_3DSTATE_INDEX_BUFFER(struct ilo_builder *builder,
if (!buf)
return;
- /* this is moved to the new 3DSTATE_VF */
- if (ilo_dev_gen(builder-dev) = ILO_GEN(7.5))
- assert(!enable_cut_index);
-
switch (ib-hw_index_size) {
case 4:
- format = GEN6_IB_DW0_FORMAT_DWORD;
+ format = GEN6_INDEX_DWORD;
break;
case 2:
- format = GEN6_IB_DW0_FORMAT_WORD;
+ format = GEN6_INDEX_WORD;
break;
case 1:
- format = GEN6_IB_DW0_FORMAT_BYTE;
+ format = GEN6_INDEX_BYTE;
break;
default:
assert(!unknown index size);
- format = GEN6_IB_DW0_FORMAT_BYTE;
+ format = GEN6_INDEX_BYTE;
break;
}
@@ -494,9 +488,11 @@ gen6_3DSTATE_INDEX_BUFFER(struct ilo_builder *builder,
dw[0] = GEN6_RENDER_CMD(3D, 3DSTATE_INDEX_BUFFER) | (cmd_len - 2) |
builder-mocs GEN6_IB_DW0_MOCS__SHIFT |
- format;
- if (enable_cut_index)
- dw[0] |= GEN6_IB_DW0_CUT_INDEX_ENABLE;
+ format GEN6_IB_DW0_FORMAT__SHIFT;
+
+ /* see vf_params_set_gen6_3dstate_index_buffer() */
+ if (ilo_dev_gen(builder-dev) = ILO_GEN(7))
+ dw[0] |= vf-cut[0];
ilo_builder_batch_reloc(builder, pos + 1, buf-bo, start_offset, 0);
ilo_builder_batch_reloc(builder, pos + 2, buf-bo, end_offset, 0);
@@ -504,6 +500,7 @@ gen6_3DSTATE_INDEX_BUFFER(struct ilo_builder *builder,
static inline void
gen8_3DSTATE_INDEX_BUFFER(struct ilo_builder *builder,
+ const struct ilo_state_vf *vf,
const struct ilo_ib_state *ib)
{
const uint8_t cmd_len = 5;
@@ -519,24 +516,24 @@ gen8_3DSTATE_INDEX_BUFFER(struct ilo_builder *builder,
switch (ib-hw_index_size) {
case 4:
- format = GEN8_IB_DW1_FORMAT_DWORD;
+ format = GEN6_INDEX_DWORD;
break;
case 2:
- format = GEN8_IB_DW1_FORMAT_WORD;
+ format = GEN6_INDEX_WORD;
break;
case 1:
- format = GEN8_IB_DW1_FORMAT_BYTE;
+ format = GEN6_INDEX_BYTE;
break;
default:
assert(!unknown index size);
- format = GEN8_IB_DW1_FORMAT_BYTE;
+ format = GEN6_INDEX_BYTE;
break;
}
pos = ilo_builder_batch_pointer(builder, cmd_len, dw);
dw
Mesa (master): ilo: add ilo_state_vertex_buffer
Module: Mesa
Branch: master
Commit: da4878cb807f46e6053731a177c3c75497aaf4fb
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=da4878cb807f46e6053731a177c3c75497aaf4fb
Author: Chia-I Wu olva...@gmail.com
Date: Fri Jun 19 15:06:50 2015 +0800
ilo: add ilo_state_vertex_buffer
Being a parameter-like state, we may want to get rid of
ilo_state_vertex_buffer_info or ilo_state_vertex_buffer eventually. But we
want them now as they are how we do cross-validation right now.
---
src/gallium/drivers/ilo/core/ilo_builder_3d_top.h | 56 --
src/gallium/drivers/ilo/core/ilo_state_vf.c | 113 ++---
src/gallium/drivers/ilo/core/ilo_state_vf.h | 29 +-
src/gallium/drivers/ilo/ilo_render_gen6.c |4 +-
src/gallium/drivers/ilo/ilo_render_gen8.c |4 +-
src/gallium/drivers/ilo/ilo_state.c | 36 ++-
src/gallium/drivers/ilo/ilo_state.h |1 +
7 files changed, 189 insertions(+), 54 deletions(-)
diff --git a/src/gallium/drivers/ilo/core/ilo_builder_3d_top.h
b/src/gallium/drivers/ilo/core/ilo_builder_3d_top.h
index 7827465..bb20c7f 100644
--- a/src/gallium/drivers/ilo/core/ilo_builder_3d_top.h
+++ b/src/gallium/drivers/ilo/core/ilo_builder_3d_top.h
@@ -305,13 +305,12 @@ gen8_3DSTATE_VF_SGVS(struct ilo_builder *builder,
static inline void
gen6_3DSTATE_VERTEX_BUFFERS(struct ilo_builder *builder,
const struct ilo_state_vf *vf,
-const struct ilo_vb_state *vb,
-const unsigned *vb_mapping,
+const struct ilo_state_vertex_buffer *vb,
unsigned vb_count)
{
uint8_t cmd_len;
uint32_t *dw;
- unsigned pos, hw_idx;
+ unsigned pos, i;
ILO_DEV_ASSERT(builder-dev, 6, 8);
@@ -332,53 +331,40 @@ gen6_3DSTATE_VERTEX_BUFFERS(struct ilo_builder *builder,
dw++;
pos++;
- for (hw_idx = 0; hw_idx vb_count; hw_idx++) {
- const unsigned pipe_idx = vb_mapping[hw_idx];
- const struct pipe_vertex_buffer *cso = vb-states[pipe_idx];
- const int8_t elem = vf-vb_to_first_elem[hw_idx];
+ for (i = 0; i vb_count; i++) {
+ const struct ilo_state_vertex_buffer *b = vb[i];
- dw[0] = hw_idx GEN6_VB_DW0_INDEX__SHIFT;
+ /* see vertex_buffer_set_gen8_vertex_buffer_state() */
+ dw[0] = b-vb[0] |
+ i GEN6_VB_DW0_INDEX__SHIFT;
if (ilo_dev_gen(builder-dev) = ILO_GEN(8))
dw[0] |= builder-mocs GEN8_VB_DW0_MOCS__SHIFT;
else
dw[0] |= builder-mocs GEN6_VB_DW0_MOCS__SHIFT;
- if (ilo_dev_gen(builder-dev) = ILO_GEN(7))
- dw[0] |= GEN7_VB_DW0_ADDR_MODIFIED;
-
dw[1] = 0;
dw[2] = 0;
dw[3] = 0;
- /* see vf_set_gen6_vertex_buffer_state() */
- if (ilo_dev_gen(builder-dev) ILO_GEN(8) elem = 0) {
- dw[0] |= vf-user_instancing[elem][0];
- dw[3] |= vf-user_instancing[elem][1];
- }
-
- /* use null vb if there is no VE/buffer or the stride is out of range */
- if (elem 0 || !cso-buffer || cso-stride 2048) {
- dw[0] |= GEN6_VB_DW0_IS_NULL;
- continue;
- }
-
- dw[0] |= cso-stride GEN6_VB_DW0_PITCH__SHIFT;
-
if (ilo_dev_gen(builder-dev) = ILO_GEN(8)) {
- const struct ilo_buffer *buf = ilo_buffer(cso-buffer);
- const uint32_t start_offset = cso-buffer_offset;
+ if (b-need_bo)
+ilo_builder_batch_reloc64(builder, pos + 1, b-bo, b-vb[1], 0);
- ilo_builder_batch_reloc64(builder, pos + 1,
- buf-bo, start_offset, 0);
- dw[3] = buf-bo_size;
+ dw[3] |= b-vb[2];
} else {
- const struct ilo_buffer *buf = ilo_buffer(cso-buffer);
- const uint32_t start_offset = cso-buffer_offset;
- const uint32_t end_offset = buf-bo_size - 1;
+ const int8_t elem = vf-vb_to_first_elem[i];
+
+ /* see vf_set_gen6_vertex_buffer_state() */
+ if (elem = 0) {
+dw[0] |= vf-user_instancing[elem][0];
+dw[3] |= vf-user_instancing[elem][1];
+ }
- ilo_builder_batch_reloc(builder, pos + 1, buf-bo, start_offset, 0);
- ilo_builder_batch_reloc(builder, pos + 2, buf-bo, end_offset, 0);
+ if (b-need_bo) {
+ilo_builder_batch_reloc(builder, pos + 1, b-bo, b-vb[1], 0);
+ilo_builder_batch_reloc(builder, pos + 2, b-bo, b-vb[2], 0);
+ }
}
dw += 4;
diff --git a/src/gallium/drivers/ilo/core/ilo_state_vf.c
b/src/gallium/drivers/ilo/core/ilo_state_vf.c
index 4126560..92e0380 100644
--- a/src/gallium/drivers/ilo/core/ilo_state_vf.c
+++ b/src/gallium/drivers/ilo/core/ilo_state_vf.c
@@ -26,6 +26,7 @@
*/
#include ilo_debug.h
+#include ilo_buffer.h
#include ilo_state_vf.h
static bool
@@ -66,18 +67,6 @@ vf_validate_gen6_elements(const struct ilo_dev *dev,
assert(elem-buffer ILO_STATE_VF_MAX_BUFFER_COUNT
Mesa (master): ilo: move gen6_so_SURFACE_STATE() out of core
Module: Mesa
Branch: master
Commit: dcb5bad3a3a8ff116c32ecb01827ea8461fa2baa
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=dcb5bad3a3a8ff116c32ecb01827ea8461fa2baa
Author: Chia-I Wu olva...@gmail.com
Date: Thu Jun 18 22:47:20 2015 +0800
ilo: move gen6_so_SURFACE_STATE() out of core
It does not belong to core.
---
src/gallium/drivers/ilo/core/ilo_builder_3d_top.h | 52
src/gallium/drivers/ilo/ilo_render_surface.c | 53 +
2 files changed, 53 insertions(+), 52 deletions(-)
diff --git a/src/gallium/drivers/ilo/core/ilo_builder_3d_top.h
b/src/gallium/drivers/ilo/core/ilo_builder_3d_top.h
index 398586b..a8873ed 100644
--- a/src/gallium/drivers/ilo/core/ilo_builder_3d_top.h
+++ b/src/gallium/drivers/ilo/core/ilo_builder_3d_top.h
@@ -1317,58 +1317,6 @@ gen6_SURFACE_STATE(struct ilo_builder *builder,
}
static inline uint32_t
-gen6_so_SURFACE_STATE(struct ilo_builder *builder,
- const struct pipe_stream_output_target *so,
- const struct pipe_stream_output_info *so_info,
- int so_index)
-{
- struct ilo_buffer *buf = ilo_buffer(so-buffer);
- struct ilo_state_surface_buffer_info info;
- struct ilo_state_surface surf;
-
- ILO_DEV_ASSERT(builder-dev, 6, 6);
-
- memset(info, 0, sizeof(info));
- info.buf = buf;
- info.access = ILO_STATE_SURFACE_ACCESS_DP_SVB;
-
- switch (so_info-output[so_index].num_components) {
- case 1:
- info.format = GEN6_FORMAT_R32_FLOAT;
- info.format_size = 4;
- break;
- case 2:
- info.format = GEN6_FORMAT_R32G32_FLOAT;
- info.format_size = 8;
- break;
- case 3:
- info.format = GEN6_FORMAT_R32G32B32_FLOAT;
- info.format_size = 12;
- break;
- case 4:
- info.format = GEN6_FORMAT_R32G32B32A32_FLOAT;
- info.format_size = 16;
- break;
- default:
- assert(!unexpected SO components length);
- info.format = GEN6_FORMAT_R32_FLOAT;
- info.format_size = 4;
- break;
- }
-
- info.struct_size =
- so_info-stride[so_info-output[so_index].output_buffer] * 4;
- info.offset = so-buffer_offset + so_info-output[so_index].dst_offset * 4;
- info.size = so-buffer_size - so_info-output[so_index].dst_offset * 4;
-
- memset(surf, 0, sizeof(surf));
- ilo_state_surface_init_for_buffer(surf, builder-dev, info);
- surf.bo = info.buf-bo;
-
- return gen6_SURFACE_STATE(builder, surf);
-}
-
-static inline uint32_t
gen6_SAMPLER_STATE(struct ilo_builder *builder,
const struct ilo_state_sampler *samplers,
const uint32_t *sampler_border_colors,
diff --git a/src/gallium/drivers/ilo/ilo_render_surface.c
b/src/gallium/drivers/ilo/ilo_render_surface.c
index bbdd5fe..ad05356 100644
--- a/src/gallium/drivers/ilo/ilo_render_surface.c
+++ b/src/gallium/drivers/ilo/ilo_render_surface.c
@@ -29,12 +29,65 @@
#include ilo_common.h
#include ilo_blitter.h
+#include ilo_resource.h
#include ilo_shader.h
#include ilo_state.h
#include ilo_render_gen.h
#define DIRTY(state) (session-pipe_dirty ILO_DIRTY_ ## state)
+static inline uint32_t
+gen6_so_SURFACE_STATE(struct ilo_builder *builder,
+ const struct pipe_stream_output_target *so,
+ const struct pipe_stream_output_info *so_info,
+ int so_index)
+{
+ struct ilo_buffer *buf = ilo_buffer(so-buffer);
+ struct ilo_state_surface_buffer_info info;
+ struct ilo_state_surface surf;
+
+ ILO_DEV_ASSERT(builder-dev, 6, 6);
+
+ memset(info, 0, sizeof(info));
+ info.buf = buf;
+ info.access = ILO_STATE_SURFACE_ACCESS_DP_SVB;
+
+ switch (so_info-output[so_index].num_components) {
+ case 1:
+ info.format = GEN6_FORMAT_R32_FLOAT;
+ info.format_size = 4;
+ break;
+ case 2:
+ info.format = GEN6_FORMAT_R32G32_FLOAT;
+ info.format_size = 8;
+ break;
+ case 3:
+ info.format = GEN6_FORMAT_R32G32B32_FLOAT;
+ info.format_size = 12;
+ break;
+ case 4:
+ info.format = GEN6_FORMAT_R32G32B32A32_FLOAT;
+ info.format_size = 16;
+ break;
+ default:
+ assert(!unexpected SO components length);
+ info.format = GEN6_FORMAT_R32_FLOAT;
+ info.format_size = 4;
+ break;
+ }
+
+ info.struct_size =
+ so_info-stride[so_info-output[so_index].output_buffer] * 4;
+ info.offset = so-buffer_offset + so_info-output[so_index].dst_offset * 4;
+ info.size = so-buffer_size - so_info-output[so_index].dst_offset * 4;
+
+ memset(surf, 0, sizeof(surf));
+ ilo_state_surface_init_for_buffer(surf, builder-dev, info);
+ surf.bo = info.buf-bo;
+
+ return gen6_SURFACE_STATE(builder, surf);
+}
+
static void
gen6_emit_draw_surface_rt(struct ilo_render *r,
const struct ilo_state_vector *vec,
___
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Mesa (master): ilo: fix a -Wmaybe-uninitialized warning
Module: Mesa Branch: master Commit: aa3ec8bc465f8c82cb38e0ed067dbdd9122dbd44 URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=aa3ec8bc465f8c82cb38e0ed067dbdd9122dbd44 Author: Chia-I Wu olva...@gmail.com Date: Fri Jun 19 23:24:17 2015 +0800 ilo: fix a -Wmaybe-uninitialized warning ilo_shader.c: In function ‘ilo_shader_select_kernel_sbe’: ilo_shader.c:1140:27: warning: ‘src_skip’ may be used uninitialized in this function [-Wmaybe-uninitialized] --- src/gallium/drivers/ilo/ilo_shader.c |1 + 1 file changed, 1 insertion(+) diff --git a/src/gallium/drivers/ilo/ilo_shader.c b/src/gallium/drivers/ilo/ilo_shader.c index 93a2626..5f2b010 100644 --- a/src/gallium/drivers/ilo/ilo_shader.c +++ b/src/gallium/drivers/ilo/ilo_shader.c @@ -1089,6 +1089,7 @@ ilo_shader_select_kernel_sbe(struct ilo_shader_state *shader, src_semantics = source-shader-out.semantic_names; src_indices = source-shader-out.semantic_indices; src_len = source-shader-out.count; + src_skip = 0; assert(src_len = 2 src_semantics[0] == TGSI_SEMANTIC_PSIZE ___ mesa-commit mailing list mesa-commit@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-commit
Mesa (master): ilo: avoid ilo_ib_state in genX_3DPRIMITIVE()
Module: Mesa
Branch: master
Commit: 244caba2502402b93876cb89952ac05e6d87c5b2
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=244caba2502402b93876cb89952ac05e6d87c5b2
Author: Chia-I Wu olva...@gmail.com
Date: Sat Jun 20 00:34:29 2015 +0800
ilo: avoid ilo_ib_state in genX_3DPRIMITIVE()
ilo_ib_state is not in core.
---
src/gallium/drivers/ilo/core/ilo_builder_3d.h | 12
src/gallium/drivers/ilo/ilo_render_gen.h |6 --
2 files changed, 8 insertions(+), 10 deletions(-)
diff --git a/src/gallium/drivers/ilo/core/ilo_builder_3d.h
b/src/gallium/drivers/ilo/core/ilo_builder_3d.h
index 6cf1732..8d8a795 100644
--- a/src/gallium/drivers/ilo/core/ilo_builder_3d.h
+++ b/src/gallium/drivers/ilo/core/ilo_builder_3d.h
@@ -38,14 +38,12 @@
static inline void
gen6_3DPRIMITIVE(struct ilo_builder *builder,
const struct pipe_draw_info *info,
- const struct ilo_ib_state *ib)
+ int64_t start_offset)
{
const uint8_t cmd_len = 6;
const int prim = gen6_3d_translate_pipe_prim(info-mode);
const int vb_access = (info-indexed) ?
GEN6_3DPRIM_DW0_ACCESS_RANDOM : GEN6_3DPRIM_DW0_ACCESS_SEQUENTIAL;
- const uint32_t vb_start = info-start +
- ((info-indexed) ? ib-draw_start_offset : 0);
uint32_t *dw;
ILO_DEV_ASSERT(builder-dev, 6, 6);
@@ -57,7 +55,7 @@ gen6_3DPRIMITIVE(struct ilo_builder *builder,
prim GEN6_3DPRIM_DW0_TYPE__SHIFT |
(cmd_len - 2);
dw[1] = info-count;
- dw[2] = vb_start;
+ dw[2] = info-start + start_offset;
dw[3] = info-instance_count;
dw[4] = info-start_instance;
dw[5] = info-index_bias;
@@ -66,14 +64,12 @@ gen6_3DPRIMITIVE(struct ilo_builder *builder,
static inline void
gen7_3DPRIMITIVE(struct ilo_builder *builder,
const struct pipe_draw_info *info,
- const struct ilo_ib_state *ib)
+ int64_t start_offset)
{
const uint8_t cmd_len = 7;
const int prim = gen6_3d_translate_pipe_prim(info-mode);
const int vb_access = (info-indexed) ?
GEN7_3DPRIM_DW1_ACCESS_RANDOM : GEN7_3DPRIM_DW1_ACCESS_SEQUENTIAL;
- const uint32_t vb_start = info-start +
- ((info-indexed) ? ib-draw_start_offset : 0);
uint32_t *dw;
ILO_DEV_ASSERT(builder-dev, 7, 8);
@@ -83,7 +79,7 @@ gen7_3DPRIMITIVE(struct ilo_builder *builder,
dw[0] = GEN6_RENDER_CMD(3D, 3DPRIMITIVE) | (cmd_len - 2);
dw[1] = vb_access | prim;
dw[2] = info-count;
- dw[3] = vb_start;
+ dw[3] = info-start + start_offset;
dw[4] = info-instance_count;
dw[5] = info-start_instance;
dw[6] = info-index_bias;
diff --git a/src/gallium/drivers/ilo/ilo_render_gen.h
b/src/gallium/drivers/ilo/ilo_render_gen.h
index 6bbc0a8..00c8113 100644
--- a/src/gallium/drivers/ilo/ilo_render_gen.h
+++ b/src/gallium/drivers/ilo/ilo_render_gen.h
@@ -389,6 +389,8 @@ ilo_render_3dprimitive(struct ilo_render *r,
const struct pipe_draw_info *info,
const struct ilo_ib_state *ib)
{
+ const int64_t start_offset = (info-indexed) ? ib-draw_start_offset : 0;
+
ILO_DEV_ASSERT(r-dev, 6, 8);
if (r-state.deferred_pipe_control_dw1)
@@ -396,9 +398,9 @@ ilo_render_3dprimitive(struct ilo_render *r,
/* 3DPRIMITIVE */
if (ilo_dev_gen(r-dev) = ILO_GEN(7))
- gen7_3DPRIMITIVE(r-builder, info, ib);
+ gen7_3DPRIMITIVE(r-builder, info, start_offset);
else
- gen6_3DPRIMITIVE(r-builder, info, ib);
+ gen6_3DPRIMITIVE(r-builder, info, start_offset);
r-state.current_pipe_control_dw1 = 0;
assert(!r-state.deferred_pipe_control_dw1);
___
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Mesa (master): ilo: clean up header includes
Module: Mesa Branch: master Commit: 028590cbc758e877b963ba430f0a0cb49e882a6b URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=028590cbc758e877b963ba430f0a0cb49e882a6b Author: Chia-I Wu olva...@gmail.com Date: Thu Jun 18 22:48:14 2015 +0800 ilo: clean up header includes Core is more self-contained now. --- src/gallium/drivers/ilo/core/ilo_builder_3d_bottom.h |1 + src/gallium/drivers/ilo/core/ilo_builder_3d_top.h|3 +-- src/gallium/drivers/ilo/ilo_render_gen6.c|1 + src/gallium/drivers/ilo/ilo_render_gen7.c|1 + src/gallium/drivers/ilo/ilo_render_gen8.c|1 + 5 files changed, 5 insertions(+), 2 deletions(-) diff --git a/src/gallium/drivers/ilo/core/ilo_builder_3d_bottom.h b/src/gallium/drivers/ilo/core/ilo_builder_3d_bottom.h index f7f95f4..6d9e369 100644 --- a/src/gallium/drivers/ilo/core/ilo_builder_3d_bottom.h +++ b/src/gallium/drivers/ilo/core/ilo_builder_3d_bottom.h @@ -38,6 +38,7 @@ #include ilo_state_sbe.h #include ilo_state_shader.h #include ilo_state_viewport.h +#include ilo_state_zs.h #include ilo_builder.h #include ilo_builder_3d_top.h diff --git a/src/gallium/drivers/ilo/core/ilo_builder_3d_top.h b/src/gallium/drivers/ilo/core/ilo_builder_3d_top.h index a8873ed..42d171f 100644 --- a/src/gallium/drivers/ilo/core/ilo_builder_3d_top.h +++ b/src/gallium/drivers/ilo/core/ilo_builder_3d_top.h @@ -29,8 +29,6 @@ #define ILO_BUILDER_3D_TOP_H #include genhw/genhw.h -#include ../ilo_resource.h -#include ../ilo_state.h #include intel_winsys.h #include ilo_core.h @@ -38,6 +36,7 @@ #include ilo_state_sampler.h #include ilo_state_shader.h #include ilo_state_sol.h +#include ilo_state_surface.h #include ilo_state_urb.h #include ilo_state_vf.h #include ilo_builder.h diff --git a/src/gallium/drivers/ilo/ilo_render_gen6.c b/src/gallium/drivers/ilo/ilo_render_gen6.c index 0623714..b2bc2dc 100644 --- a/src/gallium/drivers/ilo/ilo_render_gen6.c +++ b/src/gallium/drivers/ilo/ilo_render_gen6.c @@ -33,6 +33,7 @@ #include ilo_blitter.h #include ilo_query.h +#include ilo_resource.h #include ilo_shader.h #include ilo_state.h #include ilo_render_gen.h diff --git a/src/gallium/drivers/ilo/ilo_render_gen7.c b/src/gallium/drivers/ilo/ilo_render_gen7.c index 7d0e4c4..4c54ede 100644 --- a/src/gallium/drivers/ilo/ilo_render_gen7.c +++ b/src/gallium/drivers/ilo/ilo_render_gen7.c @@ -30,6 +30,7 @@ #include core/ilo_builder_render.h #include ilo_blitter.h +#include ilo_resource.h #include ilo_shader.h #include ilo_state.h #include ilo_render_gen.h diff --git a/src/gallium/drivers/ilo/ilo_render_gen8.c b/src/gallium/drivers/ilo/ilo_render_gen8.c index 8956e5f..f86871f 100644 --- a/src/gallium/drivers/ilo/ilo_render_gen8.c +++ b/src/gallium/drivers/ilo/ilo_render_gen8.c @@ -30,6 +30,7 @@ #include core/ilo_builder_render.h #include ilo_blitter.h +#include ilo_resource.h #include ilo_shader.h #include ilo_state.h #include ilo_render_gen.h ___ mesa-commit mailing list mesa-commit@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-commit
Mesa (master): ilo: fix a buffer overrun
Module: Mesa Branch: master Commit: 73f0d6d22db21f1fa553d8a26687edc5083e3c23 URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=73f0d6d22db21f1fa553d8a26687edc5083e3c23 Author: Chia-I Wu olva...@gmail.com Date: Fri Jun 19 23:29:32 2015 +0800 ilo: fix a buffer overrun Add missing parentheses in SURFTYPE_NULL initialization. --- src/gallium/drivers/ilo/core/ilo_state_surface.c |2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/gallium/drivers/ilo/core/ilo_state_surface.c b/src/gallium/drivers/ilo/core/ilo_state_surface.c index be7225b..5be9f8f 100644 --- a/src/gallium/drivers/ilo/core/ilo_state_surface.c +++ b/src/gallium/drivers/ilo/core/ilo_state_surface.c @@ -89,7 +89,7 @@ surface_set_gen7_null_SURFACE_STATE(struct ilo_state_surface *surf, STATIC_ASSERT(ARRAY_SIZE(surf-surface) = 13); surf-surface[0] = dw0; memset(surf-surface[1], 0, sizeof(uint32_t) * - ((ilo_dev_gen(dev) = ILO_GEN(8)) ? 13 : 8) - 1); + (((ilo_dev_gen(dev) = ILO_GEN(8)) ? 13 : 8) - 1)); return true; } ___ mesa-commit mailing list mesa-commit@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-commit
Mesa (master): ilo: add ilo_state_sol_buffer
Module: Mesa
Branch: master
Commit: e3372c4bfb8d5960714651ca7d3f1acc0018a8fa
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=e3372c4bfb8d5960714651ca7d3f1acc0018a8fa
Author: Chia-I Wu olva...@gmail.com
Date: Mon Jun 15 15:17:45 2015 +0800
ilo: add ilo_state_sol_buffer
It serves the same purpose as ilo_state_vertex_buffer does.
---
src/gallium/drivers/ilo/core/ilo_builder_3d_top.h | 105 ++-
src/gallium/drivers/ilo/core/ilo_state_sol.c | 210 +
src/gallium/drivers/ilo/core/ilo_state_sol.h | 42 -
src/gallium/drivers/ilo/ilo_render_gen7.c | 22 ++-
src/gallium/drivers/ilo/ilo_state.c | 33 +++-
src/gallium/drivers/ilo/ilo_state.h |8 +
6 files changed, 317 insertions(+), 103 deletions(-)
diff --git a/src/gallium/drivers/ilo/core/ilo_builder_3d_top.h
b/src/gallium/drivers/ilo/core/ilo_builder_3d_top.h
index 6a45d70..398586b 100644
--- a/src/gallium/drivers/ilo/core/ilo_builder_3d_top.h
+++ b/src/gallium/drivers/ilo/core/ilo_builder_3d_top.h
@@ -756,11 +756,13 @@ gen7_3DSTATE_STREAMOUT(struct ilo_builder *builder,
dw[0] = GEN7_RENDER_CMD(3D, 3DSTATE_STREAMOUT) | (cmd_len - 2);
/* see sol_set_gen7_3DSTATE_STREAMOUT() */
- dw[1] = sol-so[0];
- dw[2] = sol-so[1];
+ dw[1] = sol-streamout[0];
+ dw[2] = sol-streamout[1];
if (ilo_dev_gen(builder-dev) = ILO_GEN(8)) {
- dw[3] = sol-so[2];
- dw[4] = sol-so[3];
+ dw[3] = sol-strides[1] GEN8_SO_DW3_BUFFER1_PITCH__SHIFT |
+ sol-strides[0] GEN8_SO_DW3_BUFFER0_PITCH__SHIFT;
+ dw[4] = sol-strides[3] GEN8_SO_DW4_BUFFER3_PITCH__SHIFT |
+ sol-strides[2] GEN8_SO_DW4_BUFFER2_PITCH__SHIFT;
}
}
@@ -797,8 +799,8 @@ gen7_3DSTATE_SO_DECL_LIST(struct ilo_builder *builder,
dw[0] = GEN7_RENDER_CMD(3D, 3DSTATE_SO_DECL_LIST) | (cmd_len - 2);
/* see sol_set_gen7_3DSTATE_SO_DECL_LIST() */
- dw[1] = sol-so[4];
- dw[2] = sol-so[5];
+ dw[1] = sol-so_decl[0];
+ dw[2] = sol-so_decl[1];
memcpy(dw[3], sol-decl, sizeof(sol-decl[0]) * sol-decl_count);
if (sol-decl_count cmd_decl_count) {
@@ -808,74 +810,77 @@ gen7_3DSTATE_SO_DECL_LIST(struct ilo_builder *builder,
}
static inline void
-gen7_3DSTATE_SO_BUFFER(struct ilo_builder *builder, int index, int stride,
- const struct pipe_stream_output_target *so_target)
+gen7_3DSTATE_SO_BUFFER(struct ilo_builder *builder,
+ const struct ilo_state_sol *sol,
+ const struct ilo_state_sol_buffer *sb,
+ uint8_t buffer)
{
- const uint8_t cmd_len = (ilo_dev_gen(builder-dev) = ILO_GEN(8)) ? 8 : 4;
- struct ilo_buffer *buf;
- int start, end;
+ const uint8_t cmd_len = 4;
uint32_t *dw;
unsigned pos;
- ILO_DEV_ASSERT(builder-dev, 7, 8);
-
- buf = ilo_buffer(so_target-buffer);
-
- /* DWord-aligned */
- assert(stride % 4 == 0);
- assert(so_target-buffer_offset % 4 == 0);
+ ILO_DEV_ASSERT(builder-dev, 7, 7.5);
- stride = ~3;
- start = so_target-buffer_offset ~3;
- end = (start + so_target-buffer_size) ~3;
+ assert(buffer ILO_STATE_SOL_MAX_BUFFER_COUNT);
pos = ilo_builder_batch_pointer(builder, cmd_len, dw);
dw[0] = GEN7_RENDER_CMD(3D, 3DSTATE_SO_BUFFER) | (cmd_len - 2);
- dw[1] = index GEN7_SO_BUF_DW1_INDEX__SHIFT |
- stride;
-
- if (ilo_dev_gen(builder-dev) = ILO_GEN(8)) {
- dw[1] |= builder-mocs GEN8_SO_BUF_DW1_MOCS__SHIFT;
-
- dw[4] = end - start;
- dw[5] = 0;
- dw[6] = 0;
- dw[7] = 0;
-
- ilo_builder_batch_reloc64(builder, pos + 2,
-buf-bo, start, INTEL_RELOC_WRITE);
+ /* see sol_buffer_set_gen7_3dstate_so_buffer() */
+ dw[1] = buffer GEN7_SO_BUF_DW1_INDEX__SHIFT |
+ builder-mocs GEN7_SO_BUF_DW1_MOCS__SHIFT |
+ sol-strides[buffer] GEN7_SO_BUF_DW1_PITCH__SHIFT;
+
+ if (sb-need_bo) {
+ ilo_builder_batch_reloc(builder, pos + 2, sb-bo,
+sb-so_buf[0], INTEL_RELOC_WRITE);
+ ilo_builder_batch_reloc(builder, pos + 3, sb-bo,
+sb-so_buf[1], INTEL_RELOC_WRITE);
} else {
- dw[1] |= builder-mocs GEN7_SO_BUF_DW1_MOCS__SHIFT;
-
- ilo_builder_batch_reloc(builder, pos + 2,
-buf-bo, start, INTEL_RELOC_WRITE);
- ilo_builder_batch_reloc(builder, pos + 3,
-buf-bo, end, INTEL_RELOC_WRITE);
+ dw[2] = 0;
+ dw[3] = 0;
}
}
static inline void
-gen7_disable_3DSTATE_SO_BUFFER(struct ilo_builder *builder, int index)
+gen8_3DSTATE_SO_BUFFER(struct ilo_builder *builder,
+ const struct ilo_state_sol *sol,
+ const struct ilo_state_sol_buffer *sb,
+ uint8_t buffer)
{
- const uint8_t cmd_len = (ilo_dev_gen(builder-dev) = ILO_GEN(8)) ? 8 : 4;
+ const uint8_t cmd_len = 8;
uint32_t *dw;
+ unsigned pos;
- ILO_DEV_ASSERT(builder-dev, 7, 8);
+ ILO_DEV_ASSERT(builder-dev, 8, 8
Mesa (master): ilo: add ilo_state_raster_{line,poly}_stipple
Module: Mesa
Branch: master
Commit: 94ab56367169ba2902e83aded409db2df3d25eb1
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=94ab56367169ba2902e83aded409db2df3d25eb1
Author: Chia-I Wu olva...@gmail.com
Date: Mon Jun 15 11:24:47 2015 +0800
ilo: add ilo_state_raster_{line,poly}_stipple
Initialize hardware stipple states on bound instead of on emission.
---
.../drivers/ilo/core/ilo_builder_3d_bottom.h | 44 +++
src/gallium/drivers/ilo/core/ilo_state_raster.c| 80
src/gallium/drivers/ilo/core/ilo_state_raster.h| 26 +++
src/gallium/drivers/ilo/ilo_render_gen6.c | 10 +--
src/gallium/drivers/ilo/ilo_state.c| 18 -
src/gallium/drivers/ilo/ilo_state.h|3 +-
6 files changed, 138 insertions(+), 43 deletions(-)
diff --git a/src/gallium/drivers/ilo/core/ilo_builder_3d_bottom.h
b/src/gallium/drivers/ilo/core/ilo_builder_3d_bottom.h
index cc1ece3..f7f95f4 100644
--- a/src/gallium/drivers/ilo/core/ilo_builder_3d_bottom.h
+++ b/src/gallium/drivers/ilo/core/ilo_builder_3d_bottom.h
@@ -33,7 +33,6 @@
#include ilo_core.h
#include ilo_dev.h
-#include ilo_format.h
#include ilo_state_cc.h
#include ilo_state_raster.h
#include ilo_state_sbe.h
@@ -576,74 +575,51 @@ gen6_3DSTATE_DRAWING_RECTANGLE(struct ilo_builder
*builder,
static inline void
gen6_3DSTATE_POLY_STIPPLE_OFFSET(struct ilo_builder *builder,
- int x_offset, int y_offset)
+ const struct ilo_state_poly_stipple *stipple)
{
const uint8_t cmd_len = 2;
uint32_t *dw;
ILO_DEV_ASSERT(builder-dev, 6, 8);
- assert(x_offset = 0 x_offset = 31);
- assert(y_offset = 0 y_offset = 31);
-
ilo_builder_batch_pointer(builder, cmd_len, dw);
dw[0] = GEN6_RENDER_CMD(3D, 3DSTATE_POLY_STIPPLE_OFFSET) | (cmd_len - 2);
- dw[1] = x_offset 8 | y_offset;
+ /* constant */
+ dw[1] = 0;
}
static inline void
gen6_3DSTATE_POLY_STIPPLE_PATTERN(struct ilo_builder *builder,
- const struct pipe_poly_stipple *pattern)
+ const struct ilo_state_poly_stipple *stipple)
{
const uint8_t cmd_len = 33;
uint32_t *dw;
- int i;
ILO_DEV_ASSERT(builder-dev, 6, 8);
ilo_builder_batch_pointer(builder, cmd_len, dw);
dw[0] = GEN6_RENDER_CMD(3D, 3DSTATE_POLY_STIPPLE_PATTERN) | (cmd_len - 2);
- dw++;
-
- STATIC_ASSERT(Elements(pattern-stipple) == 32);
- for (i = 0; i 32; i++)
- dw[i] = pattern-stipple[i];
+ /* see poly_stipple_set_gen6_3DSTATE_POLY_STIPPLE_PATTERN() */
+ memcpy(dw[1], stipple-stipple, sizeof(stipple-stipple));
}
static inline void
gen6_3DSTATE_LINE_STIPPLE(struct ilo_builder *builder,
- unsigned pattern, unsigned factor)
+ const struct ilo_state_line_stipple *stipple)
{
const uint8_t cmd_len = 3;
- unsigned inverse;
uint32_t *dw;
ILO_DEV_ASSERT(builder-dev, 6, 8);
- assert((pattern 0x) == pattern);
- assert(factor = 1 factor = 256);
-
ilo_builder_batch_pointer(builder, cmd_len, dw);
dw[0] = GEN6_RENDER_CMD(3D, 3DSTATE_LINE_STIPPLE) | (cmd_len - 2);
- dw[1] = pattern;
-
- if (ilo_dev_gen(builder-dev) = ILO_GEN(7)) {
- /* in U1.16 */
- inverse = 65536 / factor;
-
- dw[2] = inverse GEN7_LINE_STIPPLE_DW2_INVERSE_REPEAT_COUNT__SHIFT |
- factor;
- }
- else {
- /* in U1.13 */
- inverse = 8192 / factor;
-
- dw[2] = inverse GEN6_LINE_STIPPLE_DW2_INVERSE_REPEAT_COUNT__SHIFT |
- factor;
- }
+ /* see line_stipple_set_gen6_3DSTATE_LINE_STIPPLE() */
+ dw[1] = stipple-stipple[0];
+ dw[2] = stipple-stipple[1];
}
static inline void
diff --git a/src/gallium/drivers/ilo/core/ilo_state_raster.c
b/src/gallium/drivers/ilo/core/ilo_state_raster.c
index a93eaad..ed64a1f 100644
--- a/src/gallium/drivers/ilo/core/ilo_state_raster.c
+++ b/src/gallium/drivers/ilo/core/ilo_state_raster.c
@@ -900,6 +900,37 @@ sample_pattern_get_gen6_packed_offsets(const struct
ilo_dev *dev,
}
static bool
+line_stipple_set_gen6_3DSTATE_LINE_STIPPLE(struct ilo_state_line_stipple
*stipple,
+ const struct ilo_dev *dev,
+ const struct
ilo_state_line_stipple_info *info)
+{
+ uint32_t dw1, dw2;
+
+ ILO_DEV_ASSERT(dev, 6, 8);
+
+ assert(info-repeat_count = 1 info-repeat_count = 256);
+
+ dw1 = info-pattern;
+ if (ilo_dev_gen(dev) = ILO_GEN(7)) {
+ /* in U1.16 */
+ const uint32_t inverse = 65536 / info-repeat_count;
+ dw2 = inverse GEN7_LINE_STIPPLE_DW2_INVERSE_REPEAT_COUNT__SHIFT |
+info-repeat_count GEN6_LINE_STIPPLE_DW2_REPEAT_COUNT__SHIFT;
+ } else {
+ /* in U1.13 */
+ const uint16_t inverse = 8192 / info-repeat_count;
+ dw2 = inverse GEN6_LINE_STIPPLE_DW2_INVERSE_REPEAT_COUNT__SHIFT
Mesa (master): ilo: add 3DSTATE_AA_LINE_PARAMETERS to ilo_state_raster
Module: Mesa
Branch: master
Commit: 8f37e8e64fc897180603a7247e2fd47bf0ffb834
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=8f37e8e64fc897180603a7247e2fd47bf0ffb834
Author: Chia-I Wu olva...@gmail.com
Date: Mon Jun 15 11:57:10 2015 +0800
ilo: add 3DSTATE_AA_LINE_PARAMETERS to ilo_state_raster
Utilize ilo_state_raster to avoid redundant state change.
---
src/gallium/drivers/ilo/core/ilo_builder_3d_bottom.h | 18 +++---
src/gallium/drivers/ilo/core/ilo_state_raster.c |3 ++-
src/gallium/drivers/ilo/core/ilo_state_raster.h |1 +
src/gallium/drivers/ilo/ilo_render_gen6.c|5 +++--
4 files changed, 17 insertions(+), 10 deletions(-)
diff --git a/src/gallium/drivers/ilo/core/ilo_builder_3d_bottom.h
b/src/gallium/drivers/ilo/core/ilo_builder_3d_bottom.h
index 88ed6ea..7c1825b 100644
--- a/src/gallium/drivers/ilo/core/ilo_builder_3d_bottom.h
+++ b/src/gallium/drivers/ilo/core/ilo_builder_3d_bottom.h
@@ -646,18 +646,22 @@ gen6_3DSTATE_LINE_STIPPLE(struct ilo_builder *builder,
}
static inline void
-gen6_3DSTATE_AA_LINE_PARAMETERS(struct ilo_builder *builder)
+gen6_3DSTATE_AA_LINE_PARAMETERS(struct ilo_builder *builder,
+const struct ilo_state_raster *rs)
{
const uint8_t cmd_len = 3;
- const uint32_t dw[3] = {
- GEN6_RENDER_CMD(3D, 3DSTATE_AA_LINE_PARAMETERS) | (cmd_len - 2),
- 0 GEN6_AA_LINE_DW1_BIAS__SHIFT | 0,
- 0 GEN6_AA_LINE_DW2_CAP_BIAS__SHIFT | 0,
- };
+ uint32_t *dw;
ILO_DEV_ASSERT(builder-dev, 6, 8);
- ilo_builder_batch_write(builder, cmd_len, dw);
+ ilo_builder_batch_pointer(builder, cmd_len, dw);
+
+ dw[0] = GEN6_RENDER_CMD(3D, 3DSTATE_AA_LINE_PARAMETERS) | (cmd_len - 2);
+ /* constant */
+ dw[1] = 0 GEN6_AA_LINE_DW1_BIAS__SHIFT |
+ 0 GEN6_AA_LINE_DW1_SLOPE__SHIFT;
+ dw[2] = 0 GEN6_AA_LINE_DW2_CAP_BIAS__SHIFT |
+ 0 GEN6_AA_LINE_DW2_CAP_SLOPE__SHIFT;
}
static inline void
diff --git a/src/gallium/drivers/ilo/core/ilo_state_raster.c
b/src/gallium/drivers/ilo/core/ilo_state_raster.c
index 2b7567e..a33812d 100644
--- a/src/gallium/drivers/ilo/core/ilo_state_raster.c
+++ b/src/gallium/drivers/ilo/core/ilo_state_raster.c
@@ -985,7 +985,8 @@ ilo_state_raster_full_delta(const struct ilo_state_raster
*rs,
ILO_STATE_RASTER_3DSTATE_SF |
ILO_STATE_RASTER_3DSTATE_MULTISAMPLE |
ILO_STATE_RASTER_3DSTATE_SAMPLE_MASK |
- ILO_STATE_RASTER_3DSTATE_WM;
+ ILO_STATE_RASTER_3DSTATE_WM |
+ ILO_STATE_RASTER_3DSTATE_AA_LINE_PARAMETERS;
if (ilo_dev_gen(dev) = ILO_GEN(8)) {
delta-dirty |= ILO_STATE_RASTER_3DSTATE_RASTER |
diff --git a/src/gallium/drivers/ilo/core/ilo_state_raster.h
b/src/gallium/drivers/ilo/core/ilo_state_raster.h
index 0b4665b..add26cd 100644
--- a/src/gallium/drivers/ilo/core/ilo_state_raster.h
+++ b/src/gallium/drivers/ilo/core/ilo_state_raster.h
@@ -41,6 +41,7 @@ enum ilo_state_raster_dirty_bits {
ILO_STATE_RASTER_3DSTATE_SAMPLE_MASK= (1 4),
ILO_STATE_RASTER_3DSTATE_WM = (1 5),
ILO_STATE_RASTER_3DSTATE_WM_HZ_OP = (1 6),
+ ILO_STATE_RASTER_3DSTATE_AA_LINE_PARAMETERS = (1 7),
};
enum ilo_state_raster_earlyz_op {
diff --git a/src/gallium/drivers/ilo/ilo_render_gen6.c
b/src/gallium/drivers/ilo/ilo_render_gen6.c
index 30abead..22081e4 100644
--- a/src/gallium/drivers/ilo/ilo_render_gen6.c
+++ b/src/gallium/drivers/ilo/ilo_render_gen6.c
@@ -774,11 +774,12 @@ gen6_draw_wm_raster(struct ilo_render *r,
}
/* 3DSTATE_AA_LINE_PARAMETERS */
- if (DIRTY(RASTERIZER) vec-rasterizer-state.line_smooth) {
+ if (session-rs_delta.dirty
+ ILO_STATE_RASTER_3DSTATE_AA_LINE_PARAMETERS) {
if (ilo_dev_gen(r-dev) == ILO_GEN(6))
gen6_wa_pre_non_pipelined(r);
- gen6_3DSTATE_AA_LINE_PARAMETERS(r-builder);
+ gen6_3DSTATE_AA_LINE_PARAMETERS(r-builder, vec-rasterizer-rs);
}
}
___
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Mesa (master): ilo: add ilo_state_sample_pattern
Module: Mesa
Branch: master
Commit: 7cb853d52ae795b76adec41c98870166b41c9e6f
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=7cb853d52ae795b76adec41c98870166b41c9e6f
Author: Chia-I Wu olva...@gmail.com
Date: Mon Jun 15 12:01:29 2015 +0800
ilo: add ilo_state_sample_pattern
Move sample pattern initialization from ilo_render to
ilo_state_sample_pattern.
---
.../drivers/ilo/core/ilo_builder_3d_bottom.h | 37 ++---
src/gallium/drivers/ilo/core/ilo_state_raster.c| 143
src/gallium/drivers/ilo/core/ilo_state_raster.h| 42 ++
src/gallium/drivers/ilo/ilo_render.c | 126 +
src/gallium/drivers/ilo/ilo_render.h |3 -
src/gallium/drivers/ilo/ilo_render_gen.h |6 +-
src/gallium/drivers/ilo/ilo_render_gen6.c | 14 +-
src/gallium/drivers/ilo/ilo_render_gen7.c | 30 +---
src/gallium/drivers/ilo/ilo_render_gen8.c | 10 +-
9 files changed, 225 insertions(+), 186 deletions(-)
diff --git a/src/gallium/drivers/ilo/core/ilo_builder_3d_bottom.h
b/src/gallium/drivers/ilo/core/ilo_builder_3d_bottom.h
index 7c1825b..cc1ece3 100644
--- a/src/gallium/drivers/ilo/core/ilo_builder_3d_bottom.h
+++ b/src/gallium/drivers/ilo/core/ilo_builder_3d_bottom.h
@@ -450,9 +450,13 @@ gen7_3DSTATE_SAMPLER_STATE_POINTERS_PS(struct ilo_builder
*builder,
static inline void
gen6_3DSTATE_MULTISAMPLE(struct ilo_builder *builder,
const struct ilo_state_raster *rs,
- const uint32_t *pattern, int pattern_len)
+ const struct ilo_state_sample_pattern *pattern,
+ uint8_t sample_count)
{
const uint8_t cmd_len = (ilo_dev_gen(builder-dev) = ILO_GEN(7)) ? 4 : 3;
+ const uint32_t *packed = (const uint32_t *)
+ ilo_state_sample_pattern_get_packed_offsets(pattern,
+builder-dev, sample_count);
uint32_t *dw;
ILO_DEV_ASSERT(builder-dev, 6, 7.5);
@@ -463,10 +467,10 @@ gen6_3DSTATE_MULTISAMPLE(struct ilo_builder *builder,
/* see raster_set_gen8_3DSTATE_MULTISAMPLE() */
dw[1] = rs-sample[0];
- assert(pattern_len == 1 || pattern_len == 2);
- dw[2] = pattern[0];
+ /* see sample_pattern_set_gen8_3DSTATE_SAMPLE_PATTERN() */
+ dw[2] = (sample_count = 4) ? packed[0] : 0;
if (ilo_dev_gen(builder-dev) = ILO_GEN(7))
- dw[3] = (pattern_len == 2) ? pattern[1] : 0;
+ dw[3] = (sample_count = 8) ? packed[1] : 0;
}
static inline void
@@ -487,11 +491,7 @@ gen8_3DSTATE_MULTISAMPLE(struct ilo_builder *builder,
static inline void
gen8_3DSTATE_SAMPLE_PATTERN(struct ilo_builder *builder,
-const uint32_t *pattern_1x,
-const uint32_t *pattern_2x,
-const uint32_t *pattern_4x,
-const uint32_t *pattern_8x,
-const uint32_t *pattern_16x)
+const struct ilo_state_sample_pattern *pattern)
{
const uint8_t cmd_len = 9;
uint32_t *dw;
@@ -501,15 +501,16 @@ gen8_3DSTATE_SAMPLE_PATTERN(struct ilo_builder *builder,
ilo_builder_batch_pointer(builder, cmd_len, dw);
dw[0] = GEN8_RENDER_CMD(3D, 3DSTATE_SAMPLE_PATTERN) | (cmd_len - 2);
- dw[1] = pattern_16x[3];
- dw[2] = pattern_16x[2];
- dw[3] = pattern_16x[1];
- dw[4] = pattern_16x[0];
- dw[5] = pattern_8x[1];
- dw[6] = pattern_8x[0];
- dw[7] = pattern_4x[0];
- dw[8] = pattern_1x[0] 16 |
- pattern_2x[0];
+ dw[1] = 0;
+ dw[2] = 0;
+ dw[3] = 0;
+ dw[4] = 0;
+ /* see sample_pattern_set_gen8_3DSTATE_SAMPLE_PATTERN() */
+ dw[5] = ((const uint32_t *) pattern-pattern_8x)[1];
+ dw[6] = ((const uint32_t *) pattern-pattern_8x)[0];
+ dw[7] = ((const uint32_t *) pattern-pattern_4x)[0];
+ dw[8] = pattern-pattern_1x[0] 16 |
+ ((const uint16_t *) pattern-pattern_2x)[0];
}
static inline void
diff --git a/src/gallium/drivers/ilo/core/ilo_state_raster.c
b/src/gallium/drivers/ilo/core/ilo_state_raster.c
index a33812d..a93eaad 100644
--- a/src/gallium/drivers/ilo/core/ilo_state_raster.c
+++ b/src/gallium/drivers/ilo/core/ilo_state_raster.c
@@ -862,6 +862,69 @@ raster_set_gen8_3dstate_wm_hz_op(struct ilo_state_raster
*rs,
return true;
}
+static bool
+sample_pattern_get_gen6_packed_offsets(const struct ilo_dev *dev,
+ uint8_t sample_count,
+ const struct
ilo_state_sample_pattern_offset_info *in,
+ uint8_t *out)
+{
+ uint8_t max_dist, i;
+
+ ILO_DEV_ASSERT(dev, 6, 8);
+
+ max_dist = 0;
+ for (i = 0; i sample_count; i++) {
+ const int8_t dist_x = (int8_t) in[i].x - 8;
+ const int8_t dist_y = (int8_t) in[i].y - 8;
+ const uint8_t dist = dist_x * dist_x + dist_y * dist_y;
+
+ /*
+ * From the Sandy Bridge PRM, volume 2 part 1, page 305
Mesa (master): 32 new commits
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=117926debb72e5027faae885f9aa7f1ca61f6a9c
Author: Chia-I Wu olva...@gmail.com
Date: Thu Jun 11 07:36:28 2015 +0800
ilo: merge ilo_state_3d*.[ch] to ilo_state.[ch]
With most code replaced to ilo_state_*, what was left did not belong there
anymore.
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=54e0a8ed5dcaaa0ef483d5960ae86f88e0bf8990
Author: Chia-I Wu olva...@gmail.com
Date: Fri Jun 12 15:08:02 2015 +0800
ilo: add ilo_state_ps to ilo_shader_cso
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=30fcb31c9b095451ce5ac5a10c3c6b177dc03e20
Author: Chia-I Wu olva...@gmail.com
Date: Fri Jun 12 14:47:02 2015 +0800
ilo: add ilo_state_{vs,hs,ds,gs} to ilo_shader_cso
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=da6e45fcbc4570df0ec4b8c8885f33a206da3552
Author: Chia-I Wu olva...@gmail.com
Date: Tue Jun 2 23:09:53 2015 +0800
ilo: embed ilo_state_sbe in ilo_shader
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=5a52627c4f9215649b0f244af96512b9aafceaa1
Author: Chia-I Wu olva...@gmail.com
Date: Tue Jun 2 14:57:48 2015 +0800
ilo: embed ilo_state_vf in ilo_ve_state
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=9bfa987fb00a4e0471bcdb4948c8f416d7c5b562
Author: Chia-I Wu olva...@gmail.com
Date: Thu May 28 13:43:56 2015 +0800
ilo: embed ilo_state_urb in ilo_state_vector
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=eaf2c738991d43ec8e7b36bed05727deaf8151b6
Author: Chia-I Wu olva...@gmail.com
Date: Fri May 29 15:25:13 2015 +0800
ilo: embed ilo_state_sol in ilo_shader
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=960ca7d5e32997a5367cf798f7930cbb890b3ab4
Author: Chia-I Wu olva...@gmail.com
Date: Mon May 11 19:48:52 2015 +0800
ilo: embed ilo_state_cc in ilo_blend_state
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=402e155cd3a757a583f81fa6545c855b63947e7c
Author: Chia-I Wu olva...@gmail.com
Date: Fri Jun 5 10:23:24 2015 +0800
ilo: embed ilo_state_raster in ilo_rasterizer_state
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=ded7d412d04cf702596e91f36ba586b18f1933a2
Author: Chia-I Wu olva...@gmail.com
Date: Mon May 18 00:00:37 2015 +0800
ilo: embed ilo_state_viewport in ilo_viewport_state
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=4b5c0a83415137ba1f894d70a6cf73db83d21f15
Author: Chia-I Wu olva...@gmail.com
Date: Thu May 21 17:18:37 2015 +0800
ilo: replace ilo_sampler_cso with ilo_state_sampler
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=745ef2c07b23e1cf227eb26871fc464198b956e8
Author: Chia-I Wu olva...@gmail.com
Date: Wed May 20 21:44:30 2015 +0800
ilo: replace ilo_view_surface with ilo_state_surface
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=c10c1ac0cfb0ae42742f369d9f3fa2f4fba8639a
Author: Chia-I Wu olva...@gmail.com
Date: Mon May 18 23:32:10 2015 +0800
ilo: replace ilo_zs_surface with ilo_state_zs
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=6dad848d1acfe781c735120c3db97f1a2f0c28fa
Author: Chia-I Wu olva...@gmail.com
Date: Fri Jun 12 14:56:56 2015 +0800
ilo: add ilo_state_ps
We want to make ilo_shader_cso a union of ilo_state_{vs,hs,ds,gs,ps}.
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=df9f846ac6153e171fbcf661bad19168b336a703
Author: Chia-I Wu olva...@gmail.com
Date: Sat May 30 00:58:51 2015 +0800
ilo: add ilo_state_{vs,hs,ds,gs}
We want to make ilo_shader_cso a union of ilo_state_{vs,hs,ds,gs} and ps
payload.
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=a0bb1c2d1787cf2bd14620bf81d6d59cebfa766a
Author: Chia-I Wu olva...@gmail.com
Date: Fri Jun 12 14:02:37 2015 +0800
ilo: add ilo_state_sbe
We want to replace ilo_kernel_routing with ilo_state_sbe.
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=1ccab943b66de70b49cdbf3f14071fec9fe833cc
Author: Chia-I Wu olva...@gmail.com
Date: Sun May 31 00:00:49 2015 +0800
ilo: add ilo_state_vf
We want to replace ilo_ve_state with ilo_state_vf.
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=9c77ebef2499a79fc9a0816971a6d16d50cf2954
Author: Chia-I Wu olva...@gmail.com
Date: Thu May 28 13:21:02 2015 +0800
ilo: add ilo_state_urb
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=3ff40be0eecfd6bbcc17471590e44042b3ffa5d3
Author: Chia-I Wu olva...@gmail.com
Date: Fri May 29 13:08:18 2015 +0800
ilo: add ilo_state_sol
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=62bb6437187b439d5959ccab094762163713a992
Author: Chia-I Wu olva...@gmail.com
Date: Mon May 11 14:23:49 2015 +0800
ilo: add ilo_state_cc
We want to replace ilo_dsa_state and ilo_blend_state with ilo_state_cc.
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=6be8b6053de356a679707a0de92b083a4ea83937
Author: Chia-I Wu olva...@gmail.com
Date: Sun May 10
Mesa (master): ilo: silence a compiler warning
Module: Mesa Branch: master Commit: ef5d4bcc3a21f1aa3e6a919cf26ec754707f URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=ef5d4bcc3a21f1aa3e6a919cf26ec754707f Author: Chia-I Wu olva...@gmail.com Date: Wed May 6 16:32:28 2015 +0800 ilo: silence a compiler warning Silence ilo_query.c:120:7: warning: 'return' with no value, in function returning non-void since commit 96f164f6. --- src/gallium/drivers/ilo/ilo_query.c |2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/gallium/drivers/ilo/ilo_query.c b/src/gallium/drivers/ilo/ilo_query.c index 57f920c..27d0812 100644 --- a/src/gallium/drivers/ilo/ilo_query.c +++ b/src/gallium/drivers/ilo/ilo_query.c @@ -117,7 +117,7 @@ ilo_begin_query(struct pipe_context *pipe, struct pipe_query *query) struct ilo_query *q = ilo_query(query); if (q-active) - return; + return false; util_query_clear_result(q-result, q-type); q-used = 0; ___ mesa-commit mailing list mesa-commit@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-commit
Mesa (master): 21 new commits
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=4348046a2f08d9795a158b96f8579f13f5e693e6 Author: Chia-I Wu olva...@gmail.com Date: Sat May 2 15:33:27 2015 +0800 ilo: use ilo_image exclusively in core Initialize ilo_view_surface and ilo_zs_surface from ilo_image instead of ilo_texture. URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=9b705ec32d8cd527ab8d6ebc89f6550d52908c62 Author: Chia-I Wu olva...@gmail.com Date: Sat May 2 15:36:59 2015 +0800 ilo: add ilo_image_can_enable_aux() It replaces ilo_texture_can_enable_hiz(). URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=430594c34ff594b5bf47417b7240a62fc93509e9 Author: Chia-I Wu olva...@gmail.com Date: Sat May 2 15:06:36 2015 +0800 ilo: make ilo_image more self-contained Add depth0, sample_count, and scanout to ilo_image. URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=f6ca4084c7eca649e5444ac20218d94bd2a88057 Author: Chia-I Wu olva...@gmail.com Date: Sat May 2 14:14:15 2015 +0800 ilo: add ilo_image_init_for_imported() It replaces ilo_image_update_for_imported_bo() and enables more error checkings for imported textures. URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=938c9b8cea4d4f38b4edac7dbeb24481fbbeeca7 Author: Chia-I Wu olva...@gmail.com Date: Sat May 2 14:25:17 2015 +0800 ilo: prepare for image init for imported bo Refactoring in prepraration for ilo_image_init_for_imported(). URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=3f9415077b1c8abcf8f93231f8d72b5017ea6343 Author: Chia-I Wu olva...@gmail.com Date: Sat May 2 14:24:04 2015 +0800 ilo: constify ilo_image_params Make ilo_image_params const in functions that do not modify it. URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=c209aa7a8f08acb89f7294328589f47a88b44703 Author: Chia-I Wu olva...@gmail.com Date: Sat May 2 12:04:26 2015 +0800 ilo: improve readability of ilo_image Improve docs, rename struct fields, and reorder walk types. No real changes. URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=9b72bf5bd22c14c4cc17b6945d4b74f4c0eae80a Author: Chia-I Wu olva...@gmail.com Date: Fri May 1 15:33:56 2015 +0800 ilo: move command builder to core URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=9e24c49e6443c076ad892e6004e04956560e446a Author: Chia-I Wu olva...@gmail.com Date: Fri May 1 11:47:13 2015 +0800 ilo: move ilo_state_3d* to core ilo state structs (struct ilo_xxx_state) are moved as well. URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=8ab18262c5984736b11b28a30a7facda0d6c65e8 Author: Chia-I Wu olva...@gmail.com Date: Fri May 1 15:07:13 2015 +0800 ilo: add ilo_buffer.h to core Rename the original ilo_buffer to ilo_buffer_resource to avoid name conflict. URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=3afbeb115ab19164fb2e5bf8df88b6d03d39254b Author: Chia-I Wu olva...@gmail.com Date: Wed Mar 25 12:22:40 2015 +0800 ilo: move BOs from ilo_texture to ilo_image We want to work with ilo_image instead of ilo_texture in core. URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=ac47563cb40a79ec2bf149c6d9916a9d66361753 Author: Chia-I Wu olva...@gmail.com Date: Sun Mar 8 13:39:02 2015 +0800 ilo: move ilo_layout.[ch] to core as ilo_image.[ch] Move files and s/layout/image/. URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=82527655324b09c0d347a948e9bc66e79e48f201 Author: Chia-I Wu olva...@gmail.com Date: Wed Mar 25 10:18:46 2015 +0800 ilo: add ilo_format.[ch] to core The original ilo_format.[ch] are removed. URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=9b7080c8b35b02b16f58fb8b869b45de9857e8e5 Author: Chia-I Wu olva...@gmail.com Date: Sat Mar 7 13:31:52 2015 +0800 ilo: add ilo_fence.h to core Implement pipe_fence_handle on top of ilo_fence. URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=2182beb431a3e866022fb76199a5a58dfb23d1e4 Author: Chia-I Wu olva...@gmail.com Date: Sun Mar 8 04:45:16 2015 +0800 ilo: add ilo_dev_init() to core Move init_dev() from ilo_screen.c to core. URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=7562f9e907d9bb00832c6b75b833acd169bfe0ea Author: Chia-I Wu olva...@gmail.com Date: Sun Mar 8 04:37:02 2015 +0800 ilo: rename ilo_dev_info to ilo_dev With intel_winsys being embedded in it, drop the _info suffix. URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=19351af53dfffb8543d21a58be9c9f9a52b3ba62 Author: Chia-I Wu olva...@gmail.com Date: Sun Mar 8 04:33:49 2015 +0800 ilo: move intel_winsys to ilo_dev_info We want to use ilo_dev_info instead of ilo_screen in core. URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=b3197fe5f4bfd3f75e6bb64c05c2709bb7985b2c Author: Chia-I Wu olva...@gmail.com Date: Sun Mar 8 04:22:19 2015 +0800 ilo: add
Mesa (master): ilo: fix padding of linear sampler views
Module: Mesa
Branch: master
Commit: 35b713ad75c9d6be4ad357244b59b39d80dcc77f
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=35b713ad75c9d6be4ad357244b59b39d80dcc77f
Author: Chia-I Wu olva...@gmail.com
Date: Fri Mar 6 15:10:45 2015 +0800
ilo: fix padding of linear sampler views
Should use the temporary variable in the loop instead of layout-bo_height.
---
src/gallium/drivers/ilo/ilo_layout.c |6 ++
1 file changed, 2 insertions(+), 4 deletions(-)
diff --git a/src/gallium/drivers/ilo/ilo_layout.c
b/src/gallium/drivers/ilo/ilo_layout.c
index a99e445..2c78dc6 100644
--- a/src/gallium/drivers/ilo/ilo_layout.c
+++ b/src/gallium/drivers/ilo/ilo_layout.c
@@ -908,10 +908,8 @@ layout_calculate_bo_size(struct ilo_layout *layout,
*/
if (ilo_dev_gen(params-dev) = ILO_GEN(7.5)
(params-templ-bind PIPE_BIND_SAMPLER_VIEW)
- layout-tiling == GEN6_TILING_NONE) {
- layout-bo_height +=
-(64 + layout-bo_stride - 1) / layout-bo_stride;
- }
+ layout-tiling == GEN6_TILING_NONE)
+ h += (64 + layout-bo_stride - 1) / layout-bo_stride;
/*
* From the Sandy Bridge PRM, volume 4 part 1, page 81:
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Mesa (master): ilo: add generic ilo_render_3dprimitive()
Module: Mesa
Branch: master
Commit: ba5670fc500cce59a76e241ab384caaf5502e391
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=ba5670fc500cce59a76e241ab384caaf5502e391
Author: Chia-I Wu olva...@gmail.com
Date: Sat Mar 7 01:44:33 2015 +0800
ilo: add generic ilo_render_3dprimitive()
It replaces gen[6-8]_3dprimitive().
---
src/gallium/drivers/ilo/ilo_render_gen.h | 24
src/gallium/drivers/ilo/ilo_render_gen6.c | 18 ++
src/gallium/drivers/ilo/ilo_render_gen7.c | 21 ++---
src/gallium/drivers/ilo/ilo_render_gen8.c | 19 +--
4 files changed, 29 insertions(+), 53 deletions(-)
diff --git a/src/gallium/drivers/ilo/ilo_render_gen.h
b/src/gallium/drivers/ilo/ilo_render_gen.h
index 9657798..f2bcf7a 100644
--- a/src/gallium/drivers/ilo/ilo_render_gen.h
+++ b/src/gallium/drivers/ilo/ilo_render_gen.h
@@ -30,6 +30,7 @@
#include ilo_common.h
#include ilo_builder.h
+#include ilo_builder_3d.h
#include ilo_builder_render.h
#include ilo_state.h
#include ilo_render.h
@@ -374,6 +375,29 @@ ilo_render_pipe_control(struct ilo_render *r, uint32_t dw1)
r-state.deferred_pipe_control_dw1 = ~dw1;
}
+/**
+ * A convenient wrapper for gen{6,7}_3DPRIMITIVE().
+ */
+static inline void
+ilo_render_3dprimitive(struct ilo_render *r,
+ const struct pipe_draw_info *info,
+ const struct ilo_ib_state *ib)
+{
+ ILO_DEV_ASSERT(r-dev, 6, 8);
+
+ if (r-state.deferred_pipe_control_dw1)
+ ilo_render_pipe_control(r, r-state.deferred_pipe_control_dw1);
+
+ /* 3DPRIMITIVE */
+ if (ilo_dev_gen(r-dev) = ILO_GEN(7))
+ gen7_3DPRIMITIVE(r-builder, info, ib);
+ else
+ gen6_3DPRIMITIVE(r-builder, info, ib);
+
+ r-state.current_pipe_control_dw1 = 0;
+ assert(!r-state.deferred_pipe_control_dw1);
+}
+
void
gen6_wa_pre_pipe_control(struct ilo_render *r, uint32_t dw1);
diff --git a/src/gallium/drivers/ilo/ilo_render_gen6.c
b/src/gallium/drivers/ilo/ilo_render_gen6.c
index 898b98a..902d398 100644
--- a/src/gallium/drivers/ilo/ilo_render_gen6.c
+++ b/src/gallium/drivers/ilo/ilo_render_gen6.c
@@ -38,20 +38,6 @@
#include ilo_state.h
#include ilo_render_gen.h
-static void
-gen6_3dprimitive(struct ilo_render *r,
- const struct pipe_draw_info *info,
- const struct ilo_ib_state *ib)
-{
- ILO_DEV_ASSERT(r-dev, 6, 6);
-
- /* 3DPRIMITIVE */
- gen6_3DPRIMITIVE(r-builder, info, ib);
-
- r-state.current_pipe_control_dw1 = 0;
- assert(!r-state.deferred_pipe_control_dw1);
-}
-
/**
* This should be called before PIPE_CONTROL.
*/
@@ -835,7 +821,7 @@ ilo_render_emit_draw_commands_gen6(struct ilo_render
*render,
gen6_draw_sf_rect(render, vec, session);
gen6_draw_vf(render, vec, session);
- gen6_3dprimitive(render, vec-draw, vec-ib);
+ ilo_render_3dprimitive(render, vec-draw, vec-ib);
}
static void
@@ -980,7 +966,7 @@ ilo_render_emit_rectlist_commands_gen6(struct ilo_render *r,
gen6_3DSTATE_DRAWING_RECTANGLE(r-builder, 0, 0,
blitter-fb.width, blitter-fb.height);
- gen6_3dprimitive(r, blitter-draw, NULL);
+ ilo_render_3dprimitive(r, blitter-draw, NULL);
}
int
diff --git a/src/gallium/drivers/ilo/ilo_render_gen7.c
b/src/gallium/drivers/ilo/ilo_render_gen7.c
index a8a222d..8801d14 100644
--- a/src/gallium/drivers/ilo/ilo_render_gen7.c
+++ b/src/gallium/drivers/ilo/ilo_render_gen7.c
@@ -36,23 +36,6 @@
#include ilo_render_gen.h
static void
-gen7_3dprimitive(struct ilo_render *r,
- const struct pipe_draw_info *info,
- const struct ilo_ib_state *ib)
-{
- ILO_DEV_ASSERT(r-dev, 7, 7.5);
-
- if (r-state.deferred_pipe_control_dw1)
- ilo_render_pipe_control(r, r-state.deferred_pipe_control_dw1);
-
- /* 3DPRIMITIVE */
- gen7_3DPRIMITIVE(r-builder, info, ib);
-
- r-state.current_pipe_control_dw1 = 0;
- r-state.deferred_pipe_control_dw1 = 0;
-}
-
-static void
gen7_wa_post_3dstate_push_constant_alloc_ps(struct ilo_render *r)
{
/*
@@ -671,7 +654,7 @@ ilo_render_emit_draw_commands_gen7(struct ilo_render
*render,
gen6_draw_sf_rect(render, vec, session);
gen6_draw_vf(render, vec, session);
- gen7_3dprimitive(render, vec-draw, vec-ib);
+ ilo_render_3dprimitive(render, vec-draw, vec-ib);
}
static void
@@ -871,7 +854,7 @@ ilo_render_emit_rectlist_commands_gen7(struct ilo_render *r,
if (ilo_dev_gen(r-dev) == ILO_GEN(7))
gen7_wa_post_ps_and_later(r);
- gen7_3dprimitive(r, blitter-draw, NULL);
+ ilo_render_3dprimitive(r, blitter-draw, NULL);
}
int
diff --git a/src/gallium/drivers/ilo/ilo_render_gen8.c
b/src/gallium/drivers/ilo/ilo_render_gen8.c
index 49c5e7a..f6d8d66 100644
--- a/src/gallium/drivers/ilo/ilo_render_gen8.c
+++ b/src/gallium/drivers/ilo/ilo_render_gen8.c
@@ -36,23 +36,6 @@
#include ilo_render_gen.h
static void
-gen8_3dprimitive(struct ilo_render *r,
- const struct pipe_draw_info *info
Mesa (master): ilo: do not check for interleaved_samples
Module: Mesa
Branch: master
Commit: dda482384446dae9b48077a2e1bd51b3c1fce8fc
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=dda482384446dae9b48077a2e1bd51b3c1fce8fc
Author: Chia-I Wu olva...@gmail.com
Date: Fri Mar 6 15:04:47 2015 +0800
ilo: do not check for interleaved_samples
interleaved_samples is only zero-initialized when layout_want_mcs() is called.
We should not check for it. There is also no need to.
---
src/gallium/drivers/ilo/ilo_layout.c |3 +--
1 file changed, 1 insertion(+), 2 deletions(-)
diff --git a/src/gallium/drivers/ilo/ilo_layout.c
b/src/gallium/drivers/ilo/ilo_layout.c
index 8f83ccb..a99e445 100644
--- a/src/gallium/drivers/ilo/ilo_layout.c
+++ b/src/gallium/drivers/ilo/ilo_layout.c
@@ -737,8 +737,7 @@ layout_want_mcs(struct ilo_layout *layout,
* This field must be set to 0 for all SINT MSRTs when all RT channels
* are not written
*/
- if (templ-nr_samples 1 !layout-interleaved_samples
- !util_format_is_pure_sint(templ-format)) {
+ if (templ-nr_samples 1 !util_format_is_pure_sint(templ-format)) {
want_mcs = true;
} else if (templ-nr_samples = 1) {
/*
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Mesa (master): ilo: add generic ilo_render_pipe_control()
Module: Mesa
Branch: master
Commit: 8b2eecfbf8def8ef343529f7b0378dc1b8a36ff9
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=8b2eecfbf8def8ef343529f7b0378dc1b8a36ff9
Author: Chia-I Wu olva...@gmail.com
Date: Sat Mar 7 01:16:47 2015 +0800
ilo: add generic ilo_render_pipe_control()
It replaces gen[6-8]_pipe_control() and a direct gen6_PIPE_CONTROL() call in
ilo_render_emit_flush().
---
src/gallium/drivers/ilo/ilo_render.c |5 +---
src/gallium/drivers/ilo/ilo_render_gen.h | 33 +
src/gallium/drivers/ilo/ilo_render_gen6.c | 34 +
src/gallium/drivers/ilo/ilo_render_gen7.c | 46 ++---
src/gallium/drivers/ilo/ilo_render_gen8.c | 39
5 files changed, 56 insertions(+), 101 deletions(-)
diff --git a/src/gallium/drivers/ilo/ilo_render.c
b/src/gallium/drivers/ilo/ilo_render.c
index a6614f1..af18e89 100644
--- a/src/gallium/drivers/ilo/ilo_render.c
+++ b/src/gallium/drivers/ilo/ilo_render.c
@@ -253,10 +253,7 @@ ilo_render_emit_flush(struct ilo_render *render)
if (ilo_dev_gen(render-dev) == ILO_GEN(6))
gen6_wa_pre_pipe_control(render, dw1);
- gen6_PIPE_CONTROL(render-builder, dw1, NULL, 0, 0);
-
- render-state.current_pipe_control_dw1 |= dw1;
- render-state.deferred_pipe_control_dw1 = ~dw1;
+ ilo_render_pipe_control(render, dw1);
assert(ilo_builder_batch_used(render-builder) = batch_used +
ilo_render_get_flush_len(render));
diff --git a/src/gallium/drivers/ilo/ilo_render_gen.h
b/src/gallium/drivers/ilo/ilo_render_gen.h
index 583265f..9657798 100644
--- a/src/gallium/drivers/ilo/ilo_render_gen.h
+++ b/src/gallium/drivers/ilo/ilo_render_gen.h
@@ -30,6 +30,7 @@
#include ilo_common.h
#include ilo_builder.h
+#include ilo_builder_render.h
#include ilo_state.h
#include ilo_render.h
@@ -341,6 +342,38 @@ ilo_render_emit_launch_grid_surface_states(struct
ilo_render *render,
const struct ilo_state_vector *vec,
struct
ilo_render_launch_grid_session *session);
+/**
+ * A convenient wrapper for gen6_PIPE_CONTROL(). This should be enough for
+ * our needs everywhere except for queries.
+ */
+static inline void
+ilo_render_pipe_control(struct ilo_render *r, uint32_t dw1)
+{
+ const uint32_t write_mask = (dw1 GEN6_PIPE_CONTROL_WRITE__MASK);
+ struct intel_bo *bo = (write_mask) ? r-workaround_bo : NULL;
+
+ ILO_DEV_ASSERT(r-dev, 6, 8);
+
+ if (write_mask)
+ assert(write_mask == GEN6_PIPE_CONTROL_WRITE_IMM);
+
+ if (dw1 GEN6_PIPE_CONTROL_CS_STALL) {
+ /* CS stall cannot be set alone */
+ const uint32_t mask = GEN6_PIPE_CONTROL_RENDER_CACHE_FLUSH |
+GEN6_PIPE_CONTROL_DEPTH_CACHE_FLUSH |
+GEN6_PIPE_CONTROL_PIXEL_SCOREBOARD_STALL |
+GEN6_PIPE_CONTROL_DEPTH_STALL |
+GEN6_PIPE_CONTROL_WRITE__MASK;
+ if (!(dw1 mask))
+ dw1 |= GEN6_PIPE_CONTROL_PIXEL_SCOREBOARD_STALL;
+ }
+
+ gen6_PIPE_CONTROL(r-builder, dw1, bo, 0, 0);
+
+ r-state.current_pipe_control_dw1 |= dw1;
+ r-state.deferred_pipe_control_dw1 = ~dw1;
+}
+
void
gen6_wa_pre_pipe_control(struct ilo_render *r, uint32_t dw1);
diff --git a/src/gallium/drivers/ilo/ilo_render_gen6.c
b/src/gallium/drivers/ilo/ilo_render_gen6.c
index 7232882..898b98a 100644
--- a/src/gallium/drivers/ilo/ilo_render_gen6.c
+++ b/src/gallium/drivers/ilo/ilo_render_gen6.c
@@ -38,24 +38,6 @@
#include ilo_state.h
#include ilo_render_gen.h
-/**
- * A wrapper for gen6_PIPE_CONTROL().
- */
-static void
-gen6_pipe_control(struct ilo_render *r, uint32_t dw1)
-{
- struct intel_bo *bo = (dw1 GEN6_PIPE_CONTROL_WRITE__MASK) ?
- r-workaround_bo : NULL;
-
- ILO_DEV_ASSERT(r-dev, 6, 6);
-
- gen6_PIPE_CONTROL(r-builder, dw1, bo, 0, 0);
-
- r-state.current_pipe_control_dw1 |= dw1;
-
- assert(!r-state.deferred_pipe_control_dw1);
-}
-
static void
gen6_3dprimitive(struct ilo_render *r,
const struct pipe_draw_info *info,
@@ -120,14 +102,14 @@ gen6_wa_pre_pipe_control(struct ilo_render *r, uint32_t
dw1)
const uint32_t direct_wa = GEN6_PIPE_CONTROL_CS_STALL |
GEN6_PIPE_CONTROL_PIXEL_SCOREBOARD_STALL;
- gen6_pipe_control(r, direct_wa);
+ ilo_render_pipe_control(r, direct_wa);
}
if (indirect_wa_cond
!(r-state.current_pipe_control_dw1 GEN6_PIPE_CONTROL_WRITE__MASK)) {
const uint32_t indirect_wa = GEN6_PIPE_CONTROL_WRITE_IMM;
- gen6_pipe_control(r, indirect_wa);
+ ilo_render_pipe_control(r, indirect_wa);
}
}
@@ -158,7 +140,7 @@ gen6_wa_post_3dstate_constant_vs(struct ilo_render *r)
gen6_wa_pre_pipe_control(r, dw1);
if ((r-state.current_pipe_control_dw1 dw1) != dw1)
- gen6_pipe_control(r, dw1);
+ ilo_render_pipe_control(r, dw1);
}
static void
@@ -178,7
Mesa (master): ilo: clean up Gen6 WAs
Module: Mesa
Branch: master
Commit: bf061a3d2ec00aa486cda0fb4af04e50e8522868
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=bf061a3d2ec00aa486cda0fb4af04e50e8522868
Author: Chia-I Wu olva...@gmail.com
Date: Sat Mar 7 01:55:15 2015 +0800
ilo: clean up Gen6 WAs
Add a help function for each WA and make PIPE_CONTROL flags match the WA
descriptions. Call gen6_wa_pre_pipe_contro() only before PIPE_CONTROLs.
Fix missing gen6_wa_pre_3dstate_vs_toggle() in the rectlist path.
---
src/gallium/drivers/ilo/ilo_render_gen6.c | 96 +++--
1 file changed, 62 insertions(+), 34 deletions(-)
diff --git a/src/gallium/drivers/ilo/ilo_render_gen6.c
b/src/gallium/drivers/ilo/ilo_render_gen6.c
index 902d398..1c101ac 100644
--- a/src/gallium/drivers/ilo/ilo_render_gen6.c
+++ b/src/gallium/drivers/ilo/ilo_render_gen6.c
@@ -112,6 +112,26 @@ gen6_wa_pre_non_pipelined(struct ilo_render *r)
}
static void
+gen6_wa_post_3dstate_urb_no_gs(struct ilo_render *r)
+{
+ /*
+* From the Sandy Bridge PRM, volume 2 part 1, page 27:
+*
+* Because of a urb corruption caused by allocating a previous
+* gsunit's urb entry to vsunit software is required to send a
+* GS NULL Fence (Send URB fence with VS URB size == 1 and GS URB
+* size == 0) plus a dummy DRAW call before any case where VS will
+* be taking over GS URB space.
+*/
+ const uint32_t dw1 = GEN6_PIPE_CONTROL_CS_STALL;
+
+ if ((r-state.current_pipe_control_dw1 dw1) != dw1)
+ gen6_wa_pre_pipe_control(r, dw1);
+ if ((r-state.current_pipe_control_dw1 dw1) != dw1)
+ ilo_render_pipe_control(r, dw1);
+}
+
+static void
gen6_wa_post_3dstate_constant_vs(struct ilo_render *r)
{
/*
@@ -123,9 +143,32 @@ gen6_wa_post_3dstate_constant_vs(struct ilo_render *r)
GEN6_PIPE_CONTROL_INSTRUCTION_CACHE_INVALIDATE |
GEN6_PIPE_CONTROL_STATE_CACHE_INVALIDATE;
- gen6_wa_pre_pipe_control(r, dw1);
+ if ((r-state.current_pipe_control_dw1 dw1) != dw1)
+ gen6_wa_pre_pipe_control(r, dw1);
+ if ((r-state.current_pipe_control_dw1 dw1) != dw1)
+ ilo_render_pipe_control(r, dw1);
+}
+
+static void
+gen6_wa_pre_3dstate_vs_toggle(struct ilo_render *r)
+{
+ /*
+* The classic driver has this undocumented WA:
+*
+* From the BSpec, 3D Pipeline Geometry Vertex Shader State,
+* 3DSTATE_VS, Dword 5.0 VS Function Enable:
+*
+* [DevSNB] A pipeline flush must be programmed prior to a 3DSTATE_VS
+* command that causes the VS Function Enable to toggle. Pipeline
+* flush can be executed by sending a PIPE_CONTROL command with CS
+* stall bit set and a post sync operation.
+*/
+ const uint32_t dw1 = GEN6_PIPE_CONTROL_WRITE_IMM |
+GEN6_PIPE_CONTROL_CS_STALL;
if ((r-state.current_pipe_control_dw1 dw1) != dw1)
+ gen6_wa_pre_pipe_control(r, dw1);
+ if ((r-state.current_pipe_control_dw1 dw1) != dw1)
ilo_render_pipe_control(r, dw1);
}
@@ -143,8 +186,8 @@ gen6_wa_pre_3dstate_wm_max_threads(struct ilo_render *r)
ILO_DEV_ASSERT(r-dev, 6, 6);
- gen6_wa_pre_pipe_control(r, dw1);
-
+ if ((r-state.current_pipe_control_dw1 dw1) != dw1)
+ gen6_wa_pre_pipe_control(r, dw1);
if ((r-state.current_pipe_control_dw1 dw1) != dw1)
ilo_render_pipe_control(r, dw1);
}
@@ -165,8 +208,8 @@ gen6_wa_pre_3dstate_multisample(struct ilo_render *r)
ILO_DEV_ASSERT(r-dev, 6, 6);
- gen6_wa_pre_pipe_control(r, dw1);
-
+ if ((r-state.current_pipe_control_dw1 dw1) != dw1)
+ gen6_wa_pre_pipe_control(r, dw1);
if ((r-state.current_pipe_control_dw1 dw1) != dw1)
ilo_render_pipe_control(r, dw1);
}
@@ -340,17 +383,8 @@ gen6_draw_common_urb(struct ilo_render *r,
gen6_3DSTATE_URB(r-builder, vs_total_size, gs_total_size,
vs_entry_size, gs_entry_size);
- /*
- * From the Sandy Bridge PRM, volume 2 part 1, page 27:
- *
- * Because of a urb corruption caused by allocating a previous
- * gsunit's urb entry to vsunit software is required to send a
- * GS NULL Fence (Send URB fence with VS URB size == 1 and GS URB
- * size == 0) plus a dummy DRAW call before any case where VS will
- * be taking over GS URB space.
- */
if (r-state.gs.active !gs_active)
- ilo_render_emit_flush(r);
+ gen6_wa_post_3dstate_urb_no_gs(r);
r-state.gs.active = gs_active;
}
@@ -469,30 +503,24 @@ gen6_draw_vs(struct ilo_render *r,
const struct ilo_state_vector *vec,
struct ilo_render_draw_session *session)
{
- const bool emit_3dstate_vs = (DIRTY(VS) || r-instruction_bo_changed);
- const bool emit_3dstate_constant_vs = session-pcb_vs_changed;
-
- /*
-* the classic i965 does this in upload_vs_state(), citing a spec that I
-* cannot find
-*/
- if (emit_3dstate_vs ilo_dev_gen(r-dev
Mesa (master): ilo: clarify valid and preferred tilings
Module: Mesa
Branch: master
Commit: bca6c8572f68a21e43982ffec057b30f35465965
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=bca6c8572f68a21e43982ffec057b30f35465965
Author: Chia-I Wu olva...@gmail.com
Date: Fri Mar 6 12:41:55 2015 -0700
ilo: clarify valid and preferred tilings
We did it right until the switch to gen_surface_tiling, which has
GEN8_TILING_W. Generally, GEN8_TILING_W may be valid but not preferred.
---
src/gallium/drivers/ilo/ilo_layout.c | 41
src/gallium/drivers/ilo/ilo_resource.c |3 +++
2 files changed, 29 insertions(+), 15 deletions(-)
diff --git a/src/gallium/drivers/ilo/ilo_layout.c
b/src/gallium/drivers/ilo/ilo_layout.c
index 2c78dc6..0444c5d 100644
--- a/src/gallium/drivers/ilo/ilo_layout.c
+++ b/src/gallium/drivers/ilo/ilo_layout.c
@@ -460,8 +460,7 @@ layout_get_valid_tilings(const struct ilo_layout *layout,
{
const struct pipe_resource *templ = params-templ;
const enum pipe_format format = layout-format;
- /* W-tiling is too restrictive */
- unsigned valid_tilings = LAYOUT_TILING_ALL ~LAYOUT_TILING_W;
+ unsigned valid_tilings = LAYOUT_TILING_ALL;
/*
* From the Sandy Bridge PRM, volume 1 part 2, page 32:
@@ -496,8 +495,7 @@ layout_get_valid_tilings(const struct ilo_layout *layout,
if (templ-bind PIPE_BIND_DEPTH_STENCIL) {
switch (format) {
case PIPE_FORMAT_S8_UINT:
- /* this is the only case LAYOUT_TILING_W is valid */
- valid_tilings = LAYOUT_TILING_W;
+ valid_tilings = LAYOUT_TILING_W;
break;
default:
valid_tilings = LAYOUT_TILING_Y;
@@ -532,6 +530,13 @@ layout_get_valid_tilings(const struct ilo_layout *layout,
ilo_dev_gen(params-dev) = ILO_GEN(7.5)
layout-format == PIPE_FORMAT_R32G32B32_FLOAT)
valid_tilings = ~LAYOUT_TILING_Y;
+
+ valid_tilings = ~LAYOUT_TILING_W;
+ }
+
+ if (templ-bind PIPE_BIND_SAMPLER_VIEW) {
+ if (ilo_dev_gen(params-dev) ILO_GEN(8))
+ valid_tilings = ~LAYOUT_TILING_W;
}
/* no conflicting binding flags */
@@ -545,33 +550,39 @@ layout_init_tiling(struct ilo_layout *layout,
struct ilo_layout_params *params)
{
const struct pipe_resource *templ = params-templ;
- unsigned valid_tilings = layout_get_valid_tilings(layout, params);
+ unsigned preferred_tilings;
- layout-valid_tilings = valid_tilings;
+ layout-valid_tilings = layout_get_valid_tilings(layout, params);
+
+ preferred_tilings = layout-valid_tilings;
+
+ /* no fencing nor BLT support */
+ if (preferred_tilings ~LAYOUT_TILING_W)
+ preferred_tilings = ~LAYOUT_TILING_W;
if (templ-bind (PIPE_BIND_RENDER_TARGET | PIPE_BIND_SAMPLER_VIEW)) {
/*
* heuristically set a minimum width/height for enabling tiling
*/
- if (layout-width0 64 (valid_tilings ~LAYOUT_TILING_X))
- valid_tilings = ~LAYOUT_TILING_X;
+ if (layout-width0 64 (preferred_tilings ~LAYOUT_TILING_X))
+ preferred_tilings = ~LAYOUT_TILING_X;
if ((layout-width0 32 || layout-height0 16)
(layout-width0 16 || layout-height0 32)
- (valid_tilings ~LAYOUT_TILING_Y))
- valid_tilings = ~LAYOUT_TILING_Y;
+ (preferred_tilings ~LAYOUT_TILING_Y))
+ preferred_tilings = ~LAYOUT_TILING_Y;
} else {
/* force linear if we are not sure where the texture is bound to */
- if (valid_tilings LAYOUT_TILING_NONE)
- valid_tilings = LAYOUT_TILING_NONE;
+ if (preferred_tilings LAYOUT_TILING_NONE)
+ preferred_tilings = LAYOUT_TILING_NONE;
}
/* prefer tiled over linear */
- if (valid_tilings LAYOUT_TILING_Y)
+ if (preferred_tilings LAYOUT_TILING_Y)
layout-tiling = GEN6_TILING_Y;
- else if (valid_tilings LAYOUT_TILING_X)
+ else if (preferred_tilings LAYOUT_TILING_X)
layout-tiling = GEN6_TILING_X;
- else if (valid_tilings LAYOUT_TILING_W)
+ else if (preferred_tilings LAYOUT_TILING_W)
layout-tiling = GEN8_TILING_W;
else
layout-tiling = GEN6_TILING_NONE;
diff --git a/src/gallium/drivers/ilo/ilo_resource.c
b/src/gallium/drivers/ilo/ilo_resource.c
index 7815354..18062d7 100644
--- a/src/gallium/drivers/ilo/ilo_resource.c
+++ b/src/gallium/drivers/ilo/ilo_resource.c
@@ -220,6 +220,9 @@ tex_create_separate_stencil(struct ilo_texture *tex)
*/
templ.format = PIPE_FORMAT_S8_UINT;
+ /* no stencil texturing */
+ templ.bind = ~PIPE_BIND_SAMPLER_VIEW;
+
s8 = tex-base.screen-resource_create(tex-base.screen, templ);
if (!s8)
return false;
___
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http://lists.freedesktop.org/mailman/listinfo/mesa-commit
Mesa (master): ilo: clean up SURFACE_STATE and BINDING_TABLE_STATE
Module: Mesa
Branch: master
Commit: e7c74ef43d7dc9c8e6791e8a4083b0776abdcfc6
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=e7c74ef43d7dc9c8e6791e8a4083b0776abdcfc6
Author: Chia-I Wu olva...@gmail.com
Date: Fri Mar 6 04:27:16 2015 +0800
ilo: clean up SURFACE_STATE and BINDING_TABLE_STATE
Add ilo_builder_surface_pointer() to replace ilo_builder_surface_write().
Make Gen8+ take a different path in gen6_SURFACE_STATE().
---
src/gallium/drivers/ilo/ilo_builder.h| 15 +-
src/gallium/drivers/ilo/ilo_builder_3d_top.h | 41 +-
2 files changed, 35 insertions(+), 21 deletions(-)
diff --git a/src/gallium/drivers/ilo/ilo_builder.h
b/src/gallium/drivers/ilo/ilo_builder.h
index c902a8f..cb639d1 100644
--- a/src/gallium/drivers/ilo/ilo_builder.h
+++ b/src/gallium/drivers/ilo/ilo_builder.h
@@ -350,21 +350,22 @@ ilo_builder_dynamic_used(const struct ilo_builder
*builder)
}
/**
- * Write a surface state to the surface buffer. The offset, in bytes, of the
- * state is returned.
+ * Reserve a region from the surface buffer. Both the offset, in bytes, and
+ * the pointer to the reserved region are returned. The pointer is only valid
+ * until the next reserve call.
*
* Note that \p alignment is in bytes and \p len is in DWords.
*/
static inline uint32_t
-ilo_builder_surface_write(struct ilo_builder *builder,
- enum ilo_builder_item_type item,
- unsigned alignment, unsigned len,
- const uint32_t *dw)
+ilo_builder_surface_pointer(struct ilo_builder *builder,
+enum ilo_builder_item_type item,
+unsigned alignment, unsigned len,
+uint32_t **dw)
{
assert(item == ILO_BUILDER_ITEM_SURFACE ||
item == ILO_BUILDER_ITEM_BINDING_TABLE);
- return ilo_builder_dynamic_write(builder, item, alignment, len, dw);
+ return ilo_builder_dynamic_pointer(builder, item, alignment, len, dw);
}
/**
diff --git a/src/gallium/drivers/ilo/ilo_builder_3d_top.h
b/src/gallium/drivers/ilo/ilo_builder_3d_top.h
index d359252..ab1374a 100644
--- a/src/gallium/drivers/ilo/ilo_builder_3d_top.h
+++ b/src/gallium/drivers/ilo/ilo_builder_3d_top.h
@@ -1585,11 +1585,12 @@ gen7_3DSTATE_CONSTANT_GS(struct ilo_builder *builder,
static inline uint32_t
gen6_BINDING_TABLE_STATE(struct ilo_builder *builder,
- uint32_t *surface_states,
+ const uint32_t *surface_states,
int num_surface_states)
{
const int state_align = 32;
const int state_len = num_surface_states;
+ uint32_t state_offset, *dw;
ILO_DEV_ASSERT(builder-dev, 6, 8);
@@ -1603,8 +1604,11 @@ gen6_BINDING_TABLE_STATE(struct ilo_builder *builder,
if (!num_surface_states)
return 0;
- return ilo_builder_surface_write(builder, ILO_BUILDER_ITEM_BINDING_TABLE,
- state_align, state_len, surface_states);
+ state_offset = ilo_builder_surface_pointer(builder,
+ ILO_BUILDER_ITEM_BINDING_TABLE, state_align, state_len, dw);
+ memcpy(dw, surface_states, state_len 2);
+
+ return state_offset;
}
static inline uint32_t
@@ -1612,23 +1616,32 @@ gen6_SURFACE_STATE(struct ilo_builder *builder,
const struct ilo_view_surface *surf,
bool for_render)
{
- const int state_align =
- (ilo_dev_gen(builder-dev) = ILO_GEN(8)) ? 64 : 32;
- const int state_len =
- (ilo_dev_gen(builder-dev) = ILO_GEN(8)) ? 13 :
- (ilo_dev_gen(builder-dev) = ILO_GEN(7)) ? 8 : 6;
- uint32_t state_offset;
+ int state_align, state_len;
+ uint32_t state_offset, *dw;
ILO_DEV_ASSERT(builder-dev, 6, 8);
- state_offset = ilo_builder_surface_write(builder, ILO_BUILDER_ITEM_SURFACE,
- state_align, state_len, surf-payload);
+ if (ilo_dev_gen(builder-dev) = ILO_GEN(8)) {
+ state_align = 64;
+ state_len = 13;
- if (surf-bo) {
- if (ilo_dev_gen(builder-dev) = ILO_GEN(8)) {
+ state_offset = ilo_builder_surface_pointer(builder,
+ILO_BUILDER_ITEM_SURFACE, state_align, state_len, dw);
+ memcpy(dw, surf-payload, state_len 2);
+
+ if (surf-bo) {
ilo_builder_surface_reloc64(builder, state_offset, 8, surf-bo,
surf-payload[8], (for_render) ? INTEL_RELOC_WRITE : 0);
- } else {
+ }
+ } else {
+ state_align = 32;
+ state_len = (ilo_dev_gen(builder-dev) = ILO_GEN(7)) ? 8 : 6;
+
+ state_offset = ilo_builder_surface_pointer(builder,
+ILO_BUILDER_ITEM_SURFACE, state_align, state_len, dw);
+ memcpy(dw, surf-payload, state_len 2);
+
+ if (surf-bo) {
ilo_builder_surface_reloc(builder, state_offset, 1, surf-bo,
surf-payload[1], (for_render) ? INTEL_RELOC_WRITE : 0);
}
___
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Mesa (master): ilo: enable L3 cache in MOCS
Module: Mesa
Branch: master
Commit: ebad062e9abbc070645dbfd18cf57c24daf7da6c
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=ebad062e9abbc070645dbfd18cf57c24daf7da6c
Author: Chia-I Wu olva...@gmail.com
Date: Fri Mar 6 04:30:07 2015 +0800
ilo: enable L3 cache in MOCS
This enables L3 cache in MOCS almost everywhere.
---
src/gallium/drivers/ilo/ilo_builder.c | 14 +
src/gallium/drivers/ilo/ilo_builder.h |1 +
src/gallium/drivers/ilo/ilo_builder_3d_bottom.h | 15 +
src/gallium/drivers/ilo/ilo_builder_3d_top.h| 35 ++---
src/gallium/drivers/ilo/ilo_builder_render.h| 37 +++
5 files changed, 85 insertions(+), 17 deletions(-)
diff --git a/src/gallium/drivers/ilo/ilo_builder.c
b/src/gallium/drivers/ilo/ilo_builder.c
index 56920e5..d068e5b 100644
--- a/src/gallium/drivers/ilo/ilo_builder.c
+++ b/src/gallium/drivers/ilo/ilo_builder.c
@@ -338,6 +338,20 @@ ilo_builder_init(struct ilo_builder *builder,
builder-dev = dev;
builder-winsys = winsys;
+ /* gen6_SURFACE_STATE() may override this */
+ switch (ilo_dev_gen(dev)) {
+ case ILO_GEN(8):
+ builder-mocs = GEN8_MOCS_MT_WB | GEN8_MOCS_CT_L3;
+ break;
+ case ILO_GEN(7.5):
+ case ILO_GEN(7):
+ builder-mocs = GEN7_MOCS_L3_WB;
+ break;
+ default:
+ builder-mocs = 0;
+ break;
+ }
+
for (i = 0; i ILO_BUILDER_WRITER_COUNT; i++)
ilo_builder_writer_init(builder, i);
}
diff --git a/src/gallium/drivers/ilo/ilo_builder.h
b/src/gallium/drivers/ilo/ilo_builder.h
index cb639d1..e0e9f53 100644
--- a/src/gallium/drivers/ilo/ilo_builder.h
+++ b/src/gallium/drivers/ilo/ilo_builder.h
@@ -100,6 +100,7 @@ struct ilo_builder_snapshot {
struct ilo_builder {
const struct ilo_dev_info *dev;
struct intel_winsys *winsys;
+ uint32_t mocs;
struct ilo_builder_writer writers[ILO_BUILDER_WRITER_COUNT];
bool unrecoverable_error;
diff --git a/src/gallium/drivers/ilo/ilo_builder_3d_bottom.h
b/src/gallium/drivers/ilo/ilo_builder_3d_bottom.h
index ece1423..4f203d1 100644
--- a/src/gallium/drivers/ilo/ilo_builder_3d_bottom.h
+++ b/src/gallium/drivers/ilo/ilo_builder_3d_bottom.h
@@ -1182,6 +1182,8 @@ gen6_3DSTATE_DEPTH_BUFFER(struct ilo_builder *builder,
dw[6] = zs-payload[4];
dw[7] = zs-payload[5];
+ dw[5] |= builder-mocs GEN8_DEPTH_DW5_MOCS__SHIFT;
+
if (zs-bo) {
ilo_builder_batch_reloc64(builder, pos + 2, zs-bo,
zs-payload[1], INTEL_RELOC_WRITE);
@@ -1192,6 +1194,11 @@ gen6_3DSTATE_DEPTH_BUFFER(struct ilo_builder *builder,
dw[5] = zs-payload[4];
dw[6] = zs-payload[5];
+ if (ilo_dev_gen(builder-dev) = ILO_GEN(7))
+ dw[4] |= builder-mocs GEN7_DEPTH_DW4_MOCS__SHIFT;
+ else
+ dw[6] |= builder-mocs GEN6_DEPTH_DW6_MOCS__SHIFT;
+
if (zs-bo) {
ilo_builder_batch_reloc(builder, pos + 2, zs-bo,
zs-payload[1], INTEL_RELOC_WRITE);
@@ -1220,6 +1227,8 @@ gen6_3DSTATE_STENCIL_BUFFER(struct ilo_builder *builder,
dw[2] = 0;
if (ilo_dev_gen(builder-dev) = ILO_GEN(8)) {
+ dw[1] |= builder-mocs GEN8_STENCIL_DW1_MOCS__SHIFT;
+
dw[3] = 0;
dw[4] = zs-payload[8];
@@ -1228,6 +1237,8 @@ gen6_3DSTATE_STENCIL_BUFFER(struct ilo_builder *builder,
zs-separate_s8_bo, zs-payload[7], INTEL_RELOC_WRITE);
}
} else {
+ dw[1] |= builder-mocs GEN6_STENCIL_DW1_MOCS__SHIFT;
+
if (zs-separate_s8_bo) {
ilo_builder_batch_reloc(builder, pos + 2,
zs-separate_s8_bo, zs-payload[7], INTEL_RELOC_WRITE);
@@ -1256,6 +1267,8 @@ gen6_3DSTATE_HIER_DEPTH_BUFFER(struct ilo_builder
*builder,
dw[2] = 0;
if (ilo_dev_gen(builder-dev) = ILO_GEN(8)) {
+ dw[1] |= builder-mocs GEN8_HIZ_DW1_MOCS__SHIFT;
+
dw[3] = 0;
dw[4] = zs-payload[11];
@@ -1264,6 +1277,8 @@ gen6_3DSTATE_HIER_DEPTH_BUFFER(struct ilo_builder
*builder,
zs-hiz_bo, zs-payload[10], INTEL_RELOC_WRITE);
}
} else {
+ dw[1] |= builder-mocs GEN6_HIZ_DW1_MOCS__SHIFT;
+
if (zs-hiz_bo) {
ilo_builder_batch_reloc(builder, pos + 2,
zs-hiz_bo, zs-payload[10], INTEL_RELOC_WRITE);
diff --git a/src/gallium/drivers/ilo/ilo_builder_3d_top.h
b/src/gallium/drivers/ilo/ilo_builder_3d_top.h
index ab1374a..b968beb 100644
--- a/src/gallium/drivers/ilo/ilo_builder_3d_top.h
+++ b/src/gallium/drivers/ilo/ilo_builder_3d_top.h
@@ -479,6 +479,11 @@ gen6_3DSTATE_VERTEX_BUFFERS(struct ilo_builder *builder,
dw[0] = hw_idx GEN6_VB_DW0_INDEX__SHIFT;
+ if (ilo_dev_gen(builder-dev) = ILO_GEN(8))
+ dw[0] |= builder-mocs GEN8_VB_DW0_MOCS__SHIFT;
+ else
+ dw[0] |= builder-mocs GEN6_VB_DW0_MOCS__SHIFT;
+
if (ilo_dev_gen(builder-dev) = ILO_GEN(7))
dw[0] |= GEN7_VB_DW0_ADDR_MODIFIED;
@@ -650,9 +655,9 @@ gen6_3DSTATE_INDEX_BUFFER(struct ilo_builder *builder
Mesa (master): ilo: track if a ilo_view_surface is a scanout
Module: Mesa
Branch: master
Commit: c7d17f8a80e99014743c0efbdb434c0bb281eb6c
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=c7d17f8a80e99014743c0efbdb434c0bb281eb6c
Author: Chia-I Wu olva...@gmail.com
Date: Fri Mar 6 04:24:34 2015 +0800
ilo: track if a ilo_view_surface is a scanout
Scanouts require a different cache type.
---
src/gallium/drivers/ilo/ilo_state.h|2 ++
src/gallium/drivers/ilo/ilo_state_3d_top.c | 30 +---
2 files changed, 16 insertions(+), 16 deletions(-)
diff --git a/src/gallium/drivers/ilo/ilo_state.h
b/src/gallium/drivers/ilo/ilo_state.h
index 0155595..5374d51 100644
--- a/src/gallium/drivers/ilo/ilo_state.h
+++ b/src/gallium/drivers/ilo/ilo_state.h
@@ -302,6 +302,8 @@ struct ilo_view_surface {
/* SURFACE_STATE */
uint32_t payload[13];
struct intel_bo *bo;
+
+ uint32_t scanout;
};
struct ilo_view_cso {
diff --git a/src/gallium/drivers/ilo/ilo_state_3d_top.c
b/src/gallium/drivers/ilo/ilo_state_3d_top.c
index ffa9ed8..067e735 100644
--- a/src/gallium/drivers/ilo/ilo_state_3d_top.c
+++ b/src/gallium/drivers/ilo/ilo_state_3d_top.c
@@ -462,8 +462,6 @@ view_init_null_gen6(const struct ilo_dev_info *dev,
dw[4] = 0;
dw[5] = 0;
-
- surf-bo = NULL;
}
static void
@@ -555,9 +553,6 @@ view_init_for_buffer_gen6(const struct ilo_dev_info *dev,
dw[4] = 0;
dw[5] = 0;
-
- /* do not increment reference count */
- surf-bo = buf-bo;
}
static void
@@ -722,9 +717,6 @@ view_init_for_texture_gen6(const struct ilo_dev_info *dev,
assert(tex-layout.align_j == 2 || tex-layout.align_j == 4);
if (tex-layout.align_j == 4)
dw[5] |= GEN6_SURFACE_DW5_VALIGN_4;
-
- /* do not increment reference count */
- surf-bo = tex-bo;
}
static void
@@ -796,8 +788,6 @@ view_init_null_gen7(const struct ilo_dev_info *dev,
if (ilo_dev_gen(dev) = ILO_GEN(8))
memset(dw[8], 0, sizeof(*dw) * (13 - 8));
-
- surf-bo = NULL;
}
static void
@@ -925,9 +915,6 @@ view_init_for_buffer_gen7(const struct ilo_dev_info *dev,
GEN_SHIFT32(GEN75_SCS_BLUE, GEN75_SURFACE_DW7_SCS_B) |
GEN_SHIFT32(GEN75_SCS_ALPHA, GEN75_SURFACE_DW7_SCS_A);
}
-
- /* do not increment reference count */
- surf-bo = buf-bo;
}
static void
@@ -1195,9 +1182,6 @@ view_init_for_texture_gen7(const struct ilo_dev_info *dev,
if (ilo_dev_gen(dev) = ILO_GEN(8))
memset(dw[8], 0, sizeof(*dw) * (13 - 8));
-
- /* do not increment reference count */
- surf-bo = tex-bo;
}
void
@@ -1213,6 +1197,9 @@ ilo_gpe_init_view_surface_null(const struct ilo_dev_info
*dev,
view_init_null_gen6(dev,
width, height, depth, level, surf);
}
+
+ surf-bo = NULL;
+ surf-scanout = false;
}
void
@@ -1231,6 +1218,10 @@ ilo_gpe_init_view_surface_for_buffer(const struct
ilo_dev_info *dev,
view_init_for_buffer_gen6(dev, buf, offset, size,
struct_size, elem_format, is_rt, render_cache_rw, surf);
}
+
+ /* do not increment reference count */
+ surf-bo = buf-bo;
+ surf-scanout = false;
}
void
@@ -1253,6 +1244,13 @@ ilo_gpe_init_view_surface_for_texture(const struct
ilo_dev_info *dev,
first_level, num_levels, first_layer, num_layers,
is_rt, surf);
}
+
+ /* do not increment reference count */
+ surf-bo = tex-bo;
+
+ /* assume imported RTs are scanouts */
+ surf-scanout = ((tex-base.bind PIPE_BIND_SCANOUT) ||
+ (tex-imported (tex-base.bind PIPE_BIND_RENDER_TARGET)));
}
static void
___
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Mesa (master): ilo: replace intel_tiling_mode by gen_surface_tiling
Module: Mesa
Branch: master
Commit: 0ac706535a07d003b9a40f8bad5445dd50f6c35b
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=0ac706535a07d003b9a40f8bad5445dd50f6c35b
Author: Chia-I Wu olva...@gmail.com
Date: Thu Mar 5 23:53:16 2015 +0800
ilo: replace intel_tiling_mode by gen_surface_tiling
The former is used by the kernel driver to set up fence registers and to pass
tiling info across processes. It lacks INTEL_TILING_W, which made our code
less expressive.
---
src/gallium/drivers/ilo/ilo_blitter_blt.c | 32 +
src/gallium/drivers/ilo/ilo_builder_blt.h | 17 +++--
src/gallium/drivers/ilo/ilo_layout.c | 86 -
src/gallium/drivers/ilo/ilo_layout.h | 26
src/gallium/drivers/ilo/ilo_resource.c| 66 +++
src/gallium/drivers/ilo/ilo_state.c |2 +-
src/gallium/drivers/ilo/ilo_state_3d.h| 19 --
src/gallium/drivers/ilo/ilo_state_3d_bottom.c |6 +-
src/gallium/drivers/ilo/ilo_state_3d_top.c| 14 ++--
src/gallium/drivers/ilo/ilo_transfer.c| 35 +-
10 files changed, 167 insertions(+), 136 deletions(-)
diff --git a/src/gallium/drivers/ilo/ilo_blitter_blt.c
b/src/gallium/drivers/ilo/ilo_blitter_blt.c
index 86ca1e9..7667d4e 100644
--- a/src/gallium/drivers/ilo/ilo_blitter_blt.c
+++ b/src/gallium/drivers/ilo/ilo_blitter_blt.c
@@ -38,8 +38,10 @@
static uint32_t
ilo_blitter_blt_begin(struct ilo_blitter *blitter, int max_cmd_size,
- struct intel_bo *dst, enum intel_tiling_mode dst_tiling,
- struct intel_bo *src, enum intel_tiling_mode src_tiling)
+ struct intel_bo *dst,
+ enum gen_surface_tiling dst_tiling,
+ struct intel_bo *src,
+ enum gen_surface_tiling src_tiling)
{
struct ilo_cp *cp = blitter-ilo-cp;
struct intel_bo *aper_check[2];
@@ -64,12 +66,19 @@ ilo_blitter_blt_begin(struct ilo_blitter *blitter, int
max_cmd_size,
/* set BCS_SWCTRL */
swctrl = 0x0;
- if (dst_tiling == INTEL_TILING_Y) {
+ assert(dst_tiling == GEN6_TILING_NONE ||
+ dst_tiling == GEN6_TILING_X ||
+ dst_tiling == GEN6_TILING_Y);
+ assert(src_tiling == GEN6_TILING_NONE ||
+ src_tiling == GEN6_TILING_X ||
+ src_tiling == GEN6_TILING_Y);
+
+ if (dst_tiling == GEN6_TILING_Y) {
swctrl |= GEN6_REG_BCS_SWCTRL_DST_TILING_Y 16 |
GEN6_REG_BCS_SWCTRL_DST_TILING_Y;
}
- if (src src_tiling == INTEL_TILING_Y) {
+ if (src src_tiling == GEN6_TILING_Y) {
swctrl |= GEN6_REG_BCS_SWCTRL_SRC_TILING_Y 16 |
GEN6_REG_BCS_SWCTRL_SRC_TILING_Y;
}
@@ -136,7 +145,7 @@ buf_clear_region(struct ilo_blitter *blitter,
ilo_blitter_blt_begin(blitter, GEN6_COLOR_BLT__SIZE *
(1 + size / 32764 / gen6_blt_max_scanlines),
- dst.bo, INTEL_TILING_NONE, NULL, INTEL_TILING_NONE);
+ dst.bo, GEN6_TILING_NONE, NULL, GEN6_TILING_NONE);
while (size) {
unsigned width, height;
@@ -188,7 +197,7 @@ buf_copy_region(struct ilo_blitter *blitter,
ilo_blitter_blt_begin(blitter, GEN6_SRC_COPY_BLT__SIZE *
(1 + size / 32764 / gen6_blt_max_scanlines),
- dst_buf-bo, INTEL_TILING_NONE, src_buf-bo, INTEL_TILING_NONE);
+ dst_buf-bo, GEN6_TILING_NONE, src_buf-bo, GEN6_TILING_NONE);
while (size) {
unsigned width, height;
@@ -239,8 +248,8 @@ tex_clear_region(struct ilo_blitter *blitter,
uint32_t swctrl;
int slice;
- /* no W-tiling support */
- if (dst_tex-separate_s8)
+ /* no W-tiling nor separate stencil support */
+ if (dst_tex-layout.tiling == GEN8_TILING_W || dst_tex-separate_s8)
return false;
if (dst_tex-layout.bo_stride max_extent)
@@ -256,7 +265,7 @@ tex_clear_region(struct ilo_blitter *blitter,
swctrl = ilo_blitter_blt_begin(blitter,
GEN6_XY_COLOR_BLT__SIZE * dst_box-depth,
- dst_tex-bo, dst_tex-layout.tiling, NULL, INTEL_TILING_NONE);
+ dst_tex-bo, dst_tex-layout.tiling, NULL, GEN6_TILING_NONE);
for (slice = 0; slice dst_box-depth; slice++) {
unsigned x, y;
@@ -299,8 +308,9 @@ tex_copy_region(struct ilo_blitter *blitter,
uint32_t swctrl;
int cpp, xscale, slice;
- /* no W-tiling support */
- if (dst_tex-separate_s8 || src_tex-separate_s8)
+ /* no W-tiling nor separate stencil support */
+ if (dst_tex-layout.tiling == GEN8_TILING_W || dst_tex-separate_s8 ||
+ src_tex-layout.tiling == GEN8_TILING_W || src_tex-separate_s8)
return false;
if (dst_tex-layout.bo_stride max_extent ||
diff --git a/src/gallium/drivers/ilo/ilo_builder_blt.h
b/src/gallium/drivers/ilo/ilo_builder_blt.h
index 1da3cd8..327f698 100644
--- a/src/gallium/drivers/ilo/ilo_builder_blt.h
+++ b/src/gallium/drivers/ilo/ilo_builder_blt.h
@@ -53,7 +53,7 @@ struct gen6_blt_xy_bo {
uint32_t offset;
int16_t pitch
Mesa (master): ilo: add intel_bo_set_tiling()
Module: Mesa
Branch: master
Commit: 70ef171e91582f60a010a4f0ea9f7ff5ba971ab4
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=70ef171e91582f60a010a4f0ea9f7ff5ba971ab4
Author: Chia-I Wu olva...@gmail.com
Date: Fri Mar 6 01:36:01 2015 +0800
ilo: add intel_bo_set_tiling()
Make intel_winsys_alloc_bo() always allocate a linear bo, and add
intel_bo_set_tiling() to set the tiling. Document the purpose of tiling.
---
src/gallium/drivers/ilo/ilo_builder.c |2 +-
src/gallium/drivers/ilo/ilo_draw.c |2 +-
src/gallium/drivers/ilo/ilo_render.c|2 +-
src/gallium/drivers/ilo/ilo_resource.c | 33 +++
src/gallium/drivers/ilo/intel_winsys.h | 40 +
src/gallium/winsys/intel/drm/intel_drm_winsys.c | 72 +++
6 files changed, 71 insertions(+), 80 deletions(-)
diff --git a/src/gallium/drivers/ilo/ilo_builder.c
b/src/gallium/drivers/ilo/ilo_builder.c
index 92a1290..52c4b21 100644
--- a/src/gallium/drivers/ilo/ilo_builder.c
+++ b/src/gallium/drivers/ilo/ilo_builder.c
@@ -139,7 +139,7 @@ alloc_writer_bo(struct intel_winsys *winsys,
[ILO_BUILDER_WRITER_INSTRUCTION] = instruction,
};
- return intel_winsys_alloc_buffer(winsys, writer_names[which], size, true);
+ return intel_winsys_alloc_bo(winsys, writer_names[which], size, true);
}
static void *
diff --git a/src/gallium/drivers/ilo/ilo_draw.c
b/src/gallium/drivers/ilo/ilo_draw.c
index 9d1c419..02e5225 100644
--- a/src/gallium/drivers/ilo/ilo_draw.c
+++ b/src/gallium/drivers/ilo/ilo_draw.c
@@ -183,7 +183,7 @@ ilo_init_draw_query(struct ilo_context *ilo, struct
ilo_query *q)
q-stride = q-in_pairs;
bo_size = (q-stride 4096) ? q-stride : 4096;
- q-bo = intel_winsys_alloc_buffer(ilo-winsys, query, bo_size, false);
+ q-bo = intel_winsys_alloc_bo(ilo-winsys, query, bo_size, false);
if (!q-bo)
return false;
diff --git a/src/gallium/drivers/ilo/ilo_render.c
b/src/gallium/drivers/ilo/ilo_render.c
index c1ed2c3..c549256 100644
--- a/src/gallium/drivers/ilo/ilo_render.c
+++ b/src/gallium/drivers/ilo/ilo_render.c
@@ -113,7 +113,7 @@ ilo_render_create(struct ilo_builder *builder)
render-dev = builder-dev;
render-builder = builder;
- render-workaround_bo = intel_winsys_alloc_buffer(builder-winsys,
+ render-workaround_bo = intel_winsys_alloc_bo(builder-winsys,
PIPE_CONTROL workaround, 4096, false);
if (!render-workaround_bo) {
ilo_warn(failed to allocate PIPE_CONTROL workaround bo\n);
diff --git a/src/gallium/drivers/ilo/ilo_resource.c
b/src/gallium/drivers/ilo/ilo_resource.c
index 6dfc580..9f4ee40 100644
--- a/src/gallium/drivers/ilo/ilo_resource.c
+++ b/src/gallium/drivers/ilo/ilo_resource.c
@@ -185,16 +185,24 @@ tex_create_bo(struct ilo_texture *tex)
struct ilo_screen *is = ilo_screen(tex-base.screen);
const char *name = resource_get_bo_name(tex-base);
const bool cpu_init = resource_get_cpu_init(tex-base);
- enum intel_tiling_mode tiling;
+ struct intel_bo *bo;
- /* no native support */
- if (tex-layout.tiling == GEN8_TILING_W)
- tiling = INTEL_TILING_NONE;
- else
- tiling = surface_to_winsys_tiling(tex-layout.tiling);
+ bo = intel_winsys_alloc_bo(is-winsys, name,
+ tex-layout.bo_stride * tex-layout.bo_height, cpu_init);
+
+ /* set the tiling for transfer and export */
+ if (bo (tex-layout.tiling == GEN6_TILING_X ||
+ tex-layout.tiling == GEN6_TILING_Y)) {
+ const enum intel_tiling_mode tiling =
+ surface_to_winsys_tiling(tex-layout.tiling);
+
+ if (intel_bo_set_tiling(bo, tiling, tex-layout.bo_stride)) {
+ intel_bo_unreference(bo);
+ bo = NULL;
+ }
+ }
- tex-bo = intel_winsys_alloc_bo(is-winsys, name, tiling,
- tex-layout.bo_stride, tex-layout.bo_height, cpu_init);
+ tex-bo = bo;
return (tex-bo != NULL);
}
@@ -230,7 +238,7 @@ tex_create_hiz(struct ilo_texture *tex)
struct ilo_screen *is = ilo_screen(tex-base.screen);
unsigned lv;
- tex-aux_bo = intel_winsys_alloc_buffer(is-winsys, hiz texture,
+ tex-aux_bo = intel_winsys_alloc_bo(is-winsys, hiz texture,
tex-layout.aux_stride * tex-layout.aux_height, false);
if (!tex-aux_bo)
return false;
@@ -259,7 +267,7 @@ tex_create_mcs(struct ilo_texture *tex)
assert(tex-layout.aux_enables == (1 (tex-base.last_level + 1)) - 1);
- tex-aux_bo = intel_winsys_alloc_buffer(is-winsys, mcs texture,
+ tex-aux_bo = intel_winsys_alloc_bo(is-winsys, mcs texture,
tex-layout.aux_stride * tex-layout.aux_height, false);
if (!tex-aux_bo)
return false;
@@ -383,7 +391,7 @@ tex_get_handle(struct ilo_texture *tex, struct
winsys_handle *handle)
enum intel_tiling_mode tiling;
int err;
- /* no native support */
+ /* must match what tex_create_bo() sets */
if (tex-layout.tiling == GEN8_TILING_W)
tiling = INTEL_TILING_NONE;
else
@@ -402,8 +410,7
Mesa (master): ilo: add more convenient intel_bo_{ref,unref}()
Module: Mesa
Branch: master
Commit: 4ddd981e407f9e97fcbb862c241f1ce165616fd4
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=4ddd981e407f9e97fcbb862c241f1ce165616fd4
Author: Chia-I Wu olva...@gmail.com
Date: Fri Mar 6 02:03:10 2015 +0800
ilo: add more convenient intel_bo_{ref,unref}()
They both check for NULL and intel_bo_ref() returns the referenced bo. They
replace intel_bo_{reference,unreference}().
---
src/gallium/drivers/ilo/ilo_builder.c | 13 +
src/gallium/drivers/ilo/ilo_cp.c|6 ++
src/gallium/drivers/ilo/ilo_query.c |4 +---
src/gallium/drivers/ilo/ilo_render.c|4 +---
src/gallium/drivers/ilo/ilo_resource.c | 17 +++--
src/gallium/drivers/ilo/ilo_screen.c| 14 +-
src/gallium/drivers/ilo/intel_winsys.h | 10 +-
src/gallium/winsys/intel/drm/intel_drm_winsys.c | 14 +-
8 files changed, 35 insertions(+), 47 deletions(-)
diff --git a/src/gallium/drivers/ilo/ilo_builder.c
b/src/gallium/drivers/ilo/ilo_builder.c
index 52c4b21..56920e5 100644
--- a/src/gallium/drivers/ilo/ilo_builder.c
+++ b/src/gallium/drivers/ilo/ilo_builder.c
@@ -99,10 +99,8 @@ ilo_builder_writer_reset(struct ilo_builder *builder,
writer-ptr = NULL;
}
- if (writer-bo) {
- intel_bo_unreference(writer-bo);
- writer-bo = NULL;
- }
+ intel_bo_unref(writer-bo);
+ writer-bo = NULL;
writer-used = 0;
writer-stolen = 0;
@@ -168,8 +166,7 @@ ilo_builder_writer_alloc_and_map(struct ilo_builder
*builder,
bo = alloc_writer_bo(builder-winsys, which, writer-size);
if (bo) {
- if (writer-bo)
-intel_bo_unreference(writer-bo);
+ intel_bo_unref(writer-bo);
writer-bo = bo;
} else if (writer-bo) {
/* reuse the old bo */
@@ -273,7 +270,7 @@ ilo_builder_writer_grow(struct ilo_builder *builder,
}
if (!new_ptr) {
- intel_bo_unreference(new_bo);
+ intel_bo_unref(new_bo);
return false;
}
@@ -282,7 +279,7 @@ ilo_builder_writer_grow(struct ilo_builder *builder,
else if (!preserve)
FREE(writer-ptr);
- intel_bo_unreference(writer-bo);
+ intel_bo_unref(writer-bo);
writer-size = new_size;
writer-bo = new_bo;
diff --git a/src/gallium/drivers/ilo/ilo_cp.c b/src/gallium/drivers/ilo/ilo_cp.c
index f78fd1f..9d2dffd 100644
--- a/src/gallium/drivers/ilo/ilo_cp.c
+++ b/src/gallium/drivers/ilo/ilo_cp.c
@@ -163,10 +163,8 @@ ilo_cp_submit_internal(struct ilo_cp *cp)
if (!err) {
bool guilty;
- if (cp-last_submitted_bo)
- intel_bo_unreference(cp-last_submitted_bo);
- cp-last_submitted_bo = bo;
- intel_bo_reference(cp-last_submitted_bo);
+ intel_bo_unref(cp-last_submitted_bo);
+ cp-last_submitted_bo = intel_bo_ref(bo);
guilty = ilo_cp_detect_hang(cp);
diff --git a/src/gallium/drivers/ilo/ilo_query.c
b/src/gallium/drivers/ilo/ilo_query.c
index 942df2d..7a2e503 100644
--- a/src/gallium/drivers/ilo/ilo_query.c
+++ b/src/gallium/drivers/ilo/ilo_query.c
@@ -107,9 +107,7 @@ ilo_destroy_query(struct pipe_context *pipe, struct
pipe_query *query)
{
struct ilo_query *q = ilo_query(query);
- if (q-bo)
- intel_bo_unreference(q-bo);
-
+ intel_bo_unref(q-bo);
FREE(q);
}
diff --git a/src/gallium/drivers/ilo/ilo_render.c
b/src/gallium/drivers/ilo/ilo_render.c
index c549256..a6614f1 100644
--- a/src/gallium/drivers/ilo/ilo_render.c
+++ b/src/gallium/drivers/ilo/ilo_render.c
@@ -154,9 +154,7 @@ ilo_render_create(struct ilo_builder *builder)
void
ilo_render_destroy(struct ilo_render *render)
{
- if (render-workaround_bo)
- intel_bo_unreference(render-workaround_bo);
-
+ intel_bo_unref(render-workaround_bo);
FREE(render);
}
diff --git a/src/gallium/drivers/ilo/ilo_resource.c
b/src/gallium/drivers/ilo/ilo_resource.c
index 9f4ee40..7815354 100644
--- a/src/gallium/drivers/ilo/ilo_resource.c
+++ b/src/gallium/drivers/ilo/ilo_resource.c
@@ -171,7 +171,7 @@ tex_import_handle(struct ilo_texture *tex,
if (!ilo_layout_update_for_imported_bo(tex-layout,
winsys_to_surface_tiling(tiling), pitch)) {
ilo_err(imported handle has incompatible tiling/pitch\n);
- intel_bo_unreference(tex-bo);
+ intel_bo_unref(tex-bo);
tex-bo = NULL;
return false;
}
@@ -197,7 +197,7 @@ tex_create_bo(struct ilo_texture *tex)
surface_to_winsys_tiling(tex-layout.tiling);
if (intel_bo_set_tiling(bo, tiling, tex-layout.bo_stride)) {
- intel_bo_unreference(bo);
+ intel_bo_unref(bo);
bo = NULL;
}
}
@@ -278,14 +278,11 @@ tex_create_mcs(struct ilo_texture *tex)
static void
tex_destroy(struct ilo_texture *tex)
{
- if (tex-aux_bo)
- intel_bo_unreference(tex-aux_bo);
-
if (tex-separate_s8)
tex_destroy(tex-separate_s8);
- if (tex-bo)
- intel_bo_unreference(tex
Mesa (master): ilo: update genhw headers
Module: Mesa Branch: master Commit: eb32ac19569b5f05fc3fa2621b52f2c9fa85556a URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=eb32ac19569b5f05fc3fa2621b52f2c9fa85556a Author: Chia-I Wu olva...@gmail.com Date: Thu Mar 5 15:25:43 2015 +0800 ilo: update genhw headers The main change is non-inline enums are now generated as C enums. --- src/gallium/drivers/ilo/genhw/gen_eu_isa.xml.h | 457 ++ src/gallium/drivers/ilo/genhw/gen_eu_message.xml.h | 283 +-- src/gallium/drivers/ilo/genhw/gen_mi.xml.h | 72 +-- src/gallium/drivers/ilo/genhw/gen_render.xml.h | 36 +- src/gallium/drivers/ilo/genhw/gen_render_3d.xml.h | 176 +++ .../drivers/ilo/genhw/gen_render_dynamic.xml.h | 249 ++ .../drivers/ilo/genhw/gen_render_surface.xml.h | 495 ++-- 7 files changed, 986 insertions(+), 782 deletions(-) Diff: http://cgit.freedesktop.org/mesa/mesa/diff/?id=eb32ac19569b5f05fc3fa2621b52f2c9fa85556a ___ mesa-commit mailing list mesa-commit@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-commit
Mesa (master): ilo: add ILO_DEBUG=hang
Module: Mesa
Branch: master
Commit: 68d2e395d9e18898ef74a635a93dfc4501c1c507
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=68d2e395d9e18898ef74a635a93dfc4501c1c507
Author: Chia-I Wu olva...@gmail.com
Date: Wed Mar 4 13:07:55 2015 -0700
ilo: add ILO_DEBUG=hang
When set, detect and dump the hanging batch bufffer.
---
src/gallium/drivers/ilo/ilo_builder.h |2 +-
src/gallium/drivers/ilo/ilo_common.h |3 ++-
src/gallium/drivers/ilo/ilo_cp.c | 38 -
src/gallium/drivers/ilo/ilo_cp.h |3 +++
src/gallium/drivers/ilo/ilo_screen.c |3 ++-
5 files changed, 45 insertions(+), 4 deletions(-)
diff --git a/src/gallium/drivers/ilo/ilo_builder.h
b/src/gallium/drivers/ilo/ilo_builder.h
index 0de7b5d..c902a8f 100644
--- a/src/gallium/drivers/ilo/ilo_builder.h
+++ b/src/gallium/drivers/ilo/ilo_builder.h
@@ -171,7 +171,7 @@ ilo_builder_writer_checked_record(struct ilo_builder
*builder,
enum ilo_builder_item_type item,
unsigned offset, unsigned size)
{
- if (unlikely(ilo_debug ILO_DEBUG_BATCH)) {
+ if (unlikely(ilo_debug (ILO_DEBUG_BATCH | ILO_DEBUG_HANG))) {
if (!ilo_builder_writer_record(builder, which, item, offset, size)) {
builder-unrecoverable_error = true;
builder-writers[which].item_used = 0;
diff --git a/src/gallium/drivers/ilo/ilo_common.h
b/src/gallium/drivers/ilo/ilo_common.h
index 23a7080..1ed964f 100644
--- a/src/gallium/drivers/ilo/ilo_common.h
+++ b/src/gallium/drivers/ilo/ilo_common.h
@@ -63,6 +63,7 @@ enum ilo_debug {
ILO_DEBUG_CS= 1 4,
ILO_DEBUG_DRAW = ILO_DEBUG_HOT 5,
ILO_DEBUG_SUBMIT= 1 6,
+ ILO_DEBUG_HANG = 1 7,
/* flags that affect the behaviors of the driver */
ILO_DEBUG_NOHW = 1 20,
@@ -82,7 +83,7 @@ struct ilo_dev_info {
bool has_timestamp;
bool has_gen7_sol_reset;
- /* use ilo_dev_gen() */
+ /* use ilo_dev_gen() to access */
int gen_opaque;
int gt;
diff --git a/src/gallium/drivers/ilo/ilo_cp.c b/src/gallium/drivers/ilo/ilo_cp.c
index 67de95b..f78fd1f 100644
--- a/src/gallium/drivers/ilo/ilo_cp.c
+++ b/src/gallium/drivers/ilo/ilo_cp.c
@@ -105,6 +105,35 @@ ilo_cp_end_batch(struct ilo_cp *cp, unsigned *used)
return bo;
}
+static bool
+ilo_cp_detect_hang(struct ilo_cp *cp)
+{
+ uint32_t active_lost, pending_lost;
+ bool guilty = false;
+
+ if (likely(!(ilo_debug ILO_DEBUG_HANG)))
+ return false;
+
+ /* wait and get reset stats */
+ if (intel_bo_wait(cp-last_submitted_bo, -1) ||
+ intel_winsys_get_reset_stats(cp-winsys, cp-render_ctx,
+ active_lost, pending_lost))
+ return false;
+
+ if (cp-active_lost != active_lost) {
+ ilo_err(GPU hang caused by bo %p\n, cp-last_submitted_bo);
+ cp-active_lost = active_lost;
+ guilty = true;
+ }
+
+ if (cp-pending_lost != pending_lost) {
+ ilo_err(GPU hang detected\n);
+ cp-pending_lost = pending_lost;
+ }
+
+ return guilty;
+}
+
/**
* Flush the command parser and execute the commands. When the parser buffer
* is empty, the callback is not invoked.
@@ -132,13 +161,20 @@ ilo_cp_submit_internal(struct ilo_cp *cp)
cp-one_off_flags = 0;
if (!err) {
+ bool guilty;
+
if (cp-last_submitted_bo)
intel_bo_unreference(cp-last_submitted_bo);
cp-last_submitted_bo = bo;
intel_bo_reference(cp-last_submitted_bo);
- if (ilo_debug ILO_DEBUG_BATCH)
+ guilty = ilo_cp_detect_hang(cp);
+
+ if (unlikely((ilo_debug ILO_DEBUG_BATCH) || guilty)) {
ilo_builder_decode(cp-builder);
+ if (guilty)
+abort();
+ }
if (cp-submit_callback)
cp-submit_callback(cp, cp-submit_callback_data);
diff --git a/src/gallium/drivers/ilo/ilo_cp.h b/src/gallium/drivers/ilo/ilo_cp.h
index 04b3ad5..dcab55b 100644
--- a/src/gallium/drivers/ilo/ilo_cp.h
+++ b/src/gallium/drivers/ilo/ilo_cp.h
@@ -72,6 +72,9 @@ struct ilo_cp {
struct ilo_builder builder;
struct intel_bo *last_submitted_bo;
+
+ uint32_t active_lost;
+ uint32_t pending_lost;
};
struct ilo_cp *
diff --git a/src/gallium/drivers/ilo/ilo_screen.c
b/src/gallium/drivers/ilo/ilo_screen.c
index 95e34d3..c9577c8 100644
--- a/src/gallium/drivers/ilo/ilo_screen.c
+++ b/src/gallium/drivers/ilo/ilo_screen.c
@@ -48,13 +48,14 @@ struct ilo_fence {
int ilo_debug;
static const struct debug_named_value ilo_debug_flags[] = {
- { batch, ILO_DEBUG_BATCH,Dump batch/state/surface/instruction
buffers },
+ { batch, ILO_DEBUG_BATCH,Dump batch/dynamic/surface/instruction
buffers },
{ vs,ILO_DEBUG_VS, Dump vertex shaders },
{ gs,ILO_DEBUG_GS, Dump geometry shaders },
{ fs,ILO_DEBUG_FS, Dump fragment shaders },
{ cs,ILO_DEBUG_CS, Dump compute shaders },
{ draw, ILO_DEBUG_DRAW, Show draw information
Mesa (master): ilo: add some more winsys functions
Module: Mesa
Branch: master
Commit: af4cff5d6f74460d34bc10f9dc3a9f91e4e11f2d
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=af4cff5d6f74460d34bc10f9dc3a9f91e4e11f2d
Author: Chia-I Wu olva...@gmail.com
Date: Wed Mar 4 12:02:12 2015 -0700
ilo: add some more winsys functions
Add intel_winsys_get_reset_stats(), intel_winsys_import_userptr(), and
intel_bo_map_async(). The latter two are stubs, but we are not going to use
them immediately either.
---
src/gallium/drivers/ilo/intel_winsys.h | 30 +-
src/gallium/winsys/intel/drm/intel_drm_winsys.c | 38 ++-
2 files changed, 66 insertions(+), 2 deletions(-)
diff --git a/src/gallium/drivers/ilo/intel_winsys.h
b/src/gallium/drivers/ilo/intel_winsys.h
index 4ee35d7..5a199e2 100644
--- a/src/gallium/drivers/ilo/intel_winsys.h
+++ b/src/gallium/drivers/ilo/intel_winsys.h
@@ -112,6 +112,17 @@ intel_winsys_read_reg(struct intel_winsys *winsys,
uint32_t reg, uint64_t *val);
/**
+ * Return the numbers of submissions lost due to GPU reset.
+ *
+ * \param active_lost Number of lost active/guilty submissions
+ * \param pending_lost Number of lost pending/innocent submissions
+ */
+int
+intel_winsys_get_reset_stats(struct intel_winsys *winsys,
+ struct intel_context *ctx,
+ uint32_t *active_lost,
+ uint32_t *pending_lost);
+/**
* Allocate a buffer object.
*
* \param name Informative description of the bo.
@@ -142,6 +153,19 @@ intel_winsys_alloc_buffer(struct intel_winsys *winsys,
}
/**
+ * Create a bo from a user memory pointer. Both \p userptr and (\p pitch * \p
+ * height) must be page aligned.
+ */
+struct intel_bo *
+intel_winsys_import_userptr(struct intel_winsys *winsys,
+const char *name,
+void *userptr,
+enum intel_tiling_mode tiling,
+unsigned long pitch,
+unsigned long height,
+unsigned long flags);
+
+/**
* Create a bo from a winsys handle.
*/
struct intel_bo *
@@ -223,12 +247,16 @@ intel_bo_unreference(struct intel_bo *bo);
* sequential writes, but reads would be very slow. Callers always have a
* linear view of the bo.
*
- * map_gtt_async() is similar to map_gtt(), except that it does not block.
+ * map_async() and map_gtt_async() work similar to map() and map_gtt()
+ * respectively, except that they do not block.
*/
void *
intel_bo_map(struct intel_bo *bo, bool write_enable);
void *
+intel_bo_map_async(struct intel_bo *bo);
+
+void *
intel_bo_map_gtt(struct intel_bo *bo);
void *
diff --git a/src/gallium/winsys/intel/drm/intel_drm_winsys.c
b/src/gallium/winsys/intel/drm/intel_drm_winsys.c
index 9b94ac6..a41cbb0 100644
--- a/src/gallium/winsys/intel/drm/intel_drm_winsys.c
+++ b/src/gallium/winsys/intel/drm/intel_drm_winsys.c
@@ -55,6 +55,12 @@ struct intel_winsys {
struct drm_intel_decode *decode;
};
+static drm_intel_context *
+gem_ctx(const struct intel_context *ctx)
+{
+ return (drm_intel_context *) ctx;
+}
+
static drm_intel_bo *
gem_bo(const struct intel_bo *bo)
{
@@ -244,7 +250,7 @@ void
intel_winsys_destroy_context(struct intel_winsys *winsys,
struct intel_context *ctx)
{
- drm_intel_gem_context_destroy((drm_intel_context *) ctx);
+ drm_intel_gem_context_destroy(gem_ctx(ctx));
}
int
@@ -254,6 +260,18 @@ intel_winsys_read_reg(struct intel_winsys *winsys,
return drm_intel_reg_read(winsys-bufmgr, reg, val);
}
+int
+intel_winsys_get_reset_stats(struct intel_winsys *winsys,
+ struct intel_context *ctx,
+ uint32_t *active_lost,
+ uint32_t *pending_lost)
+{
+ uint32_t reset_count;
+
+ return drm_intel_get_reset_stats(gem_ctx(ctx),
+ reset_count, active_lost, pending_lost);
+}
+
struct intel_bo *
intel_winsys_alloc_bo(struct intel_winsys *winsys,
const char *name,
@@ -308,6 +326,18 @@ intel_winsys_alloc_bo(struct intel_winsys *winsys,
}
struct intel_bo *
+intel_winsys_import_userptr(struct intel_winsys *winsys,
+const char *name,
+void *userptr,
+enum intel_tiling_mode tiling,
+unsigned long pitch,
+unsigned long height,
+unsigned long flags)
+{
+ return NULL;
+}
+
+struct intel_bo *
intel_winsys_import_handle(struct intel_winsys *winsys,
const char *name,
const struct winsys_handle *handle,
@@ -497,6 +527,12 @@ intel_bo_map(struct intel_bo *bo, bool write_enable)
}
void *
+intel_bo_map_async(struct intel_bo *bo)
+{
+ return NULL;
+}
+
+void
Mesa (master): ilo: clean up Gen7.5 WAs
Module: Mesa
Branch: master
Commit: 1424bdd61bce26f0853e974fc3b87c4c275e6ef0
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=1424bdd61bce26f0853e974fc3b87c4c275e6ef0
Author: Chia-I Wu olva...@gmail.com
Date: Wed Mar 4 14:09:26 2015 -0700
ilo: clean up Gen7.5 WAs
These WAs
gen7_wa_post_3dstate_push_constant_alloc_ps()
gen7_wa_pre_vs()
gen7_wa_pre_3dstate_sf_depth_bias()
first half of gen7_wa_pre_depth()
gen7_wa_post_ps_and_later()
are Gen7-specific. Update copy-and-pasted gen8_wa_pre_depth() also.
---
src/gallium/drivers/ilo/ilo_render_gen7.c | 80 -
src/gallium/drivers/ilo/ilo_render_gen8.c | 14 -
2 files changed, 43 insertions(+), 51 deletions(-)
diff --git a/src/gallium/drivers/ilo/ilo_render_gen7.c
b/src/gallium/drivers/ilo/ilo_render_gen7.c
index e76db79..cfb9e2e 100644
--- a/src/gallium/drivers/ilo/ilo_render_gen7.c
+++ b/src/gallium/drivers/ilo/ilo_render_gen7.c
@@ -59,7 +59,6 @@ gen7_pipe_control(struct ilo_render *r, uint32_t dw1)
gen6_PIPE_CONTROL(r-builder, dw1, bo, 0, 0);
-
r-state.current_pipe_control_dw1 |= dw1;
r-state.deferred_pipe_control_dw1 = ~dw1;
}
@@ -76,7 +75,7 @@ gen7_wa_post_3dstate_push_constant_alloc_ps(struct ilo_render
*r)
*/
const uint32_t dw1 = GEN6_PIPE_CONTROL_CS_STALL;
- ILO_DEV_ASSERT(r-dev, 7, 7.5);
+ ILO_DEV_ASSERT(r-dev, 7, 7);
r-state.deferred_pipe_control_dw1 |= dw1;
}
@@ -96,7 +95,7 @@ gen7_wa_pre_vs(struct ilo_render *r)
const uint32_t dw1 = GEN6_PIPE_CONTROL_DEPTH_STALL |
GEN6_PIPE_CONTROL_WRITE_IMM;
- ILO_DEV_ASSERT(r-dev, 7, 7.5);
+ ILO_DEV_ASSERT(r-dev, 7, 7);
if ((r-state.current_pipe_control_dw1 dw1) != dw1)
gen7_pipe_control(r, dw1);
@@ -114,7 +113,7 @@ gen7_wa_pre_3dstate_sf_depth_bias(struct ilo_render *r)
*/
const uint32_t dw1 = GEN6_PIPE_CONTROL_CS_STALL;
- ILO_DEV_ASSERT(r-dev, 7, 7.5);
+ ILO_DEV_ASSERT(r-dev, 7, 7);
if ((r-state.current_pipe_control_dw1 dw1) != dw1)
gen7_pipe_control(r, dw1);
@@ -143,21 +142,23 @@ gen7_wa_pre_3dstate_multisample(struct ilo_render *r)
static void
gen7_wa_pre_depth(struct ilo_render *r)
{
- /*
-* From the Ivy Bridge PRM, volume 2 part 1, page 315:
-*
-* Driver must send a least one PIPE_CONTROL command with CS Stall and
-* a post sync operation prior to the group of depth
-* commands(3DSTATE_DEPTH_BUFFER, 3DSTATE_CLEAR_PARAMS,
-* 3DSTATE_STENCIL_BUFFER, and 3DSTATE_HIER_DEPTH_BUFFER).
-*/
- const uint32_t dw1 = GEN6_PIPE_CONTROL_CS_STALL |
-GEN6_PIPE_CONTROL_WRITE_IMM;
-
ILO_DEV_ASSERT(r-dev, 7, 7.5);
- if ((r-state.current_pipe_control_dw1 dw1) != dw1)
- gen7_pipe_control(r, dw1);
+ if (ilo_dev_gen(r-dev) == ILO_GEN(7)) {
+ /*
+ * From the Ivy Bridge PRM, volume 2 part 1, page 315:
+ *
+ * Driver must send a least one PIPE_CONTROL command with CS Stall
+ * and a post sync operation prior to the group of depth
+ * commands(3DSTATE_DEPTH_BUFFER, 3DSTATE_CLEAR_PARAMS,
+ * 3DSTATE_STENCIL_BUFFER, and 3DSTATE_HIER_DEPTH_BUFFER).
+ */
+ const uint32_t dw1 = GEN6_PIPE_CONTROL_CS_STALL |
+ GEN6_PIPE_CONTROL_WRITE_IMM;
+
+ if ((r-state.current_pipe_control_dw1 dw1) != dw1)
+ gen7_pipe_control(r, dw1);
+ }
/*
* From the Ivy Bridge PRM, volume 2 part 1, page 315:
@@ -215,7 +216,7 @@ gen7_wa_post_ps_and_later(struct ilo_render *r)
*/
const uint32_t dw1 = GEN6_PIPE_CONTROL_DEPTH_STALL;
- ILO_DEV_ASSERT(r-dev, 7, 7.5);
+ ILO_DEV_ASSERT(r-dev, 7, 7);
r-state.deferred_pipe_control_dw1 |= dw1;
}
@@ -253,7 +254,7 @@ gen7_draw_common_urb(struct ilo_render *r,
vs_entry_size *= sizeof(float) * 4;
vs_total_size = r-dev-urb_size - offset;
- if (ilo_dev_gen(r-dev) ILO_GEN(8))
+ if (ilo_dev_gen(r-dev) == ILO_GEN(7))
gen7_wa_pre_vs(r);
gen7_3DSTATE_URB_VS(r-builder,
@@ -344,7 +345,7 @@ gen7_draw_vs(struct ilo_render *r,
const bool emit_3dstate_vs = (DIRTY(VS) || r-instruction_bo_changed);
/* emit depth stall before any of the VS commands */
- if (ilo_dev_gen(r-dev) ILO_GEN(8)) {
+ if (ilo_dev_gen(r-dev) == ILO_GEN(7)) {
if (emit_3dstate_binding_table || emit_3dstate_sampler_state ||
emit_3dstate_constant_vs || emit_3dstate_vs)
gen7_wa_pre_vs(r);
@@ -513,7 +514,9 @@ gen7_draw_sf(struct ilo_render *r,
if (DIRTY(RASTERIZER) || DIRTY(FB)) {
struct pipe_surface *zs = vec-fb.state.zsbuf;
- gen7_wa_pre_3dstate_sf_depth_bias(r);
+ if (ilo_dev_gen(r-dev) == ILO_GEN(7))
+ gen7_wa_pre_3dstate_sf_depth_bias(r);
+
gen7_3DSTATE_SF(r-builder,
(vec-rasterizer) ? vec-rasterizer-sf : NULL,
(zs) ? zs-format : PIPE_FORMAT_NONE,
@@ -558,9 +561,7 @@ gen7_draw_wm(struct ilo_render *r
Mesa (master): ilo: improve WA handling in rectlist path
Module: Mesa
Branch: master
Commit: b5eb6f769db71557c86c72c3352db149379fdade
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=b5eb6f769db71557c86c72c3352db149379fdade
Author: Chia-I Wu olva...@gmail.com
Date: Wed Mar 4 14:38:50 2015 -0700
ilo: improve WA handling in rectlist path
Add wrappers for 3DPRIMITIVE to make sure we clear current_pipe_control_dw1
and deferred_pipe_control_dw1 after it. Add missing
gen7_wa_post_ps_and_later().
---
src/gallium/drivers/ilo/ilo_render_gen.h |5
src/gallium/drivers/ilo/ilo_render_gen6.c | 33 +---
src/gallium/drivers/ilo/ilo_render_gen7.c | 40 +
src/gallium/drivers/ilo/ilo_render_gen8.c | 20 ++-
4 files changed, 60 insertions(+), 38 deletions(-)
diff --git a/src/gallium/drivers/ilo/ilo_render_gen.h
b/src/gallium/drivers/ilo/ilo_render_gen.h
index 012c3d7..583265f 100644
--- a/src/gallium/drivers/ilo/ilo_render_gen.h
+++ b/src/gallium/drivers/ilo/ilo_render_gen.h
@@ -439,9 +439,4 @@ gen7_draw_sol(struct ilo_render *r,
const struct ilo_state_vector *vec,
struct ilo_render_draw_session *session);
-void
-gen7_draw_vf_draw(struct ilo_render *r,
- const struct ilo_state_vector *vec,
- struct ilo_render_draw_session *session);
-
#endif /* ILO_RENDER_GEN_H */
diff --git a/src/gallium/drivers/ilo/ilo_render_gen6.c
b/src/gallium/drivers/ilo/ilo_render_gen6.c
index 0221acd..7232882 100644
--- a/src/gallium/drivers/ilo/ilo_render_gen6.c
+++ b/src/gallium/drivers/ilo/ilo_render_gen6.c
@@ -41,7 +41,7 @@
/**
* A wrapper for gen6_PIPE_CONTROL().
*/
-static inline void
+static void
gen6_pipe_control(struct ilo_render *r, uint32_t dw1)
{
struct intel_bo *bo = (dw1 GEN6_PIPE_CONTROL_WRITE__MASK) ?
@@ -56,6 +56,20 @@ gen6_pipe_control(struct ilo_render *r, uint32_t dw1)
assert(!r-state.deferred_pipe_control_dw1);
}
+static void
+gen6_3dprimitive(struct ilo_render *r,
+ const struct pipe_draw_info *info,
+ const struct ilo_ib_state *ib)
+{
+ ILO_DEV_ASSERT(r-dev, 6, 6);
+
+ /* 3DPRIMITIVE */
+ gen6_3DPRIMITIVE(r-builder, info, ib);
+
+ r-state.current_pipe_control_dw1 = 0;
+ assert(!r-state.deferred_pipe_control_dw1);
+}
+
/**
* This should be called before PIPE_CONTROL.
*/
@@ -482,18 +496,6 @@ gen6_draw_vf_statistics(struct ilo_render *r,
gen6_3DSTATE_VF_STATISTICS(r-builder, false);
}
-static void
-gen6_draw_vf_draw(struct ilo_render *r,
- const struct ilo_state_vector *vec,
- struct ilo_render_draw_session *session)
-{
- /* 3DPRIMITIVE */
- gen6_3DPRIMITIVE(r-builder, vec-draw, vec-ib);
-
- r-state.current_pipe_control_dw1 = 0;
- assert(!r-state.deferred_pipe_control_dw1);
-}
-
void
gen6_draw_vs(struct ilo_render *r,
const struct ilo_state_vector *vec,
@@ -850,7 +852,8 @@ ilo_render_emit_draw_commands_gen6(struct ilo_render
*render,
gen6_draw_wm_raster(render, vec, session);
gen6_draw_sf_rect(render, vec, session);
gen6_draw_vf(render, vec, session);
- gen6_draw_vf_draw(render, vec, session);
+
+ gen6_3dprimitive(render, vec-draw, vec-ib);
}
static void
@@ -995,7 +998,7 @@ ilo_render_emit_rectlist_commands_gen6(struct ilo_render *r,
gen6_3DSTATE_DRAWING_RECTANGLE(r-builder, 0, 0,
blitter-fb.width, blitter-fb.height);
- gen6_3DPRIMITIVE(r-builder, blitter-draw, NULL);
+ gen6_3dprimitive(r, blitter-draw, NULL);
}
int
diff --git a/src/gallium/drivers/ilo/ilo_render_gen7.c
b/src/gallium/drivers/ilo/ilo_render_gen7.c
index cfb9e2e..2d3f6cf 100644
--- a/src/gallium/drivers/ilo/ilo_render_gen7.c
+++ b/src/gallium/drivers/ilo/ilo_render_gen7.c
@@ -64,6 +64,23 @@ gen7_pipe_control(struct ilo_render *r, uint32_t dw1)
}
static void
+gen7_3dprimitive(struct ilo_render *r,
+ const struct pipe_draw_info *info,
+ const struct ilo_ib_state *ib)
+{
+ ILO_DEV_ASSERT(r-dev, 7, 7.5);
+
+ if (r-state.deferred_pipe_control_dw1)
+ gen7_pipe_control(r, r-state.deferred_pipe_control_dw1);
+
+ /* 3DPRIMITIVE */
+ gen7_3DPRIMITIVE(r-builder, info, ib);
+
+ r-state.current_pipe_control_dw1 = 0;
+ r-state.deferred_pipe_control_dw1 = 0;
+}
+
+static void
gen7_wa_post_3dstate_push_constant_alloc_ps(struct ilo_render *r)
{
/*
@@ -649,21 +666,6 @@ gen7_draw_wm_multisample(struct ilo_render *r,
}
void
-gen7_draw_vf_draw(struct ilo_render *r,
- const struct ilo_state_vector *vec,
- struct ilo_render_draw_session *session)
-{
- if (r-state.deferred_pipe_control_dw1)
- gen7_pipe_control(r, r-state.deferred_pipe_control_dw1);
-
- /* 3DPRIMITIVE */
- gen7_3DPRIMITIVE(r-builder, vec-draw, vec-ib);
-
- r-state.current_pipe_control_dw1 = 0;
- r-state.deferred_pipe_control_dw1 = 0;
-}
-
-void
ilo_render_emit_draw_commands_gen7(struct ilo_render *render
Mesa (master): ilo: R32G32B32_FLOAT need no special care on Gen8+
Module: Mesa Branch: master Commit: 9fe81879c54562a4abbfba3eb5f6081f152c83db URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=9fe81879c54562a4abbfba3eb5f6081f152c83db Author: Chia-I Wu olva...@gmail.com Date: Sat Feb 21 00:35:49 2015 +0800 ilo: R32G32B32_FLOAT need no special care on Gen8+ Gen8+ must use VALIGN_4. Unlike prior Gens, R32G32B32_FLOAT should supposedly support VALIGN_4. --- src/gallium/drivers/ilo/ilo_layout.c |9 ++--- 1 file changed, 6 insertions(+), 3 deletions(-) diff --git a/src/gallium/drivers/ilo/ilo_layout.c b/src/gallium/drivers/ilo/ilo_layout.c index 03a692f..0b639b2 100644 --- a/src/gallium/drivers/ilo/ilo_layout.c +++ b/src/gallium/drivers/ilo/ilo_layout.c @@ -430,8 +430,9 @@ layout_init_alignments(struct ilo_layout *layout, layout-tiling == INTEL_TILING_Y (templ-bind PIPE_BIND_RENDER_TARGET)); - if (valign_4) - assert(layout-block_size != 12); + if (ilo_dev_gen(params-dev) = ILO_GEN(7) + ilo_dev_gen(params-dev) = ILO_GEN(7.5) valign_4) + assert(layout-format != PIPE_FORMAT_R32G32B32_FLOAT); layout-align_i = 4; layout-align_j = (valign_4) ? 4 : 2; @@ -525,7 +526,9 @@ layout_get_valid_tilings(const struct ilo_layout *layout, * * VALIGN_4 is not supported for surface format R32G32B32_FLOAT. */ - if (ilo_dev_gen(params-dev) = ILO_GEN(7) layout-block_size == 12) + if (ilo_dev_gen(params-dev) = ILO_GEN(7) + ilo_dev_gen(params-dev) = ILO_GEN(7.5) + layout-format == PIPE_FORMAT_R32G32B32_FLOAT) valid_tilings = ~LAYOUT_TILING_Y; } ___ mesa-commit mailing list mesa-commit@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-commit
Mesa (master): ilo: 128 BPP formats can use TiledY on Gen7.5+
Module: Mesa Branch: master Commit: 226109436fd7e0fe67bad024629496b4f4d75633 URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=226109436fd7e0fe67bad024629496b4f4d75633 Author: Chia-I Wu olva...@gmail.com Date: Fri Feb 20 15:27:14 2015 +0800 ilo: 128 BPP formats can use TiledY on Gen7.5+ The restriction is lifted. --- src/gallium/drivers/ilo/ilo_layout.c |7 ++- 1 file changed, 6 insertions(+), 1 deletion(-) diff --git a/src/gallium/drivers/ilo/ilo_layout.c b/src/gallium/drivers/ilo/ilo_layout.c index 881550b..03a692f 100644 --- a/src/gallium/drivers/ilo/ilo_layout.c +++ b/src/gallium/drivers/ilo/ilo_layout.c @@ -508,8 +508,13 @@ layout_get_valid_tilings(const struct ilo_layout *layout, * * NOTE: 128BPE Format Color buffer ( render target ) MUST be * either TileX or Linear. + * + * From the Haswell PRM, volume 5, page 32: + * + * NOTE: 128 BPP format color buffer (render target) supports + * Linear, TiledX and TiledY. */ - if (layout-block_size == 16) + if (ilo_dev_gen(params-dev) ILO_GEN(7.5) layout-block_size == 16) valid_tilings = ~LAYOUT_TILING_Y; /* ___ mesa-commit mailing list mesa-commit@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-commit
Mesa (master): ilo: fix compiler warnings
Module: Mesa
Branch: master
Commit: 68573f57eeba1229a7963440428c3229c7ad7ff6
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=68573f57eeba1229a7963440428c3229c7ad7ff6
Author: Chia-I Wu olva...@gmail.com
Date: Tue Feb 17 16:10:10 2015 -0700
ilo: fix compiler warnings
Fix -Wmaybe-uninitialized warnings. The change to
ilo_blit_resolve_slices_for_hiz() is a potential bug fix.
---
src/gallium/drivers/ilo/ilo_blit.c | 11 ---
src/gallium/drivers/ilo/ilo_layout.c |7 ++-
src/gallium/drivers/ilo/ilo_layout.h |2 ++
3 files changed, 12 insertions(+), 8 deletions(-)
diff --git a/src/gallium/drivers/ilo/ilo_blit.c
b/src/gallium/drivers/ilo/ilo_blit.c
index ad6aa80..42072c2 100644
--- a/src/gallium/drivers/ilo/ilo_blit.c
+++ b/src/gallium/drivers/ilo/ilo_blit.c
@@ -190,8 +190,9 @@ ilo_blit_resolve_slices_for_hiz(struct ilo_context *ilo,
assert(!(resolve_flags (other_writers | any_reader)));
if (!(resolve_flags ILO_TEXTURE_CLEAR)) {
+ const uint32_t first_clear_value = ilo_texture_get_slice(tex,
+ level, first_slice)-clear_value;
bool set_clear_value = false;
- uint32_t first_clear_value;
for (i = 0; i num_slices; i++) {
const struct ilo_texture_slice *slice =
@@ -200,12 +201,8 @@ ilo_blit_resolve_slices_for_hiz(struct ilo_context *ilo,
if (slice-flags other_writers) {
ilo_blitter_rectlist_resolve_hiz(ilo-blitter,
res, level, first_slice + i);
-}
-else if (i == 0) {
- first_clear_value = slice-clear_value;
-}
-else if (slice-clear_value != first_clear_value
- (slice-flags ILO_TEXTURE_RENDER_WRITE)) {
+} else if (slice-clear_value != first_clear_value
+ (slice-flags ILO_TEXTURE_RENDER_WRITE)) {
ilo_blitter_rectlist_resolve_z(ilo-blitter,
res, level, first_slice + i);
set_clear_value = true;
diff --git a/src/gallium/drivers/ilo/ilo_layout.c
b/src/gallium/drivers/ilo/ilo_layout.c
index 73db796..881550b 100644
--- a/src/gallium/drivers/ilo/ilo_layout.c
+++ b/src/gallium/drivers/ilo/ilo_layout.c
@@ -656,7 +656,7 @@ layout_init_size_and_format(struct ilo_layout *layout,
{
const struct pipe_resource *templ = params-templ;
enum pipe_format format = templ-format;
- bool require_separate_stencil;
+ bool require_separate_stencil = false;
layout-width0 = templ-width0;
layout-height0 = templ-height0;
@@ -1101,6 +1101,11 @@ layout_calculate_hiz_size(struct ilo_layout *layout,
}
hz_height /= 2;
break;
+ default:
+ assert(!unknown HiZ walk);
+ hz_width = 0;
+ hz_height = 0;
+ break;
}
/*
diff --git a/src/gallium/drivers/ilo/ilo_layout.h
b/src/gallium/drivers/ilo/ilo_layout.h
index 9aa2ae9..54ba2d8 100644
--- a/src/gallium/drivers/ilo/ilo_layout.h
+++ b/src/gallium/drivers/ilo/ilo_layout.h
@@ -282,6 +282,8 @@ ilo_layout_get_slice_pos(const struct ilo_layout *layout,
}
default:
assert(!unknown layout walk type);
+ *x = 0;
+ *y = 0;
break;
}
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Mesa (master): ilo: fix PCB alloc asserts on Gen7.5 GT3
Module: Mesa Branch: master Commit: b0e26173b26b60bb3892de9e4b764f608e0e13c7 URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=b0e26173b26b60bb3892de9e4b764f608e0e13c7 Author: Chia-I Wu olva...@gmail.com Date: Wed Feb 18 13:26:29 2015 -0700 ilo: fix PCB alloc asserts on Gen7.5 GT3 GT3 has two slices and all limits are doubled. --- src/gallium/drivers/ilo/ilo_builder_3d_top.h |6 +- 1 file changed, 5 insertions(+), 1 deletion(-) diff --git a/src/gallium/drivers/ilo/ilo_builder_3d_top.h b/src/gallium/drivers/ilo/ilo_builder_3d_top.h index 30c787d..d359252 100644 --- a/src/gallium/drivers/ilo/ilo_builder_3d_top.h +++ b/src/gallium/drivers/ilo/ilo_builder_3d_top.h @@ -90,7 +90,9 @@ gen7_3dstate_push_constant_alloc(struct ilo_builder *builder, GEN6_RENDER_SUBTYPE_3D | subop; const uint8_t cmd_len = 2; - const int slice_count = (ilo_dev_gen(builder-dev) = ILO_GEN(8)) ? 2 : 1; + const int slice_count = ((ilo_dev_gen(builder-dev) == ILO_GEN(7.5) + builder-dev-gt == 3) || +ilo_dev_gen(builder-dev) = ILO_GEN(8)) ? 2 : 1; uint32_t *dw; int end; @@ -138,6 +140,8 @@ gen7_3dstate_push_constant_alloc(struct ilo_builder *builder, size = 15 * slice_count; } + assert(offset % slice_count == 0 size % slice_count == 0); + ilo_builder_batch_pointer(builder, cmd_len, dw); dw[0] = cmd | (cmd_len - 2); ___ mesa-commit mailing list mesa-commit@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-commit
Mesa (master): ilo: always set up BLEND_STATE on Gen8
Module: Mesa
Branch: master
Commit: faaf13f6bf0ff826727af442beebc530ac1b74ac
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=faaf13f6bf0ff826727af442beebc530ac1b74ac
Author: Chia-I Wu olva...@gmail.com
Date: Tue Feb 17 04:45:03 2015 +0800
ilo: always set up BLEND_STATE on Gen8
There is now an DW0 that seems to be always referenced.
---
src/gallium/drivers/ilo/ilo_builder_3d_bottom.h |8 +---
1 file changed, 1 insertion(+), 7 deletions(-)
diff --git a/src/gallium/drivers/ilo/ilo_builder_3d_bottom.h
b/src/gallium/drivers/ilo/ilo_builder_3d_bottom.h
index 9b61e65..ece1423 100644
--- a/src/gallium/drivers/ilo/ilo_builder_3d_bottom.h
+++ b/src/gallium/drivers/ilo/ilo_builder_3d_bottom.h
@@ -1748,7 +1748,7 @@ gen8_BLEND_STATE(struct ilo_builder *builder,
const struct ilo_dsa_state *dsa)
{
const int state_align = 64;
- int state_len;
+ const int state_len = 1 + 2 * fb-state.nr_cbufs;
uint32_t state_offset, *dw;
unsigned i;
@@ -1756,12 +1756,6 @@ gen8_BLEND_STATE(struct ilo_builder *builder,
assert(fb-state.nr_cbufs = 8);
- /* may need to reference alpha func even when there is no color buffer */
- if (!fb-state.nr_cbufs !dsa-dw_blend_alpha)
- return 0;
-
- state_len = 1 + 2 * fb-state.nr_cbufs;
-
state_offset = ilo_builder_dynamic_pointer(builder,
ILO_BUILDER_ITEM_BLEND, state_align, state_len, dw);
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Mesa (master): ilo: fix alpha test on Gen8
Module: Mesa
Branch: master
Commit: 6d4475d7bf24aae77b862994e303ebf02de141db
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=6d4475d7bf24aae77b862994e303ebf02de141db
Author: Chia-I Wu olva...@gmail.com
Date: Tue Feb 17 04:54:17 2015 +0800
ilo: fix alpha test on Gen8
Shoudl use GEN8_BLEND_DW0_ALPHA_TEST_ENABLE instead of
GEN6_RT_DW1_ALPHA_TEST_ENABLE (and others).
---
src/gallium/drivers/ilo/ilo_state_3d_bottom.c | 31 +
1 file changed, 26 insertions(+), 5 deletions(-)
diff --git a/src/gallium/drivers/ilo/ilo_state_3d_bottom.c
b/src/gallium/drivers/ilo/ilo_state_3d_bottom.c
index 7c88d0f..96b1b22 100644
--- a/src/gallium/drivers/ilo/ilo_state_3d_bottom.c
+++ b/src/gallium/drivers/ilo/ilo_state_3d_bottom.c
@@ -2003,7 +2003,7 @@ dsa_get_alpha_enable_gen6(const struct ilo_dev_info *dev,
{
uint32_t dw;
- ILO_DEV_ASSERT(dev, 6, 8);
+ ILO_DEV_ASSERT(dev, 6, 7.5);
if (!state-enabled)
return 0;
@@ -2015,6 +2015,24 @@ dsa_get_alpha_enable_gen6(const struct ilo_dev_info *dev,
return dw;
}
+static uint32_t
+dsa_get_alpha_enable_gen8(const struct ilo_dev_info *dev,
+ const struct pipe_alpha_state *state)
+{
+ uint32_t dw;
+
+ ILO_DEV_ASSERT(dev, 8, 8);
+
+ if (!state-enabled)
+ return 0;
+
+ /* this will be ORed to BLEND_STATE */
+ dw = GEN8_BLEND_DW0_ALPHA_TEST_ENABLE |
+gen6_translate_dsa_func(state-func) 24;
+
+ return dw;
+}
+
void
ilo_gpe_init_dsa(const struct ilo_dev_info *dev,
const struct pipe_depth_stencil_alpha_state *state,
@@ -2031,10 +2049,17 @@ ilo_gpe_init_dsa(const struct ilo_dev_info *dev,
assert(!(dw_stencil dw_depth));
dsa-payload[0] = dw_stencil | dw_depth;
+
+ dsa-dw_blend_alpha = dsa_get_alpha_enable_gen8(dev, state-alpha);
+ dsa-dw_ps_blend_alpha = (state-alpha.enabled) ?
+ GEN8_PS_BLEND_DW1_ALPHA_TEST_ENABLE : 0;
} else {
dsa-payload[0] = dsa_get_stencil_enable_gen6(dev,
state-stencil[0], state-stencil[1]);
dsa-payload[2] = dsa_get_depth_enable_gen6(dev, state-depth);
+
+ dsa-dw_blend_alpha = dsa_get_alpha_enable_gen6(dev, state-alpha);
+ dsa-dw_ps_blend_alpha = 0;
}
dsa-payload[1] = state-stencil[0].valuemask 24 |
@@ -2042,10 +2067,6 @@ ilo_gpe_init_dsa(const struct ilo_dev_info *dev,
state-stencil[1].valuemask 8 |
state-stencil[1].writemask;
- dsa-dw_blend_alpha = dsa_get_alpha_enable_gen6(dev, state-alpha);
- dsa-dw_ps_blend_alpha = (state-alpha.enabled) ?
- GEN8_PS_BLEND_DW1_ALPHA_TEST_ENABLE : 0;
-
dsa-alpha_ref = float_to_ubyte(state-alpha.ref_value);
}
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Mesa (master): ilo: fix some state pointer commands on Gen8
Module: Mesa
Branch: master
Commit: 69b1693ef3e5f6be872ae131ea01de435a8e9337
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=69b1693ef3e5f6be872ae131ea01de435a8e9337
Author: Chia-I Wu olva...@gmail.com
Date: Sun Feb 15 13:21:51 2015 +0800
ilo: fix some state pointer commands on Gen8
3DSTATE_CC_STATE_POINTERS seems to be ignored when bit 0 of DW1 is not set.
Follow i965 and set the bit for 3DSTATE_CC_STATE_POINTERS and
3DSTATE_BLEND_STATE_POINTERS. Add gen checks for all state pointer commands.
---
src/gallium/drivers/ilo/ilo_builder_3d_bottom.h | 20
1 file changed, 20 insertions(+)
diff --git a/src/gallium/drivers/ilo/ilo_builder_3d_bottom.h
b/src/gallium/drivers/ilo/ilo_builder_3d_bottom.h
index 20b23da..9b61e65 100644
--- a/src/gallium/drivers/ilo/ilo_builder_3d_bottom.h
+++ b/src/gallium/drivers/ilo/ilo_builder_3d_bottom.h
@@ -841,6 +841,8 @@ static inline void
gen7_3DSTATE_BINDING_TABLE_POINTERS_PS(struct ilo_builder *builder,
uint32_t binding_table)
{
+ ILO_DEV_ASSERT(builder-dev, 7, 8);
+
gen7_3dstate_pointer(builder,
GEN7_RENDER_OPCODE_3DSTATE_BINDING_TABLE_POINTERS_PS,
binding_table);
@@ -850,6 +852,8 @@ static inline void
gen7_3DSTATE_SAMPLER_STATE_POINTERS_PS(struct ilo_builder *builder,
uint32_t sampler_state)
{
+ ILO_DEV_ASSERT(builder-dev, 7, 8);
+
gen7_3dstate_pointer(builder,
GEN7_RENDER_OPCODE_3DSTATE_SAMPLER_STATE_POINTERS_PS,
sampler_state);
@@ -1362,6 +1366,8 @@ static inline void
gen7_3DSTATE_VIEWPORT_STATE_POINTERS_SF_CLIP(struct ilo_builder *builder,
uint32_t sf_clip_viewport)
{
+ ILO_DEV_ASSERT(builder-dev, 7, 8);
+
gen7_3dstate_pointer(builder,
GEN7_RENDER_OPCODE_3DSTATE_VIEWPORT_STATE_POINTERS_SF_CLIP,
sf_clip_viewport);
@@ -1371,6 +1377,8 @@ static inline void
gen7_3DSTATE_VIEWPORT_STATE_POINTERS_CC(struct ilo_builder *builder,
uint32_t cc_viewport)
{
+ ILO_DEV_ASSERT(builder-dev, 7, 8);
+
gen7_3dstate_pointer(builder,
GEN7_RENDER_OPCODE_3DSTATE_VIEWPORT_STATE_POINTERS_CC,
cc_viewport);
@@ -1380,6 +1388,11 @@ static inline void
gen7_3DSTATE_CC_STATE_POINTERS(struct ilo_builder *builder,
uint32_t color_calc_state)
{
+ ILO_DEV_ASSERT(builder-dev, 7, 8);
+
+ if (ilo_dev_gen(builder-dev) = ILO_GEN(8))
+ color_calc_state |= 1;
+
gen7_3dstate_pointer(builder,
GEN6_RENDER_OPCODE_3DSTATE_CC_STATE_POINTERS, color_calc_state);
}
@@ -1388,6 +1401,8 @@ static inline void
gen7_3DSTATE_DEPTH_STENCIL_STATE_POINTERS(struct ilo_builder *builder,
uint32_t depth_stencil_state)
{
+ ILO_DEV_ASSERT(builder-dev, 7, 8);
+
gen7_3dstate_pointer(builder,
GEN7_RENDER_OPCODE_3DSTATE_DEPTH_STENCIL_STATE_POINTERS,
depth_stencil_state);
@@ -1397,6 +1412,11 @@ static inline void
gen7_3DSTATE_BLEND_STATE_POINTERS(struct ilo_builder *builder,
uint32_t blend_state)
{
+ ILO_DEV_ASSERT(builder-dev, 7, 8);
+
+ if (ilo_dev_gen(builder-dev) = ILO_GEN(8))
+ blend_state |= 1;
+
gen7_3dstate_pointer(builder,
GEN7_RENDER_OPCODE_3DSTATE_BLEND_STATE_POINTERS,
blend_state);
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Mesa (master): ilo: fix rectlist length on Gen8
Module: Mesa
Branch: master
Commit: 8b9446dbeb6bc146b92a17b8d44e39fcf2f96e97
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=8b9446dbeb6bc146b92a17b8d44e39fcf2f96e97
Author: Chia-I Wu olva...@gmail.com
Date: Fri Feb 13 03:59:45 2015 +0800
ilo: fix rectlist length on Gen8
5 PIPE_CONTROLs, 2 3DSTATE_WM_HZ_OP, and depth buffer setup require 65 DWords.
---
src/gallium/drivers/ilo/ilo_render_gen8.c |2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/src/gallium/drivers/ilo/ilo_render_gen8.c
b/src/gallium/drivers/ilo/ilo_render_gen8.c
index 4e2887e..6b14373 100644
--- a/src/gallium/drivers/ilo/ilo_render_gen8.c
+++ b/src/gallium/drivers/ilo/ilo_render_gen8.c
@@ -399,7 +399,7 @@ ilo_render_get_rectlist_commands_len_gen8(const struct
ilo_render *render,
{
ILO_DEV_ASSERT(render-dev, 8, 8);
- return 64;
+ return 96;
}
void
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Mesa (master): ilo: prepare for 64-bit immediates decoding
Module: Mesa
Branch: master
Commit: f8126fed954977604697f3c6485a6701618458cb
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=f8126fed954977604697f3c6485a6701618458cb
Author: Chia-I Wu olva...@gmail.com
Date: Sat Feb 14 03:05:47 2015 +0800
ilo: prepare for 64-bit immediates decoding
Replace imm32 by imm64. Add more ways (UD, D, etc) to access the immediate.
---
.../drivers/ilo/shader/toy_compiler_disasm.c | 46 +---
1 file changed, 31 insertions(+), 15 deletions(-)
diff --git a/src/gallium/drivers/ilo/shader/toy_compiler_disasm.c
b/src/gallium/drivers/ilo/shader/toy_compiler_disasm.c
index 4c490f1..654a611 100644
--- a/src/gallium/drivers/ilo/shader/toy_compiler_disasm.c
+++ b/src/gallium/drivers/ilo/shader/toy_compiler_disasm.c
@@ -106,7 +106,18 @@ struct disasm_inst {
struct disasm_src_operand src1;
union {
struct disasm_src_operand src2;
- uint32_t imm32;
+ uint64_t imm64;
+
+ uint32_t ud;
+ int32_t d;
+ uint16_t uw;
+ int16_t w;
+ float f;
+
+ struct {
+ int16_t jip;
+ int16_t uip;
+ } ip16;
} u;
};
@@ -382,7 +393,7 @@ disasm_inst_decode_dw1_gen6(struct disasm_inst *inst,
uint32_t dw1)
disasm_inst_decode_dw1_low_gen6(inst, dw1);
if (disasm_inst_jip_in_dw1_high_gen6(inst))
- inst-u.imm32 = dw1 16;
+ inst-u.imm64 = dw1 16;
else
disasm_inst_decode_dw1_high_gen6(inst, dw1);
}
@@ -408,7 +419,7 @@ disasm_inst_decode_dw2_dw3_gen6(struct disasm_inst *inst,
inst-src1.base.file == GEN6_FILE_IMM) {
count = 1;
if (!disasm_inst_jip_in_dw1_high_gen6(inst))
- inst-u.imm32 = dw3;
+ inst-u.imm64 = dw3;
} else {
count = 2;
}
@@ -913,9 +924,11 @@ disasm_inst_cmpt_ctrl(const struct disasm_inst *inst)
static const char *
disasm_inst_eot(const struct disasm_inst *inst)
{
+ const uint32_t mdesc = inst-u.ud;
+
if (inst-opcode == GEN6_OPCODE_SEND ||
inst-opcode == GEN6_OPCODE_SENDC)
- return (inst-u.imm32 GEN6_MSG_EOT) ? EOT : ;
+ return (mdesc GEN6_MSG_EOT) ? EOT : ;
else
return ;
}
@@ -1460,28 +1473,28 @@ disasm_printer_add_operand(struct disasm_printer
*printer,
if (operand-file == GEN6_FILE_IMM) {
switch (operand-type) {
case GEN6_TYPE_UD:
- disasm_printer_add(printer, 0x%08xUD, inst-u.imm32);
+ disasm_printer_add(printer, 0x%08xUD, inst-u.ud);
break;
case GEN6_TYPE_D:
- disasm_printer_add(printer, %dD, inst-u.imm32);
+ disasm_printer_add(printer, %dD, inst-u.d);
break;
case GEN6_TYPE_UW:
- disasm_printer_add(printer, 0x%04xUW, (uint16_t) inst-u.imm32);
+ disasm_printer_add(printer, 0x%04xUW, inst-u.uw);
break;
case GEN6_TYPE_W:
- disasm_printer_add(printer, %dW, (int16_t) inst-u.imm32);
+ disasm_printer_add(printer, %dW, inst-u.w);
break;
case GEN6_TYPE_UV_IMM:
- disasm_printer_add(printer, 0x%08xUV, inst-u.imm32);
+ disasm_printer_add(printer, 0x%08xUV, inst-u.ud);
break;
case GEN6_TYPE_VF_IMM:
disasm_printer_add(printer, Vector Float);
break;
case GEN6_TYPE_V_IMM:
- disasm_printer_add(printer, 0x%08xV, inst-u.imm32);
+ disasm_printer_add(printer, 0x%08xV, inst-u.ud);
break;
case GEN6_TYPE_F:
- disasm_printer_add(printer, %-gF, uif(inst-u.imm32));
+ disasm_printer_add(printer, %-gF, uif(inst-u.f));
break;
default:
disasm_printer_add(printer, BAD);
@@ -1794,7 +1807,7 @@ static void
disasm_printer_add_mdesc(struct disasm_printer *printer,
const struct disasm_inst *inst)
{
- const uint32_t mdesc = inst-u.imm32;
+ const uint32_t mdesc = inst-u.ud;
assert(inst-opcode == GEN6_OPCODE_SEND ||
inst-opcode == GEN6_OPCODE_SENDC);
@@ -1848,14 +1861,17 @@ disasm_printer_print_inst(struct disasm_printer
*printer,
if (inst-has_jip || inst-has_uip) {
if (inst-has_jip) {
+ const int32_t jip = inst-u.ip16.jip;
+
disasm_printer_column(printer, col++);
- disasm_printer_add(printer, JIP: %d, (int16_t) inst-u.imm32);
+ disasm_printer_add(printer, JIP: %d, jip);
}
if (inst-has_uip) {
+ const int32_t uip = inst-u.ip16.uip;
+
disasm_printer_column(printer, col++);
- disasm_printer_add(printer, UIP: %d,
- (int16_t) (inst-u.imm32 16));
+ disasm_printer_add(printer, UIP: %d, uip);
}
} else {
const int src_count = disasm_opcode_table[inst-opcode].src_count;
___
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Mesa (master): ilo: cleanup ISA DW0 decoding
Module: Mesa
Branch: master
Commit: db362983d17ea1403e6121ce80f05df141a11aa5
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=db362983d17ea1403e6121ce80f05df141a11aa5
Author: Chia-I Wu olva...@gmail.com
Date: Sat Feb 14 02:18:55 2015 +0800
ilo: cleanup ISA DW0 decoding
Add disasm_inst_decode_dw0_opcode_gen6() to decode the opcode. Simplify
branch_ctrl/acc_wr_ctrl decoding.
---
.../drivers/ilo/shader/toy_compiler_disasm.c | 26
1 file changed, 16 insertions(+), 10 deletions(-)
diff --git a/src/gallium/drivers/ilo/shader/toy_compiler_disasm.c
b/src/gallium/drivers/ilo/shader/toy_compiler_disasm.c
index 1434736..76b2699 100644
--- a/src/gallium/drivers/ilo/shader/toy_compiler_disasm.c
+++ b/src/gallium/drivers/ilo/shader/toy_compiler_disasm.c
@@ -184,7 +184,7 @@ static const struct {
};
static void
-disasm_inst_decode_dw0_gen6(struct disasm_inst *inst, uint32_t dw0)
+disasm_inst_decode_dw0_opcode_gen6(struct disasm_inst *inst, uint32_t dw0)
{
ILO_DEV_ASSERT(inst-dev, 6, 8);
@@ -218,6 +218,14 @@ disasm_inst_decode_dw0_gen6(struct disasm_inst *inst,
uint32_t dw0)
default:
break;
}
+}
+
+static void
+disasm_inst_decode_dw0_gen6(struct disasm_inst *inst, uint32_t dw0)
+{
+ ILO_DEV_ASSERT(inst-dev, 6, 8);
+
+ disasm_inst_decode_dw0_opcode_gen6(inst, dw0);
inst-access_mode = GEN_EXTRACT(dw0, GEN6_INST_ACCESSMODE);
@@ -250,19 +258,17 @@ disasm_inst_decode_dw0_gen6(struct disasm_inst *inst,
uint32_t dw0)
break;
}
- if (ilo_dev_gen(inst-dev) = ILO_GEN(8)) {
- switch (inst-opcode) {
- case GEN6_OPCODE_IF:
- case GEN6_OPCODE_ELSE:
- case GEN8_OPCODE_GOTO:
+ switch (inst-opcode) {
+ case GEN6_OPCODE_IF:
+ case GEN6_OPCODE_ELSE:
+ case GEN8_OPCODE_GOTO:
+ if (ilo_dev_gen(inst-dev) = ILO_GEN(8)) {
inst-branch_ctrl = (bool) (dw0 GEN8_INST_BRANCHCTRL);
break;
- default:
- inst-acc_wr_ctrl = (bool) (dw0 GEN6_INST_ACCWRCTRL);
- break;
}
- } else {
+ default:
inst-acc_wr_ctrl = (bool) (dw0 GEN6_INST_ACCWRCTRL);
+ break;
}
inst-cmpt_ctrl = (bool) (dw0 GEN6_INST_CMPTCTRL);
___
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Mesa (master): ilo: correct ISA UIP/JIP decoding for Gen8
Module: Mesa
Branch: master
Commit: 7504b357d45d5c814bd8d4511bf42a8c04c8af63
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=7504b357d45d5c814bd8d4511bf42a8c04c8af63
Author: Chia-I Wu olva...@gmail.com
Date: Sat Feb 14 03:07:51 2015 +0800
ilo: correct ISA UIP/JIP decoding for Gen8
JIP is int32_t and UIP is in DW2 on Gen8.
---
.../drivers/ilo/shader/toy_compiler_disasm.c | 57 +---
1 file changed, 39 insertions(+), 18 deletions(-)
diff --git a/src/gallium/drivers/ilo/shader/toy_compiler_disasm.c
b/src/gallium/drivers/ilo/shader/toy_compiler_disasm.c
index 654a611..8ec348b 100644
--- a/src/gallium/drivers/ilo/shader/toy_compiler_disasm.c
+++ b/src/gallium/drivers/ilo/shader/toy_compiler_disasm.c
@@ -118,6 +118,11 @@ struct disasm_inst {
int16_t jip;
int16_t uip;
} ip16;
+
+ struct {
+ int32_t jip;
+ int32_t uip;
+ } ip32;
} u;
};
@@ -287,13 +292,6 @@ disasm_inst_decode_dw0_gen6(struct disasm_inst *inst,
uint32_t dw0)
inst-saturate = (bool) (dw0 GEN6_INST_SATURATE);
}
-static bool
-disasm_inst_jip_in_dw1_high_gen6(const struct disasm_inst *inst)
-{
- return (ilo_dev_gen(inst-dev) == ILO_GEN(6)
- inst-has_jip !inst-has_uip);
-}
-
static void
disasm_inst_decode_dw1_low_gen6(struct disasm_inst *inst, uint32_t dw1)
{
@@ -392,7 +390,8 @@ disasm_inst_decode_dw1_gen6(struct disasm_inst *inst,
uint32_t dw1)
else
disasm_inst_decode_dw1_low_gen6(inst, dw1);
- if (disasm_inst_jip_in_dw1_high_gen6(inst))
+ if (ilo_dev_gen(inst-dev) == ILO_GEN(6)
+ inst-has_jip !inst-has_uip)
inst-u.imm64 = dw1 16;
else
disasm_inst_decode_dw1_high_gen6(inst, dw1);
@@ -402,26 +401,46 @@ static void
disasm_inst_decode_dw2_dw3_gen6(struct disasm_inst *inst,
uint32_t dw2, uint32_t dw3)
{
- int count, i;
+ int imm_bits = 0, count, i;
ILO_DEV_ASSERT(inst-dev, 6, 8);
if (ilo_dev_gen(inst-dev) = ILO_GEN(8)) {
- inst-src1.base.file = GEN_EXTRACT(dw2, GEN8_INST_SRC1_FILE);
- inst-src1.base.type = GEN_EXTRACT(dw2, GEN8_INST_SRC1_TYPE);
+ /* how about real 64-bit immediates? */
+ if (inst-has_uip) {
+ imm_bits = 64;
+ inst-src1.base.file = GEN6_FILE_IMM;
+ inst-src1.base.type = GEN6_TYPE_D;
+ } else {
+ inst-src1.base.file = GEN_EXTRACT(dw2, GEN8_INST_SRC1_FILE);
+ inst-src1.base.type = GEN_EXTRACT(dw2, GEN8_INST_SRC1_TYPE);
+
+ if (inst-src0.base.file == GEN6_FILE_IMM ||
+ inst-src1.base.file == GEN6_FILE_IMM)
+imm_bits = 32;
+ }
} else {
if (ilo_dev_gen(inst-dev) = ILO_GEN(7))
inst-flag_reg = GEN_EXTRACT(dw2, GEN7_INST_FLAG_REG);
inst-flag_subreg = GEN_EXTRACT(dw2, GEN6_INST_FLAG_SUBREG);
+
+ if (inst-src0.base.file == GEN6_FILE_IMM ||
+ inst-src1.base.file == GEN6_FILE_IMM)
+ imm_bits = 32;
}
- if (inst-src0.base.file == GEN6_FILE_IMM ||
- inst-src1.base.file == GEN6_FILE_IMM) {
+ switch (imm_bits) {
+ case 32:
+ inst-u.imm64 = dw3;
count = 1;
- if (!disasm_inst_jip_in_dw1_high_gen6(inst))
- inst-u.imm64 = dw3;
- } else {
+ break;
+ case 64:
+ inst-u.imm64 = (uint64_t) dw2 32 | dw3;
+ count = 0;
+ break;
+ default:
count = 2;
+ break;
}
for (i = 0; i count; i++) {
@@ -1861,14 +1880,16 @@ disasm_printer_print_inst(struct disasm_printer
*printer,
if (inst-has_jip || inst-has_uip) {
if (inst-has_jip) {
- const int32_t jip = inst-u.ip16.jip;
+ const int32_t jip = (ilo_dev_gen(inst-dev) = ILO_GEN(8)) ?
+inst-u.ip32.jip : inst-u.ip16.jip;
disasm_printer_column(printer, col++);
disasm_printer_add(printer, JIP: %d, jip);
}
if (inst-has_uip) {
- const int32_t uip = inst-u.ip16.uip;
+ const int32_t uip = (ilo_dev_gen(inst-dev) = ILO_GEN(8)) ?
+inst-u.ip32.uip : inst-u.ip16.uip;
disasm_printer_column(printer, col++);
disasm_printer_add(printer, UIP: %d, uip);
___
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Mesa (master): ilo: cleanup ISA DW1 decoding
Module: Mesa
Branch: master
Commit: 9ed376a76c37755f4408aa5cdb754178143f804f
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=9ed376a76c37755f4408aa5cdb754178143f804f
Author: Chia-I Wu olva...@gmail.com
Date: Sat Feb 14 02:23:53 2015 +0800
ilo: cleanup ISA DW1 decoding
Decode the higher and lower 16 bits separately.
---
.../drivers/ilo/shader/toy_compiler_disasm.c | 89
1 file changed, 55 insertions(+), 34 deletions(-)
diff --git a/src/gallium/drivers/ilo/shader/toy_compiler_disasm.c
b/src/gallium/drivers/ilo/shader/toy_compiler_disasm.c
index 76b2699..4c490f1 100644
--- a/src/gallium/drivers/ilo/shader/toy_compiler_disasm.c
+++ b/src/gallium/drivers/ilo/shader/toy_compiler_disasm.c
@@ -284,35 +284,43 @@ disasm_inst_jip_in_dw1_high_gen6(const struct disasm_inst
*inst)
}
static void
-disasm_inst_decode_dw1_gen6(struct disasm_inst *inst, uint32_t dw1)
+disasm_inst_decode_dw1_low_gen6(struct disasm_inst *inst, uint32_t dw1)
{
- ILO_DEV_ASSERT(inst-dev, 6, 8);
+ ILO_DEV_ASSERT(inst-dev, 6, 7.5);
- if (ilo_dev_gen(inst-dev) = ILO_GEN(8)) {
- inst-flag_subreg = GEN_EXTRACT(dw1, GEN8_INST_FLAG_SUBREG);
- inst-flag_reg = GEN_EXTRACT(dw1, GEN8_INST_FLAG_REG);
- inst-mask_ctrl = GEN_EXTRACT(dw1, GEN8_INST_MASKCTRL);
-
- inst-dst.base.file = GEN_EXTRACT(dw1, GEN8_INST_DST_FILE);
- inst-dst.base.type = GEN_EXTRACT(dw1, GEN8_INST_DST_TYPE);
- inst-src0.base.file = GEN_EXTRACT(dw1, GEN8_INST_SRC0_FILE);
- inst-src0.base.type = GEN_EXTRACT(dw1, GEN8_INST_SRC0_TYPE);
- } else {
- inst-dst.base.file = GEN_EXTRACT(dw1, GEN6_INST_DST_FILE);
- inst-dst.base.type = GEN_EXTRACT(dw1, GEN6_INST_DST_TYPE);
- inst-src0.base.file = GEN_EXTRACT(dw1, GEN6_INST_SRC0_FILE);
- inst-src0.base.type = GEN_EXTRACT(dw1, GEN6_INST_SRC0_TYPE);
- inst-src1.base.file = GEN_EXTRACT(dw1, GEN6_INST_SRC1_FILE);
- inst-src1.base.type = GEN_EXTRACT(dw1, GEN6_INST_SRC1_TYPE);
+ inst-dst.base.file = GEN_EXTRACT(dw1, GEN6_INST_DST_FILE);
+ inst-dst.base.type = GEN_EXTRACT(dw1, GEN6_INST_DST_TYPE);
+ inst-src0.base.file = GEN_EXTRACT(dw1, GEN6_INST_SRC0_FILE);
+ inst-src0.base.type = GEN_EXTRACT(dw1, GEN6_INST_SRC0_TYPE);
+ inst-src1.base.file = GEN_EXTRACT(dw1, GEN6_INST_SRC1_FILE);
+ inst-src1.base.type = GEN_EXTRACT(dw1, GEN6_INST_SRC1_TYPE);
- if (ilo_dev_gen(inst-dev) = ILO_GEN(7))
- inst-nib_ctrl = (bool) (dw1 GEN7_INST_NIBCTRL);
- }
+ if (ilo_dev_gen(inst-dev) = ILO_GEN(7))
+ inst-nib_ctrl = (bool) (dw1 GEN7_INST_NIBCTRL);
+}
- if (disasm_inst_jip_in_dw1_high_gen6(inst)) {
- inst-u.imm32 = dw1 16;
- return;
- }
+static void
+disasm_inst_decode_dw1_low_gen8(struct disasm_inst *inst, uint32_t dw1)
+{
+ ILO_DEV_ASSERT(inst-dev, 8, 8);
+
+ inst-flag_subreg = GEN_EXTRACT(dw1, GEN8_INST_FLAG_SUBREG);
+ inst-flag_reg = GEN_EXTRACT(dw1, GEN8_INST_FLAG_REG);
+ inst-mask_ctrl = GEN_EXTRACT(dw1, GEN8_INST_MASKCTRL);
+
+ inst-dst.base.file = GEN_EXTRACT(dw1, GEN8_INST_DST_FILE);
+ inst-dst.base.type = GEN_EXTRACT(dw1, GEN8_INST_DST_TYPE);
+ inst-src0.base.file = GEN_EXTRACT(dw1, GEN8_INST_SRC0_FILE);
+ inst-src0.base.type = GEN_EXTRACT(dw1, GEN8_INST_SRC0_TYPE);
+
+ inst-dst.base.addr_imm = GEN_EXTRACT(dw1, GEN8_INST_DST_ADDR_IMM_BIT9)
+ GEN8_INST_DST_ADDR_IMM_BIT9__SHR;
+}
+
+static void
+disasm_inst_decode_dw1_high_gen6(struct disasm_inst *inst, uint32_t dw1)
+{
+ ILO_DEV_ASSERT(inst-dev, 6, 8);
inst-dst.base.addr_mode = GEN_EXTRACT(dw1, GEN6_INST_DST_ADDRMODE);
@@ -331,18 +339,15 @@ disasm_inst_decode_dw1_gen6(struct disasm_inst *inst,
uint32_t dw1)
inst-dst.base.addr_subreg =
GEN_EXTRACT(dw1, GEN8_INST_DST_ADDR_SUBREG);
+ /* bit 9 is already set in disasm_inst_decode_dw1_low_gen8() */
if (inst-access_mode == GEN6_ALIGN_1) {
-inst-dst.base.addr_imm =
+inst-dst.base.addr_imm |=
GEN_EXTRACT(dw1, GEN8_INST_DST_ADDR_IMM);
} else {
-inst-dst.base.addr_imm = GEN_EXTRACT(dw1,
- GEN8_INST_DST_ADDR_IMM_ALIGN16)
+inst-dst.base.addr_imm |=
+ GEN_EXTRACT(dw1, GEN8_INST_DST_ADDR_IMM_ALIGN16)
GEN8_INST_DST_ADDR_IMM_ALIGN16__SHR;
}
-
- inst-dst.base.addr_imm |= GEN_EXTRACT(dw1,
- GEN8_INST_DST_ADDR_IMM_BIT9)
-GEN8_INST_DST_ADDR_IMM_BIT9__SHR;
} else {
inst-dst.base.addr_subreg =
GEN_EXTRACT(dw1, GEN6_INST_DST_ADDR_SUBREG);
@@ -351,8 +356,8 @@ disasm_inst_decode_dw1_gen6(struct disasm_inst *inst,
uint32_t dw1)
inst-dst.base.addr_imm =
GEN_EXTRACT(dw1, GEN6_INST_DST_ADDR_IMM);
} else {
-inst-dst.base.addr_imm = GEN_EXTRACT(dw1,
- GEN6_INST_DST_ADDR_IMM_ALIGN16)
+inst-dst.base.addr_imm =
+ GEN_EXTRACT(dw1
Mesa (master): ilo: do not set GEN6_THREADCTRL_SWITCH
Module: Mesa
Branch: master
Commit: c62507f42cf7ea8ce3c3b843f488c6efd26f17dc
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=c62507f42cf7ea8ce3c3b843f488c6efd26f17dc
Author: Chia-I Wu olva...@gmail.com
Date: Sat Feb 14 06:25:27 2015 +0800
ilo: do not set GEN6_THREADCTRL_SWITCH
It is not needed on Gen6+, and it appears to be broken on Gen8.
---
src/gallium/drivers/ilo/shader/toy_legalize.c |4
1 file changed, 4 deletions(-)
diff --git a/src/gallium/drivers/ilo/shader/toy_legalize.c
b/src/gallium/drivers/ilo/shader/toy_legalize.c
index b949d35..f1bacbd 100644
--- a/src/gallium/drivers/ilo/shader/toy_legalize.c
+++ b/src/gallium/drivers/ilo/shader/toy_legalize.c
@@ -397,8 +397,6 @@ patch_if_else_jip(struct toy_compiler *tc, struct toy_inst
*inst)
else {
inst-dst = tdst_imm_w(jip);
}
-
- inst-thread_ctrl = GEN6_THREADCTRL_SWITCH;
}
static void
@@ -437,8 +435,6 @@ patch_endif_jip(struct toy_compiler *tc, struct toy_inst
*inst)
inst-src[1] = tsrc_imm_w(dist * 2);
else
inst-dst = tdst_imm_w(dist * 2);
-
- inst-thread_ctrl = GEN6_THREADCTRL_SWITCH;
}
static void
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Mesa (master): ilo: fix JIP/UIP on Gen8
Module: Mesa
Branch: master
Commit: 8323796840a343ee39687cc8e8b424ee43d6fee7
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=8323796840a343ee39687cc8e8b424ee43d6fee7
Author: Chia-I Wu olva...@gmail.com
Date: Sat Feb 14 06:28:12 2015 +0800
ilo: fix JIP/UIP on Gen8
UIP is in DW2 and JIP is in DW3 on Gen8. Also, the units are in bytes.
---
src/gallium/drivers/ilo/shader/toy_compiler_asm.c |8 +--
src/gallium/drivers/ilo/shader/toy_legalize.c | 26 +++--
2 files changed, 25 insertions(+), 9 deletions(-)
diff --git a/src/gallium/drivers/ilo/shader/toy_compiler_asm.c
b/src/gallium/drivers/ilo/shader/toy_compiler_asm.c
index 0977d60..1f465a3 100644
--- a/src/gallium/drivers/ilo/shader/toy_compiler_asm.c
+++ b/src/gallium/drivers/ilo/shader/toy_compiler_asm.c
@@ -444,8 +444,12 @@ translate_src_gen6(const struct codegen *cg, int idx)
/* special treatment may be needed if any of the operand is immediate */
if (cg-src[0].file == GEN6_FILE_IMM) {
assert(!cg-src[0].absolute !cg-src[0].negate);
- /* only the last src operand can be an immediate */
- assert(src_is_null(cg, 1));
+
+ /* only the last src operand can be an immediate unless it is Gen8+ */
+ assert(ilo_dev_gen(cg-dev) = ILO_GEN(8) || src_is_null(cg, 1));
+
+ if (!src_is_null(cg, 1))
+ return cg-src[idx].origin;
if (idx == 0) {
if (ilo_dev_gen(cg-dev) = ILO_GEN(8)) {
diff --git a/src/gallium/drivers/ilo/shader/toy_legalize.c
b/src/gallium/drivers/ilo/shader/toy_legalize.c
index f1bacbd..4e573ca 100644
--- a/src/gallium/drivers/ilo/shader/toy_legalize.c
+++ b/src/gallium/drivers/ilo/shader/toy_legalize.c
@@ -335,7 +335,9 @@ patch_while_jip(struct toy_compiler *tc, struct toy_inst
*inst)
dist--;
}
- if (ilo_dev_gen(tc-dev) = ILO_GEN(7))
+ if (ilo_dev_gen(tc-dev) = ILO_GEN(8))
+ inst-src[1] = tsrc_imm_d(dist * 16);
+ else if (ilo_dev_gen(tc-dev) = ILO_GEN(7))
inst-src[1] = tsrc_imm_w(dist * 2);
else
inst-dst = tdst_imm_w(dist * 2);
@@ -388,13 +390,16 @@ patch_if_else_jip(struct toy_compiler *tc, struct
toy_inst *inst)
dist++;
}
- if (ilo_dev_gen(tc-dev) = ILO_GEN(7)) {
+ if (ilo_dev_gen(tc-dev) = ILO_GEN(8)) {
+ inst-dst.type = TOY_TYPE_D;
+ inst-src[0] = tsrc_imm_d(uip * 8);
+ inst-src[1] = tsrc_imm_d(jip * 8);
+ } else if (ilo_dev_gen(tc-dev) = ILO_GEN(7)) {
/* what should the type be? */
inst-dst.type = TOY_TYPE_D;
inst-src[0].type = TOY_TYPE_D;
inst-src[1] = tsrc_imm_d(uip 16 | jip);
- }
- else {
+ } else {
inst-dst = tdst_imm_w(jip);
}
}
@@ -431,7 +436,9 @@ patch_endif_jip(struct toy_compiler *tc, struct toy_inst
*inst)
if (!found)
dist = 1;
- if (ilo_dev_gen(tc-dev) = ILO_GEN(7))
+ if (ilo_dev_gen(tc-dev) = ILO_GEN(8))
+ inst-src[1] = tsrc_imm_d(dist * 16);
+ else if (ilo_dev_gen(tc-dev) = ILO_GEN(7))
inst-src[1] = tsrc_imm_w(dist * 2);
else
inst-dst = tdst_imm_w(dist * 2);
@@ -495,8 +502,13 @@ patch_break_continue_jip(struct toy_compiler *tc, struct
toy_inst *inst)
/* should the type be D or W? */
inst-dst.type = TOY_TYPE_D;
- inst-src[0].type = TOY_TYPE_D;
- inst-src[1] = tsrc_imm_d(uip 16 | jip);
+ if (ilo_dev_gen(tc-dev) = ILO_GEN(8)) {
+ inst-src[0] = tsrc_imm_d(uip * 8);
+ inst-src[1] = tsrc_imm_d(jip * 8);
+ } else {
+ inst-src[0].type = TOY_TYPE_D;
+ inst-src[1] = tsrc_imm_d(uip 16 | jip);
+ }
}
/**
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Mesa (master): ilo: update some outdated gen checks
Module: Mesa Branch: master Commit: 5fc0dd8953012c5f4864b40d89983f6d44985dc1 URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=5fc0dd8953012c5f4864b40d89983f6d44985dc1 Author: Chia-I Wu olva...@gmail.com Date: Fri Feb 13 04:04:18 2015 +0800 ilo: update some outdated gen checks Update gen checks for 3DSTATE_POLY_STIPPLE_OFFSET, 3DSTATE_POLY_STIPPLE_PATTERN, 3DSTATE_LINE_STIPPLE, and 3DSTATE_AA_LINE_PARAMETERS. --- src/gallium/drivers/ilo/ilo_builder_3d_bottom.h |8 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/src/gallium/drivers/ilo/ilo_builder_3d_bottom.h b/src/gallium/drivers/ilo/ilo_builder_3d_bottom.h index a5cc789..20b23da 100644 --- a/src/gallium/drivers/ilo/ilo_builder_3d_bottom.h +++ b/src/gallium/drivers/ilo/ilo_builder_3d_bottom.h @@ -1070,7 +1070,7 @@ gen6_3DSTATE_POLY_STIPPLE_OFFSET(struct ilo_builder *builder, const uint8_t cmd_len = 2; uint32_t *dw; - ILO_DEV_ASSERT(builder-dev, 6, 7.5); + ILO_DEV_ASSERT(builder-dev, 6, 8); assert(x_offset = 0 x_offset = 31); assert(y_offset = 0 y_offset = 31); @@ -1089,7 +1089,7 @@ gen6_3DSTATE_POLY_STIPPLE_PATTERN(struct ilo_builder *builder, uint32_t *dw; int i; - ILO_DEV_ASSERT(builder-dev, 6, 7.5); + ILO_DEV_ASSERT(builder-dev, 6, 8); ilo_builder_batch_pointer(builder, cmd_len, dw); @@ -1109,7 +1109,7 @@ gen6_3DSTATE_LINE_STIPPLE(struct ilo_builder *builder, unsigned inverse; uint32_t *dw; - ILO_DEV_ASSERT(builder-dev, 6, 7.5); + ILO_DEV_ASSERT(builder-dev, 6, 8); assert((pattern 0x) == pattern); assert(factor = 1 factor = 256); @@ -1145,7 +1145,7 @@ gen6_3DSTATE_AA_LINE_PARAMETERS(struct ilo_builder *builder) 0 GEN6_AA_LINE_DW2_CAP_BIAS__SHIFT | 0, }; - ILO_DEV_ASSERT(builder-dev, 6, 7.5); + ILO_DEV_ASSERT(builder-dev, 6, 8); ilo_builder_batch_write(builder, cmd_len, dw); } ___ mesa-commit mailing list mesa-commit@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-commit
Mesa (master): ilo: fix 3DSTATE_VF_TOPOLOGY
Module: Mesa
Branch: master
Commit: baba8b2745e0036dbac0350a344bb86278fdb673
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=baba8b2745e0036dbac0350a344bb86278fdb673
Author: Chia-I Wu olva...@gmail.com
Date: Fri Feb 13 03:54:32 2015 +0800
ilo: fix 3DSTATE_VF_TOPOLOGY
The pipe primitive type was wrongly translated twice.
---
src/gallium/drivers/ilo/ilo_render_gen8.c |3 +--
1 file changed, 1 insertion(+), 2 deletions(-)
diff --git a/src/gallium/drivers/ilo/ilo_render_gen8.c
b/src/gallium/drivers/ilo/ilo_render_gen8.c
index 54c0e20..4e2887e 100644
--- a/src/gallium/drivers/ilo/ilo_render_gen8.c
+++ b/src/gallium/drivers/ilo/ilo_render_gen8.c
@@ -257,7 +257,6 @@ gen8_draw_vf(struct ilo_render *r,
const struct ilo_state_vector *vec,
struct ilo_render_draw_session *session)
{
- const int prim = gen6_3d_translate_pipe_prim(vec-draw-mode);
int i;
/* 3DSTATE_INDEX_BUFFER */
@@ -278,7 +277,7 @@ gen8_draw_vf(struct ilo_render *r,
if (DIRTY(VE))
gen6_3DSTATE_VERTEX_ELEMENTS(r-builder, vec-ve);
- gen8_3DSTATE_VF_TOPOLOGY(r-builder, prim);
+ gen8_3DSTATE_VF_TOPOLOGY(r-builder, vec-draw-mode);
for (i = 0; i vec-ve-vb_count; i++) {
gen8_3DSTATE_VF_INSTANCING(r-builder, i,
___
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Mesa (master): 38 new commits
URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=cba6a4a12943d635e8dd3d38d94e21cbcab8be34 Author: Chia-I Wu olva...@gmail.com Date: Tue Jan 27 19:48:39 2015 +0800 ilo: update screen init for Gen8 This is very preliminary and is only tested with glxgears. All information about Gen8 is derived from i965 and beignet. URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=cb1cdecf64126363370e58fc46bdd47796344ef0 Author: Chia-I Wu olva...@gmail.com Date: Wed Feb 11 14:31:54 2015 +0800 ilo: update outdated render command emissions for Gen8 URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=9ab4fc4e632c6ff67d44879b39bb52f231b618e9 Author: Chia-I Wu olva...@gmail.com Date: Wed Feb 11 14:21:42 2015 +0800 ilo: update rectlist command emission for Gen8 URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=4caf8d9761d10792489fa519138eb01d6c72c0e6 Author: Chia-I Wu olva...@gmail.com Date: Tue Jan 27 20:11:27 2015 +0800 ilo: update draw command emission for Gen8 URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=d8927ab02f8527cbf489823c76768308829720c8 Author: Chia-I Wu olva...@gmail.com Date: Tue Jan 27 20:10:46 2015 +0800 ilo: update surface state emission for Gen8 URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=7832a3013b1869364b5b39a3d1db49d0b880adde Author: Chia-I Wu olva...@gmail.com Date: Tue Jan 27 20:10:19 2015 +0800 ilo: update dynamic state emission for Gen8 URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=8682cbab3e30f8d3c089f1f7113fcd7e9e184718 Author: Chia-I Wu olva...@gmail.com Date: Tue Jan 27 20:00:48 2015 +0800 ilo: update outdated gen assertions for Gen8 URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=c173a5288fa80a1461d99d6e5f010c5969cb3166 Author: Chia-I Wu olva...@gmail.com Date: Mon Jan 26 17:12:33 2015 +0800 ilo: add new WM related helpers for Gen8 URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=8c2cbc8955f8512820a32aae2fa38ed5b97c2e95 Author: Chia-I Wu olva...@gmail.com Date: Tue Feb 10 07:13:11 2015 +0800 ilo: update VS related functions for Gen8 URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=0e3381154cfcc265495344c1c7b3e98dbbbe6183 Author: Chia-I Wu olva...@gmail.com Date: Tue Feb 10 07:10:20 2015 +0800 ilo: update VF related functions for Gen8 URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=a57805cb750c4b2aa57a387e4145bba6c1a0b86e Author: Chia-I Wu olva...@gmail.com Date: Sun Jan 25 18:05:04 2015 +0800 ilo: update SAMPLER_STATE for Gen8 URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=7e7e45db65968df7a56c8c5aabed0a700633c72b Author: Chia-I Wu olva...@gmail.com Date: Mon Jan 26 15:52:06 2015 +0800 ilo: update SAMPLER_BORDER_COLOR_STATE for Gen8 URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=8976a190b2c4049598afa23b7a277e9f571306ba Author: Chia-I Wu olva...@gmail.com Date: Mon Jan 26 15:35:14 2015 +0800 ilo: update depth clear value for Gen8 URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=0b7fdce4f5f507bac86211a6e5356c86e15d8379 Author: Chia-I Wu olva...@gmail.com Date: Tue Jan 27 16:34:45 2015 +0800 ilo: update ilo_zs_surface for Gen8 URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=aa7109f0591e2306ea8c9c7fd61cff30860ac8b3 Author: Chia-I Wu olva...@gmail.com Date: Tue Jan 27 14:58:32 2015 +0800 ilo: update ilo_view_surface for Gen8 URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=7922982d4f192475f102fe6fc308c063ab654d00 Author: Chia-I Wu olva...@gmail.com Date: Sun Jan 25 15:12:52 2015 +0800 ilo: update texture layout for Gen8 URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=47dc2ae6e283423bad6286287b870dff63c7954c Author: Chia-I Wu olva...@gmail.com Date: Sun Jan 25 18:20:43 2015 +0800 ilo: update ilo_blend_state and related functions for Gen8 URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=e8455128aacb470bef1c5b18c88eac556dffb3ba Author: Chia-I Wu olva...@gmail.com Date: Mon Jan 26 15:28:15 2015 +0800 ilo: update ilo_dsa_state and related functions for Gen8 URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=9aeee99e4da1488922c47e66709b5a3e82fcbf06 Author: Chia-I Wu olva...@gmail.com Date: Mon Jan 26 13:34:51 2015 +0800 ilo: update multisample related states for Gen8 URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=6366fbc1a8055b437a97acf160596514885df6e7 Author: Chia-I Wu olva...@gmail.com Date: Mon Jan 26 18:06:00 2015 +0800 ilo: update WM and PS related functions for Gen8 URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=584d3369b6552d0d34dd783031d25dd472a4d6b0 Author: Chia-I Wu olva...@gmail.com Date: Tue Jan 27 00:08:48 2015 +0800 ilo: update SBE related functions for Gen8 URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=4cb592ec172f7892a4551cbd37272131dd172207 Author: Chia-I Wu olva...@gmail.com Date: Mon Jan 26 23:12
Mesa (master): ilo: add variants of 3DSTATE_WM
Module: Mesa
Branch: master
Commit: 8ebb86325b567ae6dacdefdcc79d30bf93927c79
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=8ebb86325b567ae6dacdefdcc79d30bf93927c79
Author: Chia-I Wu olva...@gmail.com
Date: Tue Nov 11 10:25:20 2014 +0800
ilo: add variants of 3DSTATE_WM
Add gen6_hiz_3DSTATE_WM() and gen7_hiz_3DSTATE_WM() for HiZ ops without
dispatching.
Signed-off-by: Chia-I Wu olva...@gmail.com
---
src/gallium/drivers/ilo/ilo_builder_3d_bottom.h | 106 ---
src/gallium/drivers/ilo/ilo_render_gen6.c |4 +-
src/gallium/drivers/ilo/ilo_render_gen7.c |5 +-
3 files changed, 61 insertions(+), 54 deletions(-)
diff --git a/src/gallium/drivers/ilo/ilo_builder_3d_bottom.h
b/src/gallium/drivers/ilo/ilo_builder_3d_bottom.h
index 3207843..1592185 100644
--- a/src/gallium/drivers/ilo/ilo_builder_3d_bottom.h
+++ b/src/gallium/drivers/ilo/ilo_builder_3d_bottom.h
@@ -282,41 +282,20 @@ static inline void
gen6_3DSTATE_WM(struct ilo_builder *builder,
const struct ilo_shader_state *fs,
const struct ilo_rasterizer_state *rasterizer,
-bool dual_blend, bool cc_may_kill,
-uint32_t hiz_op)
+bool dual_blend, bool cc_may_kill)
{
const uint8_t cmd_len = 9;
- const uint32_t dw0 = GEN6_RENDER_CMD(3D, 3DSTATE_WM) | (cmd_len - 2);
const int num_samples = 1;
- const struct ilo_shader_cso *fs_cso;
+ const struct ilo_shader_cso *cso;
uint32_t dw2, dw4, dw5, dw6, *dw;
ILO_DEV_ASSERT(builder-dev, 6, 6);
- if (!fs) {
- /* see brwCreateContext() */
- const int max_threads = (builder-dev-gt == 2) ? 80 : 40;
-
- ilo_builder_batch_pointer(builder, cmd_len, dw);
- dw[0] = dw0;
- dw[1] = 0;
- dw[2] = 0;
- dw[3] = 0;
- dw[4] = hiz_op;
- /* honor the valid range even if dispatching is disabled */
- dw[5] = (max_threads - 1) GEN6_WM_DW5_MAX_THREADS__SHIFT;
- dw[6] = 0;
- dw[7] = 0;
- dw[8] = 0;
-
- return;
- }
-
- fs_cso = ilo_shader_get_kernel_cso(fs);
- dw2 = fs_cso-payload[0];
- dw4 = fs_cso-payload[1];
- dw5 = fs_cso-payload[2];
- dw6 = fs_cso-payload[3];
+ cso = ilo_shader_get_kernel_cso(fs);
+ dw2 = cso-payload[0];
+ dw4 = cso-payload[1];
+ dw5 = cso-payload[2];
+ dw6 = cso-payload[3];
/*
* From the Sandy Bridge PRM, volume 2 part 1, page 248:
@@ -325,7 +304,6 @@ gen6_3DSTATE_WM(struct ilo_builder *builder,
* bits is set: Depth Buffer Clear , Hierarchical Depth Buffer Resolve
* Enable or Depth Buffer Resolve Enable.
*/
- assert(!hiz_op);
dw4 |= GEN6_WM_DW4_STATISTICS;
if (cc_may_kill)
@@ -344,7 +322,8 @@ gen6_3DSTATE_WM(struct ilo_builder *builder,
}
ilo_builder_batch_pointer(builder, cmd_len, dw);
- dw[0] = dw0;
+
+ dw[0] = GEN6_RENDER_CMD(3D, 3DSTATE_WM) | (cmd_len - 2);
dw[1] = ilo_shader_get_kernel_offset(fs);
dw[2] = dw2;
dw[3] = 0; /* scratch */
@@ -356,36 +335,50 @@ gen6_3DSTATE_WM(struct ilo_builder *builder,
}
static inline void
+gen6_hiz_3DSTATE_WM(struct ilo_builder *builder, uint32_t hiz_op)
+{
+ const uint8_t cmd_len = 9;
+ const int max_threads = (builder-dev-gt == 2) ? 80 : 40;
+ uint32_t *dw;
+
+ ILO_DEV_ASSERT(builder-dev, 6, 6);
+
+ ilo_builder_batch_pointer(builder, cmd_len, dw);
+
+ dw[0] = GEN6_RENDER_CMD(3D, 3DSTATE_WM) | (cmd_len - 2);
+ dw[1] = 0;
+ dw[2] = 0;
+ dw[3] = 0;
+ dw[4] = hiz_op;
+ /* honor the valid range even if dispatching is disabled */
+ dw[5] = (max_threads - 1) GEN6_WM_DW5_MAX_THREADS__SHIFT;
+ dw[6] = 0;
+ dw[7] = 0;
+ dw[8] = 0;
+}
+
+static inline void
gen7_3DSTATE_WM(struct ilo_builder *builder,
const struct ilo_shader_state *fs,
const struct ilo_rasterizer_state *rasterizer,
-bool cc_may_kill, uint32_t hiz_op)
+bool cc_may_kill)
{
const uint8_t cmd_len = 3;
- const uint32_t dw0 = GEN6_RENDER_CMD(3D, 3DSTATE_WM) | (cmd_len - 2);
const int num_samples = 1;
+ const struct ilo_shader_cso *cso;
uint32_t dw1, dw2, *dw;
ILO_DEV_ASSERT(builder-dev, 7, 7.5);
- /* see ilo_gpe_init_rasterizer_wm() */
- if (rasterizer) {
- dw1 = rasterizer-wm.payload[0];
- dw2 = rasterizer-wm.payload[1];
+ /* see rasterizer_init_wm_gen7() */
+ dw1 = rasterizer-wm.payload[0];
+ dw2 = rasterizer-wm.payload[1];
- assert(!hiz_op);
- dw1 |= GEN7_WM_DW1_STATISTICS;
- }
- else {
- dw1 = hiz_op;
- dw2 = 0;
- }
-
- if (fs) {
- const struct ilo_shader_cso *fs_cso = ilo_shader_get_kernel_cso(fs);
+ /* see fs_init_cso_gen7() */
+ cso = ilo_shader_get_kernel_cso(fs);
+ dw1 |= cso-payload[3];
- dw1 |= fs_cso-payload[3];
- }
+ dw1 |= GEN7_WM_DW1_STATISTICS;
if (cc_may_kill)
dw1 |= GEN7_WM_DW1_PS_ENABLE | GEN7_WM_DW1_PS_KILL;
@@ -396,12 +389,27 @@ gen7_3DSTATE_WM(struct ilo_builder *builder
Mesa (master): ilo: rework gen7_3DSTATE_SO_DECL_LIST()
Module: Mesa
Branch: master
Commit: eab595d573ff7719a1960bdf819eda75a1aa4c26
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=eab595d573ff7719a1960bdf819eda75a1aa4c26
Author: Chia-I Wu olva...@gmail.com
Date: Tue Nov 11 11:53:57 2014 +0800
ilo: rework gen7_3DSTATE_SO_DECL_LIST()
Started to make pipe_stream_output_info mandatory, but ended up adding support
for stream id and making a workaround Gen7-specific.
Signed-off-by: Chia-I Wu olva...@gmail.com
---
src/gallium/drivers/ilo/ilo_builder_3d_top.h | 126 ++
1 file changed, 66 insertions(+), 60 deletions(-)
diff --git a/src/gallium/drivers/ilo/ilo_builder_3d_top.h
b/src/gallium/drivers/ilo/ilo_builder_3d_top.h
index 5f758a1..ce2debe 100644
--- a/src/gallium/drivers/ilo/ilo_builder_3d_top.h
+++ b/src/gallium/drivers/ilo/ilo_builder_3d_top.h
@@ -867,90 +867,96 @@ static inline void
gen7_3DSTATE_SO_DECL_LIST(struct ilo_builder *builder,
const struct pipe_stream_output_info *so_info)
{
+ /*
+* Note that DWord Length has 9 bits for this command and the type of
+* cmd_len cannot be uint8_t.
+*/
uint16_t cmd_len;
- int buffer_selects, num_entries, i;
- uint16_t so_decls[128];
+ struct {
+ int buf_selects;
+ int decl_count;
+ uint16_t decls[128];
+ } streams[4];
+ unsigned buf_offsets[PIPE_MAX_SO_BUFFERS];
+ int hw_decl_count, i;
uint32_t *dw;
ILO_DEV_ASSERT(builder-dev, 7, 7.5);
- buffer_selects = 0;
- num_entries = 0;
+ memset(streams, 0, sizeof(streams));
+ memset(buf_offsets, 0, sizeof(buf_offsets));
- if (so_info) {
- int buffer_offsets[PIPE_MAX_SO_BUFFERS];
+ for (i = 0; i so_info-num_outputs; i++) {
+ unsigned decl, st, buf, reg, mask;
- memset(buffer_offsets, 0, sizeof(buffer_offsets));
+ st = so_info-output[i].stream;
+ buf = so_info-output[i].output_buffer;
- for (i = 0; i so_info-num_outputs; i++) {
- unsigned decl, buf, reg, mask;
+ /* pad with holes */
+ while (buf_offsets[buf] so_info-output[i].dst_offset) {
+ int num_dwords;
- buf = so_info-output[i].output_buffer;
+ num_dwords = so_info-output[i].dst_offset - buf_offsets[buf];
+ if (num_dwords 4)
+num_dwords = 4;
- /* pad with holes */
- assert(buffer_offsets[buf] = so_info-output[i].dst_offset);
- while (buffer_offsets[buf] so_info-output[i].dst_offset) {
-int num_dwords;
+ decl = buf GEN7_SO_DECL_OUTPUT_SLOT__SHIFT |
+GEN7_SO_DECL_HOLE_FLAG |
+((1 num_dwords) - 1) GEN7_SO_DECL_COMPONENT_MASK__SHIFT;
-num_dwords = so_info-output[i].dst_offset - buffer_offsets[buf];
-if (num_dwords 4)
- num_dwords = 4;
+ assert(streams[st].decl_count Elements(streams[st].decls));
+ streams[st].decls[streams[st].decl_count++] = decl;
+ buf_offsets[buf] += num_dwords;
+ }
+ assert(buf_offsets[buf] == so_info-output[i].dst_offset);
-decl = buf GEN7_SO_DECL_OUTPUT_SLOT__SHIFT |
- GEN7_SO_DECL_HOLE_FLAG |
- ((1 num_dwords) - 1)
GEN7_SO_DECL_COMPONENT_MASK__SHIFT;
+ reg = so_info-output[i].register_index;
+ mask = ((1 so_info-output[i].num_components) - 1)
+ so_info-output[i].start_component;
-so_decls[num_entries++] = decl;
-buffer_offsets[buf] += num_dwords;
- }
+ decl = buf GEN7_SO_DECL_OUTPUT_SLOT__SHIFT |
+ reg GEN7_SO_DECL_REG_INDEX__SHIFT |
+ mask GEN7_SO_DECL_COMPONENT_MASK__SHIFT;
- reg = so_info-output[i].register_index;
- mask = ((1 so_info-output[i].num_components) - 1)
-so_info-output[i].start_component;
+ assert(streams[st].decl_count Elements(streams[st].decls));
- decl = buf GEN7_SO_DECL_OUTPUT_SLOT__SHIFT |
-reg GEN7_SO_DECL_REG_INDEX__SHIFT |
-mask GEN7_SO_DECL_COMPONENT_MASK__SHIFT;
+ streams[st].buf_selects |= 1 buf;
+ streams[st].decls[streams[st].decl_count++] = decl;
+ buf_offsets[buf] += so_info-output[i].num_components;
+ }
- so_decls[num_entries++] = decl;
- buffer_selects |= 1 buf;
- buffer_offsets[buf] += so_info-output[i].num_components;
- }
+ if (ilo_dev_gen(builder-dev) = ILO_GEN(7.5)) {
+ hw_decl_count = MAX4(streams[0].decl_count, streams[1].decl_count,
+ streams[2].decl_count, streams[3].decl_count);
+ } else {
+ /*
+ * From the Ivy Bridge PRM, volume 2 part 1, page 201:
+ *
+ * Errata: All 128 decls for all four streams must be included
+ * whenever this command is issued. The Num Entries [n] fields
+ * still contain the actual numbers of valid decls.
+ */
+ hw_decl_count = 128;
}
- /*
-* From the Ivy Bridge PRM
Mesa (master): ilo: clean up gen7_3DSTATE_STREAMOUT()
Module: Mesa
Branch: master
Commit: 239dca78b13d8c033d75d1898b1d5e3d784c30d4
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=239dca78b13d8c033d75d1898b1d5e3d784c30d4
Author: Chia-I Wu olva...@gmail.com
Date: Tue Nov 11 13:28:32 2014 +0800
ilo: clean up gen7_3DSTATE_STREAMOUT()
Render stream and render enable are independent from so enable. Having a
single return point makes it easier to see that.
Signed-off-by: Chia-I Wu olva...@gmail.com
---
src/gallium/drivers/ilo/ilo_builder_3d_top.h | 73 +++---
src/gallium/drivers/ilo/ilo_render_gen7.c|7 +--
2 files changed, 35 insertions(+), 45 deletions(-)
diff --git a/src/gallium/drivers/ilo/ilo_builder_3d_top.h
b/src/gallium/drivers/ilo/ilo_builder_3d_top.h
index ce2debe..4a6d044 100644
--- a/src/gallium/drivers/ilo/ilo_builder_3d_top.h
+++ b/src/gallium/drivers/ilo/ilo_builder_3d_top.h
@@ -804,61 +804,50 @@ gen7_disable_3DSTATE_GS(struct ilo_builder *builder)
static inline void
gen7_3DSTATE_STREAMOUT(struct ilo_builder *builder,
+ int render_stream,
+ bool render_disable,
unsigned buffer_mask,
- int vertex_attrib_count,
- bool rasterizer_discard)
+ int vertex_attrib_count)
{
const uint8_t cmd_len = 3;
- const bool enable = (buffer_mask != 0);
- const uint32_t dw0 = GEN7_RENDER_CMD(3D, 3DSTATE_STREAMOUT) |
-(cmd_len - 2);
uint32_t dw1, dw2, *dw;
- int read_len;
ILO_DEV_ASSERT(builder-dev, 7, 7.5);
- if (!enable) {
- dw1 = 0 GEN7_SO_DW1_RENDER_STREAM_SELECT__SHIFT;
- if (rasterizer_discard)
- dw1 |= GEN7_SO_DW1_RENDER_DISABLE;
-
- dw2 = 0;
-
- ilo_builder_batch_pointer(builder, cmd_len, dw);
- dw[0] = dw0;
- dw[1] = dw1;
- dw[2] = dw2;
- return;
- }
-
- read_len = (vertex_attrib_count + 1) / 2;
- if (!read_len)
- read_len = 1;
-
- dw1 = GEN7_SO_DW1_SO_ENABLE |
- 0 GEN7_SO_DW1_RENDER_STREAM_SELECT__SHIFT |
- GEN7_SO_DW1_STATISTICS |
- buffer_mask 8;
-
- if (rasterizer_discard)
+ dw1 = render_stream GEN7_SO_DW1_RENDER_STREAM_SELECT__SHIFT;
+ if (render_disable)
dw1 |= GEN7_SO_DW1_RENDER_DISABLE;
- /* API_OPENGL */
- if (true)
- dw1 |= GEN7_SO_DW1_REORDER_TRAILING;
+ dw2 = 0;
- dw2 = 0 GEN7_SO_DW2_STREAM3_READ_OFFSET__SHIFT |
- 0 GEN7_SO_DW2_STREAM3_READ_LEN__SHIFT |
- 0 GEN7_SO_DW2_STREAM2_READ_OFFSET__SHIFT |
- 0 GEN7_SO_DW2_STREAM2_READ_LEN__SHIFT |
- 0 GEN7_SO_DW2_STREAM1_READ_OFFSET__SHIFT |
- 0 GEN7_SO_DW2_STREAM1_READ_LEN__SHIFT |
- 0 GEN7_SO_DW2_STREAM0_READ_OFFSET__SHIFT |
- (read_len - 1) GEN7_SO_DW2_STREAM0_READ_LEN__SHIFT;
+ if (buffer_mask) {
+ int read_len;
+
+ read_len = (vertex_attrib_count + 1) / 2;
+ if (!read_len)
+ read_len = 1;
+
+ dw1 |= GEN7_SO_DW1_SO_ENABLE |
+ GEN7_SO_DW1_STATISTICS |
+ buffer_mask GEN7_SO_DW1_BUFFER_ENABLES__SHIFT;
+
+ /* API_OPENGL */
+ if (true)
+ dw1 |= GEN7_SO_DW1_REORDER_TRAILING;
+
+ dw2 = 0 GEN7_SO_DW2_STREAM3_READ_OFFSET__SHIFT |
+(read_len - 1) GEN7_SO_DW2_STREAM3_READ_LEN__SHIFT |
+0 GEN7_SO_DW2_STREAM2_READ_OFFSET__SHIFT |
+(read_len - 1) GEN7_SO_DW2_STREAM2_READ_LEN__SHIFT |
+0 GEN7_SO_DW2_STREAM1_READ_OFFSET__SHIFT |
+(read_len - 1) GEN7_SO_DW2_STREAM1_READ_LEN__SHIFT |
+0 GEN7_SO_DW2_STREAM0_READ_OFFSET__SHIFT |
+(read_len - 1) GEN7_SO_DW2_STREAM0_READ_LEN__SHIFT;
+ }
ilo_builder_batch_pointer(builder, cmd_len, dw);
- dw[0] = dw0;
+ dw[0] = GEN7_RENDER_CMD(3D, 3DSTATE_STREAMOUT) | (cmd_len - 2);
dw[1] = dw1;
dw[2] = dw2;
}
diff --git a/src/gallium/drivers/ilo/ilo_render_gen7.c
b/src/gallium/drivers/ilo/ilo_render_gen7.c
index 2051f12..08190e8 100644
--- a/src/gallium/drivers/ilo/ilo_render_gen7.c
+++ b/src/gallium/drivers/ilo/ilo_render_gen7.c
@@ -476,8 +476,9 @@ gen7_draw_sol(struct ilo_render *r,
const int output_count = ilo_shader_get_kernel_param(shader,
ILO_KERNEL_OUTPUT_COUNT);
- gen7_3DSTATE_STREAMOUT(r-builder, buffer_mask, output_count,
-vec-rasterizer-state.rasterizer_discard);
+ gen7_3DSTATE_STREAMOUT(r-builder, 0,
+vec-rasterizer-state.rasterizer_discard,
+buffer_mask, output_count);
}
}
@@ -732,7 +733,7 @@ gen7_rectlist_vs_to_sf(struct ilo_render *r,
gen7_3DSTATE_CONSTANT_GS(r-builder, NULL, NULL, 0);
gen7_disable_3DSTATE_GS(r-builder);
- gen7_3DSTATE_STREAMOUT(r-builder, 0x0, 0, false);
+ gen7_3DSTATE_STREAMOUT(r-builder, 0, false, 0x0, 0);
gen6_disable_3DSTATE_CLIP(r-builder);
___
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Mesa (master): ilo: add variants of 3DSTATE_VS
Module: Mesa
Branch: master
Commit: 63ded78e1cc1748bd5e74fcb4bcead6d58093668
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=63ded78e1cc1748bd5e74fcb4bcead6d58093668
Author: Chia-I Wu olva...@gmail.com
Date: Tue Nov 11 10:31:55 2014 +0800
ilo: add variants of 3DSTATE_VS
Add gen6_disable_3DSTATE_VS() to disable VS.
Signed-off-by: Chia-I Wu olva...@gmail.com
---
src/gallium/drivers/ilo/ilo_builder_3d_top.h | 34 +++---
src/gallium/drivers/ilo/ilo_render_gen6.c|2 +-
src/gallium/drivers/ilo/ilo_render_gen7.c|2 +-
3 files changed, 22 insertions(+), 16 deletions(-)
diff --git a/src/gallium/drivers/ilo/ilo_builder_3d_top.h
b/src/gallium/drivers/ilo/ilo_builder_3d_top.h
index 39bd1e5..9794e92 100644
--- a/src/gallium/drivers/ilo/ilo_builder_3d_top.h
+++ b/src/gallium/drivers/ilo/ilo_builder_3d_top.h
@@ -550,31 +550,19 @@ gen6_3DSTATE_VS(struct ilo_builder *builder,
const struct ilo_shader_state *vs)
{
const uint8_t cmd_len = 6;
- const uint32_t dw0 = GEN6_RENDER_CMD(3D, 3DSTATE_VS) | (cmd_len - 2);
const struct ilo_shader_cso *cso;
uint32_t dw2, dw4, dw5, *dw;
ILO_DEV_ASSERT(builder-dev, 6, 7.5);
- if (!vs) {
- ilo_builder_batch_pointer(builder, cmd_len, dw);
- dw[0] = dw0;
- dw[1] = 0;
- dw[2] = 0;
- dw[3] = 0;
- dw[4] = 0;
- dw[5] = 0;
-
- return;
- }
-
cso = ilo_shader_get_kernel_cso(vs);
dw2 = cso-payload[0];
dw4 = cso-payload[1];
dw5 = cso-payload[2];
ilo_builder_batch_pointer(builder, cmd_len, dw);
- dw[0] = dw0;
+
+ dw[0] = GEN6_RENDER_CMD(3D, 3DSTATE_VS) | (cmd_len - 2);
dw[1] = ilo_shader_get_kernel_offset(vs);
dw[2] = dw2;
dw[3] = 0; /* scratch */
@@ -583,6 +571,24 @@ gen6_3DSTATE_VS(struct ilo_builder *builder,
}
static inline void
+gen6_disable_3DSTATE_VS(struct ilo_builder *builder)
+{
+ const uint8_t cmd_len = 6;
+ uint32_t *dw;
+
+ ILO_DEV_ASSERT(builder-dev, 6, 7.5);
+
+ ilo_builder_batch_pointer(builder, cmd_len, dw);
+
+ dw[0] = GEN6_RENDER_CMD(3D, 3DSTATE_VS) | (cmd_len - 2);
+ dw[1] = 0;
+ dw[2] = 0;
+ dw[3] = 0;
+ dw[4] = 0;
+ dw[5] = 0;
+}
+
+static inline void
gen7_3DSTATE_HS(struct ilo_builder *builder,
const struct ilo_shader_state *hs)
{
diff --git a/src/gallium/drivers/ilo/ilo_render_gen6.c
b/src/gallium/drivers/ilo/ilo_render_gen6.c
index 4e3bd18..fcdbd67 100644
--- a/src/gallium/drivers/ilo/ilo_render_gen6.c
+++ b/src/gallium/drivers/ilo/ilo_render_gen6.c
@@ -844,7 +844,7 @@ gen6_rectlist_vs_to_sf(struct ilo_render *r,
const struct ilo_blitter *blitter)
{
gen6_3DSTATE_CONSTANT_VS(r-builder, NULL, NULL, 0);
- gen6_3DSTATE_VS(r-builder, NULL);
+ gen6_disable_3DSTATE_VS(r-builder);
gen6_wa_post_3dstate_constant_vs(r);
diff --git a/src/gallium/drivers/ilo/ilo_render_gen7.c
b/src/gallium/drivers/ilo/ilo_render_gen7.c
index 34a881a..a8c2443 100644
--- a/src/gallium/drivers/ilo/ilo_render_gen7.c
+++ b/src/gallium/drivers/ilo/ilo_render_gen7.c
@@ -721,7 +721,7 @@ gen7_rectlist_vs_to_sf(struct ilo_render *r,
const struct ilo_blitter *blitter)
{
gen7_3DSTATE_CONSTANT_VS(r-builder, NULL, NULL, 0);
- gen6_3DSTATE_VS(r-builder, NULL);
+ gen6_disable_3DSTATE_VS(r-builder);
gen7_3DSTATE_CONSTANT_HS(r-builder, NULL, NULL, 0);
gen7_3DSTATE_HS(r-builder, NULL);
___
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Mesa (master): ilo: add variants of 3DSTATE_CLIP
Module: Mesa
Branch: master
Commit: 703ae84ac205b128997e949d7b8373bb102a0d5a
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=703ae84ac205b128997e949d7b8373bb102a0d5a
Author: Chia-I Wu olva...@gmail.com
Date: Tue Nov 11 10:21:03 2014 +0800
ilo: add variants of 3DSTATE_CLIP
Add gen6_disable_3DSTATE_CLIP to disable clipping.
Signed-off-by: Chia-I Wu olva...@gmail.com
---
src/gallium/drivers/ilo/ilo_builder_3d_bottom.h | 52 +--
src/gallium/drivers/ilo/ilo_render_gen6.c |2 +-
src/gallium/drivers/ilo/ilo_render_gen7.c |2 +-
3 files changed, 32 insertions(+), 24 deletions(-)
diff --git a/src/gallium/drivers/ilo/ilo_builder_3d_bottom.h
b/src/gallium/drivers/ilo/ilo_builder_3d_bottom.h
index 2397a2c..3207843 100644
--- a/src/gallium/drivers/ilo/ilo_builder_3d_bottom.h
+++ b/src/gallium/drivers/ilo/ilo_builder_3d_bottom.h
@@ -46,35 +46,27 @@ gen6_3DSTATE_CLIP(struct ilo_builder *builder,
{
const uint8_t cmd_len = 4;
uint32_t dw1, dw2, dw3, *dw;
+ int interps;
ILO_DEV_ASSERT(builder-dev, 6, 7.5);
- if (rasterizer) {
- int interps;
-
- dw1 = rasterizer-clip.payload[0];
- dw2 = rasterizer-clip.payload[1];
- dw3 = rasterizer-clip.payload[2];
+ dw1 = rasterizer-clip.payload[0];
+ dw2 = rasterizer-clip.payload[1];
+ dw3 = rasterizer-clip.payload[2];
- if (enable_guardband rasterizer-clip.can_enable_guardband)
- dw2 |= GEN6_CLIP_DW2_GB_TEST_ENABLE;
+ if (enable_guardband rasterizer-clip.can_enable_guardband)
+ dw2 |= GEN6_CLIP_DW2_GB_TEST_ENABLE;
- interps = (fs) ? ilo_shader_get_kernel_param(fs,
-ILO_KERNEL_FS_BARYCENTRIC_INTERPOLATIONS) : 0;
+ interps = (fs) ? ilo_shader_get_kernel_param(fs,
+ ILO_KERNEL_FS_BARYCENTRIC_INTERPOLATIONS) : 0;
- if (interps (GEN6_INTERP_NONPERSPECTIVE_PIXEL |
- GEN6_INTERP_NONPERSPECTIVE_CENTROID |
- GEN6_INTERP_NONPERSPECTIVE_SAMPLE))
- dw2 |= GEN6_CLIP_DW2_NONPERSPECTIVE_BARYCENTRIC_ENABLE;
+ if (interps (GEN6_INTERP_NONPERSPECTIVE_PIXEL |
+ GEN6_INTERP_NONPERSPECTIVE_CENTROID |
+ GEN6_INTERP_NONPERSPECTIVE_SAMPLE))
+ dw2 |= GEN6_CLIP_DW2_NONPERSPECTIVE_BARYCENTRIC_ENABLE;
- dw3 |= GEN6_CLIP_DW3_RTAINDEX_FORCED_ZERO |
- (num_viewports - 1);
- }
- else {
- dw1 = 0;
- dw2 = 0;
- dw3 = 0;
- }
+ dw3 |= GEN6_CLIP_DW3_RTAINDEX_FORCED_ZERO |
+ (num_viewports - 1);
ilo_builder_batch_pointer(builder, cmd_len, dw);
@@ -84,6 +76,22 @@ gen6_3DSTATE_CLIP(struct ilo_builder *builder,
dw[3] = dw3;
}
+static inline void
+gen6_disable_3DSTATE_CLIP(struct ilo_builder *builder)
+{
+ const uint8_t cmd_len = 4;
+ uint32_t *dw;
+
+ ILO_DEV_ASSERT(builder-dev, 6, 7.5);
+
+ ilo_builder_batch_pointer(builder, cmd_len, dw);
+
+ dw[0] = GEN6_RENDER_CMD(3D, 3DSTATE_CLIP) | (cmd_len - 2);
+ dw[1] = 0;
+ dw[2] = 0;
+ dw[3] = 0;
+}
+
/**
* Fill in DW2 to DW7 of 3DSTATE_SF.
*/
diff --git a/src/gallium/drivers/ilo/ilo_render_gen6.c
b/src/gallium/drivers/ilo/ilo_render_gen6.c
index deaa515..70a7400 100644
--- a/src/gallium/drivers/ilo/ilo_render_gen6.c
+++ b/src/gallium/drivers/ilo/ilo_render_gen6.c
@@ -851,7 +851,7 @@ gen6_rectlist_vs_to_sf(struct ilo_render *r,
gen6_3DSTATE_CONSTANT_GS(r-builder, NULL, NULL, 0);
gen6_3DSTATE_GS(r-builder, NULL, NULL, 0);
- gen6_3DSTATE_CLIP(r-builder, NULL, NULL, false, 0);
+ gen6_disable_3DSTATE_CLIP(r-builder);
gen6_3DSTATE_SF(r-builder, NULL, NULL);
}
diff --git a/src/gallium/drivers/ilo/ilo_render_gen7.c
b/src/gallium/drivers/ilo/ilo_render_gen7.c
index e0e6d06..79d147a 100644
--- a/src/gallium/drivers/ilo/ilo_render_gen7.c
+++ b/src/gallium/drivers/ilo/ilo_render_gen7.c
@@ -737,7 +737,7 @@ gen7_rectlist_vs_to_sf(struct ilo_render *r,
gen7_3DSTATE_STREAMOUT(r-builder, 0x0, 0, false);
- gen6_3DSTATE_CLIP(r-builder, NULL, NULL, false, 0);
+ gen6_disable_3DSTATE_CLIP(r-builder);
gen7_wa_pre_3dstate_sf_depth_bias(r);
___
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Mesa (master): ilo: add variants of 3DSTATE_{HS,DS}
Module: Mesa
Branch: master
Commit: 31372f2d2c2601e9e0daa11c44d8c45f756cdd4c
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=31372f2d2c2601e9e0daa11c44d8c45f756cdd4c
Author: Chia-I Wu olva...@gmail.com
Date: Tue Nov 11 10:38:28 2014 +0800
ilo: add variants of 3DSTATE_{HS,DS}
Rename them to gen7_disable_3DSTATE_{HS,DS}() to reflect the fact.
Signed-off-by: Chia-I Wu olva...@gmail.com
---
src/gallium/drivers/ilo/ilo_builder_3d_top.h | 10 ++
src/gallium/drivers/ilo/ilo_render_gen7.c|8
2 files changed, 6 insertions(+), 12 deletions(-)
diff --git a/src/gallium/drivers/ilo/ilo_builder_3d_top.h
b/src/gallium/drivers/ilo/ilo_builder_3d_top.h
index d440e98..1b4f4a3 100644
--- a/src/gallium/drivers/ilo/ilo_builder_3d_top.h
+++ b/src/gallium/drivers/ilo/ilo_builder_3d_top.h
@@ -589,16 +589,13 @@ gen6_disable_3DSTATE_VS(struct ilo_builder *builder)
}
static inline void
-gen7_3DSTATE_HS(struct ilo_builder *builder,
-const struct ilo_shader_state *hs)
+gen7_disable_3DSTATE_HS(struct ilo_builder *builder)
{
const uint8_t cmd_len = 7;
uint32_t *dw;
ILO_DEV_ASSERT(builder-dev, 7, 7.5);
- assert(!hs);
-
ilo_builder_batch_pointer(builder, cmd_len, dw);
dw[0] = GEN7_RENDER_CMD(3D, 3DSTATE_HS) | (cmd_len - 2);
@@ -627,16 +624,13 @@ gen7_3DSTATE_TE(struct ilo_builder *builder)
}
static inline void
-gen7_3DSTATE_DS(struct ilo_builder *builder,
-const struct ilo_shader_state *ds)
+gen7_disable_3DSTATE_DS(struct ilo_builder *builder)
{
const uint8_t cmd_len = 6;
uint32_t *dw;
ILO_DEV_ASSERT(builder-dev, 7, 7.5);
- assert(!ds);
-
ilo_builder_batch_pointer(builder, cmd_len, dw);
dw[0] = GEN7_RENDER_CMD(3D, 3DSTATE_DS) | (cmd_len - 2);
diff --git a/src/gallium/drivers/ilo/ilo_render_gen7.c
b/src/gallium/drivers/ilo/ilo_render_gen7.c
index 9943ec5..8830db4 100644
--- a/src/gallium/drivers/ilo/ilo_render_gen7.c
+++ b/src/gallium/drivers/ilo/ilo_render_gen7.c
@@ -378,7 +378,7 @@ gen7_draw_hs(struct ilo_render *r,
/* 3DSTATE_CONSTANT_HS and 3DSTATE_HS */
if (r-hw_ctx_changed) {
gen7_3DSTATE_CONSTANT_HS(r-builder, 0, 0, 0);
- gen7_3DSTATE_HS(r-builder, NULL);
+ gen7_disable_3DSTATE_HS(r-builder);
}
/* 3DSTATE_BINDING_TABLE_POINTERS_HS */
@@ -404,7 +404,7 @@ gen7_draw_ds(struct ilo_render *r,
/* 3DSTATE_CONSTANT_DS and 3DSTATE_DS */
if (r-hw_ctx_changed) {
gen7_3DSTATE_CONSTANT_DS(r-builder, 0, 0, 0);
- gen7_3DSTATE_DS(r-builder, NULL);
+ gen7_disable_3DSTATE_DS(r-builder);
}
/* 3DSTATE_BINDING_TABLE_POINTERS_DS */
@@ -724,12 +724,12 @@ gen7_rectlist_vs_to_sf(struct ilo_render *r,
gen6_disable_3DSTATE_VS(r-builder);
gen7_3DSTATE_CONSTANT_HS(r-builder, NULL, NULL, 0);
- gen7_3DSTATE_HS(r-builder, NULL);
+ gen7_disable_3DSTATE_HS(r-builder);
gen7_3DSTATE_TE(r-builder);
gen7_3DSTATE_CONSTANT_DS(r-builder, NULL, NULL, 0);
- gen7_3DSTATE_DS(r-builder, NULL);
+ gen7_disable_3DSTATE_DS(r-builder);
gen7_3DSTATE_CONSTANT_GS(r-builder, NULL, NULL, 0);
gen7_disable_3DSTATE_GS(r-builder);
___
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Mesa (master): ilo: add gen6_3dstate_constant()
Module: Mesa
Branch: master
Commit: 2ff88ce4be7f81403818e8c4662300abf68b09ea
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=2ff88ce4be7f81403818e8c4662300abf68b09ea
Author: Chia-I Wu olva...@gmail.com
Date: Tue Nov 11 11:06:12 2014 +0800
ilo: add gen6_3dstate_constant()
It replaces gen6_fill_3dstate_constant(). gen6_3DSTATE_CONSTANT_{VS,GS,PS}
are made wrappers of the new function.
Signed-off-by: Chia-I Wu olva...@gmail.com
---
src/gallium/drivers/ilo/ilo_builder_3d_bottom.h | 24 +
src/gallium/drivers/ilo/ilo_builder_3d_top.h| 127 ---
2 files changed, 67 insertions(+), 84 deletions(-)
diff --git a/src/gallium/drivers/ilo/ilo_builder_3d_bottom.h
b/src/gallium/drivers/ilo/ilo_builder_3d_bottom.h
index d7b6104..773ccbf 100644
--- a/src/gallium/drivers/ilo/ilo_builder_3d_bottom.h
+++ b/src/gallium/drivers/ilo/ilo_builder_3d_bottom.h
@@ -483,28 +483,8 @@ gen6_3DSTATE_CONSTANT_PS(struct ilo_builder *builder,
const uint32_t *bufs, const int *sizes,
int num_bufs)
{
- const uint8_t cmd_len = 5;
- uint32_t buf_dw[4], buf_enabled;
- uint32_t *dw;
-
- ILO_DEV_ASSERT(builder-dev, 6, 6);
- assert(num_bufs = 4);
-
- /*
-* From the Sandy Bridge PRM, volume 2 part 1, page 287:
-*
-* The sum of all four read length fields (each incremented to
-* represent the actual read length) must be less than or equal to 64
-*/
- buf_enabled = gen6_fill_3dstate_constant(builder-dev,
- bufs, sizes, num_bufs, 64, buf_dw, Elements(buf_dw));
-
- ilo_builder_batch_pointer(builder, cmd_len, dw);
-
- dw[0] = GEN6_RENDER_CMD(3D, 3DSTATE_CONSTANT_PS) |
- buf_enabled 12 |
- (cmd_len - 2);
- memcpy(dw[1], buf_dw, sizeof(buf_dw));
+ gen6_3dstate_constant(builder, GEN6_RENDER_OPCODE_3DSTATE_CONSTANT_PS,
+ bufs, sizes, num_bufs);
}
static inline void
diff --git a/src/gallium/drivers/ilo/ilo_builder_3d_top.h
b/src/gallium/drivers/ilo/ilo_builder_3d_top.h
index 1b4f4a3..8f2a25a 100644
--- a/src/gallium/drivers/ilo/ilo_builder_3d_top.h
+++ b/src/gallium/drivers/ilo/ilo_builder_3d_top.h
@@ -1138,39 +1138,82 @@ gen7_3DSTATE_SAMPLER_STATE_POINTERS_GS(struct
ilo_builder *builder,
sampler_state);
}
-static inline unsigned
-gen6_fill_3dstate_constant(const struct ilo_dev_info *dev,
- const uint32_t *bufs, const int *sizes,
- int num_bufs, int max_read_length,
- uint32_t *dw, int num_dwords)
+static inline void
+gen6_3dstate_constant(struct ilo_builder *builder, int subop,
+ const uint32_t *bufs, const int *sizes,
+ int num_bufs)
{
- unsigned enabled = 0x0;
- int total_read_length, i;
+ const uint32_t cmd = GEN6_RENDER_TYPE_RENDER |
+GEN6_RENDER_SUBTYPE_3D |
+subop;
+ const uint8_t cmd_len = 5;
+ unsigned buf_enabled = 0x0;
+ uint32_t buf_dw[4], *dw;
+ int max_read_length, total_read_length;
+ int i;
- assert(num_dwords == 4);
+ ILO_DEV_ASSERT(builder-dev, 6, 6);
+
+ assert(num_bufs = 4);
+
+ /*
+* From the Sandy Bridge PRM, volume 2 part 1, page 138:
+*
+* (3DSTATE_CONSTANT_VS) The sum of all four read length fields (each
+* incremented to represent the actual read length) must be less than
+* or equal to 32
+*
+* From the Sandy Bridge PRM, volume 2 part 1, page 161:
+*
+* (3DSTATE_CONSTANT_GS) The sum of all four read length fields (each
+* incremented to represent the actual read length) must be less than
+* or equal to 64
+*
+* From the Sandy Bridge PRM, volume 2 part 1, page 287:
+*
+* (3DSTATE_CONSTANT_PS) The sum of all four read length fields (each
+* incremented to represent the actual read length) must be less than
+* or equal to 64
+*/
+ switch (subop) {
+ case GEN6_RENDER_OPCODE_3DSTATE_CONSTANT_VS:
+ max_read_length = 32;
+ break;
+ case GEN6_RENDER_OPCODE_3DSTATE_CONSTANT_GS:
+ case GEN6_RENDER_OPCODE_3DSTATE_CONSTANT_PS:
+ max_read_length = 64;
+ break;
+ default:
+ assert(!unknown pcb subop);
+ max_read_length = 0;
+ break;
+ }
total_read_length = 0;
for (i = 0; i 4; i++) {
if (i num_bufs sizes[i]) {
- /* in 256-bit units minus one */
- const int read_len = (sizes[i] + 31) / 32 - 1;
+ /* in 256-bit units */
+ const int read_len = (sizes[i] + 31) / 32;
assert(bufs[i] % 32 == 0);
- assert(read_len 32);
+ assert(read_len = 32);
- enabled |= 1 i;
- dw[i] = bufs[i] | read_len;
+ buf_enabled |= 1 i;
+ buf_dw[i] = bufs[i] | (read_len - 1);
- total_read_length += read_len + 1;
- }
- else {
- dw[i] = 0;
+ total_read_length += read_len
Mesa (master): ilo: clean up gen6_3DSTATE_SF()
Module: Mesa
Branch: master
Commit: 20a061d2b4c327d154b2067a611a2ac3f2e39698
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=20a061d2b4c327d154b2067a611a2ac3f2e39698
Author: Chia-I Wu olva...@gmail.com
Date: Tue Nov 11 15:15:21 2014 +0800
ilo: clean up gen6_3DSTATE_SF()
Make the helpers fill out valid Gen7 3DSTATE_SF and 3STATE_SBE. This
prevents the helpers from having to do
dw[0] = GEN7_SBE_DW1_x; // setting DW1 value to dw[0]!?
and simplifies gen7_3DSTATE_{SF,SBE}().
Signed-off-by: Chia-I Wu olva...@gmail.com
---
src/gallium/drivers/ilo/ilo_builder_3d_bottom.h | 170 ---
src/gallium/drivers/ilo/ilo_render_gen6.c |8 +-
src/gallium/drivers/ilo/ilo_render_gen7.c | 17 ++-
3 files changed, 105 insertions(+), 90 deletions(-)
diff --git a/src/gallium/drivers/ilo/ilo_builder_3d_bottom.h
b/src/gallium/drivers/ilo/ilo_builder_3d_bottom.h
index 773ccbf..a66ed0b 100644
--- a/src/gallium/drivers/ilo/ilo_builder_3d_bottom.h
+++ b/src/gallium/drivers/ilo/ilo_builder_3d_bottom.h
@@ -92,84 +92,87 @@ gen6_disable_3DSTATE_CLIP(struct ilo_builder *builder)
dw[3] = 0;
}
-/**
- * Fill in DW2 to DW7 of 3DSTATE_SF.
- */
static inline void
-ilo_gpe_gen6_fill_3dstate_sf_raster(const struct ilo_dev_info *dev,
-const struct ilo_rasterizer_state
*rasterizer,
-int num_samples,
-enum pipe_format depth_format,
-uint32_t *payload, unsigned payload_len)
+gen7_internal_3dstate_sf(struct ilo_builder *builder,
+ uint8_t cmd_len, uint32_t *dw,
+ const struct ilo_rasterizer_sf *sf,
+ enum pipe_format zs_format,
+ int num_samples)
{
- assert(payload_len == Elements(rasterizer-sf.payload));
+ ILO_DEV_ASSERT(builder-dev, 6, 7.5);
+
+ assert(cmd_len == 7);
- if (rasterizer) {
- const struct ilo_rasterizer_sf *sf = rasterizer-sf;
+ dw[0] = GEN6_RENDER_CMD(3D, 3DSTATE_SF) | (cmd_len - 2);
+
+ if (sf) {
+ /* see rasterizer_init_sf() */
+ STATIC_ASSERT(Elements(sf-payload) = 6);
+ dw[1] = sf-payload[0];
+ dw[2] = sf-payload[1];
+ dw[3] = sf-payload[2];
+ dw[4] = sf-payload[3];
+ dw[5] = sf-payload[4];
+ dw[6] = sf-payload[5];
- memcpy(payload, sf-payload, sizeof(sf-payload));
if (num_samples 1)
- payload[1] |= sf-dw_msaa;
- }
- else {
- payload[0] = 0;
- payload[1] = (num_samples 1) ? GEN7_SF_DW2_MSRASTMODE_ON_PATTERN : 0;
- payload[2] = 0;
- payload[3] = 0;
- payload[4] = 0;
- payload[5] = 0;
+ dw[2] |= sf-dw_msaa;
+ } else {
+ dw[1] = 0;
+ dw[2] = (num_samples 1) ? GEN7_SF_DW2_MSRASTMODE_ON_PATTERN : 0;
+ dw[3] = 0;
+ dw[4] = 0;
+ dw[5] = 0;
+ dw[6] = 0;
}
- if (ilo_dev_gen(dev) = ILO_GEN(7)) {
- int format;
+ if (ilo_dev_gen(builder-dev) = ILO_GEN(7)) {
+ int hw_format;
/* separate stencil */
- switch (depth_format) {
+ switch (zs_format) {
case PIPE_FORMAT_Z16_UNORM:
- format = GEN6_ZFORMAT_D16_UNORM;
+ hw_format = GEN6_ZFORMAT_D16_UNORM;
break;
case PIPE_FORMAT_Z32_FLOAT:
case PIPE_FORMAT_Z32_FLOAT_S8X24_UINT:
- format = GEN6_ZFORMAT_D32_FLOAT;
+ hw_format = GEN6_ZFORMAT_D32_FLOAT;
break;
case PIPE_FORMAT_Z24X8_UNORM:
case PIPE_FORMAT_Z24_UNORM_S8_UINT:
- format = GEN6_ZFORMAT_D24_UNORM_X8_UINT;
+ hw_format = GEN6_ZFORMAT_D24_UNORM_X8_UINT;
break;
default:
/* FLOAT surface is assumed when there is no depth buffer */
- format = GEN6_ZFORMAT_D32_FLOAT;
+ hw_format = GEN6_ZFORMAT_D32_FLOAT;
break;
}
- payload[0] |= format GEN7_SF_DW1_DEPTH_FORMAT__SHIFT;
+ dw[1] |= hw_format GEN7_SF_DW1_DEPTH_FORMAT__SHIFT;
}
}
-/**
- * Fill in DW1 and DW8 to DW19 of 3DSTATE_SF.
- */
static inline void
-ilo_gpe_gen6_fill_3dstate_sf_sbe(const struct ilo_dev_info *dev,
- const struct ilo_rasterizer_state *rasterizer,
- const struct ilo_shader_state *fs,
- uint32_t *dw, int num_dwords)
+gen7_internal_3dstate_sbe(struct ilo_builder *builder,
+ uint8_t cmd_len, uint32_t *dw,
+ const struct ilo_shader_state *fs,
+ int sprite_coord_mode)
{
- int output_count, vue_offset, vue_len;
const struct ilo_kernel_routing *routing;
+ int vue_offset, vue_len, out_count;
+
+ ILO_DEV_ASSERT(builder-dev, 6, 7.5);
+
+ assert(cmd_len == 14);
- ILO_DEV_ASSERT(dev, 6, 7.5);
- assert(num_dwords == 13);
+ dw[0] = GEN7_RENDER_CMD(3D, 3DSTATE_SBE) | (cmd_len - 2);
if (!fs) {
- memset(dw, 0, sizeof(dw[0
Mesa (master): ilo: add 3DSTATE_SO_BUFFER variants
Module: Mesa
Branch: master
Commit: c637075ea29811194d12611ec79b3ba4858d1e37
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=c637075ea29811194d12611ec79b3ba4858d1e37
Author: Chia-I Wu olva...@gmail.com
Date: Tue Nov 11 11:21:01 2014 +0800
ilo: add 3DSTATE_SO_BUFFER variants
Add gen7_disable_3DSTATE_SO_BUFFER() to disable SO buffers.
Signed-off-by: Chia-I Wu olva...@gmail.com
---
src/gallium/drivers/ilo/ilo_builder_3d_top.h | 43 ++
src/gallium/drivers/ilo/ilo_render_gen7.c|6 ++--
2 files changed, 25 insertions(+), 24 deletions(-)
diff --git a/src/gallium/drivers/ilo/ilo_builder_3d_top.h
b/src/gallium/drivers/ilo/ilo_builder_3d_top.h
index 8f2a25a..5f758a1 100644
--- a/src/gallium/drivers/ilo/ilo_builder_3d_top.h
+++ b/src/gallium/drivers/ilo/ilo_builder_3d_top.h
@@ -956,53 +956,56 @@ gen7_3DSTATE_SO_DECL_LIST(struct ilo_builder *builder,
}
static inline void
-gen7_3DSTATE_SO_BUFFER(struct ilo_builder *builder,
- int index, int base, int stride,
+gen7_3DSTATE_SO_BUFFER(struct ilo_builder *builder, int index, int stride,
const struct pipe_stream_output_target *so_target)
{
const uint8_t cmd_len = 4;
- const uint32_t dw0 = GEN7_RENDER_CMD(3D, 3DSTATE_SO_BUFFER) |
-(cmd_len - 2);
struct ilo_buffer *buf;
- int end;
+ int start, end;
uint32_t *dw;
unsigned pos;
ILO_DEV_ASSERT(builder-dev, 7, 7.5);
- if (!so_target || !so_target-buffer) {
- ilo_builder_batch_pointer(builder, cmd_len, dw);
- dw[0] = dw0;
- dw[1] = index GEN7_SO_BUF_DW1_INDEX__SHIFT;
- dw[2] = 0;
- dw[3] = 0;
-
- return;
- }
-
buf = ilo_buffer(so_target-buffer);
/* DWord-aligned */
- assert(stride % 4 == 0 base % 4 == 0);
+ assert(stride % 4 == 0);
assert(so_target-buffer_offset % 4 == 0);
stride = ~3;
- base = (base + so_target-buffer_offset) ~3;
- end = (base + so_target-buffer_size) ~3;
+ start = so_target-buffer_offset ~3;
+ end = (start + so_target-buffer_size) ~3;
pos = ilo_builder_batch_pointer(builder, cmd_len, dw);
- dw[0] = dw0;
+ dw[0] = GEN7_RENDER_CMD(3D, 3DSTATE_SO_BUFFER) | (cmd_len - 2);
dw[1] = index GEN7_SO_BUF_DW1_INDEX__SHIFT |
stride;
ilo_builder_batch_reloc(builder, pos + 2,
- buf-bo, base, INTEL_RELOC_WRITE);
+ buf-bo, start, INTEL_RELOC_WRITE);
ilo_builder_batch_reloc(builder, pos + 3,
buf-bo, end, INTEL_RELOC_WRITE);
}
static inline void
+gen7_disable_3DSTATE_SO_BUFFER(struct ilo_builder *builder, int index)
+{
+ const uint8_t cmd_len = 4;
+ uint32_t *dw;
+
+ ILO_DEV_ASSERT(builder-dev, 7, 7.5);
+
+ ilo_builder_batch_pointer(builder, cmd_len, dw);
+
+ dw[0] = GEN7_RENDER_CMD(3D, 3DSTATE_SO_BUFFER) | (cmd_len - 2);
+ dw[1] = index GEN7_SO_BUF_DW1_INDEX__SHIFT;
+ dw[2] = 0;
+ dw[3] = 0;
+}
+
+static inline void
gen6_3DSTATE_BINDING_TABLE_POINTERS(struct ilo_builder *builder,
uint32_t vs_binding_table,
uint32_t gs_binding_table,
diff --git a/src/gallium/drivers/ilo/ilo_render_gen7.c
b/src/gallium/drivers/ilo/ilo_render_gen7.c
index 8830db4..2051f12 100644
--- a/src/gallium/drivers/ilo/ilo_render_gen7.c
+++ b/src/gallium/drivers/ilo/ilo_render_gen7.c
@@ -458,14 +458,12 @@ gen7_draw_sol(struct ilo_render *r,
for (i = 0; i vec-so.count; i++) {
const int stride = so_info-stride[i] * 4; /* in bytes */
- int base = 0;
- gen7_3DSTATE_SO_BUFFER(r-builder, i, base, stride,
- vec-so.states[i]);
+ gen7_3DSTATE_SO_BUFFER(r-builder, i, stride, vec-so.states[i]);
}
for (; i 4; i++)
- gen7_3DSTATE_SO_BUFFER(r-builder, i, 0, 0, NULL);
+ gen7_disable_3DSTATE_SO_BUFFER(r-builder, i);
}
/* 3DSTATE_SO_DECL_LIST */
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Mesa (master): ilo: add variants of 3DSTATE_PS
Module: Mesa
Branch: master
Commit: 9087239df8bb01c35429ea0e438b382a964f6d89
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=9087239df8bb01c35429ea0e438b382a964f6d89
Author: Chia-I Wu olva...@gmail.com
Date: Tue Nov 11 10:50:31 2014 +0800
ilo: add variants of 3DSTATE_PS
Add gen7_disable_3DSTATE_PS() to disable PS.
Signed-off-by: Chia-I Wu olva...@gmail.com
---
src/gallium/drivers/ilo/ilo_builder_3d_bottom.h | 75 ---
src/gallium/drivers/ilo/ilo_render_gen7.c |2 +-
2 files changed, 41 insertions(+), 36 deletions(-)
diff --git a/src/gallium/drivers/ilo/ilo_builder_3d_bottom.h
b/src/gallium/drivers/ilo/ilo_builder_3d_bottom.h
index 1592185..d7b6104 100644
--- a/src/gallium/drivers/ilo/ilo_builder_3d_bottom.h
+++ b/src/gallium/drivers/ilo/ilo_builder_3d_bottom.h
@@ -415,45 +415,11 @@ gen7_3DSTATE_PS(struct ilo_builder *builder,
bool dual_blend)
{
const uint8_t cmd_len = 8;
- const uint32_t dw0 = GEN7_RENDER_CMD(3D, 3DSTATE_PS) | (cmd_len - 2);
const struct ilo_shader_cso *cso;
uint32_t dw2, dw4, dw5, *dw;
ILO_DEV_ASSERT(builder-dev, 7, 7.5);
- if (!fs) {
- int max_threads;
-
- /* GPU hangs if none of the dispatch enable bits is set */
- dw4 = GEN7_PS_DW4_8_PIXEL_DISPATCH;
-
- /* see brwCreateContext() */
- switch (ilo_dev_gen(builder-dev)) {
- case ILO_GEN(7.5):
- max_threads = (builder-dev-gt == 3) ? 408 :
- (builder-dev-gt == 2) ? 204 : 102;
- dw4 |= (max_threads - 1) GEN75_PS_DW4_MAX_THREADS__SHIFT;
- break;
- case ILO_GEN(7):
- default:
- max_threads = (builder-dev-gt == 2) ? 172 : 48;
- dw4 |= (max_threads - 1) GEN7_PS_DW4_MAX_THREADS__SHIFT;
- break;
- }
-
- ilo_builder_batch_pointer(builder, cmd_len, dw);
- dw[0] = dw0;
- dw[1] = 0;
- dw[2] = 0;
- dw[3] = 0;
- dw[4] = dw4;
- dw[5] = 0;
- dw[6] = 0;
- dw[7] = 0;
-
- return;
- }
-
cso = ilo_shader_get_kernel_cso(fs);
dw2 = cso-payload[0];
dw4 = cso-payload[1];
@@ -463,7 +429,8 @@ gen7_3DSTATE_PS(struct ilo_builder *builder,
dw4 |= GEN7_PS_DW4_DUAL_SOURCE_BLEND;
ilo_builder_batch_pointer(builder, cmd_len, dw);
- dw[0] = dw0;
+
+ dw[0] = GEN7_RENDER_CMD(3D, 3DSTATE_PS) | (cmd_len - 2);
dw[1] = ilo_shader_get_kernel_offset(fs);
dw[2] = dw2;
dw[3] = 0; /* scratch */
@@ -474,6 +441,44 @@ gen7_3DSTATE_PS(struct ilo_builder *builder,
}
static inline void
+gen7_disable_3DSTATE_PS(struct ilo_builder *builder)
+{
+ const uint8_t cmd_len = 8;
+ int max_threads;
+ uint32_t dw4, *dw;
+
+ ILO_DEV_ASSERT(builder-dev, 7, 7.5);
+
+ /* GPU hangs if none of the dispatch enable bits is set */
+ dw4 = GEN7_PS_DW4_8_PIXEL_DISPATCH;
+
+ /* see brwCreateContext() */
+ switch (ilo_dev_gen(builder-dev)) {
+ case ILO_GEN(7.5):
+ max_threads = (builder-dev-gt == 3) ? 408 :
+(builder-dev-gt == 2) ? 204 : 102;
+ dw4 |= (max_threads - 1) GEN75_PS_DW4_MAX_THREADS__SHIFT;
+ break;
+ case ILO_GEN(7):
+ default:
+ max_threads = (builder-dev-gt == 2) ? 172 : 48;
+ dw4 |= (max_threads - 1) GEN7_PS_DW4_MAX_THREADS__SHIFT;
+ break;
+ }
+
+ ilo_builder_batch_pointer(builder, cmd_len, dw);
+
+ dw[0] = GEN7_RENDER_CMD(3D, 3DSTATE_PS) | (cmd_len - 2);
+ dw[1] = 0;
+ dw[2] = 0;
+ dw[3] = 0;
+ dw[4] = dw4;
+ dw[5] = 0;
+ dw[6] = 0;
+ dw[7] = 0;
+}
+
+static inline void
gen6_3DSTATE_CONSTANT_PS(struct ilo_builder *builder,
const uint32_t *bufs, const int *sizes,
int num_bufs)
diff --git a/src/gallium/drivers/ilo/ilo_render_gen7.c
b/src/gallium/drivers/ilo/ilo_render_gen7.c
index ab27a3d..34a881a 100644
--- a/src/gallium/drivers/ilo/ilo_render_gen7.c
+++ b/src/gallium/drivers/ilo/ilo_render_gen7.c
@@ -770,7 +770,7 @@ gen7_rectlist_wm(struct ilo_render *r,
gen7_3DSTATE_CONSTANT_PS(r-builder, NULL, NULL, 0);
gen7_wa_pre_3dstate_ps_max_threads(r);
- gen7_3DSTATE_PS(r-builder, NULL, false);
+ gen7_disable_3DSTATE_PS(r-builder);
}
static void
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Mesa (master): ilo: prefix 3DSTATE_VF with gen75
Module: Mesa
Branch: master
Commit: 8abf4976c6efc11781170b957918128606f4a529
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=8abf4976c6efc11781170b957918128606f4a529
Author: Chia-I Wu olva...@gmail.com
Date: Tue Nov 11 09:11:37 2014 +0800
ilo: prefix 3DSTATE_VF with gen75
3DSTATE_VF is Gen7.5+ only.
Signed-off-by: Chia-I Wu olva...@gmail.com
---
src/gallium/drivers/ilo/ilo_builder_3d_top.h |6 +++---
src/gallium/drivers/ilo/ilo_render_gen6.c|2 +-
2 files changed, 4 insertions(+), 4 deletions(-)
diff --git a/src/gallium/drivers/ilo/ilo_builder_3d_top.h
b/src/gallium/drivers/ilo/ilo_builder_3d_top.h
index 697a477..39bd1e5 100644
--- a/src/gallium/drivers/ilo/ilo_builder_3d_top.h
+++ b/src/gallium/drivers/ilo/ilo_builder_3d_top.h
@@ -311,9 +311,9 @@ gen7_3DSTATE_URB_GS(struct ilo_builder *builder,
}
static inline void
-gen7_3DSTATE_VF(struct ilo_builder *builder,
-bool enable_cut_index,
-uint32_t cut_index)
+gen75_3DSTATE_VF(struct ilo_builder *builder,
+ bool enable_cut_index,
+ uint32_t cut_index)
{
const uint8_t cmd_len = 2;
uint32_t *dw;
diff --git a/src/gallium/drivers/ilo/ilo_render_gen6.c
b/src/gallium/drivers/ilo/ilo_render_gen6.c
index 4221f69..deaa515 100644
--- a/src/gallium/drivers/ilo/ilo_render_gen6.c
+++ b/src/gallium/drivers/ilo/ilo_render_gen6.c
@@ -447,7 +447,7 @@ gen6_draw_vf(struct ilo_render *r,
/* 3DSTATE_VF */
if (session-primitive_restart_changed) {
- gen7_3DSTATE_VF(r-builder, vec-draw-primitive_restart,
+ gen75_3DSTATE_VF(r-builder, vec-draw-primitive_restart,
vec-draw-restart_index);
}
}
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Mesa (master): ilo: remove inlined state functions
Module: Mesa
Branch: master
Commit: 55d70e0669fd363c434ad781fe66d60095585062
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=55d70e0669fd363c434ad781fe66d60095585062
Author: Chia-I Wu olva...@gmail.com
Date: Mon Nov 10 13:11:40 2014 +0800
ilo: remove inlined state functions
We had some inlined state functions for dispatching. They were not needed
with the new top/bottom split.
Signed-off-by: Chia-I Wu olva...@gmail.com
---
src/gallium/drivers/ilo/ilo_builder_3d_top.h |4 +-
src/gallium/drivers/ilo/ilo_state_3d.h| 166 ++--
src/gallium/drivers/ilo/ilo_state_3d_bottom.c | 71 ++
src/gallium/drivers/ilo/ilo_state_3d_top.c| 172 +
4 files changed, 177 insertions(+), 236 deletions(-)
diff --git a/src/gallium/drivers/ilo/ilo_builder_3d_top.h
b/src/gallium/drivers/ilo/ilo_builder_3d_top.h
index 5c4fbf9..697a477 100644
--- a/src/gallium/drivers/ilo/ilo_builder_3d_top.h
+++ b/src/gallium/drivers/ilo/ilo_builder_3d_top.h
@@ -683,7 +683,7 @@ gen6_3DSTATE_GS(struct ilo_builder *builder,
ilo_shader_get_kernel_param(vs, param);
/* cannot use VS's CSO */
- ilo_gpe_init_gs_cso_gen6(builder-dev, vs, cso);
+ ilo_gpe_init_gs_cso(builder-dev, vs, cso);
dw2 = cso.payload[0];
dw4 = cso.payload[1];
dw5 = cso.payload[2];
@@ -1388,7 +1388,7 @@ gen6_so_SURFACE_STATE(struct ilo_builder *builder,
break;
}
- ilo_gpe_init_view_surface_for_buffer_gen6(builder-dev, buf, bo_offset,
+ ilo_gpe_init_view_surface_for_buffer(builder-dev, buf, bo_offset,
so-buffer_size, struct_size, elem_format, false, true, surf);
return gen6_SURFACE_STATE(builder, surf, false);
diff --git a/src/gallium/drivers/ilo/ilo_state_3d.h
b/src/gallium/drivers/ilo/ilo_state_3d.h
index c1e54c0..b83322b 100644
--- a/src/gallium/drivers/ilo/ilo_state_3d.h
+++ b/src/gallium/drivers/ilo/ilo_state_3d.h
@@ -112,39 +112,9 @@ ilo_gpe_set_scissor_null(const struct ilo_dev_info *dev,
struct ilo_scissor_state *scissor);
void
-ilo_gpe_init_rasterizer_clip(const struct ilo_dev_info *dev,
- const struct pipe_rasterizer_state *state,
- struct ilo_rasterizer_clip *clip);
-
-void
-ilo_gpe_init_rasterizer_sf(const struct ilo_dev_info *dev,
- const struct pipe_rasterizer_state *state,
- struct ilo_rasterizer_sf *sf);
-
-void
-ilo_gpe_init_rasterizer_wm_gen6(const struct ilo_dev_info *dev,
-const struct pipe_rasterizer_state *state,
-struct ilo_rasterizer_wm *wm);
-
-void
-ilo_gpe_init_rasterizer_wm_gen7(const struct ilo_dev_info *dev,
-const struct pipe_rasterizer_state *state,
-struct ilo_rasterizer_wm *wm);
-
-static inline void
ilo_gpe_init_rasterizer(const struct ilo_dev_info *dev,
const struct pipe_rasterizer_state *state,
-struct ilo_rasterizer_state *rasterizer)
-{
- ilo_gpe_init_rasterizer_clip(dev, state, rasterizer-clip);
- ilo_gpe_init_rasterizer_sf(dev, state, rasterizer-sf);
-
- if (ilo_dev_gen(dev) = ILO_GEN(7))
- ilo_gpe_init_rasterizer_wm_gen7(dev, state, rasterizer-wm);
- else
- ilo_gpe_init_rasterizer_wm_gen6(dev, state, rasterizer-wm);
-}
-
+struct ilo_rasterizer_state *rasterizer);
void
ilo_gpe_init_dsa(const struct ilo_dev_info *dev,
const struct pipe_depth_stencil_alpha_state *state,
@@ -161,93 +131,21 @@ ilo_gpe_init_sampler_cso(const struct ilo_dev_info *dev,
struct ilo_sampler_cso *sampler);
void
-ilo_gpe_init_view_surface_null_gen6(const struct ilo_dev_info *dev,
-unsigned width, unsigned height,
-unsigned depth, unsigned level,
-struct ilo_view_surface *surf);
-
-void
-ilo_gpe_init_view_surface_for_buffer_gen6(const struct ilo_dev_info *dev,
- const struct ilo_buffer *buf,
- unsigned offset, unsigned size,
- unsigned struct_size,
- enum pipe_format elem_format,
- bool is_rt, bool render_cache_rw,
- struct ilo_view_surface *surf);
-
-void
-ilo_gpe_init_view_surface_for_texture_gen6(const struct ilo_dev_info *dev,
- const struct ilo_texture *tex,
- enum pipe_format format,
- unsigned first_level,
- unsigned num_levels,
- unsigned
Mesa (master): ilo: derive fb blending caps at bind time
Module: Mesa
Branch: master
Commit: d388d8576f004cbc6e659ab7e7b0e9af938f7068
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=d388d8576f004cbc6e659ab7e7b0e9af938f7068
Author: Chia-I Wu olva...@gmail.com
Date: Mon Nov 10 13:44:45 2014 +0800
ilo: derive fb blending caps at bind time
Derive whether a RT supports blending, logicop, and the like when
set_framebuffer_state() is called. This enables us to simplify
gen6_BLEND_STATE().
Signed-off-by: Chia-I Wu olva...@gmail.com
---
src/gallium/drivers/ilo/ilo_builder_3d_bottom.h | 91 ++-
src/gallium/drivers/ilo/ilo_state.h |7 ++
src/gallium/drivers/ilo/ilo_state_3d_bottom.c | 81 +---
3 files changed, 101 insertions(+), 78 deletions(-)
diff --git a/src/gallium/drivers/ilo/ilo_builder_3d_bottom.h
b/src/gallium/drivers/ilo/ilo_builder_3d_bottom.h
index 456a494..2397a2c 100644
--- a/src/gallium/drivers/ilo/ilo_builder_3d_bottom.h
+++ b/src/gallium/drivers/ilo/ilo_builder_3d_bottom.h
@@ -1224,72 +1224,36 @@ gen6_BLEND_STATE(struct ilo_builder *builder,
ILO_BUILDER_ITEM_BLEND, state_align, state_len, dw);
for (i = 0; i num_targets; i++) {
- const unsigned idx = (blend-independent_blend_enable) ? i : 0;
- const struct ilo_blend_cso *cso = blend-cso[idx];
- const int num_samples = fb-num_samples;
- const struct util_format_description *format_desc =
- (idx fb-state.nr_cbufs fb-state.cbufs[idx]) ?
- util_format_description(fb-state.cbufs[idx]-format) : NULL;
- bool rt_is_unorm, rt_is_pure_integer, rt_dst_alpha_forced_one;
-
- rt_is_unorm = true;
- rt_is_pure_integer = false;
- rt_dst_alpha_forced_one = false;
-
- if (format_desc) {
- int ch;
-
- switch (format_desc-format) {
- case PIPE_FORMAT_B8G8R8X8_UNORM:
-/* force alpha to one when the HW format has alpha */
-assert(ilo_translate_render_format(builder-dev,
- PIPE_FORMAT_B8G8R8X8_UNORM) ==
- GEN6_FORMAT_B8G8R8A8_UNORM);
-rt_dst_alpha_forced_one = true;
-break;
- default:
-break;
- }
+ const struct ilo_blend_cso *cso =
+ blend-cso[(blend-independent_blend_enable) ? i : 0];
- for (ch = 0; ch 4; ch++) {
-if (format_desc-channel[ch].type == UTIL_FORMAT_TYPE_VOID)
- continue;
+ dw[0] = cso-payload[0];
+ dw[1] = cso-payload[1];
-if (format_desc-channel[ch].pure_integer) {
- rt_is_unorm = false;
- rt_is_pure_integer = true;
- break;
-}
+ if (i fb-state.nr_cbufs fb-state.cbufs[i]) {
+ const struct ilo_fb_blend_caps *caps = fb-blend_caps[i];
-if (!format_desc-channel[ch].normalized ||
-format_desc-channel[ch].type != UTIL_FORMAT_TYPE_UNSIGNED)
- rt_is_unorm = false;
+ if (caps-can_blend) {
+if (caps-dst_alpha_forced_one)
+ dw[0] |= cso-dw_blend_dst_alpha_forced_one;
+else
+ dw[0] |= cso-dw_blend;
}
- }
- dw[0] = cso-payload[0];
- dw[1] = cso-payload[1];
-
- if (!rt_is_pure_integer) {
- if (rt_dst_alpha_forced_one)
-dw[0] |= cso-dw_blend_dst_alpha_forced_one;
- else
-dw[0] |= cso-dw_blend;
+ if (caps-can_logicop)
+dw[1] |= cso-dw_logicop;
+
+ if (caps-can_alpha_test)
+dw[1] |= dsa-dw_alpha;
+ } else {
+ dw[1] |= GEN6_BLEND_DW1_WRITE_DISABLE_A |
+ GEN6_BLEND_DW1_WRITE_DISABLE_R |
+ GEN6_BLEND_DW1_WRITE_DISABLE_G |
+ GEN6_BLEND_DW1_WRITE_DISABLE_B |
+ dsa-dw_alpha;
}
/*
- * From the Sandy Bridge PRM, volume 2 part 1, page 365:
- *
- * Logic Ops are only supported on *_UNORM surfaces (excluding
- * _SRGB variants), otherwise Logic Ops must be DISABLED.
- *
- * Since logicop is ignored for non-UNORM color buffers, no special care
- * is needed.
- */
- if (rt_is_unorm)
- dw[1] |= cso-dw_logicop;
-
- /*
* From the Sandy Bridge PRM, volume 2 part 1, page 356:
*
* When NumSamples = 1, AlphaToCoverage and AlphaToCoverage
@@ -1298,18 +1262,9 @@ gen6_BLEND_STATE(struct ilo_builder *builder,
* There is no such limitation on GEN7, or for AlphaToOne. But GL
* requires that anyway.
*/
- if (num_samples 1)
+ if (fb-num_samples 1)
dw[1] |= cso-dw_alpha_mod;
- /*
- * From the Sandy Bridge PRM, volume 2 part 1, page 382:
- *
- * Alpha Test can only be enabled if Pixel Shader outputs a float
- * alpha value.
- */
- if (!rt_is_pure_integer)
- dw[1] |= dsa-dw_alpha;
-
dw += 2;
}
diff --git
Mesa (master): ilo: use top/bottom split for state functions
Module: Mesa
Branch: master
Commit: c88c49baf420556a130041044a7f074d6368f080
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=c88c49baf420556a130041044a7f074d6368f080
Author: Chia-I Wu olva...@gmail.com
Date: Mon Nov 10 12:55:34 2014 +0800
ilo: use top/bottom split for state functions
Follow the builder and split state functions into top (vertex processing) and
bottom (pixel processing).
Signed-off-by: Chia-I Wu olva...@gmail.com
---
src/gallium/drivers/ilo/Makefile.sources |6 +-
src/gallium/drivers/ilo/ilo_blitter_rectlist.c |2 +-
src/gallium/drivers/ilo/ilo_builder_3d_top.h |2 +-
src/gallium/drivers/ilo/ilo_shader.c |2 +-
src/gallium/drivers/ilo/ilo_state.c|2 +-
.../ilo/{ilo_state_gen.h = ilo_state_3d.h}|8 +-
.../{ilo_state_gen6.c = ilo_state_3d_bottom.c}| 1479 --
src/gallium/drivers/ilo/ilo_state_3d_top.c | 1566
src/gallium/drivers/ilo/ilo_state_gen7.c | 641
9 files changed, 1856 insertions(+), 1852 deletions(-)
Diff:
http://cgit.freedesktop.org/mesa/mesa/diff/?id=c88c49baf420556a130041044a7f074d6368f080
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Mesa (master): ilo: tidy up message descriptor decoding
Module: Mesa
Branch: master
Commit: 9a0a4d67a9150ad18f06ab48641205b8ff2da816
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=9a0a4d67a9150ad18f06ab48641205b8ff2da816
Author: Chia-I Wu olva...@gmail.com
Date: Fri Nov 7 16:10:38 2014 +0800
ilo: tidy up message descriptor decoding
Move opcode to string mappings to functions of their own. Have for consistent
outputs for similar opcodes.
Signed-off-by: Chia-I Wu olva...@gmail.com
---
.../drivers/ilo/shader/toy_compiler_disasm.c | 491
1 file changed, 302 insertions(+), 189 deletions(-)
diff --git a/src/gallium/drivers/ilo/shader/toy_compiler_disasm.c
b/src/gallium/drivers/ilo/shader/toy_compiler_disasm.c
index f45ac56..b23b68d 100644
--- a/src/gallium/drivers/ilo/shader/toy_compiler_disasm.c
+++ b/src/gallium/drivers/ilo/shader/toy_compiler_disasm.c
@@ -879,6 +879,251 @@ disasm_inst_absolute(const struct disasm_inst *inst, bool
absolute)
return (absolute) ? (abs) : ;
}
+static const char *
+disasm_inst_mdesc_sampler_op(const struct disasm_inst *inst, int op)
+{
+ switch (op) {
+ case GEN6_MSG_SAMPLER_SAMPLE: return sample;
+ case GEN6_MSG_SAMPLER_SAMPLE_B: return sample_b;
+ case GEN6_MSG_SAMPLER_SAMPLE_L: return sample_l;
+ case GEN6_MSG_SAMPLER_SAMPLE_C: return sample_c;
+ case GEN6_MSG_SAMPLER_SAMPLE_D: return sample_d;
+ case GEN6_MSG_SAMPLER_SAMPLE_B_C: return sample_b_c;
+ case GEN6_MSG_SAMPLER_SAMPLE_L_C: return sample_l_c;
+ case GEN6_MSG_SAMPLER_LD: return ld;
+ case GEN6_MSG_SAMPLER_GATHER4: return gather4;
+ case GEN6_MSG_SAMPLER_LOD: return lod;
+ case GEN6_MSG_SAMPLER_RESINFO: return resinfo;
+ case GEN6_MSG_SAMPLER_SAMPLEINFO: return sampleinfo;
+ case GEN7_MSG_SAMPLER_GATHER4_C:return gather4_c;
+ case GEN7_MSG_SAMPLER_GATHER4_PO: return gather4_po;
+ case GEN7_MSG_SAMPLER_GATHER4_PO_C: return gather4_po_c;
+ case GEN7_MSG_SAMPLER_SAMPLE_D_C: return sample_d_c;
+ case GEN7_MSG_SAMPLER_SAMPLE_LZ:return sample_lz;
+ case GEN7_MSG_SAMPLER_SAMPLE_C_LC: return sample_c_lc;
+ case GEN7_MSG_SAMPLER_SAMPLE_LD_LZ: return sample_ld_lz;
+ case GEN7_MSG_SAMPLER_LD_MCS: return ld_mcs;
+ case GEN7_MSG_SAMPLER_LD2DMS: return ld2dms;
+ case GEN7_MSG_SAMPLER_LD2DSS: return ld2dss;
+ default:return BAD;
+ }
+}
+
+static const char *
+disasm_inst_mdesc_sampler_simd(const struct disasm_inst *inst, int simd)
+{
+ switch (simd) {
+ case GEN6_MSG_SAMPLER_SIMD4X2: return SIMD4x2;
+ case GEN6_MSG_SAMPLER_SIMD8: return SIMD8;
+ case GEN6_MSG_SAMPLER_SIMD16:return SIMD16;
+ case GEN6_MSG_SAMPLER_SIMD32_64: return SIMD32;
+ default: return BAD;
+ }
+}
+
+static const char *
+disasm_inst_mdesc_urb_op(const struct disasm_inst *inst, int op)
+{
+ if (ilo_dev_gen(inst-dev) = ILO_GEN(7)) {
+ switch (op) {
+ case GEN7_MSG_URB_WRITE_HWORD: return write HWord;
+ case GEN7_MSG_URB_WRITE_OWORD: return write OWord;
+ case GEN7_MSG_URB_READ_HWORD:return read HWord;
+ case GEN7_MSG_URB_READ_OWORD:return read OWord;
+ case GEN7_MSG_URB_ATOMIC_MOV:return atomic mov;
+ case GEN7_MSG_URB_ATOMIC_INC:return atomic inc;
+ default: return BAD;
+ }
+ } else {
+ switch (op) {
+ case GEN6_MSG_URB_WRITE: return urb_write;
+ case GEN6_MSG_URB_FF_SYNC: return ff_sync;
+ default: return BAD;
+ }
+ }
+}
+
+static const char *
+disasm_inst_mdesc_dp_op_gen6(const struct disasm_inst *inst,
+ int sfid, int op)
+{
+ ILO_DEV_ASSERT(inst-dev, 6, 6);
+
+ switch (op) {
+ case GEN6_MSG_DP_OWORD_BLOCK_READ: return OWORD block read;
+ case GEN6_MSG_DP_RT_UNORM_READ: return RT UNORM read;
+ case GEN6_MSG_DP_OWORD_DUAL_BLOCK_READ: return OWORD dual block read;
+ case GEN6_MSG_DP_MEDIA_BLOCK_READ: return media block read;
+ case GEN6_MSG_DP_UNALIGNED_OWORD_BLOCK_READ: return unaligned OWORD block
read;
+ case GEN6_MSG_DP_DWORD_SCATTERED_READ: return DWORD scattered read;
+ case GEN6_MSG_DP_DWORD_ATOMIC_WRITE: return DWORD atomic write;
+ case GEN6_MSG_DP_OWORD_BLOCK_WRITE: return OWORD block write;
+ case GEN6_MSG_DP_OWORD_DUAL_BLOCK_WRITE: return OWORD dual
block_write;
+ case GEN6_MSG_DP_MEDIA_BLOCK_WRITE: return media block write;
+ case GEN6_MSG_DP_DWORD_SCATTERED_WRITE: return DWORD scattered write;
+ case GEN6_MSG_DP_RT_WRITE: return RT write;
+ case GEN6_MSG_DP_SVB_WRITE: return SVB write;
+ case GEN6_MSG_DP_RT_UNORM_WRITE: return RT UNORM write;
+ default: return BAD;
+ }
+}
+
+static const char *
+disasm_inst_mdesc_dp_op_gen7(const struct disasm_inst *inst
Mesa (master): ilo: decode INTERFACE_DESCRIPTOR_DATA
Module: Mesa
Branch: master
Commit: d3c5976a3b317cc347fe7c8ed5255ed687cf5af5
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=d3c5976a3b317cc347fe7c8ed5255ed687cf5af5
Author: Chia-I Wu olva...@gmail.com
Date: Fri Nov 7 15:45:25 2014 +0800
ilo: decode INTERFACE_DESCRIPTOR_DATA
This is at least much better than decoding as blobs.
Signed-off-by: Chia-I Wu olva...@gmail.com
---
src/gallium/drivers/ilo/ilo_builder.h|1 +
src/gallium/drivers/ilo/ilo_builder_decode.c | 40 ++
src/gallium/drivers/ilo/ilo_builder_media.h |2 +-
3 files changed, 42 insertions(+), 1 deletion(-)
diff --git a/src/gallium/drivers/ilo/ilo_builder.h
b/src/gallium/drivers/ilo/ilo_builder.h
index 102f11a..c11dba2 100644
--- a/src/gallium/drivers/ilo/ilo_builder.h
+++ b/src/gallium/drivers/ilo/ilo_builder.h
@@ -49,6 +49,7 @@ enum ilo_builder_item_type {
ILO_BUILDER_ITEM_DEPTH_STENCIL,
ILO_BUILDER_ITEM_BLEND,
ILO_BUILDER_ITEM_SAMPLER,
+ ILO_BUILDER_ITEM_INTERFACE_DESCRIPTOR,
/* for surface buffer */
ILO_BUILDER_ITEM_SURFACE,
diff --git a/src/gallium/drivers/ilo/ilo_builder_decode.c
b/src/gallium/drivers/ilo/ilo_builder_decode.c
index 3a9ae24..05afe12 100644
--- a/src/gallium/drivers/ilo/ilo_builder_decode.c
+++ b/src/gallium/drivers/ilo/ilo_builder_decode.c
@@ -393,6 +393,45 @@ writer_decode_sampler(const struct ilo_builder *builder,
}
static void
+writer_decode_interface_descriptor(const struct ilo_builder *builder,
+ enum ilo_builder_writer_type which,
+ const struct ilo_builder_item *item)
+{
+ const unsigned state_size = sizeof(uint32_t) * 8;
+ const unsigned count = item-size / state_size;
+ unsigned offset = item-offset;
+ unsigned i;
+
+ for (i = 0; i count; i++) {
+ writer_dw(builder, which, offset, 0, IDRT[%d], i);
+ ilo_printf(kernel\n);
+
+ writer_dw(builder, which, offset, 1, IDRT[%d], i);
+ ilo_printf(spf, fp mode\n);
+
+ writer_dw(builder, which, offset, 2, IDRT[%d], i);
+ ilo_printf(sampler\n);
+
+ writer_dw(builder, which, offset, 3, IDRT[%d], i);
+ ilo_printf(binding table\n);
+
+ writer_dw(builder, which, offset, 4, IDRT[%d], i);
+ ilo_printf(curbe read len\n);
+
+ writer_dw(builder, which, offset, 5, IDRT[%d], i);
+ ilo_printf(rounding mode, slm size\n);
+
+ writer_dw(builder, which, offset, 6, IDRT[%d], i);
+ ilo_printf(cross-thread curbe read len\n);
+
+ writer_dw(builder, which, offset, 7, IDRT[%d], i);
+ ilo_printf(mbz\n);
+
+ offset += state_size;
+ }
+}
+
+static void
writer_decode_surface_gen7(const struct ilo_builder *builder,
enum ilo_builder_writer_type which,
const struct ilo_builder_item *item)
@@ -526,6 +565,7 @@ static const struct {
[ILO_BUILDER_ITEM_DEPTH_STENCIL] = { writer_decode_depth_stencil },
[ILO_BUILDER_ITEM_BLEND] = { writer_decode_blend },
[ILO_BUILDER_ITEM_SAMPLER] = { writer_decode_sampler },
+ [ILO_BUILDER_ITEM_INTERFACE_DESCRIPTOR] = {
writer_decode_interface_descriptor },
[ILO_BUILDER_ITEM_SURFACE] = { writer_decode_surface },
[ILO_BUILDER_ITEM_BINDING_TABLE] = { writer_decode_binding_table },
[ILO_BUILDER_ITEM_KERNEL] = { writer_decode_kernel },
diff --git a/src/gallium/drivers/ilo/ilo_builder_media.h
b/src/gallium/drivers/ilo/ilo_builder_media.h
index bae329b..f5d634f 100644
--- a/src/gallium/drivers/ilo/ilo_builder_media.h
+++ b/src/gallium/drivers/ilo/ilo_builder_media.h
@@ -217,7 +217,7 @@ gen6_INTERFACE_DESCRIPTOR_DATA(struct ilo_builder *builder,
ILO_DEV_ASSERT(builder-dev, 7, 7.5);
state_offset = ilo_builder_dynamic_pointer(builder,
- ILO_BUILDER_ITEM_BLOB, state_align, state_len, dw);
+ ILO_BUILDER_ITEM_INTERFACE_DESCRIPTOR, state_align, state_len, dw);
for (i = 0; i idrt_count; i++) {
const struct gen6_idrt_data *idrt = data[i];
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