Module: Mesa
Branch: main
Commit: 18349692d0e2726dcd0c441c067f2995989ce19b
URL:    
http://cgit.freedesktop.org/mesa/mesa/commit/?id=18349692d0e2726dcd0c441c067f2995989ce19b

Author: Samuel Pitoiset <samuel.pitoi...@gmail.com>
Date:   Tue Jan  9 13:57:42 2024 +0100

radv/nir: pass radv_shader_stage to some radv_nir_xxx() functions

Instead of passing separate parameters for args, layout, info etc.

Signed-off-by: Samuel Pitoiset <samuel.pitoi...@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27007>

---

 src/amd/vulkan/nir/radv_nir.h                       |  9 ++++-----
 src/amd/vulkan/nir/radv_nir_apply_pipeline_layout.c |  9 ++++-----
 src/amd/vulkan/nir/radv_nir_lower_abi.c             | 10 +++++-----
 src/amd/vulkan/radv_pipeline.c                      |  4 ++--
 src/amd/vulkan/radv_pipeline_graphics.c             |  4 ++--
 5 files changed, 17 insertions(+), 19 deletions(-)

diff --git a/src/amd/vulkan/nir/radv_nir.h b/src/amd/vulkan/nir/radv_nir.h
index a93678dc214..3e75845e557 100644
--- a/src/amd/vulkan/nir/radv_nir.h
+++ b/src/amd/vulkan/nir/radv_nir.h
@@ -43,12 +43,11 @@ struct radv_shader_args;
 struct radv_shader_layout;
 struct radv_device;
 
-void radv_nir_apply_pipeline_layout(nir_shader *shader, struct radv_device 
*device, const struct radv_shader_info *info,
-                                    const struct radv_shader_args *args, const 
struct radv_shader_layout *layout);
+void radv_nir_apply_pipeline_layout(nir_shader *shader, struct radv_device 
*device,
+                                    const struct radv_shader_stage *stage);
 
-void radv_nir_lower_abi(nir_shader *shader, enum amd_gfx_level gfx_level, 
const struct radv_shader_info *info,
-                        const struct radv_shader_args *args, const struct 
radv_pipeline_key *pl_key,
-                        uint32_t address32_hi);
+void radv_nir_lower_abi(nir_shader *shader, enum amd_gfx_level gfx_level, 
const struct radv_shader_stage *stage,
+                        const struct radv_pipeline_key *pl_key, uint32_t 
address32_hi);
 
 bool radv_nir_lower_hit_attrib_derefs(nir_shader *shader);
 
diff --git a/src/amd/vulkan/nir/radv_nir_apply_pipeline_layout.c 
b/src/amd/vulkan/nir/radv_nir_apply_pipeline_layout.c
index 7428b38eade..602c2b75d24 100644
--- a/src/amd/vulkan/nir/radv_nir_apply_pipeline_layout.c
+++ b/src/amd/vulkan/nir/radv_nir_apply_pipeline_layout.c
@@ -499,8 +499,7 @@ apply_layout_to_tex(nir_builder *b, apply_layout_state 
*state, nir_tex_instr *te
 }
 
 void
-radv_nir_apply_pipeline_layout(nir_shader *shader, struct radv_device *device, 
const struct radv_shader_info *info,
-                               const struct radv_shader_args *args, const 
struct radv_shader_layout *layout)
+radv_nir_apply_pipeline_layout(nir_shader *shader, struct radv_device *device, 
const struct radv_shader_stage *stage)
 {
    apply_layout_state state = {
       .gfx_level = device->physical_device->rad_info.gfx_level,
@@ -509,9 +508,9 @@ radv_nir_apply_pipeline_layout(nir_shader *shader, struct 
radv_device *device, c
       .has_image_load_dcc_bug = 
device->physical_device->rad_info.has_image_load_dcc_bug,
       .disable_tg4_trunc_coord =
          !device->physical_device->rad_info.conformant_trunc_coord && 
!device->disable_trunc_coord,
-      .args = args,
-      .info = info,
-      .layout = layout,
+      .args = &stage->args,
+      .info = &stage->info,
+      .layout = &stage->layout,
    };
 
    nir_builder b;
diff --git a/src/amd/vulkan/nir/radv_nir_lower_abi.c 
b/src/amd/vulkan/nir/radv_nir_lower_abi.c
index bd94770c30a..97d916c9966 100644
--- a/src/amd/vulkan/nir/radv_nir_lower_abi.c
+++ b/src/amd/vulkan/nir/radv_nir_lower_abi.c
@@ -547,18 +547,18 @@ load_gsvs_ring(nir_builder *b, lower_abi_state *s, 
unsigned stream_id)
 }
 
 void
-radv_nir_lower_abi(nir_shader *shader, enum amd_gfx_level gfx_level, const 
struct radv_shader_info *info,
-                   const struct radv_shader_args *args, const struct 
radv_pipeline_key *pl_key, uint32_t address32_hi)
+radv_nir_lower_abi(nir_shader *shader, enum amd_gfx_level gfx_level, const 
struct radv_shader_stage *stage,
+                   const struct radv_pipeline_key *pl_key, uint32_t 
address32_hi)
 {
    lower_abi_state state = {
       .gfx_level = gfx_level,
-      .info = info,
-      .args = args,
+      .info = &stage->info,
+      .args = &stage->args,
       .pl_key = pl_key,
       .address32_hi = address32_hi,
    };
 
-   if (shader->info.stage == MESA_SHADER_GEOMETRY && !info->is_ngg) {
+   if (shader->info.stage == MESA_SHADER_GEOMETRY && !stage->info.is_ngg) {
       nir_function_impl *impl = nir_shader_get_entrypoint(shader);
 
       nir_builder b = nir_builder_at(nir_before_impl(impl));
diff --git a/src/amd/vulkan/radv_pipeline.c b/src/amd/vulkan/radv_pipeline.c
index 2699eaa792f..ee080aa2322 100644
--- a/src/amd/vulkan/radv_pipeline.c
+++ b/src/amd/vulkan/radv_pipeline.c
@@ -563,7 +563,7 @@ radv_postprocess_nir(struct radv_device *device, const 
struct radv_pipeline_key
    if (stage->nir->info.uses_resource_info_query)
       NIR_PASS(_, stage->nir, ac_nir_lower_resinfo, gfx_level);
 
-   NIR_PASS_V(stage->nir, radv_nir_apply_pipeline_layout, device, 
&stage->info, &stage->args, &stage->layout);
+   NIR_PASS_V(stage->nir, radv_nir_apply_pipeline_layout, device, stage);
 
    if (!pipeline_key->optimisations_disabled) {
       NIR_PASS(_, stage->nir, nir_opt_shrink_vectors);
@@ -669,7 +669,7 @@ radv_postprocess_nir(struct radv_device *device, const 
struct radv_pipeline_key
    NIR_PASS(_, stage->nir, ac_nir_lower_global_access);
    NIR_PASS_V(stage->nir, ac_nir_lower_intrinsics_to_args, gfx_level, 
radv_select_hw_stage(&stage->info, gfx_level),
               &stage->args.ac);
-   NIR_PASS_V(stage->nir, radv_nir_lower_abi, gfx_level, &stage->info, 
&stage->args, pipeline_key,
+   NIR_PASS_V(stage->nir, radv_nir_lower_abi, gfx_level, stage, pipeline_key,
               device->physical_device->rad_info.address32_hi);
    radv_optimize_nir_algebraic(
       stage->nir, io_to_mem || lowered_ngg || stage->stage == 
MESA_SHADER_COMPUTE || stage->stage == MESA_SHADER_TASK);
diff --git a/src/amd/vulkan/radv_pipeline_graphics.c 
b/src/amd/vulkan/radv_pipeline_graphics.c
index bdb02754d46..35345680b43 100644
--- a/src/amd/vulkan/radv_pipeline_graphics.c
+++ b/src/amd/vulkan/radv_pipeline_graphics.c
@@ -2193,8 +2193,8 @@ radv_create_gs_copy_shader(struct radv_device *device, 
struct vk_pipeline_cache
 
    NIR_PASS_V(nir, ac_nir_lower_intrinsics_to_args, 
device->physical_device->rad_info.gfx_level, AC_HW_VERTEX_SHADER,
               &gs_copy_stage.args.ac);
-   NIR_PASS_V(nir, radv_nir_lower_abi, 
device->physical_device->rad_info.gfx_level, &gs_copy_stage.info,
-              &gs_copy_stage.args, pipeline_key, 
device->physical_device->rad_info.address32_hi);
+   NIR_PASS_V(nir, radv_nir_lower_abi, 
device->physical_device->rad_info.gfx_level, &gs_copy_stage, pipeline_key,
+              device->physical_device->rad_info.address32_hi);
 
    struct radv_pipeline_key key = {
       .optimisations_disabled = pipeline_key->optimisations_disabled,

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