Mesa (master): ilo: update genhw headers
Module: Mesa Branch: master Commit: eb32ac19569b5f05fc3fa2621b52f2c9fa85556a URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=eb32ac19569b5f05fc3fa2621b52f2c9fa85556a Author: Chia-I Wu Date: Thu Mar 5 15:25:43 2015 +0800 ilo: update genhw headers The main change is non-inline s are now generated as C enums. --- src/gallium/drivers/ilo/genhw/gen_eu_isa.xml.h | 457 ++ src/gallium/drivers/ilo/genhw/gen_eu_message.xml.h | 283 +-- src/gallium/drivers/ilo/genhw/gen_mi.xml.h | 72 +-- src/gallium/drivers/ilo/genhw/gen_render.xml.h | 36 +- src/gallium/drivers/ilo/genhw/gen_render_3d.xml.h | 176 +++ .../drivers/ilo/genhw/gen_render_dynamic.xml.h | 249 ++ .../drivers/ilo/genhw/gen_render_surface.xml.h | 495 ++-- 7 files changed, 986 insertions(+), 782 deletions(-) Diff: http://cgit.freedesktop.org/mesa/mesa/diff/?id=eb32ac19569b5f05fc3fa2621b52f2c9fa85556a ___ mesa-commit mailing list mesa-commit@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-commit
Mesa (master): ilo: update genhw headers for media pipeline
Module: Mesa Branch: master Commit: bfaed536dd98c2977412eff071e9e35d389ed6b8 URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=bfaed536dd98c2977412eff071e9e35d389ed6b8 Author: Chia-I Wu Date: Tue Oct 28 16:16:45 2014 +0800 ilo: update genhw headers for media pipeline Signed-off-by: Chia-I Wu --- src/gallium/drivers/ilo/genhw/gen_eu_message.xml.h | 29 +++ src/gallium/drivers/ilo/genhw/gen_regs.xml.h | 42 src/gallium/drivers/ilo/genhw/gen_render.xml.h | 182 src/gallium/drivers/ilo/genhw/gen_render_3d.xml.h | 129 --- .../drivers/ilo/genhw/gen_render_media.xml.h | 224 .../drivers/ilo/genhw/gen_render_surface.xml.h | 19 -- src/gallium/drivers/ilo/genhw/genhw.h |2 + 7 files changed, 479 insertions(+), 148 deletions(-) diff --git a/src/gallium/drivers/ilo/genhw/gen_eu_message.xml.h b/src/gallium/drivers/ilo/genhw/gen_eu_message.xml.h index dd4dd85..c82fd34 100644 --- a/src/gallium/drivers/ilo/genhw/gen_eu_message.xml.h +++ b/src/gallium/drivers/ilo/genhw/gen_eu_message.xml.h @@ -177,9 +177,13 @@ WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. #define GEN6_MSG_DP_SEND_WRITE_COMMIT (0x1 << 17) #define GEN6_MSG_DP_OP__MASK 0x0001e000 #define GEN6_MSG_DP_OP__SHIFT 13 +#define GEN6_MSG_DP_CTRL__MASK 0x1f00 +#define GEN6_MSG_DP_CTRL__SHIFT8 #define GEN7_MSG_DP_CATEGORY (0x1 << 18) #define GEN7_MSG_DP_OP__MASK 0x0003c000 #define GEN7_MSG_DP_OP__SHIFT 14 +#define GEN7_MSG_DP_CTRL__MASK 0x3f00 +#define GEN7_MSG_DP_CTRL__SHIFT8 #define GEN7_MSG_DP_OWORD_BLOCK_READ_INVALIDATE(0x1 << 13) #define GEN6_MSG_DP_OWORD_BLOCK_SIZE__MASK 0x0700 #define GEN6_MSG_DP_OWORD_BLOCK_SIZE__SHIFT8 @@ -214,7 +218,32 @@ WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. #define GEN6_MSG_DP_RT_MODE_SIMD8_DUALSRC_HI (0x3 << 8) #define GEN6_MSG_DP_RT_MODE_SIMD8_LO (0x4 << 8) #define GEN6_MSG_DP_RT_MODE_SIMD8_IMAGE_WR (0x5 << 8) +#define GEN7_MSG_DP_UNTYPED_MODE__MASK 0x3000 +#define GEN7_MSG_DP_UNTYPED_MODE__SHIFT12 +#define GEN7_MSG_DP_UNTYPED_MODE_SIMD4X2 (0x0 << 12) +#define GEN7_MSG_DP_UNTYPED_MODE_SIMD16(0x1 << 12) +#define GEN7_MSG_DP_UNTYPED_MODE_SIMD8 (0x2 << 12) +#define GEN7_MSG_DP_UNTYPED_MASK__MASK 0x0f00 +#define GEN7_MSG_DP_UNTYPED_MASK__SHIFT8 +#define GEN7_MSG_DP_UNTYPED_MASK_R (0x0 << 8) +#define GEN7_MSG_DP_UNTYPED_MASK_G (0x1 << 8) +#define GEN7_MSG_DP_UNTYPED_MASK_B (0x2 << 8) +#define GEN7_MSG_DP_UNTYPED_MASK_A (0x4 << 8) #define GEN6_MSG_DP_SURFACE__MASK 0x00ff #define GEN6_MSG_DP_SURFACE__SHIFT 0 +#define GEN6_MSG_TS_RESOURCE_SELECT__MASK 0x0010 +#define GEN6_MSG_TS_RESOURCE_SELECT__SHIFT 4 +#define GEN6_MSG_TS_RESOURCE_SELECT_CHILD (0x0 << 4) +#define GEN6_MSG_TS_RESOURCE_SELECT_ROOT (0x1 << 4) +#define GEN6_MSG_TS_RESOURCE_SELECT_DEREF (0x0 << 4) +#define GEN6_MSG_TS_RESOURCE_SELECT_NO_DEREF (0x1 << 4) +#define GEN6_MSG_TS_REQUESTER_TYPE__MASK 0x0002 +#define GEN6_MSG_TS_REQUESTER_TYPE__SHIFT 1 +#define GEN6_MSG_TS_REQUESTER_TYPE_ROOT(0x0 << 1) +#define GEN6_MSG_TS_REQUESTER_TYPE_CHILD (0x1 << 1) +#define GEN6_MSG_TS_OPCODE__MASK 0x0001 +#define GEN6_MSG_TS_OPCODE__SHIFT 0 +#define GEN6_MSG_TS_OPCODE_DEREF 0x0 +#define GEN6_MSG_TS_OPCODE_SPAWN 0x1 #endif /* GEN_EU_MESSAGE_XML */ diff --git a/src/gallium/drivers/ilo/genhw/gen_regs.xml.h b/src/gallium/drivers/ilo/genhw/gen_regs.xml.h index 30ac04e..6086760 100644 --- a/src/gallium/drivers/ilo/genhw/gen_regs.xml.h +++ b/src/gallium/drivers/ilo/genhw/gen_regs.xml.h @@ -95,6 +95,48 @@ WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. #define GEN7_REG_SO_WRITE_OFFSET__ESIZE0x8 #define GEN7_REG_SO_WRITE_OFFSET__LEN 0x4 + +#define GEN7_REG_L3SQCREG1
Mesa (master): ilo: update genhw headers
Module: Mesa Branch: master Commit: b51b349942ffd22a12d578bee6ba5db60d88d1bd URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=b51b349942ffd22a12d578bee6ba5db60d88d1bd Author: Chia-I Wu Date: Wed Sep 10 10:16:48 2014 +0800 ilo: update genhw headers Add some new registers and some tweaks. The changes that affect ilo are GEN6_REG_HS_INVOCATION_COUNT -> GEN7_REG_HS_INVOCATION_COUNT GEN6_REG_DS_INVOCATION_COUNT -> GEN7_REG_DS_INVOCATION_COUNT GEN6_COND_NORMAL -> GEN6_COND_NONE --- src/gallium/drivers/ilo/genhw/gen_blitter.xml.h|2 +- src/gallium/drivers/ilo/genhw/gen_eu_isa.xml.h | 353 src/gallium/drivers/ilo/genhw/gen_eu_message.xml.h |1 + src/gallium/drivers/ilo/genhw/gen_regs.xml.h | 42 ++- src/gallium/drivers/ilo/genhw/gen_render_3d.xml.h | 24 +- .../drivers/ilo/genhw/gen_render_surface.xml.h |4 +- src/gallium/drivers/ilo/ilo_3d_pipeline_gen6.c |4 +- src/gallium/drivers/ilo/shader/toy_compiler.c |4 +- src/gallium/drivers/ilo/shader/toy_legalize.c |8 +- src/gallium/drivers/ilo/shader/toy_optimize.c |2 +- src/gallium/drivers/ilo/shader/toy_tgsi.c |6 +- 11 files changed, 203 insertions(+), 247 deletions(-) diff --git a/src/gallium/drivers/ilo/genhw/gen_blitter.xml.h b/src/gallium/drivers/ilo/genhw/gen_blitter.xml.h index 07e6475..94d3136 100644 --- a/src/gallium/drivers/ilo/genhw/gen_blitter.xml.h +++ b/src/gallium/drivers/ilo/genhw/gen_blitter.xml.h @@ -47,8 +47,8 @@ WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. #define GEN6_BLITTER_BR00_DST_TILED(0x1 << 11) #define GEN6_BLITTER_LENGTH__MASK 0x003f #define GEN6_BLITTER_LENGTH__SHIFT 0 -#define GEN6_BLITTER_BR13_CLIP_ENABLE (0x1 << 30) #define GEN6_BLITTER_BR13_DIR_RTL (0x1 << 30) +#define GEN6_BLITTER_BR13_CLIP_ENABLE (0x1 << 30) #define GEN6_BLITTER_BR13_FORMAT__MASK 0x0300 #define GEN6_BLITTER_BR13_FORMAT__SHIFT24 #define GEN6_BLITTER_BR13_FORMAT_8 (0x0 << 24) diff --git a/src/gallium/drivers/ilo/genhw/gen_eu_isa.xml.h b/src/gallium/drivers/ilo/genhw/gen_eu_isa.xml.h index e8b8597..5dcd917 100644 --- a/src/gallium/drivers/ilo/genhw/gen_eu_isa.xml.h +++ b/src/gallium/drivers/ilo/genhw/gen_eu_isa.xml.h @@ -139,7 +139,7 @@ WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. #define GEN6_EXECSIZE_80x3 #define GEN6_EXECSIZE_16 0x4 #define GEN6_EXECSIZE_32 0x5 -#define GEN6_COND_NORMAL 0x0 +#define GEN6_COND_NONE 0x0 #define GEN6_COND_Z0x1 #define GEN6_COND_NZ 0x2 #define GEN6_COND_G0x3 @@ -224,238 +224,153 @@ WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. #define GEN6_ARF_IP0xa0 #define GEN6_ARF_TDR 0xb0 #define GEN7_ARF_TM0 0xc0 +#define GEN6_INST_SATURATE (0x1 << 31) +#define GEN6_INST_DEBUGCTRL(0x1 << 30) +#define GEN6_INST_CMPTCTRL (0x1 << 29) +#define GEN6_INST_ACCWRCTRL(0x1 << 28) +#define GEN6_INST_CONDMODIFIER__MASK 0x0f00 +#define GEN6_INST_CONDMODIFIER__SHIFT 24 +#define GEN6_INST_SFID__MASK 0x0f00 +#define GEN6_INST_SFID__SHIFT 24 +#define GEN6_INST_FC__MASK 0x0f00 +#define GEN6_INST_FC__SHIFT24 +#define GEN6_INST_EXECSIZE__MASK 0x00e0 +#define GEN6_INST_EXECSIZE__SHIFT 21 +#define GEN6_INST_PREDINV (0x1 << 20) +#define GEN6_INST_PREDCTRL__MASK 0x000f +#define GEN6_INST_PREDCTRL__SHIFT 16 +#define GEN6_INST_THREADCTRL__MASK 0xc000 +#define GEN6_INST_THREADCTRL__SHIFT14 +#define GEN6_INST_QTRCTRL__MASK 0x3000 +#define GEN6_INST_QTRCTRL__SHIFT 12 +#define GEN6_INST_DEPCTRL__MASK 0x0c00 +#define GEN6_INST_DEPCTRL__SHIFT 10 +#define GE
