Mesa (vulkan): isl: Don' t filter tiling flags if a specific tiling bit is set

[Nanley Chery]

Module: Mesa
Branch: vulkan
Commit: 091f1da902c71ac8d3d27b325a118e2f683f1ae5
URL:    
http://cgit.freedesktop.org/mesa/mesa/commit/?id=091f1da902c71ac8d3d27b325a118e2f683f1ae5

Author: Nanley Chery <nanley.g.ch...@intel.com>
Date:   Tue Mar  1 17:32:14 2016 -0800

isl: Don't filter tiling flags if a specific tiling bit is set

If a specific bit is set, the intention to create a surface with a
specific tiling format should be respected.

Signed-off-by: Nanley Chery <nanley.g.ch...@intel.com>
Reviewed-by: Jason Ekstrand <jason.ekstr...@intel.com>

---

 src/intel/isl/isl.c | 13 ++++++++-----
 1 file changed, 8 insertions(+), 5 deletions(-)

diff --git a/src/intel/isl/isl.c b/src/intel/isl/isl.c
index 7fd9eea..a366380 100644
--- a/src/intel/isl/isl.c
+++ b/src/intel/isl/isl.c
@@ -184,11 +184,14 @@ isl_surf_choose_tiling(const struct isl_device *dev,
 {
    isl_tiling_flags_t tiling_flags = info->tiling_flags;
 
-   if (ISL_DEV_GEN(dev) >= 7) {
-      gen7_filter_tiling(dev, info, &tiling_flags);
-   } else {
-      isl_finishme("%s: gen%u", __func__, ISL_DEV_GEN(dev));
-      gen7_filter_tiling(dev, info, &tiling_flags);
+   /* Filter if multiple tiling options are given */
+   if (!isl_is_pow2(tiling_flags)) {
+      if (ISL_DEV_GEN(dev) >= 7) {
+         gen7_filter_tiling(dev, info, &tiling_flags);
+      } else {
+         isl_finishme("%s: gen%u", __func__, ISL_DEV_GEN(dev));
+         gen7_filter_tiling(dev, info, &tiling_flags);
+      }
    }
 
    #define CHOOSE(__tiling) \

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