Mesa (gallium-depth-clamp): softpipe: advertise depth clamp
Module: Mesa Branch: gallium-depth-clamp Commit: b709891fceea9181b799a754c1d6de0a1609fb65 URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=b709891fceea9181b799a754c1d6de0a1609fb65 Author: Marek Olšák mar...@gmail.com Date: Tue Jul 20 20:57:43 2010 +0200 softpipe: advertise depth clamp --- src/gallium/drivers/softpipe/sp_screen.c |2 ++ 1 files changed, 2 insertions(+), 0 deletions(-) diff --git a/src/gallium/drivers/softpipe/sp_screen.c b/src/gallium/drivers/softpipe/sp_screen.c index 93af6ee..01a7399 100644 --- a/src/gallium/drivers/softpipe/sp_screen.c +++ b/src/gallium/drivers/softpipe/sp_screen.c @@ -152,6 +152,8 @@ softpipe_get_param(struct pipe_screen *screen, enum pipe_cap param) case PIPE_CAP_GEOMETRY_SHADER4: return 1; + case PIPE_CAP_DEPTH_CLAMP: + return 1; default: return 0; } ___ mesa-commit mailing list mesa-commit@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-commit
Mesa (master): gallivm: rename a var to avoid compiler warnings
Module: Mesa
Branch: master
Commit: ec0e7b16bb6753bedbd611a97062934bfca03aa7
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=ec0e7b16bb6753bedbd611a97062934bfca03aa7
Author: Brian Paul bri...@vmware.com
Date: Wed Jul 21 08:08:12 2010 -0600
gallivm: rename a var to avoid compiler warnings
---
src/gallium/auxiliary/gallivm/lp_bld_tgsi_soa.c |4 ++--
1 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/src/gallium/auxiliary/gallivm/lp_bld_tgsi_soa.c
b/src/gallium/auxiliary/gallivm/lp_bld_tgsi_soa.c
index 3515d26..994bc53 100644
--- a/src/gallium/auxiliary/gallivm/lp_bld_tgsi_soa.c
+++ b/src/gallium/auxiliary/gallivm/lp_bld_tgsi_soa.c
@@ -463,10 +463,10 @@ static LLVMValueRef
emit_fetch(
struct lp_build_tgsi_soa_context *bld,
const struct tgsi_full_instruction *inst,
- unsigned index,
+ unsigned src_op,
const unsigned chan_index )
{
- const struct tgsi_full_src_register *reg = inst-Src[index];
+ const struct tgsi_full_src_register *reg = inst-Src[src_op];
const unsigned swizzle =
tgsi_util_get_full_src_register_swizzle(reg, chan_index);
LLVMValueRef res;
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Mesa (master): gallium: remove pointless bitfield restrction in pipe_vertex_element
Module: Mesa Branch: master Commit: d350695a6b86caaee6b2bd1d64b48a26159a8e95 URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=d350695a6b86caaee6b2bd1d64b48a26159a8e95 Author: Keith Whitwell kei...@vmware.com Date: Wed Jul 21 15:39:09 2010 +0100 gallium: remove pointless bitfield restrction in pipe_vertex_element This used to be a somewhat packed struct, but no longer. Remove the last remaining bitfield tag. --- src/gallium/include/pipe/p_state.h |2 +- 1 files changed, 1 insertions(+), 1 deletions(-) diff --git a/src/gallium/include/pipe/p_state.h b/src/gallium/include/pipe/p_state.h index 197b64e..44ffa26 100644 --- a/src/gallium/include/pipe/p_state.h +++ b/src/gallium/include/pipe/p_state.h @@ -419,7 +419,7 @@ struct pipe_vertex_element /** Which vertex_buffer (as given to pipe-set_vertex_buffer()) does * this attribute live in? */ - unsigned vertex_buffer_index:8; + unsigned vertex_buffer_index; enum pipe_format src_format; }; ___ mesa-commit mailing list mesa-commit@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-commit
Mesa (master): draw: whitespace clean-up
Module: Mesa
Branch: master
Commit: 6921a6dd4ed2df2e4b635b329f66b1664a092923
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=6921a6dd4ed2df2e4b635b329f66b1664a092923
Author: Brian Paul bri...@vmware.com
Date: Wed Jul 21 08:13:02 2010 -0600
draw: whitespace clean-up
---
src/gallium/auxiliary/draw/draw_pt_vcache.c | 66 +-
1 files changed, 33 insertions(+), 33 deletions(-)
diff --git a/src/gallium/auxiliary/draw/draw_pt_vcache.c
b/src/gallium/auxiliary/draw/draw_pt_vcache.c
index e9b2a3a..8ef94c3 100644
--- a/src/gallium/auxiliary/draw/draw_pt_vcache.c
+++ b/src/gallium/auxiliary/draw/draw_pt_vcache.c
@@ -41,6 +41,7 @@
#define FETCH_MAX 256
#define DRAW_MAX (16*1024)
+
struct vcache_frontend {
struct draw_pt_front_end base;
struct draw_context *draw;
@@ -64,6 +65,7 @@ struct vcache_frontend {
unsigned opt;
};
+
static INLINE void
vcache_flush( struct vcache_frontend *vcache )
{
@@ -88,12 +90,12 @@ vcache_flush( struct vcache_frontend *vcache )
vcache-draw_count = 0;
}
+
static INLINE void
vcache_check_flush( struct vcache_frontend *vcache )
{
- if ( vcache-draw_count + 6 = DRAW_MAX ||
-vcache-fetch_count + 4 = FETCH_MAX )
- {
+ if (vcache-draw_count + 6 = DRAW_MAX ||
+ vcache-fetch_count + 4 = FETCH_MAX) {
vcache_flush( vcache );
}
}
@@ -145,6 +147,7 @@ vcache_triangle_flags( struct vcache_frontend *vcache,
vcache_check_flush(vcache);
}
+
static INLINE void
vcache_line( struct vcache_frontend *vcache,
unsigned i0,
@@ -176,6 +179,7 @@ vcache_point( struct vcache_frontend *vcache,
vcache_check_flush(vcache);
}
+
static INLINE void
vcache_quad( struct vcache_frontend *vcache,
unsigned i0,
@@ -195,6 +199,7 @@ vcache_quad( struct vcache_frontend *vcache,
}
}
+
static INLINE void
vcache_ef_quad( struct vcache_frontend *vcache,
unsigned i0,
@@ -230,6 +235,7 @@ vcache_ef_quad( struct vcache_frontend *vcache,
}
}
+
/* At least for now, we're back to using a template include file for
* this. The two paths aren't too different though - it may be
* possible to reunify them.
@@ -255,23 +261,23 @@ rebase_uint_elts( const unsigned *src,
ushort *dest )
{
unsigned i;
-
for (i = 0; i count; i++)
dest[i] = (ushort)(src[i] + delta);
}
+
static INLINE void
rebase_ushort_elts( const ushort *src,
unsigned count,
int delta,
-ushort *dest )
+ushort *dest )
{
unsigned i;
-
for (i = 0; i count; i++)
dest[i] = (ushort)(src[i] + delta);
}
+
static INLINE void
rebase_ubyte_elts( const ubyte *src,
unsigned count,
@@ -279,42 +285,39 @@ rebase_ubyte_elts( const ubyte *src,
ushort *dest )
{
unsigned i;
-
for (i = 0; i count; i++)
dest[i] = (ushort)(src[i] + delta);
}
-
static INLINE void
translate_uint_elts( const unsigned *src,
unsigned count,
ushort *dest )
{
unsigned i;
-
for (i = 0; i count; i++)
dest[i] = (ushort)(src[i]);
}
+
static INLINE void
translate_ushort_elts( const ushort *src,
unsigned count,
ushort *dest )
{
unsigned i;
-
for (i = 0; i count; i++)
dest[i] = (ushort)(src[i]);
}
+
static INLINE void
translate_ubyte_elts( const ubyte *src,
unsigned count,
ushort *dest )
{
unsigned i;
-
for (i = 0; i count; i++)
dest[i] = (ushort)(src[i]);
}
@@ -335,6 +338,7 @@ format_from_get_elt( pt_elt_func get_elt )
}
#endif
+
static INLINE void
vcache_check_run( struct draw_pt_front_end *frontend,
pt_elt_func get_elt,
@@ -400,17 +404,14 @@ vcache_check_run( struct draw_pt_front_end *frontend,
vcache-fetch_max );
}
-
assert((elt_bias = 0 min_index + elt_bias = min_index) ||
(elt_bias 0 min_index + elt_bias min_index));
if (min_index == 0
- index_size == 2)
- {
+ index_size == 2) {
transformed_elts = (const ushort *)elts;
}
- else
- {
+ else {
storage = MALLOC( draw_count * sizeof(ushort) );
if (!storage)
goto fail;
@@ -445,23 +446,23 @@ vcache_check_run( struct draw_pt_front_end *frontend,
switch(index_size) {
case 1:
rebase_ubyte_elts( (const ubyte *)elts,
- draw_count,
- 0 - (int)min_index,
- storage );
+ draw_count,
+ 0 - (int)min_index,
+ storage );
break;
case 2:
rebase_ushort_elts( (const ushort *)elts,
-
Mesa (master): gallivm: added comment
Module: Mesa
Branch: master
Commit: 890976e02d9b75c0814493901ffddb64092ea548
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=890976e02d9b75c0814493901ffddb64092ea548
Author: Brian Paul bri...@vmware.com
Date: Wed Jul 21 09:17:47 2010 -0600
gallivm: added comment
---
src/gallium/auxiliary/gallivm/lp_bld_tgsi_soa.c |6 ++
1 files changed, 6 insertions(+), 0 deletions(-)
diff --git a/src/gallium/auxiliary/gallivm/lp_bld_tgsi_soa.c
b/src/gallium/auxiliary/gallivm/lp_bld_tgsi_soa.c
index 670c974..05f6352 100644
--- a/src/gallium/auxiliary/gallivm/lp_bld_tgsi_soa.c
+++ b/src/gallium/auxiliary/gallivm/lp_bld_tgsi_soa.c
@@ -481,6 +481,12 @@ emit_fetch(
}
if (reg-Register.Indirect) {
+ /*
+ * Compute addr_vec: a vector of offsets into the register file
+ * from which we need to gather elements. Recall that the ADDR
+ * register's elements can all be different.
+ */
+
LLVMTypeRef int_vec_type = lp_build_int_vec_type(bld-base.type);
unsigned swizzle = tgsi_util_get_src_register_swizzle( reg-Indirect,
chan_index );
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Mesa (master): gallivm: remove extraneous braces
Module: Mesa
Branch: master
Commit: be22e1e781094decfb408ad6d74e3d833b297c87
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=be22e1e781094decfb408ad6d74e3d833b297c87
Author: Brian Paul bri...@vmware.com
Date: Wed Jul 21 09:16:02 2010 -0600
gallivm: remove extraneous braces
---
src/gallium/auxiliary/gallivm/lp_bld_tgsi_soa.c | 38 +++
1 files changed, 18 insertions(+), 20 deletions(-)
diff --git a/src/gallium/auxiliary/gallivm/lp_bld_tgsi_soa.c
b/src/gallium/auxiliary/gallivm/lp_bld_tgsi_soa.c
index de36102..670c974 100644
--- a/src/gallium/auxiliary/gallivm/lp_bld_tgsi_soa.c
+++ b/src/gallium/auxiliary/gallivm/lp_bld_tgsi_soa.c
@@ -502,32 +502,30 @@ emit_fetch(
switch (reg-Register.File) {
case TGSI_FILE_CONSTANT:
- {
- if (reg-Register.Indirect) {
-LLVMValueRef index_vec; /* index into the const buffer */
+ if (reg-Register.Indirect) {
+ LLVMValueRef index_vec; /* index into the const buffer */
-/* index_vec = broadcast(reg-Register.Index * 4 + swizzle) */
-index_vec = lp_build_const_int_vec(bld-int_bld.type,
- reg-Register.Index * 4 + swizzle);
+ /* index_vec = broadcast(reg-Register.Index * 4 + swizzle) */
+ index_vec = lp_build_const_int_vec(bld-int_bld.type,
+reg-Register.Index * 4 + swizzle);
-/* index_vec = index_vec + addr_vec */
-index_vec = lp_build_add(bld-base, index_vec, addr_vec);
+ /* index_vec = index_vec + addr_vec */
+ index_vec = lp_build_add(bld-base, index_vec, addr_vec);
-/* Gather values from the constant buffer */
-res = build_gather(bld, bld-consts_ptr, index_vec);
- }
- else {
-LLVMValueRef index; /* index into the const buffer */
-LLVMValueRef scalar, scalar_ptr;
+ /* Gather values from the constant buffer */
+ res = build_gather(bld, bld-consts_ptr, index_vec);
+ }
+ else {
+ LLVMValueRef index; /* index into the const buffer */
+ LLVMValueRef scalar, scalar_ptr;
-index = lp_build_const_int32(reg-Register.Index*4 + swizzle);
+ index = lp_build_const_int32(reg-Register.Index*4 + swizzle);
-scalar_ptr = LLVMBuildGEP(bld-base.builder, bld-consts_ptr,
- index, 1, );
-scalar = LLVMBuildLoad(bld-base.builder, scalar_ptr, );
+ scalar_ptr = LLVMBuildGEP(bld-base.builder, bld-consts_ptr,
+ index, 1, );
+ scalar = LLVMBuildLoad(bld-base.builder, scalar_ptr, );
-res = lp_build_broadcast_scalar(bld-base, scalar);
- }
+ res = lp_build_broadcast_scalar(bld-base, scalar);
}
break;
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Mesa (master): gallivm: refactor code into get_indirect_offsets() function
Module: Mesa
Branch: master
Commit: 0115f07507fc661a0a19564c496a781c3dcbc7a0
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=0115f07507fc661a0a19564c496a781c3dcbc7a0
Author: Brian Paul bri...@vmware.com
Date: Wed Jul 21 09:42:11 2010 -0600
gallivm: refactor code into get_indirect_offsets() function
---
src/gallium/auxiliary/gallivm/lp_bld_tgsi_soa.c | 57 +-
1 files changed, 34 insertions(+), 23 deletions(-)
diff --git a/src/gallium/auxiliary/gallivm/lp_bld_tgsi_soa.c
b/src/gallium/auxiliary/gallivm/lp_bld_tgsi_soa.c
index 05f6352..e0c3956 100644
--- a/src/gallium/auxiliary/gallivm/lp_bld_tgsi_soa.c
+++ b/src/gallium/auxiliary/gallivm/lp_bld_tgsi_soa.c
@@ -460,6 +460,38 @@ build_gather(struct lp_build_tgsi_soa_context *bld,
/**
+ * Read the current value of the ADDR register, convert the floats to
+ * ints, multiply by four and return the vector of offsets.
+ * The offsets will be used to index into the constant buffer or
+ * temporary register file.
+ */
+static LLVMValueRef
+get_indirect_offsets(struct lp_build_tgsi_soa_context *bld,
+ const struct tgsi_src_register *indirect_reg)
+{
+ /* always use X component of address register */
+ const int x = indirect_reg-SwizzleX;
+ LLVMTypeRef int_vec_type = lp_build_int_vec_type(bld-base.type);
+ uint swizzle = tgsi_util_get_src_register_swizzle(indirect_reg, x);
+ LLVMValueRef vec4 = lp_build_const_int_vec(bld-int_bld.type, 4);
+ LLVMValueRef addr_vec;
+
+ addr_vec = LLVMBuildLoad(bld-base.builder,
+bld-addr[indirect_reg-Index][swizzle],
+load addr reg);
+
+ /* for indexing we want integers */
+ addr_vec = LLVMBuildFPToSI(bld-base.builder, addr_vec,
+ int_vec_type, );
+
+ /* addr_vec = addr_vec * 4 */
+ addr_vec = lp_build_mul(bld-base, addr_vec, vec4);
+
+ return addr_vec;
+}
+
+
+/**
* Register fetch.
*/
static LLVMValueRef
@@ -481,29 +513,7 @@ emit_fetch(
}
if (reg-Register.Indirect) {
- /*
- * Compute addr_vec: a vector of offsets into the register file
- * from which we need to gather elements. Recall that the ADDR
- * register's elements can all be different.
- */
-
- LLVMTypeRef int_vec_type = lp_build_int_vec_type(bld-base.type);
- unsigned swizzle = tgsi_util_get_src_register_swizzle( reg-Indirect,
chan_index );
-
- LLVMValueRef vec4 = lp_build_const_int_vec(bld-int_bld.type, 4);
-
- assert(bld-has_indirect_addressing);
-
- addr_vec = LLVMBuildLoad(bld-base.builder,
- bld-addr[reg-Indirect.Index][swizzle],
- load addr);
-
- /* for indexing we want integers */
- addr_vec = LLVMBuildFPToSI(bld-base.builder, addr_vec,
- int_vec_type, );
-
- /* addr_vec = addr_vec * 4 */
- addr_vec = lp_build_mul(bld-base, addr_vec, vec4);
+ addr_vec = get_indirect_offsets(bld, reg-Indirect);
}
switch (reg-Register.File) {
@@ -741,6 +751,7 @@ emit_store(
}
if (reg-Register.Indirect) {
+ /* XXX use get_indirect_offsets() here eventually */
LLVMTypeRef int_vec_type = lp_build_int_vec_type(bld-base.type);
unsigned swizzle = tgsi_util_get_src_register_swizzle( reg-Indirect,
chan_index );
addr = LLVMBuildLoad(bld-base.builder,
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Mesa (master): tgsi: added tgsi_shader_info::indirect_files field
Module: Mesa
Branch: master
Commit: 85206e56a1c3400be47229d4a8c6a1cd7a2f476e
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=85206e56a1c3400be47229d4a8c6a1cd7a2f476e
Author: Brian Paul bri...@vmware.com
Date: Wed Jul 21 09:51:11 2010 -0600
tgsi: added tgsi_shader_info::indirect_files field
Indicates which register files are accessed with indirect addressing.
---
src/gallium/auxiliary/tgsi/tgsi_scan.c | 13 +
src/gallium/auxiliary/tgsi/tgsi_scan.h |6 ++
2 files changed, 19 insertions(+), 0 deletions(-)
diff --git a/src/gallium/auxiliary/tgsi/tgsi_scan.c
b/src/gallium/auxiliary/tgsi/tgsi_scan.c
index ced9c94..90198a4 100644
--- a/src/gallium/auxiliary/tgsi/tgsi_scan.c
+++ b/src/gallium/auxiliary/tgsi/tgsi_scan.c
@@ -109,6 +109,19 @@ tgsi_scan_shader(const struct tgsi_token *tokens,
info-input_usage_mask[ind] |= usage_mask;
}
}
+
+ /* check for indirect register reads */
+ if (src-Register.Indirect) {
+ info-indirect_files |= (1 src-Register.File);
+ }
+}
+
+/* check for indirect register writes */
+for (i = 0; i fullinst-Instruction.NumDstRegs; i++) {
+ const struct tgsi_full_dst_register *dst = fullinst-Dst[i];
+ if (dst-Register.Indirect) {
+ info-indirect_files |= (1 dst-Register.File);
+ }
}
info-num_instructions++;
diff --git a/src/gallium/auxiliary/tgsi/tgsi_scan.h
b/src/gallium/auxiliary/tgsi/tgsi_scan.h
index e752803..f8aa90c 100644
--- a/src/gallium/auxiliary/tgsi/tgsi_scan.h
+++ b/src/gallium/auxiliary/tgsi/tgsi_scan.h
@@ -63,6 +63,12 @@ struct tgsi_shader_info
boolean writes_edgeflag; /** vertex shader outputs edgeflag */
boolean uses_kill; /** KIL or KILP instruction used? */
+ /**
+* Bitmask indicating which register files are accessed with
+* indirect addressing. The bits are (1 TGSI_FILE_x), etc.
+*/
+ unsigned indirect_files;
+
struct {
unsigned name;
unsigned data[8];
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Mesa (master): gallivm: replace has_indirect_addressing field with indirect_files field
Module: Mesa
Branch: master
Commit: 3662afd87d61e3f65843b210a7e8c9c8a6cb27f0
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=3662afd87d61e3f65843b210a7e8c9c8a6cb27f0
Author: Brian Paul bri...@vmware.com
Date: Wed Jul 21 09:59:23 2010 -0600
gallivm: replace has_indirect_addressing field with indirect_files field
Instead of one big boolean indicating indirect addressing, use a
bitfield indicating which register files are accessed with indirect
addressing.
Most shaders that use indirect addressing only use it to access the
constant buffer. So no need to use an array for temporary registers
in this case.
---
src/gallium/auxiliary/gallivm/lp_bld_tgsi_soa.c | 25 +++---
1 files changed, 17 insertions(+), 8 deletions(-)
diff --git a/src/gallium/auxiliary/gallivm/lp_bld_tgsi_soa.c
b/src/gallium/auxiliary/gallivm/lp_bld_tgsi_soa.c
index e0c3956..2123683 100644
--- a/src/gallium/auxiliary/gallivm/lp_bld_tgsi_soa.c
+++ b/src/gallium/auxiliary/gallivm/lp_bld_tgsi_soa.c
@@ -133,10 +133,14 @@ struct lp_build_tgsi_soa_context
LLVMValueRef addr[LP_MAX_TGSI_ADDRS][NUM_CHANNELS];
LLVMValueRef preds[LP_MAX_TGSI_PREDS][NUM_CHANNELS];
- /* we allocate an array of temps if we have indirect
-* addressing and then the temps above is unused */
+ /* We allocate/use this array of temps if (1 TGSI_FILE_TEMPORARY) is
+* set in the indirect_files field.
+* The temps[] array above is unused then.
+*/
LLVMValueRef temps_array;
- boolean has_indirect_addressing;
+
+ /** bitmask indicating which register files are accessed indirectly */
+ unsigned indirect_files;
struct lp_build_mask_context *mask;
struct lp_exec_mask exec_mask;
@@ -418,7 +422,7 @@ get_temp_ptr(struct lp_build_tgsi_soa_context *bld,
unsigned chan)
{
assert(chan 4);
- if (bld-has_indirect_addressing) {
+ if (bld-indirect_files (1 TGSI_FILE_TEMPORARY)) {
LLVMValueRef lindex = lp_build_const_int32(index * 4 + chan);
return LLVMBuildGEP(bld-base.builder, bld-temps_array, lindex, 1, );
}
@@ -513,6 +517,7 @@ emit_fetch(
}
if (reg-Register.Indirect) {
+ assert(bld-indirect_files);
addr_vec = get_indirect_offsets(bld, reg-Indirect);
}
@@ -521,6 +526,8 @@ emit_fetch(
if (reg-Register.Indirect) {
LLVMValueRef index_vec; /* index into the const buffer */
+ assert(bld-indirect_files (1 TGSI_FILE_CONSTANT));
+
/* index_vec = broadcast(reg-Register.Index * 4 + swizzle) */
index_vec = lp_build_const_int_vec(bld-int_bld.type,
reg-Register.Index * 4 + swizzle);
@@ -563,7 +570,7 @@ emit_fetch(
LLVMValueRef temps_array;
LLVMTypeRef float4_ptr_type;
- assert(bld-has_indirect_addressing);
+ assert(bld-indirect_files (1 TGSI_FILE_TEMPORARY));
/* index_vec = broadcast(reg-Register.Index * 4 + swizzle) */
index_vec = lp_build_const_int_vec(bld-int_bld.type,
@@ -754,6 +761,9 @@ emit_store(
/* XXX use get_indirect_offsets() here eventually */
LLVMTypeRef int_vec_type = lp_build_int_vec_type(bld-base.type);
unsigned swizzle = tgsi_util_get_src_register_swizzle( reg-Indirect,
chan_index );
+
+ assert(bld-indirect_files);
+
addr = LLVMBuildLoad(bld-base.builder,
bld-addr[reg-Indirect.Index][swizzle],
);
@@ -1001,7 +1011,7 @@ emit_declaration(
switch (decl-Declaration.File) {
case TGSI_FILE_TEMPORARY:
assert(idx LP_MAX_TGSI_TEMPS);
- if (bld-has_indirect_addressing) {
+ if (bld-indirect_files (1 TGSI_FILE_TEMPORARY)) {
LLVMValueRef array_size = LLVMConstInt(LLVMInt32Type(),
last*4 + 4, 0);
bld-temps_array = lp_build_array_alloca(bld-base.builder,
@@ -2025,8 +2035,7 @@ lp_build_tgsi_soa(LLVMBuilderRef builder,
bld.outputs = outputs;
bld.consts_ptr = consts_ptr;
bld.sampler = sampler;
- bld.has_indirect_addressing = info-opcode_count[TGSI_OPCODE_ARR] 0 ||
- info-opcode_count[TGSI_OPCODE_ARL] 0;
+ bld.indirect_files = info-indirect_files;
bld.instructions = (struct tgsi_full_instruction *)
MALLOC( LP_MAX_INSTRUCTIONS * sizeof(struct
tgsi_full_instruction) );
bld.max_instructions = LP_MAX_INSTRUCTIONS;
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Mesa (master): nouveau/nvfx: Add new PIPE_CAP values
Module: Mesa Branch: master Commit: c052213fb30214c9ca2575ce4425e5bd64a0e16c URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=c052213fb30214c9ca2575ce4425e5bd64a0e16c Author: Patrice Mandin patman...@gmail.com Date: Wed Jul 21 19:28:45 2010 +0200 nouveau/nvfx: Add new PIPE_CAP values Signed-off-by: Patrice Mandin patman...@gmail.com --- src/gallium/drivers/nvfx/nvfx_screen.c |4 1 files changed, 4 insertions(+), 0 deletions(-) diff --git a/src/gallium/drivers/nvfx/nvfx_screen.c b/src/gallium/drivers/nvfx/nvfx_screen.c index a78d241..80db28a 100644 --- a/src/gallium/drivers/nvfx/nvfx_screen.c +++ b/src/gallium/drivers/nvfx/nvfx_screen.c @@ -56,6 +56,8 @@ nvfx_screen_get_param(struct pipe_screen *pscreen, enum pipe_cap param) return 0; case PIPE_CAP_TEXTURE_SHADOW_MAP: return 1; + case PIPE_CAP_TEXTURE_SWIZZLE: + return 1; case PIPE_CAP_MAX_TEXTURE_2D_LEVELS: return 13; case PIPE_CAP_MAX_TEXTURE_3D_LEVELS: @@ -127,6 +129,8 @@ nvfx_screen_get_param(struct pipe_screen *pscreen, enum pipe_cap param) return 2; case PIPE_CAP_MAX_VS_PREDS: return screen-is_nv4x ? 1 : 0; + case PIPE_CAP_GEOMETRY_SHADER4: + return 0; default: NOUVEAU_ERR(Unknown PIPE_CAP %d\n, param); return 0; ___ mesa-commit mailing list mesa-commit@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-commit
Mesa (master): draw: tweak aa line width threshold and sampling
Module: Mesa
Branch: master
Commit: aa9003e20e91213bb97269bcd35961f0c2e9791b
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=aa9003e20e91213bb97269bcd35961f0c2e9791b
Author: Brian Paul bri...@vmware.com
Date: Wed Jul 21 11:37:13 2010 -0600
draw: tweak aa line width threshold and sampling
Set sampler max_lod to avoid sampling the 1x1 and 2x2 mipmap levels.
Fixes piglit line-aa-width test, fd.o bug 29160.
---
src/gallium/auxiliary/draw/draw_pipe_aaline.c | 10 ++
1 files changed, 6 insertions(+), 4 deletions(-)
diff --git a/src/gallium/auxiliary/draw/draw_pipe_aaline.c
b/src/gallium/auxiliary/draw/draw_pipe_aaline.c
index debd17f..c0135f5 100644
--- a/src/gallium/auxiliary/draw/draw_pipe_aaline.c
+++ b/src/gallium/auxiliary/draw/draw_pipe_aaline.c
@@ -425,7 +425,8 @@ aaline_create_texture(struct aaline_stage *aaline)
/* Fill in mipmap images.
* Basically each level is solid opaque, except for the outermost
-* texels which are zero. Special case the 1x1 and 2x2 levels.
+* texels which are zero. Special case the 1x1 and 2x2 levels
+* (though, those levels shouldn't be used - see the max_lod setting).
*/
for (level = 0; level = MAX_TEXTURE_LEVEL; level++) {
struct pipe_transfer *transfer;
@@ -497,7 +498,8 @@ aaline_create_sampler(struct aaline_stage *aaline)
sampler.mag_img_filter = PIPE_TEX_FILTER_LINEAR;
sampler.normalized_coords = 1;
sampler.min_lod = 0.0f;
- sampler.max_lod = MAX_TEXTURE_LEVEL;
+ /* avoid using the 1x1 and 2x2 mipmap levels */
+ sampler.max_lod = MAX_TEXTURE_LEVEL - 2;
aaline-sampler_cso = pipe-create_sampler_state(pipe, sampler);
if (aaline-sampler_cso == NULL)
@@ -669,8 +671,8 @@ aaline_first_line(struct draw_stage *stage, struct
prim_header *header)
assert(draw-rasterizer-line_smooth);
- if (draw-rasterizer-line_width = 3.0)
- aaline-half_line_width = 1.5f;
+ if (draw-rasterizer-line_width = 2.2)
+ aaline-half_line_width = 1.1f;
else
aaline-half_line_width = 0.5f * draw-rasterizer-line_width;
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Mesa (glsl2): glsl: Correctly handle unary plus operator.
Module: Mesa Branch: glsl2 Commit: c24bcad9f88379ffba9e2f0ff92f22cdf60c2927 URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=c24bcad9f88379ffba9e2f0ff92f22cdf60c2927 Author: Carl Worth cwo...@cworth.org Date: Wed Jul 21 11:23:51 2010 -0700 glsl: Correctly handle unary plus operator. Previously, any occurence of the unary plus operator would trigger a bogus type mismatch error. Fix this by making the ast_plus case look more like the ast_neg case as far as type-checking is concerned. With this change the shaders/CorrectPreprocess8.frag test in piglit now passes. --- src/glsl/ast_to_hir.cpp |6 +++--- 1 files changed, 3 insertions(+), 3 deletions(-) diff --git a/src/glsl/ast_to_hir.cpp b/src/glsl/ast_to_hir.cpp index 5cadcd1..e9257ee 100644 --- a/src/glsl/ast_to_hir.cpp +++ b/src/glsl/ast_to_hir.cpp @@ -660,9 +660,9 @@ ast_expression::hir(exec_list *instructions, case ast_plus: op[0] = this-subexpressions[0]-hir(instructions, state); - error_emitted = op[0]-type-is_error(); - if (type-is_error()) -op[0]-type = type; + type = unary_arithmetic_result_type(op[0]-type, state, loc); + + error_emitted = type-is_error(); result = op[0]; break; ___ mesa-commit mailing list mesa-commit@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-commit
Mesa (master): Avoid more warnings in flex-generated code.
Module: Mesa
Branch: master
Commit: b4a08a0d87908b024a3d2595073b1beb6eda161e
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=b4a08a0d87908b024a3d2595073b1beb6eda161e
Author: Carl Worth cwo...@cworth.org
Date: Wed Jul 21 13:11:46 2010 -0700
Avoid more warnings in flex-generated code.
This avoids two function defined but not used warnings. For the yyinput
function we define YY_NO_INPUT which tells flex to simply not generate this
function.
For unput, we add a call to this function, but inside a while(0) so
that it will quiet the warning without actually changing any
functionality.
---
src/mesa/program/program_lexer.l |7 +++
1 files changed, 7 insertions(+), 0 deletions(-)
diff --git a/src/mesa/program/program_lexer.l b/src/mesa/program/program_lexer.l
index a912517..0a50dab 100644
--- a/src/mesa/program/program_lexer.l
+++ b/src/mesa/program/program_lexer.l
@@ -139,6 +139,13 @@ handle_ident(struct asm_parser_state *state, const char
*text, YYSTYPE *lval)
}
\
} while(0);
+#define YY_NO_INPUT
+
+/* Yes, this is intentionally doing nothing. We have this line of code
+here only to avoid the compiler complaining about an unput function
+that is defined, but never called. */
+#define YY_USER_INIT while (0) { unput(0); }
+
#define YY_EXTRA_TYPE struct asm_parser_state *
/* Flex defines a couple of functions with no declarations nor the
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Mesa (master): Avoid warnings in flex-generated code.
Module: Mesa Branch: master Commit: 3c716a7ec2cabfc18a2506f9db655406f8c64fb0 URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=3c716a7ec2cabfc18a2506f9db655406f8c64fb0 Author: Carl Worth cwo...@cworth.org Date: Wed Jul 21 12:49:01 2010 -0700 Avoid warnings in flex-generated code. Add declarations for two functions generated in the flex ouput. It would be nicer if flex simply declared these generated functions as static, but for now we can at least avoid the warning this way. --- src/mesa/program/program_lexer.l |6 ++ 1 files changed, 6 insertions(+), 0 deletions(-) diff --git a/src/mesa/program/program_lexer.l b/src/mesa/program/program_lexer.l index 5730c6d..a912517 100644 --- a/src/mesa/program/program_lexer.l +++ b/src/mesa/program/program_lexer.l @@ -140,6 +140,12 @@ handle_ident(struct asm_parser_state *state, const char *text, YYSTYPE *lval) } while(0); #define YY_EXTRA_TYPE struct asm_parser_state * + +/* Flex defines a couple of functions with no declarations nor the +static keyword. Declare them here to avoid a compiler warning. */ +int yyget_column (yyscan_t yyscanner); +void yyset_column (int column_no , yyscan_t yyscanner); + %} num[0-9]+ ___ mesa-commit mailing list mesa-commit@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-commit
Mesa (master): dri2: Remove an unused variable.
Module: Mesa
Branch: master
Commit: c0ca2bfb2ad8cf7fb9d756b5ae52cb77236ff605
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=c0ca2bfb2ad8cf7fb9d756b5ae52cb77236ff605
Author: Carl Worth cwo...@cworth.org
Date: Wed Jul 21 13:17:05 2010 -0700
dri2: Remove an unused variable.
To quiet a compiler warning.
---
src/glx/dri2.c |1 -
1 files changed, 0 insertions(+), 1 deletions(-)
diff --git a/src/glx/dri2.c b/src/glx/dri2.c
index ab530ba..6b8b2b9 100644
--- a/src/glx/dri2.c
+++ b/src/glx/dri2.c
@@ -88,7 +88,6 @@ static Bool
DRI2WireToEvent(Display *dpy, XEvent *event, xEvent *wire)
{
XExtDisplayInfo *info = DRI2FindDisplay(dpy);
- XExtDisplayInfo *glx_info = __glXFindDisplay(dpy);
XextCheckExtension(dpy, info, dri2ExtensionName, False);
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Mesa (master): Regenerate program/lex.yy.c
Module: Mesa
Branch: master
Commit: 349fa9ced7aa9f25a619aad3d90a5b4dcdf71df1
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=349fa9ced7aa9f25a619aad3d90a5b4dcdf71df1
Author: Carl Worth cwo...@cworth.org
Date: Wed Jul 21 13:13:46 2010 -0700
Regenerate program/lex.yy.c
Based on the two recent changes to program_lexer.l.
---
src/mesa/program/lex.yy.c | 385 -
1 files changed, 206 insertions(+), 179 deletions(-)
diff --git a/src/mesa/program/lex.yy.c b/src/mesa/program/lex.yy.c
index 5b3cae7..135eca6 100644
--- a/src/mesa/program/lex.yy.c
+++ b/src/mesa/program/lex.yy.c
@@ -53,7 +53,6 @@ typedef int flex_int32_t;
typedef unsigned char flex_uint8_t;
typedef unsigned short int flex_uint16_t;
typedef unsigned int flex_uint32_t;
-#endif /* ! C99 */
/* Limits of integral types. */
#ifndef INT8_MIN
@@ -84,6 +83,8 @@ typedef unsigned int flex_uint32_t;
#define UINT32_MAX (4294967295U)
#endif
+#endif /* ! C99 */
+
#endif /* ! FLEXINT_H */
#ifdef __cplusplus
@@ -157,7 +158,15 @@ typedef void* yyscan_t;
/* Size of default input buffer. */
#ifndef YY_BUF_SIZE
+#ifdef __ia64__
+/* On IA-64, the buffer size is 16k, not 8k.
+ * Moreover, YY_BUF_SIZE is 2*YY_READ_BUF_SIZE in the general case.
+ * Ditto for the __ia64__ case accordingly.
+ */
+#define YY_BUF_SIZE 32768
+#else
#define YY_BUF_SIZE 16384
+#endif /* __ia64__ */
#endif
/* The state buf must be large enough to hold one state per character in the
main buffer.
@@ -1150,8 +1159,21 @@ handle_ident(struct asm_parser_state *state, const char
*text, YYSTYPE *lval)
}
\
} while(0);
+#define YY_NO_INPUT
+
+/* Yes, this is intentionally doing nothing. We have this line of code
+here only to avoid the compiler complaining about an unput function
+that is defined, but never called. */
+#define YY_USER_INIT while (0) { unput(0); }
+
#define YY_EXTRA_TYPE struct asm_parser_state *
-#line 1155 lex.yy.c
+
+/* Flex defines a couple of functions with no declarations nor the
+static keyword. Declare them here to avoid a compiler warning. */
+int yyget_column (yyscan_t yyscanner);
+void yyset_column (int column_no , yyscan_t yyscanner);
+
+#line 1177 lex.yy.c
#define INITIAL 0
@@ -1288,7 +1310,12 @@ static int input (yyscan_t yyscanner );
/* Amount of stuff to slurp up with each read. */
#ifndef YY_READ_BUF_SIZE
+#ifdef __ia64__
+/* On IA-64, the buffer size is 16k, not 8k */
+#define YY_READ_BUF_SIZE 16384
+#else
#define YY_READ_BUF_SIZE 8192
+#endif /* __ia64__ */
#endif
/* Copy whatever the last rule matched to the standard output. */
@@ -1307,7 +1334,7 @@ static int input (yyscan_t yyscanner );
if ( YY_CURRENT_BUFFER_LVALUE-yy_is_interactive ) \
{ \
int c = '*'; \
- unsigned n; \
+ size_t n; \
for ( n = 0; n max_size \
(c = getc( yyin )) != EOF c != '\n'; ++n ) \
buf[n] = (char) c; \
@@ -1392,10 +1419,10 @@ YY_DECL
register int yy_act;
struct yyguts_t * yyg = (struct yyguts_t*)yyscanner;
-#line 156 program_lexer.l
+#line 169 program_lexer.l
-#line 1399 lex.yy.c
+#line 1426 lex.yy.c
yylval = yylval_param;
@@ -1484,17 +1511,17 @@ do_action: /* This label is used only to access
EOF actions. */
case 1:
YY_RULE_SETUP
-#line 158 program_lexer.l
+#line 171 program_lexer.l
{ return ARBvp_10; }
YY_BREAK
case 2:
YY_RULE_SETUP
-#line 159 program_lexer.l
+#line 172 program_lexer.l
{ return ARBfp_10; }
YY_BREAK
case 3:
YY_RULE_SETUP
-#line 160 program_lexer.l
+#line 173 program_lexer.l
{
yylval-integer = at_address;
return_token_or_IDENTIFIER(require_ARB_vp, ADDRESS);
@@ -1502,692 +1529,692 @@ YY_RULE_SETUP
YY_BREAK
case 4:
YY_RULE_SETUP
-#line 164 program_lexer.l
+#line 177 program_lexer.l
{ return ALIAS; }
YY_BREAK
case 5:
YY_RULE_SETUP
-#line 165 program_lexer.l
+#line 178 program_lexer.l
{ return ATTRIB; }
YY_BREAK
case 6:
YY_RULE_SETUP
-#line 166 program_lexer.l
+#line 179 program_lexer.l
{ return END; }
YY_BREAK
case 7:
YY_RULE_SETUP
-#line 167 program_lexer.l
+#line 180 program_lexer.l
{ return OPTION; }
YY_BREAK
case 8:
YY_RULE_SETUP
-#line 168 program_lexer.l
+#line 181 program_lexer.l
{ return OUTPUT; }
YY_BREAK
case 9:
YY_RULE_SETUP
-#line 169 program_lexer.l
+#line 182 program_lexer.l
{ return PARAM; }
YY_BREAK
case 10:
YY_RULE_SETUP
-#line 170 program_lexer.l
+#line 183 program_lexer.l
{ yylval-integer = at_temp; return TEMP; }
YY_BREAK
case 11:
YY_RULE_SETUP
-#line 172 program_lexer.l
+#line 185 program_lexer.l
{ return_opcode( 1, VECTOR_OP, ABS, 3); }
YY_BREAK
case 12:
YY_RULE_SETUP
-#line 173 program_lexer.l
+#line 186 program_lexer.l
{ return_opcode(
Mesa (master): i965: Remove an unused variable.
Module: Mesa Branch: master Commit: 171a25eaba5c29a5f14e472ca1860a6de248c6b2 URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=171a25eaba5c29a5f14e472ca1860a6de248c6b2 Author: Carl Worth cwo...@cworth.org Date: Wed Jul 21 13:17:22 2010 -0700 i965: Remove an unused variable. To quiet a compiler warning. --- src/mesa/drivers/dri/i965/brw_vs_emit.c |1 - 1 files changed, 0 insertions(+), 1 deletions(-) diff --git a/src/mesa/drivers/dri/i965/brw_vs_emit.c b/src/mesa/drivers/dri/i965/brw_vs_emit.c index 2c18113..7894417 100644 --- a/src/mesa/drivers/dri/i965/brw_vs_emit.c +++ b/src/mesa/drivers/dri/i965/brw_vs_emit.c @@ -1297,7 +1297,6 @@ static void emit_vertex_write( struct brw_vs_compile *c) struct brw_compile *p = c-func; struct brw_context *brw = p-brw; struct intel_context *intel = brw-intel; - struct brw_reg m0 = brw_message_reg(0); struct brw_reg pos = c-regs[PROGRAM_OUTPUT][VERT_RESULT_HPOS]; struct brw_reg ndc; int eot; ___ mesa-commit mailing list mesa-commit@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-commit
Mesa (master): Makefiles: Don' t complain if depend file to be included doesn't exist.
Module: Mesa Branch: master Commit: 9d1a61efbecfb0093887ebe14b4aff4e7f6aeb85 URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=9d1a61efbecfb0093887ebe14b4aff4e7f6aeb85 Author: Carl Worth cwo...@cworth.org Date: Tue Jul 20 15:59:56 2010 -0700 Makefiles: Don't complain if depend file to be included doesn't exist. While bootstrapping the dependencies, make will see the include depend directive before the depend file has been created. To avoid a spurious warning in this case we use -include instead, (which differs precisely in the fact that it will not emit a diagnostic if the named file does not exist). --- src/glut/glx/Makefile |2 +- src/glw/Makefile |2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/src/glut/glx/Makefile b/src/glut/glx/Makefile index 6889cd4..69f8052 100644 --- a/src/glut/glx/Makefile +++ b/src/glut/glx/Makefile @@ -137,4 +137,4 @@ depend: $(SOURCES) @ $(MKDEP) $(MKDEP_OPTIONS) -I$(TOP)/include $(SOURCES) \ $(X11_INCLUDES) /dev/null -include depend +-include depend diff --git a/src/glw/Makefile b/src/glw/Makefile index 39352f0..776b1aa 100644 --- a/src/glw/Makefile +++ b/src/glw/Makefile @@ -71,4 +71,4 @@ depend: $(GLW_SOURCES) $(X11_INCLUDES) /dev/null -include depend +-include depend ___ mesa-commit mailing list mesa-commit@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-commit
Mesa (master): Add missing initialization of inOutFlags pointer.
Module: Mesa
Branch: master
Commit: 19e3771cff8e68fab88f06681d381ba3dad6c3ae
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=19e3771cff8e68fab88f06681d381ba3dad6c3ae
Author: Carl Worth cwo...@cworth.org
Date: Wed Jul 21 13:26:26 2010 -0700
Add missing initialization of inOutFlags pointer.
This quiets a compiler warning, (and ensures a segmentation fault rather
than memory corruption if this variable is written through before being
initialized elsewhere).
---
src/mesa/slang/slang_link.c |2 +-
1 files changed, 1 insertions(+), 1 deletions(-)
diff --git a/src/mesa/slang/slang_link.c b/src/mesa/slang/slang_link.c
index 955ee79..00c2c13 100644
--- a/src/mesa/slang/slang_link.c
+++ b/src/mesa/slang/slang_link.c
@@ -222,7 +222,7 @@ link_varying_vars(GLcontext *ctx,
struct gl_shader_program *shProg, struct gl_program *prog)
{
GLuint *map, i, firstSrcVarying, firstDstVarying, newSrcFile, newDstFile;
- GLbitfield *inOutFlags;
+ GLbitfield *inOutFlags = NULL;
map = (GLuint *) malloc(prog-Varying-NumParameters * sizeof(GLuint));
if (!map)
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Mesa (glsl2): glsl: Fix missing initialization of yylloc.source
Module: Mesa
Branch: glsl2
Commit: a0cfe8c44085032fd982bbbff1f02252ffaa7114
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=a0cfe8c44085032fd982bbbff1f02252ffaa7114
Author: Carl Worth cwo...@cworth.org
Date: Wed Jul 21 13:43:47 2010 -0700
glsl: Fix missing initialization of yylloc.source
In both the preprocessor and in the compiler proper, we use a custom
yyltype struct to allow tracking the source-string number in addition
to line and column. However, we were previously relying on bison's
default initialization of the yyltype struct which of course is not
aware of the source field and leaves it uninitialized.
We fix this by defining our own YYLLOC_DEFAULT macro expanding on the
default version (as appears in the bison manual) and adding
initialization of yylloc.source.
---
src/glsl/glcpp/glcpp.h| 19 +++
src/glsl/glsl_parser_extras.h | 19 +++
2 files changed, 38 insertions(+), 0 deletions(-)
diff --git a/src/glsl/glcpp/glcpp.h b/src/glsl/glcpp/glcpp.h
index fc9511a..869de2e 100644
--- a/src/glsl/glcpp/glcpp.h
+++ b/src/glsl/glcpp/glcpp.h
@@ -69,6 +69,25 @@ typedef struct YYLTYPE {
# define YYLTYPE_IS_DECLARED 1
# define YYLTYPE_IS_TRIVIAL 1
+# define YYLLOC_DEFAULT(Current, Rhs, N) \
+do { \
+ if (N) \
+ { \
+ (Current).first_line = YYRHSLOC(Rhs, 1).first_line;\
+ (Current).first_column = YYRHSLOC(Rhs, 1).first_column; \
+ (Current).last_line= YYRHSLOC(Rhs, N).last_line; \
+ (Current).last_column = YYRHSLOC(Rhs, N).last_column; \
+ } \
+ else\
+ { \
+ (Current).first_line = (Current).last_line = \
+YYRHSLOC(Rhs, 0).last_line;\
+ (Current).first_column = (Current).last_column = \
+YYRHSLOC(Rhs, 0).last_column; \
+ } \
+ (Current).source = 0; \
+} while (0)
+
struct token {
int type;
YYSTYPE value;
diff --git a/src/glsl/glsl_parser_extras.h b/src/glsl/glsl_parser_extras.h
index e2efbd9..b50d9ee 100644
--- a/src/glsl/glsl_parser_extras.h
+++ b/src/glsl/glsl_parser_extras.h
@@ -137,6 +137,25 @@ typedef struct YYLTYPE {
# define YYLTYPE_IS_DECLARED 1
# define YYLTYPE_IS_TRIVIAL 1
+# define YYLLOC_DEFAULT(Current, Rhs, N) \
+do { \
+ if (N) \
+ { \
+ (Current).first_line = YYRHSLOC(Rhs, 1).first_line;\
+ (Current).first_column = YYRHSLOC(Rhs, 1).first_column; \
+ (Current).last_line= YYRHSLOC(Rhs, N).last_line; \
+ (Current).last_column = YYRHSLOC(Rhs, N).last_column; \
+ } \
+ else\
+ { \
+ (Current).first_line = (Current).last_line = \
+YYRHSLOC(Rhs, 0).last_line;\
+ (Current).first_column = (Current).last_column = \
+YYRHSLOC(Rhs, 0).last_column; \
+ } \
+ (Current).source = 0; \
+} while (0)
+
extern void _mesa_glsl_error(YYLTYPE *locp, _mesa_glsl_parse_state *state,
const char *fmt, ...);
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Mesa (glsl2): ir_to_mesa: Add missing initializion of lod_info variable.
Module: Mesa
Branch: glsl2
Commit: 56d33f8e2be1695c951a811fac1800117c2ca406
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=56d33f8e2be1695c951a811fac1800117c2ca406
Author: Carl Worth cwo...@cworth.org
Date: Wed Jul 21 13:50:38 2010 -0700
ir_to_mesa: Add missing initializion of lod_info variable.
To quiet a compiler warning.
---
src/mesa/shader/ir_to_mesa.cpp |2 +-
1 files changed, 1 insertions(+), 1 deletions(-)
diff --git a/src/mesa/shader/ir_to_mesa.cpp b/src/mesa/shader/ir_to_mesa.cpp
index d1c09fe..a2b2eb9 100644
--- a/src/mesa/shader/ir_to_mesa.cpp
+++ b/src/mesa/shader/ir_to_mesa.cpp
@@ -1564,7 +1564,7 @@ ir_to_mesa_visitor::visit(ir_call *ir)
void
ir_to_mesa_visitor::visit(ir_texture *ir)
{
- ir_to_mesa_src_reg result_src, coord, lod_info, projector;
+ ir_to_mesa_src_reg result_src, coord, lod_info = { 0 }, projector;
ir_to_mesa_dst_reg result_dst, coord_dst;
ir_to_mesa_instruction *inst = NULL;
prog_opcode opcode = OPCODE_NOP;
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Mesa (master): st/mesa: implement depth clamp
Module: Mesa
Branch: master
Commit: c304869ec02793f2d8bf363d1e3b37c3d121cca7
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=c304869ec02793f2d8bf363d1e3b37c3d121cca7
Author: Marek Olšák mar...@gmail.com
Date: Wed Jul 21 09:14:43 2010 +0200
st/mesa: implement depth clamp
---
src/mesa/state_tracker/st_atom_clip.c |2 ++
src/mesa/state_tracker/st_extensions.c |4
2 files changed, 6 insertions(+), 0 deletions(-)
diff --git a/src/mesa/state_tracker/st_atom_clip.c
b/src/mesa/state_tracker/st_atom_clip.c
index 80c0e92..16f7aaa 100644
--- a/src/mesa/state_tracker/st_atom_clip.c
+++ b/src/mesa/state_tracker/st_atom_clip.c
@@ -55,6 +55,8 @@ static void update_clip( struct st_context *st )
clip.nr++;
}
}
+
+ clip.depth_clamp = st-ctx-Transform.DepthClamp != GL_FALSE;
if (memcmp(clip, st-state.clip, sizeof(clip)) != 0) {
st-state.clip = clip;
diff --git a/src/mesa/state_tracker/st_extensions.c
b/src/mesa/state_tracker/st_extensions.c
index d23ac0c..90e7867 100644
--- a/src/mesa/state_tracker/st_extensions.c
+++ b/src/mesa/state_tracker/st_extensions.c
@@ -397,4 +397,8 @@ void st_init_extensions(struct st_context *st)
if (screen-get_param(screen, PIPE_CAP_GEOMETRY_SHADER4)) {
ctx-Extensions.ARB_geometry_shader4 = GL_TRUE;
}
+
+ if (screen-get_param(screen, PIPE_CAP_DEPTH_CLAMP)) {
+ ctx-Extensions.ARB_depth_clamp = GL_TRUE;
+ }
}
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Mesa (master): draw: disable depth clipping if depth clamp is enabled
Module: Mesa
Branch: master
Commit: 9ca48de1068d4ebce81853d29455c83b4898e25e
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=9ca48de1068d4ebce81853d29455c83b4898e25e
Author: Marek Olšák mar...@gmail.com
Date: Wed Jul 21 20:31:39 2010 +0200
draw: disable depth clipping if depth clamp is enabled
---
src/gallium/auxiliary/draw/draw_context.c|1 +
src/gallium/auxiliary/draw/draw_private.h|1 +
src/gallium/auxiliary/draw/draw_pt_post_vs.c | 13 +
3 files changed, 11 insertions(+), 4 deletions(-)
diff --git a/src/gallium/auxiliary/draw/draw_context.c
b/src/gallium/auxiliary/draw/draw_context.c
index aac1ed6..c127f74 100644
--- a/src/gallium/auxiliary/draw/draw_context.c
+++ b/src/gallium/auxiliary/draw/draw_context.c
@@ -216,6 +216,7 @@ void draw_set_clip_state( struct draw_context *draw,
assert(clip-nr = PIPE_MAX_CLIP_PLANES);
memcpy(draw-plane[6], clip-ucp, clip-nr * sizeof(clip-ucp[0]));
draw-nr_planes = 6 + clip-nr;
+ draw-depth_clamp = clip-depth_clamp;
}
diff --git a/src/gallium/auxiliary/draw/draw_private.h
b/src/gallium/auxiliary/draw/draw_private.h
index 8af8859..058aeed 100644
--- a/src/gallium/auxiliary/draw/draw_private.h
+++ b/src/gallium/auxiliary/draw/draw_private.h
@@ -249,6 +249,7 @@ struct draw_context
*/
float plane[12][4];
unsigned nr_planes;
+ boolean depth_clamp;
/* If a prim stage introduces new vertex attributes, they'll be stored here
*/
diff --git a/src/gallium/auxiliary/draw/draw_pt_post_vs.c
b/src/gallium/auxiliary/draw/draw_pt_post_vs.c
index e850cc2..308f927 100644
--- a/src/gallium/auxiliary/draw/draw_pt_post_vs.c
+++ b/src/gallium/auxiliary/draw/draw_pt_post_vs.c
@@ -57,7 +57,8 @@ dot4(const float *a, const float *b)
}
static INLINE unsigned
-compute_clipmask_gl(const float *clip, /*const*/ float plane[][4], unsigned nr)
+compute_clipmask_gl(const float *clip, /*const*/ float plane[][4], unsigned nr,
+boolean clip_depth)
{
unsigned mask = 0x0;
unsigned i;
@@ -74,8 +75,10 @@ compute_clipmask_gl(const float *clip, /*const*/ float
plane[][4], unsigned nr)
if ( clip[0] + clip[3] 0) mask |= (11);
if (-clip[1] + clip[3] 0) mask |= (12);
if ( clip[1] + clip[3] 0) mask |= (13);
- if ( clip[2] + clip[3] 0) mask |= (14); /* match mesa clipplane
numbering - for now */
- if (-clip[2] + clip[3] 0) mask |= (15); /* match mesa clipplane
numbering - for now */
+ if (clip_depth) {
+ if ( clip[2] + clip[3] 0) mask |= (14); /* match mesa clipplane
numbering - for now */
+ if (-clip[2] + clip[3] 0) mask |= (15); /* match mesa clipplane
numbering - for now */
+ }
/* Followed by any remaining ones:
*/
@@ -120,9 +123,11 @@ static boolean post_vs_cliptest_viewport_gl( struct
pt_post_vs *pvs,
out-clip[3] = position[3];
out-vertex_id = 0x;
+ /* Disable depth clipping if depth clamping is enabled. */
out-clipmask = compute_clipmask_gl(out-clip,
pvs-draw-plane,
- pvs-draw-nr_planes);
+ pvs-draw-nr_planes,
+ !pvs-draw-depth_clamp);
clipped += out-clipmask;
if (out-clipmask == 0)
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Mesa (master): r300g: cleanup clip state emission
Module: Mesa
Branch: master
Commit: 5725738ef6a4b5110064d4e2e0ce4f7609e875e4
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=5725738ef6a4b5110064d4e2e0ce4f7609e875e4
Author: Marek Olšák mar...@gmail.com
Date: Wed Jul 21 20:41:04 2010 +0200
r300g: cleanup clip state emission
---
src/gallium/drivers/r300/r300_state.c | 16 ++--
1 files changed, 10 insertions(+), 6 deletions(-)
diff --git a/src/gallium/drivers/r300/r300_state.c
b/src/gallium/drivers/r300/r300_state.c
index 8d849cd..0bbc022 100644
--- a/src/gallium/drivers/r300/r300_state.c
+++ b/src/gallium/drivers/r300/r300_state.c
@@ -429,12 +429,16 @@ static void r300_set_clip_state(struct pipe_context* pipe,
clip-clip = *state;
if (r300-screen-caps.has_tcl) {
-BEGIN_CB(clip-cb, 29);
-OUT_CB_REG(R300_VAP_PVS_VECTOR_INDX_REG,
-(r300-screen-caps.is_r500 ?
- R500_PVS_UCP_START : R300_PVS_UCP_START));
-OUT_CB_ONE_REG(R300_VAP_PVS_UPLOAD_DATA, 6 * 4);
-OUT_CB_TABLE(state-ucp, 6 * 4);
+r300-clip_state.size = 2 + !!state-nr * 3 + state-nr * 4;
+
+BEGIN_CB(clip-cb, r300-clip_state.size);
+if (state-nr) {
+ OUT_CB_REG(R300_VAP_PVS_VECTOR_INDX_REG,
+ (r300-screen-caps.is_r500 ?
+R500_PVS_UCP_START : R300_PVS_UCP_START));
+ OUT_CB_ONE_REG(R300_VAP_PVS_UPLOAD_DATA, state-nr * 4);
+ OUT_CB_TABLE(state-ucp, state-nr * 4);
+}
OUT_CB_REG(R300_VAP_CLIP_CNTL, ((1 state-nr) - 1) |
R300_PS_UCP_MODE_CLIP_AS_TRIFAN);
END_CB;
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Mesa (master): r300g: implement depth clamp
Module: Mesa Branch: master Commit: ca7ead03da4481cd34933175898f4a924e588ad4 URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=ca7ead03da4481cd34933175898f4a924e588ad4 Author: Marek Olšák mar...@gmail.com Date: Tue Jul 20 16:37:22 2010 +0200 r300g: implement depth clamp Depth clamping seems to be implicit if clipping is disabled. It's not perfect, but it's good enough for wine and passes the corresponding piglit tests. --- src/gallium/drivers/r300/r300_screen.c |1 + src/gallium/drivers/r300/r300_state.c |3 ++- 2 files changed, 3 insertions(+), 1 deletions(-) diff --git a/src/gallium/drivers/r300/r300_screen.c b/src/gallium/drivers/r300/r300_screen.c index 9c73ffc..5a11b98 100644 --- a/src/gallium/drivers/r300/r300_screen.c +++ b/src/gallium/drivers/r300/r300_screen.c @@ -115,6 +115,7 @@ static int r300_get_param(struct pipe_screen* pscreen, enum pipe_cap param) case PIPE_CAP_TEXTURE_MIRROR_REPEAT: case PIPE_CAP_BLEND_EQUATION_SEPARATE: case PIPE_CAP_TEXTURE_SWIZZLE: +case PIPE_CAP_DEPTH_CLAMP: return 1; /* Unsupported features (boolean caps). */ diff --git a/src/gallium/drivers/r300/r300_state.c b/src/gallium/drivers/r300/r300_state.c index 0bbc022..f52265b 100644 --- a/src/gallium/drivers/r300/r300_state.c +++ b/src/gallium/drivers/r300/r300_state.c @@ -440,7 +440,8 @@ static void r300_set_clip_state(struct pipe_context* pipe, OUT_CB_TABLE(state-ucp, state-nr * 4); } OUT_CB_REG(R300_VAP_CLIP_CNTL, ((1 state-nr) - 1) | -R300_PS_UCP_MODE_CLIP_AS_TRIFAN); +R300_PS_UCP_MODE_CLIP_AS_TRIFAN | +(state-depth_clamp ? R300_CLIP_DISABLE : 0)); END_CB; r300-clip_state.dirty = TRUE; ___ mesa-commit mailing list mesa-commit@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-commit
Mesa (master): llvmpipe: say no to depth clamp
Module: Mesa Branch: master Commit: 1a3fa3e91089d534b8219518a44ae8ada66be3e3 URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=1a3fa3e91089d534b8219518a44ae8ada66be3e3 Author: Marek Olšák mar...@gmail.com Date: Wed Jul 21 22:31:59 2010 +0200 llvmpipe: say no to depth clamp The other drivers just return 0 without the assert. --- src/gallium/drivers/llvmpipe/lp_screen.c |2 ++ 1 files changed, 2 insertions(+), 0 deletions(-) diff --git a/src/gallium/drivers/llvmpipe/lp_screen.c b/src/gallium/drivers/llvmpipe/lp_screen.c index f7f1635..167cb2e 100644 --- a/src/gallium/drivers/llvmpipe/lp_screen.c +++ b/src/gallium/drivers/llvmpipe/lp_screen.c @@ -169,6 +169,8 @@ llvmpipe_get_param(struct pipe_screen *screen, enum pipe_cap param) return 1; case PIPE_CAP_GEOMETRY_SHADER4: return 1; + case PIPE_CAP_DEPTH_CLAMP: + return 0; default: assert(0); return 0; ___ mesa-commit mailing list mesa-commit@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-commit
Mesa (master): r600g: add family retrival
Module: Mesa
Branch: master
Commit: 9433d0e8010bfe182762f8d2bd856a416a7f93bb
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=9433d0e8010bfe182762f8d2bd856a416a7f93bb
Author: Dave Airlie airl...@redhat.com
Date: Wed Jul 21 15:39:01 2010 +1000
r600g: add family retrival
allow pipe driver to get the family of the gpu.
---
src/gallium/drivers/r600/r600_screen.c |8 +++-
src/gallium/drivers/r600/radeon.h |2 ++
src/gallium/winsys/r600/drm/radeon.c |5 +
3 files changed, 14 insertions(+), 1 deletions(-)
diff --git a/src/gallium/drivers/r600/r600_screen.c
b/src/gallium/drivers/r600/r600_screen.c
index 20758b0..dec6fa8 100644
--- a/src/gallium/drivers/r600/r600_screen.c
+++ b/src/gallium/drivers/r600/r600_screen.c
@@ -41,7 +41,13 @@ static const char* r600_get_vendor(struct pipe_screen*
pscreen)
static const char* r600_get_name(struct pipe_screen* pscreen)
{
- return R600/R700 (HD2XXX,HD3XXX,HD4XXX);
+ struct r600_screen *screen = r600_screen(pscreen);
+ enum radeon_family family = radeon_get_family(screen-rw);
+
+ if (family = CHIP_R600 family CHIP_RV770)
+ return R600 (HD2XXX,HD3XXX);
+ else
+ return R700 (HD4XXX);
}
static int r600_get_param(struct pipe_screen* pscreen, enum pipe_cap param)
diff --git a/src/gallium/drivers/r600/radeon.h
b/src/gallium/drivers/r600/radeon.h
index 2a82aad..3a8405f 100644
--- a/src/gallium/drivers/r600/radeon.h
+++ b/src/gallium/drivers/r600/radeon.h
@@ -77,6 +77,8 @@ enum radeon_family {
CHIP_LAST,
};
+enum radeon_family radeon_get_family(struct radeon *rw);
+
/*
* radeon object functions
*/
diff --git a/src/gallium/winsys/r600/drm/radeon.c
b/src/gallium/winsys/r600/drm/radeon.c
index f2113c5..7e65669 100644
--- a/src/gallium/winsys/r600/drm/radeon.c
+++ b/src/gallium/winsys/r600/drm/radeon.c
@@ -25,6 +25,11 @@
#include radeon_drm.h
#include r600d.h
+enum radeon_family radeon_get_family(struct radeon *radeon)
+{
+ return radeon-family;
+}
+
static int radeon_get_device(struct radeon *radeon)
{
struct drm_radeon_info info;
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Mesa (master): r600g: add r600 compile mode to compiler.
Module: Mesa
Branch: master
Commit: 4b2820534e3635a8ecd047f1e0139834e0a67d02
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=4b2820534e3635a8ecd047f1e0139834e0a67d02
Author: Dave Airlie airl...@redhat.com
Date: Wed Jul 21 15:39:23 2010 +1000
r600g: add r600 compile mode to compiler.
some of the ALU instructions are different on r6xx vs r7xx,
separate the alu translation to separate files, and use family
to pick which compile stage to use.
---
src/gallium/drivers/r600/r600_compiler_r600.c | 65 +
src/gallium/drivers/r600/r600_compiler_r700.c | 43 -
src/gallium/drivers/r600/r600_shader.c|6 ++-
src/gallium/drivers/r600/r600_shader.h|5 ++
4 files changed, 106 insertions(+), 13 deletions(-)
diff --git a/src/gallium/drivers/r600/r600_compiler_r600.c
b/src/gallium/drivers/r600/r600_compiler_r600.c
index f7234e7..27ad8f1 100644
--- a/src/gallium/drivers/r600/r600_compiler_r600.c
+++ b/src/gallium/drivers/r600/r600_compiler_r600.c
@@ -905,3 +905,68 @@ struct r600_alu_instruction
r600_alu_instruction[C_OPCODE_LAST] = {
{C_OPCODE_ENTRY,INST_NOP},
{C_OPCODE_ARL, INST_NOP},
};
+
+
+static int r600_shader_alu_bytecode(struct r600_shader *rshader,
+ struct r600_shader_node *rnode,
+ struct r600_shader_inst *alu,
+ unsigned *cid)
+{
+ unsigned id = *cid;
+
+ /* don't replace gpr by pv or ps for destination register */
+ if (alu-is_op3) {
+ rshader-bcode[id++] = S_SQ_ALU_WORD0_SRC0_SEL(alu-src[0].sel)
|
+
S_SQ_ALU_WORD0_SRC0_CHAN(alu-src[0].chan) |
+
S_SQ_ALU_WORD0_SRC1_SEL(alu-src[1].sel) |
+
S_SQ_ALU_WORD0_SRC1_CHAN(alu-src[1].chan) |
+ S_SQ_ALU_WORD0_LAST(alu-last);
+ rshader-bcode[id++] = S_SQ_ALU_WORD1_DST_GPR(alu-dst.sel) |
+ S_SQ_ALU_WORD1_DST_CHAN(alu-dst.chan) |
+
S_SQ_ALU_WORD1_OP3_SRC2_SEL(alu-src[2].sel) |
+
S_SQ_ALU_WORD1_OP3_SRC2_CHAN(alu-src[2].chan) |
+
S_SQ_ALU_WORD1_OP3_SRC2_NEG(alu-src[2].neg) |
+
S_SQ_ALU_WORD1_OP3_ALU_INST(alu-opcode) |
+ S_SQ_ALU_WORD1_BANK_SWIZZLE(0);
+ } else {
+ rshader-bcode[id++] = S_SQ_ALU_WORD0_SRC0_SEL(alu-src[0].sel)
|
+
S_SQ_ALU_WORD0_SRC0_CHAN(alu-src[0].chan) |
+
S_SQ_ALU_WORD0_SRC0_NEG(alu-src[0].neg) |
+
S_SQ_ALU_WORD0_SRC1_SEL(alu-src[1].sel) |
+
S_SQ_ALU_WORD0_SRC1_CHAN(alu-src[1].chan) |
+
S_SQ_ALU_WORD0_SRC1_NEG(alu-src[1].neg) |
+ S_SQ_ALU_WORD0_LAST(alu-last);
+ rshader-bcode[id++] = S_SQ_ALU_WORD1_DST_GPR(alu-dst.sel) |
+ S_SQ_ALU_WORD1_DST_CHAN(alu-dst.chan) |
+
S_SQ_ALU_WORD1_OP2_SRC0_ABS(alu-src[0].abs) |
+
S_SQ_ALU_WORD1_OP2_SRC1_ABS(alu-src[1].abs) |
+ S_SQ_ALU_WORD1_OP2_WRITE_MASK(1) |
+
S_SQ_ALU_WORD1_OP2_ALU_INST(alu-opcode) |
+ S_SQ_ALU_WORD1_BANK_SWIZZLE(0);
+ }
+ *cid = id;
+ return 0;
+}
+
+int r6xx_shader_alu_translate(struct r600_shader *rshader,
+ struct r600_shader_node *rnode,
+ unsigned *cid)
+{
+ struct r600_shader_alu *alu;
+ unsigned id = *cid;
+ int i;
+ int r = 0;
+ LIST_FOR_EACH_ENTRY(alu, rnode-alu, head) {
+ for (i = 0; i alu-nalu; i++) {
+ r = r600_shader_alu_bytecode(rshader, rnode,
alu-alu[i], id);
+ if (r)
+ goto out;
+ }
+ for (i = 0; i alu-nliteral; i++) {
+ rshader-bcode[id++] = alu-literal[i];
+ }
+ }
+out:
+ *cid = id;
+ return r;
+}
diff --git a/src/gallium/drivers/r600/r600_compiler_r700.c
b/src/gallium/drivers/r600/r600_compiler_r700.c
index ca6447e..0b43942 100644
--- a/src/gallium/drivers/r600/r600_compiler_r700.c
+++ b/src/gallium/drivers/r600/r600_compiler_r700.c
@@ -143,14 +143,37 @@ static int r700_shader_alu_bytecode(struct r600_shader
*rshader,
return 0;
}
+static int r700_shader_alu_translate(struct r600_shader *rshader,
+struct r600_shader_node
Mesa (master): r600g: add support for all R6XX/R7XX asic
Module: Mesa
Branch: master
Commit: 0bca8fbfdab4a19ddbb4f33aaef372246a5d2cc2
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=0bca8fbfdab4a19ddbb4f33aaef372246a5d2cc2
Author: Jerome Glisse jgli...@redhat.com
Date: Wed Jul 21 17:03:38 2010 -0400
r600g: add support for all R6XX/R7XX asic
This configure some of the value properly based on
asic so others asic than RV710 works too.
Signed-off-by: Jerome Glisse jgli...@redhat.com
---
src/gallium/drivers/r600/r600_context.c | 284 ++-
src/gallium/drivers/r600/r600_sq.h | 22 ---
src/gallium/drivers/r600/r600d.h| 75
src/gallium/drivers/r600/r700_sq.h | 22 ---
4 files changed, 316 insertions(+), 87 deletions(-)
diff --git a/src/gallium/drivers/r600/r600_context.c
b/src/gallium/drivers/r600/r600_context.c
index 0a7efe3..05575b5 100644
--- a/src/gallium/drivers/r600/r600_context.c
+++ b/src/gallium/drivers/r600/r600_context.c
@@ -32,6 +32,7 @@
#include r600_resource.h
#include r600_screen.h
#include r600_context.h
+#include r600d.h
static void r600_destroy_context(struct pipe_context *context)
{
@@ -62,6 +63,245 @@ static void r600_flush(struct pipe_context *ctx, unsigned
flags,
dc++;
}
+static void r600_init_config(struct r600_context *rctx)
+{
+ int ps_prio;
+ int vs_prio;
+ int gs_prio;
+ int es_prio;
+ int num_ps_gprs;
+ int num_vs_gprs;
+ int num_gs_gprs;
+ int num_es_gprs;
+ int num_temp_gprs;
+ int num_ps_threads;
+ int num_vs_threads;
+ int num_gs_threads;
+ int num_es_threads;
+ int num_ps_stack_entries;
+ int num_vs_stack_entries;
+ int num_gs_stack_entries;
+ int num_es_stack_entries;
+ enum radeon_family family;
+
+ family = radeon_get_family(rctx-rw);
+ ps_prio = 0;
+ vs_prio = 1;
+ gs_prio = 2;
+ es_prio = 3;
+ switch (family) {
+ case CHIP_R600:
+ num_ps_gprs = 192;
+ num_vs_gprs = 56;
+ num_temp_gprs = 4;
+ num_gs_gprs = 0;
+ num_es_gprs = 0;
+ num_ps_threads = 136;
+ num_vs_threads = 48;
+ num_gs_threads = 4;
+ num_es_threads = 4;
+ num_ps_stack_entries = 128;
+ num_vs_stack_entries = 128;
+ num_gs_stack_entries = 0;
+ num_es_stack_entries = 0;
+ break;
+ case CHIP_RV630:
+ case CHIP_RV635:
+ num_ps_gprs = 84;
+ num_vs_gprs = 36;
+ num_temp_gprs = 4;
+ num_gs_gprs = 0;
+ num_es_gprs = 0;
+ num_ps_threads = 144;
+ num_vs_threads = 40;
+ num_gs_threads = 4;
+ num_es_threads = 4;
+ num_ps_stack_entries = 40;
+ num_vs_stack_entries = 40;
+ num_gs_stack_entries = 32;
+ num_es_stack_entries = 16;
+ break;
+ case CHIP_RV610:
+ case CHIP_RV620:
+ case CHIP_RS780:
+ case CHIP_RS880:
+ default:
+ num_ps_gprs = 84;
+ num_vs_gprs = 36;
+ num_temp_gprs = 4;
+ num_gs_gprs = 0;
+ num_es_gprs = 0;
+ num_ps_threads = 136;
+ num_vs_threads = 48;
+ num_gs_threads = 4;
+ num_es_threads = 4;
+ num_ps_stack_entries = 40;
+ num_vs_stack_entries = 40;
+ num_gs_stack_entries = 32;
+ num_es_stack_entries = 16;
+ break;
+ case CHIP_RV670:
+ num_ps_gprs = 144;
+ num_vs_gprs = 40;
+ num_temp_gprs = 4;
+ num_gs_gprs = 0;
+ num_es_gprs = 0;
+ num_ps_threads = 136;
+ num_vs_threads = 48;
+ num_gs_threads = 4;
+ num_es_threads = 4;
+ num_ps_stack_entries = 40;
+ num_vs_stack_entries = 40;
+ num_gs_stack_entries = 32;
+ num_es_stack_entries = 16;
+ break;
+ case CHIP_RV770:
+ num_ps_gprs = 192;
+ num_vs_gprs = 56;
+ num_temp_gprs = 4;
+ num_gs_gprs = 0;
+ num_es_gprs = 0;
+ num_ps_threads = 188;
+ num_vs_threads = 60;
+ num_gs_threads = 0;
+ num_es_threads = 0;
+ num_ps_stack_entries = 256;
+ num_vs_stack_entries = 256;
+ num_gs_stack_entries = 0;
+ num_es_stack_entries = 0;
+ break;
+ case CHIP_RV730:
+ case CHIP_RV740:
+ num_ps_gprs = 84;
+ num_vs_gprs = 36;
+ num_temp_gprs = 4;
+ num_gs_gprs = 0;
+ num_es_gprs = 0;
+
Mesa (master): softpipe: fix sp_tile_cache_flush_clear() regression
Module: Mesa
Branch: master
Commit: ef2d10cd45c0aba00aedbd7f412af0eb24385b77
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=ef2d10cd45c0aba00aedbd7f412af0eb24385b77
Author: Brian Paul bri...@vmware.com
Date: Wed Jul 21 16:00:42 2010 -0600
softpipe: fix sp_tile_cache_flush_clear() regression
---
src/gallium/drivers/softpipe/sp_tile_cache.c | 16 +++-
1 files changed, 11 insertions(+), 5 deletions(-)
diff --git a/src/gallium/drivers/softpipe/sp_tile_cache.c
b/src/gallium/drivers/softpipe/sp_tile_cache.c
index 05a3294..d7bc356 100644
--- a/src/gallium/drivers/softpipe/sp_tile_cache.c
+++ b/src/gallium/drivers/softpipe/sp_tile_cache.c
@@ -297,11 +297,17 @@ sp_tile_cache_flush_clear(struct softpipe_tile_cache *tc)
if (is_clear_flag_set(tc-clear_flags, addr)) {
/* write the scratch tile to the surface */
-pipe_put_tile_raw(tc-pipe,
- pt,
- x, y, TILE_SIZE, TILE_SIZE,
- tc-tile.data.any, 0/*STRIDE*/);
-
+if (tc-depth_stencil) {
+ pipe_put_tile_raw(tc-pipe,
+ pt,
+ x, y, TILE_SIZE, TILE_SIZE,
+ tc-tile.data.any, 0/*STRIDE*/);
+}
+else {
+ pipe_put_tile_rgba(tc-pipe, pt,
+ x, y, TILE_SIZE, TILE_SIZE,
+ (float *) tc-tile.data.color);
+}
numCleared++;
}
}
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Mesa (glsl2): glsl2: Add function to import function prototypes from one IR tree to another
Module: Mesa
Branch: glsl2
Commit: 4ccd3c548b9b9a2fee79342445f68d73525bfcdb
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=4ccd3c548b9b9a2fee79342445f68d73525bfcdb
Author: Ian Romanick ian.d.roman...@intel.com
Date: Tue Jul 20 11:28:31 2010 -0700
glsl2: Add function to import function prototypes from one IR tree to another
---
src/glsl/Makefile |1 +
src/glsl/ir.h |6 ++
src/glsl/ir_import_prototypes.cpp | 137 +
3 files changed, 144 insertions(+), 0 deletions(-)
diff --git a/src/glsl/Makefile b/src/glsl/Makefile
index 2b04037..47292bd 100644
--- a/src/glsl/Makefile
+++ b/src/glsl/Makefile
@@ -49,6 +49,7 @@ CXX_SOURCES = \
ir_if_return.cpp \
ir_if_simplification.cpp \
ir_if_to_cond_assign.cpp \
+ ir_import_prototypes.cpp \
ir_mat_op_to_vec.cpp \
ir_mod_to_fract.cpp \
ir_print_visitor.cpp \
diff --git a/src/glsl/ir.h b/src/glsl/ir.h
index e4b0e9f..38b10f5 100644
--- a/src/glsl/ir.h
+++ b/src/glsl/ir.h
@@ -1318,4 +1318,10 @@ _mesa_glsl_initialize_functions(exec_list *instructions,
extern void
reparent_ir(exec_list *list, void *mem_ctx);
+class glsl_symbol_table;
+
+extern void
+import_prototypes(const exec_list *source, exec_list *dest,
+ class glsl_symbol_table *symbols, void *mem_ctx);
+
#endif /* IR_H */
diff --git a/src/glsl/ir_import_prototypes.cpp
b/src/glsl/ir_import_prototypes.cpp
new file mode 100644
index 000..20aa8a6
--- /dev/null
+++ b/src/glsl/ir_import_prototypes.cpp
@@ -0,0 +1,137 @@
+/*
+ * Copyright © 2010 Intel Corporation
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the Software),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the next
+ * paragraph) shall be included in all copies or substantial portions of the
+ * Software.
+ *
+ * THE SOFTWARE IS PROVIDED AS IS, WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+ * DEALINGS IN THE SOFTWARE.
+ */
+
+/**
+ * \file ir_import_prototypes.cpp
+ * Import function prototypes from one IR tree into another.
+ *
+ * \author Ian Romanick
+ */
+#include cstdio
+#include ir.h
+#include glsl_symbol_table.h
+
+/**
+ * Visitor used to import function prototypes
+ *
+ * Normally the \c clone method of either \c ir_function or
+ * \c ir_function_signature could be used. However, we don't want a complete
+ * clone of the \c ir_function_signature. We want everything \b except the
+ * body of the function.
+ */
+class import_prototype_visitor : public ir_hierarchical_visitor {
+public:
+ /**
+*/
+ import_prototype_visitor(exec_list *list, glsl_symbol_table *symbols,
+ void *mem_ctx)
+ {
+ this-mem_ctx = mem_ctx;
+ this-list = list;
+ this-symbols = symbols;
+ this-function = NULL;
+ }
+
+ virtual ir_visitor_status visit_enter(ir_function *ir)
+ {
+ assert(this-function == NULL);
+ this-function = new(this-mem_ctx) ir_function(ir-name);
+ return visit_continue;
+ }
+
+ virtual ir_visitor_status visit_leave(ir_function *ir)
+ {
+ (void) ir;
+ assert(this-function != NULL);
+
+ /* Add the new function (and all its signatures) to the end of the
+ * instruction stream.
+ */
+ list-push_tail(this-function);
+
+ /* Add the new function to the symbol table.
+ */
+ this-symbols-add_function(this-function-name, this-function);
+
+ this-function = NULL;
+ return visit_continue;
+ }
+
+ ir_visitor_status visit_enter(ir_function_signature *ir)
+ {
+ assert(this-function != NULL);
+
+ ir_function_signature *copy =
+new(mem_ctx) ir_function_signature(ir-return_type);
+
+ copy-is_defined = false;
+ copy-is_built_in = ir-is_built_in;
+
+ /* Clone the parameter list, but NOT the body.
+ */
+ foreach_list_const(node, ir-parameters) {
+const ir_variable *const param = (const ir_variable *) node;
+
+assert(const_castir_variable *(param)-as_variable() != NULL);
+
+ir_variable *const param_copy = param-clone(NULL);
+copy-parameters.push_tail(param_copy);
+ }
+
+
Mesa (glsl2): linker: Link built-in functions instead of including them in every shader
Module: Mesa
Branch: glsl2
Commit: d5be2acae379783c4aa31243e0a88a9e67e6ca7e
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=d5be2acae379783c4aa31243e0a88a9e67e6ca7e
Author: Ian Romanick ian.d.roman...@intel.com
Date: Tue Jul 20 11:29:46 2010 -0700
linker: Link built-in functions instead of including them in every shader
This is an invasive set of changes. Each user shader tracks a set of other
shaders that contain built-in functions. During compilation, function
prototypes are imported from these shaders. During linking, the
shaders are linked with these built-in-function shaders just like with
any other shader.
---
src/glsl/builtin_function.cpp| 218 --
src/glsl/builtins/110_vs/ftransform |4 +-
src/glsl/builtins/tools/generate_builtins.pl | 63 ++--
src/glsl/glsl_parser_extras.h|4 +
src/glsl/ir.h|3 +
src/glsl/linker.cpp | 23 +++-
src/glsl/main.cpp|4 +
src/mesa/main/mtypes.h |4 +
src/mesa/shader/ir_to_mesa.cpp |3 +
9 files changed, 261 insertions(+), 65 deletions(-)
diff --git a/src/glsl/builtin_function.cpp b/src/glsl/builtin_function.cpp
index 967bcd0..10e59e4 100644
--- a/src/glsl/builtin_function.cpp
+++ b/src/glsl/builtin_function.cpp
@@ -25,22 +25,41 @@
#include stdio.h
#include glsl_parser_extras.h
#include ir_reader.h
+#include program.h
-void
-read_builtins(_mesa_glsl_parse_state *st, exec_list *instructions,
- const char **functions, unsigned count)
+extern C struct gl_shader *
+_mesa_new_shader(GLcontext *ctx, GLuint name, GLenum type);
+
+gl_shader *
+read_builtins(GLenum target, const char **functions, unsigned count)
{
- if (st-error)
- return;
+ gl_shader *sh = _mesa_new_shader(NULL, 0, target);
+ struct _mesa_glsl_parse_state *st =
+ new(sh) _mesa_glsl_parse_state(NULL, target, sh);
+
+ st-language_version = 130;
+ st-ARB_texture_rectangle_enable = true;
+ st-EXT_texture_array_enable = true;
+ _mesa_glsl_initialize_types(st);
+
+ sh-ir = new(sh) exec_list;
+ sh-symbols = st-symbols;
for (unsigned i = 0; i count; i++) {
- _mesa_glsl_read_ir(st, instructions, functions[i]);
+ _mesa_glsl_read_ir(st, sh-ir, functions[i]);
if (st-error) {
printf(error reading builtin: %.35s ...\n, functions[i]);
- return;
+delete st;
+talloc_free(sh);
+ return NULL;
}
}
+
+ reparent_ir(sh-ir, sh);
+ delete st;
+
+ return sh;
}
/* 110 builtins */
@@ -2580,7 +2599,9 @@ static const char *functions_for_110_fs [] = {
/* 110_vs builtins */
static const char *builtins_110_vs_ftransform = {
- ((function ftransform\n
+ ((declare (uniform) mat4 gl_ModelViewProjectionMatrix)\n
+(declare (in) vec4 gl_Vertex)\n
+(function ftransform\n
(signature vec4\n
(parameters)\n
((return (expression vec4 *\n
@@ -4760,53 +4781,146 @@ static const char *functions_for_EXT_texture_array_fs
[] = {
#define Elements(x) (sizeof(x)/sizeof(*(x)))
#endif
+void *builtin_mem_ctx = NULL;
+
+void
+_mesa_glsl_release_functions(void)
+{
+talloc_free(builtin_mem_ctx);
+}
+
void
_mesa_glsl_initialize_functions(exec_list *instructions,
struct _mesa_glsl_parse_state *state)
{
- if (state-language_version = 110)
- read_builtins(state, instructions,
-functions_for_110,
-Elements(functions_for_110));
-
- if (state-target == fragment_shader state-language_version = 110)
- read_builtins(state, instructions,
-functions_for_110_fs,
-Elements(functions_for_110_fs));
-
- if (state-target == vertex_shader state-language_version = 110)
- read_builtins(state, instructions,
-functions_for_110_vs,
-Elements(functions_for_110_vs));
-
- if (state-language_version = 120)
- read_builtins(state, instructions,
-functions_for_120,
-Elements(functions_for_120));
-
- if (state-language_version = 130)
- read_builtins(state, instructions,
-functions_for_130,
-Elements(functions_for_130));
-
- if (state-target == fragment_shader state-language_version = 130)
- read_builtins(state, instructions,
-functions_for_130_fs,
-Elements(functions_for_130_fs));
-
- if (state-ARB_texture_rectangle_enable)
- read_builtins(state, instructions,
-functions_for_ARB_texture_rectangle,
-Elements(functions_for_ARB_texture_rectangle));
-
- if (state-EXT_texture_array_enable)
- read_builtins(state, instructions,
-functions_for_EXT_texture_array,
-
Mesa (glsl2): glsl2: Replace insert_before/remove pairs with exec_node:: replace_with.
Module: Mesa
Branch: glsl2
Commit: c7a18da69022d3f9b05c21ff2473e8ea390f77f1
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=c7a18da69022d3f9b05c21ff2473e8ea390f77f1
Author: Kenneth Graunke kenn...@whitecape.org
Date: Mon Jul 19 21:44:03 2010 -0700
glsl2: Replace insert_before/remove pairs with exec_node::replace_with.
---
src/glsl/ast_function.cpp|3 +--
src/glsl/ir_expression_flattening.cpp|3 +--
src/glsl/ir_function_inlining.cpp|3 +--
src/glsl/ir_if_return.cpp|6 ++
src/glsl/ir_vec_index_to_cond_assign.cpp |3 +--
src/glsl/ir_vec_index_to_swizzle.cpp |3 +--
6 files changed, 7 insertions(+), 14 deletions(-)
diff --git a/src/glsl/ast_function.cpp b/src/glsl/ast_function.cpp
index 73af882..2348bdf 100644
--- a/src/glsl/ast_function.cpp
+++ b/src/glsl/ast_function.cpp
@@ -1081,8 +1081,7 @@ ast_function_expression::hir(exec_list *instructions,
all_parameters_are_constant = false;
if (result != ir) {
- ir-insert_before(result);
- ir-remove();
+ ir-replace_with(result);
}
}
diff --git a/src/glsl/ir_expression_flattening.cpp
b/src/glsl/ir_expression_flattening.cpp
index 6dbebc6..ccb2e2b 100644
--- a/src/glsl/ir_expression_flattening.cpp
+++ b/src/glsl/ir_expression_flattening.cpp
@@ -171,8 +171,7 @@ ir_expression_flattening_visitor::visit_enter(ir_call *ir)
ir_rvalue *new_ir = operand_to_temp(ir);
if (new_ir != ir) {
-ir-insert_before(new_ir);
-ir-remove();
+ir-replace_with(new_ir);
}
}
diff --git a/src/glsl/ir_function_inlining.cpp
b/src/glsl/ir_function_inlining.cpp
index 05dd83f..c391f12 100644
--- a/src/glsl/ir_function_inlining.cpp
+++ b/src/glsl/ir_function_inlining.cpp
@@ -91,8 +91,7 @@ replace_return_with_assignment(ir_instruction *ir, void *data)
if (ret) {
if (ret-value) {
ir_rvalue *lhs = new(ctx) ir_dereference_variable(retval);
-ret-insert_before(new(ctx) ir_assignment(lhs, ret-value, NULL));
-ret-remove();
+ret-replace_with(new(ctx) ir_assignment(lhs, ret-value, NULL));
} else {
/* un-valued return has to be the last return, or we shouldn't
* have reached here. (see can_inline()).
diff --git a/src/glsl/ir_if_return.cpp b/src/glsl/ir_if_return.cpp
index a9af716..bfb52e7 100644
--- a/src/glsl/ir_if_return.cpp
+++ b/src/glsl/ir_if_return.cpp
@@ -108,13 +108,11 @@ ir_if_return_visitor::visit_enter(ir_if *ir)
assign = new(ir) ir_assignment(new(ir) ir_dereference_variable(new_var),
then_return-value, NULL);
- then_return-insert_before(assign);
- then_return-remove();
+ then_return-replace_with(assign);
assign = new(ir) ir_assignment(new(ir) ir_dereference_variable(new_var),
else_return-value, NULL);
- else_return-insert_before(assign);
- else_return-remove();
+ else_return-replace_with(assign);
ir_dereference_variable *deref = new(ir)
ir_dereference_variable(new_var);
ir-insert_after(new(ir) ir_return(deref));
diff --git a/src/glsl/ir_vec_index_to_cond_assign.cpp
b/src/glsl/ir_vec_index_to_cond_assign.cpp
index 7e04389..dbc6f9a 100644
--- a/src/glsl/ir_vec_index_to_cond_assign.cpp
+++ b/src/glsl/ir_vec_index_to_cond_assign.cpp
@@ -218,8 +218,7 @@ ir_vec_index_to_cond_assign_visitor::visit_enter(ir_call
*ir)
ir_rvalue *new_param = convert_vec_index_to_cond_assign(param);
if (new_param != param) {
-param-insert_before(new_param);
-param-remove();
+param-replace_with(new_param);
}
}
diff --git a/src/glsl/ir_vec_index_to_swizzle.cpp
b/src/glsl/ir_vec_index_to_swizzle.cpp
index abeb43c..1e170cb 100644
--- a/src/glsl/ir_vec_index_to_swizzle.cpp
+++ b/src/glsl/ir_vec_index_to_swizzle.cpp
@@ -121,8 +121,7 @@ ir_vec_index_to_swizzle_visitor::visit_enter(ir_call *ir)
ir_rvalue *new_param = convert_vec_index_to_swizzle(param);
if (new_param != param) {
-param-insert_before(new_param);
-param-remove();
+param-replace_with(new_param);
}
}
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Mesa (glsl2): glsl2: Add some comments.
Module: Mesa Branch: glsl2 Commit: 0048c7aef82b17c6bd160f49125a91a70cbf2b55 URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=0048c7aef82b17c6bd160f49125a91a70cbf2b55 Author: Kenneth Graunke kenn...@whitecape.org Date: Mon Jul 19 23:45:23 2010 -0700 glsl2: Add some comments. --- src/glsl/ast_function.cpp |5 - 1 files changed, 4 insertions(+), 1 deletions(-) diff --git a/src/glsl/ast_function.cpp b/src/glsl/ast_function.cpp index 2348bdf..1122521 100644 --- a/src/glsl/ast_function.cpp +++ b/src/glsl/ast_function.cpp @@ -164,6 +164,9 @@ match_function_by_name(exec_list *instructions, const char *name, /** * Perform automatic type conversion of constructor parameters + * + * This implements the rules in the Conversion and Scalar Constructors + * section (GLSL 1.10 section 5.4.1), not the Implicit Conversions rules. */ static ir_rvalue * convert_component(ir_rvalue *src, const glsl_type *desired_type) @@ -220,11 +223,11 @@ convert_component(ir_rvalue *src, const glsl_type *desired_type) assert(result != NULL); + /* Try constant folding; it may fold in the conversion we just added. */ ir_constant *const constant = result-constant_expression_value(); return (constant != NULL) ? (ir_rvalue *) constant : (ir_rvalue *) result; } - /** * Dereference a specific component from a scalar, vector, or matrix */ ___ mesa-commit mailing list mesa-commit@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-commit
Mesa (glsl2): ir_constant_expression: Remove open coded equality comparisons.
Module: Mesa
Branch: glsl2
Commit: 3163f87463e6d0123c4f95bd76a658cb1e5d0843
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=3163f87463e6d0123c4f95bd76a658cb1e5d0843
Author: Kenneth Graunke kenn...@whitecape.org
Date: Tue Jul 20 03:01:54 2010 -0700
ir_constant_expression: Remove open coded equality comparisons.
The ir_constant::has_value method already does this.
---
src/glsl/ir_constant_expression.cpp | 40 +-
1 files changed, 2 insertions(+), 38 deletions(-)
diff --git a/src/glsl/ir_constant_expression.cpp
b/src/glsl/ir_constant_expression.cpp
index cb07f38..b0333db 100644
--- a/src/glsl/ir_constant_expression.cpp
+++ b/src/glsl/ir_constant_expression.cpp
@@ -603,46 +603,10 @@ ir_expression::constant_expression_value()
break;
case ir_binop_equal:
- data.b[0] = true;
- for (unsigned c = 0; c op[0]-type-components(); c++) {
-switch (op[0]-type-base_type) {
-case GLSL_TYPE_UINT:
- data.b[0] = data.b[0] op[0]-value.u[c] == op[1]-value.u[c];
- break;
-case GLSL_TYPE_INT:
- data.b[0] = data.b[0] op[0]-value.i[c] == op[1]-value.i[c];
- break;
-case GLSL_TYPE_FLOAT:
- data.b[0] = data.b[0] op[0]-value.f[c] == op[1]-value.f[c];
- break;
-case GLSL_TYPE_BOOL:
- data.b[0] = data.b[0] op[0]-value.b[c] == op[1]-value.b[c];
- break;
-default:
- assert(0);
-}
- }
+ data.b[0] = op[0]-has_value(op[1]);
break;
case ir_binop_nequal:
- data.b[0] = false;
- for (unsigned c = 0; c op[0]-type-components(); c++) {
-switch (op[0]-type-base_type) {
-case GLSL_TYPE_UINT:
- data.b[0] = data.b[0] || op[0]-value.u[c] != op[1]-value.u[c];
- break;
-case GLSL_TYPE_INT:
- data.b[0] = data.b[0] || op[0]-value.i[c] != op[1]-value.i[c];
- break;
-case GLSL_TYPE_FLOAT:
- data.b[0] = data.b[0] || op[0]-value.f[c] != op[1]-value.f[c];
- break;
-case GLSL_TYPE_BOOL:
- data.b[0] = data.b[0] || op[0]-value.b[c] != op[1]-value.b[c];
- break;
-default:
- assert(0);
-}
- }
+ data.b[0] = !op[0]-has_value(op[1]);
break;
default:
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Mesa (glsl2): ir_constant_expression: Add support for ir_unop_u2f.
Module: Mesa
Branch: glsl2
Commit: 46d6b8d1ba09d9d6844ce99a30416283004f77c6
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=46d6b8d1ba09d9d6844ce99a30416283004f77c6
Author: Kenneth Graunke kenn...@whitecape.org
Date: Tue Jul 20 13:01:56 2010 -0700
ir_constant_expression: Add support for ir_unop_u2f.
Also make ir_unop_i2f only operate on signed integers.
---
src/glsl/ir_constant_expression.cpp | 14 --
1 files changed, 8 insertions(+), 6 deletions(-)
diff --git a/src/glsl/ir_constant_expression.cpp
b/src/glsl/ir_constant_expression.cpp
index b0333db..acfbb86 100644
--- a/src/glsl/ir_constant_expression.cpp
+++ b/src/glsl/ir_constant_expression.cpp
@@ -87,13 +87,15 @@ ir_expression::constant_expression_value()
}
break;
case ir_unop_i2f:
- assert(op[0]-type-base_type == GLSL_TYPE_UINT ||
-op[0]-type-base_type == GLSL_TYPE_INT);
+ assert(op[0]-type-base_type == GLSL_TYPE_INT);
for (unsigned c = 0; c op[0]-type-components(); c++) {
-if (op[0]-type-base_type == GLSL_TYPE_INT)
- data.f[c] = op[0]-value.i[c];
-else
- data.f[c] = op[0]-value.u[c];
+data.f[c] = op[0]-value.i[c];
+ }
+ break;
+ case ir_unop_u2f:
+ assert(op[0]-type-base_type == GLSL_TYPE_UINT);
+ for (unsigned c = 0; c op[0]-type-components(); c++) {
+data.f[c] = op[0]-value.u[c];
}
break;
case ir_unop_b2f:
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Mesa (glsl2): ast_to_hir: Fix bug in constant initializers.
Module: Mesa
Branch: glsl2
Commit: e1d71850faba23d1bea3858a8c2e05a45fd21143
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=e1d71850faba23d1bea3858a8c2e05a45fd21143
Author: Kenneth Graunke kenn...@whitecape.org
Date: Tue Jul 20 03:53:47 2010 -0700
ast_to_hir: Fix bug in constant initializers.
Implicit conversions were not being performed, nor was there any
type checking - it was possible to have, say, var-type == float
and var-constant_value-type == int. Later use of the constant
expression would trigger an assertion.
Fixes piglit test const-implicit-conversion.frag.
---
src/glsl/ast_to_hir.cpp | 10 ++
1 files changed, 10 insertions(+), 0 deletions(-)
diff --git a/src/glsl/ast_to_hir.cpp b/src/glsl/ast_to_hir.cpp
index e9257ee..99a2183 100644
--- a/src/glsl/ast_to_hir.cpp
+++ b/src/glsl/ast_to_hir.cpp
@@ -1804,6 +1804,16 @@ ast_declarator_list::hir(exec_list *instructions,
* declaration.
*/
if (this-type-qualifier.constant || this-type-qualifier.uniform) {
+ ir_rvalue *new_rhs = validate_assignment(state, var-type, rhs);
+ if (new_rhs != NULL) {
+ rhs = new_rhs;
+ } else {
+ _mesa_glsl_error(initializer_loc, state,
+ initializer of type %s cannot be assigned to
+ variable of type %s,
+ rhs-type-name, var-type-name);
+ }
+
ir_constant *constant_value = rhs-constant_expression_value();
if (!constant_value) {
_mesa_glsl_error( initializer_loc, state,
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Mesa (glsl2): glsl2: Emit array constructors inline.
Module: Mesa
Branch: glsl2
Commit: 13a19745d46d383fa7fc148ce129150ebde151b7
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=13a19745d46d383fa7fc148ce129150ebde151b7
Author: Kenneth Graunke kenn...@whitecape.org
Date: Mon Jul 19 23:49:58 2010 -0700
glsl2: Emit array constructors inline.
---
src/glsl/ast_function.cpp | 64 +---
1 files changed, 53 insertions(+), 11 deletions(-)
diff --git a/src/glsl/ast_function.cpp b/src/glsl/ast_function.cpp
index 1122521..1982c83 100644
--- a/src/glsl/ast_function.cpp
+++ b/src/glsl/ast_function.cpp
@@ -321,22 +321,64 @@ process_array_constructor(exec_list *instructions,
assert(constructor_type-length == parameter_count);
}
- ir_function *f = state-symbols-get_function(constructor_type-name);
+ bool all_parameters_are_constant = true;
- /* If the constructor for this type of array does not exist, generate the
-* prototype and add it to the symbol table.
-*/
- if (f == NULL) {
- f = constructor_type-generate_constructor(state-symbols);
+ /* Type cast each parameter and, if possible, fold constants. */
+ foreach_list_safe(n, actual_parameters) {
+ ir_rvalue *ir = (ir_rvalue *) n;
+ ir_rvalue *result = ir;
+
+ /* Apply implicit conversions (not the scalar constructor rules!) */
+ if (constructor_type-element_type()-is_float()) {
+const glsl_type *desired_type =
+ glsl_type::get_instance(GLSL_TYPE_FLOAT,
+ ir-type-vector_elements,
+ ir-type-matrix_columns);
+result = convert_component(ir, desired_type);
+ }
+
+ if (result-type != constructor_type-element_type()) {
+_mesa_glsl_error(loc, state, type error in array constructor:
+ expected: %s, found %s,
+ constructor_type-element_type()-name,
+ result-type-name);
+ }
+
+ /* Attempt to convert the parameter to a constant valued expression.
+ * After doing so, track whether or not all the parameters to the
+ * constructor are trivially constant valued expressions.
+ */
+ ir_rvalue *const constant = result-constant_expression_value();
+
+ if (constant != NULL)
+ result = constant;
+ else
+ all_parameters_are_constant = false;
+
+ ir-replace_with(result);
}
- ir_rvalue *const r =
- process_call(instructions, f, loc, actual_parameters, state);
+ if (all_parameters_are_constant) {
+ /* FINISHME: Add support for generating constant arrays. */
+ }
- assert(r != NULL);
- assert(r-type-is_error() || (r-type == constructor_type));
+ ir_variable *var = new(ctx) ir_variable(constructor_type, array_ctor,
+ ir_var_temporary);
+ instructions-push_tail(var);
- return r;
+ int i = 0;
+ foreach_list(node, actual_parameters) {
+ ir_rvalue *rhs = (ir_rvalue *) node;
+ ir_rvalue *lhs = new(ctx) ir_dereference_array(var,
+new(ctx) ir_constant(i));
+
+ ir_instruction *assignment = new(ctx) ir_assignment(lhs, rhs, NULL);
+ instructions-push_tail(assignment);
+
+ i++;
+ }
+
+ return new(ctx) ir_dereference_variable(var);
}
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Mesa (glsl2): glsl2: Extend ir_constant to store constant arrays, and generate them.
Module: Mesa
Branch: glsl2
Commit: 74e1802f5dd8921750851abc6128e4073602d405
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=74e1802f5dd8921750851abc6128e4073602d405
Author: Kenneth Graunke kenn...@whitecape.org
Date: Tue Jul 20 01:06:33 2010 -0700
glsl2: Extend ir_constant to store constant arrays, and generate them.
Since GLSL permits arrays of structures, we need to store each element
as an ir_constant*, not just ir_constant_data.
Fixes parser tests const-array-01.frag, const-array-03.frag,
const-array-04.frag, const-array-05.frag, though 03 and 04 generate the
wrong code.
---
src/glsl/ast_function.cpp |5 ++---
src/glsl/ir.cpp | 23 +--
src/glsl/ir.h |6 ++
src/glsl/ir_clone.cpp | 11 +++
4 files changed, 40 insertions(+), 5 deletions(-)
diff --git a/src/glsl/ast_function.cpp b/src/glsl/ast_function.cpp
index 1982c83..855f27f 100644
--- a/src/glsl/ast_function.cpp
+++ b/src/glsl/ast_function.cpp
@@ -358,9 +358,8 @@ process_array_constructor(exec_list *instructions,
ir-replace_with(result);
}
- if (all_parameters_are_constant) {
- /* FINISHME: Add support for generating constant arrays. */
- }
+ if (all_parameters_are_constant)
+ return new(ctx) ir_constant(constructor_type, actual_parameters);
ir_variable *var = new(ctx) ir_variable(constructor_type, array_ctor,
ir_var_temporary);
diff --git a/src/glsl/ir.cpp b/src/glsl/ir.cpp
index a273296..d3f7302 100644
--- a/src/glsl/ir.cpp
+++ b/src/glsl/ir.cpp
@@ -253,9 +253,20 @@ ir_constant::ir_constant(const struct glsl_type *type,
exec_list *value_list)
this-ir_type = ir_type_constant;
this-type = type;
- /* FINISHME: Support array types. */
assert(type-is_scalar() || type-is_vector() || type-is_matrix()
- || type-is_record());
+ || type-is_record() || type-is_array());
+
+ if (type-is_array()) {
+ this-array_elements = talloc_array(this, ir_constant *, type-length);
+ unsigned i = 0;
+ foreach_list(node, value_list) {
+ir_constant *value = (ir_constant *) node;
+assert(value-as_constant() != NULL);
+
+this-array_elements[i++] = value;
+ }
+ return;
+ }
/* If the constant is a record, the types of each of the entries in
* value_list must be a 1-for-1 match with the structure components. Each
@@ -378,6 +389,14 @@ ir_constant::get_uint_component(unsigned i) const
return 0;
}
+ir_constant *
+ir_constant::get_array_element(unsigned i) const
+{
+ assert(this-type-is_array());
+ assert(i this-type-length);
+
+ return array_elements[i];
+}
ir_constant *
ir_constant::get_record_field(const char *name)
diff --git a/src/glsl/ir.h b/src/glsl/ir.h
index 3a643fc..c73bf4c 100644
--- a/src/glsl/ir.h
+++ b/src/glsl/ir.h
@@ -1268,6 +1268,8 @@ public:
unsigned get_uint_component(unsigned i) const;
/*...@}*/
+ ir_constant *get_array_element(unsigned i) const;
+
ir_constant *get_record_field(const char *name);
/**
@@ -1284,6 +1286,10 @@ public:
*/
union ir_constant_data value;
+ /* Array elements */
+ ir_constant **array_elements;
+
+ /* Structure fields */
exec_list components;
private:
diff --git a/src/glsl/ir_clone.cpp b/src/glsl/ir_clone.cpp
index f7e8794..a3e4a3a 100644
--- a/src/glsl/ir_clone.cpp
+++ b/src/glsl/ir_clone.cpp
@@ -337,6 +337,17 @@ ir_constant::clone(struct hash_table *ht) const
return c;
}
+ case GLSL_TYPE_ARRAY: {
+ ir_constant *c = new(ctx) ir_constant;
+
+ c-type = this-type;
+ c-array_elements = talloc_array(c, ir_constant *, this-type-length);
+ for (unsigned i = 0; i this-type-length; i++) {
+c-array_elements[i] = this-array_elements[i]-clone(NULL);
+ }
+ return c;
+ }
+
default:
assert(!Should not get here.); break;
return NULL;
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Mesa (glsl2): ir_print_visitor: Remove commas between ir_constant' s components.
Module: Mesa
Branch: glsl2
Commit: 7ea977a15c05f4a638478b7a5b8ca78454cecf41
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=7ea977a15c05f4a638478b7a5b8ca78454cecf41
Author: Kenneth Graunke kenn...@whitecape.org
Date: Tue Jul 20 01:23:12 2010 -0700
ir_print_visitor: Remove commas between ir_constant's components.
The IR reader does not expect commas.
---
src/glsl/ir_print_visitor.cpp |2 +-
1 files changed, 1 insertions(+), 1 deletions(-)
diff --git a/src/glsl/ir_print_visitor.cpp b/src/glsl/ir_print_visitor.cpp
index 6f867e3..05ac302 100644
--- a/src/glsl/ir_print_visitor.cpp
+++ b/src/glsl/ir_print_visitor.cpp
@@ -272,7 +272,7 @@ void ir_print_visitor::visit(ir_constant *ir)
for (unsigned i = 0; i ir-type-components(); i++) {
if (i != 0)
-printf(, );
+printf( );
switch (base_type-base_type) {
case GLSL_TYPE_UINT: printf(%u, ir-value.u[i]); break;
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Mesa (glsl2): ir_print_visitor: Print out constant arrays.
Module: Mesa
Branch: glsl2
Commit: 9930d18c2aefad12152d12bc251d02ae1c1593bc
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=9930d18c2aefad12152d12bc251d02ae1c1593bc
Author: Kenneth Graunke kenn...@whitecape.org
Date: Tue Jul 20 01:28:09 2010 -0700
ir_print_visitor: Print out constant arrays.
---
src/glsl/ir_print_visitor.cpp | 24 ++--
1 files changed, 14 insertions(+), 10 deletions(-)
diff --git a/src/glsl/ir_print_visitor.cpp b/src/glsl/ir_print_visitor.cpp
index 05ac302..1eb073f 100644
--- a/src/glsl/ir_print_visitor.cpp
+++ b/src/glsl/ir_print_visitor.cpp
@@ -270,16 +270,20 @@ void ir_print_visitor::visit(ir_constant *ir)
print_type(ir-type);
printf( ();
- for (unsigned i = 0; i ir-type-components(); i++) {
- if (i != 0)
-printf( );
-
- switch (base_type-base_type) {
- case GLSL_TYPE_UINT: printf(%u, ir-value.u[i]); break;
- case GLSL_TYPE_INT: printf(%d, ir-value.i[i]); break;
- case GLSL_TYPE_FLOAT: printf(%f, ir-value.f[i]); break;
- case GLSL_TYPE_BOOL: printf(%d, ir-value.b[i]); break;
- default: assert(0);
+ if (ir-type-is_array()) {
+ for (unsigned i = 0; i ir-type-length; i++)
+ir-get_array_element(i)-accept(this);
+ } else {
+ for (unsigned i = 0; i ir-type-components(); i++) {
+if (i != 0)
+ printf( );
+switch (base_type-base_type) {
+case GLSL_TYPE_UINT: printf(%u, ir-value.u[i]); break;
+case GLSL_TYPE_INT: printf(%d, ir-value.i[i]); break;
+case GLSL_TYPE_FLOAT: printf(%f, ir-value.f[i]); break;
+case GLSL_TYPE_BOOL: printf(%d, ir-value.b[i]); break;
+default: assert(0);
+}
}
}
printf()) );
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Mesa (glsl2): ir_reader: Add support for reading constant arrays.
Module: Mesa
Branch: glsl2
Commit: ef2c38b2450eb366a2e6f6a46d1725aa6c14d74b
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=ef2c38b2450eb366a2e6f6a46d1725aa6c14d74b
Author: Kenneth Graunke kenn...@whitecape.org
Date: Tue Jul 20 01:53:07 2010 -0700
ir_reader: Add support for reading constant arrays.
---
src/glsl/ir_reader.cpp | 29 +++--
1 files changed, 27 insertions(+), 2 deletions(-)
diff --git a/src/glsl/ir_reader.cpp b/src/glsl/ir_reader.cpp
index 8b4be41..2248e92 100644
--- a/src/glsl/ir_reader.cpp
+++ b/src/glsl/ir_reader.cpp
@@ -753,7 +753,7 @@ read_constant(_mesa_glsl_parse_state *st, s_list *list)
{
void *ctx = st;
if (list-length() != 3) {
- ir_read_error(st, list, expected (constant type (num ... num)));
+ ir_read_error(st, list, expected (constant type (...)));
return NULL;
}
@@ -764,10 +764,35 @@ read_constant(_mesa_glsl_parse_state *st, s_list *list)
s_list *values = SX_AS_LIST(type_expr-next);
if (values == NULL) {
- ir_read_error(st, list, expected (constant type (num ... num)));
+ ir_read_error(st, list, expected (constant type (...)));
return NULL;
}
+ if (type-is_array()) {
+ const unsigned elements_supplied = values-length();
+ if (elements_supplied != type-length) {
+ir_read_error(st, values, expected exactly %u array elements,
+ given %u, type-length, elements_supplied);
+return NULL;
+ }
+
+ exec_list elements;
+ foreach_iter(exec_list_iterator, it, values-subexpressions) {
+s_expression *expr = (s_expression *) it.get();
+s_list *elt = SX_AS_LIST(expr);
+if (elt == NULL) {
+ ir_read_error(st, expr, expected (constant ...) array element);
+ return NULL;
+}
+
+ir_constant *ir_elt = read_constant(st, elt);
+if (ir_elt == NULL)
+ return NULL;
+elements.push_tail(ir_elt);
+ }
+ return new(ctx) ir_constant(type, elements);
+ }
+
const glsl_type *const base_type = type-get_base_type();
ir_constant_data data;
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Mesa (glsl2): ir_constant_expression: Add support for array == and !=.
Module: Mesa
Branch: glsl2
Commit: 9a6d40fbfb679f01412c1fcc9d767c20a22246d8
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=9a6d40fbfb679f01412c1fcc9d767c20a22246d8
Author: Kenneth Graunke kenn...@whitecape.org
Date: Tue Jul 20 03:08:32 2010 -0700
ir_constant_expression: Add support for array == and !=.
Piglit parser tests const-array-03.frag and const-array-04.frag now
generate the correct code.
---
src/glsl/ir.cpp | 11 ---
src/glsl/ir_constant_expression.cpp | 17 -
2 files changed, 24 insertions(+), 4 deletions(-)
diff --git a/src/glsl/ir.cpp b/src/glsl/ir.cpp
index d3f7302..5054ec7 100644
--- a/src/glsl/ir.cpp
+++ b/src/glsl/ir.cpp
@@ -430,9 +430,14 @@ ir_constant::has_value(const ir_constant *c) const
if (this-type != c-type)
return false;
- /* FINISHME: This will probably also handle constant arrays as soon as those
-* FINISHME: are supported.
-*/
+ if (this-type-is_array()) {
+ for (unsigned i = 0; i this-type-length; i++) {
+if (this-array_elements[i]-has_value(c-array_elements[i]))
+ return false;
+ }
+ return true;
+ }
+
if (this-type-base_type == GLSL_TYPE_STRUCT) {
const exec_node *a_node = this-components.head;
const exec_node *b_node = c-components.head;
diff --git a/src/glsl/ir_constant_expression.cpp
b/src/glsl/ir_constant_expression.cpp
index d72a57c..5bef17c 100644
--- a/src/glsl/ir_constant_expression.cpp
+++ b/src/glsl/ir_constant_expression.cpp
@@ -73,6 +73,22 @@ ir_expression::constant_expression_value()
components = op[1]-type-components();
}
+ void *ctx = talloc_parent(this);
+
+ /* Handle array operations here, rather than below. */
+ if (op[0]-type-is_array()) {
+ assert(op[1] != NULL op[1]-type-is_array());
+ switch (this-operation) {
+ case ir_binop_equal:
+return new(ctx) ir_constant(op[0]-has_value(op[1]));
+ case ir_binop_nequal:
+return new(ctx) ir_constant(!op[0]-has_value(op[1]));
+ default:
+break;
+ }
+ return NULL;
+ }
+
switch (this-operation) {
case ir_unop_logic_not:
assert(op[0]-type-base_type == GLSL_TYPE_BOOL);
@@ -616,7 +632,6 @@ ir_expression::constant_expression_value()
return NULL;
}
- void *ctx = talloc_parent(this);
return new(ctx) ir_constant(this-type, data);
}
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Mesa (glsl2): ir_constant_expression: Add support for constant arrays.
Module: Mesa
Branch: glsl2
Commit: a096fa747611472965cf0f953bfe2757fc80383c
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=a096fa747611472965cf0f953bfe2757fc80383c
Author: Kenneth Graunke kenn...@whitecape.org
Date: Tue Jul 20 01:31:29 2010 -0700
ir_constant_expression: Add support for constant arrays.
Fixes piglit test const-array-02.frag.
---
src/glsl/ir_constant_expression.cpp |3 ++-
1 files changed, 2 insertions(+), 1 deletions(-)
diff --git a/src/glsl/ir_constant_expression.cpp
b/src/glsl/ir_constant_expression.cpp
index acfbb86..d72a57c 100644
--- a/src/glsl/ir_constant_expression.cpp
+++ b/src/glsl/ir_constant_expression.cpp
@@ -712,7 +712,8 @@ ir_dereference_array::constant_expression_value()
return new(ctx) ir_constant(array, component);
} else {
-/* FINISHME: Handle access of constant arrays. */
+const unsigned index = idx-value.u[0];
+return array-get_array_element(index)-clone(NULL);
}
}
return NULL;
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Mesa (glsl2): glsl2: Update TODO.
Module: Mesa Branch: glsl2 Commit: e9384d1d7fdf06b6345b3be0a70a294b90eac96e URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=e9384d1d7fdf06b6345b3be0a70a294b90eac96e Author: Kenneth Graunke kenn...@whitecape.org Date: Tue Jul 20 13:04:23 2010 -0700 glsl2: Update TODO. --- src/glsl/TODO | 23 --- 1 files changed, 0 insertions(+), 23 deletions(-) diff --git a/src/glsl/TODO b/src/glsl/TODO index b2baa13..07ac5f5 100644 --- a/src/glsl/TODO +++ b/src/glsl/TODO @@ -1,30 +1,7 @@ -- Handle currently unsupported constant expression types - - ir_unop_sign - - ir_unop_exp2 - - ir_unop_log2 - - ir_unop_u2f - - ir_unop_trunc - - ir_unop_ceil - - ir_unop_floor - - ir_unop_sin - - ir_unop_cos - - ir_binop_min - - ir_binop_max - - ir_binop_pow - - Handle constant expressions of (struct == struct) - Handle constant expressions of (struct != struct) -- Add support to ir_constant for array constants Arrays can only be - - declared 'const' in GLSL 1.20+. This is because there are no -array constructors in GLSL 1.10, and any variable declared as -'const' must have an initializer. - -- Handle constant expressions of (array == array) - -- Handle constant expressions of (array != array) - - Treat built-in functions with constant parameters as constant expressions. - Rewrite all built-in functions return a single expression. - Modify the HIR generator for functions to automatically inline built-in ___ mesa-commit mailing list mesa-commit@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-commit
Mesa (master): softpipe: add missing support for PIPE_FORMAT_S8_USCALED surfaces
Module: Mesa
Branch: master
Commit: 7cd6a6cc995407a19254401511dafd943299b8ac
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=7cd6a6cc995407a19254401511dafd943299b8ac
Author: Brian Paul bri...@vmware.com
Date: Wed Jul 21 16:48:45 2010 -0600
softpipe: add missing support for PIPE_FORMAT_S8_USCALED surfaces
And remove checks of surface depth bits. The state tracker should
not turn on depth/stencil testing if the framebuffer doesn't have
depth/stencil.
---
src/gallium/drivers/softpipe/sp_quad_depth_test.c | 40 ++--
1 files changed, 20 insertions(+), 20 deletions(-)
diff --git a/src/gallium/drivers/softpipe/sp_quad_depth_test.c
b/src/gallium/drivers/softpipe/sp_quad_depth_test.c
index 72117c2..5590d40 100644
--- a/src/gallium/drivers/softpipe/sp_quad_depth_test.c
+++ b/src/gallium/drivers/softpipe/sp_quad_depth_test.c
@@ -82,7 +82,7 @@ get_depth_stencil_values( struct depth_data *data,
data-b[j] = tile-data.depth32[y][x] 0xff;
data-stencilVals[j] = tile-data.depth32[y][x] 24;
}
- break;
+ break;
case PIPE_FORMAT_X8Z24_UNORM:
case PIPE_FORMAT_S8_USCALED_Z24_UNORM:
for (j = 0; j QUAD_SIZE; j++) {
@@ -92,6 +92,14 @@ get_depth_stencil_values( struct depth_data *data,
data-stencilVals[j] = tile-data.depth32[y][x] 0xff;
}
break;
+ case PIPE_FORMAT_S8_USCALED:
+ for (j = 0; j QUAD_SIZE; j++) {
+ int x = quad-input.x0 % TILE_SIZE + (j 1);
+ int y = quad-input.y0 % TILE_SIZE + (j 1);
+ data-b[j] = 0;
+ data-stencilVals[j] = tile-data.stencil8[y][x];
+ }
+ break;
default:
assert(0);
}
@@ -227,6 +235,14 @@ write_depth_stencil_values( struct depth_data *data,
tile-data.depth32[y][x] = data-b[j] 8;
}
break;
+ case PIPE_FORMAT_S8_USCALED:
+ for (j = 0; j QUAD_SIZE; j++) {
+ int x = quad-input.x0 % TILE_SIZE + (j 1);
+ int y = quad-input.y0 % TILE_SIZE + (j 1);
+ tile-data.stencil8[y][x] = data-stencilVals[j];
+ }
+ break;
+
default:
assert(0);
}
@@ -661,20 +677,6 @@ static unsigned mask_count[16] =
-/** helper to get number of Z buffer bits */
-static unsigned
-get_depth_bits(struct quad_stage *qs)
-{
- struct pipe_surface *zsurf = qs-softpipe-framebuffer.zsbuf;
- if (zsurf)
- return util_format_get_component_bits(zsurf-format,
-UTIL_FORMAT_COLORSPACE_ZS, 0);
- else
- return 0;
-}
-
-
-
/**
* General depth/stencil test function. Used when there's no fast-path.
*/
@@ -693,9 +695,8 @@ depth_test_quads_fallback(struct quad_stage *qs,
nr = alpha_test_quads(qs, quads, nr);
}
- if (get_depth_bits(qs) 0
- (qs-softpipe-depth_stencil-depth.enabled ||
-qs-softpipe-depth_stencil-stencil[0].enabled)) {
+ if (qs-softpipe-depth_stencil-depth.enabled ||
+ qs-softpipe-depth_stencil-stencil[0].enabled) {
data.ps = qs-softpipe-framebuffer.zsbuf;
data.format = data.ps-format;
@@ -794,8 +795,7 @@ choose_depth_test(struct quad_stage *qs,
boolean alpha = qs-softpipe-depth_stencil-alpha.enabled;
- boolean depth = (get_depth_bits(qs) 0
-qs-softpipe-depth_stencil-depth.enabled);
+ boolean depth = qs-softpipe-depth_stencil-depth.enabled;
unsigned depthfunc = qs-softpipe-depth_stencil-depth.func;
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Mesa (master): glx: Move __driContext field out of __GLXcontextRec
Module: Mesa
Branch: master
Commit: f679640868ae6ef700d8672702c31ba2515220a7
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=f679640868ae6ef700d8672702c31ba2515220a7
Author: Kristian Høgsberg k...@bitplanet.net
Date: Wed Jul 21 13:55:30 2010 -0400
glx: Move __driContext field out of __GLXcontextRec
---
src/glx/dri2_glx.c |6 +++---
src/glx/glxclient.h |1 -
2 files changed, 3 insertions(+), 4 deletions(-)
diff --git a/src/glx/dri2_glx.c b/src/glx/dri2_glx.c
index be8671d..6ce5ae6 100644
--- a/src/glx/dri2_glx.c
+++ b/src/glx/dri2_glx.c
@@ -168,7 +168,6 @@ dri2CreateContext(__GLXscreenConfigs *base,
pcp-driContext =
(*psc-dri2-createNewContext) (psc-driScreen,
config-driConfig, shared, pcp);
- gc-__driContext = pcp-driContext;
if (pcp-driContext == NULL) {
Xfree(pcp);
@@ -635,6 +634,7 @@ dri2_bind_tex_image(Display * dpy,
struct dri2_display *pdp =
(struct dri2_display *) dpyPriv-dri2Display;
struct dri2_screen *psc = (struct dri2_screen *) base-psc;
+ struct dri2_context *pcp = (struct dri2_context *) gc-driContext;
if (pdraw != NULL) {
@@ -645,13 +645,13 @@ dri2_bind_tex_image(Display * dpy,
if (psc-texBuffer-base.version = 2
psc-texBuffer-setTexBuffer2 != NULL) {
-(*psc-texBuffer-setTexBuffer2) (gc-__driContext,
+(*psc-texBuffer-setTexBuffer2) (pcp-driContext,
pdraw-base.textureTarget,
pdraw-base.textureFormat,
pdraw-driDrawable);
}
else {
-(*psc-texBuffer-setTexBuffer) (gc-__driContext,
+(*psc-texBuffer-setTexBuffer) (pcp-driContext,
pdraw-base.textureTarget,
pdraw-driDrawable);
}
diff --git a/src/glx/glxclient.h b/src/glx/glxclient.h
index f788b7a..67f69b8 100644
--- a/src/glx/glxclient.h
+++ b/src/glx/glxclient.h
@@ -418,7 +418,6 @@ struct __GLXcontextRec
Bool do_destroy;
#else
__GLXDRIcontext *driContext;
- __DRIcontext *__driContext;
#endif
#endif
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Mesa (master): glx: Move last few dri_interface.h types out of glxclient. h and drop include
Module: Mesa
Branch: master
Commit: 7a66e549583a3168f05acc7df1e872d218fd670d
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=7a66e549583a3168f05acc7df1e872d218fd670d
Author: Kristian Høgsberg k...@bitplanet.net
Date: Wed Jul 21 14:09:49 2010 -0400
glx: Move last few dri_interface.h types out of glxclient.h and drop include
---
src/glx/dri_common.c | 12 +++-
src/glx/dri_common.h |2 ++
src/glx/glxclient.h |8 +++-
src/glx/glxcmds.c|9 +++--
4 files changed, 19 insertions(+), 12 deletions(-)
diff --git a/src/glx/dri_common.c b/src/glx/dri_common.c
index eb9f1e4..9b7da3e 100644
--- a/src/glx/dri_common.c
+++ b/src/glx/dri_common.c
@@ -159,10 +159,20 @@ driOpenDriver(const char *driverName)
return handle;
}
+static GLboolean
+__driGetMSCRate(__DRIdrawable *draw,
+ int32_t * numerator, int32_t * denominator,
+ void *loaderPrivate)
+{
+ __GLXDRIdrawable *glxDraw = loaderPrivate;
+
+ return __glxGetMscRate(glxDraw, numerator, denominator);
+}
+
_X_HIDDEN const __DRIsystemTimeExtension systemTimeExtension = {
{__DRI_SYSTEM_TIME, __DRI_SYSTEM_TIME_VERSION},
__glXGetUST,
- __driGetMscRateOML
+ __driGetMSCRate
};
#define __ATTRIB(attrib, field) \
diff --git a/src/glx/dri_common.h b/src/glx/dri_common.h
index 4410496..f3da50e 100644
--- a/src/glx/dri_common.h
+++ b/src/glx/dri_common.h
@@ -36,6 +36,8 @@
#ifndef _DRI_COMMON_H
#define _DRI_COMMON_H
+#include GL/internal/dri_interface.h
+
typedef struct __GLXDRIconfigPrivateRec __GLXDRIconfigPrivate;
struct __GLXDRIconfigPrivateRec
diff --git a/src/glx/glxclient.h b/src/glx/glxclient.h
index 67f69b8..26f2885 100644
--- a/src/glx/glxclient.h
+++ b/src/glx/glxclient.h
@@ -101,8 +101,6 @@ extern void DRI_glXUseXFont(Font font, int first, int
count, int listbase);
#if defined(GLX_DIRECT_RENDERING) !defined(GLX_USE_APPLEGL)
-#include GL/internal/dri_interface.h
-
/**
* Display dependent methods. This structure is initialized during the
* \c driCreateDisplay call.
@@ -786,9 +784,9 @@ extern GLboolean __glXGetMscRateOML(Display * dpy,
GLXDrawable drawable,
int32_t * denominator);
#if defined(GLX_DIRECT_RENDERING) !defined(GLX_USE_APPLEGL)
-GLboolean
-__driGetMscRateOML(__DRIdrawable * draw,
- int32_t * numerator, int32_t * denominator, void *private);
+extern GLboolean
+__glxGetMscRate(__GLXDRIdrawable *glxDraw,
+ int32_t * numerator, int32_t * denominator);
/* So that dri2.c:DRI2WireToEvent() can access
* glx_info-codes-first_event */
diff --git a/src/glx/glxcmds.c b/src/glx/glxcmds.c
index 6753394..a9f6b17 100644
--- a/src/glx/glxcmds.c
+++ b/src/glx/glxcmds.c
@@ -2377,17 +2377,14 @@ __glXGetSyncValuesOML(Display * dpy, GLXDrawable
drawable,
#if defined(GLX_DIRECT_RENDERING) !defined(GLX_USE_APPLEGL)
_X_HIDDEN GLboolean
-__driGetMscRateOML(__DRIdrawable * draw,
- int32_t * numerator, int32_t * denominator, void *private)
+__glxGetMscRate(__GLXDRIdrawable *glxDraw,
+ int32_t * numerator, int32_t * denominator)
{
#ifdef XF86VIDMODE
__GLXscreenConfigs *psc;
XF86VidModeModeLine mode_line;
int dot_clock;
int i;
- __GLXDRIdrawable *glxDraw = private;
-
- (void) draw;
psc = glxDraw-psc;
if (XF86VidModeQueryVersion(psc-dpy, i, i)
@@ -2471,7 +2468,7 @@ __glXGetMscRateOML(Display * dpy, GLXDrawable drawable,
if (draw == NULL)
return False;
- return __driGetMscRateOML(NULL, numerator, denominator, draw);
+ return __glxGetMscRate(draw, numerator, denominator);
#else
(void) dpy;
(void) drawable;
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Mesa (master): i965: Add disasm for dataport reads (register unspilling).
Module: Mesa
Branch: master
Commit: 0ecf5128a43ed1eff980825e425a030d2b71e50b
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=0ecf5128a43ed1eff980825e425a030d2b71e50b
Author: Eric Anholt e...@anholt.net
Date: Wed Jul 21 11:19:52 2010 -0700
i965: Add disasm for dataport reads (register unspilling).
---
src/mesa/drivers/dri/i965/brw_disasm.c | 23 ++-
1 files changed, 22 insertions(+), 1 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/brw_disasm.c
b/src/mesa/drivers/dri/i965/brw_disasm.c
index 23095d9..52865c7 100644
--- a/src/mesa/drivers/dri/i965/brw_disasm.c
+++ b/src/mesa/drivers/dri/i965/brw_disasm.c
@@ -870,6 +870,27 @@ int brw_disasm (FILE *file, struct brw_instruction *inst,
int gen)
inst-bits3.sampler.return_format, NULL);
string (file, ));
break;
+ case BRW_MESSAGE_TARGET_DATAPORT_READ:
+ if (gen = 6) {
+ format (file, (%d, %d, %d, %d, %d, %d),
+ inst-bits3.dp_render_cache.binding_table_index,
+ inst-bits3.dp_render_cache.msg_control,
+ inst-bits3.dp_render_cache.msg_type,
+ inst-bits3.dp_render_cache.send_commit_msg,
+ inst-bits3.dp_render_cache.msg_length,
+ inst-bits3.dp_render_cache.response_length);
+ } else if (gen = 5) {
+ format (file, (%d, %d, %d),
+ inst-bits3.dp_read_gen5.binding_table_index,
+ inst-bits3.dp_read_gen5.msg_control,
+ inst-bits3.dp_read_gen5.msg_type);
+ } else {
+ format (file, (%d, %d, %d),
+ inst-bits3.dp_read.binding_table_index,
+ inst-bits3.dp_read.msg_control,
+ inst-bits3.dp_read.msg_type);
+ }
+ break;
case BRW_MESSAGE_TARGET_DATAPORT_WRITE:
if (gen = 6) {
format (file, (%d, %d, %d, %d, %d, %d),
@@ -912,7 +933,7 @@ int brw_disasm (FILE *file, struct brw_instruction *inst,
int gen)
case BRW_MESSAGE_TARGET_THREAD_SPAWNER:
break;
default:
- format (file, unsupported target %d,
inst-bits3.generic.msg_target);
+ format (file, unsupported target %d, target);
break;
}
if (space)
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Mesa (master): i965: Set the send commit bit on register spills as required pre-gen6.
Module: Mesa
Branch: master
Commit: d2f3eac8ffba8db8b141f07c22f612362c63ffe9
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=d2f3eac8ffba8db8b141f07c22f612362c63ffe9
Author: Eric Anholt e...@anholt.net
Date: Wed Jul 21 13:07:12 2010 -0700
i965: Set the send commit bit on register spills as required pre-gen6.
Otherwise, the subsequent read may not get the written value.
---
src/mesa/drivers/dri/i965/brw_eu_emit.c | 41 ---
1 files changed, 32 insertions(+), 9 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/brw_eu_emit.c
b/src/mesa/drivers/dri/i965/brw_eu_emit.c
index 10e9ebc..e26ae3f 100644
--- a/src/mesa/drivers/dri/i965/brw_eu_emit.c
+++ b/src/mesa/drivers/dri/i965/brw_eu_emit.c
@@ -364,7 +364,8 @@ static void brw_set_dp_write_message( struct brw_context
*brw,
GLuint msg_length,
GLuint pixel_scoreboard_clear,
GLuint response_length,
- GLuint end_of_thread )
+ GLuint end_of_thread,
+ GLuint send_commit_msg)
{
struct intel_context *intel = brw-intel;
brw_set_src1(insn, brw_imm_d(0));
@@ -374,7 +375,7 @@ static void brw_set_dp_write_message( struct brw_context
*brw,
insn-bits3.dp_write_gen5.msg_control = msg_control;
insn-bits3.dp_write_gen5.pixel_scoreboard_clear =
pixel_scoreboard_clear;
insn-bits3.dp_write_gen5.msg_type = msg_type;
- insn-bits3.dp_write_gen5.send_commit_msg = 0;
+ insn-bits3.dp_write_gen5.send_commit_msg = send_commit_msg;
insn-bits3.dp_write_gen5.header_present = 1;
insn-bits3.dp_write_gen5.response_length = response_length;
insn-bits3.dp_write_gen5.msg_length = msg_length;
@@ -386,7 +387,7 @@ static void brw_set_dp_write_message( struct brw_context
*brw,
insn-bits3.dp_write.msg_control = msg_control;
insn-bits3.dp_write.pixel_scoreboard_clear = pixel_scoreboard_clear;
insn-bits3.dp_write.msg_type = msg_type;
- insn-bits3.dp_write.send_commit_msg = 0;
+ insn-bits3.dp_write.send_commit_msg = send_commit_msg;
insn-bits3.dp_write.response_length = response_length;
insn-bits3.dp_write.msg_length = msg_length;
insn-bits3.dp_write.msg_target = BRW_MESSAGE_TARGET_DATAPORT_WRITE;
@@ -1054,6 +1055,7 @@ void brw_dp_WRITE_16( struct brw_compile *p,
struct brw_reg src,
GLuint scratch_offset )
{
+ struct intel_context *intel = p-brw-intel;
GLuint msg_reg_nr = 1;
{
brw_push_insn_state(p);
@@ -1070,13 +1072,32 @@ void brw_dp_WRITE_16( struct brw_compile *p,
{
GLuint msg_length = 3;
- struct brw_reg dest = retype(brw_null_reg(), BRW_REGISTER_TYPE_UW);
+ struct brw_reg dest;
struct brw_instruction *insn = next_insn(p, BRW_OPCODE_SEND);
-
+ int send_commit_msg;
+
insn-header.predicate_control = 0; /* XXX */
insn-header.compression_control = BRW_COMPRESSION_NONE;
insn-header.destreg__conditionalmod = msg_reg_nr;
-
+
+ /* Until gen6, writes followed by reads from the same location
+ * are not guaranteed to be ordered unless write_commit is set.
+ * If set, then a no-op write is issued to the destination
+ * register to set a dependency, and a read from the destination
+ * can be used to ensure the ordering.
+ *
+ * For gen6, only writes between different threads need ordering
+ * protection. Our use of DP writes is all about register
+ * spilling within a thread.
+ */
+ if (intel-gen = 6) {
+dest = retype(brw_null_reg(), BRW_REGISTER_TYPE_UW);
+send_commit_msg = 0;
+ } else {
+dest = retype(brw_vec8_grf(0, 0), BRW_REGISTER_TYPE_UW);
+send_commit_msg = 1;
+ }
+
brw_set_dest(insn, dest);
brw_set_src0(insn, src);
@@ -1087,8 +1108,9 @@ void brw_dp_WRITE_16( struct brw_compile *p,
BRW_DATAPORT_WRITE_MESSAGE_OWORD_BLOCK_WRITE, /*
msg_type */
msg_length,
0, /* pixel scoreboard */
- 0, /* response_length */
- 0); /* eot */
+ send_commit_msg, /* response_length */
+ 0, /* eot */
+ send_commit_msg);
}
}
@@ -1295,7 +1317,8 @@ void brw_fb_WRITE(struct brw_compile *p,
msg_length,
1, /* pixel scoreboard */
response_length,
- eot);
+ eot,
+ 0 /* send_commit_msg */);
}
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Mesa (master): i965: Use the pretty define for 4-oword DP reads.
Module: Mesa Branch: master Commit: a3bfb2f755cb2255879600d12d8440fad7136a9a URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=a3bfb2f755cb2255879600d12d8440fad7136a9a Author: Eric Anholt e...@anholt.net Date: Wed Jul 21 13:49:14 2010 -0700 i965: Use the pretty define for 4-oword DP reads. --- src/mesa/drivers/dri/i965/brw_eu_emit.c |2 +- 1 files changed, 1 insertions(+), 1 deletions(-) diff --git a/src/mesa/drivers/dri/i965/brw_eu_emit.c b/src/mesa/drivers/dri/i965/brw_eu_emit.c index e26ae3f..7164a22 100644 --- a/src/mesa/drivers/dri/i965/brw_eu_emit.c +++ b/src/mesa/drivers/dri/i965/brw_eu_emit.c @@ -1151,7 +1151,7 @@ void brw_dp_READ_16( struct brw_compile *p, brw_set_dp_read_message(p-brw, insn, 255, /* binding table index (255=stateless) */ - 3, /* msg_control (3 means 4 Owords) */ + BRW_DATAPORT_OWORD_BLOCK_4_OWORDS, BRW_DATAPORT_READ_MESSAGE_OWORD_BLOCK_READ, /* msg_type */ 1, /* target cache (render/scratch) */ 1, /* msg_length */ ___ mesa-commit mailing list mesa-commit@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-commit
Mesa (master): i965: Set the GEM domain flags for the scratch space.
Module: Mesa Branch: master Commit: ff81a1dd92f1bffcbfbd2c5268ea0d821b8e9dd4 URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=ff81a1dd92f1bffcbfbd2c5268ea0d821b8e9dd4 Author: Eric Anholt e...@anholt.net Date: Wed Jul 21 13:52:37 2010 -0700 i965: Set the GEM domain flags for the scratch space. They go into the render cache, so while we don't care about their contents after execution, failing to note them could cause the writes to be flushed over important buffer contents later. --- src/mesa/drivers/dri/i965/brw_wm_state.c |2 +- 1 files changed, 1 insertions(+), 1 deletions(-) diff --git a/src/mesa/drivers/dri/i965/brw_wm_state.c b/src/mesa/drivers/dri/i965/brw_wm_state.c index 1789b21..c1cf4db 100644 --- a/src/mesa/drivers/dri/i965/brw_wm_state.c +++ b/src/mesa/drivers/dri/i965/brw_wm_state.c @@ -222,7 +222,7 @@ wm_unit_create_from_key(struct brw_context *brw, struct brw_wm_unit_key *key, drm_intel_bo_emit_reloc(bo, offsetof(struct brw_wm_unit_state, thread2), brw-wm.scratch_bo, wm.thread2.per_thread_scratch_space, - 0, 0); + I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER); } /* Emit sampler state relocation */ ___ mesa-commit mailing list mesa-commit@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-commit
Mesa (master): i956: Set the execution size correctly for scratch space writes.
Module: Mesa
Branch: master
Commit: 04de6861c1a41859dd85ca066b964e5df3ad63b6
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=04de6861c1a41859dd85ca066b964e5df3ad63b6
Author: Eric Anholt e...@anholt.net
Date: Wed Jul 21 15:54:53 2010 -0700
i956: Set the execution size correctly for scratch space writes.
Otherwise, the second half isn't written, and we end up reading back
black.
Fixes the remaining junk drawn in glsl-max-varyings, and will likely
help with a number of large real-world shaders.
---
src/mesa/drivers/dri/i965/brw_eu_emit.c |4 ++--
1 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/brw_eu_emit.c
b/src/mesa/drivers/dri/i965/brw_eu_emit.c
index 7164a22..7cda28a 100644
--- a/src/mesa/drivers/dri/i965/brw_eu_emit.c
+++ b/src/mesa/drivers/dri/i965/brw_eu_emit.c
@@ -1091,10 +1091,10 @@ void brw_dp_WRITE_16( struct brw_compile *p,
* spilling within a thread.
*/
if (intel-gen = 6) {
-dest = retype(brw_null_reg(), BRW_REGISTER_TYPE_UW);
+dest = retype(vec16(brw_null_reg()), BRW_REGISTER_TYPE_UW);
send_commit_msg = 0;
} else {
-dest = retype(brw_vec8_grf(0, 0), BRW_REGISTER_TYPE_UW);
+dest = brw_uw16_grf(0, 0);
send_commit_msg = 1;
}
___
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Mesa (master): i965: Clean up dead code from the VS get_constant/ get_reladdr_constant split.
Module: Mesa
Branch: master
Commit: d0326e0e4ee245ec471fc976fbe98183fbe6da4e
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=d0326e0e4ee245ec471fc976fbe98183fbe6da4e
Author: Eric Anholt e...@anholt.net
Date: Wed Jul 21 17:35:21 2010 -0700
i965: Clean up dead code from the VS get_constant/get_reladdr_constant split.
---
src/mesa/drivers/dri/i965/brw_vs_emit.c |4 +---
1 files changed, 1 insertions(+), 3 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/brw_vs_emit.c
b/src/mesa/drivers/dri/i965/brw_vs_emit.c
index 7894417..4616e50 100644
--- a/src/mesa/drivers/dri/i965/brw_vs_emit.c
+++ b/src/mesa/drivers/dri/i965/brw_vs_emit.c
@@ -868,8 +868,6 @@ get_constant(struct brw_vs_compile *c,
assert(argIndex 3);
if (c-current_const[argIndex].index != src-Index) {
- struct brw_reg addrReg = c-regs[PROGRAM_ADDRESS][0];
-
/* Keep track of the last constant loaded in this slot, for reuse. */
c-current_const[argIndex].index = src-Index;
@@ -882,7 +880,7 @@ get_constant(struct brw_vs_compile *c,
const_reg, /* writeback dest */
0, /* oword */
0, /* relative indexing? */
- addrReg, /* address register */
+ brw_null_reg(),/* address register */
16 * src-Index, /* byte offset */
SURF_INDEX_VERT_CONST_BUFFER /* binding table index */
);
___
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Mesa (master): i965: Fix the DP read msg_control definitions other than plain OWORD.
Module: Mesa Branch: master Commit: 9e9e87a9b20c581315ff679dc2541d9e442a6301 URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=9e9e87a9b20c581315ff679dc2541d9e442a6301 Author: Eric Anholt e...@anholt.net Date: Wed Jul 21 18:41:06 2010 -0700 i965: Fix the DP read msg_control definitions other than plain OWORD. --- src/mesa/drivers/dri/i965/brw_defines.h | 22 -- 1 files changed, 16 insertions(+), 6 deletions(-) diff --git a/src/mesa/drivers/dri/i965/brw_defines.h b/src/mesa/drivers/dri/i965/brw_defines.h index dba500c..6b20a29 100644 --- a/src/mesa/drivers/dri/i965/brw_defines.h +++ b/src/mesa/drivers/dri/i965/brw_defines.h @@ -703,14 +703,24 @@ #define BRW_DATAPORT_DWORD_SCATTERED_BLOCK_8DWORDS 2 #define BRW_DATAPORT_DWORD_SCATTERED_BLOCK_16DWORDS 3 +/* This one stays the same across generations. */ #define BRW_DATAPORT_READ_MESSAGE_OWORD_BLOCK_READ 0 +/* GEN4 */ +#define BRW_DATAPORT_READ_MESSAGE_OWORD_DUAL_BLOCK_READ 1 +#define BRW_DATAPORT_READ_MESSAGE_MEDIA_BLOCK_READ 2 +#define BRW_DATAPORT_READ_MESSAGE_DWORD_SCATTERED_READ 3 +/* G45, GEN5 */ +#define G45_DATAPORT_READ_MESSAGE_RENDER_UNORM_READ1 +#define G45_DATAPORT_READ_MESSAGE_OWORD_DUAL_BLOCK_READ 2 +#define G45_DATAPORT_READ_MESSAGE_AVC_LOOP_FILTER_READ 3 +#define G45_DATAPORT_READ_MESSAGE_MEDIA_BLOCK_READ 4 +#define G45_DATAPORT_READ_MESSAGE_DWORD_SCATTERED_READ 6 /* GEN6 */ -#define BRW_DATAPORT_READ_MESSAGE_RENDER_UNORM_READ1 -#define BRW_DATAPORT_READ_MESSAGE_OWORD_DUAL_BLOCK_READ 2 -#define BRW_DATAPORT_READ_MESSAGE_DWORD_BLOCK_READ 4 -/* GEN6 */ -#define BRW_DATAPORT_READ_MESSAGE_OWORD_UNALIGN_BLOCK_READ 5 -#define BRW_DATAPORT_READ_MESSAGE_DWORD_SCATTERED_READ 6 +#define GEN6_DATAPORT_READ_MESSAGE_RENDER_UNORM_READ 1 +#define GEN6_DATAPORT_READ_MESSAGE_OWORD_DUAL_BLOCK_READ 2 +#define GEN6_DATAPORT_READ_MESSAGE_MEDIA_BLOCK_READ 4 +#define GEN6_DATAPORT_READ_MESSAGE_OWORD_UNALIGN_BLOCK_READ 5 +#define GEN6_DATAPORT_READ_MESSAGE_DWORD_SCATTERED_READ 6 #define BRW_DATAPORT_READ_TARGET_DATA_CACHE 0 #define BRW_DATAPORT_READ_TARGET_RENDER_CACHE1 ___ mesa-commit mailing list mesa-commit@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-commit
Mesa (master): i965: Support relative addressed VS constant reads using the appropriate msg.
Module: Mesa
Branch: master
Commit: 96b11f1e3ee12f06be1d33bf085bf1353f23e667
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=96b11f1e3ee12f06be1d33bf085bf1353f23e667
Author: Eric Anholt e...@anholt.net
Date: Wed Jul 21 18:29:06 2010 -0700
i965: Support relative addressed VS constant reads using the appropriate msg.
The previous support was overly complicated by trying to use the same
1-OWORD message for both offsets.
---
src/mesa/drivers/dri/i965/brw_eu.h |6 +++
src/mesa/drivers/dri/i965/brw_eu_emit.c | 54 +++
src/mesa/drivers/dri/i965/brw_vs_emit.c | 37 +++-
3 files changed, 66 insertions(+), 31 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/brw_eu.h
b/src/mesa/drivers/dri/i965/brw_eu.h
index 3a01000..a2acf8c 100644
--- a/src/mesa/drivers/dri/i965/brw_eu.h
+++ b/src/mesa/drivers/dri/i965/brw_eu.h
@@ -897,6 +897,12 @@ void brw_dp_READ_4_vs( struct brw_compile *p,
GLuint location,
GLuint bind_table_index );
+void brw_dp_READ_4_vs_relative(struct brw_compile *p,
+ struct brw_reg dest,
+ struct brw_reg addrReg,
+ GLuint offset,
+ GLuint bind_table_index);
+
void brw_dp_WRITE_16( struct brw_compile *p,
struct brw_reg src,
GLuint scratch_offset );
diff --git a/src/mesa/drivers/dri/i965/brw_eu_emit.c
b/src/mesa/drivers/dri/i965/brw_eu_emit.c
index 7cda28a..b390f82 100644
--- a/src/mesa/drivers/dri/i965/brw_eu_emit.c
+++ b/src/mesa/drivers/dri/i965/brw_eu_emit.c
@@ -1290,6 +1290,60 @@ void brw_dp_READ_4_vs(struct brw_compile *p,
}
}
+/**
+ * Read a float[4] constant per vertex from VS constant buffer, with
+ * relative addressing.
+ */
+void brw_dp_READ_4_vs_relative(struct brw_compile *p,
+ struct brw_reg dest,
+ struct brw_reg addr_reg,
+ GLuint offset,
+ GLuint bind_table_index)
+{
+ struct intel_context *intel = p-brw-intel;
+ int msg_type;
+
+ /* Setup MRF[1] with offset into const buffer */
+ brw_push_insn_state(p);
+ brw_set_compression_control(p, BRW_COMPRESSION_NONE);
+ brw_set_mask_control(p, BRW_MASK_DISABLE);
+ brw_set_predicate_control(p, BRW_PREDICATE_NONE);
+
+ /* M1.0 is block offset 0, M1.4 is block offset 1, all other
+* fields ignored.
+*/
+ brw_ADD(p, retype(brw_message_reg(1), BRW_REGISTER_TYPE_UD),
+ addr_reg, brw_imm_d(offset));
+ brw_pop_insn_state(p);
+
+ struct brw_instruction *insn = next_insn(p, BRW_OPCODE_SEND);
+
+ insn-header.predicate_control = BRW_PREDICATE_NONE;
+ insn-header.compression_control = BRW_COMPRESSION_NONE;
+ insn-header.destreg__conditionalmod = 0;
+ insn-header.mask_control = BRW_MASK_DISABLE;
+
+ brw_set_dest(insn, dest);
+ brw_set_src0(insn, brw_vec8_grf(0, 0));
+
+ if (intel-gen == 6)
+ msg_type = GEN6_DATAPORT_READ_MESSAGE_OWORD_DUAL_BLOCK_READ;
+ else if (intel-gen == 5 || intel-is_g4x)
+ msg_type = G45_DATAPORT_READ_MESSAGE_OWORD_DUAL_BLOCK_READ;
+ else
+ msg_type = BRW_DATAPORT_READ_MESSAGE_OWORD_DUAL_BLOCK_READ;
+
+ brw_set_dp_read_message(p-brw,
+ insn,
+ bind_table_index,
+ BRW_DATAPORT_OWORD_DUAL_BLOCK_1OWORD,
+ msg_type,
+ 0, /* source cache = data cache */
+ 2, /* msg_length */
+ 1, /* response_length */
+ 0); /* eot */
+}
+
void brw_fb_WRITE(struct brw_compile *p,
diff --git a/src/mesa/drivers/dri/i965/brw_vs_emit.c
b/src/mesa/drivers/dri/i965/brw_vs_emit.c
index 4616e50..190fa89 100644
--- a/src/mesa/drivers/dri/i965/brw_vs_emit.c
+++ b/src/mesa/drivers/dri/i965/brw_vs_emit.c
@@ -901,7 +901,6 @@ get_reladdr_constant(struct brw_vs_compile *c,
const struct prog_src_register *src = inst-SrcReg[argIndex];
struct brw_compile *p = c-func;
struct brw_reg const_reg = c-current_const[argIndex].reg;
- struct brw_reg const2_reg;
struct brw_reg addrReg = c-regs[PROGRAM_ADDRESS][0];
assert(argIndex 3);
@@ -915,36 +914,12 @@ get_reladdr_constant(struct brw_vs_compile *c,
#endif
/* fetch the first vec4 */
- brw_dp_READ_4_vs(p,
- const_reg, /* writeback dest */
- 0, /* oword */
- 1, /* relative indexing? */
- addrReg, /* address register */
- 16 * src-Index, /* byte offset */
- SURF_INDEX_VERT_CONST_BUFFER /* binding table index */
- );
- /* second vec4 */
- const2_reg = get_tmp(c);
-
- /* use upper half
Mesa (master): i965: Clean up brw_dp_READ_4_vs() now that it has fewer options to support.
Module: Mesa
Branch: master
Commit: 21eaa62ba461854003e5f74e6fc32e559e9c8455
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=21eaa62ba461854003e5f74e6fc32e559e9c8455
Author: Eric Anholt e...@anholt.net
Date: Wed Jul 21 19:49:39 2010 -0700
i965: Clean up brw_dp_READ_4_vs() now that it has fewer options to support.
---
src/mesa/drivers/dri/i965/brw_eu.h |3 -
src/mesa/drivers/dri/i965/brw_eu_emit.c | 77 --
src/mesa/drivers/dri/i965/brw_vs_emit.c |3 -
3 files changed, 31 insertions(+), 52 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/brw_eu.h
b/src/mesa/drivers/dri/i965/brw_eu.h
index a2acf8c..31ff86c 100644
--- a/src/mesa/drivers/dri/i965/brw_eu.h
+++ b/src/mesa/drivers/dri/i965/brw_eu.h
@@ -891,9 +891,6 @@ void brw_dp_READ_4( struct brw_compile *p,
void brw_dp_READ_4_vs( struct brw_compile *p,
struct brw_reg dest,
- GLuint oword,
- GLboolean relAddr,
- struct brw_reg addrReg,
GLuint location,
GLuint bind_table_index );
diff --git a/src/mesa/drivers/dri/i965/brw_eu_emit.c
b/src/mesa/drivers/dri/i965/brw_eu_emit.c
index b390f82..0d5d17f 100644
--- a/src/mesa/drivers/dri/i965/brw_eu_emit.c
+++ b/src/mesa/drivers/dri/i965/brw_eu_emit.c
@@ -1226,68 +1226,53 @@ void brw_dp_READ_4( struct brw_compile *p,
*/
void brw_dp_READ_4_vs(struct brw_compile *p,
struct brw_reg dest,
- GLuint oword,
- GLboolean relAddr,
- struct brw_reg addrReg,
GLuint location,
GLuint bind_table_index)
{
+ struct brw_instruction *insn;
GLuint msg_reg_nr = 1;
+ struct brw_reg b;
- assert(oword 2);
/*
printf(vs const read msg, location %u, msg_reg_nr %d\n,
location, msg_reg_nr);
*/
/* Setup MRF[1] with location/offset into const buffer */
- {
- struct brw_reg b;
+ brw_push_insn_state(p);
+ brw_set_compression_control(p, BRW_COMPRESSION_NONE);
+ brw_set_mask_control(p, BRW_MASK_DISABLE);
+ brw_set_predicate_control(p, BRW_PREDICATE_NONE);
- brw_push_insn_state(p);
- brw_set_compression_control(p, BRW_COMPRESSION_NONE);
- brw_set_mask_control(p, BRW_MASK_DISABLE);
- brw_set_predicate_control(p, BRW_PREDICATE_NONE);
- /*brw_set_access_mode(p, BRW_ALIGN_16);*/
+ /* XXX I think we're setting all the dwords of MRF[1] to 'location'.
+* when the docs say only dword[2] should be set. Hmmm. But it works.
+*/
+ b = brw_message_reg(msg_reg_nr);
+ b = retype(b, BRW_REGISTER_TYPE_UD);
+ /*b = get_element_ud(b, 2);*/
+ brw_MOV(p, b, brw_imm_ud(location));
- /* XXX I think we're setting all the dwords of MRF[1] to 'location'.
- * when the docs say only dword[2] should be set. Hmmm. But it works.
- */
- b = brw_message_reg(msg_reg_nr);
- b = retype(b, BRW_REGISTER_TYPE_UD);
- /*b = get_element_ud(b, 2);*/
- if (relAddr) {
- brw_ADD(p, b, addrReg, brw_imm_ud(location));
- }
- else {
- brw_MOV(p, b, brw_imm_ud(location));
- }
+ brw_pop_insn_state(p);
- brw_pop_insn_state(p);
- }
+ insn = next_insn(p, BRW_OPCODE_SEND);
- {
- struct brw_instruction *insn = next_insn(p, BRW_OPCODE_SEND);
-
- insn-header.predicate_control = BRW_PREDICATE_NONE;
- insn-header.compression_control = BRW_COMPRESSION_NONE;
- insn-header.destreg__conditionalmod = msg_reg_nr;
- insn-header.mask_control = BRW_MASK_DISABLE;
- /*insn-header.access_mode = BRW_ALIGN_16;*/
-
- brw_set_dest(insn, dest);
- brw_set_src0(insn, brw_null_reg());
+ insn-header.predicate_control = BRW_PREDICATE_NONE;
+ insn-header.compression_control = BRW_COMPRESSION_NONE;
+ insn-header.destreg__conditionalmod = msg_reg_nr;
+ insn-header.mask_control = BRW_MASK_DISABLE;
- brw_set_dp_read_message(p-brw,
- insn,
- bind_table_index,
- oword, /* 0 = lower Oword, 1 = upper Oword */
- BRW_DATAPORT_READ_MESSAGE_OWORD_BLOCK_READ, /*
msg_type */
- 0, /* source cache = data cache */
- 1, /* msg_length */
- 1, /* response_length (1 Oword) */
- 0); /* eot */
- }
+ brw_set_dest(insn, dest);
+ brw_set_src0(insn, brw_null_reg());
+
+ brw_set_dp_read_message(p-brw,
+ insn,
+ bind_table_index,
+ 0,
+ BRW_DATAPORT_READ_MESSAGE_OWORD_BLOCK_READ, /*
msg_type */
+ 0, /* source cache = data cache */
+ 1, /* msg_length */
+ 1, /* response_length
Mesa (master): i965: In the VS, multiply the address reg by the appropriate register size.
Module: Mesa
Branch: master
Commit: c686ee0fa7e2298408259f5533b739c7d05c78b8
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=c686ee0fa7e2298408259f5533b739c7d05c78b8
Author: Eric Anholt e...@anholt.net
Date: Wed Jul 21 21:45:34 2010 -0700
i965: In the VS, multiply the address reg by the appropriate register size.
The ARL value is increments of vec4 in the register file. But
PROGRAM_TEMPORARY or PROGRAM_INPUT are stored as vec4s interleaved
between the two verts being executed (thus a vec8 each), compared to
PROGRAM_STATE_VAR being packed vec4s.
Fixes:
glsl-vs-arrays-2
glsl-vs-mov-after-deref
(without regressing glsl-vs-arrays-3)
---
src/mesa/drivers/dri/i965/brw_vs_emit.c | 41 ++
1 files changed, 14 insertions(+), 27 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/brw_vs_emit.c
b/src/mesa/drivers/dri/i965/brw_vs_emit.c
index f55414e..9c2f722 100644
--- a/src/mesa/drivers/dri/i965/brw_vs_emit.c
+++ b/src/mesa/drivers/dri/i965/brw_vs_emit.c
@@ -899,6 +899,7 @@ get_reladdr_constant(struct brw_vs_compile *c,
struct brw_compile *p = c-func;
struct brw_reg const_reg = c-current_const[argIndex].reg;
struct brw_reg addrReg = c-regs[PROGRAM_ADDRESS][0];
+ struct brw_reg byte_addr_reg = get_tmp(c);
assert(argIndex 3);
@@ -910,10 +911,12 @@ get_reladdr_constant(struct brw_vs_compile *c,
src-Index, argIndex, c-current_const[argIndex].reg.nr);
#endif
+ brw_MUL(p, byte_addr_reg, addrReg, brw_imm_ud(16));
+
/* fetch the first vec4 */
brw_dp_READ_4_vs_relative(p,
const_reg, /* writeback dest */
-addrReg, /* address register
*/
+byte_addr_reg, /* address register
*/
16 * src-Index, /* byte offset */
SURF_INDEX_VERT_CONST_BUFFER /* binding table
index */
);
@@ -962,7 +965,8 @@ static struct brw_reg get_reg( struct brw_vs_compile *c,
*/
static struct brw_reg deref( struct brw_vs_compile *c,
struct brw_reg arg,
-GLint offset)
+GLint offset,
+GLuint reg_size )
{
struct brw_compile *p = c-func;
struct brw_reg tmp = vec4(get_tmp(c));
@@ -970,6 +974,7 @@ static struct brw_reg deref( struct brw_vs_compile *c,
struct brw_reg vp_address = retype(vec1(addr_reg), BRW_REGISTER_TYPE_UW);
GLuint byte_offset = arg.nr * 32 + arg.subnr + offset * 16;
struct brw_reg indirect = brw_vec4_indirect(0,0);
+ struct brw_reg acc = retype(brw_acc_reg(), BRW_REGISTER_TYPE_D);
{
brw_push_insn_state(p);
@@ -979,10 +984,12 @@ static struct brw_reg deref( struct brw_vs_compile *c,
* fetch each 4-dword value in turn. There must be a way to do
* this in a single pass, but I couldn't get it to work.
*/
- brw_ADD(p, brw_address_reg(0), vp_address, brw_imm_d(byte_offset));
+ brw_MUL(p, acc, vp_address, brw_imm_d(reg_size));
+ brw_ADD(p, brw_address_reg(0), acc, brw_imm_d(byte_offset));
brw_MOV(p, tmp, indirect);
- brw_ADD(p, brw_address_reg(0), suboffset(vp_address, 8),
brw_imm_d(byte_offset));
+ brw_MUL(p, acc, suboffset(vp_address, 8), brw_imm_d(reg_size));
+ brw_ADD(p, brw_address_reg(0), acc, brw_imm_d(byte_offset));
brw_MOV(p, suboffset(tmp, 4), indirect);
brw_pop_insn_state(p);
@@ -1060,7 +1067,7 @@ get_src_reg( struct brw_vs_compile *c,
case PROGRAM_INPUT:
case PROGRAM_OUTPUT:
if (relAddr) {
- return deref(c, c-regs[file][0], index);
+ return deref(c, c-regs[file][0], index, 32);
}
else {
assert(c-regs[file][index].nr != 0);
@@ -1082,7 +1089,7 @@ get_src_reg( struct brw_vs_compile *c,
return get_constant(c, inst, argIndex);
}
else if (relAddr) {
- return deref(c, c-regs[PROGRAM_STATE_VAR][0], index);
+ return deref(c, c-regs[PROGRAM_STATE_VAR][0], index, 16);
}
else {
assert(c-regs[PROGRAM_STATE_VAR][index].nr != 0);
@@ -1103,26 +1110,6 @@ get_src_reg( struct brw_vs_compile *c,
}
}
-
-static void emit_arl( struct brw_vs_compile *c,
- struct brw_reg dst,
- struct brw_reg arg0 )
-{
- struct brw_compile *p = c-func;
- struct brw_reg tmp = dst;
- GLboolean need_tmp = (dst.file != BRW_GENERAL_REGISTER_FILE);
-
- if (need_tmp)
- tmp = get_tmp(c);
-
- brw_RNDD(p, tmp, arg0); /* tmp = round(arg0) */
- brw_MUL(p, dst, tmp, brw_imm_d(16)); /* dst = tmp * 16 */
-
- if (need_tmp)
- release_tmp(c, tmp);
-}
-
-
/**
* Return the brw reg for the given instruction's src argument.
* Will return mangled results for SWZ op. The emit_swz() function
@@ -1633,7 +1620,7 @@ void
