Mesa (master): egl/x11: Handle both depth 30 formats for eglCreateImage(). (v4)
Module: Mesa
Branch: master
Commit: 61a02729f749add535ad9d18c62f65641e428cfb
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=61a02729f749add535ad9d18c62f65641e428cfb
Author: Mario Kleiner
Date: Wed Jun 13 06:04:13 2018 +0200
egl/x11: Handle both depth 30 formats for eglCreateImage(). (v4)
We need to distinguish if the backing storage of a pixmap
is XRGB2101010 or XBGR2101010, as different gpu hw supports
different formats. NVidia hw prefers XBGR, whereas AMD and
Intel are happy with XRGB.
Use the red channel mask of the first depth 30 visual of
the x-screen to distinguish which hw format to choose.
This fixes desktop composition of color depth 30 windows
when the X11 compositor uses EGL.
v2: Switch from using the visual of the root window to simply
using the first depth 30 visual for the x-screen, as testing
shows that each driver only exports either xrgb ordering or
xbgr ordering for the channel masks of its depth 30 visuals,
so this should be unambiguous and avoid trouble if X ever
supports depth 30 pixmaps on screens with a non-depth 30 root
window visual. This per Michels suggestion.
v3: No change to v2, but spent some time testing this more on
AMD hw, with my software hacked up to intentionally choose
pixel formats/visual with the non-preferred xBGR2101010
ordering on the ati-ddx, also with a standard non-OpenGL
X-Window with depth 30 visual, to make sure that things show
up properly with the right colors on the screen when going
through EGL+OpenGL based compositing on KDE-5. Iow. to confirm
that my explanation to the v2 patch on the mailing list of why
it should work and the actual practice agree (or possibly that
i am good at fooling myself during testing ;).
v4: Drop the local `red_mask` and just `return visual->red_mask`/
`return 0`, as suggested by Eric Engestrom.
Rebased onto current master, to take the cleanup via the new
function dri2_format_for_depth() into account.
Signed-off-by: Mario Kleiner
Reviewed-by: Eric Engestrom
---
src/egl/drivers/dri2/egl_dri2.h | 7 +
src/egl/drivers/dri2/platform_x11.c | 44 +++-
src/egl/drivers/dri2/platform_x11_dri3.c | 4 +--
src/egl/drivers/dri2/platform_x11_dri3.h | 2 +-
4 files changed, 48 insertions(+), 9 deletions(-)
diff --git a/src/egl/drivers/dri2/egl_dri2.h b/src/egl/drivers/dri2/egl_dri2.h
index 5d8fbfa235..f8001ec4b6 100644
--- a/src/egl/drivers/dri2/egl_dri2.h
+++ b/src/egl/drivers/dri2/egl_dri2.h
@@ -411,6 +411,8 @@ EGLBoolean
dri2_initialize_x11(_EGLDriver *drv, _EGLDisplay *disp);
void
dri2_teardown_x11(struct dri2_egl_display *dri2_dpy);
+unsigned int
+dri2_x11_get_red_mask_for_depth(struct dri2_egl_display *dri2_dpy, int depth);
#else
static inline EGLBoolean
dri2_initialize_x11(_EGLDriver *drv, _EGLDisplay *disp)
@@ -419,6 +421,11 @@ dri2_initialize_x11(_EGLDriver *drv, _EGLDisplay *disp)
}
static inline void
dri2_teardown_x11(struct dri2_egl_display *dri2_dpy) {}
+static inline unsigned int
+dri2_x11_get_red_mask_for_depth(struct dri2_egl_display *dri2_dpy, int depth)
+{
+ return 0;
+}
#endif
#ifdef HAVE_DRM_PLATFORM
diff --git a/src/egl/drivers/dri2/platform_x11.c
b/src/egl/drivers/dri2/platform_x11.c
index ea9b0cc6d6..cfa5c4aa2b 100644
--- a/src/egl/drivers/dri2/platform_x11.c
+++ b/src/egl/drivers/dri2/platform_x11.c
@@ -56,7 +56,7 @@ dri2_x11_swap_interval(_EGLDriver *drv, _EGLDisplay *disp,
_EGLSurface *surf,
EGLint interval);
uint32_t
-dri2_format_for_depth(uint32_t depth);
+dri2_format_for_depth(struct dri2_egl_display *dri2_dpy, uint32_t depth);
static void
swrastCreateDrawable(struct dri2_egl_display * dri2_dpy,
@@ -212,6 +212,36 @@ get_xcb_screen(xcb_screen_iterator_t iter, int screen)
return NULL;
}
+static xcb_visualtype_t *
+get_xcb_visualtype_for_depth(struct dri2_egl_display *dri2_dpy, int depth)
+{
+ xcb_visualtype_iterator_t visual_iter;
+ xcb_screen_t *screen = dri2_dpy->screen;
+ xcb_depth_iterator_t depth_iter =
xcb_screen_allowed_depths_iterator(screen);
+
+ for (; depth_iter.rem; xcb_depth_next(&depth_iter)) {
+ if (depth_iter.data->depth != depth)
+ continue;
+
+ visual_iter = xcb_depth_visuals_iterator(depth_iter.data);
+ if (visual_iter.rem)
+ return visual_iter.data;
+ }
+
+ return NULL;
+}
+
+/* Get red channel mask for given depth. */
+unsigned int
+dri2_x11_get_red_mask_for_depth(struct dri2_egl_display *dri2_dpy, int depth)
+{
+ xcb_visualtype_t *visual = get_xcb_visualtype_for_depth(dri2_dpy, depth);
+
+ if (visual)
+ return visual->red_mask;
+
+ return 0;
+}
/**
* Called via eglCreateWindowSurface(), drv->API.CreateWindowSurface().
@@ -1010,7 +1040,7 @@ dri2_x11_copy_buffers(_EGLDriver *drv, _EGLDisplay *disp,
_EGLSurface *surf,
}
uint32_t
-dri2_format_for_depth(uint32_t depth)
+dri2_format_for_depth(struct dri2_egl_display *dri2_dpy, uint32_
Mesa (master): loader_dri3: Handle mismatched depth 30 formats for Prime renderoffload.
Module: Mesa
Branch: master
Commit: 9bd8b0f700255611e3eadf91a0f7bb037b6a2e64
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=9bd8b0f700255611e3eadf91a0f7bb037b6a2e64
Author: Mario Kleiner
Date: Thu Jun 14 06:04:24 2018 +0200
loader_dri3: Handle mismatched depth 30 formats for Prime renderoffload.
Detect if the display (X-Server) gpu and Prime renderoffload gpu prefer
different channel ordering for color depth 30 formats ([X/A]BGR2101010
vs. [X/A]RGB2101010) and perform format conversion during the blitImage()
detiling op from tiled backbuffer -> linear buffer.
For this we need to find the visual (= red channel mask) for the
X-Drawable used to display on the server gpu. We use the same proven
logic for finding that visual as in commit "egl/x11: Handle both depth
30 formats for eglCreateImage()".
This is mostly to allow "NVidia Optimus" at depth 30, as Intel/AMD
gpu's prefer xRGB2101010 ordering, whereas NVidia gpu's prefer
xBGR2101010 ordering, so we can offload to nouveau without getting
funky colors.
Tested on Intel single gpu, NVidia single gpu, Intel + NVidia prime
offload with DRI3/Present.
Note: An unintended but pleasant surprise of this patch is that it also
seems to make the modesetting-ddx of server 1.20.0 work at depth 30
on nouveau, at least with unredirected "classic" X rendering, and
with redirected desktop compositing under XRender accel, and with OpenGL
compositing under GLX. Only X11 compositing via OpenGL + EGL still gives
funky colors. modesetting-ddx + glamor are not yet ready to deal with
nouveau's ABGR2101010 format, and treat it as ARGB2101010, also exposing
X-visuals with ARGB2101010 style channel masks. Seems somehow this triggers
the logic in this patch on modesetting-ddx + depth 30 + DRI3 buffer sharing
and does the "wrong" channel swizzling that then cancels out the "wrong"
swizzling of glamor and we end up with the proper pixel formatting in
the scanout buffer :). This so far tested on a NVA5 Tesla card under KDE5
Plasma as shipping with Ubuntu 16.04.4 LTS.
Signed-off-by: Mario Kleiner
Cc: Ilia Mirkin
Reviewed-by: Eric Engestrom
---
src/loader/loader_dri3_helper.c | 83 -
src/loader/loader_dri3_helper.h | 1 +
2 files changed, 83 insertions(+), 1 deletion(-)
diff --git a/src/loader/loader_dri3_helper.c b/src/loader/loader_dri3_helper.c
index b8eb87f5aa..473fe6c908 100644
--- a/src/loader/loader_dri3_helper.c
+++ b/src/loader/loader_dri3_helper.c
@@ -64,6 +64,55 @@ dri3_flush_present_events(struct loader_dri3_drawable *draw);
static struct loader_dri3_buffer *
dri3_find_back_alloc(struct loader_dri3_drawable *draw);
+static xcb_screen_t *
+get_screen_for_root(xcb_connection_t *conn, xcb_window_t root)
+{
+ xcb_screen_iterator_t screen_iter =
+ xcb_setup_roots_iterator(xcb_get_setup(conn));
+
+ for (; screen_iter.rem; xcb_screen_next (&screen_iter)) {
+ if (screen_iter.data->root == root)
+ return screen_iter.data;
+ }
+
+ return NULL;
+}
+
+static xcb_visualtype_t *
+get_xcb_visualtype_for_depth(struct loader_dri3_drawable *draw, int depth)
+{
+ xcb_visualtype_iterator_t visual_iter;
+ xcb_screen_t *screen = draw->screen;
+ xcb_depth_iterator_t depth_iter;
+
+ if (!screen)
+ return NULL;
+
+ depth_iter = xcb_screen_allowed_depths_iterator(screen);
+ for (; depth_iter.rem; xcb_depth_next(&depth_iter)) {
+ if (depth_iter.data->depth != depth)
+ continue;
+
+ visual_iter = xcb_depth_visuals_iterator(depth_iter.data);
+ if (visual_iter.rem)
+ return visual_iter.data;
+ }
+
+ return NULL;
+}
+
+/* Get red channel mask for given drawable at given depth. */
+static unsigned int
+dri3_get_red_mask_for_depth(struct loader_dri3_drawable *draw, int depth)
+{
+ xcb_visualtype_t *visual = get_xcb_visualtype_for_depth(draw, depth);
+
+ if (visual)
+ return visual->red_mask;
+
+ return 0;
+}
+
/**
* Do we have blit functionality in the image blit extension?
*
@@ -323,6 +372,7 @@ loader_dri3_drawable_init(xcb_connection_t *conn,
return 1;
}
+ draw->screen = get_screen_for_root(draw->conn, reply->root);
draw->width = reply->width;
draw->height = reply->height;
draw->depth = reply->depth;
@@ -1030,6 +1080,36 @@ dri3_cpp_for_format(uint32_t format) {
}
}
+/* Map format of render buffer to corresponding format for the linear_buffer
+ * used for sharing with the display gpu of a Prime setup (==
is_different_gpu).
+ * Usually linear_format == format, except for depth >= 30 formats, where
+ * different gpu vendors have different preferences wrt. color channel
ordering.
+ */
+static uint32_t
+dri3_linear_format_for_format(struct loader_dri3_drawable *draw, uint32_t
format)
+{
+ switch (format) {
+ case __DRI_IMAGE_FORMAT_XRGB2101010:
+ case __DRI_IMAGE_FORMAT_XBGR2101010:
+ /* Different preferred formats for different hw */
+ if (dri3_get_red_mask_for_depth(draw, 30) == 0x3ff)
Mesa (master): gbm: Add support for 10bpp BGR formats
Module: Mesa
Branch: master
Commit: 753f603b52db5eb38e27e1842fa43299a348998b
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=753f603b52db5eb38e27e1842fa43299a348998b
Author: Daniel Stone
Date: Wed Jun 13 06:04:12 2018 +0200
gbm: Add support for 10bpp BGR formats
Add support for XBGR2101010 and ABGR2101010 formats.
Signed-off-by: Daniel Stone
Reviewed-by: Mario Kleiner
Tested-by: Mario Kleiner
Tested-by: Ilia Mirkin
Reviewed-by: Eric Engestrom
---
src/gbm/backends/dri/gbm_dri.c | 8
1 file changed, 8 insertions(+)
diff --git a/src/gbm/backends/dri/gbm_dri.c b/src/gbm/backends/dri/gbm_dri.c
index df20db4021..b3d6ceb15a 100644
--- a/src/gbm/backends/dri/gbm_dri.c
+++ b/src/gbm/backends/dri/gbm_dri.c
@@ -580,6 +580,14 @@ static const struct gbm_dri_visual gbm_dri_visuals_table[]
= {
GBM_FORMAT_ARGB2101010, __DRI_IMAGE_FORMAT_ARGB2101010,
{ 0x3ff0, 0x000ffc00, 0x03ff, 0xc000 },
},
+ {
+ GBM_FORMAT_XBGR2101010, __DRI_IMAGE_FORMAT_XBGR2101010,
+ { 0x03ff, 0x000ffc00, 0x3ff0, 0x },
+ },
+ {
+ GBM_FORMAT_ABGR2101010, __DRI_IMAGE_FORMAT_ABGR2101010,
+ { 0x03ff, 0x000ffc00, 0x3ff0, 0xc000 },
+ },
};
/* The two GBM_BO_FORMAT_[XA]RGB formats alias the GBM_FORMAT_*
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Mesa (master): egl/wayland: Add 10bpc BGR configs
Module: Mesa
Branch: master
Commit: 275b23ed0e6f7639eb674c3392ec52a0f38274fa
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=275b23ed0e6f7639eb674c3392ec52a0f38274fa
Author: Daniel Stone
Date: Wed Jun 13 06:04:11 2018 +0200
egl/wayland: Add 10bpc BGR configs
Add support for XBGR2101010 and ABGR2101010.
Signed-off-by: Daniel Stone
Reviewed-by: Eric Engestrom
Reviewed-by: Mario Kleiner
Tested-by: Mario Kleiner
Tested-by: Ilia Mirkin
---
src/egl/drivers/dri2/platform_wayland.c | 12
1 file changed, 12 insertions(+)
diff --git a/src/egl/drivers/dri2/platform_wayland.c
b/src/egl/drivers/dri2/platform_wayland.c
index 294a6eddd6..dca099500a 100644
--- a/src/egl/drivers/dri2/platform_wayland.c
+++ b/src/egl/drivers/dri2/platform_wayland.c
@@ -75,6 +75,18 @@ static const struct dri2_wl_visual {
{ 0x3ff0, 0x000ffc00, 0x03ff, 0xc000 }
},
{
+ "XBGR2101010",
+ WL_DRM_FORMAT_XBGR2101010, WL_SHM_FORMAT_XBGR2101010,
+ __DRI_IMAGE_FORMAT_XBGR2101010, 32,
+ { 0x03ff, 0x000ffc00, 0x3ff0, 0x }
+ },
+ {
+ "ABGR2101010",
+ WL_DRM_FORMAT_ABGR2101010, WL_SHM_FORMAT_ABGR2101010,
+ __DRI_IMAGE_FORMAT_ABGR2101010, 32,
+ { 0x03ff, 0x000ffc00, 0x3ff0, 0xc000 }
+ },
+ {
"XRGB",
WL_DRM_FORMAT_XRGB, WL_SHM_FORMAT_XRGB,
__DRI_IMAGE_FORMAT_XRGB, 32,
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Mesa (master): python: Use the unicode_escape codec
Module: Mesa
Branch: master
Commit: 91939255a7c556a5d85a57fb6a191e0c8cfd29ce
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=91939255a7c556a5d85a57fb6a191e0c8cfd29ce
Author: Mathieu Bridon
Date: Thu Jun 7 12:26:20 2018 +0200
python: Use the unicode_escape codec
Python 2 had string_escape and unicode_escape codecs. Python 3 only has
the latter. These work the same as far as we're concerned, so let's use
the future-proof one.
However, the reste of the code expects unicode strings, so we need to
decode them again.
Signed-off-by: Mathieu Bridon
Reviewed-by: Dylan Baker
---
src/amd/common/sid_tables.py | 2 +-
src/gallium/drivers/r600/egd_tables.py | 2 +-
2 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/src/amd/common/sid_tables.py b/src/amd/common/sid_tables.py
index 421c2a1335..7b5e626e3e 100644
--- a/src/amd/common/sid_tables.py
+++ b/src/amd/common/sid_tables.py
@@ -65,7 +65,7 @@ class StringTable:
"""
fragments = [
'"%s\\0" /* %s */' % (
-te[0].encode('string_escape'),
+te[0].encode('unicode_escape').decode(),
', '.join(str(idx) for idx in sorted(te[2]))
)
for te in self.table
diff --git a/src/gallium/drivers/r600/egd_tables.py
b/src/gallium/drivers/r600/egd_tables.py
index 7489649ec7..8a60a6229a 100644
--- a/src/gallium/drivers/r600/egd_tables.py
+++ b/src/gallium/drivers/r600/egd_tables.py
@@ -61,7 +61,7 @@ class StringTable:
"""
fragments = [
'"%s\\0" /* %s */' % (
-te[0].encode('string_escape'),
+te[0].encode('unicode_escape').decode(),
', '.join(str(idx) for idx in te[2])
)
for te in self.table
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Mesa (master): python: Explicitly add the 'L' suffix on Python 3
Module: Mesa
Branch: master
Commit: ad363913e6766280f53838126d67370f9e97aa12
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=ad363913e6766280f53838126d67370f9e97aa12
Author: Mathieu Bridon
Date: Mon Jun 25 18:31:01 2018 +0200
python: Explicitly add the 'L' suffix on Python 3
Python 2 had two integer types: int and long. Python 3 dropped the
latter, as it made the int type automatically support bigger numbers.
As a result, Python 3 lost the 'L' suffix on integer litterals.
This probably doesn't make much difference when compiling the generated
C code, but adding it explicitly means that both Python 2 and 3 generate
the exact same C code anyway, which makes it easier to compare and check
for discrepencies when moving to Python 3.
Signed-off-by: Mathieu Bridon
Reviewed-by: Dylan Baker
---
src/compiler/nir/nir_algebraic.py | 11 ++-
1 file changed, 10 insertions(+), 1 deletion(-)
diff --git a/src/compiler/nir/nir_algebraic.py
b/src/compiler/nir/nir_algebraic.py
index 6b8c881803..a84c41a78f 100644
--- a/src/compiler/nir/nir_algebraic.py
+++ b/src/compiler/nir/nir_algebraic.py
@@ -139,7 +139,16 @@ class Constant(Value):
if isinstance(self.value, (int, long)):
return hex(self.value)
elif isinstance(self.value, float):
- return hex(struct.unpack('Q', struct.pack('d', self.value))[0])
+ i = struct.unpack('Q', struct.pack('d', self.value))[0]
+ h = hex(i)
+
+ # On Python 2 this 'L' suffix is automatically added, but not on
Python 3
+ # Adding it explicitly makes the generated file identical, regardless
+ # of the Python version running this script.
+ if h[-1] != 'L' and i > sys.maxsize:
+h += 'L'
+
+ return h
else:
assert False
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Mesa (master): python: Explicitly use byte strings
Module: Mesa
Branch: master
Commit: a71df20855e1d5e875042ca34de9401951fb96a6
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=a71df20855e1d5e875042ca34de9401951fb96a6
Author: Mathieu Bridon
Date: Sun Jun 17 14:40:31 2018 +0200
python: Explicitly use byte strings
In both Python 2 and 3, zlib.Compress.compress() takes a byte string,
and returns a byte string as well.
In Python 2, the script was working because:
1. string literalls were byte strings;
2. opening a file in unicode mode, reading from it, then passing the
unicode string to compress() would automatically encode to a byte
string;
On Python 3, the above two points are not valid any more, so:
1. zlib.Compress.compress() refuses the passed unicode string;
2. compressed_data, defined as an empty unicode string literal, can't be
concatenated with the byte string returned by compress();
This commit fixes this by explicitly using byte strings where
appropriate, so that the script works on both Python 2 and 3.
Signed-off-by: Mathieu Bridon
Reviewed-by: Eric Engestrom
---
src/intel/genxml/gen_zipped_file.py | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/src/intel/genxml/gen_zipped_file.py
b/src/intel/genxml/gen_zipped_file.py
index 1d6bd56824..616409183f 100644
--- a/src/intel/genxml/gen_zipped_file.py
+++ b/src/intel/genxml/gen_zipped_file.py
@@ -42,10 +42,10 @@ def main():
print("} genxml_files_table[] = {")
xml_offset = 0
-compressed_data = ''
+compressed_data = b''
for i in range(1, len(sys.argv)):
filename = sys.argv[i]
-xml = open(filename).read()
+xml = open(filename, "rb").read()
xml_length = len(xml)
root = et.fromstring(xml)
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Mesa (master): python: Open file in binary mode
Module: Mesa
Branch: master
Commit: c24d82696867da13360f23abecf130e839da8b0f
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=c24d82696867da13360f23abecf130e839da8b0f
Author: Mathieu Bridon
Date: Tue Jun 26 08:52:08 2018 +0200
python: Open file in binary mode
The XML parser wants byte strings, not unicode strings.
In both Python 2 and 3, opening a file without specifying the mode will
open it for reading in text mode ('r').
On Python 2, the read() method of the file object will return byte
strings, while on Python 3 it will return unicode strings.
Explicitly specifying the binary mode ('rb') makes the behaviour
identical in both Python 2 and 3, returning what the XML parser
expects.
Signed-off-by: Mathieu Bridon
Reviewed-by: Eric Engestrom
Reviewed-by: Dylan Baker
---
src/intel/genxml/gen_bits_header.py | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/src/intel/genxml/gen_bits_header.py
b/src/intel/genxml/gen_bits_header.py
index e31e9ff103..dcd6ccb7d9 100644
--- a/src/intel/genxml/gen_bits_header.py
+++ b/src/intel/genxml/gen_bits_header.py
@@ -282,7 +282,7 @@ class XmlParser(object):
self.container = None
def parse(self, filename):
-with open(filename) as f:
+with open(filename, 'rb') as f:
self.parser.ParseFile(f)
def start_element(self, name, attrs):
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Mesa (master): python: Use open(), not file()
Module: Mesa
Branch: master
Commit: 8678fe537a5eeb9a537fc540672bf375e802c004
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=8678fe537a5eeb9a537fc540672bf375e802c004
Author: Mathieu Bridon
Date: Fri Jun 1 15:02:21 2018 +0200
python: Use open(), not file()
The latter is a constructor for file objects, but when actually opening
a file, using the former is more idiomatic.
In addition, file() is not a builtin any more in Python 3, so this makes
the script compatible with both Python 2 and Python 3.
Signed-off-by: Mathieu Bridon
Reviewed-by: Eric Engestrom
Reviewed-by: Dylan Baker
---
src/util/xmlpool/gen_xmlpool.py | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/src/util/xmlpool/gen_xmlpool.py b/src/util/xmlpool/gen_xmlpool.py
index 886c1854f3..b0db183854 100644
--- a/src/util/xmlpool/gen_xmlpool.py
+++ b/src/util/xmlpool/gen_xmlpool.py
@@ -168,7 +168,7 @@
print("/***\
# Process the options template and generate options.h with all
# translations.
-template = file (template_header_path, "r")
+template = open (template_header_path, "r")
descMatches = []
for line in template:
if len(descMatches) > 0:
@@ -199,6 +199,8 @@ for line in template:
else:
print(line, end='')
+template.close()
+
if len(descMatches) > 0:
sys.stderr.write ("Warning: unterminated description at end of file.\n")
expandMatches (descMatches, translations)
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Mesa (master): python: Better get character ordinals
Module: Mesa
Branch: master
Commit: 12eb5b496bc311ebfd1e68921ec7429e709daaca
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=12eb5b496bc311ebfd1e68921ec7429e709daaca
Author: Mathieu Bridon
Date: Sun Jun 17 14:44:46 2018 +0200
python: Better get character ordinals
In Python 2, iterating over a byte-string yields single-byte strings,
and we can pass them to ord() to get the corresponding integer.
In Python 3, iterating over a byte-string directly yields those
integers.
Transforming the byte string into a bytearray gives us a list of the
integers corresponding to each byte in the string, removing the need to
call ord().
This makes the script compatible with both Python 2 and 3.
Signed-off-by: Mathieu Bridon
Reviewed-by: Eric Engestrom
---
src/intel/genxml/gen_zipped_file.py | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/src/intel/genxml/gen_zipped_file.py
b/src/intel/genxml/gen_zipped_file.py
index af2008bea0..1d6bd56824 100644
--- a/src/intel/genxml/gen_zipped_file.py
+++ b/src/intel/genxml/gen_zipped_file.py
@@ -62,8 +62,8 @@ def main():
print("")
print("static const uint8_t compress_genxmls[] = {")
print(" ", end='')
-for i, c in enumerate(compressed_data, start=1):
-print("0x%.2x, " % ord(c), end='\n ' if not i % 12 else '')
+for i, c in enumerate(bytearray(compressed_data), start=1):
+print("0x%.2x, " % c, end='\n ' if not i % 12 else '')
print('\n};')
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Mesa (master): python: Don't abuse hex()
Module: Mesa
Branch: master
Commit: e40200e0aa14ec4180dd090dd37a2de80b5e4119
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=e40200e0aa14ec4180dd090dd37a2de80b5e4119
Author: Mathieu Bridon
Date: Sun Jun 17 17:53:16 2018 +0200
python: Don't abuse hex()
The hex() builtin returns a string containing the hexa-decimal
representation of an integer.
When the argument is not an integer, then the function calls that
object's __hex__() method, if one is defined. That method is supposed to
return a string.
While that's not explicitly documented, that string is supposed to be a
valid hexa-decimal representation for a number. Python 2 doesn't enforce
this though, which is why we got away with returning things like
'NIR_TRUE' which are not numbers.
In Python 3, the hex() builtin instead calls an object's __index__()
method, which itself must return an integer. That integer is then
automatically converted to a string with its hexa-decimal representation
by the rest of the hex() function.
As a result, we really can't make this compatible with Python 3 as it
is.
The solution is to stop using the hex() builtin, and instead use a hex()
object method, which can return whatever we want, in Python 2 and 3.
Signed-off-by: Mathieu Bridon
Reviewed-by: Eric Engestrom
Reviewed-by: Dylan Baker
---
src/compiler/nir/nir_algebraic.py | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/src/compiler/nir/nir_algebraic.py
b/src/compiler/nir/nir_algebraic.py
index fda72d3c69..6b8c881803 100644
--- a/src/compiler/nir/nir_algebraic.py
+++ b/src/compiler/nir/nir_algebraic.py
@@ -79,7 +79,7 @@ class Value(object):
static const ${val.c_type} ${val.name} = {
{ ${val.type_enum}, ${val.bit_size} },
% if isinstance(val, Constant):
- ${val.type()}, { ${hex(val)} /* ${val.value} */ },
+ ${val.type()}, { ${val.hex()} /* ${val.value} */ },
% elif isinstance(val, Variable):
${val.index}, /* ${val.var_name} */
${'true' if val.is_constant else 'false'},
@@ -133,7 +133,7 @@ class Constant(Value):
assert self.bit_size == 0 or self.bit_size == 32
self.bit_size = 32
- def __hex__(self):
+ def hex(self):
if isinstance(self.value, (bool)):
return 'NIR_TRUE' if self.value else 'NIR_FALSE'
if isinstance(self.value, (int, long)):
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Mesa (master): intel: tools: aubwrite: split gen[89] from gen10+
Module: Mesa
Branch: master
Commit: 2477e516d943bd7439b8073bb15eb1ede7ea74b9
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=2477e516d943bd7439b8073bb15eb1ede7ea74b9
Author: Lionel Landwerlin
Date: Sat Jul 28 13:52:44 2018 +0100
intel: tools: aubwrite: split gen[89] from gen10+
Gen10+ has an additional bit in MI_BATCH_BUFFER_END to signal the end
of the context image.
We select the largest size for the context image regardless of the
generation.
Signed-off-by: Lionel Landwerlin
Reviewed-by: Rafael Antognolli
---
src/intel/tools/aub_write.c | 216 ++--
src/intel/tools/gen10_context.h | 141 ++
src/intel/tools/gen8_context.h | 135 +
src/intel/tools/gen_context.h | 107
src/intel/tools/meson.build | 3 +-
5 files changed, 416 insertions(+), 186 deletions(-)
diff --git a/src/intel/tools/aub_write.c b/src/intel/tools/aub_write.c
index 6fb99feb00..e92bdaf5ed 100644
--- a/src/intel/tools/aub_write.c
+++ b/src/intel/tools/aub_write.c
@@ -31,18 +31,14 @@
#include "i915_drm.h"
#include "intel_aub.h"
+#include "gen_context.h"
#ifndef ALIGN
#define ALIGN(x, y) (((x) + (y)-1) & ~((y)-1))
#endif
-#define MI_LOAD_REGISTER_IMM_n(n) ((0x22 << 23) | (2 * (n) - 1))
-#define MI_LRI_FORCE_POSTED (1<<12)
-
#define MI_BATCH_NON_SECURE_I965 (1 << 8)
-#define MI_BATCH_BUFFER_END (0xA << 23)
-
#define min(a, b) ({\
__typeof(a) _a = (a); \
__typeof(b) _b = (b); \
@@ -55,183 +51,33 @@
_a > _b ? _a : _b; \
})
-#define HWS_PGA_RCSUNIT 0x02080
-#define HWS_PGA_VCSUNIT0 0x12080
-#define HWS_PGA_BCSUNIT 0x22080
-
-#define GFX_MODE_RCSUNIT 0x0229c
-#define GFX_MODE_VCSUNIT0 0x1229c
-#define GFX_MODE_BCSUNIT 0x2229c
-
-#define EXECLIST_SUBMITPORT_RCSUNIT 0x02230
-#define EXECLIST_SUBMITPORT_VCSUNIT0 0x12230
-#define EXECLIST_SUBMITPORT_BCSUNIT 0x22230
-
-#define EXECLIST_STATUS_RCSUNIT 0x02234
-#define EXECLIST_STATUS_VCSUNIT0 0x12234
-#define EXECLIST_STATUS_BCSUNIT 0x22234
-
-#define EXECLIST_SQ_CONTENTS0_RCSUNIT 0x02510
-#define EXECLIST_SQ_CONTENTS0_VCSUNIT0 0x12510
-#define EXECLIST_SQ_CONTENTS0_BCSUNIT 0x22510
-
-#define EXECLIST_CONTROL_RCSUNIT 0x02550
-#define EXECLIST_CONTROL_VCSUNIT0 0x12550
-#define EXECLIST_CONTROL_BCSUNIT 0x22550
-
-#define MEMORY_MAP_SIZE (64 /* MiB */ * 1024 * 1024)
-
-#define PTE_SIZE 4
-#define GEN8_PTE_SIZE 8
-
-#define NUM_PT_ENTRIES (ALIGN(MEMORY_MAP_SIZE, 4096) / 4096)
-#define PT_SIZE ALIGN(NUM_PT_ENTRIES * GEN8_PTE_SIZE, 4096)
-
-#define RING_SIZE (1 * 4096)
-#define PPHWSP_SIZE (1 * 4096)
-#define GEN11_LR_CONTEXT_RENDER_SIZE(14 * 4096)
-#define GEN10_LR_CONTEXT_RENDER_SIZE(19 * 4096)
-#define GEN9_LR_CONTEXT_RENDER_SIZE (22 * 4096)
-#define GEN8_LR_CONTEXT_RENDER_SIZE (20 * 4096)
-#define GEN8_LR_CONTEXT_OTHER_SIZE (2 * 4096)
-
-
-#define STATIC_GGTT_MAP_START 0
-
-#define RENDER_RING_ADDR STATIC_GGTT_MAP_START
-#define RENDER_CONTEXT_ADDR (RENDER_RING_ADDR + RING_SIZE)
-
-#define BLITTER_RING_ADDR (RENDER_CONTEXT_ADDR + PPHWSP_SIZE +
GEN10_LR_CONTEXT_RENDER_SIZE)
-#define BLITTER_CONTEXT_ADDR (BLITTER_RING_ADDR + RING_SIZE)
-
-#define VIDEO_RING_ADDR (BLITTER_CONTEXT_ADDR + PPHWSP_SIZE +
GEN8_LR_CONTEXT_OTHER_SIZE)
-#define VIDEO_CONTEXT_ADDR (VIDEO_RING_ADDR + RING_SIZE)
-
-#define STATIC_GGTT_MAP_END (VIDEO_CONTEXT_ADDR + PPHWSP_SIZE +
GEN8_LR_CONTEXT_OTHER_SIZE)
-#define STATIC_GGTT_MAP_SIZE (STATIC_GGTT_MAP_END - STATIC_GGTT_MAP_START)
-
-#define PML4_PHYS_ADDR ((uint64_t)(STATIC_GGTT_MAP_END))
-
-#define CONTEXT_FLAGS (0x339) /* Normal Priority | L3-LLC Coherency |
- * PPGTT Enabled |
- * Legacy Context with 64 bit VA support |
- * Valid
- */
-
-#define RENDER_CONTEXT_DESCRIPTOR ((uint64_t)1 << 62 | RENDER_CONTEXT_ADDR |
CONTEXT_FLAGS)
-#define BLITTER_CONTEXT_DESCRIPTOR ((uint64_t)2 << 62 | BLITTER_CONTEXT_ADDR |
CONTEXT_FLAGS)
-#define VIDEO_CONTEXT_DESCRIPTOR ((uint64_t)3 << 62 | VIDEO_CONTEXT_ADDR |
CONTEXT_FLAGS)
-
-static const uint32_t render_context_init[GEN9_LR_CONTEXT_RENDER_SIZE / /*
Choose the largest */
- sizeof(uint32_t)] = {
- 0 /* MI_NOOP */,
- MI_LOAD_REGISTER_IMM_n(14) | MI_LRI_FORCE_POSTED,
- 0x2244 /* CONTEXT_CONTROL */, 0x90009 /* Inhibit Synchronous Context
Switch | Engine Context Restore Inhibit */,
- 0x2034 /* RING_HEAD */, 0,
- 0x2030 /* RING_TAIL */, 0,
- 0x2038 /* RING_BUFFER_START */, RENDER_RING_ADDR,
- 0x203C /* RING_BUFFER_CONTROL */, (RING_SIZE - 4096) | 1 /* Buffer Length
| Ring Buffer Enable */,
- 0x2168 /* BB_HEAD_U */, 0,
- 0x2140 /* BB_HEAD_L */, 0,
-
Mesa (master): docs: mark ARB_ES3_2_compatibility as done for radeonsi
Module: Mesa Branch: master Commit: 26d3e2b4b0bfb3b00362800172291516d340cca0 URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=26d3e2b4b0bfb3b00362800172291516d340cca0 Author: Marek Olšák Date: Wed Aug 1 11:36:18 2018 -0400 docs: mark ARB_ES3_2_compatibility as done for radeonsi --- docs/features.txt | 2 +- docs/relnotes/18.2.0.html | 1 + 2 files changed, 2 insertions(+), 1 deletion(-) diff --git a/docs/features.txt b/docs/features.txt index 46e5a25a75..37614470a1 100644 --- a/docs/features.txt +++ b/docs/features.txt @@ -299,7 +299,7 @@ Khronos, ARB, and OES extensions that are not part of any OpenGL or OpenGL ES ve GL_ARB_bindless_texture DONE (nvc0, radeonsi) GL_ARB_cl_event not started GL_ARB_compute_variable_group_sizeDONE (nvc0, radeonsi) - GL_ARB_ES3_2_compatibilityDONE (i965/gen8+, virgl) + GL_ARB_ES3_2_compatibilityDONE (i965/gen8+, radeonsi, virgl) GL_ARB_fragment_shader_interlock DONE (i965) GL_ARB_gpu_shader_int64 DONE (i965/gen8+, nvc0, radeonsi, softpipe, llvmpipe) GL_ARB_parallel_shader_compilenot started, but Chia-I Wu did some related work in 2014 diff --git a/docs/relnotes/18.2.0.html b/docs/relnotes/18.2.0.html index 17c94f6d88..a4bc1eb6c9 100644 --- a/docs/relnotes/18.2.0.html +++ b/docs/relnotes/18.2.0.html @@ -53,6 +53,7 @@ Note: some of the new features are only available with certain drivers. OpenGL 4.4 Compatibility profile on radeonsi OpenGL ES 3.2 on radeonsi +GL_ARB_ES3_2_compatibility on radeonsi GL_ARB_fragment_shader_interlock on i965 GL_ARB_sample_locations and GL_NV_sample_locations on nvc0 (GM200+) GL_ANDROID_extension_pack_es31a on radeonsi. ___ mesa-commit mailing list mesa-commit@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/mesa-commit
Mesa (staging/18.1): dri3: For 1.2, use root window instead of pixmap drawable
Module: Mesa
Branch: staging/18.1
Commit: 88b6d6443e02217e8f26260a03bbc6c923ee4a8c
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=88b6d6443e02217e8f26260a03bbc6c923ee4a8c
Author: Olivier Fourdan
Date: Thu Jul 26 09:46:39 2018 +0200
dri3: For 1.2, use root window instead of pixmap drawable
get_supported_modifiers() and pixmap_from_buffers() requests both
expect a window as drawable, passing a pixmap will fail as the Xserver
will fail to match the given drawable to a window.
That leads to dri3_alloc_render_buffer() to return NULL and breaks
rendering when using GLX_DOUBLEBUFFER on pixmaps.
Query the root window of the pixmap on first init, and use the root
window instead of the pixmap drawable for get_supported_modifiers()
and pixmap_from_buffers().
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=107117
Fixes: 069fdd5 ("egl/x11: Support DRI3 v1.1")
Signed-off-by: Olivier Fourdan
Reviewed-by: Daniel Stone
Reviewed-by: Eric Anholt
(cherry picked from commit 03a61b977e1f6adb64658aa059ce53e766ff9ad9)
---
src/loader/loader_dri3_helper.c | 12 +---
src/loader/loader_dri3_helper.h | 1 +
2 files changed, 10 insertions(+), 3 deletions(-)
diff --git a/src/loader/loader_dri3_helper.c b/src/loader/loader_dri3_helper.c
index bef6b6d43a..9b787bb175 100644
--- a/src/loader/loader_dri3_helper.c
+++ b/src/loader/loader_dri3_helper.c
@@ -1147,7 +1147,7 @@ dri3_alloc_render_buffer(struct loader_dri3_drawable
*draw, unsigned int format,
uint32_t count = 0;
mod_cookie = xcb_dri3_get_supported_modifiers(draw->conn,
- draw->drawable,
+ draw->window,
depth, buffer->cpp * 8);
mod_reply = xcb_dri3_get_supported_modifiers_reply(draw->conn,
mod_cookie,
@@ -1279,7 +1279,7 @@ dri3_alloc_render_buffer(struct loader_dri3_drawable
*draw, unsigned int format,
buffer->modifier != DRM_FORMAT_MOD_INVALID) {
xcb_dri3_pixmap_from_buffers(draw->conn,
pixmap,
- draw->drawable,
+ draw->window,
num_planes,
width, height,
buffer->strides[0], buffer->offsets[0],
@@ -1355,6 +1355,7 @@ dri3_update_drawable(__DRIdrawable *driDrawable,
xcb_generic_error_t *error;
xcb_present_query_capabilities_cookie_t present_capabilities_cookie;
xcb_present_query_capabilities_reply_t*present_capabilities_reply;
+ xcb_window_t root_win;
draw->first_init = false;
@@ -1392,11 +1393,11 @@ dri3_update_drawable(__DRIdrawable *driDrawable,
mtx_unlock(&draw->mtx);
return false;
}
-
draw->width = geom_reply->width;
draw->height = geom_reply->height;
draw->depth = geom_reply->depth;
draw->vtable->set_drawable_size(draw, draw->width, draw->height);
+ root_win = geom_reply->root;
free(geom_reply);
@@ -1430,6 +1431,11 @@ dri3_update_drawable(__DRIdrawable *driDrawable,
xcb_unregister_for_special_event(draw->conn, draw->special_event);
draw->special_event = NULL;
}
+
+ if (draw->is_pixmap)
+ draw->window = root_win;
+ else
+ draw->window = draw->drawable;
}
dri3_flush_present_events(draw);
mtx_unlock(&draw->mtx);
diff --git a/src/loader/loader_dri3_helper.h b/src/loader/loader_dri3_helper.h
index 7e3d82947b..51d000343d 100644
--- a/src/loader/loader_dri3_helper.h
+++ b/src/loader/loader_dri3_helper.h
@@ -114,6 +114,7 @@ struct loader_dri3_drawable {
xcb_connection_t *conn;
__DRIdrawable *dri_drawable;
xcb_drawable_t drawable;
+ xcb_window_t window;
int width;
int height;
int depth;
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Mesa (staging/18.1): etnaviv: fix typo in query names
Module: Mesa
Branch: staging/18.1
Commit: 0a19e01038d2d5eda91d02b6e22685396a02ca40
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=0a19e01038d2d5eda91d02b6e22685396a02ca40
Author: Christian Gmeiner
Date: Mon Jul 30 09:44:01 2018 +0200
etnaviv: fix typo in query names
Fixes: d0bed0b4944d ("etnaviv: support HI performance counters")
Cc: mesa-sta...@lists.freedesktop.org
Signed-off-by: Christian Gmeiner
Reviewed-by: Chris Healy
(cherry picked from commit e1d4882d05dab49395be459f34b1559292d5b6f6)
---
src/gallium/drivers/etnaviv/etnaviv_query_pm.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/src/gallium/drivers/etnaviv/etnaviv_query_pm.c
b/src/gallium/drivers/etnaviv/etnaviv_query_pm.c
index 981cfd2c4d..ade0b9790c 100644
--- a/src/gallium/drivers/etnaviv/etnaviv_query_pm.c
+++ b/src/gallium/drivers/etnaviv/etnaviv_query_pm.c
@@ -59,7 +59,7 @@ static const char *group_names[] = {
static const struct etna_perfmon_config query_config[] = {
{
- .name = "hi-total-cyles",
+ .name = "hi-total-cycles",
.type = ETNA_QUERY_HI_TOTAL_CYCLES,
.group_id = ETNA_QUERY_HI_GROUP_ID,
.source = (const struct etna_perfmon_source[]) {
@@ -67,7 +67,7 @@ static const struct etna_perfmon_config query_config[] = {
}
},
{
- .name = "hi-idle-cyles",
+ .name = "hi-idle-cycles",
.type = ETNA_QUERY_HI_IDLE_CYCLES,
.group_id = ETNA_QUERY_HI_GROUP_ID,
.source = (const struct etna_perfmon_source[]) {
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Mesa (staging/18.1): ac/surface: fix MSAA corruption on Vega due to FMASK tile swizzle
Module: Mesa Branch: staging/18.1 Commit: 948e06a4341d2c534e6b48cdf6affcd2665b1316 URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=948e06a4341d2c534e6b48cdf6affcd2665b1316 Author: Marek Olšák Date: Thu Jul 26 22:46:21 2018 -0400 ac/surface: fix MSAA corruption on Vega due to FMASK tile swizzle a needle in the haystack? Cc: 18.1 Reviewed-by: Bas Nieuwenhuizen (cherry picked from commit c5c6e0187fd5d535c304ca3fd62de0f5e636c0c2) --- src/amd/common/ac_surface.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/amd/common/ac_surface.c b/src/amd/common/ac_surface.c index fc969df2d1..0ec3cbdeda 100644 --- a/src/amd/common/ac_surface.c +++ b/src/amd/common/ac_surface.c @@ -,7 +,7 @@ static int gfx9_compute_miptree(ADDR_HANDLE addrlib, /* This counter starts from 1 instead of 0. */ xin.surfIndex = p_atomic_inc_return(config->info.fmask_surf_index); xin.flags = in->flags; - xin.swizzleMode = in->swizzleMode; + xin.swizzleMode = fin.swizzleMode; xin.resourceType = in->resourceType; xin.format = in->format; xin.numSamples = in->numSamples; ___ mesa-commit mailing list mesa-commit@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/mesa-commit
Mesa (staging/18.1): r600: reduce num compute threads to 1024.
Module: Mesa Branch: staging/18.1 Commit: 8e49c2ebc186c0c43236c6c5f1a0d54e5fcdb17c URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=8e49c2ebc186c0c43236c6c5f1a0d54e5fcdb17c Author: Dave Airlie Date: Wed Jul 25 13:14:58 2018 +1000 r600: reduce num compute threads to 1024. I copied this value from radeonsi, but it was wrong, 1024 seems to be correct answer from looking at gpuinfo. This should fix a few compute shader related hangs. (at least in CTS) Cc: (airlied: pushed because it avoids hangs) (cherry picked from commit 9039cf70fa0b785f390c649486e12d6c10e9142b) --- src/gallium/drivers/r600/r600_pipe_common.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/gallium/drivers/r600/r600_pipe_common.c b/src/gallium/drivers/r600/r600_pipe_common.c index 255a1e01b7..2a05e44199 100644 --- a/src/gallium/drivers/r600/r600_pipe_common.c +++ b/src/gallium/drivers/r600/r600_pipe_common.c @@ -996,7 +996,7 @@ static unsigned get_max_threads_per_block(struct r600_common_screen *screen, if (ir_type != PIPE_SHADER_IR_TGSI) return 256; if (screen->chip_class >= EVERGREEN) - return 2048; + return 1024; return 256; } ___ mesa-commit mailing list mesa-commit@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/mesa-commit
Mesa (master): scons: require scons 2.4 or greater
Module: Mesa
Branch: master
Commit: 810c9a4ebaf22e8f7c08805c1b829b3d77be7079
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=810c9a4ebaf22e8f7c08805c1b829b3d77be7079
Author: Juan A. Suarez Romero
Date: Wed Aug 1 17:48:11 2018 +0200
scons: require scons 2.4 or greater
There is a bug with scons 2.3, used in Travis, where it fails to detect
some C functions.
Reviewed-by: Andres Gomez
---
SConstruct | 6 ++
1 file changed, 6 insertions(+)
diff --git a/SConstruct b/SConstruct
index a59a8ea210..6e034fb968 100644
--- a/SConstruct
+++ b/SConstruct
@@ -28,6 +28,12 @@ import SCons.Util
import common
###
+# Minimal scons version
+
+EnsureSConsVersion(2, 4)
+
+
+###
# Configuration options
opts = Variables('config.py')
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Mesa (master): vc4: Fix automake linking error.
Module: Mesa
Branch: master
Commit: d74227056497cae04fa28bb1c27d9f9dd07526bd
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=d74227056497cae04fa28bb1c27d9f9dd07526bd
Author: Juan A. Suarez Romero
Date: Tue Jul 31 14:17:23 2018 +0200
vc4: Fix automake linking error.
CXXLDgallium_dri.la
../../../../src/gallium/drivers/vc4/.libs/libvc4.a(vc4_cl_dump.o): In function
`vc4_dump_cl':
src/gallium/drivers/vc4/vc4_cl_dump.c:45: undefined reference to
`clif_dump_init'
src/gallium/drivers/vc4/vc4_cl_dump.c:82: undefined reference to
`clif_dump_destroy'
../../../../src/broadcom/cle/.libs/libbroadcom_cle.a(cle_libbroadcom_cle_la-v3d_decoder.o):
In function `v3d_field_iterator_next':
src/broadcom/cle/v3d_decoder.c:902: undefined reference to `clif_lookup_bo'
Fixes: e92959c4e0 ("v3d: Pass the whole clif_dump structure to
v3d_print_group().")
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=107423
CC: Eric Anholt
Acked-by: Eric Anholt
Reviewed-by: Andres Gomez
---
src/gallium/drivers/vc4/Automake.inc | 9 +
1 file changed, 9 insertions(+)
diff --git a/src/gallium/drivers/vc4/Automake.inc
b/src/gallium/drivers/vc4/Automake.inc
index b1aa9726bd..650466e495 100644
--- a/src/gallium/drivers/vc4/Automake.inc
+++ b/src/gallium/drivers/vc4/Automake.inc
@@ -2,9 +2,18 @@ if HAVE_GALLIUM_VC4
TARGET_DRIVERS += vc4
TARGET_CPPFLAGS += -DGALLIUM_VC4
+
+if !HAVE_GALLIUM_V3D
+TARGET_LIB_DEPS += \
+ $(top_builddir)/src/broadcom/libbroadcom.la \
+ $(top_builddir)/src/broadcom/libbroadcom_v33.la \
+ $(top_builddir)/src/broadcom/libbroadcom_v41.la
+endif
+
TARGET_LIB_DEPS += \
$(top_builddir)/src/gallium/winsys/vc4/drm/libvc4drm.la \
$(top_builddir)/src/gallium/drivers/vc4/libvc4.la \
$(top_builddir)/src/broadcom/cle/libbroadcom_cle.la
+
endif
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Mesa (master): travis: install scons from pip
Module: Mesa Branch: master Commit: fea0b920426ae040d6fde0c6db79f0f8b4db3100 URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=fea0b920426ae040d6fde0c6db79f0f8b4db3100 Author: Juan A. Suarez Romero Date: Wed Aug 1 17:14:56 2018 +0200 travis: install scons from pip The ubuntu version provided by Travis is a bit old, and does not detect correctly some C functions. Use a more modern version through scons. Reviewed-by: Andres Gomez --- .travis.yml | 8 +--- 1 file changed, 5 insertions(+), 3 deletions(-) diff --git a/.travis.yml b/.travis.yml index 8b1730bec6..b0ddbe226c 100644 --- a/.travis.yml +++ b/.travis.yml @@ -400,7 +400,6 @@ matrix: addons: apt: packages: -- scons # Common - xz-utils - x11proto-xf86vidmode-dev @@ -419,7 +418,6 @@ matrix: addons: apt: packages: -- scons # LLVM packaging is broken and misses these dependencies - libedit-dev - llvm-3.3-dev @@ -445,7 +443,6 @@ matrix: sources: - llvm-toolchain-trusty-5.0 packages: -- scons # LLVM packaging is broken and misses these dependencies - libedit-dev # From sources above @@ -502,6 +499,11 @@ install: pip3 install --user "meson<0.45.0"; fi + # Install a more modern scons from pip. + - if test "x$BUILD" = xscons; then + pip2 install --user "scons>=2.4"; +fi + # Since libdrm gets updated in configure.ac regularly, try to pick up the # latest version from there. - for line in `grep "^LIBDRM.*_REQUIRED=" configure.ac`; do ___ mesa-commit mailing list mesa-commit@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/mesa-commit
Mesa (master): v3d: Actually put the "%s" in the snprintf.
Module: Mesa
Branch: master
Commit: c2eab33b088f90cb66802a9e96e92305cccebdc7
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=c2eab33b088f90cb66802a9e96e92305cccebdc7
Author: Eric Anholt
Date: Wed Aug 1 11:25:58 2018 -0700
v3d: Actually put the "%s" in the snprintf.
I missed an important part when porting the change over, fixing my
compiler warning but breaking -Werror=format-security.
Fixes: e6ff5ac4468e ("v3d: use snprintf(..., "%s", ...) instead of strncpy")
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=107443
---
src/broadcom/cle/v3d_decoder.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/src/broadcom/cle/v3d_decoder.c b/src/broadcom/cle/v3d_decoder.c
index 4496388e31..373a1d9964 100644
--- a/src/broadcom/cle/v3d_decoder.c
+++ b/src/broadcom/cle/v3d_decoder.c
@@ -834,7 +834,7 @@ iter_advance_field(struct v3d_field_iterator *iter)
iter->field = iter->group->fields[iter->field_iter++];
if (iter->field->name)
-snprintf(iter->name, sizeof(iter->name), iter->field->name);
+snprintf(iter->name, sizeof(iter->name), "%s",
iter->field->name);
else
memset(iter->name, 0, sizeof(iter->name));
iter->offset = iter_group_offset_bits(iter, iter->group_iter) / 8 +
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Mesa (master): ac,radeonsi: reduce optimizations for complex compute shaders on older APUs (v2)
Module: Mesa
Branch: master
Commit: cb6b241c301d5352a5bcaab52bbfaf89e700b2b2
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=cb6b241c301d5352a5bcaab52bbfaf89e700b2b2
Author: Marek Olšák
Date: Thu Jul 19 22:55:49 2018 -0400
ac,radeonsi: reduce optimizations for complex compute shaders on older APUs (v2)
To make dEQP-GLES31.functional.ssbo.layout.random.all_shared_buffer.23
finish sooner on the older CPUs. (otherwise it gets killed and we fail
the test)
Acked-by: Dave Airlie
---
src/amd/common/ac_llvm_util.c | 18 +++---
src/amd/common/ac_llvm_util.h | 11 +++-
src/gallium/drivers/radeonsi/si_pipe.c | 12 -
src/gallium/drivers/radeonsi/si_shader.c | 29 ++
src/gallium/drivers/radeonsi/si_shader_internal.h | 3 ++-
.../drivers/radeonsi/si_shader_tgsi_setup.c| 8 --
6 files changed, 68 insertions(+), 13 deletions(-)
diff --git a/src/amd/common/ac_llvm_util.c b/src/amd/common/ac_llvm_util.c
index 678bc34e6f..10e1ca99d4 100644
--- a/src/amd/common/ac_llvm_util.c
+++ b/src/amd/common/ac_llvm_util.c
@@ -142,6 +142,7 @@ const char *ac_get_llvm_processor_name(enum radeon_family
family)
static LLVMTargetMachineRef ac_create_target_machine(enum radeon_family family,
enum
ac_target_machine_options tm_options,
+LLVMCodeGenOptLevel level,
const char **out_triple)
{
assert(family >= CHIP_TAHITI);
@@ -163,7 +164,7 @@ static LLVMTargetMachineRef ac_create_target_machine(enum
radeon_family family,
triple,
ac_get_llvm_processor_name(family),
features,
-LLVMCodeGenLevelDefault,
+level,
LLVMRelocDefault,
LLVMCodeModelDefault);
@@ -308,11 +309,20 @@ ac_init_llvm_compiler(struct ac_llvm_compiler *compiler,
const char *triple;
memset(compiler, 0, sizeof(*compiler));
- compiler->tm = ac_create_target_machine(family,
- tm_options, &triple);
+ compiler->tm = ac_create_target_machine(family, tm_options,
+ LLVMCodeGenLevelDefault,
+ &triple);
if (!compiler->tm)
return false;
+ if (tm_options & AC_TM_CREATE_LOW_OPT) {
+ compiler->low_opt_tm =
+ ac_create_target_machine(family, tm_options,
+LLVMCodeGenLevelLess, NULL);
+ if (!compiler->low_opt_tm)
+ goto fail;
+ }
+
if (okay_to_leak_target_library_info || (HAVE_LLVM >= 0x0700)) {
compiler->target_library_info =
ac_create_target_library_info(triple);
@@ -341,6 +351,8 @@ ac_destroy_llvm_compiler(struct ac_llvm_compiler *compiler)
if (compiler->target_library_info)
ac_dispose_target_library_info(compiler->target_library_info);
#endif
+ if (compiler->low_opt_tm)
+ LLVMDisposeTargetMachine(compiler->low_opt_tm);
if (compiler->tm)
LLVMDisposeTargetMachine(compiler->tm);
}
diff --git a/src/amd/common/ac_llvm_util.h b/src/amd/common/ac_llvm_util.h
index d4dea4dfde..eaf5f21876 100644
--- a/src/amd/common/ac_llvm_util.h
+++ b/src/amd/common/ac_llvm_util.h
@@ -64,6 +64,7 @@ enum ac_target_machine_options {
AC_TM_PROMOTE_ALLOCA_TO_SCRATCH = (1 << 4),
AC_TM_CHECK_IR = (1 << 5),
AC_TM_ENABLE_GLOBAL_ISEL = (1 << 6),
+ AC_TM_CREATE_LOW_OPT = (1 << 7),
};
enum ac_float_mode {
@@ -74,10 +75,18 @@ enum ac_float_mode {
/* Per-thread persistent LLVM objects. */
struct ac_llvm_compiler {
- LLVMTargetMachineReftm;
LLVMTargetLibraryInfoReftarget_library_info;
LLVMPassManagerRef passmgr;
+
+ /* Default compiler. */
+ LLVMTargetMachineReftm;
struct ac_compiler_passes *passes;
+
+ /* Optional compiler for faster compilation with fewer optimizations.
+* LLVM modules can be created with "tm" too. There is no difference.
+*/
+ LLVMTargetMachineReflow_opt_tm; /* uses -O1 instead of -O2
*/
+ struct ac_compiler_passes *low_opt_passes;
};
const char *ac_get_llvm_processor_name(enum radeon_family family);
diff --git a/src/gallium/drivers/radeonsi/si_pipe.c
b/src/gallium/drivers/radeonsi/si_pipe.c
index 9e3a579d74..cc05d2f8de 100644
--- a/src/gallium/drivers/radeonsi/si_pipe.c
+++ b/src/gallium/drivers/radeonsi/si_pipe.c
@@ -108,22 +108,32 @@ s
Mesa (master): gallium: fix ddebug on windows
Module: Mesa
Branch: master
Commit: 2877b6555c51e896afbc9b8b46ba62a076ccbbc6
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=2877b6555c51e896afbc9b8b46ba62a076ccbbc6
Author: Dylan Baker
Date: Wed Apr 18 10:21:14 2018 -0700
gallium: fix ddebug on windows
By including the proper headers for getpid and for mkdir.
Fixes: 6ff0c6f4ebcb87ea6c6fe5a4ba90b548f666067d
("gallium: move ddebug, noop, rbug, trace to auxiliary to improve build
times")
Signed-off-by: Dylan Baker
Reviewed-by: Marek Olšák
---
src/gallium/auxiliary/driver_ddebug/dd_util.h | 6 +-
1 file changed, 5 insertions(+), 1 deletion(-)
diff --git a/src/gallium/auxiliary/driver_ddebug/dd_util.h
b/src/gallium/auxiliary/driver_ddebug/dd_util.h
index 8953e34d58..bcf026f2ef 100644
--- a/src/gallium/auxiliary/driver_ddebug/dd_util.h
+++ b/src/gallium/auxiliary/driver_ddebug/dd_util.h
@@ -37,9 +37,13 @@
#include "util/u_debug.h"
#include "pipe/p_config.h"
-#ifdef PIPE_OS_UNIX
+#if defined(PIPE_OS_UNIX)
#include
#include
+#elif defined(PIPE_OS_WINDOWS)
+#include
+#include
+#define mkdir(dir, mode) _mkdir(dir)
#endif
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Mesa (master): util: move process.[ch] to u_process.[ch]
Module: Mesa
Branch: master
Commit: 17f49950da91137366910183f616d15b8bbf580c
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=17f49950da91137366910183f616d15b8bbf580c
Author: Dylan Baker
Date: Tue Jul 10 15:00:13 2018 -0700
util: move process.[ch] to u_process.[ch]
On windows process.h is a system provided header, and it's required in
include/c11/threads_win32.h. This header interferes with searching for
that header, and results in windows build warnings with scons, but
errors in meson which doesn't allow implicit function declarations. Just
rename process to u_process, which follows the style of utils anyway.
Fixes: 2e1e6511f76370870b5cde10caa9ca3b6d0dc65f
("util: extract get_process_name from xmlconfig.c")
Signed-off-by: Dylan Baker
Reviewed-by: Marek Olšák
---
src/gallium/auxiliary/os/os_process.c | 2 +-
src/util/Makefile.sources | 4 ++--
src/util/meson.build | 4 ++--
src/util/{process.c => u_process.c} | 2 +-
src/util/{process.h => u_process.h} | 0
src/util/u_queue.c| 2 +-
src/util/xmlconfig.c | 2 +-
7 files changed, 8 insertions(+), 8 deletions(-)
diff --git a/src/gallium/auxiliary/os/os_process.c
b/src/gallium/auxiliary/os/os_process.c
index 87072f0b04..766cf80615 100644
--- a/src/gallium/auxiliary/os/os_process.c
+++ b/src/gallium/auxiliary/os/os_process.c
@@ -29,7 +29,7 @@
#include "pipe/p_config.h"
#include "os/os_process.h"
#include "util/u_memory.h"
-#include "util/process.h"
+#include "util/u_process.h"
#if defined(PIPE_SUBSYSTEM_WINDOWS_USER)
# include
diff --git a/src/util/Makefile.sources b/src/util/Makefile.sources
index fe34fc2669..531fd833c7 100644
--- a/src/util/Makefile.sources
+++ b/src/util/Makefile.sources
@@ -24,8 +24,8 @@ MESA_UTIL_FILES := \
mesa-sha1.h \
os_time.c \
os_time.h \
- process.c \
- process.h \
+ u_process.c \
+ u_process.h \
sha1/sha1.c \
sha1/sha1.h \
ralloc.c \
diff --git a/src/util/meson.build b/src/util/meson.build
index 8c91be8539..6386d945a2 100644
--- a/src/util/meson.build
+++ b/src/util/meson.build
@@ -48,8 +48,8 @@ files_mesa_util = files(
'mesa-sha1.h',
'os_time.c',
'os_time.h',
- 'process.c',
- 'process.h',
+ 'u_process.c',
+ 'u_process.h',
'sha1/sha1.c',
'sha1/sha1.h',
'ralloc.c',
diff --git a/src/util/process.c b/src/util/u_process.c
similarity index 99%
rename from src/util/process.c
rename to src/util/u_process.c
index 6e6376986f..5bf3f56db4 100644
--- a/src/util/process.c
+++ b/src/util/u_process.c
@@ -25,7 +25,7 @@
* of the Software.
*/
-#include "process.h"
+#include "u_process.h"
#include
#include
#include
diff --git a/src/util/process.h b/src/util/u_process.h
similarity index 100%
rename from src/util/process.h
rename to src/util/u_process.h
diff --git a/src/util/u_queue.c b/src/util/u_queue.c
index be95d9eec3..4ce1af518b 100644
--- a/src/util/u_queue.c
+++ b/src/util/u_queue.c
@@ -31,7 +31,7 @@
#include "util/os_time.h"
#include "util/u_string.h"
#include "util/u_thread.h"
-#include "process.h"
+#include "u_process.h"
static void util_queue_killall_and_wait(struct util_queue *queue);
diff --git a/src/util/xmlconfig.c b/src/util/xmlconfig.c
index d3847911ba..ba657294c1 100644
--- a/src/util/xmlconfig.c
+++ b/src/util/xmlconfig.c
@@ -37,7 +37,7 @@
#include
#include
#include "xmlconfig.h"
-#include "process.h"
+#include "u_process.h"
/** \brief Find an option in an option cache with the name as key */
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Mesa (master): nir/meson: fix c vs cpp args for nir test
Module: Mesa
Branch: master
Commit: 34998aae18b1435d6af70c64eaf50a77e7410058
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=34998aae18b1435d6af70c64eaf50a77e7410058
Author: Dylan Baker
Date: Tue May 22 15:34:38 2018 -0700
nir/meson: fix c vs cpp args for nir test
Fixes: d1992255bb29054fa51763376d125183a9f602f3
("meson: Add build Intel "anv" vulkan driver")
Signed-off-by: Dylan Baker
Reviewed-by: Eric Engestrom
---
src/compiler/nir/meson.build | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/src/compiler/nir/meson.build b/src/compiler/nir/meson.build
index a1bb19356c..010da386ce 100644
--- a/src/compiler/nir/meson.build
+++ b/src/compiler/nir/meson.build
@@ -237,7 +237,7 @@ if with_tests
executable(
'nir_control_flow_test',
files('tests/control_flow_tests.cpp'),
- c_args : [c_vis_args, c_msvc_compat_args, no_override_init_args],
+ cpp_args : [cpp_vis_args, cpp_msvc_compat_args],
include_directories : [inc_common],
dependencies : [dep_thread, idep_gtest, idep_nir],
link_with : libmesa_util,
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Mesa (master): docs: update 18.2.0 release notes for virgl
Module: Mesa Branch: master Commit: 70c34a1bd2f737ac22ce0687b972f731d0f69f13 URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=70c34a1bd2f737ac22ce0687b972f731d0f69f13 Author: Dave Airlie Date: Thu Aug 2 08:43:56 2018 +1000 docs: update 18.2.0 release notes for virgl --- docs/relnotes/18.2.0.html | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/docs/relnotes/18.2.0.html b/docs/relnotes/18.2.0.html index a4bc1eb6c9..fb7a12f285 100644 --- a/docs/relnotes/18.2.0.html +++ b/docs/relnotes/18.2.0.html @@ -51,8 +51,9 @@ Note: some of the new features are only available with certain drivers. +OpenGL 4.3 on virgl OpenGL 4.4 Compatibility profile on radeonsi -OpenGL ES 3.2 on radeonsi +OpenGL ES 3.2 on radeonsi and virgl GL_ARB_ES3_2_compatibility on radeonsi GL_ARB_fragment_shader_interlock on i965 GL_ARB_sample_locations and GL_NV_sample_locations on nvc0 (GM200+) ___ mesa-commit mailing list mesa-commit@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/mesa-commit
Mesa (master): i965/fs: Flag all slots of a flat input as flat
Module: Mesa
Branch: master
Commit: 57804efa885074866e1388191b5f48680c6151da
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=57804efa885074866e1388191b5f48680c6151da
Author: Jason Ekstrand
Date: Tue Jul 31 05:31:47 2018 -0700
i965/fs: Flag all slots of a flat input as flat
Otherwise, only the first vec4 of a matrix or other complex type will
get marked as flat and we'll interpolate the others. This was caught by
a dEQP test which started failing because it did a SSO vs. non-SSO
comparison. Previously, we did the interpolation wrong consistently in
both versions. However, with one of Tim Arceri's NIR linkingpatches, we
started splitting the matrix input into vectors at link time in the
non-SSO version and it started getting correctly interpolated which
didn't match the broken SSO version. As of this commit, they both get
correctly interpolated.
Fixes: e61cc87c757f8bc "i965/fs: Add a flat_inputs field to prog_data"
Reviewed-by: Kenneth Graunke
Reviewed-by: Timothy Arceri
---
src/intel/compiler/brw_fs.cpp | 15 +--
1 file changed, 9 insertions(+), 6 deletions(-)
diff --git a/src/intel/compiler/brw_fs.cpp b/src/intel/compiler/brw_fs.cpp
index 7ddbd285fe..20b89035e1 100644
--- a/src/intel/compiler/brw_fs.cpp
+++ b/src/intel/compiler/brw_fs.cpp
@@ -6880,14 +6880,17 @@ brw_compute_flat_inputs(struct brw_wm_prog_data
*prog_data,
prog_data->flat_inputs = 0;
nir_foreach_variable(var, &shader->inputs) {
- int input_index = prog_data->urb_setup[var->data.location];
+ unsigned slots = glsl_count_attribute_slots(var->type, false);
+ for (unsigned s = 0; s < slots; s++) {
+ int input_index = prog_data->urb_setup[var->data.location + s];
- if (input_index < 0)
-continue;
+ if (input_index < 0)
+continue;
- /* flat shading */
- if (var->data.interpolation == INTERP_MODE_FLAT)
- prog_data->flat_inputs |= (1 << input_index);
+ /* flat shading */
+ if (var->data.interpolation == INTERP_MODE_FLAT)
+prog_data->flat_inputs |= 1 << input_index;
+ }
}
}
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Mesa (master): anv/pipeline: Fix up deref modes if we delete a FS output
Module: Mesa
Branch: master
Commit: 4d57e543b8e3bc0c5e0e6ced1f0d171a2cab3b8c
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=4d57e543b8e3bc0c5e0e6ced1f0d171a2cab3b8c
Author: Jason Ekstrand
Date: Wed Jun 27 18:25:17 2018 -0700
anv/pipeline: Fix up deref modes if we delete a FS output
With the new deref instructions, we have to keep the modes consistent
between the derefs and the variables they reference. Since we remove
outputs by changing them to local variables, we need to run the fixup
pass to fix the modes.
Reviewed-by: Timothy Arceri
---
src/intel/vulkan/anv_pipeline.c | 5 +
1 file changed, 5 insertions(+)
diff --git a/src/intel/vulkan/anv_pipeline.c b/src/intel/vulkan/anv_pipeline.c
index fa3d3e7a30..e2116e2480 100644
--- a/src/intel/vulkan/anv_pipeline.c
+++ b/src/intel/vulkan/anv_pipeline.c
@@ -930,6 +930,7 @@ anv_pipeline_compile_fs(struct anv_pipeline *pipeline,
num_rts++;
}
+ bool deleted_output = false;
nir_foreach_variable_safe(var, &nir->outputs) {
if (var->data.location < FRAG_RESULT_DATA0)
continue;
@@ -937,6 +938,7 @@ anv_pipeline_compile_fs(struct anv_pipeline *pipeline,
const unsigned rt = var->data.location - FRAG_RESULT_DATA0;
if (rt >= key.nr_color_regions) {
/* Out-of-bounds, throw it away */
+deleted_output = true;
var->data.mode = nir_var_local;
exec_node_remove(&var->node);
exec_list_push_tail(&impl->locals, &var->node);
@@ -948,6 +950,9 @@ anv_pipeline_compile_fs(struct anv_pipeline *pipeline,
var->data.location = rt_to_bindings[rt] + FRAG_RESULT_DATA0;
}
+ if (deleted_output)
+ nir_fixup_deref_modes(nir);
+
if (num_rts == 0) {
/* If we have no render targets, we need a null render target */
rt_bindings[0] = (struct anv_pipeline_binding) {
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Mesa (master): intel/nir: Split IO arrays into elements
Module: Mesa
Branch: master
Commit: b0bb547f782301199e75dc107ac335faf4eb990c
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=b0bb547f782301199e75dc107ac335faf4eb990c
Author: Jason Ekstrand
Date: Wed Jul 25 22:52:39 2018 -0700
intel/nir: Split IO arrays into elements
The NIR nir_lower_io_arrays_to_elements pass attempts to split I/O
variables which are arrays or matrices into a sequence of separate
variables. This can help link-time optimization by allowing us to
remove varyings at a more granular level.
Shader-db results on Kaby Lake:
total instructions in shared programs: 15177645 -> 15168494 (-0.06%)
instructions in affected programs: 79857 -> 70706 (-11.46%)
helped: 392
HURT: 0
Reviewed-by: Timothy Arceri
Reviewed-by: Kenneth Graunke
---
src/intel/compiler/brw_nir.c | 4
1 file changed, 4 insertions(+)
diff --git a/src/intel/compiler/brw_nir.c b/src/intel/compiler/brw_nir.c
index 17ccfa48af..29ad68fdb2 100644
--- a/src/intel/compiler/brw_nir.c
+++ b/src/intel/compiler/brw_nir.c
@@ -709,6 +709,10 @@ void
brw_nir_link_shaders(const struct brw_compiler *compiler,
nir_shader **producer, nir_shader **consumer)
{
+ nir_lower_io_arrays_to_elements(*producer, *consumer);
+ nir_validate_shader(*producer);
+ nir_validate_shader(*consumer);
+
NIR_PASS_V(*producer, nir_remove_dead_variables, nir_var_shader_out);
NIR_PASS_V(*consumer, nir_remove_dead_variables, nir_var_shader_in);
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Mesa (master): anv/pipeline: Add populate_tcs/tes_key helpers
Module: Mesa
Branch: master
Commit: de9e5cf35a1fd0c66288e49c30dc100ad3e1d3aa
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=de9e5cf35a1fd0c66288e49c30dc100ad3e1d3aa
Author: Jason Ekstrand
Date: Thu Oct 26 18:11:25 2017 -0700
anv/pipeline: Add populate_tcs/tes_key helpers
They don't really do anything interesting, but it's more consistent this
way.
Reviewed-by: Timothy Arceri
---
src/intel/vulkan/anv_pipeline.c | 28 +---
1 file changed, 25 insertions(+), 3 deletions(-)
diff --git a/src/intel/vulkan/anv_pipeline.c b/src/intel/vulkan/anv_pipeline.c
index f0c694c562..0770602552 100644
--- a/src/intel/vulkan/anv_pipeline.c
+++ b/src/intel/vulkan/anv_pipeline.c
@@ -308,6 +308,27 @@ populate_vs_prog_key(const struct gen_device_info *devinfo,
}
static void
+populate_tcs_prog_key(const struct gen_device_info *devinfo,
+ unsigned input_vertices,
+ struct brw_tcs_prog_key *key)
+{
+ memset(key, 0, sizeof(*key));
+
+ populate_sampler_prog_key(devinfo, &key->tex);
+
+ key->input_vertices = input_vertices;
+}
+
+static void
+populate_tes_prog_key(const struct gen_device_info *devinfo,
+ struct brw_tes_prog_key *key)
+{
+ memset(key, 0, sizeof(*key));
+
+ populate_sampler_prog_key(devinfo, &key->tex);
+}
+
+static void
populate_gs_prog_key(const struct gen_device_info *devinfo,
struct brw_gs_prog_key *key)
{
@@ -629,9 +650,10 @@ anv_pipeline_compile_tcs_tes(struct anv_pipeline *pipeline,
struct anv_shader_bin *tcs_bin = NULL;
struct anv_shader_bin *tes_bin = NULL;
- populate_sampler_prog_key(&pipeline->device->info, &tcs_key.tex);
- populate_sampler_prog_key(&pipeline->device->info, &tes_key.tex);
- tcs_key.input_vertices = info->pTessellationState->patchControlPoints;
+ populate_tcs_prog_key(&pipeline->device->info,
+ info->pTessellationState->patchControlPoints,
+ &tcs_key);
+ populate_tes_prog_key(&pipeline->device->info, &tes_key);
ANV_FROM_HANDLE(anv_pipeline_layout, layout, info->layout);
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Mesa (master): nir/lower_indirect: Bail early if modes == 0
Module: Mesa
Branch: master
Commit: 7f75cf2a9408b9af562e033ef6c1d1fd15141421
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=7f75cf2a9408b9af562e033ef6c1d1fd15141421
Author: Jason Ekstrand
Date: Sat Oct 28 09:05:01 2017 -0700
nir/lower_indirect: Bail early if modes == 0
There's no point in walking the program if we're never going to actually
lower anything.
Reviewed-by: Timothy Arceri
---
src/compiler/nir/nir_lower_indirect_derefs.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/src/compiler/nir/nir_lower_indirect_derefs.c
b/src/compiler/nir/nir_lower_indirect_derefs.c
index d85c170422..c1f3cf8682 100644
--- a/src/compiler/nir/nir_lower_indirect_derefs.c
+++ b/src/compiler/nir/nir_lower_indirect_derefs.c
@@ -205,6 +205,9 @@ nir_lower_indirect_derefs(nir_shader *shader,
nir_variable_mode modes)
{
bool progress = false;
+ if (modes == 0)
+ return false;
+
nir_foreach_function(function, shader) {
if (function->impl)
progress = lower_indirects_impl(function->impl, modes) || progress;
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Mesa (master): intel/nir: Call nir_lower_io_to_scalar_early
Module: Mesa
Branch: master
Commit: 4434591bf56a6b0c193ef209ea9d7b9e3c95a522
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=4434591bf56a6b0c193ef209ea9d7b9e3c95a522
Author: Jason Ekstrand
Date: Tue Jul 31 06:16:34 2018 -0700
intel/nir: Call nir_lower_io_to_scalar_early
Shader-db results on Kaby Lake:
total instructions in shared programs: 15166953 -> 15073611 (-0.62%)
instructions in affected programs: 2390284 -> 2296942 (-3.91%)
helped: 16469
HURT: 505
total loops in shared programs: 4954 -> 4951 (-0.06%)
loops in affected programs: 3 -> 0
helped: 3
HURT: 0
Reviewed-by: Timothy Arceri
Reviewed-by: Kenneth Graunke
---
src/intel/compiler/brw_nir.c | 17 -
1 file changed, 12 insertions(+), 5 deletions(-)
diff --git a/src/intel/compiler/brw_nir.c b/src/intel/compiler/brw_nir.c
index 29ad68fdb2..31ffbe613e 100644
--- a/src/intel/compiler/brw_nir.c
+++ b/src/intel/compiler/brw_nir.c
@@ -713,6 +713,18 @@ brw_nir_link_shaders(const struct brw_compiler *compiler,
nir_validate_shader(*producer);
nir_validate_shader(*consumer);
+ const bool p_is_scalar =
+ compiler->scalar_stage[(*producer)->info.stage];
+ const bool c_is_scalar =
+ compiler->scalar_stage[(*consumer)->info.stage];
+
+ if (p_is_scalar && c_is_scalar) {
+ NIR_PASS_V(*producer, nir_lower_io_to_scalar_early, nir_var_shader_out);
+ NIR_PASS_V(*consumer, nir_lower_io_to_scalar_early, nir_var_shader_in);
+ *producer = brw_nir_optimize(*producer, compiler, p_is_scalar);
+ *consumer = brw_nir_optimize(*consumer, compiler, c_is_scalar);
+ }
+
NIR_PASS_V(*producer, nir_remove_dead_variables, nir_var_shader_out);
NIR_PASS_V(*consumer, nir_remove_dead_variables, nir_var_shader_in);
@@ -729,12 +741,7 @@ brw_nir_link_shaders(const struct brw_compiler *compiler,
NIR_PASS_V(*consumer, nir_lower_indirect_derefs,
brw_nir_no_indirect_mask(compiler, (*consumer)->info.stage));
- const bool p_is_scalar =
- compiler->scalar_stage[(*producer)->info.stage];
*producer = brw_nir_optimize(*producer, compiler, p_is_scalar);
-
- const bool c_is_scalar =
- compiler->scalar_stage[(*consumer)->info.stage];
*consumer = brw_nir_optimize(*consumer, compiler, c_is_scalar);
}
}
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Mesa (master): anv/pipeline: Rework the parameters to populate_wm_prog_key
Module: Mesa
Branch: master
Commit: e621f57556cfc26cc4753ad3b1db292f623905ec
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=e621f57556cfc26cc4753ad3b1db292f623905ec
Author: Jason Ekstrand
Date: Thu Oct 26 17:56:07 2017 -0700
anv/pipeline: Rework the parameters to populate_wm_prog_key
Reviewed-by: Timothy Arceri
---
src/intel/vulkan/anv_pipeline.c | 46 +
1 file changed, 24 insertions(+), 22 deletions(-)
diff --git a/src/intel/vulkan/anv_pipeline.c b/src/intel/vulkan/anv_pipeline.c
index d795d77d9b..f0c694c562 100644
--- a/src/intel/vulkan/anv_pipeline.c
+++ b/src/intel/vulkan/anv_pipeline.c
@@ -317,21 +317,19 @@ populate_gs_prog_key(const struct gen_device_info
*devinfo,
}
static void
-populate_wm_prog_key(const struct anv_pipeline *pipeline,
- const VkGraphicsPipelineCreateInfo *info,
+populate_wm_prog_key(const struct gen_device_info *devinfo,
+ const struct anv_subpass *subpass,
+ const VkPipelineMultisampleStateCreateInfo *ms_info,
struct brw_wm_prog_key *key)
{
- const struct gen_device_info *devinfo = &pipeline->device->info;
-
memset(key, 0, sizeof(*key));
populate_sampler_prog_key(devinfo, &key->tex);
- /* TODO: we could set this to 0 based on the information in nir_shader, but
-* this function is called before spirv_to_nir. */
- const struct brw_vue_map *vue_map =
- &anv_pipeline_get_last_vue_prog_data(pipeline)->vue_map;
- key->input_slots_valid = vue_map->slots_valid;
+ /* We set this to 0 here and set to the actual value before we call
+* brw_compile_fs.
+*/
+ key->input_slots_valid = 0;
/* Vulkan doesn't specify a default */
key->high_quality_derivatives = false;
@@ -339,32 +337,28 @@ populate_wm_prog_key(const struct anv_pipeline *pipeline,
/* XXX Vulkan doesn't appear to specify */
key->clamp_fragment_color = false;
- assert(pipeline->subpass->color_count <= MAX_RTS);
- for (uint32_t i = 0; i < pipeline->subpass->color_count; i++) {
- if (pipeline->subpass->color_attachments[i].attachment !=
- VK_ATTACHMENT_UNUSED)
+ assert(subpass->color_count <= MAX_RTS);
+ for (uint32_t i = 0; i < subpass->color_count; i++) {
+ if (subpass->color_attachments[i].attachment != VK_ATTACHMENT_UNUSED)
key->color_outputs_valid |= (1 << i);
}
key->nr_color_regions = _mesa_bitcount(key->color_outputs_valid);
key->replicate_alpha = key->nr_color_regions > 1 &&
- info->pMultisampleState &&
- info->pMultisampleState->alphaToCoverageEnable;
+ ms_info && ms_info->alphaToCoverageEnable;
- if (info->pMultisampleState) {
+ if (ms_info) {
/* We should probably pull this out of the shader, but it's fairly
* harmless to compute it and then let dead-code take care of it.
*/
- if (info->pMultisampleState->rasterizationSamples > 1) {
+ if (ms_info->rasterizationSamples > 1) {
key->persample_interp =
-(info->pMultisampleState->minSampleShading *
- info->pMultisampleState->rasterizationSamples) > 1;
+(ms_info->minSampleShading * ms_info->rasterizationSamples) > 1;
key->multisample_fbo = true;
}
- key->frag_coord_adds_sample_pos =
- info->pMultisampleState->sampleShadingEnable;
+ key->frag_coord_adds_sample_pos = ms_info->sampleShadingEnable;
}
}
@@ -865,7 +859,15 @@ anv_pipeline_compile_fs(struct anv_pipeline *pipeline,
struct brw_wm_prog_key key;
struct anv_shader_bin *bin = NULL;
- populate_wm_prog_key(pipeline, info, &key);
+ populate_wm_prog_key(&pipeline->device->info, pipeline->subpass,
+info->pMultisampleState, &key);
+
+ /* TODO: we could set this to 0 based on the information in nir_shader, but
+* we need this before we call spirv_to_nir.
+*/
+ const struct brw_vue_map *vue_map =
+ &anv_pipeline_get_last_vue_prog_data(pipeline)->vue_map;
+ key.input_slots_valid = vue_map->slots_valid;
ANV_FROM_HANDLE(anv_pipeline_layout, layout, info->layout);
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Mesa (master): anv/pipeline: More aggressively optimize away color attachments
Module: Mesa
Branch: master
Commit: b2e0b0dad6923ea6734cacba4b8282f32383f2a5
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=b2e0b0dad6923ea6734cacba4b8282f32383f2a5
Author: Jason Ekstrand
Date: Tue Jul 10 23:31:47 2018 -0700
anv/pipeline: More aggressively optimize away color attachments
Instead of just looking at the number of color attachments, look at
which ones are actually used by the subpass. This lets us potentially
throw away chunks of the fragment shader. In DXVK, for example, all
subpasses have 8 attachments and most are VK_ATTACHMENT_UNUSED so this
is very helpful in that case.
Reviewed-by: Timothy Arceri
---
src/intel/compiler/brw_compiler.h | 1 +
src/intel/vulkan/anv_pipeline.c | 18 +-
2 files changed, 14 insertions(+), 5 deletions(-)
diff --git a/src/intel/compiler/brw_compiler.h
b/src/intel/compiler/brw_compiler.h
index 9dfcfcc011..4797c9cf06 100644
--- a/src/intel/compiler/brw_compiler.h
+++ b/src/intel/compiler/brw_compiler.h
@@ -403,6 +403,7 @@ struct brw_wm_prog_key {
bool force_dual_color_blend:1;
bool coherent_fb_fetch:1;
+ uint8_t color_outputs_valid;
uint64_t input_slots_valid;
unsigned program_string_id;
GLenum alpha_test_func; /* < For Gen4/5 MRT alpha test */
diff --git a/src/intel/vulkan/anv_pipeline.c b/src/intel/vulkan/anv_pipeline.c
index 914e513276..d795d77d9b 100644
--- a/src/intel/vulkan/anv_pipeline.c
+++ b/src/intel/vulkan/anv_pipeline.c
@@ -339,7 +339,14 @@ populate_wm_prog_key(const struct anv_pipeline *pipeline,
/* XXX Vulkan doesn't appear to specify */
key->clamp_fragment_color = false;
- key->nr_color_regions = pipeline->subpass->color_count;
+ assert(pipeline->subpass->color_count <= MAX_RTS);
+ for (uint32_t i = 0; i < pipeline->subpass->color_count; i++) {
+ if (pipeline->subpass->color_attachments[i].attachment !=
+ VK_ATTACHMENT_UNUSED)
+ key->color_outputs_valid |= (1 << i);
+ }
+
+ key->nr_color_regions = _mesa_bitcount(key->color_outputs_valid);
key->replicate_alpha = key->nr_color_regions > 1 &&
info->pMultisampleState &&
@@ -904,8 +911,8 @@ anv_pipeline_compile_fs(struct anv_pipeline *pipeline,
continue;
const unsigned rt = var->data.location - FRAG_RESULT_DATA0;
- /* Out-of-bounds */
- if (rt >= key.nr_color_regions)
+ /* Unused or out-of-bounds */
+ if (rt >= MAX_RTS || !(key.color_outputs_valid & (1 << rt)))
continue;
const unsigned array_len =
@@ -936,8 +943,8 @@ anv_pipeline_compile_fs(struct anv_pipeline *pipeline,
continue;
const unsigned rt = var->data.location - FRAG_RESULT_DATA0;
- if (rt >= key.nr_color_regions) {
-/* Out-of-bounds, throw it away */
+ if (rt >= MAX_RTS || !(key.color_outputs_valid & (1 << rt))) {
+/* Unused or out-of-bounds, throw it away */
deleted_output = true;
var->data.mode = nir_var_local;
exec_node_remove(&var->node);
@@ -967,6 +974,7 @@ anv_pipeline_compile_fs(struct anv_pipeline *pipeline,
* the key accordingly.
*/
key.nr_color_regions = num_rts;
+ key.color_outputs_valid = (1 << num_rts) - 1;
assert(num_rts <= max_rt);
map.surface_to_descriptor -= num_rts;
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Mesa (master): anv: Restrict the number of color regions to those actually written
Module: Mesa Branch: master Commit: 80bc0b728c195517fd40027bd3c63f2483811b9f URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=80bc0b728c195517fd40027bd3c63f2483811b9f Author: Jason Ekstrand Date: Wed Jun 27 18:30:09 2018 -0700 anv: Restrict the number of color regions to those actually written The back-end compiler emits the number of color writes specified by wm_prog_key::nr_color_regions regardless of what nir_store_outputs we have. Once we've gone through and figured out which render targets actually exist and are written by the shader, we should restrict the key to avoid extra RT write messages. Reviewed-by: Timothy Arceri --- src/intel/vulkan/anv_pipeline.c | 5 + 1 file changed, 5 insertions(+) diff --git a/src/intel/vulkan/anv_pipeline.c b/src/intel/vulkan/anv_pipeline.c index e2116e2480..914e513276 100644 --- a/src/intel/vulkan/anv_pipeline.c +++ b/src/intel/vulkan/anv_pipeline.c @@ -963,6 +963,11 @@ anv_pipeline_compile_fs(struct anv_pipeline *pipeline, num_rts = 1; } + /* Now that we've determined the actual number of render targets, adjust + * the key accordingly. + */ + key.nr_color_regions = num_rts; + assert(num_rts <= max_rt); map.surface_to_descriptor -= num_rts; map.surface_count += num_rts; ___ mesa-commit mailing list mesa-commit@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/mesa-commit
Mesa (master): intel/nir: Use the correct scalar stage for consumers when linking
Module: Mesa Branch: master Commit: 4e060385e9c46892535d2d62313d5e53f175c0f5 URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=4e060385e9c46892535d2d62313d5e53f175c0f5 Author: Jason Ekstrand Date: Tue Jul 31 11:31:22 2018 -0700 intel/nir: Use the correct scalar stage for consumers when linking Reviewed-by: Kenneth Graunke Reviewed-by: Timothy Arceri --- src/intel/compiler/brw_nir.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/intel/compiler/brw_nir.c b/src/intel/compiler/brw_nir.c index 5990427b73..17ccfa48af 100644 --- a/src/intel/compiler/brw_nir.c +++ b/src/intel/compiler/brw_nir.c @@ -730,7 +730,7 @@ brw_nir_link_shaders(const struct brw_compiler *compiler, *producer = brw_nir_optimize(*producer, compiler, p_is_scalar); const bool c_is_scalar = - compiler->scalar_stage[(*producer)->info.stage]; + compiler->scalar_stage[(*consumer)->info.stage]; *consumer = brw_nir_optimize(*consumer, compiler, c_is_scalar); } } ___ mesa-commit mailing list mesa-commit@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/mesa-commit
Mesa (master): glsl: make a copy of array indices that are used to deref a function out param
Module: Mesa
Branch: master
Commit: bea4722c2e387162d677eb8fff726be44d720cdb
URL:
http://cgit.freedesktop.org/mesa/mesa/commit/?id=bea4722c2e387162d677eb8fff726be44d720cdb
Author: Timothy Arceri
Date: Sat Jul 21 15:22:24 2018 +1000
glsl: make a copy of array indices that are used to deref a function out param
Fixes new piglit test:
tests/spec/glsl-1.20/execution/qualifiers/vs-out-conversion-int-to-float-vec4-index.shader_test
Reviewed-by: Ian Romanick
---
src/compiler/glsl/ast_function.cpp | 54 ++
1 file changed, 54 insertions(+)
diff --git a/src/compiler/glsl/ast_function.cpp
b/src/compiler/glsl/ast_function.cpp
index 127aa1f91c..1fa3f7561a 100644
--- a/src/compiler/glsl/ast_function.cpp
+++ b/src/compiler/glsl/ast_function.cpp
@@ -348,6 +348,49 @@ verify_parameter_modes(_mesa_glsl_parse_state *state,
return true;
}
+struct copy_index_deref_data {
+ void *mem_ctx;
+ exec_list *before_instructions;
+};
+
+static void
+copy_index_derefs_to_temps(ir_instruction *ir, void *data)
+{
+ struct copy_index_deref_data *d = (struct copy_index_deref_data *)data;
+
+ if (ir->ir_type == ir_type_dereference_array) {
+ ir_dereference_array *a = (ir_dereference_array *) ir;
+ ir = a->array->as_dereference();
+
+ ir_rvalue *idx = a->array_index;
+ if (idx->as_dereference_variable()) {
+ ir_variable *var = idx->variable_referenced();
+
+ /* If the index is read only it cannot change so there is no need
+ * to copy it.
+ */
+ if (var->data.read_only || var->data.memory_read_only)
+return;
+
+ ir_variable *tmp = new(d->mem_ctx) ir_variable(idx->type, "idx_tmp",
+ir_var_temporary);
+ d->before_instructions->push_tail(tmp);
+
+ ir_dereference_variable *const deref_tmp_1 =
+new(d->mem_ctx) ir_dereference_variable(tmp);
+ ir_assignment *const assignment =
+new(d->mem_ctx) ir_assignment(deref_tmp_1,
+ idx->clone(d->mem_ctx, NULL));
+ d->before_instructions->push_tail(assignment);
+
+ /* Replace the array index with a dereference of the new temporary */
+ ir_dereference_variable *const deref_tmp_2 =
+new(d->mem_ctx) ir_dereference_variable(tmp);
+ a->array_index = deref_tmp_2;
+ }
+ }
+}
+
static void
fix_parameter(void *mem_ctx, ir_rvalue *actual, const glsl_type *formal_type,
exec_list *before_instructions, exec_list *after_instructions,
@@ -362,6 +405,17 @@ fix_parameter(void *mem_ctx, ir_rvalue *actual, const
glsl_type *formal_type,
&& (expr == NULL || expr->operation != ir_binop_vector_extract))
return;
+ /* An array index could also be an out variable so we need to make a copy
+* of them before the function is called.
+*/
+ if (!actual->as_dereference_variable()) {
+ struct copy_index_deref_data data;
+ data.mem_ctx = mem_ctx;
+ data.before_instructions = before_instructions;
+
+ visit_tree(actual, copy_index_derefs_to_temps, &data);
+ }
+
/* To convert an out parameter, we need to create a temporary variable to
* hold the value before conversion, and then perform the conversion after
* the function call returns.
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