Re: [Mesa-dev] [PATCH] gbm : Fix build for wayland include
On Mon, 30 Jul 2012 12:02:06 -0400 Kristian Høgsberg hoegsb...@gmail.com wrote: On Thu, Jul 19, 2012 at 01:54:05PM +0900, Elvis Lee wrote: backends/gbm_dri.c fails to find wayland-server.h. Thanks, pushed. Yeah thanks, the build works for me too, now. Signed-off-by: Elvis Lee kwangwoong@lge.com --- src/gbm/Makefile.am |1 + 1 file changed, 1 insertion(+) diff --git a/src/gbm/Makefile.am b/src/gbm/Makefile.am index 5ca2839..f079da1 100644 --- a/src/gbm/Makefile.am +++ b/src/gbm/Makefile.am @@ -22,6 +22,7 @@ libgbm_la_LIBADD = $(LIBUDEV_LIBS) $(DLOPEN_LIBS) if HAVE_EGL_PLATFORM_WAYLAND AM_CPPFLAGS = -DHAVE_WAYLAND_PLATFORM +AM_CFLAGS += $(WAYLAND_CFLAGS) endif ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-dev
Re: [Mesa-dev] [PATCH 03/11] mesa: Add support for glUniformBlockBinding() and the API to get it back.
On 07/20/2012 03:33 PM, Eric Anholt wrote:
Fixes piglit ARB_uniform_buffer_object/uniformbufferbinding.
---
src/mesa/main/uniforms.c | 95
++
1 file changed, 95 insertions(+)
diff --git a/src/mesa/main/uniforms.c b/src/mesa/main/uniforms.c
index ccbd753..940cb07 100644
--- a/src/mesa/main/uniforms.c
+++ b/src/mesa/main/uniforms.c
@@ -41,6 +41,7 @@
#include main/shaderapi.h
#include main/shaderobj.h
#include main/uniforms.h
+#include main/enums.h
#include ir_uniform.h
#include glsl_types.h
@@ -583,6 +584,98 @@ _mesa_GetUniformIndices(GLuint program,
}
}
+static void GLAPIENTRY
+_mesa_UniformBlockBinding(GLuint program,
+ GLuint uniformBlockIndex,
+ GLuint uniformBlockBinding)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ struct gl_shader_program *shProg;
+
+ if (!ctx-Extensions.ARB_uniform_buffer_object) {
+ _mesa_error(ctx, GL_INVALID_OPERATION, glUniformBlockBinding);
+ return;
+ }
+
+ shProg = _mesa_lookup_shader_program_err(ctx, program,
+ glUniformBlockBinding);
+ if (!shProg)
+ return;
+
+ if (uniformBlockIndex = shProg-NumUniformBlocks) {
+ _mesa_error(ctx, GL_INVALID_VALUE,
+ glUniformBlockBinding(block index %d = %d),
+ uniformBlockIndex, shProg-NumUniformBlocks);
+ return;
+ }
+
+ if (uniformBlockBinding = ctx-Const.MaxUniformBufferBindings) {
+ _mesa_error(ctx, GL_INVALID_VALUE,
+ glUniformBlockBinding(block binding %d = %d),
+ uniformBlockBinding, ctx-Const.MaxUniformBufferBindings);
+ return;
+ }
+
+ if (shProg-UniformBlocks[uniformBlockIndex].Binding !=
+ uniformBlockBinding) {
+ int i;
+
+ FLUSH_VERTICES(ctx, _NEW_BUFFER_OBJECT);
+ shProg-UniformBlocks[uniformBlockIndex].Binding = uniformBlockBinding;
I'd almost expect to see a _NEW_PROGRAM_CONSTANTS when a new uniform
buffer gets bound. Then again, that would cause re-uploading of all the
non-UBO uniforms, which is pointless and expensive. Looking at the i965
backend, it looks like _NEW_PROGRAM_CONSTANTS mostly deals with push
constants, and your new patch for UBOs properly uses this flag. So it
should be fine.
Everything else looks good. For the series:
Reviewed-by: Kenneth Graunke kenn...@whitecape.org
+
+ for (i = 0; i MESA_SHADER_TYPES; i++) {
+ int stage_index = shProg-UniformBlockStageIndex[i][uniformBlockIndex];
+
+ if (stage_index != -1) {
+ struct gl_shader *sh = shProg-_LinkedShaders[i];
+ sh-UniformBlocks[stage_index].Binding = uniformBlockBinding;
+ }
+ }
+ }
+}
+
+static void GLAPIENTRY
+_mesa_GetActiveUniformBlockiv(GLuint program,
+ GLuint uniformBlockIndex,
+ GLenum pname,
+ GLint *params)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ struct gl_shader_program *shProg;
+ struct gl_uniform_block *block;
+
+ if (!ctx-Extensions.ARB_uniform_buffer_object) {
+ _mesa_error(ctx, GL_INVALID_OPERATION, glGetActiveUniformBlockiv);
+ return;
+ }
+
+ shProg = _mesa_lookup_shader_program_err(ctx, program,
+ glGetActiveUniformBlockiv);
+ if (!shProg)
+ return;
+
+ if (uniformBlockIndex = shProg-NumUniformBlocks) {
+ _mesa_error(ctx, GL_INVALID_VALUE,
+ glGetActiveUniformBlockiv(block index %d = %d),
+ uniformBlockIndex, shProg-NumUniformBlocks);
+ return;
+ }
+
+ block = shProg-UniformBlocks[uniformBlockIndex];
+
+ switch (pname) {
+ case GL_UNIFORM_BLOCK_BINDING:
+ params[0] = block-Binding;
+ return;
+
+ default:
+ _mesa_error(ctx, GL_INVALID_ENUM,
+ glGetActiveUniformBlockiv(pname 0x%x (%s)),
+ pname, _mesa_lookup_enum_by_nr(pname));
+ return;
+ }
+}
+
/**
* Plug in shader uniform-related functions into API dispatch table.
*/
@@ -644,6 +737,8 @@ _mesa_init_shader_uniform_dispatch(struct _glapi_table
*exec)
SET_GetUniformBlockIndex(exec, _mesa_GetUniformBlockIndex);
SET_GetUniformIndices(exec, _mesa_GetUniformIndices);
SET_GetActiveUniformsiv(exec, _mesa_GetActiveUniformsiv);
+ SET_GetActiveUniformBlockiv(exec, _mesa_GetActiveUniformBlockiv);
+ SET_UniformBlockBinding(exec, _mesa_UniformBlockBinding);
#endif /* FEATURE_GL */
}
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Re: [Mesa-dev] [PATCH] gallium/util: Use GCC built-in functions for NaN and infinity.
This one doesn't make sense to me: For __GNUC__ it uses
implementation-defined non-standard stuff. For other compilers it
divides by zero, which is undefined behaviour. Why not use standard
macros NAN and INFINITY from math.h? The standard (section 7.12 in the
C11 standard, AFAIK the wording is the same in earlier standards) says
that they are provided if infinity and quit nan are supported by the
implementation.
Philipp
On 30.07.2012 07:26, Vinson Lee wrote:
This patch fixes this build failure with Intel Compiler.
src/gallium/auxiliary/util/u_format_tests.c(903): error: floating-point
operation result is out of range
{PIPE_FORMAT_R16_FLOAT, PACKED_1x16(0x), PACKED_1x16(0x7c01),
UNPACKED_1x1(NAN, 0.0, 0.0, 1.0)},
Signed-off-by: Vinson Lee v...@freedesktop.org
---
src/gallium/auxiliary/util/u_format_tests.c |5 +
1 file changed, 5 insertions(+)
diff --git a/src/gallium/auxiliary/util/u_format_tests.c
b/src/gallium/auxiliary/util/u_format_tests.c
index 457fda6..d348608 100644
--- a/src/gallium/auxiliary/util/u_format_tests.c
+++ b/src/gallium/auxiliary/util/u_format_tests.c
@@ -66,8 +66,13 @@
{{ 0, 0, 0, 0}, { 0, 0, 0, 0}, {0, 0, 0, 0}, {0, 0, 0, 0}}}
+#ifdef __GNUC__
+#define NAN __builtin_nan()
+#define INF __builtin_inf()
+#else
#define NAN (0.0 / 0.0)
#define INF (1.0 / 0.0)
+#endif
/**
* Test cases.
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[Mesa-dev] [PATCH] Revert glsl: warning: pragma `invariant(all)' not supported in GLSL ES 1.00
This reverts commit e72f20641a6ea7875b6021aac13e778ada3b3d50.
The commit has two problems:
- The commit message itself quotes language from the GLSL ES 1.00
specification that indicates that it /does/ support the invariant(all)
pragma. This appears to be the opposite of what the commit actually
does.
- The check is wrong: state-Const.GLSL_100ES is set if the driver
supports GLSL ES 1.00, but doesn't mean that the language version
being parsed actually /is/ ES. state-language_version == 100 is the
right way to do that.
Cc: Oliver McFadden oliver.mcfad...@linux.intel.com
Cc: Eric Anholt e...@anholt.net
---
src/glsl/glsl_parser.yy | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
Am I just missing something here? I read through the commit several times
trying to figure out what it was trying to do...it really seems to claim
#pragma invariant(all) is NOT supported, while quoting spec text that
explicitly says it IS supported. I'm confused.
diff --git a/src/glsl/glsl_parser.yy b/src/glsl/glsl_parser.yy
index f61d6b8..b2533c8 100644
--- a/src/glsl/glsl_parser.yy
+++ b/src/glsl/glsl_parser.yy
@@ -301,7 +301,7 @@ pragma_statement:
| PRAGMA_OPTIMIZE_OFF EOL
| PRAGMA_INVARIANT_ALL EOL
{
- if (state-language_version 120 !state-Const.GLSL_100ES) {
+ if (state-language_version 120) {
_mesa_glsl_warning( @1, state,
pragma `invariant(all)' not supported in %s,
state-version_string);
--
1.7.11.3
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Re: [Mesa-dev] R600g : rejected cs and etqw corruption with - implement wait-free buffer transfer for DISCARD_RANGE
Andy Furniss wrote: Marek Olšák wrote: Hi Andy, this should be fixed by the commit: commit c3c83af380d703cdc24475bd39baa1722c333b44 Author: Marek Olšák mar...@gmail.com Date: Wed Jul 18 18:33:37 2012 +0200 r600g: setup streamout before calling last r600_need_cs_space before drawing Please let me know if you still have any issue. That has fixed this issue - nice perf boost with your latest commits :-) Unfortunately after running for a while I managed to trigger the issue I previously reported. It only took 10 mins - after the fix following the last report I ran for an hour and then next day 45 mins without triggering it. r600_pipe.h:743:r600_write_context_reg_seq: Assertion `cs-cdw+2+num = (16 * 1024)' failed. I can still 100% reproduce this - one thing I maybe didn't notice before because I just checked dmesg (or maybe it just didn't happen) is that in addition to the corruption followed by the above assert, there are lots of radeon: The kernel rejected CS, see dmesg for more information But there is nothing in dmesg. ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-dev
Re: [Mesa-dev] [PATCH 4/5] radeonsi: fix register count calculation
On Mit, 2012-07-25 at 19:58 +0200, Christian König wrote: Signed-off-by: Christian König deathsim...@vodafone.de --- src/gallium/drivers/radeonsi/si_state_draw.c |8 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/src/gallium/drivers/radeonsi/si_state_draw.c b/src/gallium/drivers/radeonsi/si_state_draw.c index 0d9f009..74ed01f 100644 --- a/src/gallium/drivers/radeonsi/si_state_draw.c +++ b/src/gallium/drivers/radeonsi/si_state_draw.c @@ -86,8 +86,8 @@ static void si_pipe_shader_vs(struct pipe_context *ctx, struct si_pipe_shader *s assert(num_sgprs = 104); si_pm4_set_reg(pm4, R_00B128_SPI_SHADER_PGM_RSRC1_VS, -S_00B128_VGPRS((shader-num_vgprs - 1) / 4) | -S_00B128_SGPRS((num_sgprs - 1) / 8)); +S_00B128_VGPRS((align(shader-num_vgprs,4) / 4) - 1) | +S_00B128_SGPRS((align(num_sgprs, 8) / 8) - 1)); si_pm4_set_reg(pm4, R_00B12C_SPI_SHADER_PGM_RSRC2_VS, S_00B12C_USER_SGPR(num_user_sgprs)); @@ -192,8 +192,8 @@ static void si_pipe_shader_ps(struct pipe_context *ctx, struct si_pipe_shader *s assert(num_sgprs = 104); si_pm4_set_reg(pm4, R_00B028_SPI_SHADER_PGM_RSRC1_PS, -S_00B028_VGPRS((shader-num_vgprs - 1) / 4) | -S_00B028_SGPRS((num_sgprs - 1) / 8)); +S_00B028_VGPRS((align(shader-num_vgprs, 4) / 4) - 1) | +S_00B028_SGPRS((align(num_sgprs, 8) / 8) - 1)); si_pm4_set_reg(pm4, R_00B02C_SPI_SHADER_PGM_RSRC2_PS, S_00B02C_USER_SGPR(num_user_sgprs)); The previous code was correct according to my reading of the register spec: 0 means 4/8 V/SGPRs, 63/15 means 256/128. -- Earthling Michel Dänzer | http://www.amd.com Libre software enthusiast | Debian, X and DRI developer ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-dev
Re: [Mesa-dev] [PATCH 4/5] radeonsi: fix register count calculation
On 31.07.2012 15:32, Michel Dänzer wrote: On Mit, 2012-07-25 at 19:58 +0200, Christian König wrote: Signed-off-by: Christian König deathsim...@vodafone.de --- src/gallium/drivers/radeonsi/si_state_draw.c |8 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/src/gallium/drivers/radeonsi/si_state_draw.c b/src/gallium/drivers/radeonsi/si_state_draw.c index 0d9f009..74ed01f 100644 --- a/src/gallium/drivers/radeonsi/si_state_draw.c +++ b/src/gallium/drivers/radeonsi/si_state_draw.c @@ -86,8 +86,8 @@ static void si_pipe_shader_vs(struct pipe_context *ctx, struct si_pipe_shader *s assert(num_sgprs = 104); si_pm4_set_reg(pm4, R_00B128_SPI_SHADER_PGM_RSRC1_VS, - S_00B128_VGPRS((shader-num_vgprs - 1) / 4) | - S_00B128_SGPRS((num_sgprs - 1) / 8)); + S_00B128_VGPRS((align(shader-num_vgprs,4) / 4) - 1) | + S_00B128_SGPRS((align(num_sgprs, 8) / 8) - 1)); si_pm4_set_reg(pm4, R_00B12C_SPI_SHADER_PGM_RSRC2_VS, S_00B12C_USER_SGPR(num_user_sgprs)); @@ -192,8 +192,8 @@ static void si_pipe_shader_ps(struct pipe_context *ctx, struct si_pipe_shader *s assert(num_sgprs = 104); si_pm4_set_reg(pm4, R_00B028_SPI_SHADER_PGM_RSRC1_PS, - S_00B028_VGPRS((shader-num_vgprs - 1) / 4) | - S_00B028_SGPRS((num_sgprs - 1) / 8)); + S_00B028_VGPRS((align(shader-num_vgprs, 4) / 4) - 1) | + S_00B028_SGPRS((align(num_sgprs, 8) / 8) - 1)); si_pm4_set_reg(pm4, R_00B02C_SPI_SHADER_PGM_RSRC2_PS, S_00B02C_USER_SGPR(num_user_sgprs)); The previous code was correct according to my reading of the register spec: 0 means 4/8 V/SGPRs, 63/15 means 256/128. Came to the same conclusion after sleeping a night over it. So I removed the patch from my patchset. Sorry for the noise, Christian. ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-dev
[Mesa-dev] [Bug 52996] Read out of bounds in swizzle_for_size() (MesaLib/src/mesa/program/ir_to_mesa.cpp)
https://bugs.freedesktop.org/show_bug.cgi?id=52996
--- Comment #1 from Brian Paul brian.e.p...@gmail.com 2012-07-31 14:14:45 UTC
---
The swizzle_for_size() function is (unchanged from Mesa 7.9 to today):
static int
swizzle_for_size(int size)
{
int size_swizzles[4] = {
MAKE_SWIZZLE4(SWIZZLE_X, SWIZZLE_X, SWIZZLE_X, SWIZZLE_X),
MAKE_SWIZZLE4(SWIZZLE_X, SWIZZLE_Y, SWIZZLE_Y, SWIZZLE_Y),
MAKE_SWIZZLE4(SWIZZLE_X, SWIZZLE_Y, SWIZZLE_Z, SWIZZLE_Z),
MAKE_SWIZZLE4(SWIZZLE_X, SWIZZLE_Y, SWIZZLE_Z, SWIZZLE_W),
};
assert((size = 1) (size = 4));
return size_swizzles[size - 1];
}
My guess is that if something's going wrong, you're running a non-debug build
and the assertion is a no-op. Can you rebuild Mesa for debugging and retest?
If you can find the value of 'size' for this failure, that'd be helpful.
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[Mesa-dev] [Bug 52512] Build failures: glsl_lexer.cc glsl_parser.cc don't exist
https://bugs.freedesktop.org/show_bug.cgi?id=52512 --- Comment #2 from Michel Dänzer mic...@daenzer.net 2012-07-31 14:26:18 UTC --- The old *.cpp files still existing was what caused this for me, and removing them fixed it. -- Configure bugmail: https://bugs.freedesktop.org/userprefs.cgi?tab=email --- You are receiving this mail because: --- You are the assignee for the bug. ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-dev
Re: [Mesa-dev] [Intel-gfx] [PATCH 1/5] intel gen4/5: fix GL_VERTEX_PROGRAM_TWO_SIDE.
Olivier Galibert galib...@pobox.com writes: On Mon, Jul 30, 2012 at 10:30:57AM -0700, Eric Anholt wrote: I'm perfectly fine with the VUE containing slots for both when the app has gone out of its way to ask for deprecated two-sided color rendering. Are you also ok with recompiler the shaders when that enable is switched? Yes, you have to include it in the program key and recompile. But people will consistently use the same values for things that land in program key contents, generally. pgpqhx10zDhAF.pgp Description: PGP signature ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-dev
Re: [Mesa-dev] [PATCH] i965: Add support for GL_SKIP_DECODE_EXT on other SRGB formats.
Kenneth Graunke kenn...@whitecape.org writes: On 07/30/2012 03:28 PM, Brian Paul wrote: On 07/30/2012 02:13 PM, Eric Anholt wrote: Fixes some failures in getteximage-formats. --- src/mesa/drivers/dri/i965/brw_wm_surface_state.c | 14 ++ 1 file changed, 6 insertions(+), 8 deletions(-) diff --git a/src/mesa/drivers/dri/i965/brw_wm_surface_state.c b/src/mesa/drivers/dri/i965/brw_wm_surface_state.c index 65ca2fc..9e7fcf1 100644 --- a/src/mesa/drivers/dri/i965/brw_wm_surface_state.c +++ b/src/mesa/drivers/dri/i965/brw_wm_surface_state.c @@ -31,6 +31,7 @@ #include main/mtypes.h +#include main/enums.h I don't see why the new code below needs enums.h Oh...yeah. That was for _mesa_lookup_enum_by_name() during some debugging. Probably should get taken back out. Good eye :) Yeah, I *really* wish that _mesa_lookup_enum_by_nr wasn't hidden in enums.h. Also that it had a guessable name that I didn't have to look up each time I'm trying to type it. pgp0oKnza3g0n.pgp Description: PGP signature ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-dev
Re: [Mesa-dev] [PATCH] i965: Add support for GL_SKIP_DECODE_EXT on other SRGB formats.
On 07/31/2012 09:30 AM, Eric Anholt wrote: Kenneth Graunkekenn...@whitecape.org writes: On 07/30/2012 03:28 PM, Brian Paul wrote: On 07/30/2012 02:13 PM, Eric Anholt wrote: Fixes some failures in getteximage-formats. --- src/mesa/drivers/dri/i965/brw_wm_surface_state.c | 14 ++ 1 file changed, 6 insertions(+), 8 deletions(-) diff --git a/src/mesa/drivers/dri/i965/brw_wm_surface_state.c b/src/mesa/drivers/dri/i965/brw_wm_surface_state.c index 65ca2fc..9e7fcf1 100644 --- a/src/mesa/drivers/dri/i965/brw_wm_surface_state.c +++ b/src/mesa/drivers/dri/i965/brw_wm_surface_state.c @@ -31,6 +31,7 @@ #include main/mtypes.h +#include main/enums.h I don't see why the new code below needs enums.h Oh...yeah. That was for _mesa_lookup_enum_by_name() during some debugging. Probably should get taken back out. Good eye :) Yeah, I *really* wish that _mesa_lookup_enum_by_nr wasn't hidden in enums.h. Also that it had a guessable name that I didn't have to look up each time I'm trying to type it. Yeah, feel free to rename it. I'd go with something like _mesa_enum_string(). -Brian ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-dev
Re: [Mesa-dev] [PATCH] Revert glsl: warning: pragma `invariant(all)' not supported in GLSL ES 1.00
Kenneth Graunke kenn...@whitecape.org writes: This reverts commit e72f20641a6ea7875b6021aac13e778ada3b3d50. The commit has two problems: - The commit message itself quotes language from the GLSL ES 1.00 specification that indicates that it /does/ support the invariant(all) pragma. This appears to be the opposite of what the commit actually does. - The check is wrong: state-Const.GLSL_100ES is set if the driver supports GLSL ES 1.00, but doesn't mean that the language version being parsed actually /is/ ES. state-language_version == 100 is the right way to do that. Cc: Oliver McFadden oliver.mcfad...@linux.intel.com Cc: Eric Anholt e...@anholt.net --- src/glsl/glsl_parser.yy | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) Am I just missing something here? I read through the commit several times trying to figure out what it was trying to do...it really seems to claim #pragma invariant(all) is NOT supported, while quoting spec text that explicitly says it IS supported. I'm confused. Huh? While the usage of Const is definitely wrong and I should have caught it, the commit was trying to make the error no longer occur when compiling an ES shader, and the logic looks reasonable for that. pgp68aaGlZupK.pgp Description: PGP signature ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-dev
[Mesa-dev] [PATCH] radeon/llvm: fix calculation of max register number
Signed-off-by: Christian König deathsim...@vodafone.de
---
src/gallium/drivers/radeon/SICodeEmitter.cpp |2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/src/gallium/drivers/radeon/SICodeEmitter.cpp
b/src/gallium/drivers/radeon/SICodeEmitter.cpp
index a7647aa..9fc4aab 100644
--- a/src/gallium/drivers/radeon/SICodeEmitter.cpp
+++ b/src/gallium/drivers/radeon/SICodeEmitter.cpp
@@ -154,7 +154,7 @@ void SICodeEmitter::InitProgramInfo(MachineFunction MF) {
assert(!Unknown register class);
}
hwReg = RI-getHWRegNum(reg);
-maxUsed = ((hwReg + 1) * width) - 1;
+maxUsed = hwReg + width - 1;
if (isSGPR) {
MaxSGPR = maxUsed MaxSGPR ? maxUsed : MaxSGPR;
} else {
--
1.7.9.5
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Re: [Mesa-dev] [PATCH] i965: Add support for GL_SKIP_DECODE_EXT on other SRGB formats.
Brian Paul bri...@vmware.com writes: On 07/31/2012 09:30 AM, Eric Anholt wrote: Kenneth Graunkekenn...@whitecape.org writes: On 07/30/2012 03:28 PM, Brian Paul wrote: On 07/30/2012 02:13 PM, Eric Anholt wrote: Fixes some failures in getteximage-formats. --- src/mesa/drivers/dri/i965/brw_wm_surface_state.c | 14 ++ 1 file changed, 6 insertions(+), 8 deletions(-) diff --git a/src/mesa/drivers/dri/i965/brw_wm_surface_state.c b/src/mesa/drivers/dri/i965/brw_wm_surface_state.c index 65ca2fc..9e7fcf1 100644 --- a/src/mesa/drivers/dri/i965/brw_wm_surface_state.c +++ b/src/mesa/drivers/dri/i965/brw_wm_surface_state.c @@ -31,6 +31,7 @@ #include main/mtypes.h +#include main/enums.h I don't see why the new code below needs enums.h Oh...yeah. That was for _mesa_lookup_enum_by_name() during some debugging. Probably should get taken back out. Good eye :) Yeah, I *really* wish that _mesa_lookup_enum_by_nr wasn't hidden in enums.h. Also that it had a guessable name that I didn't have to look up each time I'm trying to type it. Yeah, feel free to rename it. I'd go with something like _mesa_enum_string(). How about _mesa_get_enum_name()? I also end up typing _mesa_get_format_name() all the time while debugging (and leaving that header include scattered around .c files), so matching those two up would be nice. Also it's pretty close to piglit_get_gl_enum_name(), which we type a lot too. pgpeFOSyGuyoI.pgp Description: PGP signature ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-dev
[Mesa-dev] [Bug 52996] Read out of bounds in swizzle_for_size() (MesaLib/src/mesa/program/ir_to_mesa.cpp)
https://bugs.freedesktop.org/show_bug.cgi?id=52996 --- Comment #2 from Ian Romanick i...@freedesktop.org 2012-07-31 19:42:15 UTC --- Is there a way to have AddressSanitizer drop into a debugger (like --db-attach=yes in Valgrind) when it hits an error? It would be interesting to go up to the topmost ir_to_mesa_visitor::visit(ir_dereference_record*) frame and print ir-type-name. It seems like the only way this could happen is if either is_scalar or is_vector is true and vector_elements is zero. -- Configure bugmail: https://bugs.freedesktop.org/userprefs.cgi?tab=email --- You are receiving this mail because: --- You are the assignee for the bug. ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-dev
[Mesa-dev] [Bug 52512] Build failures: glsl_lexer.cc glsl_parser.cc don't exist
https://bugs.freedesktop.org/show_bug.cgi?id=52512 --- Comment #3 from Darren Salt bugs...@moreofthesa.me.uk 2012-07-31 21:32:42 UTC --- It was git master, yes. I use lightly-hacked Debian build scripts to do the build. I'd not done a git clean due to the debian directory; however, I've now removed those two files. (I wonder if they were implicated in causing rendering brokenness here.) -- Configure bugmail: https://bugs.freedesktop.org/userprefs.cgi?tab=email --- You are receiving this mail because: --- You are the assignee for the bug. ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-dev
[Mesa-dev] [PATCH 01/22] glsl: Update the notes on adding a new expression type.
Reviewed-by: Ian Romanick ian.d.roman...@intel.com --- src/glsl/README |1 - 1 file changed, 1 deletion(-) diff --git a/src/glsl/README b/src/glsl/README index dd80a53..0a0afcc 100644 --- a/src/glsl/README +++ b/src/glsl/README @@ -177,7 +177,6 @@ ir_unop_fract was added. The following areas need updating to add a new expression type: ir.h (new enum) -ir.cpp:get_num_operands() (used for ir_reader) ir.cpp:operator_strs (used for ir_reader) ir_constant_expression.cpp (you probably want to be able to constant fold) ir_validate.cpp (check users have the right types) -- 1.7.10.4 ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-dev
[Mesa-dev] [PATCH 04/22] glsl: Add a variant of the rvalue visitor for handle_rvalue() on the way down.
For the UBO lowering pass, I want to see the whole dereference chain for
replacing, not the innermost ir_dereference_variable.
---
src/glsl/ir_rvalue_visitor.cpp | 127 +---
src/glsl/ir_rvalue_visitor.h | 31 +-
2 files changed, 147 insertions(+), 11 deletions(-)
diff --git a/src/glsl/ir_rvalue_visitor.cpp b/src/glsl/ir_rvalue_visitor.cpp
index 193bcd2..b34a419 100644
--- a/src/glsl/ir_rvalue_visitor.cpp
+++ b/src/glsl/ir_rvalue_visitor.cpp
@@ -36,7 +36,7 @@
#include glsl_types.h
ir_visitor_status
-ir_rvalue_visitor::visit_leave(ir_expression *ir)
+ir_rvalue_base_visitor::rvalue_visit(ir_expression *ir)
{
unsigned int operand;
@@ -48,7 +48,7 @@ ir_rvalue_visitor::visit_leave(ir_expression *ir)
}
ir_visitor_status
-ir_rvalue_visitor::visit_leave(ir_texture *ir)
+ir_rvalue_base_visitor::rvalue_visit(ir_texture *ir)
{
handle_rvalue(ir-coordinate);
handle_rvalue(ir-projector);
@@ -76,14 +76,14 @@ ir_rvalue_visitor::visit_leave(ir_texture *ir)
}
ir_visitor_status
-ir_rvalue_visitor::visit_leave(ir_swizzle *ir)
+ir_rvalue_base_visitor::rvalue_visit(ir_swizzle *ir)
{
handle_rvalue(ir-val);
return visit_continue;
}
ir_visitor_status
-ir_rvalue_visitor::visit_leave(ir_dereference_array *ir)
+ir_rvalue_base_visitor::rvalue_visit(ir_dereference_array *ir)
{
/* The array index is not the target of the assignment, so clear the
* 'in_assignee' flag. Restore it after returning from the array index.
@@ -98,14 +98,14 @@ ir_rvalue_visitor::visit_leave(ir_dereference_array *ir)
}
ir_visitor_status
-ir_rvalue_visitor::visit_leave(ir_dereference_record *ir)
+ir_rvalue_base_visitor::rvalue_visit(ir_dereference_record *ir)
{
handle_rvalue(ir-record);
return visit_continue;
}
ir_visitor_status
-ir_rvalue_visitor::visit_leave(ir_assignment *ir)
+ir_rvalue_base_visitor::rvalue_visit(ir_assignment *ir)
{
handle_rvalue(ir-rhs);
handle_rvalue(ir-condition);
@@ -114,7 +114,7 @@ ir_rvalue_visitor::visit_leave(ir_assignment *ir)
}
ir_visitor_status
-ir_rvalue_visitor::visit_leave(ir_call *ir)
+ir_rvalue_base_visitor::rvalue_visit(ir_call *ir)
{
foreach_iter(exec_list_iterator, iter, *ir) {
ir_rvalue *param = (ir_rvalue *)iter.get();
@@ -129,15 +129,124 @@ ir_rvalue_visitor::visit_leave(ir_call *ir)
}
ir_visitor_status
-ir_rvalue_visitor::visit_leave(ir_return *ir)
+ir_rvalue_base_visitor::rvalue_visit(ir_return *ir)
{
handle_rvalue(ir-value);;
return visit_continue;
}
ir_visitor_status
-ir_rvalue_visitor::visit_leave(ir_if *ir)
+ir_rvalue_base_visitor::rvalue_visit(ir_if *ir)
{
handle_rvalue(ir-condition);
return visit_continue;
}
+
+
+ir_visitor_status
+ir_rvalue_visitor::visit_leave(ir_expression *ir)
+{
+ return rvalue_visit(ir);
+}
+
+ir_visitor_status
+ir_rvalue_visitor::visit_leave(ir_texture *ir)
+{
+ return rvalue_visit(ir);
+}
+
+ir_visitor_status
+ir_rvalue_visitor::visit_leave(ir_swizzle *ir)
+{
+ return rvalue_visit(ir);
+}
+
+ir_visitor_status
+ir_rvalue_visitor::visit_leave(ir_dereference_array *ir)
+{
+ return rvalue_visit(ir);
+}
+
+ir_visitor_status
+ir_rvalue_visitor::visit_leave(ir_dereference_record *ir)
+{
+ return rvalue_visit(ir);
+}
+
+ir_visitor_status
+ir_rvalue_visitor::visit_leave(ir_assignment *ir)
+{
+ return rvalue_visit(ir);
+}
+
+ir_visitor_status
+ir_rvalue_visitor::visit_leave(ir_call *ir)
+{
+ return rvalue_visit(ir);
+}
+
+ir_visitor_status
+ir_rvalue_visitor::visit_leave(ir_return *ir)
+{
+ return rvalue_visit(ir);
+}
+
+ir_visitor_status
+ir_rvalue_visitor::visit_leave(ir_if *ir)
+{
+ return rvalue_visit(ir);
+}
+
+ir_visitor_status
+ir_rvalue_enter_visitor::visit_enter(ir_expression *ir)
+{
+ return rvalue_visit(ir);
+}
+
+ir_visitor_status
+ir_rvalue_enter_visitor::visit_enter(ir_texture *ir)
+{
+ return rvalue_visit(ir);
+}
+
+ir_visitor_status
+ir_rvalue_enter_visitor::visit_enter(ir_swizzle *ir)
+{
+ return rvalue_visit(ir);
+}
+
+ir_visitor_status
+ir_rvalue_enter_visitor::visit_enter(ir_dereference_array *ir)
+{
+ return rvalue_visit(ir);
+}
+
+ir_visitor_status
+ir_rvalue_enter_visitor::visit_enter(ir_dereference_record *ir)
+{
+ return rvalue_visit(ir);
+}
+
+ir_visitor_status
+ir_rvalue_enter_visitor::visit_enter(ir_assignment *ir)
+{
+ return rvalue_visit(ir);
+}
+
+ir_visitor_status
+ir_rvalue_enter_visitor::visit_enter(ir_call *ir)
+{
+ return rvalue_visit(ir);
+}
+
+ir_visitor_status
+ir_rvalue_enter_visitor::visit_enter(ir_return *ir)
+{
+ return rvalue_visit(ir);
+}
+
+ir_visitor_status
+ir_rvalue_enter_visitor::visit_enter(ir_if *ir)
+{
+ return rvalue_visit(ir);
+}
diff --git a/src/glsl/ir_rvalue_visitor.h b/src/glsl/ir_rvalue_visitor.h
index 31a56be..2179fa5 100644
--- a/src/glsl/ir_rvalue_visitor.h
+++ b/src/glsl/ir_rvalue_visitor.h
@@ -30,7 +30,22 @@
* a pointer to each rvalue in the tree.
*/
-class ir_rvalue_visitor : public ir_hierarchical_visitor {
+class
[Mesa-dev] [PATCH 02/22] glsl: Fix a reference to UniformBlocks during uniform linking.
When converting var-location from pointing at the program's UniformBlocks to
pointing at the linked shader's UniformBlocks, I missed this change. It
usually worked out in the end because the two lists happen to be the same in
many testcases.
Fixes a valgrind complaint on
oglconform ubo-compile.cpp advanced.std140.2stage
Reviewed-by: Ian Romanick ian.d.roman...@intel.com
---
src/glsl/link_uniforms.cpp |6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/src/glsl/link_uniforms.cpp b/src/glsl/link_uniforms.cpp
index 1baa46c..1c97586 100644
--- a/src/glsl/link_uniforms.cpp
+++ b/src/glsl/link_uniforms.cpp
@@ -223,13 +223,13 @@ public:
this-shader_shadow_samplers = 0;
}
- void set_and_process(struct gl_shader_program *prog,
+ void set_and_process(struct gl_shader *shader,
ir_variable *var)
{
ubo_var = NULL;
if (var-uniform_block != -1) {
struct gl_uniform_block *block =
- prog-UniformBlocks[var-uniform_block];
+ shader-UniformBlocks[var-uniform_block];
ubo_block_index = var-uniform_block;
ubo_var_index = var-location;
@@ -598,7 +598,7 @@ link_assign_uniform_locations(struct gl_shader_program
*prog)
if (strncmp(gl_, var-name, 3) == 0)
continue;
-parcel.set_and_process(prog, var);
+parcel.set_and_process(prog-_LinkedShaders[i], var);
}
prog-_LinkedShaders[i]-active_samplers = parcel.shader_samplers_used;
--
1.7.10.4
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[Mesa-dev] Last UBO patchbomb!
I've tested it with my piglit series and with Intel's oglconform. My piglit series complains about negative-bindbuffer-buffer's expectations being violated by patch 6, but I think that testcase wants to be replced by one that is aware of gl =3.1 versus =3.0. Intel's oglconform complains only about one testcase that's transform feedbacking into a UBO and failing, so probably a little driver bug I hope. Other than that, I've got a few testing TODOs, but I think this is ready to land and unblock GL 3.1. ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-dev
[Mesa-dev] [PATCH 03/22] glsl: Add a ubo_load expression type for fetches from UBOs.
Drivers will probably want to be able to take UBO references in a
shader like:
uniform ubo1 {
float a;
float b;
float c;
float d;
}
void main() {
gl_FragColor = vec4(a, b, c, d);
}
and generate a single aligned vec4 load out of the UBO. For intel,
this involves recognizing the shared offset of the aligned loads and
CSEing them out. Obviously that involves breaking things down to
loads from an offset from a particular UBO first. Thus, the driver
doesn't want to see
variable_ref(ir_variable(a)),
and even more so does it not want to see
array_ref(record_ref(variable_ref(ir_variable(a)),
field1), variable_ref(ir_variable(i))).
where a.field1[i] is a row_major matrix.
Instead, we're going to make a lowering pass to break UBO references
down to expressions that are obvious to codegen, and amenable to
merging through CSE.
Reviewed-by: Ian Romanick ian.d.roman...@intel.com
---
src/glsl/ir.cpp |1 +
src/glsl/ir.h| 11 ++-
src/glsl/ir_validate.cpp |7 +++
src/mesa/drivers/dri/i965/brw_fs_channel_expressions.cpp |5 +
src/mesa/drivers/dri/i965/brw_fs_visitor.cpp |4
src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp |4
src/mesa/program/ir_to_mesa.cpp |4
src/mesa/state_tracker/st_glsl_to_tgsi.cpp |4
8 files changed, 39 insertions(+), 1 deletion(-)
diff --git a/src/glsl/ir.cpp b/src/glsl/ir.cpp
index b0e38d8..f59cdd2 100644
--- a/src/glsl/ir.cpp
+++ b/src/glsl/ir.cpp
@@ -480,6 +480,7 @@ static const char *const operator_strs[] = {
min,
max,
pow,
+ ubo_load,
vector,
};
diff --git a/src/glsl/ir.h b/src/glsl/ir.h
index f019837..2807ba6 100644
--- a/src/glsl/ir.h
+++ b/src/glsl/ir.h
@@ -1018,9 +1018,18 @@ enum ir_expression_operation {
ir_binop_pow,
/**
+* Load a value the size of a given GLSL type from a uniform block.
+*
+* operand0 is the uniform block index in the linked shader.
+* operand1 is a constant or variable byte offset within the
+* uniform block.
+*/
+ ir_binop_ubo_load,
+
+ /**
* A sentinel marking the last of the binary operations.
*/
- ir_last_binop = ir_binop_pow,
+ ir_last_binop = ir_binop_ubo_load,
ir_quadop_vector,
diff --git a/src/glsl/ir_validate.cpp b/src/glsl/ir_validate.cpp
index 191d398..af0b576 100644
--- a/src/glsl/ir_validate.cpp
+++ b/src/glsl/ir_validate.cpp
@@ -423,6 +423,13 @@ ir_validate::visit_leave(ir_expression *ir)
assert(ir-operands[0]-type == ir-operands[1]-type);
break;
+ case ir_binop_ubo_load:
+ assert(ir-operands[0]-as_constant());
+ assert(ir-operands[0]-type == glsl_type::uint_type);
+
+ assert(ir-operands[1]-type == glsl_type::uint_type);
+ break;
+
case ir_quadop_vector:
/* The vector operator collects some number of scalars and generates a
* vector from them.
diff --git a/src/mesa/drivers/dri/i965/brw_fs_channel_expressions.cpp
b/src/mesa/drivers/dri/i965/brw_fs_channel_expressions.cpp
index 983d92e..58521ee 100644
--- a/src/mesa/drivers/dri/i965/brw_fs_channel_expressions.cpp
+++ b/src/mesa/drivers/dri/i965/brw_fs_channel_expressions.cpp
@@ -337,6 +337,11 @@ ir_channel_expressions_visitor::visit_leave(ir_assignment
*ir)
case ir_unop_noise:
assert(!noise should have been broken down to function call);
break;
+
+ case ir_binop_ubo_load:
+ assert(!not yet supported);
+ break;
+
case ir_quadop_vector:
assert(!should have been lowered);
break;
diff --git a/src/mesa/drivers/dri/i965/brw_fs_visitor.cpp
b/src/mesa/drivers/dri/i965/brw_fs_visitor.cpp
index fefe2c7..34f00ca 100644
--- a/src/mesa/drivers/dri/i965/brw_fs_visitor.cpp
+++ b/src/mesa/drivers/dri/i965/brw_fs_visitor.cpp
@@ -571,6 +571,10 @@ fs_visitor::visit(ir_expression *ir)
else
inst = emit(BRW_OPCODE_SHR, this-result, op[0], op[1]);
break;
+
+ case ir_binop_ubo_load:
+ assert(!not yet supported);
+ break;
}
}
diff --git a/src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp
b/src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp
index c77dc91..d6a786f 100644
--- a/src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp
+++ b/src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp
@@ -1314,6 +1314,10 @@ vec4_visitor::visit(ir_expression *ir)
inst = emit(BRW_OPCODE_SHR, result_dst, op[0], op[1]);
break;
+ case ir_binop_ubo_load:
+ assert(!not yet supported);
+ break;
+
case ir_quadop_vector:
assert(!not reached: should be handled by lower_quadop_vector);
break;
diff --git a/src/mesa/program/ir_to_mesa.cpp b/src/mesa/program/ir_to_mesa.cpp
index 255a8a7..70c4cc8 100644
---
[Mesa-dev] [PATCH 09/22] glsl: Fix calculation of std140 offset alignment for mat2s.
We were getting the base offset of a vec2, not of a vec2[2] like the quoted
spec text says we should.
---
src/glsl/glsl_types.cpp | 13 +
1 file changed, 9 insertions(+), 4 deletions(-)
diff --git a/src/glsl/glsl_types.cpp b/src/glsl/glsl_types.cpp
index 3d78660..8e7ae42 100644
--- a/src/glsl/glsl_types.cpp
+++ b/src/glsl/glsl_types.cpp
@@ -694,14 +694,19 @@ glsl_type::std140_base_alignment(bool row_major) const
* row vectors with C components each, according to rule (4).
*/
if (this-is_matrix()) {
- const struct glsl_type *vec_type;
+ const struct glsl_type *vec_type, *array_type;
+ int c = this-matrix_columns;
+ int r = this-vector_elements;
+
if (row_major) {
-vec_type = get_instance(GLSL_TYPE_FLOAT, this-vector_elements, 1);
+vec_type = get_instance(GLSL_TYPE_FLOAT, r, 1);
+array_type = glsl_type::get_array_instance(vec_type, c);
} else {
-vec_type = get_instance(GLSL_TYPE_FLOAT, this-matrix_columns, 1);
+vec_type = get_instance(GLSL_TYPE_FLOAT, c, 1);
+array_type = glsl_type::get_array_instance(vec_type, r);
}
- return vec_type-std140_base_alignment(false);
+ return array_type-std140_base_alignment(false);
}
/* (9) If the member is a structure, the base alignment of the
--
1.7.10.4
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[Mesa-dev] [PATCH 06/22] mesa: Make glBindBufferBase/glBindBufferRange() work on just-genned names.
In between glGenBuffers() and glBindBuffer(), the buffer object points to this
dummy buffer with a name of 0, and a glBindBufferBase() would point to that.
It seems pretty clear, given that glBindBufferBase() only cares about the
current size of the buffer at render time, that it should bind up the buffer
that you passed in instead of pointing it at this useless dummy buffer.
However, what should glBindBufferRange() do? As of this patch, it will
promote the genned buffer to a proper buffer like it had been
glBindBuffer()ed, and then detect that the size is greater than the buffer's
current size of 0 and throw INVALID_VALUE. It seems like the most reasonable
answer here.
Note that this also changes the behavior of these two on non-glGenBuffers() bo
names. We haven't yet set up the error throwing for glBindBuffers() on gl
3.1+, and my assumption is that these two functions should inherit their
behavior on un-genned names from glBindBuffers().
---
src/mesa/main/bufferobj.c | 37 +
1 file changed, 25 insertions(+), 12 deletions(-)
diff --git a/src/mesa/main/bufferobj.c b/src/mesa/main/bufferobj.c
index 7d72092..ad28f8a 100644
--- a/src/mesa/main/bufferobj.c
+++ b/src/mesa/main/bufferobj.c
@@ -656,6 +656,28 @@ _mesa_free_buffer_objects( struct gl_context *ctx )
ctx-UniformBufferBindings = NULL;
}
+static void
+handle_bind_buffer_gen(struct gl_context *ctx,
+ GLenum target,
+ GLuint buffer,
+ struct gl_buffer_object **buf_handle)
+{
+ struct gl_buffer_object *buf = *buf_handle;
+
+ if (!buf || buf == DummyBufferObject) {
+ /* If this is a new buffer object id, or one which was generated but
+ * never used before, allocate a buffer object now.
+ */
+ ASSERT(ctx-Driver.NewBufferObject);
+ buf = ctx-Driver.NewBufferObject(ctx, buffer, target);
+ if (!buf) {
+_mesa_error(ctx, GL_OUT_OF_MEMORY, glBindBufferARB);
+return;
+ }
+ _mesa_HashInsert(ctx-Shared-BufferObjects, buffer, buf);
+ *buf_handle = buf;
+ }
+}
/**
* Bind the specified target to buffer for the specified context.
@@ -691,18 +713,7 @@ bind_buffer_object(struct gl_context *ctx, GLenum target,
GLuint buffer)
else {
/* non-default buffer object */
newBufObj = _mesa_lookup_bufferobj(ctx, buffer);
- if (!newBufObj || newBufObj == DummyBufferObject) {
- /* If this is a new buffer object id, or one which was generated but
- * never used before, allocate a buffer object now.
- */
- ASSERT(ctx-Driver.NewBufferObject);
- newBufObj = ctx-Driver.NewBufferObject(ctx, buffer, target);
- if (!newBufObj) {
-_mesa_error(ctx, GL_OUT_OF_MEMORY, glBindBufferARB);
-return;
- }
- _mesa_HashInsert(ctx-Shared-BufferObjects, buffer, newBufObj);
- }
+ handle_bind_buffer_gen(ctx, target, buffer, newBufObj);
}
/* bind new buffer */
@@ -2089,6 +2100,7 @@ _mesa_BindBufferRange(GLenum target, GLuint index,
} else {
bufObj = _mesa_lookup_bufferobj(ctx, buffer);
}
+ handle_bind_buffer_gen(ctx, target, buffer, bufObj);
if (!bufObj) {
_mesa_error(ctx, GL_INVALID_OPERATION,
@@ -2134,6 +2146,7 @@ _mesa_BindBufferBase(GLenum target, GLuint index, GLuint
buffer)
} else {
bufObj = _mesa_lookup_bufferobj(ctx, buffer);
}
+ handle_bind_buffer_gen(ctx, target, buffer, bufObj);
if (!bufObj) {
_mesa_error(ctx, GL_INVALID_OPERATION,
--
1.7.10.4
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[Mesa-dev] [PATCH 10/22] glsl: Only flag RowMajor on matrix-type variables.
We were only propagating it to the API when the variable was a matrix type,
but we were still tripping over it in lower_ubo_reference when it was set on a
vector.
---
src/glsl/ast_to_hir.cpp | 14 +-
1 file changed, 9 insertions(+), 5 deletions(-)
diff --git a/src/glsl/ast_to_hir.cpp b/src/glsl/ast_to_hir.cpp
index 1c54991..02fe66b 100644
--- a/src/glsl/ast_to_hir.cpp
+++ b/src/glsl/ast_to_hir.cpp
@@ -4054,11 +4054,15 @@ ast_uniform_block::hir(exec_list *instructions,
ubo_var-Type = var-type;
ubo_var-Buffer = ubo - state-uniform_blocks;
ubo_var-Offset = 0; /* Assigned at link time. */
-ubo_var-RowMajor = block_row_major;
-if (decl_list-type-qualifier.flags.q.row_major)
- ubo_var-RowMajor = true;
-else if (decl_list-type-qualifier.flags.q.column_major)
- ubo_var-RowMajor = false;
+
+if (var-type-is_matrix() ||
+(var-type-is_array() var-type-fields.array-is_matrix())) {
+ ubo_var-RowMajor = block_row_major;
+ if (decl_list-type-qualifier.flags.q.row_major)
+ ubo_var-RowMajor = true;
+ else if (decl_list-type-qualifier.flags.q.column_major)
+ ubo_var-RowMajor = false;
+}
/* From the GL_ARB_uniform_buffer_object spec:
*
--
1.7.10.4
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[Mesa-dev] [PATCH 07/22] ir_to_mesa: Don't whack the -location field of uniform block variables.
Fixes some failures in GL_ARB_uniform_buffer_object/maxblocks. --- src/mesa/program/ir_to_mesa.cpp |2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/mesa/program/ir_to_mesa.cpp b/src/mesa/program/ir_to_mesa.cpp index 70c4cc8..d675da2 100644 --- a/src/mesa/program/ir_to_mesa.cpp +++ b/src/mesa/program/ir_to_mesa.cpp @@ -2459,7 +2459,7 @@ _mesa_generate_parameters_list_for_uniforms(struct gl_shader_program ir_variable *var = ((ir_instruction *) node)-as_variable(); if ((var == NULL) || (var-mode != ir_var_uniform) - || (strncmp(var-name, gl_, 3) == 0)) + || var-uniform_block != -1 || (strncmp(var-name, gl_, 3) == 0)) continue; add.process(var); -- 1.7.10.4 ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-dev
[Mesa-dev] [PATCH 13/22] mesa: Default to GL 3.1's limits on uniform blocks.
The ARB spec lets you get away with the default block counting against the
blocks for combined size limits. The core spec says you need to be able to
support the maximum size of default block *and* the maximum size of each
uniform block. I see no reason that any driver would have a problem with
that.
Fixes gl 3.1/minmax (with an associated fix to the test)
---
src/mesa/main/context.c | 26 +++---
1 file changed, 15 insertions(+), 11 deletions(-)
diff --git a/src/mesa/main/context.c b/src/mesa/main/context.c
index 7616eb7..b78bcee 100644
--- a/src/mesa/main/context.c
+++ b/src/mesa/main/context.c
@@ -476,7 +476,8 @@ _mesa_init_current(struct gl_context *ctx)
* Important: drivers should override these with actual limits.
*/
static void
-init_program_limits(GLenum type, struct gl_program_constants *prog)
+init_program_limits(struct gl_context *ctx, GLenum type,
+struct gl_program_constants *prog)
{
prog-MaxInstructions = MAX_PROGRAM_INSTRUCTIONS;
prog-MaxAluInstructions = MAX_PROGRAM_INSTRUCTIONS;
@@ -542,7 +543,9 @@ init_program_limits(GLenum type, struct
gl_program_constants *prog)
prog-LowInt = prog-HighInt = prog-MediumInt;
prog-MaxUniformBlocks = 12;
- prog-MaxCombinedUniformComponents = prog-MaxUniformComponents;
+ prog-MaxCombinedUniformComponents = (prog-MaxUniformComponents +
+ ctx-Const.MaxUniformBlockSize / 4 *
+ prog-MaxUniformBlocks);
}
@@ -589,14 +592,21 @@ _mesa_init_constants(struct gl_context *ctx)
ctx-Const.MaxSpotExponent = 128.0;
ctx-Const.MaxViewportWidth = MAX_VIEWPORT_WIDTH;
ctx-Const.MaxViewportHeight = MAX_VIEWPORT_HEIGHT;
+
+ /** GL_ARB_uniform_buffer_object */
+ ctx-Const.MaxCombinedUniformBlocks = 36;
+ ctx-Const.MaxUniformBufferBindings = 36;
+ ctx-Const.MaxUniformBlockSize = 16384;
+ ctx-Const.UniformBufferOffsetAlignment = 1;
+
#if FEATURE_ARB_vertex_program
- init_program_limits(GL_VERTEX_PROGRAM_ARB, ctx-Const.VertexProgram);
+ init_program_limits(ctx, GL_VERTEX_PROGRAM_ARB, ctx-Const.VertexProgram);
#endif
#if FEATURE_ARB_fragment_program
- init_program_limits(GL_FRAGMENT_PROGRAM_ARB, ctx-Const.FragmentProgram);
+ init_program_limits(ctx, GL_FRAGMENT_PROGRAM_ARB,
ctx-Const.FragmentProgram);
#endif
#if FEATURE_ARB_geometry_shader4
- init_program_limits(MESA_GEOMETRY_PROGRAM, ctx-Const.GeometryProgram);
+ init_program_limits(ctx, MESA_GEOMETRY_PROGRAM,
ctx-Const.GeometryProgram);
#endif
ctx-Const.MaxProgramMatrices = MAX_PROGRAM_MATRICES;
ctx-Const.MaxProgramMatrixStackDepth = MAX_PROGRAM_MATRIX_STACK_DEPTH;
@@ -655,12 +665,6 @@ _mesa_init_constants(struct gl_context *ctx)
ctx-Const.MaxTransformFeedbackInterleavedComponents = 4 *
MAX_FEEDBACK_ATTRIBS;
ctx-Const.MaxVertexStreams = 1;
- /** GL_ARB_uniform_buffer_object */
- ctx-Const.MaxCombinedUniformBlocks = 36;
- ctx-Const.MaxUniformBufferBindings = 36;
- ctx-Const.MaxUniformBlockSize = 16384;
- ctx-Const.UniformBufferOffsetAlignment = 1;
-
/* GL 3.2: hard-coded for now: */
ctx-Const.ProfileMask = GL_CONTEXT_COMPATIBILITY_PROFILE_BIT;
--
1.7.10.4
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[Mesa-dev] [PATCH 08/22] glsl: Fix glGetActiveUniformsiv(GL_UNIFORM_BLOCK_INDEX).
Previously, we were returning the index into the UniformBlocks of one of the
linked shaders, when it's supposed to be the program global index.
Fixes piglit getactiveuniformsiv-uniform_block_index.
---
src/glsl/link_uniforms.cpp | 16 +---
1 file changed, 13 insertions(+), 3 deletions(-)
diff --git a/src/glsl/link_uniforms.cpp b/src/glsl/link_uniforms.cpp
index 1c97586..4f21a41 100644
--- a/src/glsl/link_uniforms.cpp
+++ b/src/glsl/link_uniforms.cpp
@@ -223,7 +223,8 @@ public:
this-shader_shadow_samplers = 0;
}
- void set_and_process(struct gl_shader *shader,
+ void set_and_process(struct gl_shader_program *prog,
+ struct gl_shader *shader,
ir_variable *var)
{
ubo_var = NULL;
@@ -231,7 +232,16 @@ public:
struct gl_uniform_block *block =
shader-UniformBlocks[var-uniform_block];
-ubo_block_index = var-uniform_block;
+ubo_block_index = -1;
+for (unsigned i = 0; i prog-NumUniformBlocks; i++) {
+ if (!strcmp(prog-UniformBlocks[i].Name,
+ shader-UniformBlocks[var-uniform_block].Name)) {
+ ubo_block_index = i;
+ break;
+ }
+}
+assert(ubo_block_index != -1);
+
ubo_var_index = var-location;
ubo_var = block-Uniforms[var-location];
ubo_byte_offset = ubo_var-Offset;
@@ -598,7 +608,7 @@ link_assign_uniform_locations(struct gl_shader_program
*prog)
if (strncmp(gl_, var-name, 3) == 0)
continue;
-parcel.set_and_process(prog-_LinkedShaders[i], var);
+parcel.set_and_process(prog, prog-_LinkedShaders[i], var);
}
prog-_LinkedShaders[i]-active_samplers = parcel.shader_samplers_used;
--
1.7.10.4
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[Mesa-dev] [PATCH 11/22] glsl: Align GL_UNIFORM_BLOCK_DATA_SIZE according to std140 rules.
Fixes piglit GL_ARB_uniform_buffer_object/data-size test. --- src/glsl/link_uniforms.cpp | 14 +- 1 file changed, 13 insertions(+), 1 deletion(-) diff --git a/src/glsl/link_uniforms.cpp b/src/glsl/link_uniforms.cpp index 4f21a41..25dc1d7 100644 --- a/src/glsl/link_uniforms.cpp +++ b/src/glsl/link_uniforms.cpp @@ -500,7 +500,19 @@ link_assign_uniform_block_offsets(struct gl_shader *shader) ubo_var-Offset = offset; offset += size; } - block-UniformBufferSize = offset; + + /* From the GL_ARB_uniform_buffer_object spec: + * + * For uniform blocks laid out according to [std140] rules, + * the minimum buffer object size returned by the + * UNIFORM_BLOCK_DATA_SIZE query is derived by taking the + * offset of the last basic machine unit consumed by the + * last uniform of the uniform block (including any + * end-of-array or end-of-structure padding), adding one, + * and rounding up to the next multiple of the base + * alignment required for a vec4. + */ + block-UniformBufferSize = align(offset, 16); } } -- 1.7.10.4 ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-dev
[Mesa-dev] [PATCH 12/22] glsl: Refuse to parse uniform block declarations when UBOs aren't available.
Fixes piglit
GL_ARB_uniform_buffer_object/compiler/extension-disabled-block.frag
---
src/glsl/glsl_parser.yy | 20
1 file changed, 20 insertions(+)
diff --git a/src/glsl/glsl_parser.yy b/src/glsl/glsl_parser.yy
index 04c64f0..ee6a672 100644
--- a/src/glsl/glsl_parser.yy
+++ b/src/glsl/glsl_parser.yy
@@ -1929,6 +1929,16 @@ uniform_block:
void *ctx = state;
$$ = new(ctx) ast_uniform_block(*state-default_uniform_qualifier,
$2, $4);
+
+ if (!state-ARB_uniform_buffer_object_enable) {
+ _mesa_glsl_error( @1, state,
+ #version 140 / GL_ARB_uniform_buffer_object
+ required for defining uniform blocks\n);
+ } else if (state-ARB_uniform_buffer_object_warn) {
+ _mesa_glsl_warning( @1, state,
+#version 140 / GL_ARB_uniform_buffer_object
+required for defining uniform blocks\n);
+ }
}
| layout_qualifier UNIFORM NEW_IDENTIFIER '{' member_list '}' ';'
{
@@ -1939,6 +1949,16 @@ uniform_block:
YYERROR;
}
$$ = new(ctx) ast_uniform_block(qual, $3, $5);
+
+ if (!state-ARB_uniform_buffer_object_enable) {
+ _mesa_glsl_error( @1, state,
+ #version 140 / GL_ARB_uniform_buffer_object
+ required for defining uniform blocks\n);
+ } else if (state-ARB_uniform_buffer_object_warn) {
+ _mesa_glsl_warning( @1, state,
+#version 140 / GL_ARB_uniform_buffer_object
+required for defining uniform blocks\n);
+ }
}
;
--
1.7.10.4
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[Mesa-dev] [PATCH 05/22] glsl: Add a lowering pass to turn complicated UBO references to vector loads.
---
src/glsl/Makefile.sources|1 +
src/glsl/ir_optimization.h |1 +
src/glsl/lower_ubo_reference.cpp | 325 ++
3 files changed, 327 insertions(+)
create mode 100644 src/glsl/lower_ubo_reference.cpp
diff --git a/src/glsl/Makefile.sources b/src/glsl/Makefile.sources
index f2743f7..765f06a 100644
--- a/src/glsl/Makefile.sources
+++ b/src/glsl/Makefile.sources
@@ -66,6 +66,7 @@ LIBGLSL_CXX_FILES = \
$(GLSL_SRCDIR)/lower_vec_index_to_swizzle.cpp \
$(GLSL_SRCDIR)/lower_vector.cpp \
$(GLSL_SRCDIR)/lower_output_reads.cpp \
+ $(GLSL_SRCDIR)/lower_ubo_reference.cpp \
$(GLSL_SRCDIR)/opt_algebraic.cpp \
$(GLSL_SRCDIR)/opt_array_splitting.cpp \
$(GLSL_SRCDIR)/opt_constant_folding.cpp \
diff --git a/src/glsl/ir_optimization.h b/src/glsl/ir_optimization.h
index c435d77..2220d51 100644
--- a/src/glsl/ir_optimization.h
+++ b/src/glsl/ir_optimization.h
@@ -74,6 +74,7 @@ bool lower_variable_index_to_cond_assign(exec_list
*instructions,
bool lower_quadop_vector(exec_list *instructions, bool dont_lower_swz);
bool lower_clip_distance(exec_list *instructions);
void lower_output_reads(exec_list *instructions);
+void lower_ubo_reference(struct gl_shader *shader, exec_list *instructions);
bool optimize_redundant_jumps(exec_list *instructions);
bool optimize_split_arrays(exec_list *instructions, bool linked);
diff --git a/src/glsl/lower_ubo_reference.cpp b/src/glsl/lower_ubo_reference.cpp
new file mode 100644
index 000..6a8d75d
--- /dev/null
+++ b/src/glsl/lower_ubo_reference.cpp
@@ -0,0 +1,325 @@
+/*
+ * Copyright © 2012 Intel Corporation
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the Software),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the next
+ * paragraph) shall be included in all copies or substantial portions of the
+ * Software.
+ *
+ * THE SOFTWARE IS PROVIDED AS IS, WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+ * DEALINGS IN THE SOFTWARE.
+ */
+
+/**
+ * \file lower_ubo_reference.cpp
+ * IR lower pass to remove noise opcodes.
+ */
+
+#include ir.h
+#include ir_builder.h
+#include ir_rvalue_visitor.h
+#include main/macros.h
+
+using namespace ir_builder;
+
+namespace {
+class lower_ubo_reference_visitor : public ir_rvalue_enter_visitor {
+public:
+ lower_ubo_reference_visitor(struct gl_shader *shader)
+ : shader(shader)
+ {
+ }
+
+ void handle_rvalue(ir_rvalue **rvalue);
+ void emit_ubo_loads(ir_dereference *deref, ir_variable *offset);
+ ir_expression *ubo_load(const struct glsl_type *type,
+ ir_rvalue *offset);
+
+ void *mem_ctx;
+ struct gl_shader *shader;
+ struct gl_uniform_buffer_variable *ubo_var;
+ unsigned uniform_block;
+ bool progress;
+};
+
+static inline unsigned int
+align(unsigned int a, unsigned int align)
+{
+ return (a + align - 1) / align * align;
+}
+
+void
+lower_ubo_reference_visitor::handle_rvalue(ir_rvalue **rvalue)
+{
+ if (!*rvalue)
+ return;
+
+ ir_dereference *deref = (*rvalue)-as_dereference();
+ if (!deref)
+ return;
+
+ ir_variable *var = deref-variable_referenced();
+ if (!var || var-uniform_block == -1)
+ return;
+
+ mem_ctx = ralloc_parent(*rvalue);
+ uniform_block = var-uniform_block;
+ struct gl_uniform_block *block = shader-UniformBlocks[uniform_block];
+ this-ubo_var = block-Uniforms[var-location];
+ ir_rvalue *offset = new(mem_ctx) ir_constant(0u);
+ unsigned const_offset = 0;
+ bool row_major = ubo_var-RowMajor;
+
+ while (deref) {
+ switch (deref-ir_type) {
+ case ir_type_dereference_variable: {
+const_offset += ubo_var-Offset;
+deref = NULL;
+break;
+ }
+
+ case ir_type_dereference_array: {
+ir_dereference_array *deref_array = (ir_dereference_array *)deref;
+unsigned array_stride;
+if (deref_array-array-type-is_matrix() row_major) {
+ /* When loading a vector out of a row major matrix, the
+* step between the columns (vectors) is the size of a
+* float, while the step between the rows (elements of a
+* vector) is handled below in emit_ubo_loads.
+
[Mesa-dev] [PATCH 14/22] mesa: Unbind uniform buffer bindings on glDeleteBuffers().
Fixes piglit GL_ARB_uniform_buffer_object/deletebuffers.
---
src/mesa/main/bufferobj.c |7 +++
1 file changed, 7 insertions(+)
diff --git a/src/mesa/main/bufferobj.c b/src/mesa/main/bufferobj.c
index ad28f8a..5fdf52e 100644
--- a/src/mesa/main/bufferobj.c
+++ b/src/mesa/main/bufferobj.c
@@ -886,6 +886,13 @@ _mesa_DeleteBuffersARB(GLsizei n, const GLuint *ids)
}
}
+ /* unbind UBO binding points */
+ for (j = 0; j ctx-Const.MaxUniformBufferBindings; j++) {
+if (ctx-UniformBufferBindings[j].BufferObject == bufObj) {
+ _mesa_BindBufferBase( GL_UNIFORM_BUFFER, j, 0 );
+}
+ }
+
if (ctx-UniformBuffer == bufObj) {
_mesa_BindBufferARB( GL_UNIFORM_BUFFER, 0 );
}
--
1.7.10.4
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[Mesa-dev] [PATCH 19/22] i965/vs: Communicate the pull constant block read parameters through src_regs.
Similar to the previous commit for the fragment shader.
---
src/mesa/drivers/dri/i965/brw_vec4.h |3 ++-
src/mesa/drivers/dri/i965/brw_vec4_emit.cpp| 19 ---
src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp |5 +++--
3 files changed, 17 insertions(+), 10 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/brw_vec4.h
b/src/mesa/drivers/dri/i965/brw_vec4.h
index 920d703..deac55d 100644
--- a/src/mesa/drivers/dri/i965/brw_vec4.h
+++ b/src/mesa/drivers/dri/i965/brw_vec4.h
@@ -476,7 +476,8 @@ public:
struct brw_reg index);
void generate_pull_constant_load(vec4_instruction *inst,
struct brw_reg dst,
- struct brw_reg index);
+ struct brw_reg index,
+ struct brw_reg offset);
};
} /* namespace brw */
diff --git a/src/mesa/drivers/dri/i965/brw_vec4_emit.cpp
b/src/mesa/drivers/dri/i965/brw_vec4_emit.cpp
index 9df7b11..7658bb8 100644
--- a/src/mesa/drivers/dri/i965/brw_vec4_emit.cpp
+++ b/src/mesa/drivers/dri/i965/brw_vec4_emit.cpp
@@ -645,15 +645,20 @@ vec4_visitor::generate_scratch_write(vec4_instruction
*inst,
void
vec4_visitor::generate_pull_constant_load(vec4_instruction *inst,
struct brw_reg dst,
- struct brw_reg index)
+ struct brw_reg index,
+ struct brw_reg offset)
{
+ assert(index.file == BRW_IMMEDIATE_VALUE
+ index.type == BRW_REGISTER_TYPE_UD);
+ uint32_t surf_index = index.dw1.ud;
+
if (intel-gen == 7) {
- gen6_resolve_implied_move(p, index, inst-base_mrf);
+ gen6_resolve_implied_move(p, offset, inst-base_mrf);
brw_instruction *insn = brw_next_insn(p, BRW_OPCODE_SEND);
brw_set_dest(p, insn, dst);
- brw_set_src0(p, insn, index);
+ brw_set_src0(p, insn, offset);
brw_set_sampler_message(p, insn,
- SURF_INDEX_VERT_CONST_BUFFER,
+ surf_index,
0, /* LD message ignores sampler unit */
GEN5_SAMPLER_MESSAGE_SAMPLE_LD,
1, /* rlen */
@@ -669,7 +674,7 @@ vec4_visitor::generate_pull_constant_load(vec4_instruction
*inst,
gen6_resolve_implied_move(p, header, inst-base_mrf);
brw_MOV(p, retype(brw_message_reg(inst-base_mrf + 1), BRW_REGISTER_TYPE_D),
- index);
+ offset);
uint32_t msg_type;
@@ -689,7 +694,7 @@ vec4_visitor::generate_pull_constant_load(vec4_instruction
*inst,
if (intel-gen 6)
send-header.destreg__conditionalmod = inst-base_mrf;
brw_set_dp_read_message(p, send,
- SURF_INDEX_VERT_CONST_BUFFER,
+ surf_index,
BRW_DATAPORT_OWORD_DUAL_BLOCK_1OWORD,
msg_type,
BRW_DATAPORT_READ_TARGET_DATA_CACHE,
@@ -753,7 +758,7 @@ vec4_visitor::generate_vs_instruction(vec4_instruction
*instruction,
break;
case VS_OPCODE_PULL_CONSTANT_LOAD:
- generate_pull_constant_load(inst, dst, src[0]);
+ generate_pull_constant_load(inst, dst, src[0], src[1]);
break;
default:
diff --git a/src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp
b/src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp
index d6a786f..33078a0 100644
--- a/src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp
+++ b/src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp
@@ -2484,11 +2484,12 @@ vec4_visitor::emit_pull_constant_load(vec4_instruction
*inst,
int base_offset)
{
int reg_offset = base_offset + orig_src.reg_offset;
- src_reg index = get_pull_constant_offset(inst, orig_src.reladdr,
reg_offset);
+ src_reg index = src_reg((unsigned)SURF_INDEX_VERT_CONST_BUFFER);
+ src_reg offset = get_pull_constant_offset(inst, orig_src.reladdr,
reg_offset);
vec4_instruction *load;
load = new(mem_ctx) vec4_instruction(this, VS_OPCODE_PULL_CONSTANT_LOAD,
- temp, index);
+ temp, index, offset);
load-base_mrf = 14;
load-mlen = 1;
emit_before(inst, load);
--
1.7.10.4
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[Mesa-dev] [PATCH 15/22] mesa: Add support for glUniformBlockBinding() in display lists.
Fixes piglit GL_ARB_uniform_buffer_object/dlist.
---
src/mesa/main/dlist.c | 27 +++
1 file changed, 27 insertions(+)
diff --git a/src/mesa/main/dlist.c b/src/mesa/main/dlist.c
index 510fd1e..e3dc9c0 100644
--- a/src/mesa/main/dlist.c
+++ b/src/mesa/main/dlist.c
@@ -482,6 +482,9 @@ typedef enum
OPCODE_DRAW_TRANSFORM_FEEDBACK_INSTANCED,
OPCODE_DRAW_TRANSFORM_FEEDBACK_STREAM_INSTANCED,
+ /* ARB_uniform_buffer_object */
+ OPCODE_UNIFORM_BLOCK_BINDING,
+
/* The following three are meta instructions */
OPCODE_ERROR,/* raise compiled-in error */
OPCODE_CONTINUE,
@@ -7582,6 +7585,23 @@ save_EndConditionalRender(void)
}
}
+static void GLAPIENTRY
+save_UniformBlockBinding(GLuint prog, GLuint index, GLuint binding)
+{
+ GET_CURRENT_CONTEXT(ctx);
+ Node *n;
+ ASSERT_OUTSIDE_SAVE_BEGIN_END_AND_FLUSH(ctx);
+ n = alloc_instruction(ctx, OPCODE_UNIFORM_BLOCK_BINDING, 3);
+ if (n) {
+ n[1].i = prog;
+ n[2].i = index;
+ n[3].i = binding;
+ }
+ if (ctx-ExecuteFlag) {
+ CALL_UniformBlockBinding(ctx-Exec, (prog, index, binding));
+ }
+}
+
/**
* Save an error-generating command into display list.
@@ -8877,6 +8897,10 @@ execute_list(struct gl_context *ctx, GLuint list)
CALL_EndConditionalRenderNV(ctx-Exec, ());
break;
+ case OPCODE_UNIFORM_BLOCK_BINDING:
+CALL_UniformBlockBinding(ctx-Exec, (n[1].i, n[2].i, n[3].i));
+break;
+
case OPCODE_CONTINUE:
n = (Node *) n[1].next;
break;
@@ -10632,6 +10656,9 @@ _mesa_create_save_table(void)
/* GL_ARB_debug_output (no dlist support) */
_mesa_init_errors_dispatch(table);
+ /* GL_ARB_uniform_buffer_object */
+ SET_UniformBlockBinding(table, save_UniformBlockBinding);
+
/* GL_NV_primitive_restart */
SET_PrimitiveRestartIndexNV(table, _mesa_PrimitiveRestartIndex);
--
1.7.10.4
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[Mesa-dev] [PATCH 17/22] i965: Bind UBOs as surfaces like we do for pull constants.
---
src/mesa/drivers/dri/i965/brw_context.h | 22 +++-
src/mesa/drivers/dri/i965/brw_state.h|2 +
src/mesa/drivers/dri/i965/brw_state_upload.c |4 ++
src/mesa/drivers/dri/i965/brw_vs.c |2 +-
src/mesa/drivers/dri/i965/brw_vs_surface_state.c | 24 +
src/mesa/drivers/dri/i965/brw_wm_surface_state.c | 59 ++
6 files changed, 110 insertions(+), 3 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/brw_context.h
b/src/mesa/drivers/dri/i965/brw_context.h
index 8a082ab..7414732 100644
--- a/src/mesa/drivers/dri/i965/brw_context.h
+++ b/src/mesa/drivers/dri/i965/brw_context.h
@@ -493,6 +493,9 @@ struct brw_vs_ouput_sizes {
/** Maximum number of actual buffers used for stream output */
#define BRW_MAX_SOL_BUFFERS 4
+#define BRW_MAX_WM_UBOS 12
+#define BRW_MAX_VS_UBOS 12
+
/**
* Helpers to create Surface Binding Table indexes for draw buffers,
* textures, and constant buffers.
@@ -518,6 +521,11 @@ struct brw_vs_ouput_sizes {
*| . | . |
*| : | : |
*| 24 | Texture 15 |
+ *|-|-|
+ *| 25 | UBO 0 |
+ *| . | . |
+ *| : | : |
+ *| 36 | UBO 11 |
*+---+
*
* Our VS binding tables are programmed as follows:
@@ -529,6 +537,11 @@ struct brw_vs_ouput_sizes {
*| . | . |
*| : | : |
*| 16 | Texture 15 |
+ *+-+-+
+ *| 17 | UBO 0 |
+ *| . | . |
+ *| : | : |
+ *| 28 | UBO 15 |
*+---+
*
* Our (gen6) GS binding tables are programmed as follows:
@@ -547,13 +560,15 @@ struct brw_vs_ouput_sizes {
#define SURF_INDEX_DRAW(d) (d)
#define SURF_INDEX_FRAG_CONST_BUFFER (BRW_MAX_DRAW_BUFFERS + 1)
#define SURF_INDEX_TEXTURE(t)(BRW_MAX_DRAW_BUFFERS + 2 + (t))
+#define SURF_INDEX_WM_UBO(u) (SURF_INDEX_TEXTURE(BRW_MAX_TEX_UNIT) + u)
/** Maximum size of the binding table. */
-#define BRW_MAX_WM_SURFACES SURF_INDEX_TEXTURE(BRW_MAX_TEX_UNIT)
+#define BRW_MAX_WM_SURFACES SURF_INDEX_WM_UBO(BRW_MAX_WM_UBOS)
#define SURF_INDEX_VERT_CONST_BUFFER (0)
#define SURF_INDEX_VS_TEXTURE(t) (SURF_INDEX_VERT_CONST_BUFFER + 1 + (t))
-#define BRW_MAX_VS_SURFACES SURF_INDEX_VS_TEXTURE(BRW_MAX_TEX_UNIT)
+#define SURF_INDEX_VS_UBO(u) (SURF_INDEX_VS_TEXTURE(BRW_MAX_TEX_UNIT)
+ u)
+#define BRW_MAX_VS_SURFACES SURF_INDEX_VS_UBO(BRW_MAX_VS_UBOS)
#define SURF_INDEX_SOL_BINDING(t)((t))
#define BRW_MAX_GS_SURFACES
SURF_INDEX_SOL_BINDING(BRW_MAX_SOL_BINDINGS)
@@ -1135,6 +1150,9 @@ brw_update_sol_surface(struct brw_context *brw,
struct gl_buffer_object *buffer_obj,
uint32_t *out_offset, unsigned num_vector_components,
unsigned stride_dwords, unsigned offset_dwords);
+void brw_upload_ubo_surfaces(struct brw_context *brw,
+struct gl_shader *shader,
+uint32_t *surf_offsets);
/* gen6_sol.c */
void
diff --git a/src/mesa/drivers/dri/i965/brw_state.h
b/src/mesa/drivers/dri/i965/brw_state.h
index 8b99c52..2540cd5 100644
--- a/src/mesa/drivers/dri/i965/brw_state.h
+++ b/src/mesa/drivers/dri/i965/brw_state.h
@@ -71,6 +71,7 @@ extern const struct brw_tracked_state brw_state_base_address;
extern const struct brw_tracked_state brw_urb_fence;
extern const struct brw_tracked_state brw_vertex_state;
extern const struct brw_tracked_state brw_vs_prog;
+extern const struct brw_tracked_state brw_vs_ubo_surfaces;
extern const struct brw_tracked_state brw_vs_unit;
extern const struct brw_tracked_state brw_wm_input_sizes;
extern const struct brw_tracked_state brw_wm_prog;
@@ -78,6 +79,7 @@ extern const struct brw_tracked_state
brw_renderbuffer_surfaces;
extern const struct brw_tracked_state brw_texture_surfaces;
extern const struct brw_tracked_state brw_wm_binding_table;
extern const struct brw_tracked_state brw_vs_binding_table;
+extern const struct brw_tracked_state brw_wm_ubo_surfaces;
extern const struct brw_tracked_state brw_wm_unit;
extern const struct brw_tracked_state brw_psp_urb_cbs;
diff --git a/src/mesa/drivers/dri/i965/brw_state_upload.c
b/src/mesa/drivers/dri/i965/brw_state_upload.c
index 12535ed..c3e6de4 100644
--- a/src/mesa/drivers/dri/i965/brw_state_upload.c
+++ b/src/mesa/drivers/dri/i965/brw_state_upload.c
@@ -143,7 +143,9 @@ static const struct brw_tracked_state *gen6_atoms[] =
* table upload must be last.
*/
brw_vs_pull_constants,
+ brw_vs_ubo_surfaces,
brw_wm_pull_constants,
+ brw_wm_ubo_surfaces,
[Mesa-dev] [PATCH 16/22] i965: Add an offset argument to constant buffer setup.
We'll use this for UBO surfaces.
---
src/mesa/drivers/dri/i965/brw_state.h |2 ++
src/mesa/drivers/dri/i965/brw_vs_surface_state.c |2 +-
src/mesa/drivers/dri/i965/brw_wm_surface_state.c |7 ---
src/mesa/drivers/dri/i965/gen7_wm_surface_state.c |5 +++--
src/mesa/drivers/dri/intel/intel_context.h|1 +
5 files changed, 11 insertions(+), 6 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/brw_state.h
b/src/mesa/drivers/dri/i965/brw_state.h
index 68e92a8..8b99c52 100644
--- a/src/mesa/drivers/dri/i965/brw_state.h
+++ b/src/mesa/drivers/dri/i965/brw_state.h
@@ -187,6 +187,7 @@ uint32_t brw_get_surface_tiling_bits(uint32_t tiling);
uint32_t brw_get_surface_num_multisamples(unsigned num_samples);
void brw_create_constant_surface(struct brw_context *brw,
drm_intel_bo *bo,
+uint32_t offset,
int width,
uint32_t *out_offset);
@@ -214,6 +215,7 @@ void gen7_check_surface_setup(struct gen7_surface_state
*surf,
void gen7_init_vtable_surface_functions(struct brw_context *brw);
void gen7_create_constant_surface(struct brw_context *brw,
drm_intel_bo *bo,
+ uint32_t offset,
int width,
uint32_t *out_offset);
diff --git a/src/mesa/drivers/dri/i965/brw_vs_surface_state.c
b/src/mesa/drivers/dri/i965/brw_vs_surface_state.c
index 534621c..2026145 100644
--- a/src/mesa/drivers/dri/i965/brw_vs_surface_state.c
+++ b/src/mesa/drivers/dri/i965/brw_vs_surface_state.c
@@ -95,7 +95,7 @@ brw_upload_vs_pull_constants(struct brw_context *brw)
drm_intel_gem_bo_unmap_gtt(brw-vs.const_bo);
const int surf = SURF_INDEX_VERT_CONST_BUFFER;
- intel-vtbl.create_constant_surface(brw, brw-vs.const_bo,
+ intel-vtbl.create_constant_surface(brw, brw-vs.const_bo, 0,
params-NumParameters,
brw-vs.surf_offset[surf]);
diff --git a/src/mesa/drivers/dri/i965/brw_wm_surface_state.c
b/src/mesa/drivers/dri/i965/brw_wm_surface_state.c
index 099668e..02800f8 100644
--- a/src/mesa/drivers/dri/i965/brw_wm_surface_state.c
+++ b/src/mesa/drivers/dri/i965/brw_wm_surface_state.c
@@ -766,6 +766,7 @@ brw_update_texture_surface( struct gl_context *ctx, GLuint
unit )
void
brw_create_constant_surface(struct brw_context *brw,
drm_intel_bo *bo,
+ uint32_t offset,
int width,
uint32_t *out_offset)
{
@@ -783,7 +784,7 @@ brw_create_constant_surface(struct brw_context *brw,
if (intel-gen = 6)
surf[0] |= BRW_SURFACE_RC_READ_WRITE;
- surf[1] = bo-offset; /* reloc */
+ surf[1] = bo-offset + offset; /* reloc */
surf[2] = ((w 0x7f) BRW_SURFACE_WIDTH_SHIFT |
((w 7) 0x1fff) BRW_SURFACE_HEIGHT_SHIFT);
@@ -800,7 +801,7 @@ brw_create_constant_surface(struct brw_context *brw,
*/
drm_intel_bo_emit_reloc(brw-intel.batch.bo,
*out_offset + 4,
- bo, 0,
+ bo, offset,
I915_GEM_DOMAIN_SAMPLER, 0);
}
@@ -936,7 +937,7 @@ brw_upload_wm_pull_constants(struct brw_context *brw)
}
drm_intel_gem_bo_unmap_gtt(brw-wm.const_bo);
- intel-vtbl.create_constant_surface(brw, brw-wm.const_bo,
+ intel-vtbl.create_constant_surface(brw, brw-wm.const_bo, 0,
params-NumParameters,
brw-wm.surf_offset[surf_index]);
diff --git a/src/mesa/drivers/dri/i965/gen7_wm_surface_state.c
b/src/mesa/drivers/dri/i965/gen7_wm_surface_state.c
index 62d2be8..ed2326e 100644
--- a/src/mesa/drivers/dri/i965/gen7_wm_surface_state.c
+++ b/src/mesa/drivers/dri/i965/gen7_wm_surface_state.c
@@ -362,6 +362,7 @@ gen7_update_texture_surface(struct gl_context *ctx, GLuint
unit)
void
gen7_create_constant_surface(struct brw_context *brw,
drm_intel_bo *bo,
+uint32_t offset,
int width,
uint32_t *out_offset)
{
@@ -378,7 +379,7 @@ gen7_create_constant_surface(struct brw_context *brw,
surf-ss0.render_cache_read_write = 1;
assert(bo);
- surf-ss1.base_addr = bo-offset; /* reloc */
+ surf-ss1.base_addr = bo-offset + offset; /* reloc */
surf-ss2.width = w 0x7f;/* bits 6:0 of size or width */
surf-ss2.height = (w 7) 0x1fff; /* bits 19:7 of size or width */
@@ -400,7 +401,7 @@ gen7_create_constant_surface(struct brw_context *brw,
drm_intel_bo_emit_reloc(brw-intel.batch.bo,
(*out_offset +
offsetof(struct gen7_surface_state, ss1)),
- bo, 0,
+
[Mesa-dev] [PATCH 20/22] i965/fs: Add support for loading uniform buffer variables as pull constants.
Variable array indexing isn't finished, because the lowering pass
turns it all into conditional moves of constant index accesses so I
can't test it.
---
src/mesa/drivers/dri/i965/brw_fs.cpp |5 +++
src/mesa/drivers/dri/i965/brw_fs_visitor.cpp | 43 +-
src/mesa/drivers/dri/i965/brw_shader.cpp |3 ++
3 files changed, 50 insertions(+), 1 deletion(-)
diff --git a/src/mesa/drivers/dri/i965/brw_fs.cpp
b/src/mesa/drivers/dri/i965/brw_fs.cpp
index cb89d74..90dddce 100644
--- a/src/mesa/drivers/dri/i965/brw_fs.cpp
+++ b/src/mesa/drivers/dri/i965/brw_fs.cpp
@@ -1378,6 +1378,11 @@ fs_visitor::propagate_constants()
}
break;
+case FS_OPCODE_PULL_CONSTANT_LOAD:
+ scan_inst-src[i] = inst-src[0];
+ progress = true;
+ break;
+
default:
break;
}
diff --git a/src/mesa/drivers/dri/i965/brw_fs_visitor.cpp
b/src/mesa/drivers/dri/i965/brw_fs_visitor.cpp
index 34f00ca..21400ed 100644
--- a/src/mesa/drivers/dri/i965/brw_fs_visitor.cpp
+++ b/src/mesa/drivers/dri/i965/brw_fs_visitor.cpp
@@ -104,6 +104,13 @@ fs_visitor::visit(ir_variable *ir)
} else if (ir-mode == ir_var_uniform) {
int param_index = c-prog_data.nr_params;
+ /* Thanks to the lower_ubo_reference pass, we will see only
+ * ir_binop_ubo_load expressions and not ir_dereference_variable for UBO
+ * variables, so no need for them to be in variable_ht.
+ */
+ if (ir-uniform_block != -1)
+ return;
+
if (c-dispatch_width == 16) {
if (!variable_storage(ir)) {
fail(Failed to find uniform '%s' in 16-wide\n, ir-name);
@@ -573,7 +580,41 @@ fs_visitor::visit(ir_expression *ir)
break;
case ir_binop_ubo_load:
- assert(!not yet supported);
+ ir_constant *uniform_block = ir-operands[0]-as_constant();
+ ir_constant *offset = ir-operands[1]-as_constant();
+
+ fs_reg packed_consts = fs_reg(this, glsl_type::float_type);
+ packed_consts.type = result.type;
+ fs_reg surf_index =
fs_reg((unsigned)SURF_INDEX_WM_UBO(uniform_block-value.u[0]));
+ fs_inst *pull = emit(fs_inst(FS_OPCODE_PULL_CONSTANT_LOAD,
+ packed_consts,
+ surf_index,
+ fs_reg(offset-value.u[0])));
+ pull-base_mrf = 14;
+ pull-mlen = 1;
+
+ packed_consts.smear = offset-value.u[0] % 16 / 4;
+ for (int i = 0; i ir-type-vector_elements; i++) {
+ /* UBO bools are any nonzero value. We consider bools to be
+ * values with the low bit set to 1. Convert them using CMP.
+ */
+ if (ir-type-base_type == GLSL_TYPE_BOOL) {
+fs_inst *inst = emit(fs_inst(BRW_OPCODE_CMP, result,
+ packed_consts, fs_reg(0u)));
+inst-conditional_mod = BRW_CONDITIONAL_NZ;
+ } else {
+emit(fs_inst(BRW_OPCODE_MOV, result, packed_consts));
+ }
+
+ packed_consts.smear++;
+ result.reg_offset++;
+
+ /* The std140 packing rules don't allow vectors to cross 16-byte
+ * boundaries, and a reg is 32 bytes.
+ */
+ assert(packed_consts.smear 8);
+ }
+ result.reg_offset = 0;
break;
}
}
diff --git a/src/mesa/drivers/dri/i965/brw_shader.cpp
b/src/mesa/drivers/dri/i965/brw_shader.cpp
index 9356714..86426e0 100644
--- a/src/mesa/drivers/dri/i965/brw_shader.cpp
+++ b/src/mesa/drivers/dri/i965/brw_shader.cpp
@@ -146,6 +146,9 @@ brw_link_shader(struct gl_context *ctx, struct
gl_shader_program *shProg)
lower_variable_index_to_cond_assign(shader-ir,
input, output, temp, uniform);
+ /* FINISHME: Do this before the variable index lowering. */
+ lower_ubo_reference(shader-base, shader-ir);
+
do {
progress = false;
--
1.7.10.4
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[Mesa-dev] [PATCH 18/22] i965/fs: Communicate the pull constant block read parameters through fs_regs.
I wanted to add the surface index as a variable value for UBO support,
and a reg seemed like the obvious way to go. This exposes more of the
information to CSE, which we'll probably want to apply to pull
constant loads for UBOs eventually (you might access 4 floats in a
row, each of which would produce an oword block read of the same
block).
---
src/mesa/drivers/dri/i965/brw_fs.cpp |6 --
src/mesa/drivers/dri/i965/brw_fs.h|4 +++-
src/mesa/drivers/dri/i965/brw_fs_emit.cpp | 16 +---
3 files changed, 20 insertions(+), 6 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/brw_fs.cpp
b/src/mesa/drivers/dri/i965/brw_fs.cpp
index d06858e..cb89d74 100644
--- a/src/mesa/drivers/dri/i965/brw_fs.cpp
+++ b/src/mesa/drivers/dri/i965/brw_fs.cpp
@@ -1214,9 +1214,11 @@ fs_visitor::setup_pull_constants()
continue;
fs_reg dst = fs_reg(this, glsl_type::float_type);
+fs_reg index = fs_reg((unsigned)SURF_INDEX_FRAG_CONST_BUFFER);
+fs_reg offset = fs_reg((unsigned)(((uniform_nr -
+pull_uniform_base) * 4) ~15));
fs_inst *pull = new(mem_ctx) fs_inst(FS_OPCODE_PULL_CONSTANT_LOAD,
- dst);
-pull-offset = ((uniform_nr - pull_uniform_base) * 4) ~15;
+ dst, index, offset);
pull-ir = inst-ir;
pull-annotation = inst-annotation;
pull-base_mrf = 14;
diff --git a/src/mesa/drivers/dri/i965/brw_fs.h
b/src/mesa/drivers/dri/i965/brw_fs.h
index 031d541..f1c719d 100644
--- a/src/mesa/drivers/dri/i965/brw_fs.h
+++ b/src/mesa/drivers/dri/i965/brw_fs.h
@@ -291,7 +291,9 @@ public:
bool negate_value);
void generate_spill(fs_inst *inst, struct brw_reg src);
void generate_unspill(fs_inst *inst, struct brw_reg dst);
- void generate_pull_constant_load(fs_inst *inst, struct brw_reg dst);
+ void generate_pull_constant_load(fs_inst *inst, struct brw_reg dst,
+ struct brw_reg index,
+ struct brw_reg offset);
void generate_mov_dispatch_to_flags();
void emit_dummy_fs();
diff --git a/src/mesa/drivers/dri/i965/brw_fs_emit.cpp
b/src/mesa/drivers/dri/i965/brw_fs_emit.cpp
index dc5f3e1..62745a4 100644
--- a/src/mesa/drivers/dri/i965/brw_fs_emit.cpp
+++ b/src/mesa/drivers/dri/i965/brw_fs_emit.cpp
@@ -562,7 +562,9 @@ fs_visitor::generate_unspill(fs_inst *inst, struct brw_reg
dst)
}
void
-fs_visitor::generate_pull_constant_load(fs_inst *inst, struct brw_reg dst)
+fs_visitor::generate_pull_constant_load(fs_inst *inst, struct brw_reg dst,
+ struct brw_reg index,
+ struct brw_reg offset)
{
assert(inst-mlen != 0);
@@ -579,8 +581,16 @@ fs_visitor::generate_pull_constant_load(fs_inst *inst,
struct brw_reg dst)
if (intel-gen == 4 !intel-is_g4x)
brw_MOV(p, brw_null_reg(), dst);
+ assert(index.file == BRW_IMMEDIATE_VALUE
+ index.type == BRW_REGISTER_TYPE_UD);
+ uint32_t surf_index = index.dw1.ud;
+
+ assert(offset.file == BRW_IMMEDIATE_VALUE
+ offset.type == BRW_REGISTER_TYPE_UD);
+ uint32_t read_offset = offset.dw1.ud;
+
brw_oword_block_read(p, dst, brw_message_reg(inst-base_mrf),
- inst-offset, SURF_INDEX_FRAG_CONST_BUFFER);
+ read_offset, surf_index);
if (intel-gen == 4 !intel-is_g4x) {
/* gen4 errata: destination from a send can't be used as a
@@ -947,7 +957,7 @@ fs_visitor::generate_code()
break;
case FS_OPCODE_PULL_CONSTANT_LOAD:
-generate_pull_constant_load(inst, dst);
+generate_pull_constant_load(inst, dst, src[0], src[1]);
break;
case FS_OPCODE_FB_WRITE:
--
1.7.10.4
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[Mesa-dev] [PATCH 22/22] i965: Enable uniform buffer objects on gen6+.
---
docs/GL3.txt |2 +-
src/mesa/drivers/dri/intel/intel_extensions.c |1 +
2 files changed, 2 insertions(+), 1 deletion(-)
diff --git a/docs/GL3.txt b/docs/GL3.txt
index 7c68745..dc1df6d 100644
--- a/docs/GL3.txt
+++ b/docs/GL3.txt
@@ -50,7 +50,7 @@ Primitive restart (GL_NV_primitive_restart) DONE
(i965, r600)
16 vertex texture image units DONE
Texture buffer objs (GL_ARB_texture_buffer_object)needs GL3.1 enabling
(i965)
Rectangular textures (GL_ARB_texture_rectangle) DONE (i965, r300, r600,
swrast)
-Uniform buffer objs (GL_ARB_uniform_buffer_object)not started
+Uniform buffer objs (GL_ARB_uniform_buffer_object)DONE (i965)
Signed normalized textures (GL_EXT_texture_snorm) DONE (i965, r300, r600)
diff --git a/src/mesa/drivers/dri/intel/intel_extensions.c
b/src/mesa/drivers/dri/intel/intel_extensions.c
index b752216..bf5c75d 100755
--- a/src/mesa/drivers/dri/intel/intel_extensions.c
+++ b/src/mesa/drivers/dri/intel/intel_extensions.c
@@ -106,6 +106,7 @@ intelInitExtensions(struct gl_context *ctx)
if (intel-gen = 6) {
ctx-Extensions.ARB_blend_func_extended =
!driQueryOptionb(intel-optionCache, disable_blend_func_extended);
ctx-Extensions.ARB_draw_buffers_blend = true;
+ ctx-Extensions.ARB_uniform_buffer_object = true;
}
if (intel-gen = 5)
--
1.7.10.4
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Re: [Mesa-dev] [PATCH] radeon/llvm: fix calculation of max register number
On Tue, Jul 31, 2012 at 06:40:11PM +0200, Christian König wrote:
Signed-off-by: Christian König deathsim...@vodafone.de
Reviewed-by: Tom Stellard thomas.stell...@amd.com
---
src/gallium/drivers/radeon/SICodeEmitter.cpp |2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/src/gallium/drivers/radeon/SICodeEmitter.cpp
b/src/gallium/drivers/radeon/SICodeEmitter.cpp
index a7647aa..9fc4aab 100644
--- a/src/gallium/drivers/radeon/SICodeEmitter.cpp
+++ b/src/gallium/drivers/radeon/SICodeEmitter.cpp
@@ -154,7 +154,7 @@ void SICodeEmitter::InitProgramInfo(MachineFunction MF) {
assert(!Unknown register class);
}
hwReg = RI-getHWRegNum(reg);
-maxUsed = ((hwReg + 1) * width) - 1;
+maxUsed = hwReg + width - 1;
if (isSGPR) {
MaxSGPR = maxUsed MaxSGPR ? maxUsed : MaxSGPR;
} else {
--
1.7.9.5
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[Mesa-dev] [PATCH 2/2] mesa: Expose texture buffer objects when the context is GL 3.1 core.
---
src/mesa/main/bufferobj.c |3 ++-
src/mesa/main/get.c | 16 +++-
src/mesa/main/teximage.c |6 --
3 files changed, 17 insertions(+), 8 deletions(-)
diff --git a/src/mesa/main/bufferobj.c b/src/mesa/main/bufferobj.c
index 5fdf52e..7216307 100644
--- a/src/mesa/main/bufferobj.c
+++ b/src/mesa/main/bufferobj.c
@@ -89,7 +89,8 @@ get_buffer_target(struct gl_context *ctx, GLenum target)
break;
#endif
case GL_TEXTURE_BUFFER:
- if (ctx-Extensions.ARB_texture_buffer_object) {
+ if (ctx-Extensions.ARB_texture_buffer_object ||
+ (ctx-API == API_OPENGL ctx-Version = 31)) {
return ctx-Texture.BufferObject;
}
break;
diff --git a/src/mesa/main/get.c b/src/mesa/main/get.c
index 7ffa3c1..a1e6879 100644
--- a/src/mesa/main/get.c
+++ b/src/mesa/main/get.c
@@ -284,6 +284,12 @@ static const int extra_GLSL_130[] = {
EXTRA_END
};
+static const int extra_texture_buffer_object[] = {
+ EXTRA_VERSION_31,
+ EXT(ARB_texture_buffer_object),
+ EXTRA_END
+};
+
static const int extra_ARB_sampler_objects[] = {
EXT(ARB_sampler_objects),
EXTRA_END
@@ -1292,15 +1298,15 @@ static const struct value_desc values[] = {
/* GL_ARB_texture_buffer_object */
{ GL_MAX_TEXTURE_BUFFER_SIZE_ARB, CONTEXT_INT(Const.MaxTextureBufferSize),
- extra_ARB_texture_buffer_object },
+ extra_texture_buffer_object },
{ GL_TEXTURE_BINDING_BUFFER_ARB, LOC_CUSTOM, TYPE_INT, 0,
- extra_ARB_texture_buffer_object },
+ extra_texture_buffer_object },
{ GL_TEXTURE_BUFFER_DATA_STORE_BINDING_ARB, LOC_CUSTOM, TYPE_INT,
- TEXTURE_BUFFER_INDEX, extra_ARB_texture_buffer_object },
+ TEXTURE_BUFFER_INDEX, extra_texture_buffer_object },
{ GL_TEXTURE_BUFFER_FORMAT_ARB, LOC_CUSTOM, TYPE_INT, 0,
- extra_ARB_texture_buffer_object },
+ extra_texture_buffer_object },
{ GL_TEXTURE_BUFFER_ARB, LOC_CUSTOM, TYPE_INT, 0,
- extra_ARB_texture_buffer_object },
+ extra_texture_buffer_object },
/* GL_ARB_sampler_objects / GL 3.3 */
{ GL_SAMPLER_BINDING,
diff --git a/src/mesa/main/teximage.c b/src/mesa/main/teximage.c
index ef64a79..e70470d 100644
--- a/src/mesa/main/teximage.c
+++ b/src/mesa/main/teximage.c
@@ -774,7 +774,8 @@ _mesa_select_tex_object(struct gl_context *ctx,
case GL_PROXY_TEXTURE_2D_ARRAY_EXT:
return arrayTex ? ctx-Texture.ProxyTex[TEXTURE_2D_ARRAY_INDEX] :
NULL;
case GL_TEXTURE_BUFFER:
- return ctx-Extensions.ARB_texture_buffer_object
+ return (ctx-Extensions.ARB_texture_buffer_object ||
+ (ctx-API == API_OPENGL ctx-Version = 31))
? texUnit-CurrentTex[TEXTURE_BUFFER_INDEX] : NULL;
case GL_TEXTURE_EXTERNAL_OES:
return ctx-Extensions.OES_EGL_image_external
@@ -3881,7 +3882,8 @@ _mesa_TexBuffer(GLenum target, GLenum internalFormat,
GLuint buffer)
GET_CURRENT_CONTEXT(ctx);
ASSERT_OUTSIDE_BEGIN_END_AND_FLUSH(ctx);
- if (!ctx-Extensions.ARB_texture_buffer_object) {
+ if (!(ctx-Extensions.ARB_texture_buffer_object ||
+ (ctx-API == API_OPENGL ctx-Version = 31))) {
_mesa_error(ctx, GL_INVALID_OPERATION, glTexBuffer);
return;
}
--
1.7.10.4
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[Mesa-dev] [PATCH 1/2] mesa: Replace VersionMajor/VersionMinor with a Version field.
As we get into supporting GL 3.x core, we come across more and more features
of the API that depend on the version number as opposed to just the extension
list. This will let us more sanely do version checks than (VersionMajor == 3
VersionMinor = 2) || VersionMajor = 4.
---
I didn't like any of the macrofying changes I heard, particularly
because I expect the minor version to never hit 10 (We've had GL minor
versions up to a maximum of 3/10 so far), and it provides consistency
with piglit where we're also using major * 10 + minor.
I did take Brian's suggestion of removing the old fields, though.
That was a bit more typing, but I think it was good.
src/mesa/drivers/dri/intel/intel_screen.c |4 +---
src/mesa/drivers/dri/nouveau/nouveau_context.c |4 +---
src/mesa/drivers/dri/r200/r200_context.c |4 +---
src/mesa/drivers/dri/radeon/radeon_context.c |4 +---
src/mesa/main/enable.c |4 ++--
src/mesa/main/fbobject.c |8 +++
src/mesa/main/get.c| 13 ---
src/mesa/main/glformats.c |8 +++
src/mesa/main/mtypes.h |4 ++--
src/mesa/main/texformat.c |4 ++--
src/mesa/main/teximage.c | 15 ++--
src/mesa/main/texparam.c |2 +-
src/mesa/main/varray.c |5 ++--
src/mesa/main/version.c| 29
src/mesa/state_tracker/st_manager.c|3 +--
15 files changed, 53 insertions(+), 58 deletions(-)
diff --git a/src/mesa/drivers/dri/intel/intel_screen.c
b/src/mesa/drivers/dri/intel/intel_screen.c
index e8a4ad1..24dab8f 100644
--- a/src/mesa/drivers/dri/intel/intel_screen.c
+++ b/src/mesa/drivers/dri/intel/intel_screen.c
@@ -693,9 +693,7 @@ intelCreateContext(gl_api api,
(struct gl_context *) driContextPriv-driverPrivate;
_mesa_compute_version(ctx);
- if (ctx-VersionMajor major_version
- || (ctx-VersionMajor == major_version
- ctx-VersionMinor = minor_version)) {
+ if (ctx-Version = major_version * 10 + minor_version) {
return true;
}
diff --git a/src/mesa/drivers/dri/nouveau/nouveau_context.c
b/src/mesa/drivers/dri/nouveau/nouveau_context.c
index d7d5a04..f794308 100644
--- a/src/mesa/drivers/dri/nouveau/nouveau_context.c
+++ b/src/mesa/drivers/dri/nouveau/nouveau_context.c
@@ -75,9 +75,7 @@ nouveau_context_create(gl_api api,
dri_ctx-driverPrivate = ctx;
_mesa_compute_version(ctx);
- if (ctx-VersionMajor major_version
- || (ctx-VersionMajor == major_version
-ctx-VersionMinor minor_version)) {
+ if (ctx-Version major_version * 10 + minor_version) {
nouveau_context_destroy(dri_ctx);
*error = __DRI_CTX_ERROR_BAD_VERSION;
return GL_FALSE;
diff --git a/src/mesa/drivers/dri/r200/r200_context.c
b/src/mesa/drivers/dri/r200/r200_context.c
index 244973e..17e08a1 100644
--- a/src/mesa/drivers/dri/r200/r200_context.c
+++ b/src/mesa/drivers/dri/r200/r200_context.c
@@ -454,9 +454,7 @@ GLboolean r200CreateContext( gl_api api,
}
_mesa_compute_version(ctx);
- if (ctx-VersionMajor major_version
- || (ctx-VersionMajor == major_version
- ctx-VersionMinor minor_version)) {
+ if (ctx-Version major_version * 10 + minor_version) {
r200DestroyContext(driContextPriv);
*error = __DRI_CTX_ERROR_BAD_VERSION;
return GL_FALSE;
diff --git a/src/mesa/drivers/dri/radeon/radeon_context.c
b/src/mesa/drivers/dri/radeon/radeon_context.c
index 9881d00..34c392e 100644
--- a/src/mesa/drivers/dri/radeon/radeon_context.c
+++ b/src/mesa/drivers/dri/radeon/radeon_context.c
@@ -402,9 +402,7 @@ r100CreateContext( gl_api api,
}
_mesa_compute_version(ctx);
- if (ctx-VersionMajor major_version
- || (ctx-VersionMajor == major_version
- ctx-VersionMinor minor_version)) {
+ if (ctx-Version major_version * 10 + minor_version) {
radeonDestroyContext(driContextPriv);
*error = __DRI_CTX_ERROR_BAD_VERSION;
return GL_FALSE;
diff --git a/src/mesa/main/enable.c b/src/mesa/main/enable.c
index c811f2a..f811057 100644
--- a/src/mesa/main/enable.c
+++ b/src/mesa/main/enable.c
@@ -902,7 +902,7 @@ _mesa_set_enable(struct gl_context *ctx, GLenum cap,
GLboolean state)
* GL_PRIMITIVE_RESTART_NV (which is client state).
*/
case GL_PRIMITIVE_RESTART:
- if (ctx-VersionMajor * 10 + ctx-VersionMinor 31) {
+ if (ctx-Version 31) {
goto invalid_enum_error;
}
if (ctx-Array.PrimitiveRestart != state) {
@@ -1419,7 +1419,7 @@ _mesa_IsEnabled( GLenum cap )
/* GL 3.1 primitive restart */
case GL_PRIMITIVE_RESTART:
- if (ctx-VersionMajor * 10 + ctx-VersionMinor 31) {
+ if (ctx-Version 31)
[Mesa-dev] [PATCH] egl: update eglext.h to revision 18699
Useful for EGL_KHR_create_context.
---
include/EGL/eglext.h | 157 +-
1 files changed, 143 insertions(+), 14 deletions(-)
diff --git a/include/EGL/eglext.h b/include/EGL/eglext.h
index a7ea2ea..7c45b64 100644
--- a/include/EGL/eglext.h
+++ b/include/EGL/eglext.h
@@ -6,7 +6,7 @@ extern C {
#endif
/*
-** Copyright (c) 2007-2010 The Khronos Group Inc.
+** Copyright (c) 2007-2012 The Khronos Group Inc.
**
** Permission is hereby granted, free of charge, to any person obtaining a
** copy of this software and/or associated documentation files (the
@@ -34,8 +34,8 @@ extern C {
/* Header file version number */
/* Current version at http://www.khronos.org/registry/egl/ */
-/* $Revision: 15052 $ on $Date: 2011-07-06 17:43:46 -0700 (Wed, 06 Jul 2011) $
*/
-#define EGL_EGLEXT_VERSION 10
+/* $Revision: 18699 $ on $Date: 2012-07-31 03:04:59 -0700 (Tue, 31 Jul 2012) $
*/
+#define EGL_EGLEXT_VERSION 14
#ifndef EGL_KHR_config_attribs
#define EGL_KHR_config_attribs 1
@@ -178,15 +178,15 @@ typedef EGLBoolean (EGLAPIENTRYP
PFNEGLGETSYNCATTRIBKHRPROC) (EGLDisplay dpy, EG
#ifndef EGL_NV_coverage_sample
#define EGL_NV_coverage_sample 1
-#define EGL_COVERAGE_BUFFERS_NV 0x30E0
-#define EGL_COVERAGE_SAMPLES_NV 0x30E1
+#define EGL_COVERAGE_BUFFERS_NV0x30E0
+#define EGL_COVERAGE_SAMPLES_NV0x30E1
#endif
#ifndef EGL_NV_depth_nonlinear
#define EGL_NV_depth_nonlinear 1
-#define EGL_DEPTH_ENCODING_NV 0x30E2
+#define EGL_DEPTH_ENCODING_NV 0x30E2
#define EGL_DEPTH_ENCODING_NONE_NV 0
-#define EGL_DEPTH_ENCODING_NONLINEAR_NV 0x30E3
+#define EGL_DEPTH_ENCODING_NONLINEAR_NV0x30E3
#endif
#if KHRONOS_SUPPORT_INT64 /* EGLTimeNV requires 64-bit uint support */
@@ -208,12 +208,12 @@ typedef EGLBoolean (EGLAPIENTRYP
PFNEGLGETSYNCATTRIBKHRPROC) (EGLDisplay dpy, EG
typedef void* EGLSyncNV;
typedef khronos_utime_nanoseconds_t EGLTimeNV;
#ifdef EGL_EGLEXT_PROTOTYPES
-EGLSyncNV eglCreateFenceSyncNV (EGLDisplay dpy, EGLenum condition, const
EGLint *attrib_list);
-EGLBoolean eglDestroySyncNV (EGLSyncNV sync);
-EGLBoolean eglFenceNV (EGLSyncNV sync);
-EGLint eglClientWaitSyncNV (EGLSyncNV sync, EGLint flags, EGLTimeNV timeout);
-EGLBoolean eglSignalSyncNV (EGLSyncNV sync, EGLenum mode);
-EGLBoolean eglGetSyncAttribNV (EGLSyncNV sync, EGLint attribute, EGLint
*value);
+EGLAPI EGLSyncNV EGLAPIENTRY eglCreateFenceSyncNV (EGLDisplay dpy, EGLenum
condition, const EGLint *attrib_list);
+EGLAPI EGLBoolean EGLAPIENTRY eglDestroySyncNV (EGLSyncNV sync);
+EGLAPI EGLBoolean EGLAPIENTRY eglFenceNV (EGLSyncNV sync);
+EGLAPI EGLint EGLAPIENTRY eglClientWaitSyncNV (EGLSyncNV sync, EGLint flags,
EGLTimeNV timeout);
+EGLAPI EGLBoolean EGLAPIENTRY eglSignalSyncNV (EGLSyncNV sync, EGLenum mode);
+EGLAPI EGLBoolean EGLAPIENTRY eglGetSyncAttribNV (EGLSyncNV sync, EGLint
attribute, EGLint *value);
#endif /* EGL_EGLEXT_PROTOTYPES */
typedef EGLSyncNV (EGLAPIENTRYP PFNEGLCREATEFENCESYNCNVPROC) (EGLDisplay dpy,
EGLenum condition, const EGLint *attrib_list);
typedef EGLBoolean (EGLAPIENTRYP PFNEGLDESTROYSYNCNVPROC) (EGLSyncNV sync);
@@ -313,7 +313,7 @@ typedef EGLBoolean (EGLAPIENTRYP
PFNEGLQUERYSURFACEPOINTERANGLEPROC) (EGLDisplay
#define EGL_COVERAGE_SAMPLE_RESOLVE_NONE_NV0x3133
#endif
-#if KHRONOS_SUPPORT_INT64 /* EGLTimeKHR requires 64-bit uint support */
+#if KHRONOS_SUPPORT_INT64 /* EGLuint64NV requires 64-bit uint support */
#ifndef EGL_NV_system_time
#define EGL_NV_system_time 1
@@ -330,6 +330,135 @@ typedef EGLuint64NV (EGLAPIENTRYP
PFNEGLGETSYSTEMTIMENVPROC) (void);
#include EGL/eglmesaext.h
+#if KHRONOS_SUPPORT_INT64 /* EGLuint64KHR requires 64-bit uint support */
+#ifndef EGL_KHR_stream
+#define EGL_KHR_stream 1
+typedef void* EGLStreamKHR;
+typedef khronos_uint64_t EGLuint64KHR;
+#define EGL_NO_STREAM_KHR ((EGLStreamKHR)0)
+#define EGL_CONSUMER_LATENCY_USEC_KHR 0x3210
+#define EGL_PRODUCER_FRAME_KHR 0x3212
+#define EGL_CONSUMER_FRAME_KHR 0x3213
+#define EGL_STREAM_STATE_KHR 0x3214
+#define EGL_STREAM_STATE_CREATED_KHR 0x3215
+#define EGL_STREAM_STATE_CONNECTING_KHR0x3216
+#define EGL_STREAM_STATE_EMPTY_KHR 0x3217
+#define EGL_STREAM_STATE_NEW_FRAME_AVAILABLE_KHR0x3218
+#define EGL_STREAM_STATE_OLD_FRAME_AVAILABLE_KHR0x3219
+#define EGL_STREAM_STATE_DISCONNECTED_KHR 0x321A
+#define EGL_BAD_STREAM_KHR 0x321B
+#define EGL_BAD_STATE_KHR 0x321C
+#ifdef EGL_EGLEXT_PROTOTYPES
+EGLAPI EGLStreamKHR EGLAPIENTRY eglCreateStreamKHR(EGLDisplay dpy, const
EGLint *attrib_list);
+EGLAPI EGLBoolean EGLAPIENTRY eglDestroyStreamKHR(EGLDisplay dpy, EGLStreamKHR
stream);
+EGLAPI EGLBoolean EGLAPIENTRY eglStreamAttribKHR(EGLDisplay dpy, EGLStreamKHR
stream, EGLenum attribute, EGLint value);
+EGLAPI EGLBoolean EGLAPIENTRY
Re: [Mesa-dev] [PATCH 1/2] mesa: Replace VersionMajor/VersionMinor with a Version field.
On 07/31/2012 03:24 PM, Eric Anholt wrote:
As we get into supporting GL 3.x core, we come across more and more features
of the API that depend on the version number as opposed to just the extension
list. This will let us more sanely do version checks than (VersionMajor == 3
VersionMinor = 2) || VersionMajor = 4.
---
I didn't like any of the macrofying changes I heard, particularly
because I expect the minor version to never hit 10 (We've had GL minor
versions up to a maximum of 3/10 so far), and it provides consistency
with piglit where we're also using major * 10 + minor.
I did take Brian's suggestion of removing the old fields, though.
That was a bit more typing, but I think it was good.
src/mesa/drivers/dri/intel/intel_screen.c |4 +---
src/mesa/drivers/dri/nouveau/nouveau_context.c |4 +---
src/mesa/drivers/dri/r200/r200_context.c |4 +---
src/mesa/drivers/dri/radeon/radeon_context.c |4 +---
src/mesa/main/enable.c |4 ++--
src/mesa/main/fbobject.c |8 +++
src/mesa/main/get.c| 13 ---
src/mesa/main/glformats.c |8 +++
src/mesa/main/mtypes.h |4 ++--
src/mesa/main/texformat.c |4 ++--
src/mesa/main/teximage.c | 15 ++--
src/mesa/main/texparam.c |2 +-
src/mesa/main/varray.c |5 ++--
src/mesa/main/version.c| 29
src/mesa/state_tracker/st_manager.c|3 +--
15 files changed, 53 insertions(+), 58 deletions(-)
diff --git a/src/mesa/drivers/dri/intel/intel_screen.c
b/src/mesa/drivers/dri/intel/intel_screen.c
index e8a4ad1..24dab8f 100644
--- a/src/mesa/drivers/dri/intel/intel_screen.c
+++ b/src/mesa/drivers/dri/intel/intel_screen.c
@@ -693,9 +693,7 @@ intelCreateContext(gl_api api,
(struct gl_context *) driContextPriv-driverPrivate;
_mesa_compute_version(ctx);
- if (ctx-VersionMajor major_version
- || (ctx-VersionMajor == major_version
-ctx-VersionMinor = minor_version)) {
+ if (ctx-Version = major_version * 10 + minor_version) {
return true;
}
diff --git a/src/mesa/drivers/dri/nouveau/nouveau_context.c
b/src/mesa/drivers/dri/nouveau/nouveau_context.c
index d7d5a04..f794308 100644
--- a/src/mesa/drivers/dri/nouveau/nouveau_context.c
+++ b/src/mesa/drivers/dri/nouveau/nouveau_context.c
@@ -75,9 +75,7 @@ nouveau_context_create(gl_api api,
dri_ctx-driverPrivate = ctx;
_mesa_compute_version(ctx);
- if (ctx-VersionMajor major_version
- || (ctx-VersionMajor == major_version
- ctx-VersionMinor minor_version)) {
+ if (ctx-Version major_version * 10 + minor_version) {
nouveau_context_destroy(dri_ctx);
*error = __DRI_CTX_ERROR_BAD_VERSION;
return GL_FALSE;
diff --git a/src/mesa/drivers/dri/r200/r200_context.c
b/src/mesa/drivers/dri/r200/r200_context.c
index 244973e..17e08a1 100644
--- a/src/mesa/drivers/dri/r200/r200_context.c
+++ b/src/mesa/drivers/dri/r200/r200_context.c
@@ -454,9 +454,7 @@ GLboolean r200CreateContext( gl_api api,
}
_mesa_compute_version(ctx);
- if (ctx-VersionMajor major_version
- || (ctx-VersionMajor == major_version
- ctx-VersionMinor minor_version)) {
+ if (ctx-Version major_version * 10 + minor_version) {
r200DestroyContext(driContextPriv);
*error = __DRI_CTX_ERROR_BAD_VERSION;
return GL_FALSE;
diff --git a/src/mesa/drivers/dri/radeon/radeon_context.c
b/src/mesa/drivers/dri/radeon/radeon_context.c
index 9881d00..34c392e 100644
--- a/src/mesa/drivers/dri/radeon/radeon_context.c
+++ b/src/mesa/drivers/dri/radeon/radeon_context.c
@@ -402,9 +402,7 @@ r100CreateContext( gl_api api,
}
_mesa_compute_version(ctx);
- if (ctx-VersionMajor major_version
- || (ctx-VersionMajor == major_version
- ctx-VersionMinor minor_version)) {
+ if (ctx-Version major_version * 10 + minor_version) {
radeonDestroyContext(driContextPriv);
*error = __DRI_CTX_ERROR_BAD_VERSION;
return GL_FALSE;
diff --git a/src/mesa/main/enable.c b/src/mesa/main/enable.c
index c811f2a..f811057 100644
--- a/src/mesa/main/enable.c
+++ b/src/mesa/main/enable.c
@@ -902,7 +902,7 @@ _mesa_set_enable(struct gl_context *ctx, GLenum cap,
GLboolean state)
* GL_PRIMITIVE_RESTART_NV (which is client state).
*/
case GL_PRIMITIVE_RESTART:
- if (ctx-VersionMajor * 10 + ctx-VersionMinor 31) {
+ if (ctx-Version 31) {
goto invalid_enum_error;
}
if (ctx-Array.PrimitiveRestart != state) {
@@ -1419,7 +1419,7 @@ _mesa_IsEnabled( GLenum cap )
/* GL 3.1 primitive restart */
Re: [Mesa-dev] [PATCH 2/2] mesa: Expose texture buffer objects when the context is GL 3.1 core.
On 07/31/2012 03:24 PM, Eric Anholt wrote:
---
src/mesa/main/bufferobj.c |3 ++-
src/mesa/main/get.c | 16 +++-
src/mesa/main/teximage.c |6 --
3 files changed, 17 insertions(+), 8 deletions(-)
diff --git a/src/mesa/main/bufferobj.c b/src/mesa/main/bufferobj.c
index 5fdf52e..7216307 100644
--- a/src/mesa/main/bufferobj.c
+++ b/src/mesa/main/bufferobj.c
@@ -89,7 +89,8 @@ get_buffer_target(struct gl_context *ctx, GLenum target)
break;
#endif
case GL_TEXTURE_BUFFER:
- if (ctx-Extensions.ARB_texture_buffer_object) {
+ if (ctx-Extensions.ARB_texture_buffer_object ||
+ (ctx-API == API_OPENGL ctx-Version = 31)) {
I think you want API_OPENGL_CORE here. API_OPENGL is
legacy/compatibility GL.
return ctx-Texture.BufferObject;
}
break;
diff --git a/src/mesa/main/get.c b/src/mesa/main/get.c
index 7ffa3c1..a1e6879 100644
--- a/src/mesa/main/get.c
+++ b/src/mesa/main/get.c
@@ -284,6 +284,12 @@ static const int extra_GLSL_130[] = {
EXTRA_END
};
+static const int extra_texture_buffer_object[] = {
+ EXTRA_VERSION_31,
+ EXT(ARB_texture_buffer_object),
+ EXTRA_END
+};
+
static const int extra_ARB_sampler_objects[] = {
EXT(ARB_sampler_objects),
EXTRA_END
@@ -1292,15 +1298,15 @@ static const struct value_desc values[] = {
/* GL_ARB_texture_buffer_object */
{ GL_MAX_TEXTURE_BUFFER_SIZE_ARB, CONTEXT_INT(Const.MaxTextureBufferSize),
- extra_ARB_texture_buffer_object },
+ extra_texture_buffer_object },
{ GL_TEXTURE_BINDING_BUFFER_ARB, LOC_CUSTOM, TYPE_INT, 0,
- extra_ARB_texture_buffer_object },
+ extra_texture_buffer_object },
{ GL_TEXTURE_BUFFER_DATA_STORE_BINDING_ARB, LOC_CUSTOM, TYPE_INT,
- TEXTURE_BUFFER_INDEX, extra_ARB_texture_buffer_object },
+ TEXTURE_BUFFER_INDEX, extra_texture_buffer_object },
{ GL_TEXTURE_BUFFER_FORMAT_ARB, LOC_CUSTOM, TYPE_INT, 0,
- extra_ARB_texture_buffer_object },
+ extra_texture_buffer_object },
{ GL_TEXTURE_BUFFER_ARB, LOC_CUSTOM, TYPE_INT, 0,
- extra_ARB_texture_buffer_object },
+ extra_texture_buffer_object },
/* GL_ARB_sampler_objects / GL 3.3 */
{ GL_SAMPLER_BINDING,
diff --git a/src/mesa/main/teximage.c b/src/mesa/main/teximage.c
index ef64a79..e70470d 100644
--- a/src/mesa/main/teximage.c
+++ b/src/mesa/main/teximage.c
@@ -774,7 +774,8 @@ _mesa_select_tex_object(struct gl_context *ctx,
case GL_PROXY_TEXTURE_2D_ARRAY_EXT:
return arrayTex ? ctx-Texture.ProxyTex[TEXTURE_2D_ARRAY_INDEX] :
NULL;
case GL_TEXTURE_BUFFER:
- return ctx-Extensions.ARB_texture_buffer_object
+ return (ctx-Extensions.ARB_texture_buffer_object ||
+ (ctx-API == API_OPENGL ctx-Version = 31))
Ditto. You want API_OPENGL_CORE
? texUnit-CurrentTex[TEXTURE_BUFFER_INDEX] : NULL;
case GL_TEXTURE_EXTERNAL_OES:
return ctx-Extensions.OES_EGL_image_external
@@ -3881,7 +3882,8 @@ _mesa_TexBuffer(GLenum target, GLenum internalFormat,
GLuint buffer)
GET_CURRENT_CONTEXT(ctx);
ASSERT_OUTSIDE_BEGIN_END_AND_FLUSH(ctx);
- if (!ctx-Extensions.ARB_texture_buffer_object) {
+ if (!(ctx-Extensions.ARB_texture_buffer_object ||
+ (ctx-API == API_OPENGL ctx-Version = 31))) {
And again.
_mesa_error(ctx, GL_INVALID_OPERATION, glTexBuffer);
return;
}
With those changes, you can add a:
Reviewed-by: Kenneth Graunke kenn...@whitecape.org
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[Mesa-dev] [PATCH 1/3] meta: Implement sensible behavior for BlitFramebuffer with sRGB.
Prior to GL 4.2 spec, there was no guidance on how to implement
BlitFramebuffer for sRGB. Mesa chose to implement skipping decode and encode,
providing a reasonable behavior for sRGB - sRGB or RGB - RGB, but providing
something absurd for mixing and matching the two.
In GL 4.2, some text appeared in the spec saying to skip decode (search for
no linearization). The only non-absurd interpretation of that would be to
have no encode (same as Mesa's current implementation), otherwise sRGB - sRGB
blits wouldn't work.
However, it seems clear that you should be able to blit sRGB to RGB and RGB to
sRGB and get appropriate conversion. The ARB has been discussing the issue,
and appears to agree. So, instead implement the same behavior as gallium, and
always do the decode if the texture is sRGB, and do the encode if the
application asked for it.
Breaks piglit fbo-srgb-blit, which was expecting our previous no-conversion
behavior.
---
src/mesa/drivers/common/meta.c | 14 +-
1 file changed, 5 insertions(+), 9 deletions(-)
diff --git a/src/mesa/drivers/common/meta.c b/src/mesa/drivers/common/meta.c
index 6846bbc..e35f0c8 100644
--- a/src/mesa/drivers/common/meta.c
+++ b/src/mesa/drivers/common/meta.c
@@ -1357,7 +1357,6 @@ blitframebuffer_texture(struct gl_context *ctx,
const GLenum wrapSSave = texObj-Sampler.WrapS;
const GLenum wrapTSave = texObj-Sampler.WrapT;
const GLenum srgbSave = texObj-Sampler.sRGBDecode;
- const GLenum fbo_srgb_save = ctx-Color.sRGBEnabled;
const GLenum target = texObj-Target;
if (drawAtt-Texture == readAtt-Texture) {
@@ -1390,14 +1389,14 @@ blitframebuffer_texture(struct gl_context *ctx,
_mesa_TexParameteri(target, GL_TEXTURE_WRAP_S, GL_CLAMP_TO_EDGE);
_mesa_TexParameteri(target, GL_TEXTURE_WRAP_T, GL_CLAMP_TO_EDGE);
-/* Always do our blits with no sRGB decode or encode.*/
+/* Always do sRGB decode on the read, and do sRGB encode on the write
+ * if we've been asked to on this framebuffer by leaving
+ * GL_FRAMEBUFFER_SRGB in place.
+ */
if (ctx-Extensions.EXT_texture_sRGB_decode) {
_mesa_TexParameteri(target, GL_TEXTURE_SRGB_DECODE_EXT,
- GL_SKIP_DECODE_EXT);
+ GL_DECODE_EXT);
}
- if (ctx-Extensions.EXT_framebuffer_sRGB) {
-_mesa_set_enable(ctx, GL_FRAMEBUFFER_SRGB_EXT, GL_FALSE);
- }
_mesa_TexEnvi(GL_TEXTURE_ENV, GL_TEXTURE_ENV_MODE, GL_REPLACE);
_mesa_set_enable(ctx, target, GL_TRUE);
@@ -1463,9 +1462,6 @@ blitframebuffer_texture(struct gl_context *ctx,
if (ctx-Extensions.EXT_texture_sRGB_decode) {
_mesa_TexParameteri(target, GL_TEXTURE_SRGB_DECODE_EXT, srgbSave);
}
-if (ctx-Extensions.EXT_framebuffer_sRGB fbo_srgb_save) {
- _mesa_set_enable(ctx, GL_FRAMEBUFFER_SRGB_EXT, GL_TRUE);
-}
/* Done with color buffer */
mask = ~GL_COLOR_BUFFER_BIT;
--
1.7.10.4
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[Mesa-dev] sRGB BlitFramebuffer fix (l4d2 works!)
This is the rendering fix idr and I came to agreement on. I'm hoping this doesn't make wine angry -- they're the only app I expect would have issues with this, and I think what they want should be controllable by GL_FRAMEBUFFER_SRGB (so hopefully things just work). ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-dev
[Mesa-dev] [PATCH 2/3] i965: Pass the framebuffer to update_renderbuffer_surface().
We're going to want to look at the framebuffer for window system sRGB
handling.
---
src/mesa/drivers/dri/i965/brw_wm_surface_state.c |5 +++--
src/mesa/drivers/dri/i965/gen7_wm_surface_state.c |3 ++-
src/mesa/drivers/dri/intel/intel_context.h|4 ++--
3 files changed, 7 insertions(+), 5 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/brw_wm_surface_state.c
b/src/mesa/drivers/dri/i965/brw_wm_surface_state.c
index 099668e..0744cc0 100644
--- a/src/mesa/drivers/dri/i965/brw_wm_surface_state.c
+++ b/src/mesa/drivers/dri/i965/brw_wm_surface_state.c
@@ -1051,9 +1051,10 @@ brw_update_null_renderbuffer_surface(struct brw_context
*brw, unsigned int unit)
*/
static void
brw_update_renderbuffer_surface(struct brw_context *brw,
- struct gl_renderbuffer *rb,
+ struct gl_framebuffer *fb,
unsigned int unit)
{
+ struct gl_renderbuffer *rb = fb-_ColorDrawBuffers[unit];
struct intel_context *intel = brw-intel;
struct gl_context *ctx = intel-ctx;
struct intel_renderbuffer *irb = intel_renderbuffer(rb);
@@ -1196,7 +1197,7 @@ brw_update_renderbuffer_surfaces(struct brw_context *brw)
if (ctx-DrawBuffer-_NumColorDrawBuffers = 1) {
for (i = 0; i ctx-DrawBuffer-_NumColorDrawBuffers; i++) {
if (intel_renderbuffer(ctx-DrawBuffer-_ColorDrawBuffers[i])) {
- intel-vtbl.update_renderbuffer_surface(brw,
ctx-DrawBuffer-_ColorDrawBuffers[i], i);
+ intel-vtbl.update_renderbuffer_surface(brw, ctx-DrawBuffer, i);
} else {
intel-vtbl.update_null_renderbuffer_surface(brw, i);
}
diff --git a/src/mesa/drivers/dri/i965/gen7_wm_surface_state.c
b/src/mesa/drivers/dri/i965/gen7_wm_surface_state.c
index 62d2be8..4c127ab 100644
--- a/src/mesa/drivers/dri/i965/gen7_wm_surface_state.c
+++ b/src/mesa/drivers/dri/i965/gen7_wm_surface_state.c
@@ -457,9 +457,10 @@ gen7_update_null_renderbuffer_surface(struct brw_context
*brw, unsigned unit)
*/
static void
gen7_update_renderbuffer_surface(struct brw_context *brw,
-struct gl_renderbuffer *rb,
+struct gl_framebuffer *fb,
unsigned int unit)
{
+ struct gl_renderbuffer *rb = fb-_ColorDrawBuffers[unit];
struct intel_context *intel = brw-intel;
struct gl_context *ctx = intel-ctx;
struct intel_renderbuffer *irb = intel_renderbuffer(rb);
diff --git a/src/mesa/drivers/dri/intel/intel_context.h
b/src/mesa/drivers/dri/intel/intel_context.h
index 29ab187..d85f1be 100644
--- a/src/mesa/drivers/dri/intel/intel_context.h
+++ b/src/mesa/drivers/dri/intel/intel_context.h
@@ -191,8 +191,8 @@ struct intel_context
*/
void (*update_texture_surface)(struct gl_context *ctx, unsigned unit);
void (*update_renderbuffer_surface)(struct brw_context *brw,
- struct gl_renderbuffer *rb,
- unsigned unit);
+ struct gl_framebuffer *fb,
+ unsigned index);
void (*update_null_renderbuffer_surface)(struct brw_context *brw,
unsigned unit);
void (*create_constant_surface)(struct brw_context *brw,
--
1.7.10.4
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[Mesa-dev] [PATCH 3/3] i965: Flag ARGB8888 renderbuffers as sRGB capable and support it.
Fixes rendering in l4d2, which assumes sRGB capability without asking. We
could convince the app to ask for sRGB, except that we don't expose visuals
with sRGB currently. This gives the app the ability to choose sRGB rendering
on the typical visual, without having to coordinate with the layer of software
that's choosing the visual.
---
src/mesa/drivers/dri/i965/brw_wm_surface_state.c |8
src/mesa/drivers/dri/i965/gen7_wm_surface_state.c |8
src/mesa/drivers/dri/intel/intel_screen.c | 11 ++-
3 files changed, 26 insertions(+), 1 deletion(-)
diff --git a/src/mesa/drivers/dri/i965/brw_wm_surface_state.c
b/src/mesa/drivers/dri/i965/brw_wm_surface_state.c
index 0744cc0..1b1b513 100644
--- a/src/mesa/drivers/dri/i965/brw_wm_surface_state.c
+++ b/src/mesa/drivers/dri/i965/brw_wm_surface_state.c
@@ -1118,6 +1118,14 @@ brw_update_renderbuffer_surface(struct brw_context *brw,
else
format = BRW_SURFACEFORMAT_B8G8R8A8_UNORM;
break;
+
+ case MESA_FORMAT_ARGB:
+ if (fb-Visual.sRGBCapable ctx-Color.sRGBEnabled)
+format = BRW_SURFACEFORMAT_B8G8R8A8_UNORM_SRGB;
+ else
+format = BRW_SURFACEFORMAT_B8G8R8A8_UNORM;
+ break;
+
default:
format = brw-render_target_format[rb_format];
if (unlikely(!brw-format_supported_as_render_target[rb_format])) {
diff --git a/src/mesa/drivers/dri/i965/gen7_wm_surface_state.c
b/src/mesa/drivers/dri/i965/gen7_wm_surface_state.c
index 4c127ab..26fc24f 100644
--- a/src/mesa/drivers/dri/i965/gen7_wm_surface_state.c
+++ b/src/mesa/drivers/dri/i965/gen7_wm_surface_state.c
@@ -493,6 +493,14 @@ gen7_update_renderbuffer_surface(struct brw_context *brw,
else
surf-ss0.surface_format = BRW_SURFACEFORMAT_B8G8R8A8_UNORM;
break;
+
+ case MESA_FORMAT_ARGB:
+ if (fb-Visual.sRGBCapable ctx-Color.sRGBEnabled)
+surf-ss0.surface_format = BRW_SURFACEFORMAT_B8G8R8A8_UNORM_SRGB;
+ else
+surf-ss0.surface_format = BRW_SURFACEFORMAT_B8G8R8A8_UNORM;
+ break;
+
default:
assert(brw_render_target_supported(intel, rb));
surf-ss0.surface_format = brw-render_target_format[rb_format];
diff --git a/src/mesa/drivers/dri/intel/intel_screen.c
b/src/mesa/drivers/dri/intel/intel_screen.c
index e8a4ad1..49e0fb5 100644
--- a/src/mesa/drivers/dri/intel/intel_screen.c
+++ b/src/mesa/drivers/dri/intel/intel_screen.c
@@ -567,8 +567,17 @@ intelCreateBuffer(__DRIscreen * driScrnPriv,
rgbFormat = MESA_FORMAT_RGB565;
else if (mesaVis-alphaBits == 0)
rgbFormat = MESA_FORMAT_XRGB;
- else
+ else {
+ /* Allow sRGB rendering to this window, even without the app having
+ * requested an sRGB visual. Given that it's just a matter of
+ * flipping to MESA_FORMAT_SARGB8 when setting up the renderbuffer,
+ * there's little reason not to allow it.
+ *
+ * Otherwise, we'd have to make apps specifically request sRGB
visuals and
+ */
+ fb-Visual.sRGBCapable = true;
rgbFormat = MESA_FORMAT_ARGB;
+ }
/* setup the hardware-based renderbuffers */
rb = intel_create_renderbuffer(rgbFormat);
--
1.7.10.4
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[Mesa-dev] [Bug 52512] Build failures: glsl_lexer.cc glsl_parser.cc don't exist
https://bugs.freedesktop.org/show_bug.cgi?id=52512 --- Comment #4 from Darren Salt bugs...@moreofthesa.me.uk 2012-08-01 02:42:04 UTC --- More information. make[5]: *** No rule to make target `../../../../../src/mesa/libdricore/../../glsl/glsl_lexer.cc', needed by `glsl_lexer.lo'. Stop. make[5]: Leaving directory `/.../mesa/build/dri/src/mesa/libdricore' [...] $ find -name glsl_lexer.cc ./build/swx11+glu-static/src/glsl/glsl_lexer.cc ./build/dri/src/glsl/glsl_lexer.cc ./build/swx11+glu/src/glsl/glsl_lexer.cc $ I'd say that out-of-tree builds are currently broken. -- Configure bugmail: https://bugs.freedesktop.org/userprefs.cgi?tab=email --- You are receiving this mail because: --- You are the assignee for the bug. ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-dev
[Mesa-dev] [Bug 52512] Build failures: glsl_lexer.cc glsl_parser.cc don't exist
https://bugs.freedesktop.org/show_bug.cgi?id=52512 Matt Turner matts...@gmail.com changed: What|Removed |Added Status|NEW |RESOLVED Resolution||NOTABUG --- Comment #5 from Matt Turner matts...@gmail.com 2012-08-01 04:51:12 UTC --- (In reply to comment #4) More information. make[5]: *** No rule to make target `../../../../../src/mesa/libdricore/../../glsl/glsl_lexer.cc', needed by `glsl_lexer.lo'. Stop. make[5]: Leaving directory `/.../mesa/build/dri/src/mesa/libdricore' [...] $ find -name glsl_lexer.cc ./build/swx11+glu-static/src/glsl/glsl_lexer.cc ./build/dri/src/glsl/glsl_lexer.cc ./build/swx11+glu/src/glsl/glsl_lexer.cc $ Run git clean -dfx and forget about it. I'd say that out-of-tree builds are currently broken. As in... has never worked. That's one of the reasons we're doing this whole automake thing. -- Configure bugmail: https://bugs.freedesktop.org/userprefs.cgi?tab=email --- You are receiving this mail because: --- You are the assignee for the bug. ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-dev
Re: [Mesa-dev] [PATCH 3/3] i965: Flag ARGB8888 renderbuffers as sRGB capable and support it.
On 07/31/2012 06:04 PM, Eric Anholt wrote:
Fixes rendering in l4d2, which assumes sRGB capability without asking. We
could convince the app to ask for sRGB, except that we don't expose visuals
with sRGB currently. This gives the app the ability to choose sRGB rendering
on the typical visual, without having to coordinate with the layer of software
that's choosing the visual.
---
src/mesa/drivers/dri/i965/brw_wm_surface_state.c |8
src/mesa/drivers/dri/i965/gen7_wm_surface_state.c |8
src/mesa/drivers/dri/intel/intel_screen.c | 11 ++-
3 files changed, 26 insertions(+), 1 deletion(-)
diff --git a/src/mesa/drivers/dri/i965/brw_wm_surface_state.c
b/src/mesa/drivers/dri/i965/brw_wm_surface_state.c
index 0744cc0..1b1b513 100644
--- a/src/mesa/drivers/dri/i965/brw_wm_surface_state.c
+++ b/src/mesa/drivers/dri/i965/brw_wm_surface_state.c
@@ -1118,6 +1118,14 @@ brw_update_renderbuffer_surface(struct brw_context
*brw,
else
format = BRW_SURFACEFORMAT_B8G8R8A8_UNORM;
break;
+
+ case MESA_FORMAT_ARGB:
+ if (fb-Visual.sRGBCapable ctx-Color.sRGBEnabled)
+ format = BRW_SURFACEFORMAT_B8G8R8A8_UNORM_SRGB;
+ else
+ format = BRW_SURFACEFORMAT_B8G8R8A8_UNORM;
+ break;
+
default:
format = brw-render_target_format[rb_format];
if (unlikely(!brw-format_supported_as_render_target[rb_format])) {
diff --git a/src/mesa/drivers/dri/i965/gen7_wm_surface_state.c
b/src/mesa/drivers/dri/i965/gen7_wm_surface_state.c
index 4c127ab..26fc24f 100644
--- a/src/mesa/drivers/dri/i965/gen7_wm_surface_state.c
+++ b/src/mesa/drivers/dri/i965/gen7_wm_surface_state.c
@@ -493,6 +493,14 @@ gen7_update_renderbuffer_surface(struct brw_context *brw,
else
surf-ss0.surface_format = BRW_SURFACEFORMAT_B8G8R8A8_UNORM;
break;
+
+ case MESA_FORMAT_ARGB:
+ if (fb-Visual.sRGBCapable ctx-Color.sRGBEnabled)
+ surf-ss0.surface_format = BRW_SURFACEFORMAT_B8G8R8A8_UNORM_SRGB;
+ else
+ surf-ss0.surface_format = BRW_SURFACEFORMAT_B8G8R8A8_UNORM;
+ break;
+
default:
assert(brw_render_target_supported(intel, rb));
surf-ss0.surface_format = brw-render_target_format[rb_format];
diff --git a/src/mesa/drivers/dri/intel/intel_screen.c
b/src/mesa/drivers/dri/intel/intel_screen.c
index e8a4ad1..49e0fb5 100644
--- a/src/mesa/drivers/dri/intel/intel_screen.c
+++ b/src/mesa/drivers/dri/intel/intel_screen.c
@@ -567,8 +567,17 @@ intelCreateBuffer(__DRIscreen * driScrnPriv,
rgbFormat = MESA_FORMAT_RGB565;
else if (mesaVis-alphaBits == 0)
rgbFormat = MESA_FORMAT_XRGB;
- else
+ else {
+ /* Allow sRGB rendering to this window, even without the app having
+ * requested an sRGB visual. Given that it's just a matter of
+ * flipping to MESA_FORMAT_SARGB8 when setting up the renderbuffer,
+ * there's little reason not to allow it.
+ *
+ * Otherwise, we'd have to make apps specifically request sRGB
visuals and
+ */
You should probably finish your thought here. Otherwise, this seems
sensible.
Patches 2 and 3 are:
Reviewed-by: Kenneth Graunke kenn...@whitecape.org
It'd be nice to see acks from some other folks though.
+ fb-Visual.sRGBCapable = true;
rgbFormat = MESA_FORMAT_ARGB;
+ }
/* setup the hardware-based renderbuffers */
rb = intel_create_renderbuffer(rgbFormat);
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