Re: [Mesa-dev] [PATCH 0/6] Initial no-op implementation of `precise`

2014-06-03 Thread Jordan Justen
Based on the results of your piglit tests on NVidia, there might be
some follow up tweaks to this.

But, series Reviewed-by: Jordan Justen jordan.l.jus...@intel.com

On Sat, Apr 26, 2014 at 9:03 PM, Chris Forbes chr...@ijw.co.nz wrote:
 This series adds compiler support for the `precise` qualifier from
 ARB_gpu_shader5. The precise flag is propagated as far as the GLSL IR,
 but nothing further is done beyond that point.

 This was suggested by Ian as an acceptable initial approach until we
 have tesselation shaders (where possible geometry cracking makes actually
 honoring the `precise` qualifier important.)

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Re: [Mesa-dev] Mesa IR as a list of instructions

2014-06-03 Thread Erik Faye-Lund
On Fri, May 30, 2014 at 9:22 PM, Eric Anholt e...@anholt.net wrote:
 However, talking yesterday about SSA and vector representations, we
 again failed to come up with anything that sounded compelling -- it
 appears that SSA is going to make obvious optimizations like dead code
 elimination in a vec4 IR harder.  Ken and Matt pretty well convinced me
 that any new IR we work on should probably be scalar -- 965 is mostly
 scalar getting more so, my next project is scalar, and as far as I know
 current radeon and nouveau is scalar.

 Is anyone working on hardware with vector instructions these days?

Yes, the Tegra vertex shader ISA is NV30/40, which is vector. Also,
the Lima-guys might not be happy with a scalar-only ISA. Neither of
these are supported in Mesa today, but Freedreno supports Adreno 2xx,
Nouveau supports NV30/40, and there's the AMD R300 driver, all vector
hardware.
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Re: [Mesa-dev] [PATCH 1/4] vl: add more avc profiles

2014-06-03 Thread Christian König

Reviewed and pushed.

Thanks,
Christian.

Am 30.05.2014 21:57, schrieb Leo Liu:

Signed-off-by: Leo Liu leo@amd.com
---
  src/gallium/auxiliary/util/u_video.h | 4 
  src/gallium/include/pipe/p_video_enums.h | 6 +-
  2 files changed, 9 insertions(+), 1 deletion(-)

diff --git a/src/gallium/auxiliary/util/u_video.h 
b/src/gallium/auxiliary/util/u_video.h
index da65a58..d1ca736 100644
--- a/src/gallium/auxiliary/util/u_video.h
+++ b/src/gallium/auxiliary/util/u_video.h
@@ -60,7 +60,11 @@ u_reduce_video_profile(enum pipe_video_profile profile)
  
case PIPE_VIDEO_PROFILE_MPEG4_AVC_BASELINE:

case PIPE_VIDEO_PROFILE_MPEG4_AVC_MAIN:
+  case PIPE_VIDEO_PROFILE_MPEG4_AVC_EXTENDED:
case PIPE_VIDEO_PROFILE_MPEG4_AVC_HIGH:
+  case PIPE_VIDEO_PROFILE_MPEG4_AVC_HIGH10:
+  case PIPE_VIDEO_PROFILE_MPEG4_AVC_HIGH422:
+  case PIPE_VIDEO_PROFILE_MPEG4_AVC_HIGH444:
   return PIPE_VIDEO_FORMAT_MPEG4_AVC;
  
default:

diff --git a/src/gallium/include/pipe/p_video_enums.h 
b/src/gallium/include/pipe/p_video_enums.h
index 10205ac..e28d57d 100644
--- a/src/gallium/include/pipe/p_video_enums.h
+++ b/src/gallium/include/pipe/p_video_enums.h
@@ -50,7 +50,11 @@ enum pipe_video_profile
 PIPE_VIDEO_PROFILE_VC1_ADVANCED,
 PIPE_VIDEO_PROFILE_MPEG4_AVC_BASELINE,
 PIPE_VIDEO_PROFILE_MPEG4_AVC_MAIN,
-   PIPE_VIDEO_PROFILE_MPEG4_AVC_HIGH
+   PIPE_VIDEO_PROFILE_MPEG4_AVC_EXTENDED,
+   PIPE_VIDEO_PROFILE_MPEG4_AVC_HIGH,
+   PIPE_VIDEO_PROFILE_MPEG4_AVC_HIGH10,
+   PIPE_VIDEO_PROFILE_MPEG4_AVC_HIGH422,
+   PIPE_VIDEO_PROFILE_MPEG4_AVC_HIGH444
  };
  
  /* Video caps, can be different for each codec/profile */


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Re: [Mesa-dev] [PATCH 2/3] i965: Add runtime checks for line antialiasing in Gen 6.

2014-06-03 Thread Iago Toral
On Thu, 2014-05-29 at 08:31 -0700, Kenneth Graunke wrote:
(...)
  +  emit(IF(BRW_PREDICATE_NORMAL));
  +  {
  + /* Shift message header one register since we are not sending
  +  * AA data stored in base_mrf+2
  +  */
  + do_emit_fb_write(target, base_mrf + 1, mlen - 1, eot, 
  header_present);
  +  }
  +  emit(BRW_OPCODE_ELSE);
  +  {
  + do_emit_fb_write(target, base_mrf, mlen, eot, header_present);
  +  }
  +  emit(BRW_OPCODE_ENDIF);
 
  I suppose this probably works, but I've never seen a program end with an
  ENDIF.  I'm not really comfortable with doing that, since the ENDIF
  should never be executed.  With JMPI or ADD brw_ip_reg(), we'd just jump
  over one instruction and then execute one FB write or the other, which
  seems really straightforward.
 
  But, looking at the bug, I see you tried both of those suggestions, and
  it didn't work for some reason.  Huh.  It really should...maybe I can
  look into why...
  
  Right, I don't understand why that code did not work for me either. More
  over, the code did not work as I expected in other ways, for example I
  noticed that reverting the condition and the order of the fb_writes
  (which should be completely the same thing) changed the behavior too...
  I remember that it produced GPU hangs but I tried so many versions that
  I can't tell... it felt as if the two fb_writes were being executed.  I
  tried all kinds of things to make it work as intended, even including a
  manual JMPI at the end of the IF branch to force the jump over the
  second fb_write... but nothing.
  
  I commented about this and included the C code and the generated
  assembly for the JMPI version hoping that someone could tell if
  something was off here:
  
  http://lists.freedesktop.org/archives/mesa-dev/2014-May/059985.html
  
  Maybe you can have a quick look at that see if there is something
  obvious that I am missing...
 
 Yeah, I'll try and take a look...

I found what was going on with this. I have to manually set the
execution_size of the JMPI instruction to BRW_EXECUTE_1, that seems to
fix the problem.

  Also, when I was trying the JMPI version I was developing the patches in
  the generator rather than the visitor. I suppose that should not make
  any difference though.
  
  One last thing, JMPI was recently made private to the sf module, so if
  we want to do go with it we need to revert f3cb2e6ed705.
 
 It wasn't, actually - brw_JMPI is still available in brw_eu_emit.c.
 It's only brw_land_fwd_jump that moved to brw_sf_state.c, but all that
 does is set the jump distance on the JMPI instruction.  It seems like
 you know the jump distance when emitting the JMPI (jump over 1 FB write
 and maybe some MOVs) so you could just set it straightaway, and skip
 that function.  Or you could revert it - that'd be fine too.

Oh, right... I did not notice that.

Still, brw_land_fwd_jump() seems very convenient and safer to use than
relying on manual calculations for the jump distance (I think that would
be specially error prone if someone has to change the code at a later
point, since they have to know that they need to alter the jump distance
if they add/remove instructions that execute in the conditional) so I
think reverting is the best option.

Iago

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[Mesa-dev] [PATCH] r600g, radeonsi: implement PIPE_QUERY_TIMESTAMP_DISJOINT

2014-06-03 Thread Marek Olšák
From: David Heidelberger david.heidelber...@ixit.cz

v2 Marek: set the query result correctly

Signed-off-by: David Heidelberger david.heidelber...@ixit.cz
Signed-off-by: Marek Olšák marek.ol...@amd.com
---
 src/gallium/drivers/radeon/r600_query.c | 12 
 1 file changed, 12 insertions(+)

diff --git a/src/gallium/drivers/radeon/r600_query.c 
b/src/gallium/drivers/radeon/r600_query.c
index a356aad..c439441 100644
--- a/src/gallium/drivers/radeon/r600_query.c
+++ b/src/gallium/drivers/radeon/r600_query.c
@@ -116,6 +116,7 @@ static struct r600_resource *r600_new_query_buffer(struct 
r600_common_context *c
case PIPE_QUERY_GPU_FINISHED:
case PIPE_QUERY_TIME_ELAPSED:
case PIPE_QUERY_TIMESTAMP:
+   case PIPE_QUERY_TIMESTAMP_DISJOINT:
break;
case PIPE_QUERY_PRIMITIVES_EMITTED:
case PIPE_QUERY_PRIMITIVES_GENERATED:
@@ -209,6 +210,8 @@ static void r600_emit_query_begin(struct 
r600_common_context *ctx, struct r600_q
radeon_emit(cs, va);
radeon_emit(cs, (va  32UL)  0xFF);
break;
+   case PIPE_QUERY_TIMESTAMP_DISJOINT:
+   break;
default:
assert(0);
}
@@ -276,6 +279,7 @@ static void r600_emit_query_end(struct r600_common_context 
*ctx, struct r600_que
radeon_emit(cs, (va  32UL)  0xFF);
break;
 case PIPE_QUERY_GPU_FINISHED:
+case PIPE_QUERY_TIMESTAMP_DISJOINT:
break;
default:
assert(0);
@@ -371,6 +375,8 @@ static struct pipe_query *r600_create_query(struct 
pipe_context *ctx, unsigned q
query-result_size = 8;
query-num_cs_dw = 8;
break;
+   case PIPE_QUERY_TIMESTAMP_DISJOINT:
+   break;
case PIPE_QUERY_PRIMITIVES_EMITTED:
case PIPE_QUERY_PRIMITIVES_GENERATED:
case PIPE_QUERY_SO_STATISTICS:
@@ -606,6 +612,12 @@ static boolean r600_get_query_buffer_result(struct 
r600_common_context *ctx,
  (uint64_t)current_result[1]  32;
break;
}
+   case PIPE_QUERY_TIMESTAMP_DISJOINT:
+   /* Convert from cycles per millisecond to cycles per second 
(Hz). */
+   result-timestamp_disjoint.frequency =
+   (uint64_t)ctx-screen-info.r600_clock_crystal_freq * 
1000;
+   result-timestamp_disjoint.disjoint = FALSE;
+   break;
case PIPE_QUERY_PRIMITIVES_EMITTED:
/* SAMPLE_STREAMOUTSTATS stores this structure:
 * {
-- 
1.9.1

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Re: [Mesa-dev] [PATCH 2/3] radeon/compute: Implement PIPE_COMPUTE_CAP_MAX_COMPUTE_UNITS

2014-06-03 Thread Alex Deucher
On Mon, Jun 2, 2014 at 7:34 PM, Bruno Jimenez brunoji...@gmail.com wrote:
 On Mon, 2014-06-02 at 16:16 -0400, Alex Deucher wrote:
 On Sat, May 31, 2014 at 7:13 AM, Bruno Jimenez brunoji...@gmail.com wrote:
  On Fri, 2014-05-30 at 19:33 -0400, Alex Deucher wrote:
  On Fri, May 30, 2014 at 11:31 AM, Bruno Jiménez brunoji...@gmail.com 
  wrote:
   The data has been extracted from:
   AMD Accelerated Parallel Processing OpenCL Programming Guide (rev 2.7)
   Appendix D: Device Parameters
 
  You should add a query for the number of compute units to the
  RADEON_INFO ioctl and then just ask the kernel how many CUs/SIMDs the
  hw has.  This will properly handle all boards (harvest, etc.) since we
  can read the actual number of CUs off the GPU.
 
  Alex
 
  Hi,
 
  At first I tried to do so (as for the maximum clock frequency), but I
  couldn't find how to query that value, nor many docs about what I could
  ask the kernel for.
 
  I think I have found now the appropiate docs, and I will try again to
  query the kernel later.

 You'd need to add a new query.  It doesn't look like we expose this
 yet.  The attached untested patch should mostly do the trick.

 Alex


 Honestly, I would have never ever been able to come up with this. I
 tried quering for MAX_PIPES, MAX_SE and MAX_SH_PER_SE (only for SI), and
 multiplying them together. And it did work for my little CEDAR, but
 getting a 2 it's easy. And looking at what would return for other cards
 it didn't look so well.

 Should I try this patch on top of kernel 3.14.4? or should I use other
 version?

It was against Dave's drm-next, but it may apply to 3.14 as well.

Alex


 Thanks in advance and sorry for any inconvenience.
 Bruno


 
  Sorry for any inconvenience.
  Bruno
 
 
   ---
src/gallium/drivers/radeon/r600_pipe_common.c | 90 
   +++
1 file changed, 90 insertions(+)
  
   diff --git a/src/gallium/drivers/radeon/r600_pipe_common.c 
   b/src/gallium/drivers/radeon/r600_pipe_common.c
   index 70c4d1a..c4abacd 100644
   --- a/src/gallium/drivers/radeon/r600_pipe_common.c
   +++ b/src/gallium/drivers/radeon/r600_pipe_common.c
   @@ -422,6 +422,89 @@ const char *r600_get_llvm_processor_name(enum 
   radeon_family family)
   }
}
  
   +static uint32_t radeon_max_compute_units(enum radeon_family family)
   +{
   +   switch (family) {
   +   case CHIP_CEDAR:
   +   return 2;
   +
   +   /* Redwood PRO2: 4
   +* Redwood PRO:  5
   +* Redwood XT:   5 */
   +   case CHIP_REDWOOD:
   +   return 4;
   +
   +   /* Juniper LE:  9
   +* Juniper XT: 10 */
   +   case CHIP_JUNIPER:
   +   return 9;
   +
   +   /* Cypress LE:  14
   +* Cypress PRO: 18
   +* Cypress XT:  20 */
   +   case CHIP_CYPRESS:
   +   return 14;
   +
   +   case CHIP_HEMLOCK:
   +   return 40;
   +
   +   /* XXX: is Zacate really equal to Ontario?
   +* Zacate E-350: 2
   +* Zacate E-240: 2
   +* Ontario C-50: 2
   +* Ontario C-30: 2 */
   +   case CHIP_PALM:
   +   return 2;
   +
   +   /* Caicos:  2
   +* Seymour LP:  2
   +* Seymour PRO: 2
   +* Seymour XT:  2
   +* Seymour XTX: 2 */
   +   case CHIP_CAICOS:
   +   return 2;
   +
   +   /* Turks PRO:6
   +* Turks XT: 6
   +* Whistler LP:  6
   +* Whistler PRO: 6
   +* Whistler XT:  6 */
   +   case CHIP_TURKS:
   +   return 6;
   +
   +   /* Barts LE:  10
   +* Barts PRO: 12
   +* Barts XT:  14
   +* Blackcomb PRO: 12 */
   +   case CHIP_BARTS:
   +   return 10;
   +
   +   /* Cayman PRO: 22
   +* Cayman XT:  24
   +* Cayman Gemini: 48 */
   +   case CHIP_CAYMAN:
   +   return 22;
   +
   +   /* Verde PRO:  8
   +* Verde XT:  10 */
   +   case CHIP_VERDE:
   +   return 8;
   +
   +   /* Pitcairn PRO: 16
   +* Pitcairn XT:  20 */
   +   case CHIP_PITCAIRN:
   +   return 16;
   +
   +   /* Tahiti PRO: 28
   +* Tahiti XT:  32 */
   +   case CHIP_TAHITI:
   +   return 28;
   +
   +   default:
   +   return 1;
   +   }
   +}
   +
static int r600_get_compute_param(struct pipe_screen *screen,
enum pipe_compute_cap param,
void *ret)
   @@ -519,6 +602,13 @@ static int r600_get_compute_param(struct 
   pipe_screen *screen,
   }
   return sizeof(uint32_t);
  
   +   case PIPE_COMPUTE_CAP_MAX_COMPUTE_UNITS:
   +   if (ret) {
   +   uint32_t *max_compute_units = ret;
   +   *max_compute_units = 
   radeon_max_compute_units(rscreen-family);
   +   }
   +   return sizeof(uint32_t);
   +

[Mesa-dev] [PATCH 0/2] Build a driswrast-using libGL on non-DRM targets

2014-06-03 Thread Jon TURNEY
As a follow-up to my Fix Apple-DRI GLX patchset, allow building of a libGL 
capable of using driswrast on targets without libdrm, and make that the default 
configuration.

The --disable-driglx-direct option only appears to exist for the benefit of 
such 
targets, so it could probably be removed in future.

Jon TURNEY (2):
  glx: Fix build in GLX_DIRECT_RENDERING !GLX_USE_APPLEGL !GLX_USE_DRM
case
  configure: Always default to --enable-driglx-direct

 configure.ac  | 17 ++---
 src/glx/glxcmds.c |  2 +-
 src/glx/glxext.c  | 17 -
 3 files changed, 15 insertions(+), 21 deletions(-)

-- 
1.8.5.5

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[Mesa-dev] [PATCH 1/2] glx: Fix build in GLX_DIRECT_RENDERING !GLX_USE_APPLEGL !GLX_USE_DRM case

2014-06-03 Thread Jon TURNEY
Some untangling to fix building in the dri_platform=none, --enable-driglx-direct
case, where only driswast can be used.

Turn the test for including the glXGetScreenDriver()/glXGetScreenDriver()
interface used by xdriinfo from !GLX_USE_APPLEGL into a positive form, as it is
only useful when dri_platform=drm

Add additional GLX_USE_DRM tests so DRI[123] renderers are only used when
dri_platform=drm

Note that swrast and indirect must still be disabled in the APPLEGL case at the
moment, which makes things more complex than they need to be.  More untangling
is needed to allow that

Signed-off-by: Jon TURNEY jon.tur...@dronecode.org.uk
---
 configure.ac  |  1 +
 src/glx/glxcmds.c |  2 +-
 src/glx/glxext.c  | 17 -
 3 files changed, 14 insertions(+), 6 deletions(-)

diff --git a/configure.ac b/configure.ac
index 9c64400..d2adb15 100644
--- a/configure.ac
+++ b/configure.ac
@@ -939,6 +939,7 @@ xyesno)
 
 if test x$driglx_direct = xyes; then
 if test x$dri_platform = xdrm ; then
+DEFINES=$DEFINES -DGLX_USE_DRM
 if test x$have_libdrm != xyes; then
AC_MSG_ERROR([Direct rendering requires libdrm = 
$LIBDRM_REQUIRED])
 fi
diff --git a/src/glx/glxcmds.c b/src/glx/glxcmds.c
index c8de792..04d8db1 100644
--- a/src/glx/glxcmds.c
+++ b/src/glx/glxcmds.c
@@ -2581,7 +2581,7 @@ static const struct name_address_pair GLX_functions[] = {
GLX_FUNCTION2(glXReleaseTexImageEXT, __glXReleaseTexImageEXT),
 #endif
 
-#if defined(GLX_DIRECT_RENDERING)  !defined(GLX_USE_APPLEGL)
+#if defined(GLX_DIRECT_RENDERING)  defined(GLX_USE_DRM)
/*** DRI configuration ***/
GLX_FUNCTION(glXGetScreenDriver),
GLX_FUNCTION(glXGetDriverConfig),
diff --git a/src/glx/glxext.c b/src/glx/glxext.c
index 8528e88..94582f6 100644
--- a/src/glx/glxext.c
+++ b/src/glx/glxext.c
@@ -242,6 +242,7 @@ glx_display_free(struct glx_display *priv)
   (*priv-driswDisplay-destroyDisplay) (priv-driswDisplay);
priv-driswDisplay = NULL;
 
+#if defined (GLX_USE_DRM)
if (priv-driDisplay)
   (*priv-driDisplay-destroyDisplay) (priv-driDisplay);
priv-driDisplay = NULL;
@@ -253,7 +254,8 @@ glx_display_free(struct glx_display *priv)
if (priv-dri3Display)
   (*priv-dri3Display-destroyDisplay) (priv-dri3Display);
priv-dri3Display = NULL;
-#endif
+#endif /* GLX_USE_DRM */
+#endif /* GLX_DIRECT_RENDERING  !GLX_USE_APPLEGL */
 
free((char *) priv);
 }
@@ -779,17 +781,20 @@ AllocAndFetchScreenConfigs(Display * dpy, struct 
glx_display * priv)
for (i = 0; i  screens; i++, psc++) {
   psc = NULL;
 #if defined(GLX_DIRECT_RENDERING)  !defined(GLX_USE_APPLEGL)
+#if defined(GLX_USE_DRM)
 #if defined(HAVE_DRI3)
   if (priv-dri3Display)
  psc = (*priv-dri3Display-createScreen) (i, priv);
-#endif
+#endif /* HAVE_DRI3 */
   if (psc == NULL  priv-dri2Display)
 psc = (*priv-dri2Display-createScreen) (i, priv);
   if (psc == NULL  priv-driDisplay)
 psc = (*priv-driDisplay-createScreen) (i, priv);
+#endif /* GLX_USE_DRM */
   if (psc == NULL  priv-driswDisplay)
 psc = (*priv-driswDisplay-createScreen) (i, priv);
-#endif
+#endif /* GLX_DIRECT_RENDERING  !GLX_USE_APPLEGL */
+
 #if defined(GLX_USE_APPLEGL)
   if (psc == NULL)
  psc = applegl_create_screen(i, priv);
@@ -873,17 +878,19 @@ __glXInitialize(Display * dpy)
 ** Note: This _must_ be done before calling any other DRI routines
 ** (e.g., those called in AllocAndFetchScreenConfigs).
 */
+#if defined(GLX_USE_DRM)
if (glx_direct  glx_accel) {
 #if defined(HAVE_DRI3)
   if (!getenv(LIBGL_DRI3_DISABLE))
  dpyPriv-dri3Display = dri3_create_display(dpy);
-#endif
+#endif /* HAVE_DRI3 */
   dpyPriv-dri2Display = dri2CreateDisplay(dpy);
   dpyPriv-driDisplay = driCreateDisplay(dpy);
}
+#endif /* GLX_USE_DRM */
if (glx_direct)
   dpyPriv-driswDisplay = driswCreateDisplay(dpy);
-#endif
+#endif /* GLX_DIRECT_RENDERING  !GLX_USE_APPLEGL */
 
 #ifdef GLX_USE_APPLEGL
if (!applegl_create_display(dpyPriv)) {
-- 
1.8.5.5

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[Mesa-dev] [PATCH 2/2] configure: Always default to --enable-driglx-direct

2014-06-03 Thread Jon TURNEY
Always default to --enable-driglx-direct, now that will build driswrast, but
won't try to use dri[123] on platforms which don't have that.

Signed-off-by: Jon TURNEY jon.tur...@dronecode.org.uk
---
 configure.ac | 16 +---
 1 file changed, 1 insertion(+), 15 deletions(-)

diff --git a/configure.ac b/configure.ac
index d2adb15..af081b5 100644
--- a/configure.ac
+++ b/configure.ac
@@ -896,26 +896,12 @@ if test x$enable_dri = xyes; then
 fi
 fi
 
-dnl Direct rendering or just indirect rendering
-case $host_os in
-gnu*)
-dnl Disable by default on GNU/Hurd
-driglx_direct_default=no
-;;
-cygwin*)
-dnl Disable by default on cygwin
-driglx_direct_default=no
-;;
-*)
-driglx_direct_default=yes
-;;
-esac
 AC_ARG_ENABLE([driglx-direct],
 [AS_HELP_STRING([--disable-driglx-direct],
 [disable direct rendering in GLX and EGL for DRI \
 @:@default=auto@:@])],
 [driglx_direct=$enableval],
-[driglx_direct=$driglx_direct_default])
+[driglx_direct=yes])
 
 dnl
 dnl libGL configuration per driver
-- 
1.8.5.5

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Re: [Mesa-dev] [PATCH 1/2] glx: Fix build in GLX_DIRECT_RENDERING !GLX_USE_APPLEGL !GLX_USE_DRM case

2014-06-03 Thread Aaron Watry
On Tue, Jun 3, 2014 at 8:14 AM, Jon TURNEY jon.tur...@dronecode.org.uk wrote:
 Some untangling to fix building in the dri_platform=none, 
 --enable-driglx-direct
 case, where only driswast can be used.

 Turn the test for including the glXGetScreenDriver()/glXGetScreenDriver()
 interface used by xdriinfo from !GLX_USE_APPLEGL into a positive form, as it 
 is
 only useful when dri_platform=drm

 Add additional GLX_USE_DRM tests so DRI[123] renderers are only used when
 dri_platform=drm

 Note that swrast and indirect must still be disabled in the APPLEGL case at 
 the
 moment, which makes things more complex than they need to be.  More untangling
 is needed to allow that

 Signed-off-by: Jon TURNEY jon.tur...@dronecode.org.uk
 ---
  configure.ac  |  1 +
  src/glx/glxcmds.c |  2 +-
  src/glx/glxext.c  | 17 -
  3 files changed, 14 insertions(+), 6 deletions(-)

 diff --git a/configure.ac b/configure.ac
 index 9c64400..d2adb15 100644
 --- a/configure.ac
 +++ b/configure.ac
 @@ -939,6 +939,7 @@ xyesno)

  if test x$driglx_direct = xyes; then
  if test x$dri_platform = xdrm ; then
 +DEFINES=$DEFINES -DGLX_USE_DRM
  if test x$have_libdrm != xyes; then
 AC_MSG_ERROR([Direct rendering requires libdrm = 
 $LIBDRM_REQUIRED])
  fi
 diff --git a/src/glx/glxcmds.c b/src/glx/glxcmds.c
 index c8de792..04d8db1 100644
 --- a/src/glx/glxcmds.c
 +++ b/src/glx/glxcmds.c
 @@ -2581,7 +2581,7 @@ static const struct name_address_pair GLX_functions[] = 
 {
 GLX_FUNCTION2(glXReleaseTexImageEXT, __glXReleaseTexImageEXT),
  #endif

 -#if defined(GLX_DIRECT_RENDERING)  !defined(GLX_USE_APPLEGL)
 +#if defined(GLX_DIRECT_RENDERING)  defined(GLX_USE_DRM)
 /*** DRI configuration ***/
 GLX_FUNCTION(glXGetScreenDriver),
 GLX_FUNCTION(glXGetDriverConfig),
 diff --git a/src/glx/glxext.c b/src/glx/glxext.c
 index 8528e88..94582f6 100644
 --- a/src/glx/glxext.c
 +++ b/src/glx/glxext.c
 @@ -242,6 +242,7 @@ glx_display_free(struct glx_display *priv)
(*priv-driswDisplay-destroyDisplay) (priv-driswDisplay);
 priv-driswDisplay = NULL;

 +#if defined (GLX_USE_DRM)
 if (priv-driDisplay)
(*priv-driDisplay-destroyDisplay) (priv-driDisplay);
 priv-driDisplay = NULL;
 @@ -253,7 +254,8 @@ glx_display_free(struct glx_display *priv)
 if (priv-dri3Display)
(*priv-dri3Display-destroyDisplay) (priv-dri3Display);
 priv-dri3Display = NULL;
 -#endif
 +#endif /* GLX_USE_DRM */
 +#endif /* GLX_DIRECT_RENDERING  !GLX_USE_APPLEGL */

I'm assuming that you meant GLX_DIRECT_RENDERING  GLX_USE_DRM,
right?  The other #endif comment changes in the patch look correct,
but this one seems wrong.

--Aaron


 free((char *) priv);
  }
 @@ -779,17 +781,20 @@ AllocAndFetchScreenConfigs(Display * dpy, struct 
 glx_display * priv)
 for (i = 0; i  screens; i++, psc++) {
psc = NULL;
  #if defined(GLX_DIRECT_RENDERING)  !defined(GLX_USE_APPLEGL)
 +#if defined(GLX_USE_DRM)
  #if defined(HAVE_DRI3)
if (priv-dri3Display)
   psc = (*priv-dri3Display-createScreen) (i, priv);
 -#endif
 +#endif /* HAVE_DRI3 */
if (psc == NULL  priv-dri2Display)
  psc = (*priv-dri2Display-createScreen) (i, priv);
if (psc == NULL  priv-driDisplay)
  psc = (*priv-driDisplay-createScreen) (i, priv);
 +#endif /* GLX_USE_DRM */
if (psc == NULL  priv-driswDisplay)
  psc = (*priv-driswDisplay-createScreen) (i, priv);
 -#endif
 +#endif /* GLX_DIRECT_RENDERING  !GLX_USE_APPLEGL */
 +
  #if defined(GLX_USE_APPLEGL)
if (psc == NULL)
   psc = applegl_create_screen(i, priv);
 @@ -873,17 +878,19 @@ __glXInitialize(Display * dpy)
  ** Note: This _must_ be done before calling any other DRI routines
  ** (e.g., those called in AllocAndFetchScreenConfigs).
  */
 +#if defined(GLX_USE_DRM)
 if (glx_direct  glx_accel) {
  #if defined(HAVE_DRI3)
if (!getenv(LIBGL_DRI3_DISABLE))
   dpyPriv-dri3Display = dri3_create_display(dpy);
 -#endif
 +#endif /* HAVE_DRI3 */
dpyPriv-dri2Display = dri2CreateDisplay(dpy);
dpyPriv-driDisplay = driCreateDisplay(dpy);
 }
 +#endif /* GLX_USE_DRM */
 if (glx_direct)
dpyPriv-driswDisplay = driswCreateDisplay(dpy);
 -#endif
 +#endif /* GLX_DIRECT_RENDERING  !GLX_USE_APPLEGL */

  #ifdef GLX_USE_APPLEGL
 if (!applegl_create_display(dpyPriv)) {
 --
 1.8.5.5

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Re: [Mesa-dev] [PATCH 1/2] glx: Fix build in GLX_DIRECT_RENDERING !GLX_USE_APPLEGL !GLX_USE_DRM case

2014-06-03 Thread Jon TURNEY

On 03/06/2014 15:19, Aaron Watry wrote:

On Tue, Jun 3, 2014 at 8:14 AM, Jon TURNEY jon.tur...@dronecode.org.uk wrote:

Some untangling to fix building in the dri_platform=none, --enable-driglx-direct
case, where only driswast can be used.

Turn the test for including the glXGetScreenDriver()/glXGetScreenDriver()
interface used by xdriinfo from !GLX_USE_APPLEGL into a positive form, as it is
only useful when dri_platform=drm

Add additional GLX_USE_DRM tests so DRI[123] renderers are only used when
dri_platform=drm

Note that swrast and indirect must still be disabled in the APPLEGL case at the
moment, which makes things more complex than they need to be.  More untangling
is needed to allow that

--- a/src/glx/glxext.c
+++ b/src/glx/glxext.c
@@ -242,6 +242,7 @@ glx_display_free(struct glx_display *priv)
(*priv-driswDisplay-destroyDisplay) (priv-driswDisplay);
 priv-driswDisplay = NULL;

+#if defined (GLX_USE_DRM)
 if (priv-driDisplay)
(*priv-driDisplay-destroyDisplay) (priv-driDisplay);
 priv-driDisplay = NULL;
@@ -253,7 +254,8 @@ glx_display_free(struct glx_display *priv)
 if (priv-dri3Display)
(*priv-dri3Display-destroyDisplay) (priv-dri3Display);
 priv-dri3Display = NULL;
-#endif
+#endif /* GLX_USE_DRM */
+#endif /* GLX_DIRECT_RENDERING  !GLX_USE_APPLEGL */


I'm assuming that you meant GLX_DIRECT_RENDERING  GLX_USE_DRM,
right?  The other #endif comment changes in the patch look correct,
but this one seems wrong.


I think this endif comment matches the '#if 
defined(GLX_DIRECT_RENDERING)  !defined(GLX_USE_APPLEGL)' at line 237.


It would perhaps be more logical if that was just '#ifdef 
GLX_DIRECT_RENDERING', but the applegl renderer can't be used with any 
of the others, at the moment.


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Re: [Mesa-dev] [PATCH 0/2] Build a driswrast-using libGL on non-DRM targets

2014-06-03 Thread Emil Velikov
On 03/06/14 14:14, Jon TURNEY wrote:
 As a follow-up to my Fix Apple-DRI GLX patchset, allow building of a libGL 
 capable of using driswrast on targets without libdrm, and make that the 
 default 
 configuration.
 
 The --disable-driglx-direct option only appears to exist for the benefit of 
 such 
 targets, so it could probably be removed in future.
 
IIRC people that build non-dri glx(libGL) i.e. --enable-xlib-glx normally set
--disable-driglx-direct as well. Not sure if they will be affected by your
patches though. I will take a closer look over the weekend, unless you beat me
to it.

-Emil

 Jon TURNEY (2):
   glx: Fix build in GLX_DIRECT_RENDERING !GLX_USE_APPLEGL !GLX_USE_DRM
 case
   configure: Always default to --enable-driglx-direct
 
  configure.ac  | 17 ++---
  src/glx/glxcmds.c |  2 +-
  src/glx/glxext.c  | 17 -
  3 files changed, 15 insertions(+), 21 deletions(-)
 

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Re: [Mesa-dev] [PATCH 2/2] configure: Always default to --enable-driglx-direct

2014-06-03 Thread Matt Turner
On Tue, Jun 3, 2014 at 6:14 AM, Jon TURNEY jon.tur...@dronecode.org.uk wrote:
 Always default to --enable-driglx-direct, now that will build driswrast, but
 won't try to use dri[123] on platforms which don't have that.

 Signed-off-by: Jon TURNEY jon.tur...@dronecode.org.uk
 ---
  configure.ac | 16 +---

Looks good to me.

Reviewed-by: Matt Turner matts...@gmail.com
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[Mesa-dev] [PATCH] wgl: Disable CRT message boxes when Windows system error messages boxes are disabled.

2014-06-03 Thread jfonseca
From: José Fonseca jfons...@vmware.com

At least on MSVC we statically link against the CRT, so we must disable
the CRT message boxes if we want to attended testing.

The messages are convenient when running manually, so let them be if the
system error message boxes are not disabled.
---
 src/gallium/auxiliary/util/u_debug.c| 32 +
 src/gallium/auxiliary/util/u_debug.h|  9 
 src/gallium/state_trackers/wgl/stw_device.c |  2 ++
 3 files changed, 43 insertions(+)

diff --git a/src/gallium/auxiliary/util/u_debug.c 
b/src/gallium/auxiliary/util/u_debug.c
index dc840e8..d79f31e 100644
--- a/src/gallium/auxiliary/util/u_debug.c
+++ b/src/gallium/auxiliary/util/u_debug.c
@@ -46,6 +46,12 @@
 #include limits.h /* CHAR_BIT */
 #include ctype.h /* isalnum */
 
+#ifdef _WIN32
+#include windows.h
+#include stdlib.h
+#endif
+
+
 void _debug_vprintf(const char *format, va_list ap)
 {
static char buf[4096] = {'\0'};
@@ -64,6 +70,32 @@ void _debug_vprintf(const char *format, va_list ap)
 }
 
 
+void
+debug_disable_error_message_boxes(void)
+{
+#ifdef _WIN32
+   /* When Windows' error message boxes are disabled for this process (as is
+* typically the case when running tests in an automated fashion) we disable
+* CRT message boxes too.
+*/
+   UINT uMode = SetErrorMode(0);
+   SetErrorMode(uMode);
+   if (uMode  SEM_FAILCRITICALERRORS) {
+  /* Disable assertion failure message box.
+   * http://msdn.microsoft.com/en-us/library/sas1dkb2.aspx
+   */
+  _set_error_mode(_OUT_TO_STDERR);
+#ifdef _MSC_VER
+  /* Disable abort message box.
+   * http://msdn.microsoft.com/en-us/library/e631wekh.aspx
+   */
+  _set_abort_behavior(0, _WRITE_ABORT_MSG | _CALL_REPORTFAULT);
+#endif
+   }
+#endif /* _WIN32 */
+}
+
+
 #ifdef DEBUG
 void debug_print_blob( const char *name,
const void *blob,
diff --git a/src/gallium/auxiliary/util/u_debug.h 
b/src/gallium/auxiliary/util/u_debug.h
index 9c41421..badd5e2 100644
--- a/src/gallium/auxiliary/util/u_debug.h
+++ b/src/gallium/auxiliary/util/u_debug.h
@@ -139,6 +139,15 @@ void debug_print_format(const char *msg, unsigned fmt );
 
 
 /**
+ * Disable interactive error message boxes.
+ *
+ * Should be called as soon as possible for effectiveness.
+ */
+void
+debug_disable_error_message_boxes(void);
+
+
+/**
  * Hard-coded breakpoint.
  */
 #ifdef DEBUG
diff --git a/src/gallium/state_trackers/wgl/stw_device.c 
b/src/gallium/state_trackers/wgl/stw_device.c
index 8f2cf9c..025dbdc 100644
--- a/src/gallium/state_trackers/wgl/stw_device.c
+++ b/src/gallium/state_trackers/wgl/stw_device.c
@@ -69,6 +69,8 @@ stw_init(const struct stw_winsys *stw_winsys)
static struct stw_device stw_dev_storage;
struct pipe_screen *screen;
 
+   debug_disable_error_message_boxes();
+
debug_printf(%s\n, __FUNCTION__);

assert(!stw_dev);
-- 
1.9.1

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Re: [Mesa-dev] [PATCH] wgl: Disable CRT message boxes when Windows system error messages boxes are disabled.

2014-06-03 Thread Jose Fonseca
- Original Message -
 From: José Fonseca jfons...@vmware.com
 
 At least on MSVC we statically link against the CRT, so we must disable
 the CRT message boxes if we want to attended testing.

oops: to attended - unattended

Jose

 
 The messages are convenient when running manually, so let them be if the
 system error message boxes are not disabled.
 ---
  src/gallium/auxiliary/util/u_debug.c| 32
  +
  src/gallium/auxiliary/util/u_debug.h|  9 
  src/gallium/state_trackers/wgl/stw_device.c |  2 ++
  3 files changed, 43 insertions(+)
 
 diff --git a/src/gallium/auxiliary/util/u_debug.c
 b/src/gallium/auxiliary/util/u_debug.c
 index dc840e8..d79f31e 100644
 --- a/src/gallium/auxiliary/util/u_debug.c
 +++ b/src/gallium/auxiliary/util/u_debug.c
 @@ -46,6 +46,12 @@
  #include limits.h /* CHAR_BIT */
  #include ctype.h /* isalnum */
  
 +#ifdef _WIN32
 +#include windows.h
 +#include stdlib.h
 +#endif
 +
 +
  void _debug_vprintf(const char *format, va_list ap)
  {
 static char buf[4096] = {'\0'};
 @@ -64,6 +70,32 @@ void _debug_vprintf(const char *format, va_list ap)
  }
  
  
 +void
 +debug_disable_error_message_boxes(void)
 +{
 +#ifdef _WIN32
 +   /* When Windows' error message boxes are disabled for this process (as is
 +* typically the case when running tests in an automated fashion) we
 disable
 +* CRT message boxes too.
 +*/
 +   UINT uMode = SetErrorMode(0);
 +   SetErrorMode(uMode);
 +   if (uMode  SEM_FAILCRITICALERRORS) {
 +  /* Disable assertion failure message box.
 +   * http://msdn.microsoft.com/en-us/library/sas1dkb2.aspx
 +   */
 +  _set_error_mode(_OUT_TO_STDERR);
 +#ifdef _MSC_VER
 +  /* Disable abort message box.
 +   * http://msdn.microsoft.com/en-us/library/e631wekh.aspx
 +   */
 +  _set_abort_behavior(0, _WRITE_ABORT_MSG | _CALL_REPORTFAULT);
 +#endif
 +   }
 +#endif /* _WIN32 */
 +}
 +
 +
  #ifdef DEBUG
  void debug_print_blob( const char *name,
 const void *blob,
 diff --git a/src/gallium/auxiliary/util/u_debug.h
 b/src/gallium/auxiliary/util/u_debug.h
 index 9c41421..badd5e2 100644
 --- a/src/gallium/auxiliary/util/u_debug.h
 +++ b/src/gallium/auxiliary/util/u_debug.h
 @@ -139,6 +139,15 @@ void debug_print_format(const char *msg, unsigned fmt );
  
  
  /**
 + * Disable interactive error message boxes.
 + *
 + * Should be called as soon as possible for effectiveness.
 + */
 +void
 +debug_disable_error_message_boxes(void);
 +
 +
 +/**
   * Hard-coded breakpoint.
   */
  #ifdef DEBUG
 diff --git a/src/gallium/state_trackers/wgl/stw_device.c
 b/src/gallium/state_trackers/wgl/stw_device.c
 index 8f2cf9c..025dbdc 100644
 --- a/src/gallium/state_trackers/wgl/stw_device.c
 +++ b/src/gallium/state_trackers/wgl/stw_device.c
 @@ -69,6 +69,8 @@ stw_init(const struct stw_winsys *stw_winsys)
 static struct stw_device stw_dev_storage;
 struct pipe_screen *screen;
  
 +   debug_disable_error_message_boxes();
 +
 debug_printf(%s\n, __FUNCTION__);
 
 assert(!stw_dev);
 --
 1.9.1
 
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Re: [Mesa-dev] [PATCH] wgl: Disable CRT message boxes when Windows system error messages boxes are disabled.

2014-06-03 Thread Brian Paul
I might replace boxes with dialogs but it's not a big deal.  I guess 
the same comment would apply to the piglit patch.


Reviewed-by: Brian Paul bri...@vmware.com


On 06/03/2014 11:27 AM, jfons...@vmware.com wrote:

From: José Fonseca jfons...@vmware.com

At least on MSVC we statically link against the CRT, so we must disable
the CRT message boxes if we want to attended testing.

The messages are convenient when running manually, so let them be if the
system error message boxes are not disabled.
---
  src/gallium/auxiliary/util/u_debug.c| 32 +
  src/gallium/auxiliary/util/u_debug.h|  9 
  src/gallium/state_trackers/wgl/stw_device.c |  2 ++
  3 files changed, 43 insertions(+)

diff --git a/src/gallium/auxiliary/util/u_debug.c 
b/src/gallium/auxiliary/util/u_debug.c
index dc840e8..d79f31e 100644
--- a/src/gallium/auxiliary/util/u_debug.c
+++ b/src/gallium/auxiliary/util/u_debug.c
@@ -46,6 +46,12 @@
  #include limits.h /* CHAR_BIT */
  #include ctype.h /* isalnum */

+#ifdef _WIN32
+#include windows.h
+#include stdlib.h
+#endif
+
+
  void _debug_vprintf(const char *format, va_list ap)
  {
 static char buf[4096] = {'\0'};
@@ -64,6 +70,32 @@ void _debug_vprintf(const char *format, va_list ap)
  }


+void
+debug_disable_error_message_boxes(void)
+{
+#ifdef _WIN32
+   /* When Windows' error message boxes are disabled for this process (as is
+* typically the case when running tests in an automated fashion) we disable
+* CRT message boxes too.
+*/
+   UINT uMode = SetErrorMode(0);
+   SetErrorMode(uMode);
+   if (uMode  SEM_FAILCRITICALERRORS) {
+  /* Disable assertion failure message box.
+   * http://msdn.microsoft.com/en-us/library/sas1dkb2.aspx
+   */
+  _set_error_mode(_OUT_TO_STDERR);
+#ifdef _MSC_VER
+  /* Disable abort message box.
+   * http://msdn.microsoft.com/en-us/library/e631wekh.aspx
+   */
+  _set_abort_behavior(0, _WRITE_ABORT_MSG | _CALL_REPORTFAULT);
+#endif
+   }
+#endif /* _WIN32 */
+}
+
+
  #ifdef DEBUG
  void debug_print_blob( const char *name,
 const void *blob,
diff --git a/src/gallium/auxiliary/util/u_debug.h 
b/src/gallium/auxiliary/util/u_debug.h
index 9c41421..badd5e2 100644
--- a/src/gallium/auxiliary/util/u_debug.h
+++ b/src/gallium/auxiliary/util/u_debug.h
@@ -139,6 +139,15 @@ void debug_print_format(const char *msg, unsigned fmt );


  /**
+ * Disable interactive error message boxes.
+ *
+ * Should be called as soon as possible for effectiveness.
+ */
+void
+debug_disable_error_message_boxes(void);
+
+
+/**
   * Hard-coded breakpoint.
   */
  #ifdef DEBUG
diff --git a/src/gallium/state_trackers/wgl/stw_device.c 
b/src/gallium/state_trackers/wgl/stw_device.c
index 8f2cf9c..025dbdc 100644
--- a/src/gallium/state_trackers/wgl/stw_device.c
+++ b/src/gallium/state_trackers/wgl/stw_device.c
@@ -69,6 +69,8 @@ stw_init(const struct stw_winsys *stw_winsys)
 static struct stw_device stw_dev_storage;
 struct pipe_screen *screen;

+   debug_disable_error_message_boxes();
+
 debug_printf(%s\n, __FUNCTION__);

 assert(!stw_dev);



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[Mesa-dev] [PATCH v2 0/4] Constant folding of new Instructions

2014-06-03 Thread Tobias Klausmann
And another try for constant folding of Instructions for nvc0.

Please Review this!

Thanks,
Tobias Klausmann

Tobias Klausmann (4):
  nvc0/ir: clear subop when folding constant expressions
  nvc0/ir: Handle reverse subop for OP_EXTBF when folding constant
expressions
  nvc0/ir: Handle OP_BFIND when folding constant expressions
  nvc0/ir: Handle OP_POPCNT when folding constant expressions

 .../drivers/nouveau/codegen/nv50_ir_peephole.cpp   | 50 +-
 1 file changed, 48 insertions(+), 2 deletions(-)

-- 
1.8.4.5

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[Mesa-dev] [PATCH v2 1/4] nvc0/ir: clear subop when folding constant expressions

2014-06-03 Thread Tobias Klausmann
Some operations (e.g. OP_MUL/OP_MAD/OP_EXTBF might have a subop set.
After folding, make sure that it is cleared

Signed-off-by: Tobias Klausmann tobias.johannes.klausm...@mni.thm.de
---
 src/gallium/drivers/nouveau/codegen/nv50_ir_peephole.cpp | 1 +
 1 file changed, 1 insertion(+)

diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_peephole.cpp 
b/src/gallium/drivers/nouveau/codegen/nv50_ir_peephole.cpp
index 1a2c2e6..58092f4 100644
--- a/src/gallium/drivers/nouveau/codegen/nv50_ir_peephole.cpp
+++ b/src/gallium/drivers/nouveau/codegen/nv50_ir_peephole.cpp
@@ -563,6 +563,7 @@ ConstantFolding::expr(Instruction *i,
} else {
   i-op = i-saturate ? OP_SAT : OP_MOV; /* SAT handled by unary() */
}
+   i-subOp = 0;
 }
 
 void
-- 
1.8.4.5

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[Mesa-dev] [PATCH v2 3/4] nvc0/ir: Handle OP_BFIND when folding constant expressions

2014-06-03 Thread Tobias Klausmann
Signed-off-by: Tobias Klausmann tobias.johannes.klausm...@mni.thm.de
---
 .../drivers/nouveau/codegen/nv50_ir_peephole.cpp   | 18 ++
 1 file changed, 18 insertions(+)

diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_peephole.cpp 
b/src/gallium/drivers/nouveau/codegen/nv50_ir_peephole.cpp
index a214ffc..c497335 100644
--- a/src/gallium/drivers/nouveau/codegen/nv50_ir_peephole.cpp
+++ b/src/gallium/drivers/nouveau/codegen/nv50_ir_peephole.cpp
@@ -948,6 +948,24 @@ ConstantFolding::opnd(Instruction *i, ImmediateValue 
imm0, int s)
case OP_EX2:
   unary(i, imm0);
   break;
+   case OP_BFIND: {
+  int32_t res;
+  switch (i-dType) {
+  case TYPE_S32:
+ res = util_last_bit_signed(imm0.reg.data.s32) - 1; break;
+  case TYPE_U32:
+ res = util_last_bit(imm0.reg.data.u32) -1; break;
+  default:
+ return;
+  }
+  if ((i-subOp ==  NV50_IR_SUBOP_BFIND_SAMT)  (res = 0))
+ res = 31 - res;
+  i-setSrc(0, new_ImmediateValue(i-bb-getProgram(), (uint32_t)res));
+  i-setSrc(1, NULL);
+  i-op = OP_MOV;
+  i-subOp = 0;
+  break;
+   }
default:
   return;
}
-- 
1.8.4.5

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[Mesa-dev] [PATCH v2 4/4] nvc0/ir: Handle OP_POPCNT when folding constant expressions

2014-06-03 Thread Tobias Klausmann
V2: Add support for a single-argument version of POPCNT for Maxwell (SM5)

Signed-off-by: Tobias Klausmann tobias.johannes.klausm...@mni.thm.de
---
 src/gallium/drivers/nouveau/codegen/nv50_ir_peephole.cpp | 15 +++
 1 file changed, 15 insertions(+)

diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_peephole.cpp 
b/src/gallium/drivers/nouveau/codegen/nv50_ir_peephole.cpp
index c497335..19767b4 100644
--- a/src/gallium/drivers/nouveau/codegen/nv50_ir_peephole.cpp
+++ b/src/gallium/drivers/nouveau/codegen/nv50_ir_peephole.cpp
@@ -548,6 +548,10 @@ ConstantFolding::expr(Instruction *i,
   }
   break;
}
+   case OP_POPCNT: {
+ res.data.u32 = util_bitcount(a-data.u32  b-data.u32); break;
+  break;
+   }
default:
   return;
}
@@ -966,6 +970,17 @@ ConstantFolding::opnd(Instruction *i, ImmediateValue 
imm0, int s)
   i-subOp = 0;
   break;
}
+   case OP_POPCNT: {
+  uint32_t res;
+  if (!i-srcExists(1)) {
+ res = util_bitcount(imm0.reg.data.u32);
+ i-setSrc(0, new_ImmediateValue(i-bb-getProgram(), res));
+ i-setSrc(1, NULL);
+ i-op = OP_MOV;
+ i-subOp = 0;
+  }
+  break;
+   }
default:
   return;
}
-- 
1.8.4.5

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[Mesa-dev] [PATCH v2 2/4] nvc0/ir: Handle reverse subop for OP_EXTBF when folding constant expressions

2014-06-03 Thread Tobias Klausmann
V2: Handle the instruction right (shift after reverse)

Signed-off-by: Tobias Klausmann tobias.johannes.klausm...@mni.thm.de
---
 src/gallium/drivers/nouveau/codegen/nv50_ir_peephole.cpp | 16 ++--
 1 file changed, 14 insertions(+), 2 deletions(-)

diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_peephole.cpp 
b/src/gallium/drivers/nouveau/codegen/nv50_ir_peephole.cpp
index 58092f4..a214ffc 100644
--- a/src/gallium/drivers/nouveau/codegen/nv50_ir_peephole.cpp
+++ b/src/gallium/drivers/nouveau/codegen/nv50_ir_peephole.cpp
@@ -529,8 +529,20 @@ ConstantFolding::expr(Instruction *i,
  lshift = 32 - width - offset;
   }
   switch (i-dType) {
-  case TYPE_S32: res.data.s32 = (a-data.s32  lshift)  rshift; break;
-  case TYPE_U32: res.data.u32 = (a-data.u32  lshift)  rshift; break;
+  case TYPE_S32:
+ if (i-subOp == NV50_IR_SUBOP_EXTBF_REV)
+res.data.s32 = util_bitreverse(a-data.s32);
+ else
+res.data.s32 = a-data.s32;
+ res.data.s32 = (res.data.s32  lshift)  rshift;
+ break;
+  case TYPE_U32:
+ if (i-subOp == NV50_IR_SUBOP_EXTBF_REV)
+res.data.u32 = util_bitreverse(a-data.u32);
+ else
+res.data.u32 = a-data.u32;
+ res.data.u32 = (res.data.u32  lshift)  rshift;
+ break;
   default:
  return;
   }
-- 
1.8.4.5

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Re: [Mesa-dev] [PATCH v2 4/4] nvc0/ir: Handle OP_POPCNT when folding constant expressions

2014-06-03 Thread Ilia Mirkin
On Tue, Jun 3, 2014 at 4:58 PM, Tobias Klausmann
tobias.johannes.klausm...@mni.thm.de wrote:
 V2: Add support for a single-argument version of POPCNT for Maxwell (SM5)

 Signed-off-by: Tobias Klausmann tobias.johannes.klausm...@mni.thm.de
 ---
  src/gallium/drivers/nouveau/codegen/nv50_ir_peephole.cpp | 15 +++
  1 file changed, 15 insertions(+)

 diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_peephole.cpp 
 b/src/gallium/drivers/nouveau/codegen/nv50_ir_peephole.cpp
 index c497335..19767b4 100644
 --- a/src/gallium/drivers/nouveau/codegen/nv50_ir_peephole.cpp
 +++ b/src/gallium/drivers/nouveau/codegen/nv50_ir_peephole.cpp
 @@ -548,6 +548,10 @@ ConstantFolding::expr(Instruction *i,
}
break;
 }
 +   case OP_POPCNT: {
 + res.data.u32 = util_bitcount(a-data.u32  b-data.u32); break;
 +  break;

Do you really need 2 breaks here? Also, funy indentation.

 +   }
 default:
return;
 }
 @@ -966,6 +970,17 @@ ConstantFolding::opnd(Instruction *i, ImmediateValue 
 imm0, int s)
i-subOp = 0;
break;
 }
 +   case OP_POPCNT: {
 +  uint32_t res;
 +  if (!i-srcExists(1)) {
 + res = util_bitcount(imm0.reg.data.u32);
 + i-setSrc(0, new_ImmediateValue(i-bb-getProgram(), res));
 + i-setSrc(1, NULL);

A little overkill -- src(1) already doesn't exist... can get rid of
that, I think.

 + i-op = OP_MOV;
 + i-subOp = 0;
 +  }
 +  break;
 +   }
 default:
return;
 }
 --
 1.8.4.5

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[Mesa-dev] [PATCH] Check for NULL native_window into eglCreateWindowSurface()

2014-06-03 Thread Sinclair Yeh
v2:
Incorporated feedback from idr - moved the check to a higher level
function.

v1:
We have customers using NULL as a way to test the robustness of
the API.  Without this check, EGL will segfault trying to
dereference dri2_surf-wl_win-private because wl_win is
NULL.

This fix adds a check and sets EGL_BAD_NATIVE_WINDOW

Cc: 10.1 10.2 mesa-sta...@lists.freedesktop.org
---
 src/egl/main/eglapi.c | 4 
 1 file changed, 4 insertions(+)

diff --git a/src/egl/main/eglapi.c b/src/egl/main/eglapi.c
index 7846814..096c3d8 100644
--- a/src/egl/main/eglapi.c
+++ b/src/egl/main/eglapi.c
@@ -571,6 +571,10 @@ _eglCreateWindowSurfaceCommon(_EGLDisplay *disp, EGLConfig 
config,
EGLSurface ret;
 
_EGL_CHECK_CONFIG(disp, conf, EGL_NO_SURFACE, drv);
+
+   if (native_window == NULL)
+  RETURN_EGL_ERROR(disp, EGL_BAD_NATIVE_WINDOW, EGL_NO_SURFACE);
+
surf = drv-API.CreateWindowSurface(drv, disp, conf, native_window,
attrib_list);
ret = (surf) ? _eglLinkSurface(surf) : EGL_NO_SURFACE;
-- 
1.9.1

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Re: [Mesa-dev] [PATCH v2 2/4] nvc0/ir: Handle reverse subop for OP_EXTBF when folding constant expressions

2014-06-03 Thread Ilia Mirkin
On Tue, Jun 3, 2014 at 4:58 PM, Tobias Klausmann
tobias.johannes.klausm...@mni.thm.de wrote:
 V2: Handle the instruction right (shift after reverse)

 Signed-off-by: Tobias Klausmann tobias.johannes.klausm...@mni.thm.de
 ---
  src/gallium/drivers/nouveau/codegen/nv50_ir_peephole.cpp | 16 
 ++--
  1 file changed, 14 insertions(+), 2 deletions(-)

 diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_peephole.cpp 
 b/src/gallium/drivers/nouveau/codegen/nv50_ir_peephole.cpp
 index 58092f4..a214ffc 100644
 --- a/src/gallium/drivers/nouveau/codegen/nv50_ir_peephole.cpp
 +++ b/src/gallium/drivers/nouveau/codegen/nv50_ir_peephole.cpp
 @@ -529,8 +529,20 @@ ConstantFolding::expr(Instruction *i,
   lshift = 32 - width - offset;
}
switch (i-dType) {
 -  case TYPE_S32: res.data.s32 = (a-data.s32  lshift)  rshift; break;
 -  case TYPE_U32: res.data.u32 = (a-data.u32  lshift)  rshift; break;
 +  case TYPE_S32:
 + if (i-subOp == NV50_IR_SUBOP_EXTBF_REV)
 +res.data.s32 = util_bitreverse(a-data.s32);
 + else
 +res.data.s32 = a-data.s32;

Why not do this once outside of the switch statement? The two are
actually the same -- util_bitreverse doesn't care about
signed/unsigned, and res.data is a union.

 + res.data.s32 = (res.data.s32  lshift)  rshift;
 + break;
 +  case TYPE_U32:
 + if (i-subOp == NV50_IR_SUBOP_EXTBF_REV)
 +res.data.u32 = util_bitreverse(a-data.u32);
 + else
 +res.data.u32 = a-data.u32;
 + res.data.u32 = (res.data.u32  lshift)  rshift;
 + break;
default:
   return;
}
 --
 1.8.4.5

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Re: [Mesa-dev] [PATCH v2 3/4] nvc0/ir: Handle OP_BFIND when folding constant expressions

2014-06-03 Thread Ilia Mirkin
On Tue, Jun 3, 2014 at 4:58 PM, Tobias Klausmann
tobias.johannes.klausm...@mni.thm.de wrote:
 Signed-off-by: Tobias Klausmann tobias.johannes.klausm...@mni.thm.de
 ---
  .../drivers/nouveau/codegen/nv50_ir_peephole.cpp   | 18 
 ++
  1 file changed, 18 insertions(+)

 diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_peephole.cpp 
 b/src/gallium/drivers/nouveau/codegen/nv50_ir_peephole.cpp
 index a214ffc..c497335 100644
 --- a/src/gallium/drivers/nouveau/codegen/nv50_ir_peephole.cpp
 +++ b/src/gallium/drivers/nouveau/codegen/nv50_ir_peephole.cpp
 @@ -948,6 +948,24 @@ ConstantFolding::opnd(Instruction *i, ImmediateValue 
 imm0, int s)
 case OP_EX2:
unary(i, imm0);
break;
 +   case OP_BFIND: {
 +  int32_t res;
 +  switch (i-dType) {
 +  case TYPE_S32:
 + res = util_last_bit_signed(imm0.reg.data.s32) - 1; break;

The style elsewhere is to do

case TYPE_S32: foo; break;

if it fits. Otherwise put the break on a separate line.

 +  case TYPE_U32:
 + res = util_last_bit(imm0.reg.data.u32) -1; break;

Missing space between - and 1.

 +  default:
 + return;
 +  }
 +  if ((i-subOp ==  NV50_IR_SUBOP_BFIND_SAMT)  (res = 0))

No need for the extra parens.  comes after ==.

 + res = 31 - res;
 +  i-setSrc(0, new_ImmediateValue(i-bb-getProgram(), (uint32_t)res));

Why the typecast?

 +  i-setSrc(1, NULL);
 +  i-op = OP_MOV;
 +  i-subOp = 0;
 +  break;
 +   }
 default:
return;
 }
 --
 1.8.4.5

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Re: [Mesa-dev] [PATCH v2 1/4] nvc0/ir: clear subop when folding constant expressions

2014-06-03 Thread Ilia Mirkin
On Tue, Jun 3, 2014 at 4:58 PM, Tobias Klausmann
tobias.johannes.klausm...@mni.thm.de wrote:
 Some operations (e.g. OP_MUL/OP_MAD/OP_EXTBF might have a subop set.
 After folding, make sure that it is cleared

 Signed-off-by: Tobias Klausmann tobias.johannes.klausm...@mni.thm.de

Reviewed-by: Ilia Mirkin imir...@alum.mit.edu

 ---
  src/gallium/drivers/nouveau/codegen/nv50_ir_peephole.cpp | 1 +
  1 file changed, 1 insertion(+)

 diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_peephole.cpp 
 b/src/gallium/drivers/nouveau/codegen/nv50_ir_peephole.cpp
 index 1a2c2e6..58092f4 100644
 --- a/src/gallium/drivers/nouveau/codegen/nv50_ir_peephole.cpp
 +++ b/src/gallium/drivers/nouveau/codegen/nv50_ir_peephole.cpp
 @@ -563,6 +563,7 @@ ConstantFolding::expr(Instruction *i,
 } else {
i-op = i-saturate ? OP_SAT : OP_MOV; /* SAT handled by unary() */
 }
 +   i-subOp = 0;
  }

  void
 --
 1.8.4.5

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Re: [Mesa-dev] [PATCH 05/19] i965/fs: Loop from 0 to inst-sources, not 0 to 3.

2014-06-03 Thread Ian Romanick
On 06/02/2014 05:49 PM, Kenneth Graunke wrote:
 On Monday, June 02, 2014 03:48:23 PM Ian Romanick wrote:
 On 05/31/2014 10:11 PM, Kenneth Graunke wrote:
 On Tuesday, May 27, 2014 06:47:36 PM Matt Turner wrote:
 [snip]
 diff --git a/src/mesa/drivers/dri/i965/brw_fs_copy_propagation.cpp 
 b/src/mesa/drivers/dri/i965/brw_fs_copy_propagation.cpp
 index 069b60f..a1aff21 100644
 --- a/src/mesa/drivers/dri/i965/brw_fs_copy_propagation.cpp
 +++ b/src/mesa/drivers/dri/i965/brw_fs_copy_propagation.cpp
 @@ -353,7 +353,7 @@ fs_visitor::try_constant_propagate(fs_inst *inst, 
 acp_entry *entry)
 if (entry-src.file != IMM)
return false;
  
 -   for (int i = 2; i = 0; i--) {
 +   for (int i = inst-sources - 1; i = 0; i--) {
if (inst-src[i].file != entry-dst.file ||
inst-src[i].reg != entry-dst.reg ||
inst-src[i].reg_offset != entry-dst.reg_offset ||

 I am glad to see that you're using a signed integer type here.  For 
 BRW_OPCODE_NOP, SHADER_OPCODE_PLACEHOLDER_HALT, and so on, inst-sources 
 could 
 conceievably be 0.  (Today, you set it to 3 for some reason, but I could 
 see 
 someone coming along and fixing that later...)

 If you had used unsigned types, this would translate into i = 4294967296; 
 i = 
 0; i--, which would take forever.  With signed types, it works, and no one 
 should get bitten by that bug.

 Consistency of types is good.  Some folks build with additional
 warnings, and the flood of

 main/bufferobj.c:2855:18: warning: comparison between signed and unsigned 
 integer expressions [-Wsign-compare]

 can hide legit bugs. :(
 
 I'm not advocating against leaving compiler warnings.  I'm advocating against 
 naively changing it to unsigned in order to shut up those warnings, and 
 actually /introduce/ bugs.

Of course!  Me neither. :)

 Here, the right solution is probably to use a signed counter, and explicitly 
 cast uint - int to shut up the compiler.

I guess the part I was thinking but didn't say is why not just use
signed in all these places?  I don't care too much either way... I just
want less bugs and less warning noise. :)

 --Ken




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Re: [Mesa-dev] [PATCH:mesa] Use -z defs instead of --no-undefined on Solaris

2014-06-03 Thread Ian Romanick
On 06/02/2014 06:07 PM, Alan Coopersmith wrote:
 While recent versions of the Solaris linker support --no-undefined,
 older ones do not, and even current ones get confused if the Makefile
 passes one form and libtool sneaks in the other.
 
 Signed-off-by: Alan Coopersmith alan.coopersm...@oracle.com

Maybe Vinson can give a Tested-by too.

Acked-by: Ian Romanick ian.d.roman...@intel.com

 ---
  configure.ac |2 ++
  1 file changed, 2 insertions(+)
 
 diff --git a/configure.ac b/configure.ac
 index 9c64400..29bfbc4 100644
 --- a/configure.ac
 +++ b/configure.ac
 @@ -354,6 +354,8 @@ dnl
  case $host_os in
  openbsd* | darwin* )
  LD_NO_UNDEFINED= ;;
 +solaris*)
 +LD_NO_UNDEFINED=-Wl,-z,defs ;;
  *)
  LD_NO_UNDEFINED=-Wl,--no-undefined ;;
  esac
 

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Re: [Mesa-dev] [PATCH V2 7/9] glsl: Add support for comparing function parameter conversions

2014-06-03 Thread Jordan Justen
On Sun, May 4, 2014 at 1:24 AM, Chris Forbes chr...@ijw.co.nz wrote:
 The ARB_gpu_shader5 spec says:

 To determine whether the conversion for a single argument in one match is
 better than that for another match, the following rules are applied, in
 order:

   1. An exact match is better than a match involving any implicit
  conversion.

   2. A match involving an implicit conversion from float to double is
  better than a match involving any other implicit conversion.

   3. A match involving an implicit conversion from either int or uint to
  float is better than a match involving an implicit conversion from
  either int or uint to double.

 If none of the rules above apply to a particular pair of conversions,
 neither conversion is considered better than the other.

 Signed-off-by: Chris Forbes chr...@ijw.co.nz
 ---
  src/glsl/ir_function.cpp | 74 
 ++--
  1 file changed, 71 insertions(+), 3 deletions(-)

 diff --git a/src/glsl/ir_function.cpp b/src/glsl/ir_function.cpp
 index 2b88535..6d2de47 100644
 --- a/src/glsl/ir_function.cpp
 +++ b/src/glsl/ir_function.cpp
 @@ -117,6 +117,73 @@ parameter_lists_match(_mesa_glsl_parse_state *state,
  }


 +typedef enum {
 +   PARAMETER_EXACT_MATCH,
 +   PARAMETER_FLOAT_TO_DOUBLE,
 +   PARAMETER_INT_TO_FLOAT,
 +   PARAMETER_INT_TO_DOUBLE,
 +   PARAMETER_OTHER_CONVERSION,
 +} parameter_match_t;

How about a comment noting these are sorted with 'best' match listed first?

 +
 +
 +static parameter_match_t
 +get_parameter_match_type(const ir_variable *param,
 + const ir_rvalue *actual)
 +{
 +   const glsl_type *from_type;
 +   const glsl_type *to_type;
 +
 +   if (param-data.mode == ir_var_function_out) {
 +  from_type = param-type;
 +  to_type = actual-type;
 +   } else {
 +  from_type = actual-type;
 +  to_type = param-type;
 +   }
 +
 +   if (from_type == to_type)
 +  return PARAMETER_EXACT_MATCH;
 +
 +   /* XXX: When ARB_gpu_shader_fp64 support is added, check for 
 float-double,
 +* and int/uint-double conversions
 +*/
 +
 +   if (to_type-base_type == GLSL_TYPE_FLOAT)
 +  return PARAMETER_INT_TO_FLOAT;
 +
 +   /* int - uint and any other oddball conversions */
 +   return PARAMETER_OTHER_CONVERSION;
 +}
 +
 +
 +static bool
 +is_better_parameter_match(parameter_match_t a_match,
 +  parameter_match_t b_match)
 +{
 +   /* 1. An exact match is better than a match involving any implicit
 +* conversion.
 +*
 +* 2. A match involving an implicit conversion from float to double
 +* is better than match involving any other implicit conversion.
 +*
 +* 3. A match involving an implicit conversion from either int or uint
 +* to float is better than a match involving an implicit conversion
 +* from either int or uint to double.
 +*
 +* If none of the rules above apply to a particular pair of conversions,
 +* neither conversion is considered better than the other.

Maybe reference the GLSL 4.00 spec location for this text?

-Jordan

 +*
 +* Notably, the int-uint conversion is *not* considered to be better
 +* or worse than int/uint-float or int/uint-double.
 +*/
 +
 +   if (a_match = PARAMETER_INT_TO_FLOAT  b_match == 
 PARAMETER_OTHER_CONVERSION)
 +  return false;
 +
 +   return a_match  b_match;
 +}
 +
 +
  static ir_function_signature *
  choose_best_inexact_overload(_mesa_glsl_parse_state *state,
   const exec_list *actual_parameters,
 @@ -173,9 +240,10 @@ ir_function::matching_signature(_mesa_glsl_parse_state 
 *state,
   free(inexact_matches);
   return sig;
case PARAMETER_LIST_INEXACT_MATCH:
 - inexact_matches = realloc(inexact_matches,
 -   sizeof(*inexact_matches) *
 -   (num_inexact_matches + 1));
 + inexact_matches = (ir_function_signature **)
 +   realloc(inexact_matches,
 +   sizeof(*inexact_matches) *
 +   (num_inexact_matches + 1));
   assert(inexact_matches);
   inexact_matches[num_inexact_matches++] = sig;
   continue;
 --
 1.9.2

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Re: [Mesa-dev] [PATCH V2 8/9] glsl: Implement overload resolution for ARB_gpu_shader5

2014-06-03 Thread Jordan Justen
On Sun, May 4, 2014 at 1:24 AM, Chris Forbes chr...@ijw.co.nz wrote:
 The ARB_gpu_shader5 spec says:

 A function definition A is considered a better
 match than function definition B if:

   * for at least one function argument, the conversion for that argument
 in A is better than the corresponding conversion in B; and

   * there is no function argument for which the conversion in B is better
 than the corresponding conversion in A.

 If a single function definition is considered a better match than every
 other matching function definition, it will be used.  Otherwise, a
 semantic error occurs and the shader will fail to compile.

How about adding a GLSL 4.00 spec reference by the code instead of in
the commit message?

Series Reviewed-by: Jordan Justen jordan.l.jus...@intel.com


 Signed-off-by: Chris Forbes chr...@ijw.co.nz
 ---
  src/glsl/ir_function.cpp | 56 
 
  1 file changed, 56 insertions(+)

 diff --git a/src/glsl/ir_function.cpp b/src/glsl/ir_function.cpp
 index 6d2de47..7bd3399 100644
 --- a/src/glsl/ir_function.cpp
 +++ b/src/glsl/ir_function.cpp
 @@ -184,6 +184,51 @@ is_better_parameter_match(parameter_match_t a_match,
  }


 +static bool
 +is_best_inexact_overload(const exec_list *actual_parameters,
 + ir_function_signature **matches,
 + int num_matches,
 + ir_function_signature *sig)
 +{
 +   for (ir_function_signature **other = matches;
 +other  matches + num_matches; other++) {
 +  if (*other == sig)
 + continue;
 +
 +  const exec_node *node_a = sig-parameters.head;
 +  const exec_node *node_b = (*other)-parameters.head;
 +  const exec_node *node_p = actual_parameters-head;
 +
 +  bool better_for_some_parameter = false;
 +
 +  for (/* empty */
 +   ; !node_a-is_tail_sentinel()
 +   ; node_a = node_a-next,
 + node_b = node_b-next,
 + node_p = node_p-next) {
 + parameter_match_t a_match = get_parameter_match_type(
 +   (const ir_variable *)node_a,
 +   (const ir_rvalue *)node_p);
 + parameter_match_t b_match = get_parameter_match_type(
 +   (const ir_variable *)node_b,
 +   (const ir_rvalue *)node_p);
 +
 + if (is_better_parameter_match(a_match, b_match))
 +   better_for_some_parameter = true;
 +
 + if (is_better_parameter_match(b_match, a_match))
 +   return false; /* B is better for this parameter */
 +  }
 +
 +  if (!better_for_some_parameter)
 + return false; /* A must be better than B for some parameter */
 +
 +   }
 +
 +   return true;
 +}
 +
 +
  static ir_function_signature *
  choose_best_inexact_overload(_mesa_glsl_parse_state *state,
   const exec_list *actual_parameters,
 @@ -196,6 +241,17 @@ choose_best_inexact_overload(_mesa_glsl_parse_state 
 *state,
 if (num_matches == 1)
return *matches;

 +   /* Without GLSL 4.0 / ARB_gpu_shader5, there is no overload resolution
 +* among multiple inexact matches. Note that state may be NULL here if
 +* called from the linker; in that case we assume everything supported in
 +* any GLSL version is available. */
 +   if (!state || state-is_version(400, 0) || state-ARB_gpu_shader5_enable) 
 {
 +  for (ir_function_signature **sig = matches; sig  matches + 
 num_matches; sig++) {
 + if (is_best_inexact_overload(actual_parameters, matches, 
 num_matches, *sig))
 +return *sig;
 +  }
 +   }
 +
 return NULL;   /* no best candidate */
  }

 --
 1.9.2

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[Mesa-dev] [PATCH v3 0/4] Constant folding of new Instructions

2014-06-03 Thread Tobias Klausmann
Yet another try for constant folding of Instructions for nvc0.

Please Review this again! (Hopefully the last time ;-) )


Tobias Klausmann (4):
  nvc0/ir: clear subop when folding constant expressions
  nvc0/ir: Handle reverse subop for OP_EXTBF when folding constant
expressions
  nvc0/ir: Handle OP_BFIND when folding constant expressions
  nvc0/ir: Handle OP_POPCNT when folding constant expressions

 .../drivers/nouveau/codegen/nv50_ir_peephole.cpp   | 41 --
 1 file changed, 39 insertions(+), 2 deletions(-)

-- 
1.8.4.5

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[Mesa-dev] [PATCH v3 4/4] nvc0/ir: Handle OP_POPCNT when folding constant expressions

2014-06-03 Thread Tobias Klausmann
Signed-off-by: Tobias Klausmann tobias.johannes.klausm...@mni.thm.de
---
V2: Add support for a single-argument version of POPCNT for Maxwell (SM5)
V3: Clean up a bit more

 src/gallium/drivers/nouveau/codegen/nv50_ir_peephole.cpp | 11 +++
 1 file changed, 11 insertions(+)

diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_peephole.cpp 
b/src/gallium/drivers/nouveau/codegen/nv50_ir_peephole.cpp
index e4d91d7..8dde7c1 100644
--- a/src/gallium/drivers/nouveau/codegen/nv50_ir_peephole.cpp
+++ b/src/gallium/drivers/nouveau/codegen/nv50_ir_peephole.cpp
@@ -544,6 +544,8 @@ ConstantFolding::expr(Instruction *i,
   }
   break;
}
+   case OP_POPCNT: res.data.u32 = util_bitcount(a-data.u32  b-data.u32);
+  break;
default:
   return;
}
@@ -961,6 +963,15 @@ ConstantFolding::opnd(Instruction *i, ImmediateValue 
imm0, int s)
   i-subOp = 0;
   break;
}
+   case OP_POPCNT: {
+  uint32_t res;
+  res = util_bitcount(imm0.reg.data.u32);
+  i-setSrc(0, new_ImmediateValue(i-bb-getProgram(), res));
+  i-setSrc(1, NULL);
+  i-op = OP_MOV;
+  i-subOp = 0;
+  break;
+   }
default:
   return;
}
-- 
1.8.4.5

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[Mesa-dev] [PATCH v3 2/4] nvc0/ir: Handle reverse subop for OP_EXTBF when folding constant expressions

2014-06-03 Thread Tobias Klausmann
Signed-off-by: Tobias Klausmann tobias.johannes.klausm...@mni.thm.de
---
V2: Handle the instruction right (shift after reverse)
V3: Reverse once, not independently for every TYPE

 src/gallium/drivers/nouveau/codegen/nv50_ir_peephole.cpp | 12 ++--
 1 file changed, 10 insertions(+), 2 deletions(-)

diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_peephole.cpp 
b/src/gallium/drivers/nouveau/codegen/nv50_ir_peephole.cpp
index 58092f4..538e745 100644
--- a/src/gallium/drivers/nouveau/codegen/nv50_ir_peephole.cpp
+++ b/src/gallium/drivers/nouveau/codegen/nv50_ir_peephole.cpp
@@ -528,9 +528,17 @@ ConstantFolding::expr(Instruction *i,
  rshift = 32 - width;
  lshift = 32 - width - offset;
   }
+  if (i-subOp == NV50_IR_SUBOP_EXTBF_REV)
+ res.data.u32 = util_bitreverse(a-data.u32);
+  else
+ res.data.u32 = a-data.u32;
   switch (i-dType) {
-  case TYPE_S32: res.data.s32 = (a-data.s32  lshift)  rshift; break;
-  case TYPE_U32: res.data.u32 = (a-data.u32  lshift)  rshift; break;
+  case TYPE_S32:
+ res.data.s32 = (res.data.s32  lshift)  rshift;
+ break;
+  case TYPE_U32:
+ res.data.u32 = (res.data.u32  lshift)  rshift;
+ break;
   default:
  return;
   }
-- 
1.8.4.5

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[Mesa-dev] [PATCH v3 1/4] nvc0/ir: clear subop when folding constant expressions

2014-06-03 Thread Tobias Klausmann
Some operations (e.g. OP_MUL/OP_MAD/OP_EXTBF might have a subop set.
After folding, make sure that it is cleared

Signed-off-by: Tobias Klausmann tobias.johannes.klausm...@mni.thm.de
Reviewed-by: Ilia Mirkin imir...@alum.mit.edu
---
 src/gallium/drivers/nouveau/codegen/nv50_ir_peephole.cpp | 1 +
 1 file changed, 1 insertion(+)

diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_peephole.cpp 
b/src/gallium/drivers/nouveau/codegen/nv50_ir_peephole.cpp
index 1a2c2e6..58092f4 100644
--- a/src/gallium/drivers/nouveau/codegen/nv50_ir_peephole.cpp
+++ b/src/gallium/drivers/nouveau/codegen/nv50_ir_peephole.cpp
@@ -563,6 +563,7 @@ ConstantFolding::expr(Instruction *i,
} else {
   i-op = i-saturate ? OP_SAT : OP_MOV; /* SAT handled by unary() */
}
+   i-subOp = 0;
 }
 
 void
-- 
1.8.4.5

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[Mesa-dev] [PATCH v3 3/4] nvc0/ir: Handle OP_BFIND when folding constant expressions

2014-06-03 Thread Tobias Klausmann
Signed-off-by: Tobias Klausmann tobias.johannes.klausm...@mni.thm.de
---
V3: Use BuildUtil for the Immediate instead of a type conversion

 .../drivers/nouveau/codegen/nv50_ir_peephole.cpp| 17 +
 1 file changed, 17 insertions(+)

diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_peephole.cpp 
b/src/gallium/drivers/nouveau/codegen/nv50_ir_peephole.cpp
index 538e745..e4d91d7 100644
--- a/src/gallium/drivers/nouveau/codegen/nv50_ir_peephole.cpp
+++ b/src/gallium/drivers/nouveau/codegen/nv50_ir_peephole.cpp
@@ -944,6 +944,23 @@ ConstantFolding::opnd(Instruction *i, ImmediateValue 
imm0, int s)
case OP_EX2:
   unary(i, imm0);
   break;
+   case OP_BFIND: {
+  int32_t res;
+  switch (i-dType) {
+  case TYPE_S32: res = util_last_bit_signed(imm0.reg.data.s32) - 1; break;
+  case TYPE_U32: res = util_last_bit(imm0.reg.data.u32) - 1; break;
+  default:
+ return;
+  }
+  if (i-subOp ==  NV50_IR_SUBOP_BFIND_SAMT  res = 0)
+ res = 31 - res;
+  bld.setPosition(i, false); /* make sure bld is init'ed */
+  i-setSrc(0, bld.mkImm(res));
+  i-setSrc(1, NULL);
+  i-op = OP_MOV;
+  i-subOp = 0;
+  break;
+   }
default:
   return;
}
-- 
1.8.4.5

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Re: [Mesa-dev] [PATCH] Check for NULL native_window into eglCreateWindowSurface()

2014-06-03 Thread Chad Versace
On Tue, Jun 03, 2014 at 02:00:13PM -0700, Sinclair Yeh wrote:
 v2:
 Incorporated feedback from idr - moved the check to a higher level
 function.
 
 v1:
 We have customers using NULL as a way to test the robustness of
 the API.  Without this check, EGL will segfault trying to
 dereference dri2_surf-wl_win-private because wl_win is
 NULL.
 
 This fix adds a check and sets EGL_BAD_NATIVE_WINDOW
 
 Cc: 10.1 10.2 mesa-sta...@lists.freedesktop.org
 ---
  src/egl/main/eglapi.c | 4 
  1 file changed, 4 insertions(+)

Looks good to me.
Reviewed-by: Chad Versace chad.vers...@linux.intel.com

Ian, you gave the initial feedback, so you should commit.

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Re: [Mesa-dev] [PATCH v3 0/4] Constant folding of new Instructions

2014-06-03 Thread Ilia Mirkin
Series is Reviewed-by: Ilia Mirkin imir...@alum.mit.edu

There are a few minor formatting items that I'll take care of before
pushing this out later tonight... take a look at the changes I made
for the future :)

On Tue, Jun 3, 2014 at 6:35 PM, Tobias Klausmann
tobias.johannes.klausm...@mni.thm.de wrote:
 Yet another try for constant folding of Instructions for nvc0.

 Please Review this again! (Hopefully the last time ;-) )


 Tobias Klausmann (4):
   nvc0/ir: clear subop when folding constant expressions
   nvc0/ir: Handle reverse subop for OP_EXTBF when folding constant
 expressions
   nvc0/ir: Handle OP_BFIND when folding constant expressions
   nvc0/ir: Handle OP_POPCNT when folding constant expressions

  .../drivers/nouveau/codegen/nv50_ir_peephole.cpp   | 41 
 --
  1 file changed, 39 insertions(+), 2 deletions(-)

 --
 1.8.4.5

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Re: [Mesa-dev] [PATCH] Check for NULL native_window into eglCreateWindowSurface()

2014-06-03 Thread Chad Versace
On Tue, Jun 03, 2014 at 03:42:32PM -0700, Chad Versace wrote:
 On Tue, Jun 03, 2014 at 02:00:13PM -0700, Sinclair Yeh wrote:
  v2:
  Incorporated feedback from idr - moved the check to a higher level
  function.
  
  v1:
  We have customers using NULL as a way to test the robustness of
  the API.  Without this check, EGL will segfault trying to
  dereference dri2_surf-wl_win-private because wl_win is
  NULL.
  
  This fix adds a check and sets EGL_BAD_NATIVE_WINDOW
  
  Cc: 10.1 10.2 mesa-sta...@lists.freedesktop.org
  ---
   src/egl/main/eglapi.c | 4 
   1 file changed, 4 insertions(+)
 
 Looks good to me.
 Reviewed-by: Chad Versace chad.vers...@linux.intel.com
 
 Ian, you gave the initial feedback, so you should commit.

Sinclair, one more thing. In the future, please prefix the commit
subject with Mesa component name touched by the patch. For example:

[PATCH] egl: Check for NULL native_window into eglCreateWindowSurface()

Ian, if this patch gets your r-b, please add the prefix before committing.
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Re: [Mesa-dev] [PATCH V2 8/9] glsl: Implement overload resolution for ARB_gpu_shader5

2014-06-03 Thread Chris Forbes
OK, I'll move the various spec references into the code, cite GLSL
4.00 rather than the extension where possible, and throw in some more
comments to clarify the stranger bits.

Thanks for the review :)

-- Chris


On Wed, Jun 4, 2014 at 10:30 AM, Jordan Justen jljus...@gmail.com wrote:
 On Sun, May 4, 2014 at 1:24 AM, Chris Forbes chr...@ijw.co.nz wrote:
 The ARB_gpu_shader5 spec says:

 A function definition A is considered a better
 match than function definition B if:

   * for at least one function argument, the conversion for that argument
 in A is better than the corresponding conversion in B; and

   * there is no function argument for which the conversion in B is better
 than the corresponding conversion in A.

 If a single function definition is considered a better match than every
 other matching function definition, it will be used.  Otherwise, a
 semantic error occurs and the shader will fail to compile.

 How about adding a GLSL 4.00 spec reference by the code instead of in
 the commit message?

 Series Reviewed-by: Jordan Justen jordan.l.jus...@intel.com


 Signed-off-by: Chris Forbes chr...@ijw.co.nz
 ---
  src/glsl/ir_function.cpp | 56 
 
  1 file changed, 56 insertions(+)

 diff --git a/src/glsl/ir_function.cpp b/src/glsl/ir_function.cpp
 index 6d2de47..7bd3399 100644
 --- a/src/glsl/ir_function.cpp
 +++ b/src/glsl/ir_function.cpp
 @@ -184,6 +184,51 @@ is_better_parameter_match(parameter_match_t a_match,
  }


 +static bool
 +is_best_inexact_overload(const exec_list *actual_parameters,
 + ir_function_signature **matches,
 + int num_matches,
 + ir_function_signature *sig)
 +{
 +   for (ir_function_signature **other = matches;
 +other  matches + num_matches; other++) {
 +  if (*other == sig)
 + continue;
 +
 +  const exec_node *node_a = sig-parameters.head;
 +  const exec_node *node_b = (*other)-parameters.head;
 +  const exec_node *node_p = actual_parameters-head;
 +
 +  bool better_for_some_parameter = false;
 +
 +  for (/* empty */
 +   ; !node_a-is_tail_sentinel()
 +   ; node_a = node_a-next,
 + node_b = node_b-next,
 + node_p = node_p-next) {
 + parameter_match_t a_match = get_parameter_match_type(
 +   (const ir_variable *)node_a,
 +   (const ir_rvalue *)node_p);
 + parameter_match_t b_match = get_parameter_match_type(
 +   (const ir_variable *)node_b,
 +   (const ir_rvalue *)node_p);
 +
 + if (is_better_parameter_match(a_match, b_match))
 +   better_for_some_parameter = true;
 +
 + if (is_better_parameter_match(b_match, a_match))
 +   return false; /* B is better for this parameter */
 +  }
 +
 +  if (!better_for_some_parameter)
 + return false; /* A must be better than B for some parameter */
 +
 +   }
 +
 +   return true;
 +}
 +
 +
  static ir_function_signature *
  choose_best_inexact_overload(_mesa_glsl_parse_state *state,
   const exec_list *actual_parameters,
 @@ -196,6 +241,17 @@ choose_best_inexact_overload(_mesa_glsl_parse_state 
 *state,
 if (num_matches == 1)
return *matches;

 +   /* Without GLSL 4.0 / ARB_gpu_shader5, there is no overload resolution
 +* among multiple inexact matches. Note that state may be NULL here if
 +* called from the linker; in that case we assume everything supported in
 +* any GLSL version is available. */
 +   if (!state || state-is_version(400, 0) || 
 state-ARB_gpu_shader5_enable) {
 +  for (ir_function_signature **sig = matches; sig  matches + 
 num_matches; sig++) {
 + if (is_best_inexact_overload(actual_parameters, matches, 
 num_matches, *sig))
 +return *sig;
 +  }
 +   }
 +
 return NULL;   /* no best candidate */
  }

 --
 1.9.2

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[Mesa-dev] Fix negation source modifer when used with logical instructions on Broadwell

2014-06-03 Thread Abdiel Janulgue
The negation source modifer for logical instructions changed its meaning on 
Broadwell that
can cause the source bits to be inverted. This patch series addresses a current 
issue in 
our Broadwell driver where a shader could cause the negation source modifier to 
be set on
logical operations and produce wrong results. 

A piglit test demonstrates this issue[1].

For example:

 and dst, src0, -src1

actually does

   dst = src0  ~src1

Conversely, since the logical source modifier is now logical, this capability 
allows expressions like a and (not b) to be calculated with one instruction.

No regressions observed on existing piglit tests. Shader-db did not report any 
gains
or loses as well.

Thanks to Matt Turner for initial feeback and advice.

Abdiel Janulgue (6):
  i965/fs: Refactor check for potential copy propagated instructions.
  i965/fs: copy propagate 'NOT' instruction when used with logical operation
  i965/fs: skip copy-propate for negated logical instructions and 'NOT' src 
registers
  i965/vec4: copy propagate 'NOT' instruction when used with logical 
operation
  i965/vec4: skip copy-propate for negated logical instructions and 'NOT' 
src registers
  i965/disasm: Properly debug negate source modifier for logical 
instructions

 src/mesa/drivers/dri/i965/brw_fs_copy_propagation.cpp   | 48 
+++---
 src/mesa/drivers/dri/i965/brw_vec4.h|  4 ++-
 src/mesa/drivers/dri/i965/brw_vec4_copy_propagation.cpp | 76 

 src/mesa/drivers/dri/i965/gen8_disasm.c | 24 +--
 4 files changed, 113 insertions(+), 39 deletions(-)

--
[1] http://lists.freedesktop.org/archives/piglit/2014-June/011002.html

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[Mesa-dev] [PATCH 3/6] i965/fs: skip copy-propate for negated logical instructions and 'NOT' src registers

2014-06-03 Thread Abdiel Janulgue
The negation source modifier on src registers has changed meaning in Broadwell 
when
used with logical operations.

Make sure copy propagation occurs only for original statements that does not 
have
negated source registers and destination instruction is not a logical op. In 
addition,
since we have added 'NOT' as a potentially propagate-able instruction, don't
propagate it either when the destination instruction is not a logical op.

Signed-off-by: Abdiel Janulgue abdiel.janul...@linux.intel.com
---
 src/mesa/drivers/dri/i965/brw_fs_copy_propagation.cpp | 14 ++
 1 file changed, 14 insertions(+)

diff --git a/src/mesa/drivers/dri/i965/brw_fs_copy_propagation.cpp 
b/src/mesa/drivers/dri/i965/brw_fs_copy_propagation.cpp
index 09d5949..26eda92 100644
--- a/src/mesa/drivers/dri/i965/brw_fs_copy_propagation.cpp
+++ b/src/mesa/drivers/dri/i965/brw_fs_copy_propagation.cpp
@@ -273,6 +273,15 @@ fs_copy_prop_dataflow::dump_block_data() const
}
 }
 
+static bool
+is_logic_op(enum opcode opcode)
+{
+   return (opcode == BRW_OPCODE_AND ||
+   opcode == BRW_OPCODE_OR  ||
+   opcode == BRW_OPCODE_XOR ||
+   opcode == BRW_OPCODE_NOT);
+}
+
 bool
 fs_visitor::try_copy_propagate(fs_inst *inst, int arg, acp_entry *entry)
 {
@@ -331,6 +340,11 @@ fs_visitor::try_copy_propagate(fs_inst *inst, int arg, 
acp_entry *entry)
if (has_source_modifiers  entry-dst.type != inst-src[arg].type)
   return false;
 
+   if (brw-gen =8 
+   ((entry-src.negate  is_logic_op(inst-opcode)) ||
+(entry-opcode == BRW_OPCODE_NOT  !is_logic_op(inst-opcode
+  return false;
+
inst-src[arg].file = entry-src.file;
inst-src[arg].reg = entry-src.reg;
inst-src[arg].reg_offset = entry-src.reg_offset;
-- 
1.9.1

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[Mesa-dev] [PATCH 4/6] i965/vec4: copy propagate 'NOT' instruction when used with logical operation

2014-06-03 Thread Abdiel Janulgue
On Broadwell, this reduces the instruction to 1 operation when 'NOT' is used 
with a
logical instruction.

Signed-off-by: Abdiel Janulgue abdiel.janul...@linux.intel.com
---
 src/mesa/drivers/dri/i965/brw_vec4.h   |  4 +-
 .../drivers/dri/i965/brw_vec4_copy_propagation.cpp | 62 +-
 2 files changed, 40 insertions(+), 26 deletions(-)

diff --git a/src/mesa/drivers/dri/i965/brw_vec4.h 
b/src/mesa/drivers/dri/i965/brw_vec4.h
index fd58b3c..51da46c 100644
--- a/src/mesa/drivers/dri/i965/brw_vec4.h
+++ b/src/mesa/drivers/dri/i965/brw_vec4.h
@@ -228,6 +228,8 @@ writemask(dst_reg reg, unsigned mask)
return reg;
 }
 
+struct copy_entry;
+
 class vec4_instruction : public backend_instruction {
 public:
DECLARE_RALLOC_CXX_OPERATORS(vec4_instruction)
@@ -498,7 +500,7 @@ public:
   vec4_instruction *last_rhs_inst);
 
bool try_copy_propagation(vec4_instruction *inst, int arg,
- src_reg *values[4]);
+ struct copy_entry *entry);
 
/** Walks an exec_list of ir_instruction and sends it through this visitor. 
*/
void visit_instructions(const exec_list *list);
diff --git a/src/mesa/drivers/dri/i965/brw_vec4_copy_propagation.cpp 
b/src/mesa/drivers/dri/i965/brw_vec4_copy_propagation.cpp
index 83cf191..ab50d00 100644
--- a/src/mesa/drivers/dri/i965/brw_vec4_copy_propagation.cpp
+++ b/src/mesa/drivers/dri/i965/brw_vec4_copy_propagation.cpp
@@ -36,10 +36,16 @@ extern C {
 
 namespace brw {
 
+struct copy_entry {
+   src_reg *value[4];
+   enum opcode opcode;
+};
+
 static bool
-is_direct_copy(vec4_instruction *inst)
+can_propagate_from(struct brw_context *brw, vec4_instruction *inst)
 {
-   return (inst-opcode == BRW_OPCODE_MOV 
+   return ((inst-opcode == BRW_OPCODE_MOV ||
+(inst-opcode == BRW_OPCODE_NOT  brw-gen = 8)) 
   !inst-predicate 
   inst-dst.file == GRF 
   !inst-saturate 
@@ -197,22 +203,22 @@ try_constant_propagation(vec4_instruction *inst, int arg, 
src_reg *values[4])
 
 bool
 vec4_visitor::try_copy_propagation(vec4_instruction *inst, int arg,
-   src_reg *values[4])
+   struct copy_entry *entry)
 {
/* For constant propagation, we only handle the same constant
 * across all 4 channels.  Some day, we should handle the 8-bit
 * float vector format, which would let us constant propagate
 * vectors better.
 */
-   src_reg value = *values[0];
+   src_reg value = *(entry-value[0]);
for (int i = 1; i  4; i++) {
   /* This is equals() except we don't care about the swizzle. */
-  if (value.file != values[i]-file ||
- value.reg != values[i]-reg ||
- value.reg_offset != values[i]-reg_offset ||
- value.type != values[i]-type ||
- value.negate != values[i]-negate ||
- value.abs != values[i]-abs) {
+  if (value.file != entry-value[i]-file ||
+ value.reg != entry-value[i]-reg ||
+ value.reg_offset != entry-value[i]-reg_offset ||
+ value.type != entry-value[i]-type ||
+ value.negate != entry-value[i]-negate ||
+ value.abs != entry-value[i]-abs) {
 return false;
   }
}
@@ -223,7 +229,7 @@ vec4_visitor::try_copy_propagation(vec4_instruction *inst, 
int arg,
 */
int s[4];
for (int i = 0; i  4; i++) {
-  s[i] = BRW_GET_SWZ(values[i]-swizzle,
+  s[i] = BRW_GET_SWZ(entry-value[i]-swizzle,
 BRW_GET_SWZ(inst-src[arg].swizzle, i));
}
value.swizzle = BRW_SWIZZLE4(s[0], s[1], s[2], s[3]);
@@ -277,6 +283,10 @@ vec4_visitor::try_copy_propagation(vec4_instruction *inst, 
int arg,
 
value.type = inst-src[arg].type;
inst-src[arg] = value;
+
+   if (brw-gen =8  entry-opcode == BRW_OPCODE_NOT)
+  inst-src[arg].negate ^= !value.negate;
+
return true;
 }
 
@@ -284,9 +294,9 @@ bool
 vec4_visitor::opt_copy_propagation()
 {
bool progress = false;
-   src_reg *cur_value[virtual_grf_reg_count][4];
+   struct copy_entry entries[virtual_grf_reg_count];
 
-   memset(cur_value, 0, sizeof(cur_value));
+   memset(entries, 0, sizeof(entries));
 
foreach_list(node, this-instructions) {
   vec4_instruction *inst = (vec4_instruction *)node;
@@ -299,7 +309,7 @@ vec4_visitor::opt_copy_propagation()
* src/glsl/opt_copy_propagation.cpp to track available copies.
*/
   if (!is_dominated_by_previous_instruction(inst)) {
-memset(cur_value, 0, sizeof(cur_value));
+memset(entries, 0, sizeof(entries));
 continue;
   }
 
@@ -320,31 +330,32 @@ vec4_visitor::opt_copy_propagation()
 
 /* Find the regs that each swizzle component came from.
  */
-src_reg *values[4];
+ struct copy_entry entry;
 int c;
 for (c = 0; c  4; c++) {
-   values[c] = cur_value[reg][BRW_GET_SWZ(inst-src[i].swizzle, c)];
+   entry.value[c] = 

[Mesa-dev] [PATCH 1/6] i965/fs: Refactor check for potential copy propagated instructions.

2014-06-03 Thread Abdiel Janulgue
Signed-off-by: Abdiel Janulgue abdiel.janul...@linux.intel.com
---
 .../drivers/dri/i965/brw_fs_copy_propagation.cpp   | 27 ++
 1 file changed, 17 insertions(+), 10 deletions(-)

diff --git a/src/mesa/drivers/dri/i965/brw_fs_copy_propagation.cpp 
b/src/mesa/drivers/dri/i965/brw_fs_copy_propagation.cpp
index a1aff21..d3d59aa 100644
--- a/src/mesa/drivers/dri/i965/brw_fs_copy_propagation.cpp
+++ b/src/mesa/drivers/dri/i965/brw_fs_copy_propagation.cpp
@@ -478,6 +478,22 @@ fs_visitor::try_constant_propagate(fs_inst *inst, 
acp_entry *entry)
 
return progress;
 }
+
+static bool
+can_propagate_from(fs_inst *inst)
+{
+   return (inst-opcode == BRW_OPCODE_MOV 
+   inst-dst.file == GRF 
+   ((inst-src[0].file == GRF 
+ (inst-src[0].reg != inst-dst.reg ||
+  inst-src[0].reg_offset != inst-dst.reg_offset)) ||
+inst-src[0].file == UNIFORM ||
+inst-src[0].file == IMM) 
+   inst-src[0].type == inst-dst.type 
+   !inst-saturate 
+   !inst-is_partial_write());
+}
+
 /* Walks a basic block and does copy propagation on it using the acp
  * list.
  */
@@ -532,16 +548,7 @@ fs_visitor::opt_copy_propagate_local(void *copy_prop_ctx, 
bblock_t *block,
   /* If this instruction's source could potentially be folded into the
* operand of another instruction, add it to the ACP.
*/
-  if (inst-opcode == BRW_OPCODE_MOV 
- inst-dst.file == GRF 
- ((inst-src[0].file == GRF 
-   (inst-src[0].reg != inst-dst.reg ||
-inst-src[0].reg_offset != inst-dst.reg_offset)) ||
-   inst-src[0].file == UNIFORM ||
-   inst-src[0].file == IMM) 
- inst-src[0].type == inst-dst.type 
- !inst-saturate 
- !inst-is_partial_write()) {
+  if (can_propagate_from(inst)) {
 acp_entry *entry = ralloc(copy_prop_ctx, acp_entry);
 entry-dst = inst-dst;
 entry-src = inst-src[0];
-- 
1.9.1

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[Mesa-dev] [PATCH 5/6] i965/vec4: skip copy-propate for negated logical instructions and 'NOT' src registers

2014-06-03 Thread Abdiel Janulgue
The negation source modifier on src registers has changed meaning in Broadwell 
when
used with logical operations.

On the vec4 backend, make sure copy propagation occurs only for original 
statements that
does not have negated source registers and destination instruction is not a 
logical op.
Since 'NOT' is now  a potentially propagate-able instruction, don't propagate it
either when the destination instruction is not a logical op.

Signed-off-by: Abdiel Janulgue abdiel.janul...@linux.intel.com
---
 src/mesa/drivers/dri/i965/brw_vec4_copy_propagation.cpp | 14 ++
 1 file changed, 14 insertions(+)

diff --git a/src/mesa/drivers/dri/i965/brw_vec4_copy_propagation.cpp 
b/src/mesa/drivers/dri/i965/brw_vec4_copy_propagation.cpp
index ab50d00..3a76997 100644
--- a/src/mesa/drivers/dri/i965/brw_vec4_copy_propagation.cpp
+++ b/src/mesa/drivers/dri/i965/brw_vec4_copy_propagation.cpp
@@ -201,6 +201,15 @@ try_constant_propagation(vec4_instruction *inst, int arg, 
src_reg *values[4])
return false;
 }
 
+static bool
+is_logic_op(enum opcode opcode)
+{
+   return (opcode == BRW_OPCODE_AND ||
+   opcode == BRW_OPCODE_OR  ||
+   opcode == BRW_OPCODE_XOR ||
+   opcode == BRW_OPCODE_NOT);
+}
+
 bool
 vec4_visitor::try_copy_propagation(vec4_instruction *inst, int arg,
struct copy_entry *entry)
@@ -239,6 +248,11 @@ vec4_visitor::try_copy_propagation(vec4_instruction *inst, 
int arg,
value.file != ATTR)
   return false;
 
+   if (brw-gen =8 
+   ((value.negate  is_logic_op(inst-opcode)) ||
+(entry-opcode == BRW_OPCODE_NOT  !is_logic_op(inst-opcode
+  return false;
+
if (inst-src[arg].abs) {
   value.negate = false;
   value.abs = true;
-- 
1.9.1

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[Mesa-dev] [PATCH 6/6] i965/disasm: Properly debug negate source modifier for logical instructions

2014-06-03 Thread Abdiel Janulgue
Signed-off-by: Abdiel Janulgue abdiel.janul...@linux.intel.com
---
 src/mesa/drivers/dri/i965/gen8_disasm.c | 24 +---
 1 file changed, 21 insertions(+), 3 deletions(-)

diff --git a/src/mesa/drivers/dri/i965/gen8_disasm.c 
b/src/mesa/drivers/dri/i965/gen8_disasm.c
index 04f8538..d027d9a 100644
--- a/src/mesa/drivers/dri/i965/gen8_disasm.c
+++ b/src/mesa/drivers/dri/i965/gen8_disasm.c
@@ -50,6 +50,8 @@ static const char *const m_negate[2] = { , - };
 
 static const char *const m_abs[2] = { , (abs) };
 
+static const char *const m_bitnot[2] = { , ~ };
+
 static const char *const m_vert_stride[16] = {
0,
1,
@@ -511,13 +513,23 @@ src_swizzle(FILE *file, unsigned x, unsigned y, unsigned 
z, unsigned w)
return err;
 }
 
+static bool
+is_logic_instruction(struct gen8_instruction *inst)
+{
+   return (gen8_opcode(inst) == BRW_OPCODE_AND ||
+   gen8_opcode(inst) == BRW_OPCODE_NOT ||
+   gen8_opcode(inst) == BRW_OPCODE_OR  ||
+   gen8_opcode(inst) == BRW_OPCODE_XOR);
+}
+
 static int
-src_da1(FILE *file, unsigned type, unsigned reg_file,
+src_da1(FILE *file, struct gen8_instruction *inst, unsigned type, unsigned 
reg_file,
 unsigned vert_stride, unsigned _width, unsigned horiz_stride,
 unsigned reg_num, unsigned sub_reg_num, unsigned _abs, unsigned negate)
 {
int err = 0;
-   err |= control(file, negate, m_negate, negate, NULL);
+   err |= control(file, negate, is_logic_instruction(inst) ?
+  m_bitnot : m_negate, negate, NULL);
err |= control(file, abs, m_abs, _abs, NULL);
 
err |= reg(file, reg_file, reg_num);
@@ -532,6 +544,7 @@ src_da1(FILE *file, unsigned type, unsigned reg_file,
 
 static int
 src_da16(FILE *file,
+ struct gen8_instruction *inst,
  unsigned _reg_type,
  unsigned reg_file,
  unsigned vert_stride,
@@ -545,7 +558,8 @@ src_da16(FILE *file,
  unsigned swz_w)
 {
int err = 0;
-   err |= control(file, negate, m_negate, negate, NULL);
+   err |= control(file, negate, is_logic_instruction(inst) ?
+  m_bitnot : m_negate, negate, NULL);
err |= control(file, abs, m_abs, _abs, NULL);
 
err |= reg(file, reg_file, _reg_nr);
@@ -714,6 +728,7 @@ src0(FILE *file, struct gen8_instruction *inst)
if (gen8_access_mode(inst) == BRW_ALIGN_1) {
   assert(gen8_src0_address_mode(inst) == BRW_ADDRESS_DIRECT);
   return src_da1(file,
+ inst,
  gen8_src0_reg_type(inst),
  gen8_src0_reg_file(inst),
  gen8_src0_vert_stride(inst),
@@ -726,6 +741,7 @@ src0(FILE *file, struct gen8_instruction *inst)
} else {
   assert(gen8_src0_address_mode(inst) == BRW_ADDRESS_DIRECT);
   return src_da16(file,
+  inst,
   gen8_src0_reg_type(inst),
   gen8_src0_reg_file(inst),
   gen8_src0_vert_stride(inst),
@@ -749,6 +765,7 @@ src1(FILE *file, struct gen8_instruction *inst)
if (gen8_access_mode(inst) == BRW_ALIGN_1) {
   assert(gen8_src1_address_mode(inst) == BRW_ADDRESS_DIRECT);
   return src_da1(file,
+ inst,
  gen8_src1_reg_type(inst),
  gen8_src1_reg_file(inst),
  gen8_src1_vert_stride(inst),
@@ -761,6 +778,7 @@ src1(FILE *file, struct gen8_instruction *inst)
} else {
   assert(gen8_src1_address_mode(inst) == BRW_ADDRESS_DIRECT);
   return src_da16(file,
+  inst,
   gen8_src1_reg_type(inst),
   gen8_src1_reg_file(inst),
   gen8_src1_vert_stride(inst),
-- 
1.9.1

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[Mesa-dev] [PATCH 2/6] i965/fs: copy propagate 'NOT' instruction when used with logical operation

2014-06-03 Thread Abdiel Janulgue
On Broadwell, this reduces the instruction to 1 operation when NOT is used with
a logical instruction

Signed-off-by: Abdiel Janulgue abdiel.janul...@linux.intel.com
---
 src/mesa/drivers/dri/i965/brw_fs_copy_propagation.cpp | 13 ++---
 1 file changed, 10 insertions(+), 3 deletions(-)

diff --git a/src/mesa/drivers/dri/i965/brw_fs_copy_propagation.cpp 
b/src/mesa/drivers/dri/i965/brw_fs_copy_propagation.cpp
index d3d59aa..09d5949 100644
--- a/src/mesa/drivers/dri/i965/brw_fs_copy_propagation.cpp
+++ b/src/mesa/drivers/dri/i965/brw_fs_copy_propagation.cpp
@@ -42,6 +42,7 @@ namespace { /* avoid conflict with 
opt_copy_propagation_elements */
 struct acp_entry : public exec_node {
fs_reg dst;
fs_reg src;
+   enum opcode opcode;
 };
 
 struct block_data {
@@ -341,6 +342,10 @@ fs_visitor::try_copy_propagate(fs_inst *inst, int arg, 
acp_entry *entry)
   inst-src[arg].negate ^= entry-src.negate;
}
 
+   if (brw-gen =8  entry-opcode == BRW_OPCODE_NOT) {
+  inst-src[arg].negate ^= !entry-src.negate;
+   }
+
return true;
 }
 
@@ -480,9 +485,10 @@ fs_visitor::try_constant_propagate(fs_inst *inst, 
acp_entry *entry)
 }
 
 static bool
-can_propagate_from(fs_inst *inst)
+can_propagate_from(struct brw_context *brw, fs_inst *inst)
 {
-   return (inst-opcode == BRW_OPCODE_MOV 
+   return ((inst-opcode == BRW_OPCODE_MOV ||
+(inst-opcode == BRW_OPCODE_NOT  brw-gen =8)) 
inst-dst.file == GRF 
((inst-src[0].file == GRF 
  (inst-src[0].reg != inst-dst.reg ||
@@ -548,10 +554,11 @@ fs_visitor::opt_copy_propagate_local(void *copy_prop_ctx, 
bblock_t *block,
   /* If this instruction's source could potentially be folded into the
* operand of another instruction, add it to the ACP.
*/
-  if (can_propagate_from(inst)) {
+  if (can_propagate_from(brw, inst)) {
 acp_entry *entry = ralloc(copy_prop_ctx, acp_entry);
 entry-dst = inst-dst;
 entry-src = inst-src[0];
+ entry-opcode = inst-opcode;
 acp[entry-dst.reg % ACP_HASH_SIZE].push_tail(entry);
   }
}
-- 
1.9.1

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[Mesa-dev] [PATCH] configure.ac: Do not use Pthreads with MinGW.

2014-06-03 Thread Vinson Lee
Match the behavior of the SCons MinGW build.

This patch also fixes these build errors.

  CC   glapi_entrypoint.lo
glapi_entrypoint.c: In function 'init_glapi_relocs_once':
glapi_entrypoint.c:341:4: error: unknown type name 'pthread_once_t'
static pthread_once_t once_control = PTHREAD_ONCE_INIT;
^
glapi_entrypoint.c:341:41: error: 'PTHREAD_ONCE_INIT' undeclared (first use in 
this function)
static pthread_once_t once_control = PTHREAD_ONCE_INIT;
 ^
glapi_entrypoint.c:341:41: note: each undeclared identifier is reported only 
once for each function it appears in
glapi_entrypoint.c:342:4: error: implicit declaration of function 
'pthread_once' [-Werror=implicit-function-declaration]
pthread_once(  once_control, init_glapi_relocs );
^

Signed-off-by: Vinson Lee v...@freedesktop.org
---
 configure.ac | 7 ++-
 1 file changed, 6 insertions(+), 1 deletion(-)

diff --git a/configure.ac b/configure.ac
index 9c64400..ab3b91d 100644
--- a/configure.ac
+++ b/configure.ac
@@ -552,7 +552,12 @@ dnl See if posix_memalign is available
 AC_CHECK_FUNC([posix_memalign], [DEFINES=$DEFINES -DHAVE_POSIX_MEMALIGN])
 
 dnl Check for pthreads
-AX_PTHREAD
+case $host_os in
+mingw*)
+;;
+*)
+AX_PTHREAD
+esac
 dnl AX_PTHREADS leaves PTHREAD_LIBS empty for gcc and sets PTHREAD_CFLAGS
 dnl to -pthread, which causes problems if we need -lpthread to appear in
 dnl pkgconfig files.
-- 
1.9.3

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Re: [Mesa-dev] [PATCH] configure.ac: Do not use Pthreads with MinGW.

2014-06-03 Thread Matt Turner
On Tue, Jun 3, 2014 at 5:06 PM, Vinson Lee v...@freedesktop.org wrote:
 Match the behavior of the SCons MinGW build.

 This patch also fixes these build errors.

   CC   glapi_entrypoint.lo
 glapi_entrypoint.c: In function 'init_glapi_relocs_once':
 glapi_entrypoint.c:341:4: error: unknown type name 'pthread_once_t'
 static pthread_once_t once_control = PTHREAD_ONCE_INIT;
 ^
 glapi_entrypoint.c:341:41: error: 'PTHREAD_ONCE_INIT' undeclared (first use 
 in this function)
 static pthread_once_t once_control = PTHREAD_ONCE_INIT;
  ^
 glapi_entrypoint.c:341:41: note: each undeclared identifier is reported only 
 once for each function it appears in
 glapi_entrypoint.c:342:4: error: implicit declaration of function 
 'pthread_once' [-Werror=implicit-function-declaration]
 pthread_once(  once_control, init_glapi_relocs );
 ^

 Signed-off-by: Vinson Lee v...@freedesktop.org
 ---
  configure.ac | 7 ++-
  1 file changed, 6 insertions(+), 1 deletion(-)

 diff --git a/configure.ac b/configure.ac
 index 9c64400..ab3b91d 100644
 --- a/configure.ac
 +++ b/configure.ac
 @@ -552,7 +552,12 @@ dnl See if posix_memalign is available
  AC_CHECK_FUNC([posix_memalign], [DEFINES=$DEFINES -DHAVE_POSIX_MEMALIGN])

  dnl Check for pthreads
 -AX_PTHREAD
 +case $host_os in
 +mingw*)
 +;;
 +*)
 +AX_PTHREAD

Missing ;; ?

 +esac
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Re: [Mesa-dev] [PATCH] Check for NULL native_window into eglCreateWindowSurface()

2014-06-03 Thread Ian Romanick
On 06/03/2014 03:47 PM, Chad Versace wrote:
 On Tue, Jun 03, 2014 at 03:42:32PM -0700, Chad Versace wrote:
 On Tue, Jun 03, 2014 at 02:00:13PM -0700, Sinclair Yeh wrote:
 v2:
 Incorporated feedback from idr - moved the check to a higher level
 function.

 v1:
 We have customers using NULL as a way to test the robustness of
 the API.  Without this check, EGL will segfault trying to
 dereference dri2_surf-wl_win-private because wl_win is
 NULL.

 This fix adds a check and sets EGL_BAD_NATIVE_WINDOW

 Cc: 10.1 10.2 mesa-sta...@lists.freedesktop.org
 ---
  src/egl/main/eglapi.c | 4 
  1 file changed, 4 insertions(+)

 Looks good to me.
 Reviewed-by: Chad Versace chad.vers...@linux.intel.com

 Ian, you gave the initial feedback, so you should commit.
 
 Sinclair, one more thing. In the future, please prefix the commit
 subject with Mesa component name touched by the patch. For example:
 
 [PATCH] egl: Check for NULL native_window into eglCreateWindowSurface()
 
 Ian, if this patch gets your r-b, please add the prefix before committing.

Roger that.  I'm also going to adjust the commmit message slightly.

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[Mesa-dev] [PATCH v2] configure.ac: Do not use Pthreads with MinGW.

2014-06-03 Thread Vinson Lee
Match the behavior of the SCons MinGW build.

This patch also fixes these build errors.

  CC   glapi_entrypoint.lo
glapi_entrypoint.c: In function 'init_glapi_relocs_once':
glapi_entrypoint.c:341:4: error: unknown type name 'pthread_once_t'
static pthread_once_t once_control = PTHREAD_ONCE_INIT;
^
glapi_entrypoint.c:341:41: error: 'PTHREAD_ONCE_INIT' undeclared (first use in 
this function)
static pthread_once_t once_control = PTHREAD_ONCE_INIT;
 ^
glapi_entrypoint.c:341:41: note: each undeclared identifier is reported only 
once for each function it appears in
glapi_entrypoint.c:342:4: error: implicit declaration of function 
'pthread_once' [-Werror=implicit-function-declaration]
pthread_once(  once_control, init_glapi_relocs );
^

Signed-off-by: Vinson Lee v...@freedesktop.org
---

v2: Add missing ';;'.

 configure.ac | 8 +++-
 1 file changed, 7 insertions(+), 1 deletion(-)

diff --git a/configure.ac b/configure.ac
index 9c64400..a12f27a 100644
--- a/configure.ac
+++ b/configure.ac
@@ -552,7 +552,13 @@ dnl See if posix_memalign is available
 AC_CHECK_FUNC([posix_memalign], [DEFINES=$DEFINES -DHAVE_POSIX_MEMALIGN])
 
 dnl Check for pthreads
-AX_PTHREAD
+case $host_os in
+mingw*)
+;;
+*)
+AX_PTHREAD
+;;
+esac
 dnl AX_PTHREADS leaves PTHREAD_LIBS empty for gcc and sets PTHREAD_CFLAGS
 dnl to -pthread, which causes problems if we need -lpthread to appear in
 dnl pkgconfig files.
-- 
1.9.3

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Re: [Mesa-dev] [PATCH v2] configure.ac: Do not use Pthreads with MinGW.

2014-06-03 Thread Matt Turner
Seems fine to me.

Reviewed-by: Matt Turner matts...@gmail.com
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Re: [Mesa-dev] [RFC 00/20] shader compiler cache

2014-06-03 Thread Tapani

On 06/02/2014 09:22 PM, Kenneth Graunke wrote:

On Monday, June 02, 2014 07:44:15 PM Benjamin Bellec wrote:
[snip]

The canary error on Google points to a previously closed bug from
glsl-compiler :
https://bugs.freedesktop.org/show_bug.cgi?id=58039

It's probably unrelated - failing the canary check basically just means you
botched your memory management.  Or, more specifically, you passed a non-
ralloc'd pointer to a ralloc function.


This was the case and thanks to Benjamin's backtrace it's fixed now 
(will send v2 for patch 18). It seems there are some other issues with 
gallium though, I'll need to get myself a test environment to hunt these 
down.


While rebasing my patches I noticed that L4D2 is not so good test case 
anymore though as it is broken with Mesa master :/

https://bugs.freedesktop.org/show_bug.cgi?id=79616




I suppose it might be more ctx/mem_ctx confusion.

Valgrind can usually track these problems down.

--Ken


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