[Mesa-dev] [PATCH v2 4/5] anv: Add missing error-checking to anv_CreateDevice (v2)

[Mun Gwan-gyeong]

This patch adds missing error-checking and fixes resource leak in
allocation failure path on anv_CreateDevice()

v2: Fixes from Jason Ekstrand's review
  a) Add missing destructors for all of the state pools on allocation
 failure path
  b) Add missing destructor for batch bo pools on allocation failure path

Signed-off-by: Mun Gwan-gyeong 
---
 src/intel/vulkan/anv_device.c | 63 ---
 1 file changed, 54 insertions(+), 9 deletions(-)

diff --git a/src/intel/vulkan/anv_device.c b/src/intel/vulkan/anv_device.c
index 0fd7d41..768e8f9 100644
--- a/src/intel/vulkan/anv_device.c
+++ b/src/intel/vulkan/anv_device.c
@@ -893,31 +893,57 @@ VkResult anv_CreateDevice(
device->robust_buffer_access = pCreateInfo->pEnabledFeatures &&
   pCreateInfo->pEnabledFeatures->robustBufferAccess;
 
-   pthread_mutex_init(>mutex, NULL);
+   if (pthread_mutex_init(>mutex, NULL) != 0) {
+  result = vk_error(VK_ERROR_INITIALIZATION_FAILED);
+  goto fail_context_id;
+   }
 
pthread_condattr_t condattr;
-   pthread_condattr_init();
-   pthread_condattr_setclock(, CLOCK_MONOTONIC);
-   pthread_cond_init(>queue_submit, NULL);
+   if (pthread_condattr_init() != 0) {
+  result = vk_error(VK_ERROR_INITIALIZATION_FAILED);
+  goto fail_mutex;
+   }
+   if (pthread_condattr_setclock(, CLOCK_MONOTONIC) != 0) {
+  pthread_condattr_destroy();
+  result = vk_error(VK_ERROR_INITIALIZATION_FAILED);
+  goto fail_mutex;
+   }
+   if (pthread_cond_init(>queue_submit, NULL) != 0) {
+  pthread_condattr_destroy();
+  result = vk_error(VK_ERROR_INITIALIZATION_FAILED);
+  goto fail_mutex;
+   }
pthread_condattr_destroy();
 
anv_bo_pool_init(>batch_bo_pool, device);
 
-   anv_block_pool_init(>dynamic_state_block_pool, device, 16384);
+   result = anv_block_pool_init(>dynamic_state_block_pool, device,
+16384);
+   if (result != VK_SUCCESS)
+  goto fail_batch_bo_pool;
 
anv_state_pool_init(>dynamic_state_pool,
>dynamic_state_block_pool);
 
-   anv_block_pool_init(>instruction_block_pool, device, 128 * 1024);
+   result = anv_block_pool_init(>instruction_block_pool, device,
+128 * 1024);
+   if (result != VK_SUCCESS)
+  goto fail_dynamic_state_block_pool;
+
anv_state_pool_init(>instruction_state_pool,
>instruction_block_pool);
 
-   anv_block_pool_init(>surface_state_block_pool, device, 4096);
+   result = anv_block_pool_init(>surface_state_block_pool, device,
+4096);
+   if (result != VK_SUCCESS)
+  goto fail_instruction_block_pool;
 
anv_state_pool_init(>surface_state_pool,
>surface_state_block_pool);
 
-   anv_bo_init_new(>workaround_bo, device, 1024);
+   result = anv_bo_init_new(>workaround_bo, device, 1024);
+   if (result != VK_SUCCESS)
+  goto fail_surface_state_block_pool;
 
anv_scratch_pool_init(device, >scratch_pool);
 
@@ -942,7 +968,7 @@ VkResult anv_CreateDevice(
   unreachable("unhandled gen");
}
if (result != VK_SUCCESS)
-  goto fail_fd;
+  goto fail_workaround_bo;
 
anv_device_init_blorp(device);
 
@@ -952,6 +978,25 @@ VkResult anv_CreateDevice(
 
return VK_SUCCESS;
 
+ fail_workaround_bo:
+   anv_gem_munmap(device->workaround_bo.map, device->workaround_bo.size);
+   anv_gem_close(device, device->workaround_bo.gem_handle);
+ fail_surface_state_block_pool:
+   anv_state_pool_finish(>surface_state_pool);
+   anv_block_pool_finish(>surface_state_block_pool);
+ fail_instruction_block_pool:
+   anv_state_pool_finish(>instruction_state_pool);
+   anv_block_pool_finish(>instruction_block_pool);
+ fail_dynamic_state_block_pool:
+   anv_state_pool_finish(>dynamic_state_pool);
+   anv_block_pool_finish(>dynamic_state_block_pool);
+ fail_batch_bo_pool:
+   anv_bo_pool_finish(>batch_bo_pool);
+   pthread_cond_destroy(>queue_submit);
+ fail_mutex:
+   pthread_mutex_destroy(>mutex);
+ fail_context_id:
+   anv_gem_destroy_context(device, device->context_id);
  fail_fd:
close(device->fd);
  fail_device:
-- 
2.10.2

___
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/mesa-dev

[Mesa-dev] [PATCH 3/4] anv/pipeline: Make the temp blend attachment state pointer const

[Jason Ekstrand]

This fixes a "discards const" warning since blend is const.
---
 src/intel/vulkan/genX_pipeline.c | 4 +++-
 1 file changed, 3 insertions(+), 1 deletion(-)

diff --git a/src/intel/vulkan/genX_pipeline.c b/src/intel/vulkan/genX_pipeline.c
index cb164ad..86dd647 100644
--- a/src/intel/vulkan/genX_pipeline.c
+++ b/src/intel/vulkan/genX_pipeline.c
@@ -1138,7 +1138,9 @@ emit_3dstate_ps(struct anv_pipeline *pipeline,
bool dual_src_blend = false;
if (wm_prog_data->dual_src_blend) {
   for (uint32_t i = 0; i < blend->attachmentCount; i++) {
- VkPipelineColorBlendAttachmentState *bstate = >pAttachments[i];
+ const VkPipelineColorBlendAttachmentState *bstate =
+>pAttachments[i];
+
  if (bstate->blendEnable &&
  (is_dual_src_blend_factor(bstate->srcColorBlendFactor) ||
   is_dual_src_blend_factor(bstate->dstColorBlendFactor) ||
-- 
2.5.0.400.gff86faf

___
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/mesa-dev

[Mesa-dev] [PATCH 1/4] intel/isl: Improve the get_row_pitch helpers

[Jason Ekstrand]

We add units to isl_surf_get_row_pitch, add a version that gets the pitch
in tiles, and assert that row and array pitch helpers that work in units of
surface elements only work on linear surfaces.
---
 src/intel/isl/isl.h | 20 ++--
 1 file changed, 18 insertions(+), 2 deletions(-)

diff --git a/src/intel/isl/isl.h b/src/intel/isl/isl.h
index 07368f9..930420c 100644
--- a/src/intel/isl/isl.h
+++ b/src/intel/isl/isl.h
@@ -1336,7 +1336,7 @@ isl_surf_get_image_alignment_sa(const struct isl_surf 
*surf)
  * Pitch between vertically adjacent surface elements, in bytes.
  */
 static inline uint32_t
-isl_surf_get_row_pitch(const struct isl_surf *surf)
+isl_surf_get_row_pitch_B(const struct isl_surf *surf)
 {
return surf->row_pitch;
 }
@@ -1347,13 +1347,27 @@ isl_surf_get_row_pitch(const struct isl_surf *surf)
 static inline uint32_t
 isl_surf_get_row_pitch_el(const struct isl_surf *surf)
 {
+   /* This only makes sense for linear surfaces */
+   assert(surf->tiling == ISL_TILING_LINEAR);
const struct isl_format_layout *fmtl = isl_format_get_layout(surf->format);
-
assert(surf->row_pitch % (fmtl->bpb / 8) == 0);
return surf->row_pitch / (fmtl->bpb / 8);
 }
 
 /**
+ * Pitch between vertically adjacent tiles, in units of tiles.
+ */
+static inline uint32_t
+isl_surf_get_row_pitch_tl(const struct isl_device *dev,
+  const struct isl_surf *surf)
+{
+   assert(surf->tiling != ISL_TILING_LINEAR);
+   struct isl_tile_info tile_info;
+   isl_surf_get_tile_info(dev, surf, _info);
+   return surf->row_pitch / tile_info.phys_extent_B.width;
+}
+
+/**
  * Pitch between physical array slices, in rows of surface elements.
  */
 static inline uint32_t
@@ -1368,6 +1382,8 @@ isl_surf_get_array_pitch_el_rows(const struct isl_surf 
*surf)
 static inline uint32_t
 isl_surf_get_array_pitch_el(const struct isl_surf *surf)
 {
+   /* This only makes sense for linear surfaces */
+   assert(surf->tiling == ISL_TILING_LINEAR);
return isl_surf_get_array_pitch_el_rows(surf) *
   isl_surf_get_row_pitch_el(surf);
 }
-- 
2.5.0.400.gff86faf

___
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/mesa-dev

[Mesa-dev] [PATCH 2/4] intel/isl: Use row_pitch helpers in isl_surf_fill_state

[Jason Ekstrand]

---
 src/intel/isl/isl_surface_state.c | 12 
 1 file changed, 4 insertions(+), 8 deletions(-)

diff --git a/src/intel/isl/isl_surface_state.c 
b/src/intel/isl/isl_surface_state.c
index 3bb0abd..27468b3 100644
--- a/src/intel/isl/isl_surface_state.c
+++ b/src/intel/isl/isl_surface_state.c
@@ -405,7 +405,7 @@ isl_genX(surf_fill_state_s)(const struct isl_device *dev, 
void *state,
   /* For gen9 1-D textures, surface pitch is ignored */
   s.SurfacePitch = 0;
} else {
-  s.SurfacePitch = info->surf->row_pitch - 1;
+  s.SurfacePitch = isl_surf_get_row_pitch_B(info->surf) - 1;
}
 
 #if GEN_GEN >= 8
@@ -503,14 +503,10 @@ isl_genX(surf_fill_state_s)(const struct isl_device *dev, 
void *state,
 
 #if GEN_GEN >= 7
if (info->aux_surf && info->aux_usage != ISL_AUX_USAGE_NONE) {
-  struct isl_tile_info tile_info;
-  isl_surf_get_tile_info(dev, info->aux_surf, _info);
-  uint32_t pitch_in_tiles =
- info->aux_surf->row_pitch / tile_info.phys_extent_B.width;
-
 #if GEN_GEN >= 8
   assert(GEN_GEN >= 9 || info->aux_usage != ISL_AUX_USAGE_CCS_E);
-  s.AuxiliarySurfacePitch = pitch_in_tiles - 1;
+  s.AuxiliarySurfacePitch =
+ isl_surf_get_row_pitch_tl(dev, info->aux_surf) - 1;
   /* Auxiliary surfaces in ISL have compressed formats but the hardware
* doesn't expect our definition of the compression, it expects qpitch
* in units of samples on the main surface.
@@ -523,7 +519,7 @@ isl_genX(surf_fill_state_s)(const struct isl_device *dev, 
void *state,
   assert(info->aux_usage == ISL_AUX_USAGE_MCS ||
  info->aux_usage == ISL_AUX_USAGE_CCS_D);
   s.MCSBaseAddress = info->aux_address,
-  s.MCSSurfacePitch = pitch_in_tiles - 1;
+  s.MCSSurfacePitch = isl_surf_get_row_pitch_tl(dev, info->aux_surf) - 1;
   s.MCSEnable = true;
 #endif
}
-- 
2.5.0.400.gff86faf

___
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/mesa-dev

[Mesa-dev] [PATCH 4/4] anv/pipeline: Make is_dual_src_blend_factor inline

[Jason Ekstrand]

It's not used on gen8+ so it causes unused function warnings.
---
 src/intel/vulkan/genX_pipeline.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/intel/vulkan/genX_pipeline.c b/src/intel/vulkan/genX_pipeline.c
index 86dd647..845d020 100644
--- a/src/intel/vulkan/genX_pipeline.c
+++ b/src/intel/vulkan/genX_pipeline.c
@@ -1100,7 +1100,7 @@ emit_3dstate_wm(struct anv_pipeline *pipeline, struct 
anv_subpass *subpass,
}
 }
 
-static bool
+static inline bool
 is_dual_src_blend_factor(VkBlendFactor factor)
 {
return factor == VK_BLEND_FACTOR_SRC1_COLOR ||
-- 
2.5.0.400.gff86faf

___
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/mesa-dev

[Mesa-dev] [PATCH] anv/cmd_buffer: Remove the 1-D case from the HiZ QPitch calculation

[Jason Ekstrand]

The 1-D special case doesn't actually apply to depth or HiZ.  I discovered
this while converting BLORP over to genxml and ISL.  The reason is that the
1-D special case only applies to the new Sky Lake 1-D layout which is only
used for LINEAR 1-D images.  For tiled 1-D images, such as depth buffers,
the old gen4 2-D layout is used and the QPitch should be in rows.

Cc: Nanley Chery 
Cc: "13.0" 
---
 src/intel/vulkan/genX_cmd_buffer.c | 9 ++---
 1 file changed, 6 insertions(+), 3 deletions(-)

diff --git a/src/intel/vulkan/genX_cmd_buffer.c 
b/src/intel/vulkan/genX_cmd_buffer.c
index a965cd6..2ef1745 100644
--- a/src/intel/vulkan/genX_cmd_buffer.c
+++ b/src/intel/vulkan/genX_cmd_buffer.c
@@ -2130,11 +2130,14 @@ cmd_buffer_emit_depth_stencil(struct anv_cmd_buffer 
*cmd_buffer)
   *- SURFTYPE_1D: distance in pixels between array slices
   *- SURFTYPE_2D/CUBE: distance in rows between array slices
   *- SURFTYPE_3D: distance in rows between R - slices
+  *
+  * Unfortunately, the docs aren't 100% accurate here.  They fail to
+  * mention that the 1-D rule only applies to linear 1-D images.
+  * Since depth and HiZ buffers are always tiled, we use the 2-D rule
+  * in the 1-D case.
   */
  hdb.SurfaceQPitch =
-image->aux_surface.isl.dim == ISL_SURF_DIM_1D ?
-   isl_surf_get_array_pitch_el(>aux_surface.isl) >> 2 :
-   isl_surf_get_array_pitch_el_rows(>aux_surface.isl) >> 2;
+isl_surf_get_array_pitch_el_rows(>aux_surface.isl) >> 2;
 #endif
   }
} else {
-- 
2.5.0.400.gff86faf

___
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/mesa-dev

Re: [Mesa-dev] [PATCH] anv/cmd_buffer: Remove the 1-D case from the HiZ QPitch calculation

[Jason Ekstrand]

drp... This should have been two patches... I'll resend

On Fri, Nov 25, 2016 at 10:13 PM, Jason Ekstrand 
wrote:

> The 1-D special case doesn't actually apply to depth or HiZ.  I discovered
> this while converting BLORP over to genxml and ISL.  The reason is that the
> 1-D special case only applies to the new Sky Lake 1-D layout which is only
> used for LINEAR 1-D images.  For tiled 1-D images, such as depth buffers,
> the old gen4 2-D layout is used and the QPitch should be in rows.
>
> Cc: Nanley Chery 
> Cc: "13.0" 
> ---
>  src/intel/isl/isl.h| 15 ++-
>  src/intel/isl/isl_surface_state.c  | 12 
>  src/intel/vulkan/genX_cmd_buffer.c |  9 ++---
>  3 files changed, 24 insertions(+), 12 deletions(-)
>
> diff --git a/src/intel/isl/isl.h b/src/intel/isl/isl.h
> index 07368f9..427724a 100644
> --- a/src/intel/isl/isl.h
> +++ b/src/intel/isl/isl.h
> @@ -1336,7 +1336,7 @@ isl_surf_get_image_alignment_sa(const struct
> isl_surf *surf)
>   * Pitch between vertically adjacent surface elements, in bytes.
>   */
>  static inline uint32_t
> -isl_surf_get_row_pitch(const struct isl_surf *surf)
> +isl_surf_get_row_pitch_B(const struct isl_surf *surf)
>  {
> return surf->row_pitch;
>  }
> @@ -1354,6 +1354,19 @@ isl_surf_get_row_pitch_el(const struct isl_surf
> *surf)
>  }
>
>  /**
> + * Pitch between vertically adjacent tiles, in units of tiles.
> + */
> +static inline uint32_t
> +isl_surf_get_row_pitch_tl(const struct isl_device *dev,
> +  const struct isl_surf *surf)
> +{
> +   assert(surf->tiling != ISL_TILING_LINEAR);
> +   struct isl_tile_info tile_info;
> +   isl_surf_get_tile_info(dev, surf, _info);
> +   return surf->row_pitch / tile_info.phys_extent_B.width;
> +}
> +
> +/**
>   * Pitch between physical array slices, in rows of surface elements.
>   */
>  static inline uint32_t
> diff --git a/src/intel/isl/isl_surface_state.c
> b/src/intel/isl/isl_surface_state.c
> index 3bb0abd..27468b3 100644
> --- a/src/intel/isl/isl_surface_state.c
> +++ b/src/intel/isl/isl_surface_state.c
> @@ -405,7 +405,7 @@ isl_genX(surf_fill_state_s)(const struct isl_device
> *dev, void *state,
>/* For gen9 1-D textures, surface pitch is ignored */
>s.SurfacePitch = 0;
> } else {
> -  s.SurfacePitch = info->surf->row_pitch - 1;
> +  s.SurfacePitch = isl_surf_get_row_pitch_B(info->surf) - 1;
> }
>
>  #if GEN_GEN >= 8
> @@ -503,14 +503,10 @@ isl_genX(surf_fill_state_s)(const struct isl_device
> *dev, void *state,
>
>  #if GEN_GEN >= 7
> if (info->aux_surf && info->aux_usage != ISL_AUX_USAGE_NONE) {
> -  struct isl_tile_info tile_info;
> -  isl_surf_get_tile_info(dev, info->aux_surf, _info);
> -  uint32_t pitch_in_tiles =
> - info->aux_surf->row_pitch / tile_info.phys_extent_B.width;
> -
>  #if GEN_GEN >= 8
>assert(GEN_GEN >= 9 || info->aux_usage != ISL_AUX_USAGE_CCS_E);
> -  s.AuxiliarySurfacePitch = pitch_in_tiles - 1;
> +  s.AuxiliarySurfacePitch =
> + isl_surf_get_row_pitch_tl(dev, info->aux_surf) - 1;
>/* Auxiliary surfaces in ISL have compressed formats but the
> hardware
> * doesn't expect our definition of the compression, it expects
> qpitch
> * in units of samples on the main surface.
> @@ -523,7 +519,7 @@ isl_genX(surf_fill_state_s)(const struct isl_device
> *dev, void *state,
>assert(info->aux_usage == ISL_AUX_USAGE_MCS ||
>   info->aux_usage == ISL_AUX_USAGE_CCS_D);
>s.MCSBaseAddress = info->aux_address,
> -  s.MCSSurfacePitch = pitch_in_tiles - 1;
> +  s.MCSSurfacePitch = isl_surf_get_row_pitch_tl(dev, info->aux_surf)
> - 1;
>s.MCSEnable = true;
>  #endif
> }
> diff --git a/src/intel/vulkan/genX_cmd_buffer.c
> b/src/intel/vulkan/genX_cmd_buffer.c
> index a965cd6..2ef1745 100644
> --- a/src/intel/vulkan/genX_cmd_buffer.c
> +++ b/src/intel/vulkan/genX_cmd_buffer.c
> @@ -2130,11 +2130,14 @@ cmd_buffer_emit_depth_stencil(struct
> anv_cmd_buffer *cmd_buffer)
>*- SURFTYPE_1D: distance in pixels between array slices
>*- SURFTYPE_2D/CUBE: distance in rows between array slices
>*- SURFTYPE_3D: distance in rows between R - slices
> +  *
> +  * Unfortunately, the docs aren't 100% accurate here.  They fail
> to
> +  * mention that the 1-D rule only applies to linear 1-D images.
> +  * Since depth and HiZ buffers are always tiled, we use the 2-D
> rule
> +  * in the 1-D case.
>*/
>   hdb.SurfaceQPitch =
> -image->aux_surface.isl.dim == ISL_SURF_DIM_1D ?
> -   isl_surf_get_array_pitch_el(>aux_surface.isl) >> 2
> :
> -   isl_surf_get_array_pitch_el_rows(>aux_surface.isl)
> >> 2;
> +isl_surf_get_array_pitch_el_rows(>aux_surface.isl) >>
> 2;
>  #endif
>}
> } else {
> --
> 

[Mesa-dev] [PATCH] anv/cmd_buffer: Remove the 1-D case from the HiZ QPitch calculation

[Jason Ekstrand]

The 1-D special case doesn't actually apply to depth or HiZ.  I discovered
this while converting BLORP over to genxml and ISL.  The reason is that the
1-D special case only applies to the new Sky Lake 1-D layout which is only
used for LINEAR 1-D images.  For tiled 1-D images, such as depth buffers,
the old gen4 2-D layout is used and the QPitch should be in rows.

Cc: Nanley Chery 
Cc: "13.0" 
---
 src/intel/isl/isl.h| 15 ++-
 src/intel/isl/isl_surface_state.c  | 12 
 src/intel/vulkan/genX_cmd_buffer.c |  9 ++---
 3 files changed, 24 insertions(+), 12 deletions(-)

diff --git a/src/intel/isl/isl.h b/src/intel/isl/isl.h
index 07368f9..427724a 100644
--- a/src/intel/isl/isl.h
+++ b/src/intel/isl/isl.h
@@ -1336,7 +1336,7 @@ isl_surf_get_image_alignment_sa(const struct isl_surf 
*surf)
  * Pitch between vertically adjacent surface elements, in bytes.
  */
 static inline uint32_t
-isl_surf_get_row_pitch(const struct isl_surf *surf)
+isl_surf_get_row_pitch_B(const struct isl_surf *surf)
 {
return surf->row_pitch;
 }
@@ -1354,6 +1354,19 @@ isl_surf_get_row_pitch_el(const struct isl_surf *surf)
 }
 
 /**
+ * Pitch between vertically adjacent tiles, in units of tiles.
+ */
+static inline uint32_t
+isl_surf_get_row_pitch_tl(const struct isl_device *dev,
+  const struct isl_surf *surf)
+{
+   assert(surf->tiling != ISL_TILING_LINEAR);
+   struct isl_tile_info tile_info;
+   isl_surf_get_tile_info(dev, surf, _info);
+   return surf->row_pitch / tile_info.phys_extent_B.width;
+}
+
+/**
  * Pitch between physical array slices, in rows of surface elements.
  */
 static inline uint32_t
diff --git a/src/intel/isl/isl_surface_state.c 
b/src/intel/isl/isl_surface_state.c
index 3bb0abd..27468b3 100644
--- a/src/intel/isl/isl_surface_state.c
+++ b/src/intel/isl/isl_surface_state.c
@@ -405,7 +405,7 @@ isl_genX(surf_fill_state_s)(const struct isl_device *dev, 
void *state,
   /* For gen9 1-D textures, surface pitch is ignored */
   s.SurfacePitch = 0;
} else {
-  s.SurfacePitch = info->surf->row_pitch - 1;
+  s.SurfacePitch = isl_surf_get_row_pitch_B(info->surf) - 1;
}
 
 #if GEN_GEN >= 8
@@ -503,14 +503,10 @@ isl_genX(surf_fill_state_s)(const struct isl_device *dev, 
void *state,
 
 #if GEN_GEN >= 7
if (info->aux_surf && info->aux_usage != ISL_AUX_USAGE_NONE) {
-  struct isl_tile_info tile_info;
-  isl_surf_get_tile_info(dev, info->aux_surf, _info);
-  uint32_t pitch_in_tiles =
- info->aux_surf->row_pitch / tile_info.phys_extent_B.width;
-
 #if GEN_GEN >= 8
   assert(GEN_GEN >= 9 || info->aux_usage != ISL_AUX_USAGE_CCS_E);
-  s.AuxiliarySurfacePitch = pitch_in_tiles - 1;
+  s.AuxiliarySurfacePitch =
+ isl_surf_get_row_pitch_tl(dev, info->aux_surf) - 1;
   /* Auxiliary surfaces in ISL have compressed formats but the hardware
* doesn't expect our definition of the compression, it expects qpitch
* in units of samples on the main surface.
@@ -523,7 +519,7 @@ isl_genX(surf_fill_state_s)(const struct isl_device *dev, 
void *state,
   assert(info->aux_usage == ISL_AUX_USAGE_MCS ||
  info->aux_usage == ISL_AUX_USAGE_CCS_D);
   s.MCSBaseAddress = info->aux_address,
-  s.MCSSurfacePitch = pitch_in_tiles - 1;
+  s.MCSSurfacePitch = isl_surf_get_row_pitch_tl(dev, info->aux_surf) - 1;
   s.MCSEnable = true;
 #endif
}
diff --git a/src/intel/vulkan/genX_cmd_buffer.c 
b/src/intel/vulkan/genX_cmd_buffer.c
index a965cd6..2ef1745 100644
--- a/src/intel/vulkan/genX_cmd_buffer.c
+++ b/src/intel/vulkan/genX_cmd_buffer.c
@@ -2130,11 +2130,14 @@ cmd_buffer_emit_depth_stencil(struct anv_cmd_buffer 
*cmd_buffer)
   *- SURFTYPE_1D: distance in pixels between array slices
   *- SURFTYPE_2D/CUBE: distance in rows between array slices
   *- SURFTYPE_3D: distance in rows between R - slices
+  *
+  * Unfortunately, the docs aren't 100% accurate here.  They fail to
+  * mention that the 1-D rule only applies to linear 1-D images.
+  * Since depth and HiZ buffers are always tiled, we use the 2-D rule
+  * in the 1-D case.
   */
  hdb.SurfaceQPitch =
-image->aux_surface.isl.dim == ISL_SURF_DIM_1D ?
-   isl_surf_get_array_pitch_el(>aux_surface.isl) >> 2 :
-   isl_surf_get_array_pitch_el_rows(>aux_surface.isl) >> 2;
+isl_surf_get_array_pitch_el_rows(>aux_surface.isl) >> 2;
 #endif
   }
} else {
-- 
2.5.0.400.gff86faf

___
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/mesa-dev

Re: [Mesa-dev] [PATCH 6/8] anv: don't leak memory if anv_init_wsi() fails

[Jason Ekstrand]

Reviewed-by: Jason Ekstrand 

On Thu, Nov 24, 2016 at 12:30 PM, Emil Velikov 
wrote:

> From: Emil Velikov 
>
> brw_compiler_create() rzalloc-ates memory which we forgot to free.
>
> Cc: "13.0" 
> Signed-off-by: Emil Velikov 
> ---
>  src/intel/vulkan/anv_device.c | 6 --
>  1 file changed, 4 insertions(+), 2 deletions(-)
>
> diff --git a/src/intel/vulkan/anv_device.c b/src/intel/vulkan/anv_device.c
> index 0e01e28..b4c2e4b 100644
> --- a/src/intel/vulkan/anv_device.c
> +++ b/src/intel/vulkan/anv_device.c
> @@ -203,8 +203,10 @@ anv_physical_device_init(struct anv_physical_device
> *device,
> device->compiler->shader_perf_log = compiler_perf_log;
>
> result = anv_init_wsi(device);
> -   if (result != VK_SUCCESS)
> -   goto fail;
> +   if (result != VK_SUCCESS) {
> +  ralloc_free(device->compiler);
> +  goto fail;
> +   }
>
> if (anv_device_get_cache_uuid(device->uuid)) {
>anv_finish_wsi(device);
> --
> 2.10.2
>
> ___
> mesa-dev mailing list
> mesa-dev@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/mesa-dev
>
___
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/mesa-dev

Re: [Mesa-dev] [PATCH 5/5] anv: Update the teardown in reverse order of the anv_CreateDevice

[Jason Ekstrand]

Reviewed-by: Jason Ekstrand 

On Fri, Nov 25, 2016 at 6:34 AM, Mun Gwan-gyeong  wrote:

> This updates releasing of resource in reverse order of the anv_CreateDevice
> to anv_DestroyDevice.
> And it fixes resource leak in pthread_mutex, pthread_cond, anv_gem_context.
>
> Signed-off-by: Mun Gwan-gyeong 
> ---
>  src/intel/vulkan/anv_device.c | 23 ++-
>  1 file changed, 14 insertions(+), 9 deletions(-)
>
> diff --git a/src/intel/vulkan/anv_device.c b/src/intel/vulkan/anv_device.c
> index 1964fb7..76ea4cf 100644
> --- a/src/intel/vulkan/anv_device.c
> +++ b/src/intel/vulkan/anv_device.c
> @@ -1007,10 +1007,10 @@ void anv_DestroyDevice(
>  {
> ANV_FROM_HANDLE(anv_device, device, _device);
>
> -   anv_queue_finish(>queue);
> -
> anv_device_finish_blorp(device);
>
> +   anv_queue_finish(>queue);
> +
>  #ifdef HAVE_VALGRIND
> /* We only need to free these to prevent valgrind errors.  The backing
>  * BO will go away in a couple of lines so we don't actually leak.
> @@ -1018,22 +1018,27 @@ void anv_DestroyDevice(
> anv_state_pool_free(>dynamic_state_pool,
> device->border_colors);
>  #endif
>
> +   anv_scratch_pool_finish(device, >scratch_pool);
> +
> anv_gem_munmap(device->workaround_bo.map, device->workaround_bo.size);
> anv_gem_close(device, device->workaround_bo.gem_handle);
>
> -   anv_bo_pool_finish(>batch_bo_pool);
> -   anv_state_pool_finish(>dynamic_state_pool);
> -   anv_block_pool_finish(>dynamic_state_block_pool);
> -   anv_state_pool_finish(>instruction_state_pool);
> -   anv_block_pool_finish(>instruction_block_pool);
> anv_state_pool_finish(>surface_state_pool);
> anv_block_pool_finish(>surface_state_block_pool);
> -   anv_scratch_pool_finish(device, >scratch_pool);
> +   anv_state_pool_finish(>instruction_state_pool);
> +   anv_block_pool_finish(>instruction_block_pool);
> +   anv_state_pool_finish(>dynamic_state_pool);
> +   anv_block_pool_finish(>dynamic_state_block_pool);
>
> -   close(device->fd);
> +   anv_bo_pool_finish(>batch_bo_pool);
>
> +   pthread_cond_destroy(>queue_submit);
> pthread_mutex_destroy(>mutex);
>
> +   anv_gem_destroy_context(device, device->context_id);
> +
> +   close(device->fd);
> +
> vk_free(>alloc, device);
>  }
>
> --
> 2.10.2
>
>
___
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/mesa-dev

Re: [Mesa-dev] [PATCH 4/5] anv: Add missing error-checking to anv_CreateDevice

[Jason Ekstrand]

On Fri, Nov 25, 2016 at 6:34 AM, Mun Gwan-gyeong  wrote:

> This patch adds missing error-checking and fixes resource leak in
> allocation failure path on anv_CreateDevice()
>
> Signed-off-by: Mun Gwan-gyeong 
> ---
>  src/intel/vulkan/anv_device.c | 59 ++
> ++---
>  1 file changed, 50 insertions(+), 9 deletions(-)
>
> diff --git a/src/intel/vulkan/anv_device.c b/src/intel/vulkan/anv_device.c
> index 0fd7d41..1964fb7 100644
> --- a/src/intel/vulkan/anv_device.c
> +++ b/src/intel/vulkan/anv_device.c
> @@ -893,31 +893,57 @@ VkResult anv_CreateDevice(
> device->robust_buffer_access = pCreateInfo->pEnabledFeatures &&
>pCreateInfo->pEnabledFeatures->robustBufferAccess;
>
> -   pthread_mutex_init(>mutex, NULL);
> +   if (pthread_mutex_init(>mutex, NULL) != 0) {
> +  result = vk_error(VK_ERROR_INITIALIZATION_FAILED);
> +  goto fail_context_id;
> +   }
>
> pthread_condattr_t condattr;
> -   pthread_condattr_init();
> -   pthread_condattr_setclock(, CLOCK_MONOTONIC);
> -   pthread_cond_init(>queue_submit, NULL);
> +   if (pthread_condattr_init() != 0) {
> +  result = vk_error(VK_ERROR_INITIALIZATION_FAILED);
> +  goto fail_mutex;
> +   }
> +   if (pthread_condattr_setclock(, CLOCK_MONOTONIC) != 0) {
> +  pthread_condattr_destroy();
> +  result = vk_error(VK_ERROR_INITIALIZATION_FAILED);
> +  goto fail_mutex;
> +   }
> +   if (pthread_cond_init(>queue_submit, NULL) != 0) {
> +  pthread_condattr_destroy();
> +  result = vk_error(VK_ERROR_INITIALIZATION_FAILED);
> +  goto fail_mutex;
> +   }
> pthread_condattr_destroy();
>
> anv_bo_pool_init(>batch_bo_pool, device);
>

You're missing the destructor for this below as well as destructors for all
of the state pools.  While I realize that those don't do anything
interesting if no states have been allocated yet, it'd be bets to include
them for completeness.


>
> -   anv_block_pool_init(>dynamic_state_block_pool, device, 16384);
> +   result = anv_block_pool_init(>dynamic_state_block_pool,
> device,
> +16384);
> +   if (result != VK_SUCCESS)
> +  goto fail_queue_submit;
>
> anv_state_pool_init(>dynamic_state_pool,
> >dynamic_state_block_pool);
>
> -   anv_block_pool_init(>instruction_block_pool, device, 128 *
> 1024);
> +   result = anv_block_pool_init(>instruction_block_pool, device,
> +128 * 1024);
> +   if (result != VK_SUCCESS)
> +  goto fail_dynamic_state_block_pool;
> +
> anv_state_pool_init(>instruction_state_pool,
> >instruction_block_pool);
>
> -   anv_block_pool_init(>surface_state_block_pool, device, 4096);
> +   result = anv_block_pool_init(>surface_state_block_pool,
> device,
> +4096);
> +   if (result != VK_SUCCESS)
> +  goto fail_instruction_block_pool;
>
> anv_state_pool_init(>surface_state_pool,
> >surface_state_block_pool);
>
> -   anv_bo_init_new(>workaround_bo, device, 1024);
> +   result = anv_bo_init_new(>workaround_bo, device, 1024);
> +   if (result != VK_SUCCESS)
> +  goto fail_surface_state_block_pool;
>
> anv_scratch_pool_init(device, >scratch_pool);
>
> @@ -942,7 +968,7 @@ VkResult anv_CreateDevice(
>unreachable("unhandled gen");
> }
> if (result != VK_SUCCESS)
> -  goto fail_fd;
> +  goto fail_workaround_bo;
>
> anv_device_init_blorp(device);
>
> @@ -952,6 +978,21 @@ VkResult anv_CreateDevice(
>
> return VK_SUCCESS;
>
> + fail_workaround_bo:
> +   anv_gem_munmap(device->workaround_bo.map, device->workaround_bo.size);
> +   anv_gem_close(device, device->workaround_bo.gem_handle);
> + fail_surface_state_block_pool:
> +   anv_block_pool_finish(>surface_state_block_pool);
> + fail_instruction_block_pool:
> +   anv_block_pool_finish(>instruction_block_pool);
> + fail_dynamic_state_block_pool:
> +   anv_block_pool_finish(>dynamic_state_block_pool);
> + fail_queue_submit:
> +   pthread_cond_destroy(>queue_submit);
> + fail_mutex:
> +   pthread_mutex_destroy(>mutex);
> + fail_context_id:
> +   anv_gem_destroy_context(device, device->context_id);
>   fail_fd:
> close(device->fd);
>   fail_device:
> --
> 2.10.2
>
>
___
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/mesa-dev

Re: [Mesa-dev] [PATCH 2/5] anv: drop the return type for anv_queue_init()

[Jason Ekstrand]

Reviewed-by: Jason Ekstrand 

On Fri, Nov 25, 2016 at 6:34 AM, Mun Gwan-gyeong  wrote:

> anv_queue_init() always returns VK_SUCCESS, so caller does not need
> to check return value of anv_queue_init().
>
> Signed-off-by: Mun Gwan-gyeong 
> ---
>  src/intel/vulkan/anv_device.c | 4 +---
>  1 file changed, 1 insertion(+), 3 deletions(-)
>
> diff --git a/src/intel/vulkan/anv_device.c b/src/intel/vulkan/anv_device.c
> index 2c8ac49..0fd7d41 100644
> --- a/src/intel/vulkan/anv_device.c
> +++ b/src/intel/vulkan/anv_device.c
> @@ -710,14 +710,12 @@ PFN_vkVoidFunction anv_GetDeviceProcAddr(
> return anv_lookup_entrypoint(>info, pName);
>  }
>
> -static VkResult
> +static void
>  anv_queue_init(struct anv_device *device, struct anv_queue *queue)
>  {
> queue->_loader_data.loaderMagic = ICD_LOADER_MAGIC;
> queue->device = device;
> queue->pool = >surface_state_pool;
> -
> -   return VK_SUCCESS;
>  }
>
>  static void
> --
> 2.10.2
>
>
___
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/mesa-dev

Re: [Mesa-dev] [PATCH 1/5] anv: Add missing error-checking to anv_block_pool_init (v2)

[Jason Ekstrand]

Reviewed-by: Jason Ekstrand 

On Fri, Nov 25, 2016 at 6:34 AM, Mun Gwan-gyeong  wrote:

> When the memfd_create() and u_vector_init() fail on anv_block_pool_init(),
> this patch makes to return VK_ERROR_INITIALIZATION_FAILED.
> All of initialization success on anv_block_pool_init(), it makes to return
> VK_SUCCESS.
>
> CID 1394319
>
> v2: Fixes from Emil's review:
>   a) Add the return type for propagating the return value to caller.
>   b) Changed anv_block_pool_init() to return VK_ERROR_INITIALIZATION_FAILED
>  on failure of initialization.
>
> Signed-off-by: Mun Gwan-gyeong 
> ---
>  src/intel/vulkan/anv_allocator.c | 27 +--
>  src/intel/vulkan/anv_private.h   |  4 ++--
>  2 files changed, 23 insertions(+), 8 deletions(-)
>
> diff --git a/src/intel/vulkan/anv_allocator.c b/src/intel/vulkan/anv_
> allocator.c
> index f472213..45c663b 100644
> --- a/src/intel/vulkan/anv_allocator.c
> +++ b/src/intel/vulkan/anv_allocator.c
> @@ -246,10 +246,12 @@ anv_ptr_free_list_push(void **list, void *elem)
>  static uint32_t
>  anv_block_pool_grow(struct anv_block_pool *pool, struct anv_block_state
> *state);
>
> -void
> +VkResult
>  anv_block_pool_init(struct anv_block_pool *pool,
>  struct anv_device *device, uint32_t block_size)
>  {
> +   VkResult result;
> +
> assert(util_is_power_of_two(block_size));
>
> pool->device = device;
> @@ -260,17 +262,23 @@ anv_block_pool_init(struct anv_block_pool *pool,
>
> pool->fd = memfd_create("block pool", MFD_CLOEXEC);
> if (pool->fd == -1)
> -  return;
> +  return vk_error(VK_ERROR_INITIALIZATION_FAILED);
>
> /* Just make it 2GB up-front.  The Linux kernel won't actually back it
>  * with pages until we either map and fault on one of them or we use
>  * userptr and send a chunk of it off to the GPU.
>  */
> -   if (ftruncate(pool->fd, BLOCK_POOL_MEMFD_SIZE) == -1)
> -  return;
> +   if (ftruncate(pool->fd, BLOCK_POOL_MEMFD_SIZE) == -1) {
> +  result = vk_error(VK_ERROR_INITIALIZATION_FAILED);
> +  goto fail_fd;
> +   }
>
> -   u_vector_init(>mmap_cleanups,
> -   round_to_power_of_two(sizeof(struct
> anv_mmap_cleanup)), 128);
> +   if (!u_vector_init(>mmap_cleanups,
> +  round_to_power_of_two(sizeof(struct
> anv_mmap_cleanup)),
> +  128)) {
> +  result = vk_error(VK_ERROR_INITIALIZATION_FAILED);
> +  goto fail_fd;
> +   }
>
> pool->state.next = 0;
> pool->state.end = 0;
> @@ -279,6 +287,13 @@ anv_block_pool_init(struct anv_block_pool *pool,
>
> /* Immediately grow the pool so we'll have a backing bo. */
> pool->state.end = anv_block_pool_grow(pool, >state);
> +
> +   return VK_SUCCESS;
> +
> + fail_fd:
> +   close(pool->fd);
> +
> +   return result;
>  }
>
>  void
> diff --git a/src/intel/vulkan/anv_private.h b/src/intel/vulkan/anv_
> private.h
> index 2fc543d..a7c31e3 100644
> --- a/src/intel/vulkan/anv_private.h
> +++ b/src/intel/vulkan/anv_private.h
> @@ -432,8 +432,8 @@ anv_state_clflush(struct anv_state state)
> anv_clflush_range(state.map, state.alloc_size);
>  }
>
> -void anv_block_pool_init(struct anv_block_pool *pool,
> - struct anv_device *device, uint32_t block_size);
> +VkResult anv_block_pool_init(struct anv_block_pool *pool,
> + struct anv_device *device, uint32_t
> block_size);
>  void anv_block_pool_finish(struct anv_block_pool *pool);
>  int32_t anv_block_pool_alloc(struct anv_block_pool *pool);
>  int32_t anv_block_pool_alloc_back(struct anv_block_pool *pool);
> --
> 2.10.2
>
>
___
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/mesa-dev

Re: [Mesa-dev] [PATCH 1/4] clover: Implement 'CL_MEM_OBJECT_IMAGE2D_ARRAY'

[Edward O'Callaghan]

On 11/25/2016 03:38 PM, Francisco Jerez wrote:
> Edward O'Callaghan  writes:
> 
>> Signed-off-by: Edward O'Callaghan 
>> ---
>>  src/gallium/state_trackers/clover/api/memory.cpp  | 17 -
>>  src/gallium/state_trackers/clover/core/memory.cpp | 14 ++
>>  src/gallium/state_trackers/clover/core/memory.hpp | 11 +++
>>  3 files changed, 41 insertions(+), 1 deletion(-)
>>
>> diff --git a/src/gallium/state_trackers/clover/api/memory.cpp 
>> b/src/gallium/state_trackers/clover/api/memory.cpp
>> index 9b3cd8b..58f56d1 100644
>> --- a/src/gallium/state_trackers/clover/api/memory.cpp
>> +++ b/src/gallium/state_trackers/clover/api/memory.cpp
>> @@ -181,6 +181,22 @@ clCreateImage(cl_context d_ctx, cl_mem_flags d_flags,
>>   desc->image_width, desc->image_height,
>>   desc->image_row_pitch, host_ptr);
>>  
>> +   case CL_MEM_OBJECT_IMAGE2D_ARRAY:
>> +  if (!desc->image_width || !desc->image_height)
>> + throw error(CL_INVALID_IMAGE_SIZE);
>> +
>> +  if (all_of([=](const device ) {
>> +   const size_t max = 1 << dev.max_image_levels_2d();
>> +   return (desc->image_width > max ||
>> +   desc->image_height > max);
>> +}, ctx.devices()))
>> + throw error(CL_INVALID_IMAGE_SIZE);
>> +
>> +  return new image2d_array(ctx, flags, format,
>> +   desc->image_width, desc->image_height,
>> +   desc->image_array_size, 
>> desc->image_slice_pitch,
>> +   host_ptr);
>> +
>> case CL_MEM_OBJECT_IMAGE3D:
>>if (!desc->image_width || !desc->image_height || !desc->image_depth)
>>   throw error(CL_INVALID_IMAGE_SIZE);
>> @@ -201,7 +217,6 @@ clCreateImage(cl_context d_ctx, cl_mem_flags d_flags,
>> case CL_MEM_OBJECT_IMAGE1D:
>> case CL_MEM_OBJECT_IMAGE1D_ARRAY:
>> case CL_MEM_OBJECT_IMAGE1D_BUFFER:
>> -   case CL_MEM_OBJECT_IMAGE2D_ARRAY:
>>// XXX - Not implemented.
>>throw error(CL_IMAGE_FORMAT_NOT_SUPPORTED);
>>  
>> diff --git a/src/gallium/state_trackers/clover/core/memory.cpp 
>> b/src/gallium/state_trackers/clover/core/memory.cpp
>> index b852e68..de1862b 100644
>> --- a/src/gallium/state_trackers/clover/core/memory.cpp
>> +++ b/src/gallium/state_trackers/clover/core/memory.cpp
>> @@ -198,6 +198,20 @@ image2d::type() const {
>> return CL_MEM_OBJECT_IMAGE2D;
>>  }
>>  
>> +image2d_array::image2d_array(clover::context , cl_mem_flags flags,
>> + const cl_image_format *format,
>> + size_t width, size_t height,
>> + size_t array_size, size_t slice_pitch,
>> + void *host_ptr) :
>> +   image(ctx, flags, format, width, height, 1,
>> + 0, slice_pitch, slice_pitch * array_size, host_ptr) {
>> +}
> 
> Seems like you aren't passing the row pitch as argument, and the array
> size is getting lost so you won't be able to recover it in order to
> implement memory transfer functions and CL image queries.
So I should extend the image base class with a private _array_size state
and a const getter method also, would that be reasonable?

> 
>> +
>> +cl_mem_object_type
>> +image2d_array::type() const {
>> +   return CL_MEM_OBJECT_IMAGE2D_ARRAY;
>> +}
>> +
>>  image3d::image3d(clover::context , cl_mem_flags flags,
>>   const cl_image_format *format,
>>   size_t width, size_t height, size_t depth,
>> diff --git a/src/gallium/state_trackers/clover/core/memory.hpp 
>> b/src/gallium/state_trackers/clover/core/memory.hpp
>> index bd6da6b..1a3e8c9 100644
>> --- a/src/gallium/state_trackers/clover/core/memory.hpp
>> +++ b/src/gallium/state_trackers/clover/core/memory.hpp
>> @@ -144,6 +144,17 @@ namespace clover {
>>virtual cl_mem_object_type type() const;
>> };
>>  
>> +   class image2d_array : public image {
>> +   public:
>> +  image2d_array(clover::context , cl_mem_flags flags,
>> +const cl_image_format *format,
>> +size_t width, size_t height,
>> +size_t array_size, size_t slice_pitch,
>> +void *host_ptr);
>> +
>> +  virtual cl_mem_object_type type() const;
>> +   };
>> +
>> class image3d : public image {
>> public:
>>image3d(clover::context , cl_mem_flags flags,
>> -- 
>> 2.7.4
>>
>> ___
>> mesa-dev mailing list
>> mesa-dev@lists.freedesktop.org
>> https://lists.freedesktop.org/mailman/listinfo/mesa-dev



signature.asc
Description: OpenPGP digital signature
___
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/mesa-dev

Re: [Mesa-dev] [PATCH 2/4] clover: Implement 'CL_MEM_OBJECT_IMAGE1D'

[Edward O'Callaghan]

Hi Francisco, thanks for the review..

On 11/25/2016 03:39 PM, Francisco Jerez wrote:
> Edward O'Callaghan  writes:
> 
>> Signed-off-by: Edward O'Callaghan 
>> ---
>>  src/gallium/state_trackers/clover/api/memory.cpp  |  9 -
>>  src/gallium/state_trackers/clover/core/memory.cpp | 13 +
>>  src/gallium/state_trackers/clover/core/memory.hpp | 10 ++
>>  3 files changed, 31 insertions(+), 1 deletion(-)
>>
>> diff --git a/src/gallium/state_trackers/clover/api/memory.cpp 
>> b/src/gallium/state_trackers/clover/api/memory.cpp
>> index 58f56d1..41e344e 100644
>> --- a/src/gallium/state_trackers/clover/api/memory.cpp
>> +++ b/src/gallium/state_trackers/clover/api/memory.cpp
>> @@ -166,6 +166,14 @@ clCreateImage(cl_context d_ctx, cl_mem_flags d_flags,
>> ret_error(r_errcode, CL_SUCCESS);
>>  
>> switch (desc->image_type) {
>> +   case CL_MEM_OBJECT_IMAGE1D:
>> +  if (!desc->image_width)
>> + throw error(CL_INVALID_IMAGE_SIZE);
>> +
> 
> We probably need to check that the specified image width is within the
> device limits -- There's no device::max_image_levels_1d() query but
> max_image_levels_2d() should work as well.
> 
>> +  return new image1d(ctx, flags, format,
>> + desc->image_width,
>> + desc->image_row_pitch, host_ptr);
>> +
>> case CL_MEM_OBJECT_IMAGE2D:
>>if (!desc->image_width || !desc->image_height)
>>   throw error(CL_INVALID_IMAGE_SIZE);
>> @@ -214,7 +222,6 @@ clCreateImage(cl_context d_ctx, cl_mem_flags d_flags,
>>   desc->image_depth, desc->image_row_pitch,
>>   desc->image_slice_pitch, host_ptr);
>>  
>> -   case CL_MEM_OBJECT_IMAGE1D:
>> case CL_MEM_OBJECT_IMAGE1D_ARRAY:
>> case CL_MEM_OBJECT_IMAGE1D_BUFFER:
>>// XXX - Not implemented.
>> diff --git a/src/gallium/state_trackers/clover/core/memory.cpp 
>> b/src/gallium/state_trackers/clover/core/memory.cpp
>> index de1862b..246bd2d 100644
>> --- a/src/gallium/state_trackers/clover/core/memory.cpp
>> +++ b/src/gallium/state_trackers/clover/core/memory.cpp
>> @@ -185,6 +185,19 @@ image::slice_pitch() const {
>> return _slice_pitch;
>>  }
>>  
>> +image1d::image1d(clover::context , cl_mem_flags flags,
>> + const cl_image_format *format,
>> + size_t width, size_t row_pitch,
>> + void *host_ptr) :
>> +   image(ctx, flags, format, width, 0, 1,
> 
> All surface dimension fields (width, height, depth) of a clover::image
> object are considered valid regardless of the image type, so we should
> set unused dimensions to 1 in order to avoid unexpected results while
> doing arithmetic or various error checking with them.
> 
>> + row_pitch, 0, row_pitch, host_ptr) {
> 
> I don't think you can rely on the row pitch to be meaningful for 1D
> images, it's probably necessary to pass it as argument to the
> constructor, we're probably better off calculating the size by hand.
Why not and what do you propose here exactly?

> 
>> +}
>> +
>> +cl_mem_object_type
>> +image1d::type() const {
>> +   return CL_MEM_OBJECT_IMAGE1D;
>> +}
>> +
>>  image2d::image2d(clover::context , cl_mem_flags flags,
>>   const cl_image_format *format, size_t width,
>>   size_t height, size_t row_pitch,
>> diff --git a/src/gallium/state_trackers/clover/core/memory.hpp 
>> b/src/gallium/state_trackers/clover/core/memory.hpp
>> index 1a3e8c9..ad9052b 100644
>> --- a/src/gallium/state_trackers/clover/core/memory.hpp
>> +++ b/src/gallium/state_trackers/clover/core/memory.hpp
>> @@ -134,6 +134,16 @@ namespace clover {
>> std::unique_ptr> resources;
>> };
>>  
>> +   class image1d : public image {
>> +   public:
>> +  image1d(clover::context , cl_mem_flags flags,
>> +  const cl_image_format *format,
>> +  size_t width, size_t row_pitch,
>> +  void *host_ptr);
>> +
>> +  virtual cl_mem_object_type type() const;
>> +   };
>> +
>> class image2d : public image {
>> public:
>>image2d(clover::context , cl_mem_flags flags,
>> -- 
>> 2.7.4
>>
>> ___
>> mesa-dev mailing list
>> mesa-dev@lists.freedesktop.org
>> https://lists.freedesktop.org/mailman/listinfo/mesa-dev



signature.asc
Description: OpenPGP digital signature
___
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/mesa-dev

[Mesa-dev] [PATCH] swr: don't clear all dirty bits when changing so targets

[Ilia Mirkin]

Among other things, blits would clear existing SO targets which would
cause a bunch of updates from u_blitter to be missed.

Fixes fbo-scissor-blit fbo, probably among many others.

Signed-off-by: Ilia Mirkin 
---
 src/gallium/drivers/swr/swr_state.cpp | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/gallium/drivers/swr/swr_state.cpp 
b/src/gallium/drivers/swr/swr_state.cpp
index 8541aca..f1cf4ae 100644
--- a/src/gallium/drivers/swr/swr_state.cpp
+++ b/src/gallium/drivers/swr/swr_state.cpp
@@ -1559,7 +1559,7 @@ swr_set_so_targets(struct pipe_context *pipe,
 
swr->num_so_targets = num_targets;
 
-   swr->dirty = SWR_NEW_SO;
+   swr->dirty |= SWR_NEW_SO;
 }
 
 
-- 
2.7.3

___
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/mesa-dev

[Mesa-dev] [PATCH] swr: [rasterizer core] fix typo in scissor tile-alignment logic

[Ilia Mirkin]

Signed-off-by: Ilia Mirkin 
---
 src/gallium/drivers/swr/rasterizer/core/api.cpp | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/gallium/drivers/swr/rasterizer/core/api.cpp 
b/src/gallium/drivers/swr/rasterizer/core/api.cpp
index 383a7ad..6c0d5dd 100644
--- a/src/gallium/drivers/swr/rasterizer/core/api.cpp
+++ b/src/gallium/drivers/swr/rasterizer/core/api.cpp
@@ -765,7 +765,7 @@ void SetupMacroTileScissors(DRAW_CONTEXT *pDC)
 tileAligned  = (scissorInFixedPoint.xmin % KNOB_TILE_X_DIM) == 0;
 tileAligned &= (scissorInFixedPoint.ymin % KNOB_TILE_Y_DIM) == 0;
 tileAligned &= (scissorInFixedPoint.xmax % KNOB_TILE_X_DIM) == 0;
-tileAligned &= (scissorInFixedPoint.xmax % KNOB_TILE_Y_DIM) == 0;
+tileAligned &= (scissorInFixedPoint.ymax % KNOB_TILE_Y_DIM) == 0;
 
 pState->scissorsTileAligned &= tileAligned;
 
-- 
2.7.3

___
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/mesa-dev

Re: [Mesa-dev] [PATCH] Revert "glsl/es31: precision qualifier doesn't need to match in shader interface block members"

[Rob Clark]

On Fri, Nov 25, 2016 at 3:43 PM, Kenneth Graunke  wrote:
> On Friday, November 25, 2016 3:19:57 PM PST Rob Clark wrote:
>> no worries.. I can keep the reverts locally (it is marginally easier
>> than rebuilding glmark2 and I only really care until I get far enough
>> with $new_hw to advertise desktop gl 2.0+.. otherwise I wouldn't be
>> using glmark2-es)
>>
>> BR,
>> -R
>
> See this bug:
> https://bugs.freedesktop.org/show_bug.cgi?id=97532
>
> Apparently glmark2 from git fixes these bugs.

yeah, saw that.. but it hasn't landed in rawhide yet.. and easier to
keep (locally) revert patches in mesa (which I'm constantly rebuilding
at this stage) than mess around w/ cmake and rebuilding glmark2 ;-)

pretty soon I won't care and will switch over to gl version of glmark2
and other more fancy things :-)

BR,
-R
___
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/mesa-dev

Re: [Mesa-dev] [PATCH] Revert "glsl/es31: precision qualifier doesn't need to match in shader interface block members"

[Kenneth Graunke]

On Friday, November 25, 2016 3:19:57 PM PST Rob Clark wrote:
> no worries.. I can keep the reverts locally (it is marginally easier
> than rebuilding glmark2 and I only really care until I get far enough
> with $new_hw to advertise desktop gl 2.0+.. otherwise I wouldn't be
> using glmark2-es)
> 
> BR,
> -R

See this bug:
https://bugs.freedesktop.org/show_bug.cgi?id=97532

Apparently glmark2 from git fixes these bugs.


signature.asc
Description: This is a digitally signed message part.
___
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/mesa-dev

Re: [Mesa-dev] [PATCH 1/3] anv: use do { } while (0) in the anv_finishme macro

[Kenneth Graunke]

On Thursday, November 24, 2016 6:18:13 PM PST Emil Velikov wrote:
> From: Emil Velikov 
> 
> Use the generic construct instead of the currect GCC specific one.
> 
> Cc: Kenneth Graunke 
> Suggested-by: Kenneth Graunke 
> Signed-off-by: Emil Velikov 
> ---
>  src/intel/vulkan/anv_private.h | 15 ---
>  1 file changed, 8 insertions(+), 7 deletions(-)
> 
> diff --git a/src/intel/vulkan/anv_private.h b/src/intel/vulkan/anv_private.h
> index 2fc543d..edc008d 100644
> --- a/src/intel/vulkan/anv_private.h
> +++ b/src/intel/vulkan/anv_private.h
> @@ -207,13 +207,14 @@ void anv_loge_v(const char *format, va_list va);
>  /**
>   * Print a FINISHME message, including its source location.
>   */
> -#define anv_finishme(format, ...) ({ \
> -   static bool reported = false; \
> -   if (!reported) { \
> -  __anv_finishme(__FILE__, __LINE__, format, ##__VA_ARGS__); \
> -  reported = true; \
> -   } \
> -})
> +#define anv_finishme(format, ...) \
> +   do { \
> +  static bool reported = false; \
> +  if (!reported) { \
> + __anv_finishme(__FILE__, __LINE__, format, ##__VA_ARGS__); \
> + reported = true; \
> +  } \
> +   } while (0)
>  
>  /* A non-fatal assert.  Useful for debugging. */
>  #ifdef DEBUG
> 

Reviewed-by: Kenneth Graunke 


signature.asc
Description: This is a digitally signed message part.
___
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/mesa-dev

Re: [Mesa-dev] [PATCH] Revert "glsl/es31: precision qualifier doesn't need to match in shader interface block members"

[Rob Clark]

no worries.. I can keep the reverts locally (it is marginally easier
than rebuilding glmark2 and I only really care until I get far enough
with $new_hw to advertise desktop gl 2.0+.. otherwise I wouldn't be
using glmark2-es)

BR,
-R

On Fri, Nov 25, 2016 at 3:10 PM, Ian Romanick  wrote:
> When I have a computer in front of me, I can look it up, but the GLSL ES
> 1.00 spec is quite clear on the topic. There was a bug a couple months ago
> where we discussed this to death.
>
>
>
> On November 25, 2016 9:44:10 AM Rob Clark  wrote:
>
>> hmm, that is annoying.. but is it required for gles2 as well?  or just
>> glsl 300+ shaders?
>>
>> maybe if CTS wasn't required in gles2 days, that is why ever other
>> driver let it slide..
>>
>> BR,
>> -R
>>
>> On Fri, Nov 25, 2016 at 12:39 PM, Ian Romanick 
>> wrote:
>>>
>>> The glmark tests are broken and not our problem. The spec has always
>>> required that precision qualifiers match. This patch is required to pass
>>> conformance. We absolutely cannot revert it.
>>>
>>>
>>>
>>> On November 25, 2016 6:37:47 AM Rob Clark  wrote:
>>>
 hmm, actually looks like we need to revert
 259fc505454ea6a67aeacf6cdebf1398d9947759 ("glsl/linker: Fail linking
 on ES if uniform precision qualifiers don't match") too

 On Fri, Nov 25, 2016 at 9:32 AM, Rob Clark  wrote:
>
>
> fwiw, issue is that a bunch (all) have "precision mediump float;" in
> frag shader, and list some uniforms in both frag and vert shader.  I'm
> not a spec lawyer, but pretty sure we should allow that.
>
> note that these are all gles2 shaders (not glsl 300 or 310)
>
> BR,
> -R
>
> On Fri, Nov 25, 2016 at 9:30 AM, Rob Clark  wrote:
>>
>>
>> This breaks a whole bunch of gles2 glmark2 "tests"..
>>
>> This reverts commit b50b82b8a553f93b4ee9ace734e4c53d5a388a35.
>> ---
>>  src/compiler/glsl/link_interface_blocks.cpp |  7 ++-
>>  src/compiler/glsl/linker.cpp| 10 +-
>>  2 files changed, 3 insertions(+), 14 deletions(-)
>>
>> diff --git a/src/compiler/glsl/link_interface_blocks.cpp
>> b/src/compiler/glsl/link_interface_blocks.cpp
>> index 4e91abc..abcc841 100644
>> --- a/src/compiler/glsl/link_interface_blocks.cpp
>> +++ b/src/compiler/glsl/link_interface_blocks.cpp
>> @@ -112,11 +112,8 @@ intrastage_match(ir_variable *a,
>> * don't force their types to match.  They might mismatch due
>> to
>> the two
>> * shaders using different GLSL versions, and that's ok.
>> */
>> -  if ((a->data.how_declared != ir_var_declared_implicitly ||
>> -   b->data.how_declared != ir_var_declared_implicitly) &&
>> -  (!prog->IsES || prog->Version != 310 ||
>> -   interstage_member_mismatch(prog, a->get_interface_type(),
>> -  b->get_interface_type(
>> +  if (a->data.how_declared != ir_var_declared_implicitly ||
>> +  b->data.how_declared != ir_var_declared_implicitly)
>>   return false;
>> }
>>
>> diff --git a/src/compiler/glsl/linker.cpp
>> b/src/compiler/glsl/linker.cpp
>> index cc28b26..e925d79 100644
>> --- a/src/compiler/glsl/linker.cpp
>> +++ b/src/compiler/glsl/linker.cpp
>> @@ -1081,15 +1081,7 @@ cross_validate_globals(struct gl_shader_program
>> *prog,
>>  return;
>>   }
>>
>> - /* Only in GLSL ES 3.10, the precision qualifier should not
>> match
>> -  * between block members defined in matched block names
>> within
>> a
>> -  * shader interface.
>> -  *
>> -  * In GLSL ES 3.00 and ES 3.20, precision qualifier for each
>> block
>> -  * member should match.
>> -  */
>> - if (prog->IsES && (prog->Version != 310 ||
>> !var->get_interface_type()) &&
>> - existing->data.precision != var->data.precision) {
>> + if (prog->IsES && existing->data.precision !=
>> var->data.precision) {
>>  linker_error(prog, "declarations for %s `%s` have "
>>   "mismatching precision qualifiers\n",
>>   mode_string(var), var->name);
>> --
>> 2.7.4
>>
>>>
>>>
>
>
___
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/mesa-dev

Re: [Mesa-dev] [PATCH] Revert "glsl/es31: precision qualifier doesn't need to match in shader interface block members"

[Ian Romanick]

When I have a computer in front of me, I can look it up, but the GLSL ES 
1.00 spec is quite clear on the topic. There was a bug a couple months ago 
where we discussed this to death.



On November 25, 2016 9:44:10 AM Rob Clark  wrote:


hmm, that is annoying.. but is it required for gles2 as well?  or just
glsl 300+ shaders?

maybe if CTS wasn't required in gles2 days, that is why ever other
driver let it slide..

BR,
-R

On Fri, Nov 25, 2016 at 12:39 PM, Ian Romanick  wrote:

The glmark tests are broken and not our problem. The spec has always
required that precision qualifiers match. This patch is required to pass
conformance. We absolutely cannot revert it.



On November 25, 2016 6:37:47 AM Rob Clark  wrote:


hmm, actually looks like we need to revert
259fc505454ea6a67aeacf6cdebf1398d9947759 ("glsl/linker: Fail linking
on ES if uniform precision qualifiers don't match") too

On Fri, Nov 25, 2016 at 9:32 AM, Rob Clark  wrote:


fwiw, issue is that a bunch (all) have "precision mediump float;" in
frag shader, and list some uniforms in both frag and vert shader.  I'm
not a spec lawyer, but pretty sure we should allow that.

note that these are all gles2 shaders (not glsl 300 or 310)

BR,
-R

On Fri, Nov 25, 2016 at 9:30 AM, Rob Clark  wrote:


This breaks a whole bunch of gles2 glmark2 "tests"..

This reverts commit b50b82b8a553f93b4ee9ace734e4c53d5a388a35.
---
 src/compiler/glsl/link_interface_blocks.cpp |  7 ++-
 src/compiler/glsl/linker.cpp| 10 +-
 2 files changed, 3 insertions(+), 14 deletions(-)

diff --git a/src/compiler/glsl/link_interface_blocks.cpp
b/src/compiler/glsl/link_interface_blocks.cpp
index 4e91abc..abcc841 100644
--- a/src/compiler/glsl/link_interface_blocks.cpp
+++ b/src/compiler/glsl/link_interface_blocks.cpp
@@ -112,11 +112,8 @@ intrastage_match(ir_variable *a,
* don't force their types to match.  They might mismatch due to
the two
* shaders using different GLSL versions, and that's ok.
*/
-  if ((a->data.how_declared != ir_var_declared_implicitly ||
-   b->data.how_declared != ir_var_declared_implicitly) &&
-  (!prog->IsES || prog->Version != 310 ||
-   interstage_member_mismatch(prog, a->get_interface_type(),
-  b->get_interface_type(
+  if (a->data.how_declared != ir_var_declared_implicitly ||
+  b->data.how_declared != ir_var_declared_implicitly)
  return false;
}

diff --git a/src/compiler/glsl/linker.cpp b/src/compiler/glsl/linker.cpp
index cc28b26..e925d79 100644
--- a/src/compiler/glsl/linker.cpp
+++ b/src/compiler/glsl/linker.cpp
@@ -1081,15 +1081,7 @@ cross_validate_globals(struct gl_shader_program
*prog,
 return;
  }

- /* Only in GLSL ES 3.10, the precision qualifier should not
match
-  * between block members defined in matched block names within
a
-  * shader interface.
-  *
-  * In GLSL ES 3.00 and ES 3.20, precision qualifier for each
block
-  * member should match.
-  */
- if (prog->IsES && (prog->Version != 310 ||
!var->get_interface_type()) &&
- existing->data.precision != var->data.precision) {
+ if (prog->IsES && existing->data.precision !=
var->data.precision) {
 linker_error(prog, "declarations for %s `%s` have "
  "mismatching precision qualifiers\n",
  mode_string(var), var->name);
--
2.7.4







___
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/mesa-dev

Re: [Mesa-dev] [PATCH] Revert "glsl/es31: precision qualifier doesn't need to match in shader interface block members"

[Rob Clark]

hmm, that is annoying.. but is it required for gles2 as well?  or just
glsl 300+ shaders?

maybe if CTS wasn't required in gles2 days, that is why ever other
driver let it slide..

BR,
-R

On Fri, Nov 25, 2016 at 12:39 PM, Ian Romanick  wrote:
> The glmark tests are broken and not our problem. The spec has always
> required that precision qualifiers match. This patch is required to pass
> conformance. We absolutely cannot revert it.
>
>
>
> On November 25, 2016 6:37:47 AM Rob Clark  wrote:
>
>> hmm, actually looks like we need to revert
>> 259fc505454ea6a67aeacf6cdebf1398d9947759 ("glsl/linker: Fail linking
>> on ES if uniform precision qualifiers don't match") too
>>
>> On Fri, Nov 25, 2016 at 9:32 AM, Rob Clark  wrote:
>>>
>>> fwiw, issue is that a bunch (all) have "precision mediump float;" in
>>> frag shader, and list some uniforms in both frag and vert shader.  I'm
>>> not a spec lawyer, but pretty sure we should allow that.
>>>
>>> note that these are all gles2 shaders (not glsl 300 or 310)
>>>
>>> BR,
>>> -R
>>>
>>> On Fri, Nov 25, 2016 at 9:30 AM, Rob Clark  wrote:

 This breaks a whole bunch of gles2 glmark2 "tests"..

 This reverts commit b50b82b8a553f93b4ee9ace734e4c53d5a388a35.
 ---
  src/compiler/glsl/link_interface_blocks.cpp |  7 ++-
  src/compiler/glsl/linker.cpp| 10 +-
  2 files changed, 3 insertions(+), 14 deletions(-)

 diff --git a/src/compiler/glsl/link_interface_blocks.cpp
 b/src/compiler/glsl/link_interface_blocks.cpp
 index 4e91abc..abcc841 100644
 --- a/src/compiler/glsl/link_interface_blocks.cpp
 +++ b/src/compiler/glsl/link_interface_blocks.cpp
 @@ -112,11 +112,8 @@ intrastage_match(ir_variable *a,
 * don't force their types to match.  They might mismatch due to
 the two
 * shaders using different GLSL versions, and that's ok.
 */
 -  if ((a->data.how_declared != ir_var_declared_implicitly ||
 -   b->data.how_declared != ir_var_declared_implicitly) &&
 -  (!prog->IsES || prog->Version != 310 ||
 -   interstage_member_mismatch(prog, a->get_interface_type(),
 -  b->get_interface_type(
 +  if (a->data.how_declared != ir_var_declared_implicitly ||
 +  b->data.how_declared != ir_var_declared_implicitly)
   return false;
 }

 diff --git a/src/compiler/glsl/linker.cpp b/src/compiler/glsl/linker.cpp
 index cc28b26..e925d79 100644
 --- a/src/compiler/glsl/linker.cpp
 +++ b/src/compiler/glsl/linker.cpp
 @@ -1081,15 +1081,7 @@ cross_validate_globals(struct gl_shader_program
 *prog,
  return;
   }

 - /* Only in GLSL ES 3.10, the precision qualifier should not
 match
 -  * between block members defined in matched block names within
 a
 -  * shader interface.
 -  *
 -  * In GLSL ES 3.00 and ES 3.20, precision qualifier for each
 block
 -  * member should match.
 -  */
 - if (prog->IsES && (prog->Version != 310 ||
 !var->get_interface_type()) &&
 - existing->data.precision != var->data.precision) {
 + if (prog->IsES && existing->data.precision !=
 var->data.precision) {
  linker_error(prog, "declarations for %s `%s` have "
   "mismatching precision qualifiers\n",
   mode_string(var), var->name);
 --
 2.7.4

>
>
___
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/mesa-dev

Re: [Mesa-dev] [PATCH] Revert "glsl/es31: precision qualifier doesn't need to match in shader interface block members"

[Ian Romanick]

The glmark tests are broken and not our problem. The spec has always 
required that precision qualifiers match. This patch is required to pass 
conformance. We absolutely cannot revert it.



On November 25, 2016 6:37:47 AM Rob Clark  wrote:


hmm, actually looks like we need to revert
259fc505454ea6a67aeacf6cdebf1398d9947759 ("glsl/linker: Fail linking
on ES if uniform precision qualifiers don't match") too

On Fri, Nov 25, 2016 at 9:32 AM, Rob Clark  wrote:

fwiw, issue is that a bunch (all) have "precision mediump float;" in
frag shader, and list some uniforms in both frag and vert shader.  I'm
not a spec lawyer, but pretty sure we should allow that.

note that these are all gles2 shaders (not glsl 300 or 310)

BR,
-R

On Fri, Nov 25, 2016 at 9:30 AM, Rob Clark  wrote:

This breaks a whole bunch of gles2 glmark2 "tests"..

This reverts commit b50b82b8a553f93b4ee9ace734e4c53d5a388a35.
---
 src/compiler/glsl/link_interface_blocks.cpp |  7 ++-
 src/compiler/glsl/linker.cpp| 10 +-
 2 files changed, 3 insertions(+), 14 deletions(-)

diff --git a/src/compiler/glsl/link_interface_blocks.cpp 
b/src/compiler/glsl/link_interface_blocks.cpp

index 4e91abc..abcc841 100644
--- a/src/compiler/glsl/link_interface_blocks.cpp
+++ b/src/compiler/glsl/link_interface_blocks.cpp
@@ -112,11 +112,8 @@ intrastage_match(ir_variable *a,
* don't force their types to match.  They might mismatch due to the two
* shaders using different GLSL versions, and that's ok.
*/
-  if ((a->data.how_declared != ir_var_declared_implicitly ||
-   b->data.how_declared != ir_var_declared_implicitly) &&
-  (!prog->IsES || prog->Version != 310 ||
-   interstage_member_mismatch(prog, a->get_interface_type(),
-  b->get_interface_type(
+  if (a->data.how_declared != ir_var_declared_implicitly ||
+  b->data.how_declared != ir_var_declared_implicitly)
  return false;
}

diff --git a/src/compiler/glsl/linker.cpp b/src/compiler/glsl/linker.cpp
index cc28b26..e925d79 100644
--- a/src/compiler/glsl/linker.cpp
+++ b/src/compiler/glsl/linker.cpp
@@ -1081,15 +1081,7 @@ cross_validate_globals(struct gl_shader_program *prog,
 return;
  }

- /* Only in GLSL ES 3.10, the precision qualifier should not match
-  * between block members defined in matched block names within a
-  * shader interface.
-  *
-  * In GLSL ES 3.00 and ES 3.20, precision qualifier for each block
-  * member should match.
-  */
- if (prog->IsES && (prog->Version != 310 || 
!var->get_interface_type()) &&

- existing->data.precision != var->data.precision) {
+ if (prog->IsES && existing->data.precision != var->data.precision) {
 linker_error(prog, "declarations for %s `%s` have "
  "mismatching precision qualifiers\n",
  mode_string(var), var->name);
--
2.7.4




___
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/mesa-dev

Re: [Mesa-dev] [PATCH] anv/state: if enabled, use anisotropic filtering also with VK_FILTER_NEAREST

[Jason Ekstrand]

On Nov 24, 2016 11:19 PM, "Iago Toral"  wrote:
>
> On Thu, 2016-11-24 at 16:28 -0800, Jason Ekstrand wrote:
> >
> > On Nov 24, 2016 7:12 AM, "Iago Toral"  wrote:
> > >
> > > On Thu, 2016-11-24 at 14:33 +0100, Iago Toral wrote:
> > > > Hi Lionel,
> > > >
> > > > On Thu, 2016-11-24 at 13:08 +, Lionel Landwerlin wrote:
> > > > >
> > > > > Hi Iago,
> > > > >
> > > > > Looking at the history, before
> > > > > ed4fe3e9ba9018e68afe6fdd4f267218a537fdaa
> > > > > we seem to set min/mag filter to MAPFILTER_ANISOTROPIC if
> > > > > maxAnisotropy
> > > > >  > 1. It seems your patch makes sense in using
> > > > > MAPFILTER_ANISOTROPIC
> > > > > in
> > > > > the NEAREST case, but I wonder whether we should also check
> > for
> > > > > maxAnisotropy > 1.
> > > > Right, good catch, although I think that if we do that it should
> > be a
> > > > separate change since we are not currently checking that for the
> > > > linear
> > > > filter either.
> > In GL, there is no explicit enable.  It's just assumed that it's
> > "always on" and the anisotropy value being 1.0 or > 1.0 enables and
> > disables it.  Vulkan has an explicit bit so we should use that.
> > > > It seems that we do check for this in OpenGL so I think we
> > probably
> > > > should do that here as well unless Jason dropped it for Vulkan on
> > > > purpose for some reason in that commit.
> > > >
> > > > I'll send a separate patch for this after I confirm that it does
> > not
> > > > alter the results for the tests in CTS if we add that check.
> > >
> > > Actually, thinking about this a bit more, I don't think we need
> >  That
> > > commit is about honoring SamplerCreateInfo.anisotropyEnable to
> > decide
> > > whether to activate anisotropic filtering, so if that is true we
> > want
> > > to use that. Notice that since that commit we clamp the anisotropy
> > > ratio to ensure it is in a valid range. If we pass a maxAnisotropy
> > > value < 1, it will clamp it to the minimum value we can work with,
> > so I
> > > think Jason did that change on purpose.
> > You overestimate the amount of thought I put into anisotropic
> > filtering.  :-)
> > I think this patch is probably correct.  At the very least, I don't
> > think it's wrong.  I'm not sure that it makes sense to use
> > anisotropic filtering with NEAREST.  I'm not even quite sure what
> > that would mean.  The spec certainly doesn't say.  Anyway, I think
> > I'm fine with this but a bit more digging to make sure we're actually
> > doing it right might be in order.
>
> If you're using anisotropic filtering to enhance texture quality it
> would seem odd that someone would use it with a nearest filter, but I
> have not seen any indication that this combination should not be
> allowed. After all, anisotropic filtering is conceptually orthogonal to
> nearest/linear filtering.
>
> I did not find any references in the Vulkan docs, but at least in
> OpenGL this is explained in EXT_texture_filter_anisotropic  and they
> actually mention the combination of nearest+anisotropic filtering
> explicitly:
>
> https://www.opengl.org/registry/specs/EXT/texture_filter_anisotropic.tx
> t
>
>"A texture's maximum degree of anisotropy is specified independent
> from the texture's minification and magnification filter (as
> opposed to being supported as an entirely new filtering mode).
> Implementations are free to use the specified minification and
> magnification filter to select a particular anisotropic texture
> filtering scheme.  For example, a NEAREST filter with a maximum
> degree of anisotropy of two could be treated as a 2-tap filter that
> accounts for the direction of anisotropy.  Implementations are also
> permitted to ignore the minification or magnification filter and
> implement the highest quality of anisotropic filtering possible."

I think the key there is "free to use".  In other words, we are also free
to ignore the minification and magnification filters when anisotropic
filtering is enabled which is what this patch does.  With anisotropic
filtering enabled, they just become implementation-specific knobs to adjust
the algorithm.  With that understanding, this patch is 100% correct.

> So basically, some drivers/hardware may have nearest + anisotropy work
> slightly different than linear + anisotropy. Not sure when that is
> helpful, but it seems that it should be possible to do it.
>
> Iago
>
> > Reviewed-by: Jason Ekstrand 
> > > Sounds reasonable?
> > >
> > > > Iago
> > > >
> > > > >
> > > > > On 24/11/16 11:30, Iago Toral Quiroga wrote:
> > > > > >
> > > > > >
> > > > > > Fixes multiple Vulkan CTS tests that combine anisotropy and
> > > > > > VK_FILTER_NEAREST
> > > > > > in dEQP-VK.texture.filtering_anisotropy.*
> > > > > > ---
> > > > > >   src/intel/vulkan/genX_state.c | 2 +-
> > > > > >   1 file changed, 1 insertion(+), 1 deletion(-)
> > > > > >
> > > > > > diff --git a/src/intel/vulkan/genX_state.c
> > 

Re: [Mesa-dev] [PATCH v2] gbm/drm: Pick the oldest available buffer in get_back_bo

[Emil Velikov]

On 23 November 2016 at 22:40, Derek Foreman  wrote:
> Applications may query the back buffer age to efficiently perform
> partial updates. Generally the application will keep a fixed length
> damage history, and use this to calculate what needs to be redrawn
> based on the age of the back buffer it's about to render to.
>
> If presented with a buffer that has an age greater than the
> length of the damage history, the application will likely have
> to completely repaint the buffer.
>
> Our current buffer selection strategy is to pick the first available
> buffer without considering its age.  If an application frequently
> manages to fit within two buffers but occasionally requires a third,
> this extra buffer will almost always be old enough to fall outside
> of a reasonably long damage history, and require a full repaint.
>
> This patch changes the buffer selection behaviour to prefer the oldest
> available buffer.
>
> By selecting the oldest available buffer, the application will likely
> always be able to use its damage history, at a cost of having to
> perform slightly more work every frame.  This is an improvement if
> the cost of a full repaint is heavy, and the surface damage between
> frames is relatively small.
>
> It should be noted that since we don't currently trim our queue in
> any way, an application that briefly needs a large number of buffers
> will continue to receive older buffers than it would if it only ever
> needed two buffers.
>
> Reviewed-by: Daniel Stone 
> Signed-off-by: Derek Foreman 
> ---
>
> The only changes are in the commit log, which hopefully better
> expresses the rationale for the change.
>
>  src/egl/drivers/dri2/platform_drm.c | 6 --
>  1 file changed, 4 insertions(+), 2 deletions(-)
>
> diff --git a/src/egl/drivers/dri2/platform_drm.c 
> b/src/egl/drivers/dri2/platform_drm.c
> index 2099314..f812ab5 100644
> --- a/src/egl/drivers/dri2/platform_drm.c
> +++ b/src/egl/drivers/dri2/platform_drm.c
> @@ -215,13 +215,15 @@ get_back_bo(struct dri2_egl_surface *dri2_surf)
> struct dri2_egl_display *dri2_dpy =
>dri2_egl_display(dri2_surf->base.Resource.Display);
> struct gbm_dri_surface *surf = dri2_surf->gbm_surf;
> +   int age = 0;
> unsigned i;
>
> if (dri2_surf->back == NULL) {
>for (i = 0; i < ARRAY_SIZE(dri2_surf->color_buffers); i++) {
> -if (!dri2_surf->color_buffers[i].locked) {
> +if (!dri2_surf->color_buffers[i].locked &&
> + dri2_surf->color_buffers[i].age >= age) {
> dri2_surf->back = _surf->color_buffers[i];
> -   break;
> +   age = dri2_surf->color_buffers[i].age;
Don't we want to apply this in the platform_wayland as well ?
One thing that comes to mind is that wayland does purge the
old/unlocked buffers via update_buffers() thus the scenario mentioned
above is not so significant..

Looking at how close yet different drm and wayland codepaths are makes
me wonder if we have some subtle functionality differences or it's
mostly due to shortage of time/testing.

Thanks
Emil
___
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/mesa-dev

Re: [Mesa-dev] [PATCH] Revert "glsl/es31: precision qualifier doesn't need to match in shader interface block members"

[Eero Tamminen]

Hi,

Please look at:
https://github.com/glmark2/glmark2/issues/25
https://bugs.freedesktop.org/show_bug.cgi?id=97532
https://bugs.freedesktop.org/show_bug.cgi?id=97804


- Eero

On 25.11.2016 16:37, Rob Clark wrote:

hmm, actually looks like we need to revert
259fc505454ea6a67aeacf6cdebf1398d9947759 ("glsl/linker: Fail linking
on ES if uniform precision qualifiers don't match") too

On Fri, Nov 25, 2016 at 9:32 AM, Rob Clark  wrote:

fwiw, issue is that a bunch (all) have "precision mediump float;" in
frag shader, and list some uniforms in both frag and vert shader.  I'm
not a spec lawyer, but pretty sure we should allow that.

note that these are all gles2 shaders (not glsl 300 or 310)

BR,
-R

On Fri, Nov 25, 2016 at 9:30 AM, Rob Clark  wrote:

This breaks a whole bunch of gles2 glmark2 "tests"..

This reverts commit b50b82b8a553f93b4ee9ace734e4c53d5a388a35.
---
 src/compiler/glsl/link_interface_blocks.cpp |  7 ++-
 src/compiler/glsl/linker.cpp| 10 +-
 2 files changed, 3 insertions(+), 14 deletions(-)

diff --git a/src/compiler/glsl/link_interface_blocks.cpp 
b/src/compiler/glsl/link_interface_blocks.cpp
index 4e91abc..abcc841 100644
--- a/src/compiler/glsl/link_interface_blocks.cpp
+++ b/src/compiler/glsl/link_interface_blocks.cpp
@@ -112,11 +112,8 @@ intrastage_match(ir_variable *a,
* don't force their types to match.  They might mismatch due to the two
* shaders using different GLSL versions, and that's ok.
*/
-  if ((a->data.how_declared != ir_var_declared_implicitly ||
-   b->data.how_declared != ir_var_declared_implicitly) &&
-  (!prog->IsES || prog->Version != 310 ||
-   interstage_member_mismatch(prog, a->get_interface_type(),
-  b->get_interface_type(
+  if (a->data.how_declared != ir_var_declared_implicitly ||
+  b->data.how_declared != ir_var_declared_implicitly)
  return false;
}

diff --git a/src/compiler/glsl/linker.cpp b/src/compiler/glsl/linker.cpp
index cc28b26..e925d79 100644
--- a/src/compiler/glsl/linker.cpp
+++ b/src/compiler/glsl/linker.cpp
@@ -1081,15 +1081,7 @@ cross_validate_globals(struct gl_shader_program *prog,
 return;
  }

- /* Only in GLSL ES 3.10, the precision qualifier should not match
-  * between block members defined in matched block names within a
-  * shader interface.
-  *
-  * In GLSL ES 3.00 and ES 3.20, precision qualifier for each block
-  * member should match.
-  */
- if (prog->IsES && (prog->Version != 310 || !var->get_interface_type()) 
&&
- existing->data.precision != var->data.precision) {
+ if (prog->IsES && existing->data.precision != var->data.precision) {
 linker_error(prog, "declarations for %s `%s` have "
  "mismatching precision qualifiers\n",
  mode_string(var), var->name);
--
2.7.4


___
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/mesa-dev



___
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/mesa-dev

[Mesa-dev] [Bug 98833] [REGRESSION, bisected] Wayland revert commit breaks fullscreen frame updates

[bugzilla-daemon]

https://bugs.freedesktop.org/show_bug.cgi?id=98833

--- Comment #7 from Eero Tamminen  ---
(In reply to Eero Tamminen from comment #3)
> They were just options in the test-suite, I'll check whether they actually
> should do something on EGL/Wayland (test-suite supports also other APIs & 
> OSes, so it's possible that all options aren't supported on all platforms).

-> Frame buffer count option has no effect at all in EGL/Wayland, VSync option
maps to eglSwapInterval() call.


Is there something minimal like glxgears for Wayland, which sources I could
easily modify to do screen updates similarly to the test-suite I'm using?

-- 
You are receiving this mail because:
You are the QA Contact for the bug.___
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/mesa-dev

[Mesa-dev] [Bug 98833] [REGRESSION, bisected] Wayland revert commit breaks fullscreen frame updates

[bugzilla-daemon]

https://bugs.freedesktop.org/show_bug.cgi?id=98833

--- Comment #6 from Eero Tamminen  ---
Wrong frame ordering issue doesn't happen with (Ubuntu 16.04 version of) Gnome
Wayland, only with Weston.

The difference between them is that gnome-shell does seem to do compositing as
gnome-shell is doing buffer swaps while the tests are running, and Weston
doesn't (there are no GL draw calls either).  I.e. (Ubuntu 16.04 version of)
Gnome Wayland is NOT a valid test-case for this bug.

(In the worst case, for one test gnome-shell managed to do updates only at 15
FPS while test minimum was >120 FPS.  That was very visible and another reason
why I looked into frame updates.)

-- 
You are receiving this mail because:
You are the QA Contact for the bug.___
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/mesa-dev

[Mesa-dev] [Bug 98842] mesa 13.0.1 build broken under debian8

[bugzilla-daemon]

https://bugs.freedesktop.org/show_bug.cgi?id=98842

Emil Velikov  changed:

   What|Removed |Added

URL||https://bugs.freedesktop.or
   ||g/show_bug.cgi?id=80848

--- Comment #4 from Emil Velikov  ---
The only things which comes to mind is that you have the system ones (in
/usr/lib or similar for Debian) and we and up picking the wrong one during
relink due to a libtool feature (more like a bug imho).

I.e. we end up with something like the following (check with $make V=1 install)
... -L/usr/lib ... -L/usr/local/lib ... -ldrm ...

Some solutions/workarounds include:
 - teach libtool to use the same link line on relink
I have no success on this one, yet.
 - use chroot (or similar solution)
Needs some setup, but should work
 - temporary move/upgrade the specified package
A bit nasty, does not scale but should work.
 - use another libtool ?
Don't recall how exactly slibtool performed here.

-- 
You are receiving this mail because:
You are the QA Contact for the bug.
You are the assignee for the bug.___
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/mesa-dev

Re: [Mesa-dev] [PATCH] vulkan/wsi: Fix resource leak in success path of wsi_queue_init()

[Eduardo Lima Mitev]

On 11/25/2016 03:39 PM, Mun Gwan-gyeong wrote:
> It fixes leakage of pthread_condattr resource on wsi_queue_init()
> 

Good catch.

Reviewed-by: Eduardo Lima Mitev 

> Signed-off-by: Mun Gwan-gyeong 
> ---
>  src/vulkan/wsi/wsi_common_queue.h | 1 +
>  1 file changed, 1 insertion(+)
> 
> diff --git a/src/vulkan/wsi/wsi_common_queue.h 
> b/src/vulkan/wsi/wsi_common_queue.h
> index 0e72c8d..6d489cb 100644
> --- a/src/vulkan/wsi/wsi_common_queue.h
> +++ b/src/vulkan/wsi/wsi_common_queue.h
> @@ -65,6 +65,7 @@ wsi_queue_init(struct wsi_queue *queue, int length)
> if (ret)
>goto fail_cond;
>  
> +   pthread_condattr_destroy();
> return 0;
>  
>  fail_cond:
> 

___
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/mesa-dev

[Mesa-dev] [Bug 98842] mesa 13.0.1 build broken under debian8

[bugzilla-daemon]

https://bugs.freedesktop.org/show_bug.cgi?id=98842

--- Comment #3 from Emil Velikov  ---
libdrm_* files are irrelevant here. libdrm.so* is the ones of interest.

Are you sure your system does not have other libdrm.so* and libdrm.pc files ?

-- 
You are receiving this mail because:
You are the QA Contact for the bug.
You are the assignee for the bug.___
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/mesa-dev

Re: [Mesa-dev] [PATCH 2/2] gm107/ir: optimize 32-bit CONST load to mov

[Ilia Mirkin]

Reviewed-by: Ilia Mirkin 

On Fri, Nov 25, 2016 at 5:07 AM, Samuel Pitoiset
 wrote:
> This is not allowed for indirect accesses because the source
> GPR might be erased by a subsequent instruction (WaR hazard)
> if we don't emit a read dep bar.
>
> Signed-off-by: Samuel Pitoiset 
> ---
>  .../drivers/nouveau/codegen/nv50_ir_lowering_gm107.cpp   | 16 
> 
>  .../drivers/nouveau/codegen/nv50_ir_lowering_gm107.h |  1 +
>  2 files changed, 17 insertions(+)
>
> diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_gm107.cpp 
> b/src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_gm107.cpp
> index ead6f9e..2c0e8de 100644
> --- a/src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_gm107.cpp
> +++ b/src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_gm107.cpp
> @@ -61,6 +61,19 @@ GM107LegalizeSSA::handlePFETCH(Instruction *i)
> i->setSrc(1, NULL);
>  }
>
> +void
> +GM107LegalizeSSA::handleLOAD(Instruction *i)
> +{
> +   if (i->src(0).getFile() != FILE_MEMORY_CONST)
> +  return;
> +   if (i->src(0).isIndirect(0))
> +  return;
> +   if (typeSizeof(i->dType) != 4)
> +  return;
> +
> +   i->op = OP_MOV;
> +}
> +
>  bool
>  GM107LegalizeSSA::visit(Instruction *i)
>  {
> @@ -68,6 +81,9 @@ GM107LegalizeSSA::visit(Instruction *i)
> case OP_PFETCH:
>handlePFETCH(i);
>break;
> +   case OP_LOAD:
> +  handleLOAD(i);
> +  break;
> default:
>break;
> }
> diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_gm107.h 
> b/src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_gm107.h
> index 8cac76f..f51c2bb 100644
> --- a/src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_gm107.h
> +++ b/src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_gm107.h
> @@ -22,6 +22,7 @@ private:
> virtual bool visit(Instruction *);
>
> void handlePFETCH(Instruction *);
> +   void handleLOAD(Instruction *);
>
> struct BarUse {
>BarUse(Instruction *use, const Instruction *bar)
> --
> 2.10.1
>
> ___
> mesa-dev mailing list
> mesa-dev@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/mesa-dev
___
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/mesa-dev

Re: [Mesa-dev] [PATCH 1/2] gm107/ir: do not combine CONST loads

[Ilia Mirkin]

Reviewed-by: Ilia Mirkin 

On Fri, Nov 25, 2016 at 5:07 AM, Samuel Pitoiset
 wrote:
> This will allow to use MOV instead of LD. The main advantage is
> that MOV doesn't require a read dependency barrier while LD does,
> and so this will both reduce barriers pressure and the number of
> stall counts needed to read data from constant memory.
>
> This is currently only for user uniform accesses. I should do
> something similar when loading from the driver constant buffer
> but it seems like a bit tricky to handle for now.
>
> Signed-off-by: Samuel Pitoiset 
> ---
>  src/gallium/drivers/nouveau/codegen/nv50_ir_target_nvc0.cpp | 9 +++--
>  1 file changed, 7 insertions(+), 2 deletions(-)
>
> diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_target_nvc0.cpp 
> b/src/gallium/drivers/nouveau/codegen/nv50_ir_target_nvc0.cpp
> index 4c75ea6..1a9a4e4 100644
> --- a/src/gallium/drivers/nouveau/codegen/nv50_ir_target_nvc0.cpp
> +++ b/src/gallium/drivers/nouveau/codegen/nv50_ir_target_nvc0.cpp
> @@ -410,8 +410,13 @@ TargetNVC0::isAccessSupported(DataFile file, DataType 
> ty) const
>  {
> if (ty == TYPE_NONE)
>return false;
> -   if (file == FILE_MEMORY_CONST && getChipset() >= 0xe0) // wrong encoding ?
> -  return typeSizeof(ty) <= 8;
> +   if (file == FILE_MEMORY_CONST) {
> +  if (getChipset() >= NVISA_GM107_CHIPSET)
> + return typeSizeof(ty) <= 4;
> +  else
> +  if (getChipset() >= NVISA_GK104_CHIPSET) // wrong encoding ?
> + return typeSizeof(ty) <= 8;
> +   }
> if (ty == TYPE_B96)
>return false;
> return true;
> --
> 2.10.1
>
> ___
> mesa-dev mailing list
> mesa-dev@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/mesa-dev
___
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/mesa-dev

[Mesa-dev] [PATCH] vulkan/wsi: Fix resource leak in success path of wsi_queue_init()

[Mun Gwan-gyeong]

It fixes leakage of pthread_condattr resource on wsi_queue_init()

Signed-off-by: Mun Gwan-gyeong 
---
 src/vulkan/wsi/wsi_common_queue.h | 1 +
 1 file changed, 1 insertion(+)

diff --git a/src/vulkan/wsi/wsi_common_queue.h 
b/src/vulkan/wsi/wsi_common_queue.h
index 0e72c8d..6d489cb 100644
--- a/src/vulkan/wsi/wsi_common_queue.h
+++ b/src/vulkan/wsi/wsi_common_queue.h
@@ -65,6 +65,7 @@ wsi_queue_init(struct wsi_queue *queue, int length)
if (ret)
   goto fail_cond;
 
+   pthread_condattr_destroy();
return 0;
 
 fail_cond:
-- 
2.10.2

___
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/mesa-dev

Re: [Mesa-dev] [PATCH] Revert "glsl/es31: precision qualifier doesn't need to match in shader interface block members"

[Rob Clark]

hmm, actually looks like we need to revert
259fc505454ea6a67aeacf6cdebf1398d9947759 ("glsl/linker: Fail linking
on ES if uniform precision qualifiers don't match") too

On Fri, Nov 25, 2016 at 9:32 AM, Rob Clark  wrote:
> fwiw, issue is that a bunch (all) have "precision mediump float;" in
> frag shader, and list some uniforms in both frag and vert shader.  I'm
> not a spec lawyer, but pretty sure we should allow that.
>
> note that these are all gles2 shaders (not glsl 300 or 310)
>
> BR,
> -R
>
> On Fri, Nov 25, 2016 at 9:30 AM, Rob Clark  wrote:
>> This breaks a whole bunch of gles2 glmark2 "tests"..
>>
>> This reverts commit b50b82b8a553f93b4ee9ace734e4c53d5a388a35.
>> ---
>>  src/compiler/glsl/link_interface_blocks.cpp |  7 ++-
>>  src/compiler/glsl/linker.cpp| 10 +-
>>  2 files changed, 3 insertions(+), 14 deletions(-)
>>
>> diff --git a/src/compiler/glsl/link_interface_blocks.cpp 
>> b/src/compiler/glsl/link_interface_blocks.cpp
>> index 4e91abc..abcc841 100644
>> --- a/src/compiler/glsl/link_interface_blocks.cpp
>> +++ b/src/compiler/glsl/link_interface_blocks.cpp
>> @@ -112,11 +112,8 @@ intrastage_match(ir_variable *a,
>> * don't force their types to match.  They might mismatch due to the 
>> two
>> * shaders using different GLSL versions, and that's ok.
>> */
>> -  if ((a->data.how_declared != ir_var_declared_implicitly ||
>> -   b->data.how_declared != ir_var_declared_implicitly) &&
>> -  (!prog->IsES || prog->Version != 310 ||
>> -   interstage_member_mismatch(prog, a->get_interface_type(),
>> -  b->get_interface_type(
>> +  if (a->data.how_declared != ir_var_declared_implicitly ||
>> +  b->data.how_declared != ir_var_declared_implicitly)
>>   return false;
>> }
>>
>> diff --git a/src/compiler/glsl/linker.cpp b/src/compiler/glsl/linker.cpp
>> index cc28b26..e925d79 100644
>> --- a/src/compiler/glsl/linker.cpp
>> +++ b/src/compiler/glsl/linker.cpp
>> @@ -1081,15 +1081,7 @@ cross_validate_globals(struct gl_shader_program *prog,
>>  return;
>>   }
>>
>> - /* Only in GLSL ES 3.10, the precision qualifier should not match
>> -  * between block members defined in matched block names within a
>> -  * shader interface.
>> -  *
>> -  * In GLSL ES 3.00 and ES 3.20, precision qualifier for each block
>> -  * member should match.
>> -  */
>> - if (prog->IsES && (prog->Version != 310 || 
>> !var->get_interface_type()) &&
>> - existing->data.precision != var->data.precision) {
>> + if (prog->IsES && existing->data.precision != var->data.precision) 
>> {
>>  linker_error(prog, "declarations for %s `%s` have "
>>   "mismatching precision qualifiers\n",
>>   mode_string(var), var->name);
>> --
>> 2.7.4
>>
___
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/mesa-dev

[Mesa-dev] [PATCH 3/5] radv: drop the return type for radv_queue_init()

[Mun Gwan-gyeong]

radv_queue_init() always returns VK_SUCCESS, so caller does not need
to check return value of radv_queue_init().

Signed-off-by: Mun Gwan-gyeong 
---
 src/amd/vulkan/radv_device.c | 4 +---
 1 file changed, 1 insertion(+), 3 deletions(-)

diff --git a/src/amd/vulkan/radv_device.c b/src/amd/vulkan/radv_device.c
index 1b8864d..3559c30 100644
--- a/src/amd/vulkan/radv_device.c
+++ b/src/amd/vulkan/radv_device.c
@@ -611,13 +611,11 @@ void radv_GetPhysicalDeviceMemoryProperties(
};
 }
 
-static VkResult
+static void
 radv_queue_init(struct radv_device *device, struct radv_queue *queue)
 {
queue->_loader_data.loaderMagic = ICD_LOADER_MAGIC;
queue->device = device;
-
-   return VK_SUCCESS;
 }
 
 static void
-- 
2.10.2

___
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/mesa-dev

[Mesa-dev] [PATCH 4/5] anv: Add missing error-checking to anv_CreateDevice

[Mun Gwan-gyeong]

This patch adds missing error-checking and fixes resource leak in
allocation failure path on anv_CreateDevice()

Signed-off-by: Mun Gwan-gyeong 
---
 src/intel/vulkan/anv_device.c | 59 ---
 1 file changed, 50 insertions(+), 9 deletions(-)

diff --git a/src/intel/vulkan/anv_device.c b/src/intel/vulkan/anv_device.c
index 0fd7d41..1964fb7 100644
--- a/src/intel/vulkan/anv_device.c
+++ b/src/intel/vulkan/anv_device.c
@@ -893,31 +893,57 @@ VkResult anv_CreateDevice(
device->robust_buffer_access = pCreateInfo->pEnabledFeatures &&
   pCreateInfo->pEnabledFeatures->robustBufferAccess;
 
-   pthread_mutex_init(>mutex, NULL);
+   if (pthread_mutex_init(>mutex, NULL) != 0) {
+  result = vk_error(VK_ERROR_INITIALIZATION_FAILED);
+  goto fail_context_id;
+   }
 
pthread_condattr_t condattr;
-   pthread_condattr_init();
-   pthread_condattr_setclock(, CLOCK_MONOTONIC);
-   pthread_cond_init(>queue_submit, NULL);
+   if (pthread_condattr_init() != 0) {
+  result = vk_error(VK_ERROR_INITIALIZATION_FAILED);
+  goto fail_mutex;
+   }
+   if (pthread_condattr_setclock(, CLOCK_MONOTONIC) != 0) {
+  pthread_condattr_destroy();
+  result = vk_error(VK_ERROR_INITIALIZATION_FAILED);
+  goto fail_mutex;
+   }
+   if (pthread_cond_init(>queue_submit, NULL) != 0) {
+  pthread_condattr_destroy();
+  result = vk_error(VK_ERROR_INITIALIZATION_FAILED);
+  goto fail_mutex;
+   }
pthread_condattr_destroy();
 
anv_bo_pool_init(>batch_bo_pool, device);
 
-   anv_block_pool_init(>dynamic_state_block_pool, device, 16384);
+   result = anv_block_pool_init(>dynamic_state_block_pool, device,
+16384);
+   if (result != VK_SUCCESS)
+  goto fail_queue_submit;
 
anv_state_pool_init(>dynamic_state_pool,
>dynamic_state_block_pool);
 
-   anv_block_pool_init(>instruction_block_pool, device, 128 * 1024);
+   result = anv_block_pool_init(>instruction_block_pool, device,
+128 * 1024);
+   if (result != VK_SUCCESS)
+  goto fail_dynamic_state_block_pool;
+
anv_state_pool_init(>instruction_state_pool,
>instruction_block_pool);
 
-   anv_block_pool_init(>surface_state_block_pool, device, 4096);
+   result = anv_block_pool_init(>surface_state_block_pool, device,
+4096);
+   if (result != VK_SUCCESS)
+  goto fail_instruction_block_pool;
 
anv_state_pool_init(>surface_state_pool,
>surface_state_block_pool);
 
-   anv_bo_init_new(>workaround_bo, device, 1024);
+   result = anv_bo_init_new(>workaround_bo, device, 1024);
+   if (result != VK_SUCCESS)
+  goto fail_surface_state_block_pool;
 
anv_scratch_pool_init(device, >scratch_pool);
 
@@ -942,7 +968,7 @@ VkResult anv_CreateDevice(
   unreachable("unhandled gen");
}
if (result != VK_SUCCESS)
-  goto fail_fd;
+  goto fail_workaround_bo;
 
anv_device_init_blorp(device);
 
@@ -952,6 +978,21 @@ VkResult anv_CreateDevice(
 
return VK_SUCCESS;
 
+ fail_workaround_bo:
+   anv_gem_munmap(device->workaround_bo.map, device->workaround_bo.size);
+   anv_gem_close(device, device->workaround_bo.gem_handle);
+ fail_surface_state_block_pool:
+   anv_block_pool_finish(>surface_state_block_pool);
+ fail_instruction_block_pool:
+   anv_block_pool_finish(>instruction_block_pool);
+ fail_dynamic_state_block_pool:
+   anv_block_pool_finish(>dynamic_state_block_pool);
+ fail_queue_submit:
+   pthread_cond_destroy(>queue_submit);
+ fail_mutex:
+   pthread_mutex_destroy(>mutex);
+ fail_context_id:
+   anv_gem_destroy_context(device, device->context_id);
  fail_fd:
close(device->fd);
  fail_device:
-- 
2.10.2

___
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/mesa-dev

[Mesa-dev] [PATCH 5/5] anv: Update the teardown in reverse order of the anv_CreateDevice

[Mun Gwan-gyeong]

This updates releasing of resource in reverse order of the anv_CreateDevice
to anv_DestroyDevice.
And it fixes resource leak in pthread_mutex, pthread_cond, anv_gem_context.

Signed-off-by: Mun Gwan-gyeong 
---
 src/intel/vulkan/anv_device.c | 23 ++-
 1 file changed, 14 insertions(+), 9 deletions(-)

diff --git a/src/intel/vulkan/anv_device.c b/src/intel/vulkan/anv_device.c
index 1964fb7..76ea4cf 100644
--- a/src/intel/vulkan/anv_device.c
+++ b/src/intel/vulkan/anv_device.c
@@ -1007,10 +1007,10 @@ void anv_DestroyDevice(
 {
ANV_FROM_HANDLE(anv_device, device, _device);
 
-   anv_queue_finish(>queue);
-
anv_device_finish_blorp(device);
 
+   anv_queue_finish(>queue);
+
 #ifdef HAVE_VALGRIND
/* We only need to free these to prevent valgrind errors.  The backing
 * BO will go away in a couple of lines so we don't actually leak.
@@ -1018,22 +1018,27 @@ void anv_DestroyDevice(
anv_state_pool_free(>dynamic_state_pool, device->border_colors);
 #endif
 
+   anv_scratch_pool_finish(device, >scratch_pool);
+
anv_gem_munmap(device->workaround_bo.map, device->workaround_bo.size);
anv_gem_close(device, device->workaround_bo.gem_handle);
 
-   anv_bo_pool_finish(>batch_bo_pool);
-   anv_state_pool_finish(>dynamic_state_pool);
-   anv_block_pool_finish(>dynamic_state_block_pool);
-   anv_state_pool_finish(>instruction_state_pool);
-   anv_block_pool_finish(>instruction_block_pool);
anv_state_pool_finish(>surface_state_pool);
anv_block_pool_finish(>surface_state_block_pool);
-   anv_scratch_pool_finish(device, >scratch_pool);
+   anv_state_pool_finish(>instruction_state_pool);
+   anv_block_pool_finish(>instruction_block_pool);
+   anv_state_pool_finish(>dynamic_state_pool);
+   anv_block_pool_finish(>dynamic_state_block_pool);
 
-   close(device->fd);
+   anv_bo_pool_finish(>batch_bo_pool);
 
+   pthread_cond_destroy(>queue_submit);
pthread_mutex_destroy(>mutex);
 
+   anv_gem_destroy_context(device, device->context_id);
+
+   close(device->fd);
+
vk_free(>alloc, device);
 }
 
-- 
2.10.2

___
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/mesa-dev

[Mesa-dev] [PATCH 2/5] anv: drop the return type for anv_queue_init()

[Mun Gwan-gyeong]

anv_queue_init() always returns VK_SUCCESS, so caller does not need
to check return value of anv_queue_init().

Signed-off-by: Mun Gwan-gyeong 
---
 src/intel/vulkan/anv_device.c | 4 +---
 1 file changed, 1 insertion(+), 3 deletions(-)

diff --git a/src/intel/vulkan/anv_device.c b/src/intel/vulkan/anv_device.c
index 2c8ac49..0fd7d41 100644
--- a/src/intel/vulkan/anv_device.c
+++ b/src/intel/vulkan/anv_device.c
@@ -710,14 +710,12 @@ PFN_vkVoidFunction anv_GetDeviceProcAddr(
return anv_lookup_entrypoint(>info, pName);
 }
 
-static VkResult
+static void
 anv_queue_init(struct anv_device *device, struct anv_queue *queue)
 {
queue->_loader_data.loaderMagic = ICD_LOADER_MAGIC;
queue->device = device;
queue->pool = >surface_state_pool;
-
-   return VK_SUCCESS;
 }
 
 static void
-- 
2.10.2

___
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/mesa-dev

[Mesa-dev] [PATCH 1/5] anv: Add missing error-checking to anv_block_pool_init (v2)

[Mun Gwan-gyeong]

When the memfd_create() and u_vector_init() fail on anv_block_pool_init(),
this patch makes to return VK_ERROR_INITIALIZATION_FAILED.
All of initialization success on anv_block_pool_init(), it makes to return
VK_SUCCESS.

CID 1394319

v2: Fixes from Emil's review:
  a) Add the return type for propagating the return value to caller.
  b) Changed anv_block_pool_init() to return VK_ERROR_INITIALIZATION_FAILED
 on failure of initialization.

Signed-off-by: Mun Gwan-gyeong 
---
 src/intel/vulkan/anv_allocator.c | 27 +--
 src/intel/vulkan/anv_private.h   |  4 ++--
 2 files changed, 23 insertions(+), 8 deletions(-)

diff --git a/src/intel/vulkan/anv_allocator.c b/src/intel/vulkan/anv_allocator.c
index f472213..45c663b 100644
--- a/src/intel/vulkan/anv_allocator.c
+++ b/src/intel/vulkan/anv_allocator.c
@@ -246,10 +246,12 @@ anv_ptr_free_list_push(void **list, void *elem)
 static uint32_t
 anv_block_pool_grow(struct anv_block_pool *pool, struct anv_block_state 
*state);
 
-void
+VkResult
 anv_block_pool_init(struct anv_block_pool *pool,
 struct anv_device *device, uint32_t block_size)
 {
+   VkResult result;
+
assert(util_is_power_of_two(block_size));
 
pool->device = device;
@@ -260,17 +262,23 @@ anv_block_pool_init(struct anv_block_pool *pool,
 
pool->fd = memfd_create("block pool", MFD_CLOEXEC);
if (pool->fd == -1)
-  return;
+  return vk_error(VK_ERROR_INITIALIZATION_FAILED);
 
/* Just make it 2GB up-front.  The Linux kernel won't actually back it
 * with pages until we either map and fault on one of them or we use
 * userptr and send a chunk of it off to the GPU.
 */
-   if (ftruncate(pool->fd, BLOCK_POOL_MEMFD_SIZE) == -1)
-  return;
+   if (ftruncate(pool->fd, BLOCK_POOL_MEMFD_SIZE) == -1) {
+  result = vk_error(VK_ERROR_INITIALIZATION_FAILED);
+  goto fail_fd;
+   }
 
-   u_vector_init(>mmap_cleanups,
-   round_to_power_of_two(sizeof(struct anv_mmap_cleanup)), 
128);
+   if (!u_vector_init(>mmap_cleanups,
+  round_to_power_of_two(sizeof(struct anv_mmap_cleanup)),
+  128)) {
+  result = vk_error(VK_ERROR_INITIALIZATION_FAILED);
+  goto fail_fd;
+   }
 
pool->state.next = 0;
pool->state.end = 0;
@@ -279,6 +287,13 @@ anv_block_pool_init(struct anv_block_pool *pool,
 
/* Immediately grow the pool so we'll have a backing bo. */
pool->state.end = anv_block_pool_grow(pool, >state);
+
+   return VK_SUCCESS;
+
+ fail_fd:
+   close(pool->fd);
+
+   return result;
 }
 
 void
diff --git a/src/intel/vulkan/anv_private.h b/src/intel/vulkan/anv_private.h
index 2fc543d..a7c31e3 100644
--- a/src/intel/vulkan/anv_private.h
+++ b/src/intel/vulkan/anv_private.h
@@ -432,8 +432,8 @@ anv_state_clflush(struct anv_state state)
anv_clflush_range(state.map, state.alloc_size);
 }
 
-void anv_block_pool_init(struct anv_block_pool *pool,
- struct anv_device *device, uint32_t block_size);
+VkResult anv_block_pool_init(struct anv_block_pool *pool,
+ struct anv_device *device, uint32_t block_size);
 void anv_block_pool_finish(struct anv_block_pool *pool);
 int32_t anv_block_pool_alloc(struct anv_block_pool *pool);
 int32_t anv_block_pool_alloc_back(struct anv_block_pool *pool);
-- 
2.10.2

___
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/mesa-dev

Re: [Mesa-dev] [PATCH] Revert "glsl/es31: precision qualifier doesn't need to match in shader interface block members"

[Rob Clark]

fwiw, issue is that a bunch (all) have "precision mediump float;" in
frag shader, and list some uniforms in both frag and vert shader.  I'm
not a spec lawyer, but pretty sure we should allow that.

note that these are all gles2 shaders (not glsl 300 or 310)

BR,
-R

On Fri, Nov 25, 2016 at 9:30 AM, Rob Clark  wrote:
> This breaks a whole bunch of gles2 glmark2 "tests"..
>
> This reverts commit b50b82b8a553f93b4ee9ace734e4c53d5a388a35.
> ---
>  src/compiler/glsl/link_interface_blocks.cpp |  7 ++-
>  src/compiler/glsl/linker.cpp| 10 +-
>  2 files changed, 3 insertions(+), 14 deletions(-)
>
> diff --git a/src/compiler/glsl/link_interface_blocks.cpp 
> b/src/compiler/glsl/link_interface_blocks.cpp
> index 4e91abc..abcc841 100644
> --- a/src/compiler/glsl/link_interface_blocks.cpp
> +++ b/src/compiler/glsl/link_interface_blocks.cpp
> @@ -112,11 +112,8 @@ intrastage_match(ir_variable *a,
> * don't force their types to match.  They might mismatch due to the 
> two
> * shaders using different GLSL versions, and that's ok.
> */
> -  if ((a->data.how_declared != ir_var_declared_implicitly ||
> -   b->data.how_declared != ir_var_declared_implicitly) &&
> -  (!prog->IsES || prog->Version != 310 ||
> -   interstage_member_mismatch(prog, a->get_interface_type(),
> -  b->get_interface_type(
> +  if (a->data.how_declared != ir_var_declared_implicitly ||
> +  b->data.how_declared != ir_var_declared_implicitly)
>   return false;
> }
>
> diff --git a/src/compiler/glsl/linker.cpp b/src/compiler/glsl/linker.cpp
> index cc28b26..e925d79 100644
> --- a/src/compiler/glsl/linker.cpp
> +++ b/src/compiler/glsl/linker.cpp
> @@ -1081,15 +1081,7 @@ cross_validate_globals(struct gl_shader_program *prog,
>  return;
>   }
>
> - /* Only in GLSL ES 3.10, the precision qualifier should not match
> -  * between block members defined in matched block names within a
> -  * shader interface.
> -  *
> -  * In GLSL ES 3.00 and ES 3.20, precision qualifier for each block
> -  * member should match.
> -  */
> - if (prog->IsES && (prog->Version != 310 || 
> !var->get_interface_type()) &&
> - existing->data.precision != var->data.precision) {
> + if (prog->IsES && existing->data.precision != var->data.precision) {
>  linker_error(prog, "declarations for %s `%s` have "
>   "mismatching precision qualifiers\n",
>   mode_string(var), var->name);
> --
> 2.7.4
>
___
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/mesa-dev

[Mesa-dev] [PATCH] Revert "glsl/es31: precision qualifier doesn't need to match in shader interface block members"

[Rob Clark]

This breaks a whole bunch of gles2 glmark2 "tests"..

This reverts commit b50b82b8a553f93b4ee9ace734e4c53d5a388a35.
---
 src/compiler/glsl/link_interface_blocks.cpp |  7 ++-
 src/compiler/glsl/linker.cpp| 10 +-
 2 files changed, 3 insertions(+), 14 deletions(-)

diff --git a/src/compiler/glsl/link_interface_blocks.cpp 
b/src/compiler/glsl/link_interface_blocks.cpp
index 4e91abc..abcc841 100644
--- a/src/compiler/glsl/link_interface_blocks.cpp
+++ b/src/compiler/glsl/link_interface_blocks.cpp
@@ -112,11 +112,8 @@ intrastage_match(ir_variable *a,
* don't force their types to match.  They might mismatch due to the two
* shaders using different GLSL versions, and that's ok.
*/
-  if ((a->data.how_declared != ir_var_declared_implicitly ||
-   b->data.how_declared != ir_var_declared_implicitly) &&
-  (!prog->IsES || prog->Version != 310 ||
-   interstage_member_mismatch(prog, a->get_interface_type(),
-  b->get_interface_type(
+  if (a->data.how_declared != ir_var_declared_implicitly ||
+  b->data.how_declared != ir_var_declared_implicitly)
  return false;
}
 
diff --git a/src/compiler/glsl/linker.cpp b/src/compiler/glsl/linker.cpp
index cc28b26..e925d79 100644
--- a/src/compiler/glsl/linker.cpp
+++ b/src/compiler/glsl/linker.cpp
@@ -1081,15 +1081,7 @@ cross_validate_globals(struct gl_shader_program *prog,
 return;
  }
 
- /* Only in GLSL ES 3.10, the precision qualifier should not match
-  * between block members defined in matched block names within a
-  * shader interface.
-  *
-  * In GLSL ES 3.00 and ES 3.20, precision qualifier for each block
-  * member should match.
-  */
- if (prog->IsES && (prog->Version != 310 || 
!var->get_interface_type()) &&
- existing->data.precision != var->data.precision) {
+ if (prog->IsES && existing->data.precision != var->data.precision) {
 linker_error(prog, "declarations for %s `%s` have "
  "mismatching precision qualifiers\n",
  mode_string(var), var->name);
-- 
2.7.4

___
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/mesa-dev

[Mesa-dev] [Bug 98831] Constantly increasing memory consumption in JavaFX applications

[bugzilla-daemon]

https://bugs.freedesktop.org/show_bug.cgi?id=98831

--- Comment #10 from Itai  ---
Upgraded to X.org 1.18.4 => Problem still occurs. 
Upgraded to X.org 1.19.0 => Problem still occurs.

-- 
You are receiving this mail because:
You are the QA Contact for the bug.
You are the assignee for the bug.___
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/mesa-dev

[Mesa-dev] [Bug 98831] Constantly increasing memory consumption in JavaFX applications

[bugzilla-daemon]

https://bugs.freedesktop.org/show_bug.cgi?id=98831

--- Comment #9 from Itai  ---
I have found this line in the X.org 1.18.4 change list:  

 > glx: avoid memory leak when using indirect rendering  

and some more searching yielded [1] which seems extremely relevant. 
I'll upgrade X.org to 1.18.4 and see if it indeed fixes the problem.

[1] https://lists.x.org/archives/xorg-devel/2016-April/049282.html

-- 
You are receiving this mail because:
You are the QA Contact for the bug.
You are the assignee for the bug.___
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/mesa-dev

[Mesa-dev] [Bug 98831] Constantly increasing memory consumption in JavaFX applications

[bugzilla-daemon]

https://bugs.freedesktop.org/show_bug.cgi?id=98831

--- Comment #8 from Christoph Haag  ---
(In reply to Michel Dänzer from comment #7)
> I can't seem to reproduce any of the problems described here with radeonsi
> from current Mesa Git master and OpenJDK 8u111-b14 & OpenJFX 8u102-b14
> packages from Debian.

Did you try it with X.org 1.19?
I just did and it looks like the memory leak is gone.

However, my test program from comment 6 behaves super weird with X.org 1.19. It
runs normally for 2-3 seconds at ~300 fps, and then it suddenly speeds up to
about 2200 fps and the animation starts running much faster.

-- 
You are receiving this mail because:
You are the QA Contact for the bug.
You are the assignee for the bug.___
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/mesa-dev

[Mesa-dev] [Bug 91724] GL/gl_mangle.h misses symbols from GLES/gl.h

[bugzilla-daemon]

https://bugs.freedesktop.org/show_bug.cgi?id=91724

--- Comment #7 from Frederic Devernay  ---
> echo "* fixing gl_mangle.h...

look for the script in the githup directly, don't copy-paste the above text,
which is broken.

-- 
You are receiving this mail because:
You are the assignee for the bug.
You are the QA Contact for the bug.___
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/mesa-dev

[Mesa-dev] [Bug 91724] GL/gl_mangle.h misses symbols from GLES/gl.h

[bugzilla-daemon]

https://bugs.freedesktop.org/show_bug.cgi?id=91724

--- Comment #6 from Frederic Devernay  ---
A script that builds a mangled osmesa up to the osmesa demo program is at:
https://github.com/devernay/osmesa-install

If you just want the swrast driver, set  osmesadriver=1 on line 19.

Here is the part that fixes gl_mangle.h.

echo "* fixing gl_mangle.h..."
# edit include/GL/gl_mangle.h, add ../GLES*/gl[0-9]*.h to the "files" variable
and change GLAPI in the grep line to GL_API
gles=
for h in GLES/gl.h GLES2/gl2.h GLES3/gl3.h GLES3/gl31.h GLES3/gl32.h; do
if [ -f include/$h ]; then
gles="$gles ../$h"
fi
done
(cd include/GL; sed -e 's@gl.h glext.h@gl.h glext.h '"$gles"'@' -e
's@\^GLAPI@^GL_\\?API@' -i.orig gl_mangle.h)
(cd include/GL; sh ./gl_mangle.h > gl_mangle.h.new && mv gl_mangle.h.new
gl_mangle.h)

Just comment it if you want to test without it.

If you don't want to apply any of the provided patches (which fix actual issues
with the current version), just remove the patch directory.

Note that in the latest Mesa (13.0.1), GLES3/gl32.h has to be included too, or
there are two more undefined symbols (glBlendBarrier and
glPrimitiveBoundingBox). These should be mangled too. For safety, I just mangle
the entry points from all GL and GLES versions.

-- 
You are receiving this mail because:
You are the assignee for the bug.
You are the QA Contact for the bug.___
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/mesa-dev

Re: [Mesa-dev] Mesa 13.0.2 release candidate

[Emil Velikov]

On 25 November 2016 at 01:22, Jonathan Gray  wrote:
> On Thu, Nov 24, 2016 at 05:25:26PM +, Emil Velikov wrote:
>> Hello list,
>>
>> The candidate for the Mesa 13.0.2 is now available. Currently we have:
>>  - 49 queued
>>  - 4 nominated (outstanding)
>>  - and 1 rejected patch(es)
>>
>>
>> With this series we have - fixes for vc4, i965 and radeon drivers. In 
>> addition
>> to that PCI IDs for Geminilake have been added to the i965 driver,
>>
>> The respective Vulkan drivers have seen multiple improvements some of which
>> include improved smoketesting and addressed memory leaks.
>>
>> Races during _mesa_HashWalk() (while using glDeleteFramebuffers alongside
>> glTexImage2D) and "#version 0" in GLSL programs have been addressed.
>>
>> BSD and Hurd users should be above to build the latest code as we no longer
>> use PATH_MAX.
>
> You seem to be confusing things there.
>
> BSD has had PATH_MAX since 1989.
>
Yes, PATH_MAX is part of POSIX '01, and not Linux specific as I
initially thought.

Thanks for the correction, Jonathan !
Emil
___
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/mesa-dev

[Mesa-dev] [PATCH 2/2] gm107/ir: optimize 32-bit CONST load to mov

[Samuel Pitoiset]

This is not allowed for indirect accesses because the source
GPR might be erased by a subsequent instruction (WaR hazard)
if we don't emit a read dep bar.

Signed-off-by: Samuel Pitoiset 
---
 .../drivers/nouveau/codegen/nv50_ir_lowering_gm107.cpp   | 16 
 .../drivers/nouveau/codegen/nv50_ir_lowering_gm107.h |  1 +
 2 files changed, 17 insertions(+)

diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_gm107.cpp 
b/src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_gm107.cpp
index ead6f9e..2c0e8de 100644
--- a/src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_gm107.cpp
+++ b/src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_gm107.cpp
@@ -61,6 +61,19 @@ GM107LegalizeSSA::handlePFETCH(Instruction *i)
i->setSrc(1, NULL);
 }
 
+void
+GM107LegalizeSSA::handleLOAD(Instruction *i)
+{
+   if (i->src(0).getFile() != FILE_MEMORY_CONST)
+  return;
+   if (i->src(0).isIndirect(0))
+  return;
+   if (typeSizeof(i->dType) != 4)
+  return;
+
+   i->op = OP_MOV;
+}
+
 bool
 GM107LegalizeSSA::visit(Instruction *i)
 {
@@ -68,6 +81,9 @@ GM107LegalizeSSA::visit(Instruction *i)
case OP_PFETCH:
   handlePFETCH(i);
   break;
+   case OP_LOAD:
+  handleLOAD(i);
+  break;
default:
   break;
}
diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_gm107.h 
b/src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_gm107.h
index 8cac76f..f51c2bb 100644
--- a/src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_gm107.h
+++ b/src/gallium/drivers/nouveau/codegen/nv50_ir_lowering_gm107.h
@@ -22,6 +22,7 @@ private:
virtual bool visit(Instruction *);
 
void handlePFETCH(Instruction *);
+   void handleLOAD(Instruction *);
 
struct BarUse {
   BarUse(Instruction *use, const Instruction *bar)
-- 
2.10.1

___
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/mesa-dev

[Mesa-dev] [PATCH 1/2] gm107/ir: do not combine CONST loads

[Samuel Pitoiset]

This will allow to use MOV instead of LD. The main advantage is
that MOV doesn't require a read dependency barrier while LD does,
and so this will both reduce barriers pressure and the number of
stall counts needed to read data from constant memory.

This is currently only for user uniform accesses. I should do
something similar when loading from the driver constant buffer
but it seems like a bit tricky to handle for now.

Signed-off-by: Samuel Pitoiset 
---
 src/gallium/drivers/nouveau/codegen/nv50_ir_target_nvc0.cpp | 9 +++--
 1 file changed, 7 insertions(+), 2 deletions(-)

diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_target_nvc0.cpp 
b/src/gallium/drivers/nouveau/codegen/nv50_ir_target_nvc0.cpp
index 4c75ea6..1a9a4e4 100644
--- a/src/gallium/drivers/nouveau/codegen/nv50_ir_target_nvc0.cpp
+++ b/src/gallium/drivers/nouveau/codegen/nv50_ir_target_nvc0.cpp
@@ -410,8 +410,13 @@ TargetNVC0::isAccessSupported(DataFile file, DataType ty) 
const
 {
if (ty == TYPE_NONE)
   return false;
-   if (file == FILE_MEMORY_CONST && getChipset() >= 0xe0) // wrong encoding ?
-  return typeSizeof(ty) <= 8;
+   if (file == FILE_MEMORY_CONST) {
+  if (getChipset() >= NVISA_GM107_CHIPSET)
+ return typeSizeof(ty) <= 4;
+  else
+  if (getChipset() >= NVISA_GK104_CHIPSET) // wrong encoding ?
+ return typeSizeof(ty) <= 8;
+   }
if (ty == TYPE_B96)
   return false;
return true;
-- 
2.10.1

___
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/mesa-dev

Re: [Mesa-dev] [PATCH 08/14] glsl: refactor duplicated validations between 2 layout-qualifiers

[Andres Gomez]

On Fri, 2016-11-25 at 11:07 +1100, Timothy Arceri wrote:
> Thanks.

Thanks for your patience with the review! ☺

> Patches 7 & 8 are:
> 
> Reviewed-by: Timothy Arceri 

Pushing!

-- 
Br,

Andres
___
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/mesa-dev

[Mesa-dev] [Bug 98842] mesa 13.0.1 build broken under debian8

[bugzilla-daemon]

https://bugs.freedesktop.org/show_bug.cgi?id=98842

--- Comment #2 from yjd...@gmail.com ---
(In reply to Emil Velikov from comment #1)
> Can you search through your system for the following files libdrm.so and
> libdrm.pc.
> For both, provide the exact location. And the contents in for the latter.
> 
> Thanks

# ls /usr/local/lib/libdrm_*
/usr/local/lib/libdrm_amdgpu.la/usr/local/lib/libdrm_amdgpu.so.1.0.0 
/usr/local/lib/libdrm_radeon.so.1 
/usr/local/lib/libdrm_amdgpu.so/usr/local/lib/libdrm_radeon.la   
/usr/local/lib/libdrm_radeon.so.1.0.1 
/usr/local/lib/libdrm_amdgpu.so.1  /usr/local/lib/libdrm_radeon.so 


~/mesa-13.0.1/build/src/glx# ls /usr/local/lib/pkgconfig/libdrm.pc  
/usr/local/lib/pkgconfig/libdrm.pc  
root@ebd207b11d70:~/mesa-13.0.1/build/src/glx# cat
/usr/local/lib/pkgconfig/libdrm.pc  
prefix=/usr/local   
exec_prefix=${prefix}   
libdir=${exec_prefix}/lib   
includedir=${prefix}/include
~   
Name: libdrm
Description: Userspace interface to kernel DRM services 
Version: 2.4.71 
Libs: -L${libdir} -ldrm 
Cflags: -I${includedir} -I${includedir}/libdrm

-- 
You are receiving this mail because:
You are the assignee for the bug.
You are the QA Contact for the bug.___
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/mesa-dev

[Mesa-dev] [PATCH 22/22] anv: enable shaderFloat64 feature

[Juan A. Suarez Romero]

From: Samuel Iglesias Gonsálvez 

Signed-off-by: Samuel Iglesias Gonsálvez 
---
 src/intel/vulkan/anv_device.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/intel/vulkan/anv_device.c b/src/intel/vulkan/anv_device.c
index 725848f..9f53fc9 100644
--- a/src/intel/vulkan/anv_device.c
+++ b/src/intel/vulkan/anv_device.c
@@ -441,7 +441,7 @@ void anv_GetPhysicalDeviceFeatures(
   .shaderStorageImageWriteWithoutFormat = true,
   .shaderClipDistance   = true,
   .shaderCullDistance   = true,
-  .shaderFloat64= false,
+  .shaderFloat64= pdevice->info.gen >= 8,
   .shaderInt64  = false,
   .shaderInt16  = false,
   .alphaToOne   = true,
-- 
2.7.4

___
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/mesa-dev

[Mesa-dev] [PATCH 21/22] i965: enable nir_option's native_float64 to supported generations

[Juan A. Suarez Romero]

From: Samuel Iglesias Gonsálvez 

Currently, gen8+ supports ARB_gpu_shader_fp64 in mesa master.

Signed-off-by: Samuel Iglesias Gonsálvez 
---
 src/mesa/drivers/dri/i965/brw_compiler.c | 53 +---
 1 file changed, 29 insertions(+), 24 deletions(-)

diff --git a/src/mesa/drivers/dri/i965/brw_compiler.c 
b/src/mesa/drivers/dri/i965/brw_compiler.c
index b9eceeb..b88ea7a 100644
--- a/src/mesa/drivers/dri/i965/brw_compiler.c
+++ b/src/mesa/drivers/dri/i965/brw_compiler.c
@@ -43,33 +43,36 @@
.use_interpolated_input_intrinsics = true, \
.vertex_id_zero_based = true
 
-static const struct nir_shader_compiler_options scalar_nir_options = {
+#define COMMON_SCALAR_NIR_OPTIONS \
+   .lower_pack_half_2x16 = true,  \
+   .lower_pack_snorm_2x16 = true, \
+   .lower_pack_snorm_4x8 = true,  \
+   .lower_pack_unorm_2x16 = true, \
+   .lower_pack_unorm_4x8 = true,  \
+   .lower_unpack_half_2x16 = true,\
+   .lower_unpack_snorm_2x16 = true,   \
+   .lower_unpack_snorm_4x8 = true,\
+   .lower_unpack_unorm_2x16 = true,   \
+   .lower_unpack_unorm_4x8 = true
+
+static const struct nir_shader_compiler_options scalar_nir_options_pre_gen8 = {
COMMON_OPTIONS,
-   .lower_pack_half_2x16 = true,
-   .lower_pack_snorm_2x16 = true,
-   .lower_pack_snorm_4x8 = true,
-   .lower_pack_unorm_2x16 = true,
-   .lower_pack_unorm_4x8 = true,
-   .lower_unpack_half_2x16 = true,
-   .lower_unpack_snorm_2x16 = true,
-   .lower_unpack_snorm_4x8 = true,
-   .lower_unpack_unorm_2x16 = true,
-   .lower_unpack_unorm_4x8 = true,
+   COMMON_SCALAR_NIR_OPTIONS,
+   .native_float64 = false,
.dvec3_consumes_two_locations = false,
 };
 
-static const struct nir_shader_compiler_options vulkan_scalar_nir_options = {
+static const struct nir_shader_compiler_options scalar_nir_options_gen8 = {
COMMON_OPTIONS,
-   .lower_pack_half_2x16 = true,
-   .lower_pack_snorm_2x16 = true,
-   .lower_pack_snorm_4x8 = true,
-   .lower_pack_unorm_2x16 = true,
-   .lower_pack_unorm_4x8 = true,
-   .lower_unpack_half_2x16 = true,
-   .lower_unpack_snorm_2x16 = true,
-   .lower_unpack_snorm_4x8 = true,
-   .lower_unpack_unorm_2x16 = true,
-   .lower_unpack_unorm_4x8 = true,
+   COMMON_SCALAR_NIR_OPTIONS,
+   .native_float64 = true,
+   .dvec3_consumes_two_locations = false,
+};
+
+static const struct nir_shader_compiler_options vulkan_scalar_nir_options_gen8 
= {
+   COMMON_OPTIONS,
+   COMMON_SCALAR_NIR_OPTIONS,
+   .native_float64 = true,
.dvec3_consumes_two_locations = true,
 };
 
@@ -156,8 +159,10 @@ brw_compiler_create(void *mem_ctx, const struct 
gen_device_info *devinfo, bool i
  compiler->glsl_compiler_options[i].EmitNoIndirectSampler = true;
 
   if (is_scalar) {
- compiler->glsl_compiler_options[i].NirOptions = is_vulkan ? 
_scalar_nir_options
-   : 
_nir_options;
+ compiler->glsl_compiler_options[i].NirOptions =
+(devinfo->gen >= 8) ? (is_vulkan ? _scalar_nir_options_gen8
+ : _nir_options_gen8)
+: _nir_options_pre_gen8;
   } else {
  compiler->glsl_compiler_options[i].NirOptions =
 devinfo->gen < 6 ? _nir_options : _nir_options_gen6;
-- 
2.7.4

___
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/mesa-dev

[Mesa-dev] [PATCH 20/22] spirv: enable SpvCapabilityFloat64 only to supported platforms

[Juan A. Suarez Romero]

From: Samuel Iglesias Gonsálvez 

Signed-off-by: Samuel Iglesias Gonsálvez 
---
 src/compiler/spirv/spirv_to_nir.c | 8 +++-
 1 file changed, 7 insertions(+), 1 deletion(-)

diff --git a/src/compiler/spirv/spirv_to_nir.c 
b/src/compiler/spirv/spirv_to_nir.c
index 70e45c1..ae35e83 100644
--- a/src/compiler/spirv/spirv_to_nir.c
+++ b/src/compiler/spirv/spirv_to_nir.c
@@ -2560,6 +2560,13 @@ vtn_handle_preamble_instruction(struct vtn_builder *b, 
SpvOp opcode,
   case SpvCapabilityInputAttachment:
  break;
 
+  case SpvCapabilityFloat64:
+ if (!b->nir_options->native_float64) {
+vtn_warn("Unsupported SPIR-V capability: %s",
+ spirv_capability_to_string(cap));
+ }
+ break;
+
   case SpvCapabilityGeometryStreams:
   case SpvCapabilityTessellation:
   case SpvCapabilityTessellationPointSize:
@@ -2567,7 +2574,6 @@ vtn_handle_preamble_instruction(struct vtn_builder *b, 
SpvOp opcode,
   case SpvCapabilityVector16:
   case SpvCapabilityFloat16Buffer:
   case SpvCapabilityFloat16:
-  case SpvCapabilityFloat64:
   case SpvCapabilityInt64:
   case SpvCapabilityInt64Atomics:
   case SpvCapabilityAtomicStorage:
-- 
2.7.4

___
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/mesa-dev

[Mesa-dev] [PATCH 19/22] anv/nir: add support for dvec3/4 consuming two locations

[Juan A. Suarez Romero]

One difference between OpenGL and Vulkan regarding 64-bit vertex
attribute types is that dvec3 and dvec4 consumes just one location in
OpenGL, while in Vulkan it consumes two locations.

Thus, in OpenGL for each dvec3/dvec4 vertex attrib we mark just one bit
in our internal inputs_read bitmap (and also the corresponding bit in
double_inputs_read bitmap) while in Vulkan we mark two consecutive bits
in both bitmaps.

This is handled with a nir option called "dvec3_consumes_two_locations",
which is set to True for Vulkan code. And all the computation regarding
emitting vertices as well as the mapping between attributes and physical
registers use this option to correctly do the work.
---
 src/amd/vulkan/radv_pipeline.c   |  1 +
 src/compiler/nir/nir.h   |  5 +++
 src/compiler/nir/nir_gather_info.c   |  6 +--
 src/gallium/drivers/freedreno/ir3/ir3_nir.c  |  1 +
 src/intel/vulkan/anv_device.c|  2 +-
 src/intel/vulkan/genX_pipeline.c | 62 +---
 src/mesa/drivers/dri/i965/brw_compiler.c | 23 ++-
 src/mesa/drivers/dri/i965/brw_compiler.h |  2 +-
 src/mesa/drivers/dri/i965/brw_fs_visitor.cpp | 14 +--
 src/mesa/drivers/dri/i965/brw_nir.c  | 18 +---
 src/mesa/drivers/dri/i965/brw_vec4.cpp   | 13 --
 src/mesa/drivers/dri/i965/intel_screen.c |  3 +-
 12 files changed, 105 insertions(+), 45 deletions(-)

diff --git a/src/amd/vulkan/radv_pipeline.c b/src/amd/vulkan/radv_pipeline.c
index ee5d812..90d4650 100644
--- a/src/amd/vulkan/radv_pipeline.c
+++ b/src/amd/vulkan/radv_pipeline.c
@@ -59,6 +59,7 @@ static const struct nir_shader_compiler_options nir_options = 
{
.lower_unpack_unorm_4x8 = true,
.lower_extract_byte = true,
.lower_extract_word = true,
+   .dvec3_consumes_two_locations = true,
 };
 
 VkResult radv_CreateShaderModule(
diff --git a/src/compiler/nir/nir.h b/src/compiler/nir/nir.h
index 1679d89..0fc8f39 100644
--- a/src/compiler/nir/nir.h
+++ b/src/compiler/nir/nir.h
@@ -1794,6 +1794,11 @@ typedef struct nir_shader_compiler_options {
 * information must be inferred from the list of input nir_variables.
 */
bool use_interpolated_input_intrinsics;
+
+   /**
+* In Vulkan, a dvec3/dvec4 consumes two locations instead just one.
+*/
+   bool dvec3_consumes_two_locations;
 } nir_shader_compiler_options;
 
 typedef struct nir_shader {
diff --git a/src/compiler/nir/nir_gather_info.c 
b/src/compiler/nir/nir_gather_info.c
index 07c9949..8c80671 100644
--- a/src/compiler/nir/nir_gather_info.c
+++ b/src/compiler/nir/nir_gather_info.c
@@ -96,7 +96,7 @@ mark_whole_variable(nir_shader *shader, nir_variable *var)
 
const unsigned slots =
   var->data.compact ? DIV_ROUND_UP(glsl_get_length(type), 4)
-: glsl_count_attribute_slots(type, is_vertex_input);
+: glsl_count_attribute_slots(type, is_vertex_input && 
!shader->options->dvec3_consumes_two_locations);
 
set_io_mask(shader, var, 0, slots);
 }
@@ -168,7 +168,7 @@ try_mask_partial_io(nir_shader *shader, nir_deref_var 
*deref)
var->data.mode == nir_var_shader_in)
   is_vertex_input = true;
 
-   unsigned offset = get_io_offset(deref, is_vertex_input);
+   unsigned offset = get_io_offset(deref, is_vertex_input && 
!shader->options->dvec3_consumes_two_locations);
if (offset == -1)
   return false;
 
@@ -184,7 +184,7 @@ try_mask_partial_io(nir_shader *shader, nir_deref_var 
*deref)
}
 
/* double element width for double types that takes two slots */
-   if (!is_vertex_input &&
+   if ((!is_vertex_input || shader->options->dvec3_consumes_two_locations) &&
glsl_type_is_dual_slot(glsl_without_array(type))) {
   elem_width *= 2;
}
diff --git a/src/gallium/drivers/freedreno/ir3/ir3_nir.c 
b/src/gallium/drivers/freedreno/ir3/ir3_nir.c
index 2d86a52..5c5c9ad 100644
--- a/src/gallium/drivers/freedreno/ir3/ir3_nir.c
+++ b/src/gallium/drivers/freedreno/ir3/ir3_nir.c
@@ -50,6 +50,7 @@ static const nir_shader_compiler_options options = {
.vertex_id_zero_based = true,
.lower_extract_byte = true,
.lower_extract_word = true,
+   .dvec3_consumes_two_locations = false,
 };
 
 struct nir_shader *
diff --git a/src/intel/vulkan/anv_device.c b/src/intel/vulkan/anv_device.c
index 2c8ac49..725848f 100644
--- a/src/intel/vulkan/anv_device.c
+++ b/src/intel/vulkan/anv_device.c
@@ -167,7 +167,7 @@ anv_physical_device_init(struct anv_physical_device *device,
 
brw_process_intel_debug_variable();
 
-   device->compiler = brw_compiler_create(NULL, >info);
+   device->compiler = brw_compiler_create(NULL, >info, true);
if (device->compiler == NULL) {
   result = vk_error(VK_ERROR_OUT_OF_HOST_MEMORY);
   goto fail;
diff --git a/src/intel/vulkan/genX_pipeline.c b/src/intel/vulkan/genX_pipeline.c
index cb164ad..97c40b8 100644
--- 

[Mesa-dev] [PATCH 18/22] spirv: Add nir_options to vtn_builder

[Juan A. Suarez Romero]

From: Samuel Iglesias Gonsálvez 

Signed-off-by: Samuel Iglesias Gonsálvez 
---
 src/compiler/spirv/spirv_to_nir.c | 1 +
 src/compiler/spirv/vtn_private.h  | 1 +
 2 files changed, 2 insertions(+)

diff --git a/src/compiler/spirv/spirv_to_nir.c 
b/src/compiler/spirv/spirv_to_nir.c
index 82d81aa..70e45c1 100644
--- a/src/compiler/spirv/spirv_to_nir.c
+++ b/src/compiler/spirv/spirv_to_nir.c
@@ -3096,6 +3096,7 @@ spirv_to_nir(const uint32_t *words, size_t word_count,
exec_list_make_empty(>functions);
b->entry_point_stage = stage;
b->entry_point_name = entry_point_name;
+   b->nir_options = options;
 
/* Handle all the preamble instructions */
words = vtn_foreach_instruction(b, words, word_end,
diff --git a/src/compiler/spirv/vtn_private.h b/src/compiler/spirv/vtn_private.h
index 7159f8b..cc841e7 100644
--- a/src/compiler/spirv/vtn_private.h
+++ b/src/compiler/spirv/vtn_private.h
@@ -344,6 +344,7 @@ struct vtn_decoration {
 
 struct vtn_builder {
nir_builder nb;
+   const nir_shader_compiler_options *nir_options;
 
nir_shader *shader;
nir_function_impl *impl;
-- 
2.7.4

___
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/mesa-dev

[Mesa-dev] [PATCH 16/22] isl: fix VA64 support for double and dvecN vertex attributes

[Juan A. Suarez Romero]

From: Samuel Iglesias Gonsálvez 

We use *64*_PASSTHRU formats to upload vertex attributes of 64 bits
to avoid conversions. From the BDW PRM, Volume 2d, page 586
(VERTEX_ELEMENT_STATE):

 "When SourceElementFormat is set to one of the *64*_PASSTHRU
 formats, 64-bit components are stored in the URB without any
 conversion. In this case, vertex elements must be written as 128
 or 256 bits, with VFCOMP_STORE_0 being used to pad the output
 as required. E.g., if R64_PASSTHRU is used to copy a 64-bit Red
 component into the URB, Component 1 must be specified as
 VFCOMP_STORE_0 (with Components 2,3 set to VFCOMP_NOSTORE)
 in order to output a 128-bit vertex element, or Components 1-3 must
 be specified as VFCOMP_STORE_0 in order to output a 256-bit vertex
 element. Likewise, use of R64G64B64_PASSTHRU requires Component 3
 to be specified as VFCOMP_STORE_0 in order to output a 256-bit vertex
 element."

Signed-off-by: Samuel Iglesias Gonsálvez 
---
 src/intel/isl/isl_format.c  | 4 ++--
 src/intel/isl/isl_format_layout.csv | 3 ---
 src/intel/vulkan/anv_formats.c  | 8 
 3 files changed, 6 insertions(+), 9 deletions(-)

diff --git a/src/intel/isl/isl_format.c b/src/intel/isl/isl_format.c
index 98806f4..92b630a 100644
--- a/src/intel/isl/isl_format.c
+++ b/src/intel/isl/isl_format.c
@@ -97,7 +97,7 @@ static const struct surface_format_info format_info[] = {
SF( x,  x,  x,  x,  x,  x,  Y,  x,  x,x,   R32G32B32A32_SSCALED)
SF( x,  x,  x,  x,  x,  x,  Y,  x,  x,x,   R32G32B32A32_USCALED)
SF( x,  x,  x,  x,  x,  x, 75,  x,  x,x,   R32G32B32A32_SFIXED)
-   SF( x,  x,  x,  x,  x,  x,  x,  x,  x,x,   R64G64_PASSTHRU)
+   SF( x,  x,  x,  x,  x,  x, 80,  x,  x,x,   R64G64_PASSTHRU)
SF( Y, 50,  x,  x,  x,  x,  Y,  Y,  x,x,   R32G32B32_FLOAT)
SF( Y,  x,  x,  x,  x,  x,  Y,  Y,  x,x,   R32G32B32_SINT)
SF( Y,  x,  x,  x,  x,  x,  Y,  Y,  x,x,   R32G32B32_UINT)
@@ -131,7 +131,7 @@ static const struct surface_format_info format_info[] = {
SF( x,  x,  x,  x,  x,  x,  Y,  x,  x,x,   R32G32_SSCALED)
SF( x,  x,  x,  x,  x,  x,  Y,  x,  x,x,   R32G32_USCALED)
SF( x,  x,  x,  x,  x,  x, 75,  x,  x,x,   R32G32_SFIXED)
-   SF( x,  x,  x,  x,  x,  x,  x,  x,  x,x,   R64_PASSTHRU)
+   SF( x,  x,  x,  x,  x,  x, 80,  x,  x,x,   R64_PASSTHRU)
SF( Y,  Y,  x,  Y,  Y,  Y,  Y,  x, 60,   90,   B8G8R8A8_UNORM)
SF( Y,  Y,  x,  x,  Y,  Y,  x,  x,  x,x,   B8G8R8A8_UNORM_SRGB)
 /* smpl filt shad CK  RT  AB  VB  SO  color ccs_e */
diff --git a/src/intel/isl/isl_format_layout.csv 
b/src/intel/isl/isl_format_layout.csv
index f0f31c7..b1e298b 100644
--- a/src/intel/isl/isl_format_layout.csv
+++ b/src/intel/isl/isl_format_layout.csv
@@ -96,7 +96,6 @@ X32_TYPELESS_G8X24_UINT ,  64,  1,  1,  1,  x32,  ui8,  
x24, , ,
 L32A32_FLOAT,  64,  1,  1,  1, , , , sf32, sf32,   
  ,, linear,
 R32G32_UNORM,  64,  1,  1,  1, un32, un32, , , ,   
  ,, linear,
 R32G32_SNORM,  64,  1,  1,  1, sn32, sn32, , , ,   
  ,, linear,
-R64_FLOAT   ,  64,  1,  1,  1, sf64, , , , ,   
  ,, linear,
 R16G16B16X16_UNORM  ,  64,  1,  1,  1, un16, un16, un16,  x16, ,   
  ,, linear,
 R16G16B16X16_FLOAT  ,  64,  1,  1,  1, sf16, sf16, sf16,  x16, ,   
  ,, linear,
 A32X32_FLOAT,  64,  1,  1,  1, , , , sf32,  x32,   
  ,,  alpha,
@@ -243,8 +242,6 @@ R8G8B8_UNORM,  24,  1,  1,  1,  un8,  un8,  
un8, , ,
 R8G8B8_SNORM,  24,  1,  1,  1,  sn8,  sn8,  sn8, , ,   
  ,, linear,
 R8G8B8_SSCALED  ,  24,  1,  1,  1,  ss8,  ss8,  ss8, , ,   
  ,, linear,
 R8G8B8_USCALED  ,  24,  1,  1,  1,  us8,  us8,  us8, , ,   
  ,, linear,
-R64G64B64A64_FLOAT  , 256,  1,  1,  1, sf64, sf64, sf64, sf64, ,   
  ,, linear,
-R64G64B64_FLOAT , 196,  1,  1,  1, sf64, sf64, sf64, , ,   
  ,, linear,
 BC4_SNORM   ,  64,  4,  4,  1,  sn8, , , , ,   
  ,, linear, rgtc1
 BC5_SNORM   , 128,  4,  4,  1,  sn8,  sn8, , , ,   
  ,, linear, rgtc2
 R16G16B16_FLOAT ,  48,  1,  1,  1, sf16, sf16, sf16, , ,   
  ,, linear,
diff --git a/src/intel/vulkan/anv_formats.c b/src/intel/vulkan/anv_formats.c
index 9ef998c..39810d4 100644
--- a/src/intel/vulkan/anv_formats.c
+++ b/src/intel/vulkan/anv_formats.c
@@ -156,16 +156,16 @@ static const struct anv_format anv_formats[] = {
fmt(VK_FORMAT_R32G32B32A32_SFLOAT, ISL_FORMAT_R32G32B32A32_FLOAT),
fmt(VK_FORMAT_R64_UINT,ISL_FORMAT_R64_PASSTHRU),
fmt(VK_FORMAT_R64_SINT,ISL_FORMAT_R64_PASSTHRU),
-   

[Mesa-dev] [PATCH 17/22] nir: Add flag to detect platforms with native float64 support

[Juan A. Suarez Romero]

From: Samuel Iglesias Gonsálvez 

Signed-off-by: Samuel Iglesias Gonsálvez 
---
 src/compiler/nir/nir.h | 5 +
 1 file changed, 5 insertions(+)

diff --git a/src/compiler/nir/nir.h b/src/compiler/nir/nir.h
index 3e6d168..1679d89 100644
--- a/src/compiler/nir/nir.h
+++ b/src/compiler/nir/nir.h
@@ -1777,6 +1777,11 @@ typedef struct nir_shader_compiler_options {
 */
bool native_integers;
 
+   /**
+* Does the driver support 64-bit floats?
+*/
+   bool native_float64;
+
/* Indicates that the driver only has zero-based vertex id */
bool vertex_id_zero_based;
 
-- 
2.7.4

___
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/mesa-dev

[Mesa-dev] [PATCH 15/22] anv/pipeline: get map for double input attributes

[Juan A. Suarez Romero]

---
 src/intel/vulkan/anv_pipeline.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/src/intel/vulkan/anv_pipeline.c b/src/intel/vulkan/anv_pipeline.c
index 27217b9..7c26cce 100644
--- a/src/intel/vulkan/anv_pipeline.c
+++ b/src/intel/vulkan/anv_pipeline.c
@@ -476,6 +476,7 @@ anv_pipeline_compile_vs(struct anv_pipeline *pipeline,
   ralloc_steal(mem_ctx, nir);
 
   prog_data.inputs_read = nir->info->inputs_read;
+  prog_data.double_inputs_read = nir->info->double_inputs_read;
 
   brw_compute_vue_map(>device->info,
   _data.base.vue_map,
-- 
2.7.4

___
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/mesa-dev

[Mesa-dev] [PATCH 14/22] spirv: add support for doubles to OpSpecConstant

[Juan A. Suarez Romero]

From: Samuel Iglesias Gonsálvez 

Signed-off-by: Samuel Iglesias Gonsálvez 
---
 src/amd/vulkan/radv_pipeline.c|  5 +++-
 src/compiler/spirv/nir_spirv.h|  5 +++-
 src/compiler/spirv/spirv_to_nir.c | 54 ++-
 src/intel/vulkan/anv_pipeline.c   |  5 +++-
 4 files changed, 60 insertions(+), 9 deletions(-)

diff --git a/src/amd/vulkan/radv_pipeline.c b/src/amd/vulkan/radv_pipeline.c
index 7d7d0c6..ee5d812 100644
--- a/src/amd/vulkan/radv_pipeline.c
+++ b/src/amd/vulkan/radv_pipeline.c
@@ -188,7 +188,10 @@ radv_shader_compile_to_nir(struct radv_device *device,
assert(data + entry.size <= spec_info->pData + 
spec_info->dataSize);
 
spec_entries[i].id = 
spec_info->pMapEntries[i].constantID;
-   spec_entries[i].data = *(const uint32_t *)data;
+if (spec_info->dataSize == 8)
+   spec_entries[i].data64 = *(const uint64_t 
*)data;
+else
+   spec_entries[i].data32 = *(const uint32_t 
*)data;
}
}
 
diff --git a/src/compiler/spirv/nir_spirv.h b/src/compiler/spirv/nir_spirv.h
index 500f2cb..33a2781 100644
--- a/src/compiler/spirv/nir_spirv.h
+++ b/src/compiler/spirv/nir_spirv.h
@@ -38,7 +38,10 @@ extern "C" {
 
 struct nir_spirv_specialization {
uint32_t id;
-   uint32_t data;
+   union {
+  uint32_t data32;
+  uint64_t data64;
+   };
 };
 
 nir_function *spirv_to_nir(const uint32_t *words, size_t word_count,
diff --git a/src/compiler/spirv/spirv_to_nir.c 
b/src/compiler/spirv/spirv_to_nir.c
index 81c73da..82d81aa 100644
--- a/src/compiler/spirv/spirv_to_nir.c
+++ b/src/compiler/spirv/spirv_to_nir.c
@@ -31,6 +31,14 @@
 #include "nir/nir_constant_expressions.h"
 #include "spirv_info.h"
 
+struct spec_constant_value {
+   bool is_double;
+   union {
+  uint32_t data32;
+  uint64_t data64;
+   };
+};
+
 void
 _vtn_warn(const char *file, int line, const char *msg, ...)
 {
@@ -952,11 +960,14 @@ spec_constant_decoration_cb(struct vtn_builder *b, struct 
vtn_value *v,
if (dec->decoration != SpvDecorationSpecId)
   return;
 
-   uint32_t *const_value = data;
+   struct spec_constant_value *const_value = data;
 
for (unsigned i = 0; i < b->num_specializations; i++) {
   if (b->specializations[i].id == dec->literals[0]) {
- *const_value = b->specializations[i].data;
+ if (const_value->is_double)
+const_value->data64 = b->specializations[i].data64;
+ else
+const_value->data32 = b->specializations[i].data32;
  return;
   }
}
@@ -966,8 +977,22 @@ static uint32_t
 get_specialization(struct vtn_builder *b, struct vtn_value *val,
uint32_t const_value)
 {
-   vtn_foreach_decoration(b, val, spec_constant_decoration_cb, _value);
-   return const_value;
+   struct spec_constant_value data;
+   data.is_double = false;
+   data.data32 = const_value;
+   vtn_foreach_decoration(b, val, spec_constant_decoration_cb, );
+   return data.data32;
+}
+
+static uint64_t
+get_specialization64(struct vtn_builder *b, struct vtn_value *val,
+   uint64_t const_value)
+{
+   struct spec_constant_value data;
+   data.is_double = true;
+   data.data64 = const_value;
+   vtn_foreach_decoration(b, val, spec_constant_decoration_cb, );
+   return data.data64;
 }
 
 static void
@@ -1026,10 +1051,27 @@ vtn_handle_constant(struct vtn_builder *b, SpvOp opcode,
   }
   break;
}
-   case SpvOpSpecConstant:
+   case SpvOpSpecConstant: {
   assert(glsl_type_is_scalar(val->const_type));
-  val->constant->value.u[0] = get_specialization(b, val, w[3]);
+  int bit_size = glsl_get_bit_size(val->const_type);
+  if (bit_size == 64) {
+ union {
+double d;
+uint64_t u64;
+struct {
+   uint32_t u1;
+   uint32_t u2;
+};
+ } di;
+ di.u1 = w[3];
+ di.u2 = w[4];
+ di.u64 = get_specialization64(b, val, di.u64);
+ val->constant->value.d[0] = di.d;
+  } else {
+ val->constant->value.u[0] = get_specialization(b, val, w[3]);
+  }
   break;
+   }
case SpvOpSpecConstantComposite:
case SpvOpConstantComposite: {
   unsigned elem_count = count - 3;
diff --git a/src/intel/vulkan/anv_pipeline.c b/src/intel/vulkan/anv_pipeline.c
index 9b65e35..27217b9 100644
--- a/src/intel/vulkan/anv_pipeline.c
+++ b/src/intel/vulkan/anv_pipeline.c
@@ -117,7 +117,10 @@ anv_shader_compile_to_nir(struct anv_device *device,
  assert(data + entry.size <= spec_info->pData + spec_info->dataSize);
 
  spec_entries[i].id = spec_info->pMapEntries[i].constantID;
- spec_entries[i].data = *(const uint32_t *)data;
+ if (spec_info->dataSize == 8)

[Mesa-dev] [PATCH 13/22] spirv/nir: add (un)packDouble2x32() translation

[Juan A. Suarez Romero]

From: Samuel Iglesias Gonsálvez 

Signed-off-by: Samuel Iglesias Gonsálvez 
---
 src/compiler/spirv/vtn_glsl450.c | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/src/compiler/spirv/vtn_glsl450.c b/src/compiler/spirv/vtn_glsl450.c
index cb0570d..01df1dd 100644
--- a/src/compiler/spirv/vtn_glsl450.c
+++ b/src/compiler/spirv/vtn_glsl450.c
@@ -399,11 +399,13 @@ vtn_nir_alu_op_for_spirv_glsl_opcode(enum GLSLstd450 
opcode)
case GLSLstd450PackSnorm2x16:return nir_op_pack_snorm_2x16;
case GLSLstd450PackUnorm2x16:return nir_op_pack_unorm_2x16;
case GLSLstd450PackHalf2x16: return nir_op_pack_half_2x16;
+   case GLSLstd450PackDouble2x32:   return nir_op_pack_double_2x32;
case GLSLstd450UnpackSnorm4x8:   return nir_op_unpack_snorm_4x8;
case GLSLstd450UnpackUnorm4x8:   return nir_op_unpack_unorm_4x8;
case GLSLstd450UnpackSnorm2x16:  return nir_op_unpack_snorm_2x16;
case GLSLstd450UnpackUnorm2x16:  return nir_op_unpack_unorm_2x16;
case GLSLstd450UnpackHalf2x16:   return nir_op_unpack_half_2x16;
+   case GLSLstd450UnpackDouble2x32: return nir_op_unpack_double_2x32;
 
default:
   unreachable("No NIR equivalent");
-- 
2.7.4

___
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/mesa-dev

[Mesa-dev] [PATCH 10/22] spirv: Enable double floating points when copying variables in _vtn_variable_copy()

[Juan A. Suarez Romero]

From: Samuel Iglesias Gonsálvez 

Signed-off-by: Samuel Iglesias Gonsálvez 
---
 src/compiler/spirv/vtn_variables.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/src/compiler/spirv/vtn_variables.c 
b/src/compiler/spirv/vtn_variables.c
index c02698b..8b01da3 100644
--- a/src/compiler/spirv/vtn_variables.c
+++ b/src/compiler/spirv/vtn_variables.c
@@ -717,6 +717,7 @@ _vtn_variable_copy(struct vtn_builder *b, struct 
vtn_access_chain *dest,
case GLSL_TYPE_UINT:
case GLSL_TYPE_INT:
case GLSL_TYPE_FLOAT:
+   case GLSL_TYPE_DOUBLE:
case GLSL_TYPE_BOOL:
   /* At this point, we have a scalar, vector, or matrix so we know that
* there cannot be any structure splitting still in the way.  By
-- 
2.7.4

___
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/mesa-dev

[Mesa-dev] [PATCH 11/22] spirv: add support for doubles on OpComposite{Insert, Extract}

[Juan A. Suarez Romero]

From: Samuel Iglesias Gonsálvez 

Signed-off-by: Samuel Iglesias Gonsálvez 
---
 src/compiler/spirv/spirv_to_nir.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/src/compiler/spirv/spirv_to_nir.c 
b/src/compiler/spirv/spirv_to_nir.c
index 3bc23d3..a13f72a 100644
--- a/src/compiler/spirv/spirv_to_nir.c
+++ b/src/compiler/spirv/spirv_to_nir.c
@@ -1147,6 +1147,7 @@ vtn_handle_constant(struct vtn_builder *b, SpvOp opcode,
 case GLSL_TYPE_UINT:
 case GLSL_TYPE_INT:
 case GLSL_TYPE_FLOAT:
+case GLSL_TYPE_DOUBLE:
 case GLSL_TYPE_BOOL:
/* If we hit this granularity, we're picking off an element */
if (elem < 0)
-- 
2.7.4

___
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/mesa-dev

Re: [Mesa-dev] [PATCH] android: add support for EGL_EXT_buffer_age extension

[Tapani Pälli]

forgot to also CC possible interested ppl!

On 11/24/2016 11:44 AM, Tapani Pälli wrote:

Oops, commit message missed the dEQP testing results. I can add these
when committing:

On Android (running dEQP with *buffer_age*):

102 passing tests, 0 failing and 84 not supported ones

On 11/24/2016 11:38 AM, Tapani Pälli wrote:

From: Kalyan Kondapally 

- initialize buffer age as 0 (Tapani)

Signed-off-by: Kalyan Kondapally 
---
 src/egl/drivers/dri2/egl_dri2.h |  2 ++
 src/egl/drivers/dri2/platform_android.c | 24 +++-
 2 files changed, 25 insertions(+), 1 deletion(-)

diff --git a/src/egl/drivers/dri2/egl_dri2.h
b/src/egl/drivers/dri2/egl_dri2.h
index eac58f3..4eda1a2 100644
--- a/src/egl/drivers/dri2/egl_dri2.h
+++ b/src/egl/drivers/dri2/egl_dri2.h
@@ -297,6 +297,8 @@ struct dri2_egl_surface
__DRIimage *dri_image_back;
__DRIimage *dri_image_front;

+   int back_buffer_age;
+
/* EGL-owned buffers */
__DRIbuffer   *local_buffers[__DRI_BUFFER_COUNT];
 #endif
diff --git a/src/egl/drivers/dri2/platform_android.c
b/src/egl/drivers/dri2/platform_android.c
index 373e2c0..b6c6533 100644
--- a/src/egl/drivers/dri2/platform_android.c
+++ b/src/egl/drivers/dri2/platform_android.c
@@ -477,6 +477,8 @@ get_back_bo(struct dri2_egl_surface *dri2_surf)
if (!dri2_surf->dri_image_back)
   return -1;

+   dri2_surf->back_buffer_age = 0;
+
return 0;
 }

@@ -573,6 +575,9 @@ droid_swap_buffers(_EGLDriver *drv, _EGLDisplay
*disp, _EGLSurface *draw)
if (dri2_surf->base.Type != EGL_WINDOW_BIT)
   return EGL_TRUE;

+   if (dri2_surf->back_buffer_age > 0)
+  dri2_surf->back_buffer_age++;
+
dri2_flush_drawable_for_swapbuffers(disp, draw);

if (dri2_surf->buffer)
@@ -580,9 +585,25 @@ droid_swap_buffers(_EGLDriver *drv, _EGLDisplay
*disp, _EGLSurface *draw)

(*dri2_dpy->flush->invalidate)(dri2_surf->dri_drawable);

+   dri2_surf->back_buffer_age = 1;
+
return EGL_TRUE;
 }

+static EGLint
+droid_query_buffer_age(_EGLDriver *drv,
+   _EGLDisplay *disp, _EGLSurface *surface)
+{
+   struct dri2_egl_surface *dri2_surf = dri2_egl_surface(surface);
+
+   if (get_back_bo(dri2_surf) < 0) {
+  _eglError(EGL_BAD_ALLOC, "dri2_query_buffer_age");
+  return 0;
+   }
+
+   return dri2_surf->back_buffer_age;
+}
+
 static _EGLImage *
 droid_create_image_from_prime_fd_yuv(_EGLDisplay *disp, _EGLContext
*ctx,
  struct ANativeWindowBuffer *buf,
int fd)
@@ -1027,7 +1048,7 @@ static struct dri2_egl_display_vtbl
droid_display_vtbl = {
.swap_buffers_region = dri2_fallback_swap_buffers_region,
.post_sub_buffer = dri2_fallback_post_sub_buffer,
.copy_buffers = dri2_fallback_copy_buffers,
-   .query_buffer_age = dri2_fallback_query_buffer_age,
+   .query_buffer_age = droid_query_buffer_age,
.query_surface = droid_query_surface,
.create_wayland_buffer_from_image =
dri2_fallback_create_wayland_buffer_from_image,
.get_sync_values = dri2_fallback_get_sync_values,
@@ -1126,6 +1147,7 @@ dri2_initialize_android(_EGLDriver *drv,
_EGLDisplay *dpy)
dpy->Extensions.ANDROID_framebuffer_target = EGL_TRUE;
dpy->Extensions.ANDROID_image_native_buffer = EGL_TRUE;
dpy->Extensions.ANDROID_recordable = EGL_TRUE;
+   dpy->Extensions.EXT_buffer_age = EGL_TRUE;

/* Fill vtbl last to prevent accidentally calling virtual function
during
 * initialization.


___
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/mesa-dev

___
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/mesa-dev

[Mesa-dev] [PATCH 09/22] spirv: add double support to _vtn_block_load_store()

[Juan A. Suarez Romero]

From: Samuel Iglesias Gonsálvez 

Signed-off-by: Samuel Iglesias Gonsálvez 
---
 src/compiler/spirv/vtn_variables.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/src/compiler/spirv/vtn_variables.c 
b/src/compiler/spirv/vtn_variables.c
index 407f449..c02698b 100644
--- a/src/compiler/spirv/vtn_variables.c
+++ b/src/compiler/spirv/vtn_variables.c
@@ -443,6 +443,7 @@ _vtn_block_load_store(struct vtn_builder *b, 
nir_intrinsic_op op, bool load,
case GLSL_TYPE_UINT:
case GLSL_TYPE_INT:
case GLSL_TYPE_FLOAT:
+   case GLSL_TYPE_DOUBLE:
case GLSL_TYPE_BOOL:
   /* This is where things get interesting.  At this point, we've hit
* a vector, a scalar, or a matrix.
-- 
2.7.4

___
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/mesa-dev

[Mesa-dev] [PATCH 12/22] spirv/nir: implement DF conversions

[Juan A. Suarez Romero]

From: Samuel Iglesias Gonsálvez 

SPIR-V does not have special opcodes for DF conversions. We need to identify
them by checking the bit size of the operand and the result.

Signed-off-by: Samuel Iglesias Gonsálvez 
---
 src/compiler/spirv/spirv_to_nir.c | 29 ++---
 src/compiler/spirv/vtn_alu.c  | 37 +++--
 src/compiler/spirv/vtn_private.h  |  3 ++-
 3 files changed, 51 insertions(+), 18 deletions(-)

diff --git a/src/compiler/spirv/spirv_to_nir.c 
b/src/compiler/spirv/spirv_to_nir.c
index a13f72a..81c73da 100644
--- a/src/compiler/spirv/spirv_to_nir.c
+++ b/src/compiler/spirv/spirv_to_nir.c
@@ -1211,12 +1211,21 @@ vtn_handle_constant(struct vtn_builder *b, SpvOp opcode,
 
   default: {
  bool swap;
- nir_op op = vtn_nir_alu_op_for_spirv_opcode(opcode, );
-
- unsigned num_components = glsl_get_vector_elements(val->const_type);
  unsigned bit_size =
 glsl_get_bit_size(val->const_type);
 
+ bool is_double_dst = bit_size == 64;
+ bool is_double_src = is_double_dst;
+ /* We assume there is no double conversion here */
+ assert(bit_size != 64 ||
+(opcode != SpvOpConvertFToU && opcode != SpvOpConvertFToS &&
+ opcode != SpvOpConvertSToF && opcode != SpvOpConvertUToF &&
+ opcode != SpvOpFConvert));
+ nir_op op =
+vtn_nir_alu_op_for_spirv_opcode(opcode, ,
+is_double_dst, is_double_src);
+
+ unsigned num_components = glsl_get_vector_elements(val->const_type);
  nir_const_value src[4];
  assert(count <= 7);
  for (unsigned i = 0; i < count - 4; i++) {
@@ -1224,16 +1233,22 @@ vtn_handle_constant(struct vtn_builder *b, SpvOp opcode,
vtn_value(b, w[4 + i], vtn_value_type_constant)->constant;
 
 unsigned j = swap ? 1 - i : i;
-assert(bit_size == 32);
 for (unsigned k = 0; k < num_components; k++)
-   src[j].u32[k] = c->value.u[k];
+   if (!is_double_src)
+  src[j].u32[k] = c->value.u[k];
+   else
+  src[j].f64[k] = c->value.d[k];
  }
 
  nir_const_value res = nir_eval_const_opcode(op, num_components,
  bit_size, src);
 
- for (unsigned k = 0; k < num_components; k++)
-val->constant->value.u[k] = res.u32[k];
+ for (unsigned k = 0; k < num_components; k++) {
+if (!is_double_dst)
+   val->constant->value.u[k] = res.u32[k];
+else
+   val->constant->value.d[k] = res.f64[k];
+ }
 
  break;
   } /* default */
diff --git a/src/compiler/spirv/vtn_alu.c b/src/compiler/spirv/vtn_alu.c
index 95ff2b1..e444d3f 100644
--- a/src/compiler/spirv/vtn_alu.c
+++ b/src/compiler/spirv/vtn_alu.c
@@ -211,7 +211,8 @@ vtn_handle_matrix_alu(struct vtn_builder *b, SpvOp opcode,
 }
 
 nir_op
-vtn_nir_alu_op_for_spirv_opcode(SpvOp opcode, bool *swap)
+vtn_nir_alu_op_for_spirv_opcode(SpvOp opcode, bool *swap,
+bool is_double_dst, bool is_double_src)
 {
/* Indicates that the first two arguments should be swapped.  This is
 * used for implementing greater-than and less-than-or-equal.
@@ -284,16 +285,21 @@ vtn_nir_alu_op_for_spirv_opcode(SpvOp opcode, bool *swap)
case SpvOpFUnordGreaterThanEqual:   return nir_op_fge;
 
/* Conversions: */
-   case SpvOpConvertFToU:   return nir_op_f2u;
-   case SpvOpConvertFToS:   return nir_op_f2i;
-   case SpvOpConvertSToF:   return nir_op_i2f;
-   case SpvOpConvertUToF:   return nir_op_u2f;
+   case SpvOpConvertFToU:   return is_double_src ? nir_op_d2u : 
nir_op_f2u;
+   case SpvOpConvertFToS:   return is_double_src ? nir_op_d2i : 
nir_op_f2i;
+   case SpvOpConvertSToF:   return is_double_dst ? nir_op_i2d : 
nir_op_i2f;
+   case SpvOpConvertUToF:   return is_double_dst ? nir_op_u2d : 
nir_op_u2f;
case SpvOpBitcast:   return nir_op_imov;
case SpvOpUConvert:
case SpvOpQuantizeToF16: return nir_op_fquantize2f16;
-   /* TODO: NIR is 32-bit only; these are no-ops. */
+   /* TODO: int64 is not supported yet. This is a no-op. */
case SpvOpSConvert:  return nir_op_imov;
-   case SpvOpFConvert:  return nir_op_fmov;
+   case SpvOpFConvert:
+  if (is_double_src && !is_double_dst)
+ return nir_op_d2f;
+  if (!is_double_src && is_double_dst)
+ return nir_op_f2d;
+  return nir_op_fmov;
 
/* Derivatives: */
case SpvOpDPdx: return nir_op_fddx;
@@ -457,7 +463,10 @@ vtn_handle_alu(struct vtn_builder *b, SpvOp opcode,
case SpvOpFUnordLessThanEqual:
case SpvOpFUnordGreaterThanEqual: {
   bool swap;
- 

[Mesa-dev] [PATCH 08/22] spirv: add double support to _vtn_variable_load_store

[Juan A. Suarez Romero]

From: Samuel Iglesias Gonsálvez 

Signed-off-by: Samuel Iglesias Gonsálvez 
---
 src/compiler/spirv/vtn_variables.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/src/compiler/spirv/vtn_variables.c 
b/src/compiler/spirv/vtn_variables.c
index 14366dc..407f449 100644
--- a/src/compiler/spirv/vtn_variables.c
+++ b/src/compiler/spirv/vtn_variables.c
@@ -640,6 +640,7 @@ _vtn_variable_load_store(struct vtn_builder *b, bool load,
case GLSL_TYPE_INT:
case GLSL_TYPE_FLOAT:
case GLSL_TYPE_BOOL:
+   case GLSL_TYPE_DOUBLE:
   /* At this point, we have a scalar, vector, or matrix so we know that
* there cannot be any structure splitting still in the way.  By
* stopping at the matrix level rather than the vector level, we
-- 
2.7.4

___
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/mesa-dev

[Mesa-dev] [PATCH 07/22] spirv: add double support to SpvOpCompositeExtract

[Juan A. Suarez Romero]

From: Samuel Iglesias Gonsálvez 

Signed-off-by: Samuel Iglesias Gonsálvez 
---
 src/compiler/spirv/spirv_to_nir.c | 12 ++--
 1 file changed, 10 insertions(+), 2 deletions(-)

diff --git a/src/compiler/spirv/spirv_to_nir.c 
b/src/compiler/spirv/spirv_to_nir.c
index 02dbceb..3bc23d3 100644
--- a/src/compiler/spirv/spirv_to_nir.c
+++ b/src/compiler/spirv/spirv_to_nir.c
@@ -1182,8 +1182,12 @@ vtn_handle_constant(struct vtn_builder *b, SpvOp opcode,
val->constant = *c;
 } else {
unsigned num_components = glsl_get_vector_elements(type);
+   unsigned bit_size = glsl_get_bit_size(type);
for (unsigned i = 0; i < num_components; i++)
-  val->constant->value.u[i] = (*c)->value.u[elem + i];
+  if (bit_size == 64)
+ val->constant->value.d[i] = (*c)->value.d[elem + i];
+  else
+ val->constant->value.u[i] = (*c)->value.u[elem + i];
 }
  } else {
 struct vtn_value *insert =
@@ -1193,8 +1197,12 @@ vtn_handle_constant(struct vtn_builder *b, SpvOp opcode,
*c = insert->constant;
 } else {
unsigned num_components = glsl_get_vector_elements(type);
+   unsigned bit_size = glsl_get_bit_size(type);
for (unsigned i = 0; i < num_components; i++)
-  (*c)->value.u[elem + i] = insert->constant->value.u[i];
+  if (bit_size == 64)
+ (*c)->value.d[elem + i] = insert->constant->value.d[i];
+  else
+ (*c)->value.u[elem + i] = insert->constant->value.u[i];
 }
  }
  break;
-- 
2.7.4

___
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/mesa-dev

[Mesa-dev] [PATCH 05/22] spirv: add DF support to SpvOp*ConstantComposite

[Juan A. Suarez Romero]

From: Samuel Iglesias Gonsálvez 

Signed-off-by: Samuel Iglesias Gonsálvez 
---
 src/compiler/spirv/spirv_to_nir.c | 20 +++-
 1 file changed, 15 insertions(+), 5 deletions(-)

diff --git a/src/compiler/spirv/spirv_to_nir.c 
b/src/compiler/spirv/spirv_to_nir.c
index 8569bc8..9751679 100644
--- a/src/compiler/spirv/spirv_to_nir.c
+++ b/src/compiler/spirv/spirv_to_nir.c
@@ -1042,21 +1042,31 @@ vtn_handle_constant(struct vtn_builder *b, SpvOp opcode,
   case GLSL_TYPE_INT:
   case GLSL_TYPE_FLOAT:
   case GLSL_TYPE_BOOL:
+  case GLSL_TYPE_DOUBLE: {
+ int bit_size = glsl_get_bit_size(val->const_type);
  if (glsl_type_is_matrix(val->const_type)) {
 unsigned rows = glsl_get_vector_elements(val->const_type);
 assert(glsl_get_matrix_columns(val->const_type) == elem_count);
 for (unsigned i = 0; i < elem_count; i++)
-   for (unsigned j = 0; j < rows; j++)
-  val->constant->value.u[rows * i + j] = elems[i]->value.u[j];
+   for (unsigned j = 0; j < rows; j++) {
+  if (bit_size == 64)
+ val->constant->value.d[rows * i + j] = 
elems[i]->value.d[j];
+  else
+ val->constant->value.u[rows * i + j] = 
elems[i]->value.u[j];
+   }
  } else {
 assert(glsl_type_is_vector(val->const_type));
 assert(glsl_get_vector_elements(val->const_type) == elem_count);
-for (unsigned i = 0; i < elem_count; i++)
-   val->constant->value.u[i] = elems[i]->value.u[0];
+for (unsigned i = 0; i < elem_count; i++) {
+   if (bit_size == 64)
+   val->constant->value.d[i] = elems[i]->value.d[0];
+   else
+  val->constant->value.u[i] = elems[i]->value.u[0];
+}
  }
  ralloc_free(elems);
  break;
-
+  }
   case GLSL_TYPE_STRUCT:
   case GLSL_TYPE_ARRAY:
  ralloc_steal(val->constant, elems);
-- 
2.7.4

___
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/mesa-dev

[Mesa-dev] [PATCH 06/22] spirv: fix SpvOpSpecConstantOp with SpvOpVectorShuffle working with double-based vecs

[Juan A. Suarez Romero]

From: Samuel Iglesias Gonsálvez 

We need to pick two 32-bit values per component to perform the right shuffle 
operation.

Signed-off-by: Samuel Iglesias Gonsálvez 
---
 src/compiler/spirv/spirv_to_nir.c | 25 +
 1 file changed, 21 insertions(+), 4 deletions(-)

diff --git a/src/compiler/spirv/spirv_to_nir.c 
b/src/compiler/spirv/spirv_to_nir.c
index 9751679..02dbceb 100644
--- a/src/compiler/spirv/spirv_to_nir.c
+++ b/src/compiler/spirv/spirv_to_nir.c
@@ -1089,18 +1089,35 @@ vtn_handle_constant(struct vtn_builder *b, SpvOp opcode,
  unsigned len0 = glsl_get_vector_elements(v0->const_type);
  unsigned len1 = glsl_get_vector_elements(v1->const_type);
 
- uint32_t u[8];
+ if (glsl_get_bit_size(v0->const_type) == 64)
+len0 *= 2;
+ if (glsl_get_bit_size(v1->const_type) == 64)
+len1 *= 2;
+
+ /* Allocate space for two dvec4s */
+ uint32_t u[16];
+ assert(len0 + len1 < 16);
  for (unsigned i = 0; i < len0; i++)
 u[i] = v0->constant->value.u[i];
  for (unsigned i = 0; i < len1; i++)
 u[len0 + i] = v1->constant->value.u[i];
 
- for (unsigned i = 0; i < count - 6; i++) {
+ unsigned bit_size = glsl_get_bit_size(val->const_type);
+ for (unsigned i = 0, j = 0; i < count - 6; i++, j++) {
 uint32_t comp = w[i + 6];
+/* In case of doubles, we need to pick two 32-bit values,
+ * then we duplicate the component to pick the right values.
+ */
+if (bit_size == 64)
+   comp *= 2;
 if (comp == (uint32_t)-1) {
-   val->constant->value.u[i] = 0xdeadbeef;
+   val->constant->value.u[j] = 0xdeadbeef;
+   if (bit_size == 64)
+  val->constant->value.u[++j] = 0xdeadbeef;
 } else {
-   val->constant->value.u[i] = u[comp];
+   val->constant->value.u[j] = u[comp];
+   if (bit_size == 64)
+  val->constant->value.u[++j] = u[comp + 1];
 }
  }
  break;
-- 
2.7.4

___
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/mesa-dev

[Mesa-dev] [PATCH 04/22] spirv: add DF support to vtn_const_ssa_value()

[Juan A. Suarez Romero]

From: Samuel Iglesias Gonsálvez 

Signed-off-by: Samuel Iglesias Gonsálvez 
---
 src/compiler/spirv/spirv_to_nir.c | 24 +---
 1 file changed, 17 insertions(+), 7 deletions(-)

diff --git a/src/compiler/spirv/spirv_to_nir.c 
b/src/compiler/spirv/spirv_to_nir.c
index dadf7fc..8569bc8 100644
--- a/src/compiler/spirv/spirv_to_nir.c
+++ b/src/compiler/spirv/spirv_to_nir.c
@@ -98,14 +98,19 @@ vtn_const_ssa_value(struct vtn_builder *b, nir_constant 
*constant,
case GLSL_TYPE_UINT:
case GLSL_TYPE_BOOL:
case GLSL_TYPE_FLOAT:
-   case GLSL_TYPE_DOUBLE:
+   case GLSL_TYPE_DOUBLE: {
+  int bit_size = glsl_get_bit_size(type);
   if (glsl_type_is_vector_or_scalar(type)) {
  unsigned num_components = glsl_get_vector_elements(val->type);
  nir_load_const_instr *load =
-nir_load_const_instr_create(b->shader, num_components, 32);
+nir_load_const_instr_create(b->shader, num_components, bit_size);
 
- for (unsigned i = 0; i < num_components; i++)
-load->value.u32[i] = constant->value.u[i];
+ for (unsigned i = 0; i < num_components; i++) {
+if (bit_size == 64)
+   load->value.f64[i] = constant->value.d[i];
+else
+   load->value.u32[i] = constant->value.u[i];
+ }
 
  nir_instr_insert_before_cf_list(>impl->body, >instr);
  val->def = >def;
@@ -119,10 +124,14 @@ vtn_const_ssa_value(struct vtn_builder *b, nir_constant 
*constant,
 struct vtn_ssa_value *col_val = rzalloc(b, struct vtn_ssa_value);
 col_val->type = glsl_get_column_type(val->type);
 nir_load_const_instr *load =
-   nir_load_const_instr_create(b->shader, rows, 32);
+   nir_load_const_instr_create(b->shader, rows, bit_size);
 
-for (unsigned j = 0; j < rows; j++)
-   load->value.u32[j] = constant->value.u[rows * i + j];
+for (unsigned j = 0; j < rows; j++) {
+   if (bit_size == 64)
+  load->value.f64[j] = constant->value.d[rows * i + j];
+   else
+  load->value.u32[j] = constant->value.u[rows * i + j];
+}
 
 nir_instr_insert_before_cf_list(>impl->body, >instr);
 col_val->def = >def;
@@ -131,6 +140,7 @@ vtn_const_ssa_value(struct vtn_builder *b, nir_constant 
*constant,
  }
   }
   break;
+   }
 
case GLSL_TYPE_ARRAY: {
   unsigned elems = glsl_get_length(val->type);
-- 
2.7.4

___
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/mesa-dev

[Mesa-dev] [PATCH 03/22] spirv: add double support for loading DF constants

[Juan A. Suarez Romero]

From: Samuel Iglesias Gonsálvez 

Signed-off-by: Samuel Iglesias Gonsálvez 
---
 src/compiler/spirv/spirv_to_nir.c | 11 +--
 1 file changed, 9 insertions(+), 2 deletions(-)

diff --git a/src/compiler/spirv/spirv_to_nir.c 
b/src/compiler/spirv/spirv_to_nir.c
index e5ec868..dadf7fc 100644
--- a/src/compiler/spirv/spirv_to_nir.c
+++ b/src/compiler/spirv/spirv_to_nir.c
@@ -1005,10 +1005,17 @@ vtn_handle_constant(struct vtn_builder *b, SpvOp opcode,
   break;
}
 
-   case SpvOpConstant:
+   case SpvOpConstant: {
   assert(glsl_type_is_scalar(val->const_type));
-  val->constant->value.u[0] = w[3];
+  int bit_size = glsl_get_bit_size(val->const_type);
+  if (bit_size == 64) {
+ val->constant->value.u[0] = w[3];
+ val->constant->value.u[1] = w[4];
+  } else {
+ val->constant->value.u[0] = w[3];
+  }
   break;
+   }
case SpvOpSpecConstant:
   assert(glsl_type_is_scalar(val->const_type));
   val->constant->value.u[0] = get_specialization(b, val, w[3]);
-- 
2.7.4

___
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/mesa-dev

[Mesa-dev] [PATCH 02/22] spirv: add definition of double based data types

[Juan A. Suarez Romero]

From: Samuel Iglesias Gonsálvez 

Signed-off-by: Samuel Iglesias Gonsálvez 
---
 src/compiler/spirv/spirv_to_nir.c | 6 --
 1 file changed, 4 insertions(+), 2 deletions(-)

diff --git a/src/compiler/spirv/spirv_to_nir.c 
b/src/compiler/spirv/spirv_to_nir.c
index c28d425..e5ec868 100644
--- a/src/compiler/spirv/spirv_to_nir.c
+++ b/src/compiler/spirv/spirv_to_nir.c
@@ -706,9 +706,11 @@ vtn_handle_type(struct vtn_builder *b, SpvOp opcode,
   val->type->type = (signedness ? glsl_int_type() : glsl_uint_type());
   break;
}
-   case SpvOpTypeFloat:
-  val->type->type = glsl_float_type();
+   case SpvOpTypeFloat: {
+  int bit_size = w[2];
+  val->type->type = bit_size == 64 ? glsl_double_type() : 
glsl_float_type();
   break;
+   }
 
case SpvOpTypeVector: {
   struct vtn_type *base = vtn_value(b, w[2], vtn_value_type_type)->type;
-- 
2.7.4

___
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/mesa-dev

[Mesa-dev] [PATCH 00/22] Enable Float64 capability support for Intel's Vulkan driver

[Juan A. Suarez Romero]

Hello,

This patch series implements support for Float64 capability to SPIR-V to NIR
pass and adds the needed bits to enable it in Intel's Vulkan driver. Float64
capability is only enabled in Intel's generations that support
ARB_gpu_shader_fp64 and ARB_vertex_attrib_64bit (currently Broadwell and newer),
follow-up patches will be sent once ARB_gpu_shader_fp64 and
ARB_vertex_attrib_64bit support for other generations (Haswell and Ivybridge) is
in master.

We have tested these patches against Vulkan conformance test suite [0]. All the
Float64 tests pass, except the ones that also requires other unsupported
capabilities. The results we got running VulkanCTS on master with and without
these patches are:

| name| master | patch series |
|-++--|
| pass|  76968 |77195 |
| fail|100 |  100 |
| crash   |  6 |5 |
| skip|  45990 |45764 |
| timeout |  0 |0 |
| warn|  7 |7 |
| incomplete  |  0 |0 |
| dmesg-warn  |  0 |0 |
| dmesg-fail  |  0 |0 |
| changes |  0 |  227 |
| fixes   |  0 |1 |
| regressions |  0 |0 |
| TOTAL   | 123071 |   123071 |


If you want to test these patches, you can clone our branch with the following
command:

$ git clone -b spirv-to-nir-rc1 https://github.com/Igalia/mesa.git

Thanks,

J.A.

[0] https://github.com/KhronosGroup/Vulkan-CTS



Juan A. Suarez Romero (2):
  anv/pipeline: get map for double input attributes
  anv/nir: add support for dvec3/4 consuming two locations

Samuel Iglesias Gonsálvez (20):
  spirv: fix typo in spec_constant_decoration_cb()
  spirv: add definition of double based data types
  spirv: add double support for loading DF constants
  spirv: add DF support to vtn_const_ssa_value()
  spirv: add DF support to SpvOp*ConstantComposite
  spirv: fix SpvOpSpecConstantOp with SpvOpVectorShuffle working with
double-based vecs
  spirv: add double support to SpvOpCompositeExtract
  spirv: add double support to _vtn_variable_load_store
  spirv: add double support to _vtn_block_load_store()
  spirv: Enable double floating points when copying variables in
_vtn_variable_copy()
  spirv: add support for doubles on OpComposite{Insert,Extract}
  spirv/nir: implement DF conversions
  spirv/nir: add (un)packDouble2x32() translation
  spirv: add support for doubles to OpSpecConstant
  isl: fix VA64 support for double and dvecN vertex attributes
  nir: Add flag to detect platforms with native float64 support
  spirv: Add nir_options to vtn_builder
  spirv: enable SpvCapabilityFloat64 only to supported platforms
  i965: enable nir_option's native_float64 to supported generations
  anv: enable shaderFloat64 feature

 src/amd/vulkan/radv_pipeline.c   |   6 +-
 src/compiler/nir/nir.h   |  10 ++
 src/compiler/nir/nir_gather_info.c   |   6 +-
 src/compiler/spirv/nir_spirv.h   |   5 +-
 src/compiler/spirv/spirv_to_nir.c| 193 ++-
 src/compiler/spirv/vtn_alu.c |  37 +++--
 src/compiler/spirv/vtn_glsl450.c |   2 +
 src/compiler/spirv/vtn_private.h |   4 +-
 src/compiler/spirv/vtn_variables.c   |   3 +
 src/gallium/drivers/freedreno/ir3/ir3_nir.c  |   1 +
 src/intel/isl/isl_format.c   |   4 +-
 src/intel/isl/isl_format_layout.csv  |   3 -
 src/intel/vulkan/anv_device.c|   4 +-
 src/intel/vulkan/anv_formats.c   |   8 +-
 src/intel/vulkan/anv_pipeline.c  |   6 +-
 src/intel/vulkan/genX_pipeline.c |  62 +
 src/mesa/drivers/dri/i965/brw_compiler.c |  50 +--
 src/mesa/drivers/dri/i965/brw_compiler.h |   2 +-
 src/mesa/drivers/dri/i965/brw_fs_visitor.cpp |  14 +-
 src/mesa/drivers/dri/i965/brw_nir.c  |  18 ++-
 src/mesa/drivers/dri/i965/brw_vec4.cpp   |  13 +-
 src/mesa/drivers/dri/i965/intel_screen.c |   3 +-
 22 files changed, 337 insertions(+), 117 deletions(-)

-- 
2.7.4

___
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/mesa-dev

[Mesa-dev] [PATCH 01/22] spirv: fix typo in spec_constant_decoration_cb()

[Juan A. Suarez Romero]

From: Samuel Iglesias Gonsálvez 

Signed-off-by: Samuel Iglesias Gonsálvez 
---
 src/compiler/spirv/spirv_to_nir.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/src/compiler/spirv/spirv_to_nir.c 
b/src/compiler/spirv/spirv_to_nir.c
index 34968a4..c28d425 100644
--- a/src/compiler/spirv/spirv_to_nir.c
+++ b/src/compiler/spirv/spirv_to_nir.c
@@ -932,7 +932,7 @@ vtn_null_constant(struct vtn_builder *b, const struct 
glsl_type *type)
 }
 
 static void
-spec_constant_deocoration_cb(struct vtn_builder *b, struct vtn_value *v,
+spec_constant_decoration_cb(struct vtn_builder *b, struct vtn_value *v,
  int member, const struct vtn_decoration *dec,
  void *data)
 {
@@ -954,7 +954,7 @@ static uint32_t
 get_specialization(struct vtn_builder *b, struct vtn_value *val,
uint32_t const_value)
 {
-   vtn_foreach_decoration(b, val, spec_constant_deocoration_cb, _value);
+   vtn_foreach_decoration(b, val, spec_constant_decoration_cb, _value);
return const_value;
 }
 
-- 
2.7.4

___
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/mesa-dev

[Mesa-dev] [Bug 98831] Constantly increasing memory consumption in JavaFX applications

[bugzilla-daemon]

https://bugs.freedesktop.org/show_bug.cgi?id=98831

--- Comment #7 from Michel Dänzer  ---
I can't seem to reproduce any of the problems described here with radeonsi from
current Mesa Git master and OpenJDK 8u111-b14 & OpenJFX 8u102-b14 packages from
Debian.

-- 
You are receiving this mail because:
You are the QA Contact for the bug.
You are the assignee for the bug.___
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/mesa-dev

Re: [Mesa-dev] EGL/android: pbuffer implementation.

[Liu, Zhiquan]

Hi Tomasz,

I submitted a new patch to enhance the pbuffer implementation.
Please check if it satisfy your requirement.
https://patchwork.freedesktop.org/patch/123848/

Thanks,
Zhiquan,

___
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/mesa-dev

Re: [Mesa-dev] [PATCH v2] gbm/drm: Pick the oldest available buffer in get_back_bo

[Pekka Paalanen]

On Wed, 23 Nov 2016 16:40:42 -0600
Derek Foreman  wrote:

> Applications may query the back buffer age to efficiently perform
> partial updates. Generally the application will keep a fixed length
> damage history, and use this to calculate what needs to be redrawn
> based on the age of the back buffer it's about to render to.
> 
> If presented with a buffer that has an age greater than the
> length of the damage history, the application will likely have
> to completely repaint the buffer.
> 
> Our current buffer selection strategy is to pick the first available
> buffer without considering its age.  If an application frequently
> manages to fit within two buffers but occasionally requires a third,
> this extra buffer will almost always be old enough to fall outside
> of a reasonably long damage history, and require a full repaint.
> 
> This patch changes the buffer selection behaviour to prefer the oldest
> available buffer.
> 
> By selecting the oldest available buffer, the application will likely
> always be able to use its damage history, at a cost of having to
> perform slightly more work every frame.  This is an improvement if
> the cost of a full repaint is heavy, and the surface damage between
> frames is relatively small.
> 
> It should be noted that since we don't currently trim our queue in
> any way, an application that briefly needs a large number of buffers
> will continue to receive older buffers than it would if it only ever
> needed two buffers.
> 
> Reviewed-by: Daniel Stone 
> Signed-off-by: Derek Foreman 
> ---
> 
> The only changes are in the commit log, which hopefully better
> expresses the rationale for the change.

Hi,

yes, I'm happy with the caveats being documented now. Therefore:

Reviewed-by: Pekka Paalanen 


Thanks,
pq

>  src/egl/drivers/dri2/platform_drm.c | 6 --
>  1 file changed, 4 insertions(+), 2 deletions(-)
> 
> diff --git a/src/egl/drivers/dri2/platform_drm.c 
> b/src/egl/drivers/dri2/platform_drm.c
> index 2099314..f812ab5 100644
> --- a/src/egl/drivers/dri2/platform_drm.c
> +++ b/src/egl/drivers/dri2/platform_drm.c
> @@ -215,13 +215,15 @@ get_back_bo(struct dri2_egl_surface *dri2_surf)
> struct dri2_egl_display *dri2_dpy =
>dri2_egl_display(dri2_surf->base.Resource.Display);
> struct gbm_dri_surface *surf = dri2_surf->gbm_surf;
> +   int age = 0;
> unsigned i;
>  
> if (dri2_surf->back == NULL) {
>for (i = 0; i < ARRAY_SIZE(dri2_surf->color_buffers); i++) {
> -  if (!dri2_surf->color_buffers[i].locked) {
> +  if (!dri2_surf->color_buffers[i].locked &&
> +   dri2_surf->color_buffers[i].age >= age) {
>   dri2_surf->back = _surf->color_buffers[i];
> - break;
> + age = dri2_surf->color_buffers[i].age;
>}
>}
> }



pgpDBMnkzh9cV.pgp
Description: OpenPGP digital signature
___
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/mesa-dev