Re: [Mesa-dev] [PATCH] swr: enable clear_texture with util_clear_texture

[Edward O'Callaghan]

Reviewed-by: Edward O'Callaghan 

On 02/26/2017 02:09 PM, Bruce Cherniak wrote:
> Passes corresponding piglit tests.
> ---
>  src/gallium/drivers/swr/swr_context.cpp | 1 +
>  src/gallium/drivers/swr/swr_screen.cpp  | 2 +-
>  2 files changed, 2 insertions(+), 1 deletion(-)
> 
> diff --git a/src/gallium/drivers/swr/swr_context.cpp 
> b/src/gallium/drivers/swr/swr_context.cpp
> index 3e17edc..b89ce1b 100644
> --- a/src/gallium/drivers/swr/swr_context.cpp
> +++ b/src/gallium/drivers/swr/swr_context.cpp
> @@ -486,6 +486,7 @@ swr_create_context(struct pipe_screen *p_screen, void 
> *priv, unsigned flags)
> ctx->pipe.buffer_subdata = u_default_buffer_subdata;
> ctx->pipe.texture_subdata = u_default_texture_subdata;
>  
> +   ctx->pipe.clear_texture = util_clear_texture;
> ctx->pipe.resource_copy_region = swr_resource_copy;
> ctx->pipe.render_condition = swr_render_condition;
>  
> diff --git a/src/gallium/drivers/swr/swr_screen.cpp 
> b/src/gallium/drivers/swr/swr_screen.cpp
> index f4fe1f3..f2ad4dd 100644
> --- a/src/gallium/drivers/swr/swr_screen.cpp
> +++ b/src/gallium/drivers/swr/swr_screen.cpp
> @@ -244,6 +244,7 @@ swr_get_param(struct pipe_screen *screen, enum pipe_cap 
> param)
> case PIPE_CAP_CLIP_HALFZ:
> case PIPE_CAP_POLYGON_OFFSET_CLAMP:
> case PIPE_CAP_DEPTH_BOUNDS_TEST:
> +   case PIPE_CAP_CLEAR_TEXTURE:
> case PIPE_CAP_TEXTURE_FLOAT_LINEAR:
> case PIPE_CAP_TEXTURE_HALF_FLOAT_LINEAR:
> case PIPE_CAP_CULL_DISTANCE:
> @@ -284,7 +285,6 @@ swr_get_param(struct pipe_screen *screen, enum pipe_cap 
> param)
> case PIPE_CAP_FORCE_PERSAMPLE_INTERP:
> case PIPE_CAP_SHAREABLE_SHADERS:
> case PIPE_CAP_COPY_BETWEEN_COMPRESSED_AND_PLAIN_FORMATS:
> -   case PIPE_CAP_CLEAR_TEXTURE:
> case PIPE_CAP_DRAW_PARAMETERS:
> case PIPE_CAP_TGSI_PACK_HALF_FLOAT:
> case PIPE_CAP_MULTI_DRAW_INDIRECT:
> 



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Re: [Mesa-dev] [PATCH v2 1/1] clover: Dump linked binary to a different file

[Francisco Jerez]

Jan Vesely  writes:

> this allows to pass the generated files directly to llc or bugpoint
>
> v2: add atomic counter ID
>
> Signed-off-by: Jan Vesely 
> ---
>  src/gallium/state_trackers/clover/llvm/invocation.cpp | 8 ++--
>  1 file changed, 6 insertions(+), 2 deletions(-)
>
> diff --git a/src/gallium/state_trackers/clover/llvm/invocation.cpp 
> b/src/gallium/state_trackers/clover/llvm/invocation.cpp
> index f63ff3d..bb9d95d 100644
> --- a/src/gallium/state_trackers/clover/llvm/invocation.cpp
> +++ b/src/gallium/state_trackers/clover/llvm/invocation.cpp
> @@ -281,8 +281,12 @@ clover::llvm::link_program(const std::vector 
> ,
>  
> optimize(*mod, c->getCodeGenOpts().OptimizationLevel, !create_library);
>  
> +   static ::std::atomic_uint seq(0);

The leading double colon here and below seem redundant (it's used in some
places to disambiguate the top level llvm namespace, but it shouldn't be
necessary for the std namespace).

> +   ::std::string id = "." + mod->getModuleIdentifier() + "-" +
> +  ::std::to_string(seq++);
> +

Mark as const.  With that cleaned up:

Reviewed-by: Francisco Jerez 

> if (has_flag(debug::llvm))
> -  debug::log(".ll", print_module_bitcode(*mod));
> +  debug::log(id + ".ll", print_module_bitcode(*mod));
>  
> if (create_library) {
>return build_module_library(*mod, module::section::text_library);
> @@ -292,7 +296,7 @@ clover::llvm::link_program(const std::vector 
> ,
>  
> } else if (ir == PIPE_SHADER_IR_NATIVE) {
>if (has_flag(debug::native))
> - debug::log(".asm", print_module_native(*mod, target));
> + debug::log(id +  ".asm", print_module_native(*mod, target));
>  
>return build_module_native(*mod, target, *c, r_log);
>  
> -- 
> 2.9.3


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Re: [Mesa-dev] [PATCH v3 3/3] i965/fs: fix indirect load DF uniforms on BSW/BXT

[Francisco Jerez]

Samuel Iglesias Gonsálvez  writes:

> The lowered BSW/BXT indirect move instructions had incorrect
> source types, which luckily wasn't causing incorrect assembly to be
> generated due to the bug fixed in the next patch, but would have
> confused the remaining back-end IR infrastructure due to the mismatch
> between the IR source types and the emitted machine code.
>
> v2:
> - Improve commit log (Curro)
> - Fix read_size (Curro)
> - Fix DF uniform array detection in assign_constant_locations() when
>   it is acceded with 32-bit MOV_INDIRECTs in BSW/BXT.
>
> v3:
> - Move changes in assign_constant_locations() to other patch.
>
> Signed-off-by: Samuel Iglesias Gonsálvez 
> Cc: "17.0" 

Reviewed-by: Francisco Jerez 

> ---
>  src/mesa/drivers/dri/i965/brw_fs_nir.cpp | 41 
> 
>  1 file changed, 20 insertions(+), 21 deletions(-)
>
> diff --git a/src/mesa/drivers/dri/i965/brw_fs_nir.cpp 
> b/src/mesa/drivers/dri/i965/brw_fs_nir.cpp
> index a977ee4273..10aa5fde32 100644
> --- a/src/mesa/drivers/dri/i965/brw_fs_nir.cpp
> +++ b/src/mesa/drivers/dri/i965/brw_fs_nir.cpp
> @@ -3815,31 +3815,30 @@ fs_visitor::nir_emit_intrinsic(const fs_builder , 
> nir_intrinsic_instr *instr
>   unsigned read_size = instr->const_index[1] -
>  (instr->num_components - 1) * type_sz(dest.type);
>  
> - fs_reg indirect_chv_high_32bit;
> - bool is_chv_bxt_64bit =
> -(devinfo->is_cherryview || devinfo->is_broxton) &&
> -type_sz(dest.type) == 8;
> - if (is_chv_bxt_64bit) {
> -indirect_chv_high_32bit = vgrf(glsl_type::uint_type);
> -/* Calculate indirect address to read high 32 bits */
> -bld.ADD(indirect_chv_high_32bit, indirect, brw_imm_ud(4));
> - }
> + bool supports_64bit_indirects =
> +!devinfo->is_cherryview && !devinfo->is_broxton;
>  
> - for (unsigned j = 0; j < instr->num_components; j++) {
> -if (!is_chv_bxt_64bit) {
> + if (type_sz(dest.type) != 8 || supports_64bit_indirects) {
> +for (unsigned j = 0; j < instr->num_components; j++) {
> bld.emit(SHADER_OPCODE_MOV_INDIRECT,
>  offset(dest, bld, j), offset(src, bld, j),
>  indirect, brw_imm_ud(read_size));
> -} else {
> -   bld.emit(SHADER_OPCODE_MOV_INDIRECT,
> -subscript(offset(dest, bld, j), 
> BRW_REGISTER_TYPE_UD, 0),
> -offset(src, bld, j),
> -indirect, brw_imm_ud(read_size));
> -
> -   bld.emit(SHADER_OPCODE_MOV_INDIRECT,
> -subscript(offset(dest, bld, j), 
> BRW_REGISTER_TYPE_UD, 1),
> -offset(src, bld, j),
> -indirect_chv_high_32bit, brw_imm_ud(read_size));
> +}
> + } else {
> +const unsigned num_mov_indirects =
> +   type_sz(dest.type) / type_sz(BRW_REGISTER_TYPE_UD);
> +/* We read a little bit less per MOV INDIRECT, as they are now
> + * 32-bits ones instead of 64-bit. Fix read_size then.
> + */
> +const unsigned read_size_32bit = read_size -
> +(num_mov_indirects - 1) * type_sz(BRW_REGISTER_TYPE_UD);
> +for (unsigned j = 0; j < instr->num_components; j++) {
> +   for (unsigned i = 0; i < num_mov_indirects; i++) {
> +  bld.emit(SHADER_OPCODE_MOV_INDIRECT,
> +   subscript(offset(dest, bld, j), 
> BRW_REGISTER_TYPE_UD, i),
> +   subscript(offset(src, bld, j), 
> BRW_REGISTER_TYPE_UD, i),
> +   indirect, brw_imm_ud(read_size_32bit));
> +   }
>  }
>   }
>}
> -- 
> 2.11.0


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Re: [Mesa-dev] [Mesa-stable] [PATCH v3 1/3] i965/fs: mark last DF uniform array element as 64 bit live one

[Francisco Jerez]

Samuel Iglesias Gonsálvez  writes:

> This bug can make that we don't detect the end of a contiguous area
> correctly and push larger areas than the real ones.
>
> Signed-off-by: Samuel Iglesias Gonsálvez 
> Cc: "17.0" 

Reviewed-by: Francisco Jerez 

> ---
>
> I am sending this mini-series to replace this patch from v2:
>
> "[PATCH v2 1/3] i965/fs: fix indirect load DF uniforms on BSW/BXT"
>
> The rest of parches of v2 are R-b and waiting for being pushed.
>
>  src/mesa/drivers/dri/i965/brw_fs.cpp | 3 +++
>  1 file changed, 3 insertions(+)
>
> diff --git a/src/mesa/drivers/dri/i965/brw_fs.cpp 
> b/src/mesa/drivers/dri/i965/brw_fs.cpp
> index c348bc7138..c713caa9b6 100644
> --- a/src/mesa/drivers/dri/i965/brw_fs.cpp
> +++ b/src/mesa/drivers/dri/i965/brw_fs.cpp
> @@ -1952,6 +1952,9 @@ fs_visitor::assign_constant_locations()
> }
>  }
>  is_live[last] = true;
> +if (type_sz(inst->src[i].type) == 8) {
> +  is_live_64bit[last] = true;
> +}
>   } else {
>  if (constant_nr >= 0 && constant_nr < (int) uniforms) {
> int regs_read = inst->components_read(i) *
> -- 
> 2.11.0
>
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[Mesa-dev] [Bug 73777] xf86drm.h:40:17: error: drm.h: No such file or directory

[bugzilla-daemon]

https://bugs.freedesktop.org/show_bug.cgi?id=73777

Joaquín Montero Salinas  changed:

   What|Removed |Added

 CC||joq...@gmail.com

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[Mesa-dev] [PATCH] docs: update features.txt for GL_ARB_clear_texture with swr

[Bruce Cherniak]

---
 docs/features.txt | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/docs/features.txt b/docs/features.txt
index d9528e9..c42581a 100644
--- a/docs/features.txt
+++ b/docs/features.txt
@@ -192,7 +192,7 @@ GL 4.4, GLSL 4.40 -- all DONE: i965/gen8+, nvc0, radeonsi
 
   GL_MAX_VERTEX_ATTRIB_STRIDE   DONE (all drivers)
   GL_ARB_buffer_storage DONE (i965, nv50, r600)
-  GL_ARB_clear_texture  DONE (i965, nv50, 
r600, llvmpipe, softpipe)
+  GL_ARB_clear_texture  DONE (i965, nv50, 
r600, llvmpipe, softpipe, swr)
   GL_ARB_enhanced_layouts   DONE (i965, nv50, 
llvmpipe, softpipe)
   - compile-time constant expressions   DONE
   - explicit byte offsets for blocksDONE
-- 
2.7.4

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[Mesa-dev] [PATCH] swr: enable clear_texture with util_clear_texture

[Bruce Cherniak]

Passes corresponding piglit tests.
---
 src/gallium/drivers/swr/swr_context.cpp | 1 +
 src/gallium/drivers/swr/swr_screen.cpp  | 2 +-
 2 files changed, 2 insertions(+), 1 deletion(-)

diff --git a/src/gallium/drivers/swr/swr_context.cpp 
b/src/gallium/drivers/swr/swr_context.cpp
index 3e17edc..b89ce1b 100644
--- a/src/gallium/drivers/swr/swr_context.cpp
+++ b/src/gallium/drivers/swr/swr_context.cpp
@@ -486,6 +486,7 @@ swr_create_context(struct pipe_screen *p_screen, void 
*priv, unsigned flags)
ctx->pipe.buffer_subdata = u_default_buffer_subdata;
ctx->pipe.texture_subdata = u_default_texture_subdata;
 
+   ctx->pipe.clear_texture = util_clear_texture;
ctx->pipe.resource_copy_region = swr_resource_copy;
ctx->pipe.render_condition = swr_render_condition;
 
diff --git a/src/gallium/drivers/swr/swr_screen.cpp 
b/src/gallium/drivers/swr/swr_screen.cpp
index f4fe1f3..f2ad4dd 100644
--- a/src/gallium/drivers/swr/swr_screen.cpp
+++ b/src/gallium/drivers/swr/swr_screen.cpp
@@ -244,6 +244,7 @@ swr_get_param(struct pipe_screen *screen, enum pipe_cap 
param)
case PIPE_CAP_CLIP_HALFZ:
case PIPE_CAP_POLYGON_OFFSET_CLAMP:
case PIPE_CAP_DEPTH_BOUNDS_TEST:
+   case PIPE_CAP_CLEAR_TEXTURE:
case PIPE_CAP_TEXTURE_FLOAT_LINEAR:
case PIPE_CAP_TEXTURE_HALF_FLOAT_LINEAR:
case PIPE_CAP_CULL_DISTANCE:
@@ -284,7 +285,6 @@ swr_get_param(struct pipe_screen *screen, enum pipe_cap 
param)
case PIPE_CAP_FORCE_PERSAMPLE_INTERP:
case PIPE_CAP_SHAREABLE_SHADERS:
case PIPE_CAP_COPY_BETWEEN_COMPRESSED_AND_PLAIN_FORMATS:
-   case PIPE_CAP_CLEAR_TEXTURE:
case PIPE_CAP_DRAW_PARAMETERS:
case PIPE_CAP_TGSI_PACK_HALF_FLOAT:
case PIPE_CAP_MULTI_DRAW_INDIRECT:
-- 
2.7.4

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[Mesa-dev] [Bug 73777] xf86drm.h:40:17: error: drm.h: No such file or directory

[bugzilla-daemon]

https://bugs.freedesktop.org/show_bug.cgi?id=73777

Joaquín Montero Salinas  changed:

   What|Removed |Added

 Status|RESOLVED|REOPENED
 Resolution|FIXED   |---

--- Comment #3 from Joaquín Montero Salinas  ---
I'm having this exact issue with libdrm-2.4.75. The makefile installs DRM
headers under /usr/local/include/libdrm on my system, while xf86drm.h and
xf86drmMode.h include .

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Re: [Mesa-dev] [PATCH] vulkan/wsi: Improve the DRI3 error message

[Jacob Lifshay]

Just to double check, is there anything else I need to do to have this
patch committed?
Jacob Lifshay

On Feb 19, 2017 02:08, "Kai Wasserbäch"  wrote:

> Jason Ekstrand wrote on 19.02.2017 06:01:
> > On Feb 18, 2017 12:37 PM, "Kai Wasserbäch" 
> > wrote:
> >
> > Hey Jacob,
> > sorry for not spotting this the first time, but I have an additional
> > comment.
> > Please see below.
> >
> > Jacob Lifshay wrote on 18.02.2017 18:48:> This commit improves the
> message
> > by
> > telling them that they could probably
> >> enable DRI3.  More importantly, it includes a little heuristic to check
> >> to see if we're running on AMD or NVIDIA's proprietary X11 drivers and,
> >> if we are, doesn't emit the warning.  This way, users with both a
> discrete
> >> card and Intel graphics don't get the warning when they're just running
> >> on the discrete card.
> >>
> >> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=99715
> >> Co-authored-by: Jason Ekstrand 
> >> ---
> >>  src/vulkan/wsi/wsi_common_x11.c | 47 ++
> > ++-
> >>  1 file changed, 37 insertions(+), 10 deletions(-)
> >>
> >> diff --git a/src/vulkan/wsi/wsi_common_x11.c
> b/src/vulkan/wsi/wsi_common_
> > x11.c
> >> index 64ba921..b3a017a 100644
> >> --- a/src/vulkan/wsi/wsi_common_x11.c
> >> +++ b/src/vulkan/wsi/wsi_common_x11.c
> >> @@ -49,6 +49,7 @@
> >>  struct wsi_x11_connection {
> >> bool has_dri3;
> >> bool has_present;
> >> +   bool is_proprietary_x11;
> >>  };
> >>
> >>  struct wsi_x11 {
> >> @@ -63,8 +64,8 @@ static struct wsi_x11_connection *
> >>  wsi_x11_connection_create(const VkAllocationCallbacks *alloc,
> >>xcb_connection_t *conn)
> >>  {
> >> -   xcb_query_extension_cookie_t dri3_cookie, pres_cookie;
> >> -   xcb_query_extension_reply_t *dri3_reply, *pres_reply;
> >> +   xcb_query_extension_cookie_t dri3_cookie, pres_cookie, amd_cookie,
> > nv_cookie;
> >> +   xcb_query_extension_reply_t *dri3_reply, *pres_reply, *amd_reply,
> > *nv_reply;
> >>
> >> struct wsi_x11_connection *wsi_conn =
> >>vk_alloc(alloc, sizeof(*wsi_conn), 8,
> >> @@ -75,20 +76,39 @@ wsi_x11_connection_create(const
> VkAllocationCallbacks
> > *alloc,
> >> dri3_cookie = xcb_query_extension(conn, 4, "DRI3");
> >> pres_cookie = xcb_query_extension(conn, 7, "PRESENT");
> >>
> >> +   /* We try to be nice to users and emit a warning if they try to use
> a
> >> +* Vulkan application on a system without DRI3 enabled.  However,
> > this ends
> >> +* up spewing the warning when a user has, for example, both Intel
> >> +* integrated graphics and a discrete card with proprietary driers
> > and are
> >> +* running on the discrete card with the proprietary DDX.  In this
> > case, we
> >> +* really don't want to print the warning because it just confuses
> > users.
> >> +* As a heuristic to detect this case, we check for a couple of
> > proprietary
> >> +* X11 extensions.
> >> +*/
> >> +   amd_cookie = xcb_query_extension(conn, 11, "ATIFGLRXDRI");
> >> +   nv_cookie = xcb_query_extension(conn, 10, "NV-CONTROL");
> >> +
> >> dri3_reply = xcb_query_extension_reply(conn, dri3_cookie, NULL);
> >> pres_reply = xcb_query_extension_reply(conn, pres_cookie, NULL);
> >> -   if (dri3_reply == NULL || pres_reply == NULL) {
> >> +   amd_reply = xcb_query_extension_reply(conn, amd_cookie, NULL);
> >> +   nv_reply = xcb_query_extension_reply(conn, nv_cookie, NULL);
> >> +   if (!dri3_reply || !pres_reply || !amd_reply || !nv_reply) {
> >
> > I don't feel wsi_x11_connection_create should fail if there's no
> amd_reply
> > or
> > nv_reply. That should just lead to unconditionally warning, in case
> there's
> > no
> > DRI3 support.
> >
> >
> > Of there is no reply then we either lost our connection to the X server
> or
> > ran out of memory.  Either of those seem like a valid excuse to fail.
> The
> > chances of successfully connecting to X to create a swapchain at that
> point
> > is pretty close to zero.
>
> Fair enough.
>
> > With that fixed, this patch is
> >   Reviewed-by: Kai Wasserbäch 
> >
> > Cheers,
> > Kai
> >
> >>free(dri3_reply);
> >>free(pres_reply);
> >> +  free(amd_reply);
> >> +  free(nv_reply);
> >>vk_free(alloc, wsi_conn);
> >>return NULL;
> >> }
> >>
> >> wsi_conn->has_dri3 = dri3_reply->present != 0;
> >> wsi_conn->has_present = pres_reply->present != 0;
> >> +   wsi_conn->is_proprietary_x11 = amd_reply->present ||
> > nv_reply->present;
> >>
> >> free(dri3_reply);
> >> free(pres_reply);
> >> +   free(amd_reply);
> >> +   free(nv_reply);
> >>
> >> return wsi_conn;
> >>  }
> >> @@ -100,6 +120,18 @@ wsi_x11_connection_destroy(const
> > VkAllocationCallbacks *alloc,
> >> vk_free(alloc, conn);
> >>  }
> >>
> >> +static bool
> >> +wsi_x11_check_for_dri3(struct 

Re: [Mesa-dev] [PATCH] radv/ac: Add integer->integer casts.

[Edward O'Callaghan]

Acked-by: Edward O'Callaghan 

On 02/26/2017 12:39 PM, Bas Nieuwenhuizen wrote:
> Signed-off-by: Bas Nieuwenhuizen 
> ---
>  src/amd/common/ac_nir_to_llvm.c | 18 ++
>  1 file changed, 18 insertions(+)
> 
> diff --git a/src/amd/common/ac_nir_to_llvm.c b/src/amd/common/ac_nir_to_llvm.c
> index 9778581a1ef..4f3d689db7e 100644
> --- a/src/amd/common/ac_nir_to_llvm.c
> +++ b/src/amd/common/ac_nir_to_llvm.c
> @@ -1476,6 +1476,24 @@ static void visit_alu(struct nir_to_llvm_context *ctx, 
> nir_alu_instr *instr)
>   case nir_op_d2f:
>   result = LLVMBuildFPTrunc(ctx->builder, src[0], 
> to_float_type(ctx, def_type), "");
>   break;
> + case nir_op_u2u32:
> + case nir_op_u2u64:
> + case nir_op_u2i32:
> + case nir_op_u2i64:
> + if (get_elem_bits(ctx, LLVMTypeOf(src[0])) < get_elem_bits(ctx, 
> def_type))
> + result = LLVMBuildZExt(ctx->builder, src[0], def_type, 
> "");
> + else
> + result = LLVMBuildTrunc(ctx->builder, src[0], def_type, 
> "");
> + break;
> + case nir_op_i2u32:
> + case nir_op_i2u64:
> + case nir_op_i2i32:
> + case nir_op_i2i64:
> + if (get_elem_bits(ctx, LLVMTypeOf(src[0])) < get_elem_bits(ctx, 
> def_type))
> + result = LLVMBuildSExt(ctx->builder, src[0], def_type, 
> "");
> + else
> + result = LLVMBuildTrunc(ctx->builder, src[0], def_type, 
> "");
> + break;
>   case nir_op_bcsel:
>   result = emit_bcsel(ctx, src[0], src[1], src[2]);
>   break;
> 



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[Mesa-dev] [PATCH] radv/ac: Add integer->integer casts.

[Bas Nieuwenhuizen]

Signed-off-by: Bas Nieuwenhuizen 
---
 src/amd/common/ac_nir_to_llvm.c | 18 ++
 1 file changed, 18 insertions(+)

diff --git a/src/amd/common/ac_nir_to_llvm.c b/src/amd/common/ac_nir_to_llvm.c
index 9778581a1ef..4f3d689db7e 100644
--- a/src/amd/common/ac_nir_to_llvm.c
+++ b/src/amd/common/ac_nir_to_llvm.c
@@ -1476,6 +1476,24 @@ static void visit_alu(struct nir_to_llvm_context *ctx, 
nir_alu_instr *instr)
case nir_op_d2f:
result = LLVMBuildFPTrunc(ctx->builder, src[0], 
to_float_type(ctx, def_type), "");
break;
+   case nir_op_u2u32:
+   case nir_op_u2u64:
+   case nir_op_u2i32:
+   case nir_op_u2i64:
+   if (get_elem_bits(ctx, LLVMTypeOf(src[0])) < get_elem_bits(ctx, 
def_type))
+   result = LLVMBuildZExt(ctx->builder, src[0], def_type, 
"");
+   else
+   result = LLVMBuildTrunc(ctx->builder, src[0], def_type, 
"");
+   break;
+   case nir_op_i2u32:
+   case nir_op_i2u64:
+   case nir_op_i2i32:
+   case nir_op_i2i64:
+   if (get_elem_bits(ctx, LLVMTypeOf(src[0])) < get_elem_bits(ctx, 
def_type))
+   result = LLVMBuildSExt(ctx->builder, src[0], def_type, 
"");
+   else
+   result = LLVMBuildTrunc(ctx->builder, src[0], def_type, 
"");
+   break;
case nir_op_bcsel:
result = emit_bcsel(ctx, src[0], src[1], src[2]);
break;
-- 
2.11.1

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Re: [Mesa-dev] [PATCH 10/24] radeonsi: replace SI.packf16 with amdgcn.cvt.pkrtz

[Matt Arsenault]

> On Feb 25, 2017, at 15:58, Marek Olšák  wrote:
> 
> }
> +
> +LLVMValueRef ac_emit_cvt_pkrtz_f16(struct ac_llvm_context *ctx,
> +LLVMValueRef args[2])
> +{
> + if (HAVE_LLVM >= 0x0500) {
> + LLVMTypeRef v2f16 =
> + LLVMVectorType(LLVMHalfTypeInContext(ctx->context), 2);
> + LLVMValueRef res =
> + ac_emit_llvm_intrinsic(ctx, "llvm.amdgcn.cvt.pkrtz",
> +v2f16, args, 2,
> +AC_FUNC_ATTR_READNONE);
> + return LLVMBuildBitCast(ctx->builder, res, ctx->i32, "");
> + }
> +
> + return ac_emit_llvm_intrinsic(ctx, "llvm.SI.packf16", ctx->i32, args, 2,
> +   AC_FUNC_ATTR_READNONE |
> +   AC_FUNC_ATTR_LEGACY);
> +}
> diff --git a/src/amd/common/ac_llvm_build.h b/src/amd/common/ac_llvm_build.h
> index f57acc2..e6bb

I would probably swap where you do the bitcast here, and cast the legacy 
intrinsic to <2 x half>. With the pkrtz -> exp.compr, pattern you’ll be 
emitting a cast to i32 and back. While that will be cleaned up, you’re wasting 
some compile time/memory doing so.

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[Mesa-dev] [PATCH 1/2] gallium/u_queue: fix a crash with atexit handlers

[Grazvydas Ignotas]

Commit 4aea8fe ("gallium/u_queue: fix random crashes when the app calls
exit()") added a atexit handler which calls
util_queue_killall_and_wait() for each queue to stop the threads.
However the app is also free to use atexit handlers to clean up things,
leading to util_queue_destroy() call which will also call
util_queue_killall_and_wait() for the same queue again, causing threads
being joined twice, and that is undefined. This happens with libglut,
for example. A simple fix is to just set num_threads to 0 as there are
no more valid threads after util_queue_killall_and_wait() returns.

Fixes: 4aea8fe "gallium/u_queue: fix random crashes when the app calls exit()"
Signed-off-by: Grazvydas Ignotas 
---
no commit access

 src/gallium/auxiliary/util/u_queue.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/src/gallium/auxiliary/util/u_queue.c 
b/src/gallium/auxiliary/util/u_queue.c
index 386dc4a..c51b621 100644
--- a/src/gallium/auxiliary/util/u_queue.c
+++ b/src/gallium/auxiliary/util/u_queue.c
@@ -272,6 +272,7 @@ util_queue_killall_and_wait(struct util_queue *queue)
 
for (i = 0; i < queue->num_threads; i++)
   pipe_thread_wait(queue->threads[i]);
+   queue->num_threads = 0;
 }
 
 void
-- 
2.7.4

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[Mesa-dev] [PATCH 2/2] gallium/u_queue: set num_threads correctly if not all threads start

[Grazvydas Ignotas]

If i-th thread could not be created it means we have i threads,
not i+1, because we start from 0.

Fixes: 404d0d5 "gallium/u_queue: add an option to have multiple worker threads"
Signed-off-by: Grazvydas Ignotas 
---
no commit access

 src/gallium/auxiliary/util/u_queue.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/gallium/auxiliary/util/u_queue.c 
b/src/gallium/auxiliary/util/u_queue.c
index c51b621..8dd4cb3 100644
--- a/src/gallium/auxiliary/util/u_queue.c
+++ b/src/gallium/auxiliary/util/u_queue.c
@@ -236,7 +236,7 @@ util_queue_init(struct util_queue *queue,
 goto fail;
  } else {
 /* at least one thread created, so use it */
-queue->num_threads = i+1;
+queue->num_threads = i;
 break;
  }
   }
-- 
2.7.4

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Re: [Mesa-dev] [PATCH 02/24] gallivm, ac: add writeonly and inaccessiblememonly attributes

[Jan Vesely]

On Sun, 2017-02-26 at 00:58 +0100, Marek Olšák wrote:
> From: Marek Olšák 
> 
> ---
>  src/amd/common/ac_llvm_util.c   | 2 ++
>  src/amd/common/ac_llvm_util.h   | 2 ++
>  src/gallium/auxiliary/gallivm/lp_bld_intr.c | 2 ++
>  src/gallium/auxiliary/gallivm/lp_bld_intr.h | 2 ++
>  4 files changed, 8 insertions(+)
> 
> diff --git a/src/amd/common/ac_llvm_util.c b/src/amd/common/ac_llvm_util.c
> index fb525dd..3cc06d4 100644
> --- a/src/amd/common/ac_llvm_util.c
> +++ b/src/amd/common/ac_llvm_util.c
> @@ -165,20 +165,22 @@ static LLVMAttribute ac_attr_to_llvm_attr(enum 
> ac_func_attr attr)
>  static const char *attr_to_str(enum ac_func_attr attr)
>  {
> switch (attr) {
> case AC_FUNC_ATTR_ALWAYSINLINE: return "alwaysinline";
> case AC_FUNC_ATTR_BYVAL: return "byval";
> case AC_FUNC_ATTR_INREG: return "inreg";
> case AC_FUNC_ATTR_NOALIAS: return "noalias";
> case AC_FUNC_ATTR_NOUNWIND: return "nounwind";
> case AC_FUNC_ATTR_READNONE: return "readnone";
> case AC_FUNC_ATTR_READONLY: return "readonly";
> +   case AC_FUNC_ATTR_WRITEONLY: return "writeonly";
> +   case AC_FUNC_ATTR_INACCESSIBLE_MEM_ONLY: return "inaccessiblememonly";

does this not give "error: duplicate case value" when compiled with
LLVM-3.9 ?

Jan

> default:
>  fprintf(stderr, "Unhandled function attribute: %x\n", attr);
>  return 0;
> }
>  }
>  
>  #endif
>  
>  static void
>  ac_add_function_attr(LLVMContextRef ctx, LLVMValueRef function,
> diff --git a/src/amd/common/ac_llvm_util.h b/src/amd/common/ac_llvm_util.h
> index 4fe4ab4..1cdee2e 100644
> --- a/src/amd/common/ac_llvm_util.h
> +++ b/src/amd/common/ac_llvm_util.h
> @@ -34,20 +34,22 @@ extern "C" {
>  #endif
>  
>  enum ac_func_attr {
>   AC_FUNC_ATTR_ALWAYSINLINE = (1 << 0),
>   AC_FUNC_ATTR_BYVAL= (1 << 1),
>   AC_FUNC_ATTR_INREG= (1 << 2),
>   AC_FUNC_ATTR_NOALIAS  = (1 << 3),
>   AC_FUNC_ATTR_NOUNWIND = (1 << 4),
>   AC_FUNC_ATTR_READNONE = (1 << 5),
>   AC_FUNC_ATTR_READONLY = (1 << 6),
> + AC_FUNC_ATTR_WRITEONLY= HAVE_LLVM >= 0x0400 ? (1 << 7) : 0,
> + AC_FUNC_ATTR_INACCESSIBLE_MEM_ONLY = HAVE_LLVM >= 0x0400 ? (1 << 8) : 0,
>  
>   /* Legacy intrinsic that needs attributes on function declarations
>* and they must match the internal LLVM definition exactly, otherwise
>* intrinsic selection fails.
>*/
>   AC_FUNC_ATTR_LEGACY   = (1u << 31),
>  };
>  
>  LLVMTargetMachineRef ac_create_target_machine(enum radeon_family family, 
> bool supports_spill);
>  
> diff --git a/src/gallium/auxiliary/gallivm/lp_bld_intr.c 
> b/src/gallium/auxiliary/gallivm/lp_bld_intr.c
> index 1b50e68..0be57c9 100644
> --- a/src/gallium/auxiliary/gallivm/lp_bld_intr.c
> +++ b/src/gallium/auxiliary/gallivm/lp_bld_intr.c
> @@ -143,20 +143,22 @@ static LLVMAttribute lp_attr_to_llvm_attr(enum 
> lp_func_attr attr)
>  static const char *attr_to_str(enum lp_func_attr attr)
>  {
> switch (attr) {
> case LP_FUNC_ATTR_ALWAYSINLINE: return "alwaysinline";
> case LP_FUNC_ATTR_BYVAL: return "byval";
> case LP_FUNC_ATTR_INREG: return "inreg";
> case LP_FUNC_ATTR_NOALIAS: return "noalias";
> case LP_FUNC_ATTR_NOUNWIND: return "nounwind";
> case LP_FUNC_ATTR_READNONE: return "readnone";
> case LP_FUNC_ATTR_READONLY: return "readonly";
> +   case LP_FUNC_ATTR_WRITEONLY: return "writeonly";
> +   case LP_FUNC_ATTR_INACCESSIBLE_MEM_ONLY: return "inaccessiblememonly";
> default:
>_debug_printf("Unhandled function attribute: %x\n", attr);
>return 0;
> }
>  }
>  
>  #endif
>  
>  void
>  lp_add_function_attr(LLVMContextRef ctx, LLVMValueRef function,
> diff --git a/src/gallium/auxiliary/gallivm/lp_bld_intr.h 
> b/src/gallium/auxiliary/gallivm/lp_bld_intr.h
> index d279911..4d14725 100644
> --- a/src/gallium/auxiliary/gallivm/lp_bld_intr.h
> +++ b/src/gallium/auxiliary/gallivm/lp_bld_intr.h
> @@ -47,20 +47,22 @@
>  #define LP_MAX_FUNC_ARGS 32
>  
>  enum lp_func_attr {
> LP_FUNC_ATTR_ALWAYSINLINE = (1 << 0),
> LP_FUNC_ATTR_BYVAL= (1 << 1),
> LP_FUNC_ATTR_INREG= (1 << 2),
> LP_FUNC_ATTR_NOALIAS  = (1 << 3),
> LP_FUNC_ATTR_NOUNWIND = (1 << 4),
> LP_FUNC_ATTR_READNONE = (1 << 5),
> LP_FUNC_ATTR_READONLY = (1 << 6),
> +   LP_FUNC_ATTR_WRITEONLY= HAVE_LLVM >= 0x0400 ? (1 << 7) : 0,
> +   LP_FUNC_ATTR_INACCESSIBLE_MEM_ONLY = HAVE_LLVM >= 0x0400 ? (1 << 8) : 0,
>  
> /* Legacy intrinsic that needs attributes on function declarations
>  * and they must match the internal LLVM definition exactly, otherwise
>  * intrinsic selection fails.
>  */
> LP_FUNC_ATTR_LEGACY   = (1u << 31),
>  };
>  
>  void
>  lp_format_intrinsic(char *name,


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[Mesa-dev] [PATCH 21/24] radeonsi: detect and mark loads/stores from read-only/write-only memory

[Marek Olšák]

From: Marek Olšák 

---
 src/gallium/drivers/radeonsi/si_shader.c | 114 ---
 1 file changed, 104 insertions(+), 10 deletions(-)

diff --git a/src/gallium/drivers/radeonsi/si_shader.c 
b/src/gallium/drivers/radeonsi/si_shader.c
index 6ccb407..467d0bd 100644
--- a/src/gallium/drivers/radeonsi/si_shader.c
+++ b/src/gallium/drivers/radeonsi/si_shader.c
@@ -3436,22 +3436,37 @@ static void load_fetch_args(
emit_data->args[0] = coords;
emit_data->args[1] = rsrc;
emit_data->args[2] = lp_build_const_int32(gallivm, 15); 
/* dmask */
emit_data->arg_count = 3;
 
image_append_args(ctx, emit_data, target, false, false);
}
}
 }
 
+static unsigned get_load_intr_attribs(bool readonly_memory)
+{
+   /* READNONE means writes can't affect it, while READONLY means that
+* writes can affect it. */
+   return readonly_memory ? LP_FUNC_ATTR_READNONE :
+LP_FUNC_ATTR_READONLY;
+}
+
+static unsigned get_store_intr_attribs(bool writeonly_memory)
+{
+   return writeonly_memory ? LP_FUNC_ATTR_INACCESSIBLE_MEM_ONLY :
+ LP_FUNC_ATTR_WRITEONLY;
+}
+
 static void load_emit_buffer(struct si_shader_context *ctx,
-struct lp_build_emit_data *emit_data)
+struct lp_build_emit_data *emit_data,
+bool readonly_memory)
 {
const struct tgsi_full_instruction *inst = emit_data->inst;
struct gallivm_state *gallivm = >gallivm;
LLVMBuilderRef builder = gallivm->builder;
uint writemask = inst->Dst[0].Register.WriteMask;
uint count = util_last_bit(writemask);
const char *intrinsic_name;
LLVMTypeRef dst_type;
 
switch (count) {
@@ -3465,21 +3480,21 @@ static void load_emit_buffer(struct si_shader_context 
*ctx,
break;
default: // 3 & 4
intrinsic_name = "llvm.amdgcn.buffer.load.v4f32";
dst_type = ctx->v4f32;
count = 4;
}
 
emit_data->output[emit_data->chan] = lp_build_intrinsic(
builder, intrinsic_name, dst_type,
emit_data->args, emit_data->arg_count,
-   LP_FUNC_ATTR_READONLY);
+   get_load_intr_attribs(readonly_memory));
 }
 
 static LLVMValueRef get_memory_ptr(struct si_shader_context *ctx,
const struct tgsi_full_instruction *inst,
LLVMTypeRef type, int arg)
 {
struct gallivm_state *gallivm = >gallivm;
LLVMBuilderRef builder = gallivm->builder;
LLVMValueRef offset, ptr;
int addr_space;
@@ -3541,62 +3556,132 @@ static void get_image_intr_name(const char *base_name,
 
ac_build_type_name_for_intr(data_type, data_type_name,
sizeof(data_type_name));
ac_build_type_name_for_intr(rsrc_type, rsrc_type_name,
sizeof(rsrc_type_name));
snprintf(out_name, out_len, "%s.%s.%s.%s", base_name,
 data_type_name, coords_type_name, rsrc_type_name);
}
 }
 
+/**
+ * Return true if the memory accessed by a LOAD or STORE instruction is
+ * read-only or write-only, respectively.
+ *
+ * \param shader_buffers_reverse_access_mask
+ * For LOAD, set this to (store | atomic) slot usage in the shader.
+ * For STORE, set this to (load | atomic) slot usage in the shader.
+ * \param images_reverse_access_mask  Same as above, but for images.
+ */
+static bool is_oneway_access_only(const struct tgsi_full_instruction *inst,
+ const struct tgsi_shader_info *info,
+ unsigned shader_buffers_reverse_access_mask,
+ unsigned images_reverse_access_mask)
+{
+   /* RESTRICT means NOALIAS.
+* If there are no writes, we can assume the accessed memory is 
read-only.
+* If there are no reads, we can assume the accessed memory is 
write-only.
+*/
+   if (inst->Memory.Qualifier & TGSI_MEMORY_RESTRICT) {
+   unsigned reverse_access_mask;
+
+   if (inst->Src[0].Register.File == TGSI_FILE_BUFFER) {
+   reverse_access_mask = 
shader_buffers_reverse_access_mask;
+   } else if (inst->Memory.Texture == TGSI_TEXTURE_BUFFER) {
+   reverse_access_mask = info->images_buffers &
+ images_reverse_access_mask;
+   } else {
+   reverse_access_mask = ~info->images_buffers &
+ images_reverse_access_mask;
+   }
+
+   if 

[Mesa-dev] [PATCH 17/24] radeonsi: enable TC L2 for tessellation offchip stores

[Marek Olšák]

From: Marek Olšák 

Vulkan does the same thing.
---
 src/gallium/drivers/radeonsi/si_shader.c | 16 
 1 file changed, 8 insertions(+), 8 deletions(-)

diff --git a/src/gallium/drivers/radeonsi/si_shader.c 
b/src/gallium/drivers/radeonsi/si_shader.c
index daaf9f1..71b5b7a 100644
--- a/src/gallium/drivers/radeonsi/si_shader.c
+++ b/src/gallium/drivers/radeonsi/si_shader.c
@@ -1042,29 +1042,29 @@ static void store_output_tcs(struct 
lp_build_tgsi_context *bld_base,
/* Skip LDS stores if there is no LDS read of this output. */
if (!skip_lds_store)
lds_store(bld_base, chan_index, dw_addr, value);
 
value = LLVMBuildBitCast(gallivm->builder, value, ctx->i32, "");
values[chan_index] = value;
 
if (inst->Dst[0].Register.WriteMask != 0xF && !is_tess_factor) {
ac_build_buffer_store_dword(>ac, buffer, value, 1,
buf_addr, base,
-   4 * chan_index, 1, 1, 1);
+   4 * chan_index, 1, 1, 0);
}
}
 
if (inst->Dst[0].Register.WriteMask == 0xF && !is_tess_factor) {
LLVMValueRef value = 
lp_build_gather_values(bld_base->base.gallivm,
values, 4);
ac_build_buffer_store_dword(>ac, buffer, value, 4, 
buf_addr,
-   base, 0, 1, 1, 1);
+   base, 0, 1, 1, 0);
}
 }
 
 static LLVMValueRef fetch_input_gs(
struct lp_build_tgsi_context *bld_base,
const struct tgsi_full_src_register *reg,
enum tgsi_opcode_type type,
unsigned swizzle)
 {
struct lp_build_context *base = _base->base;
@@ -2405,21 +2405,21 @@ static void si_copy_tcs_inputs(struct 
lp_build_tgsi_context *bld_base)
 
LLVMValueRef buffer_addr = get_tcs_tes_buffer_address(ctx,
  get_rel_patch_id(ctx),
  invocation_id,
  lp_build_const_int32(gallivm, i));
 
LLVMValueRef value = lds_load(bld_base, TGSI_TYPE_SIGNED, ~0,
  lds_ptr);
 
ac_build_buffer_store_dword(>ac, buffer, value, 4, 
buffer_addr,
-   buffer_offset, 0, 1, 1, 1);
+   buffer_offset, 0, 1, 1, 0);
}
 }
 
 static void si_write_tess_factors(struct lp_build_tgsi_context *bld_base,
  LLVMValueRef rel_patch_id,
  LLVMValueRef invocation_id,
  LLVMValueRef 
tcs_out_current_patch_data_offset)
 {
struct si_shader_context *ctx = si_shader_context(bld_base);
struct gallivm_state *gallivm = bld_base->base.gallivm;
@@ -2520,32 +2520,32 @@ static void si_write_tess_factors(struct 
lp_build_tgsi_context *bld_base,
  lp_build_const_int32(gallivm, 4 * stride), 
"");
 
lp_build_if(_if_ctx, gallivm,
LLVMBuildICmp(gallivm->builder, LLVMIntEQ,
  rel_patch_id, bld_base->uint_bld.zero, ""));
 
/* Store the dynamic HS control word. */
ac_build_buffer_store_dword(>ac, buffer,
lp_build_const_int32(gallivm, 0x8000),
1, lp_build_const_int32(gallivm, 0), 
tf_base,
-   0, 1, 1, 1);
+   0, 1, 1, 0);
 
lp_build_endif(_if_ctx);
 
/* Store the tessellation factors. */
ac_build_buffer_store_dword(>ac, buffer, vec0,
MIN2(stride, 4), byteoffset, tf_base,
-   4, 1, 1, 1);
+   4, 1, 1, 0);
if (vec1)
ac_build_buffer_store_dword(>ac, buffer, vec1,
stride - 4, byteoffset, tf_base,
-   20, 1, 1, 1);
+   20, 1, 1, 0);
 
/* Store the tess factors into the offchip buffer if TES reads them. */
if (shader->key.part.tcs.epilog.tes_reads_tess_factors) {
LLVMValueRef buf, base, inner_vec, outer_vec, tf_outer_offset;
LLVMValueRef tf_inner_offset;
unsigned param_outer, param_inner;
 
buf = ac_build_indexed_load_const(>ac, rw_buffers,
LLVMConstInt(ctx->i32, SI_HS_RING_TESS_OFFCHIP, 
0));
base = LLVMGetParam(ctx->main_fn, ctx->param_oc_lds);
@@ -2553,32 +2553,32 @@ static 

[Mesa-dev] [PATCH 23/24] ac: replace SI.vs.load.input with amdgcn.buffer.load.format

[Marek Olšák]

From: Marek Olšák 

---
 src/amd/common/ac_llvm_build.c | 20 
 1 file changed, 20 insertions(+)

diff --git a/src/amd/common/ac_llvm_build.c b/src/amd/common/ac_llvm_build.c
index 8fac89c..6364657 100644
--- a/src/amd/common/ac_llvm_build.c
+++ b/src/amd/common/ac_llvm_build.c
@@ -729,20 +729,40 @@ ac_build_buffer_load(struct ac_llvm_context *ctx,
   ARRAY_SIZE(args), 
AC_FUNC_ATTR_READONLY);
}
 }
 
 LLVMValueRef ac_build_buffer_load_format(struct ac_llvm_context *ctx,
 LLVMValueRef rsrc,
 LLVMValueRef vindex,
 LLVMValueRef voffset,
 bool readonly_memory)
 {
+   if (HAVE_LLVM >= 0x0309) {
+   LLVMValueRef args [] = {
+   LLVMBuildBitCast(ctx->builder, rsrc, ctx->v4i32, ""),
+   vindex,
+   voffset,
+   LLVMConstInt(ctx->i1, 0, 0), /* glc */
+   LLVMConstInt(ctx->i1, 0, 0), /* slc */
+   };
+
+   return ac_emit_llvm_intrinsic(ctx,
+ 
"llvm.amdgcn.buffer.load.format.v4f32",
+ ctx->v4f32, args, 
ARRAY_SIZE(args),
+ /* READNONE means writes can't
+  * affect it, while READONLY means
+  * that writes can affect it. */
+ readonly_memory ?
+ AC_FUNC_ATTR_READNONE :
+ AC_FUNC_ATTR_READONLY);
+   }
+
LLVMValueRef args[] = {
rsrc,
voffset,
vindex,
};
return ac_emit_llvm_intrinsic(ctx, "llvm.SI.vs.load.input",
  ctx->v4f32, args, 3,
  AC_FUNC_ATTR_READNONE |
  AC_FUNC_ATTR_LEGACY);
 }
-- 
2.7.4

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[Mesa-dev] [PATCH 24/24] ac: normalize build helper names

[Marek Olšák]

From: Marek Olšák 

s/emit/build/
---
 src/amd/common/ac_llvm_build.c | 299 ++---
 src/amd/common/ac_llvm_build.h |  58 ++--
 src/amd/common/ac_nir_to_llvm.c| 208 +++---
 src/gallium/drivers/radeonsi/si_shader.c   |  52 ++--
 src/gallium/drivers/radeonsi/si_shader_tgsi_alu.c  |  16 +-
 .../drivers/radeonsi/si_shader_tgsi_setup.c|   2 +-
 6 files changed, 317 insertions(+), 318 deletions(-)

diff --git a/src/amd/common/ac_llvm_build.c b/src/amd/common/ac_llvm_build.c
index 6364657..a9dc51b 100644
--- a/src/amd/common/ac_llvm_build.c
+++ b/src/amd/common/ac_llvm_build.c
@@ -71,23 +71,23 @@ ac_llvm_context_init(struct ac_llvm_context *ctx, 
LLVMContextRef context)
args[0] = LLVMConstReal(ctx->f32, 2.5);
ctx->fpmath_md_2p5_ulp = LLVMMDNodeInContext(ctx->context, args, 1);
 
ctx->uniform_md_kind = LLVMGetMDKindIDInContext(ctx->context,
"amdgpu.uniform", 14);
 
ctx->empty_md = LLVMMDNodeInContext(ctx->context, NULL, 0);
 }
 
 LLVMValueRef
-ac_emit_llvm_intrinsic(struct ac_llvm_context *ctx, const char *name,
-  LLVMTypeRef return_type, LLVMValueRef *params,
-  unsigned param_count, unsigned attrib_mask)
+ac_build_intrinsic(struct ac_llvm_context *ctx, const char *name,
+  LLVMTypeRef return_type, LLVMValueRef *params,
+  unsigned param_count, unsigned attrib_mask)
 {
LLVMValueRef function, call;
bool set_callsite_attrs = HAVE_LLVM >= 0x0400 &&
  !(attrib_mask & AC_FUNC_ATTR_LEGACY);
 
function = LLVMGetNamedFunction(ctx->module, name);
if (!function) {
LLVMTypeRef param_types[32], function_type;
unsigned i;
 
@@ -198,23 +198,23 @@ ac_build_gather_values_extended(struct ac_llvm_context 
*ctx,
 
 LLVMValueRef
 ac_build_gather_values(struct ac_llvm_context *ctx,
   LLVMValueRef *values,
   unsigned value_count)
 {
return ac_build_gather_values_extended(ctx, values, value_count, 1, 
false);
 }
 
 LLVMValueRef
-ac_emit_fdiv(struct ac_llvm_context *ctx,
-LLVMValueRef num,
-LLVMValueRef den)
+ac_build_fdiv(struct ac_llvm_context *ctx,
+ LLVMValueRef num,
+ LLVMValueRef den)
 {
LLVMValueRef ret = LLVMBuildFDiv(ctx->builder, num, den, "");
 
if (!LLVMIsConstant(ret))
LLVMSetMetadata(ret, ctx->fpmath_md_kind, 
ctx->fpmath_md_2p5_ulp);
return ret;
 }
 
 /* Coordinates for cube map selection. sc, tc, and ma are as in Table 8.27
  * of the OpenGL 4.5 (Compatibility Profile) specification, except ma is
@@ -229,41 +229,41 @@ struct cube_selection_coords {
 static void
 build_cube_intrinsic(struct ac_llvm_context *ctx,
 LLVMValueRef in[3],
 struct cube_selection_coords *out)
 {
LLVMBuilderRef builder = ctx->builder;
 
if (HAVE_LLVM >= 0x0309) {
LLVMTypeRef f32 = ctx->f32;
 
-   out->stc[1] = ac_emit_llvm_intrinsic(ctx, "llvm.amdgcn.cubetc",
+   out->stc[1] = ac_build_intrinsic(ctx, "llvm.amdgcn.cubetc",
f32, in, 3, AC_FUNC_ATTR_READNONE);
-   out->stc[0] = ac_emit_llvm_intrinsic(ctx, "llvm.amdgcn.cubesc",
+   out->stc[0] = ac_build_intrinsic(ctx, "llvm.amdgcn.cubesc",
f32, in, 3, AC_FUNC_ATTR_READNONE);
-   out->ma = ac_emit_llvm_intrinsic(ctx, "llvm.amdgcn.cubema",
+   out->ma = ac_build_intrinsic(ctx, "llvm.amdgcn.cubema",
f32, in, 3, AC_FUNC_ATTR_READNONE);
-   out->id = ac_emit_llvm_intrinsic(ctx, "llvm.amdgcn.cubeid",
+   out->id = ac_build_intrinsic(ctx, "llvm.amdgcn.cubeid",
f32, in, 3, AC_FUNC_ATTR_READNONE);
} else {
LLVMValueRef c[4] = {
in[0],
in[1],
in[2],
LLVMGetUndef(LLVMTypeOf(in[0]))
};
LLVMValueRef vec = ac_build_gather_values(ctx, c, 4);
 
LLVMValueRef tmp =
-   ac_emit_llvm_intrinsic(ctx, "llvm.AMDGPU.cube",
- LLVMTypeOf(vec), , 1,
- AC_FUNC_ATTR_READNONE);
+   ac_build_intrinsic(ctx, "llvm.AMDGPU.cube",
+  LLVMTypeOf(vec), , 1,
+  AC_FUNC_ATTR_READNONE);
 
out->stc[1] = LLVMBuildExtractElement(builder, tmp,
LLVMConstInt(ctx->i32, 0, 0), "");
out->stc[0] = 

[Mesa-dev] [PATCH 22/24] radeonsi: move SI.vs.load.input building into amd/common

[Marek Olšák]

From: Marek Olšák 

---
 src/amd/common/ac_llvm_build.c   | 17 +
 src/amd/common/ac_llvm_build.h   |  6 ++
 src/gallium/drivers/radeonsi/si_shader.c | 25 ++---
 3 files changed, 33 insertions(+), 15 deletions(-)

diff --git a/src/amd/common/ac_llvm_build.c b/src/amd/common/ac_llvm_build.c
index 9435b18..8fac89c 100644
--- a/src/amd/common/ac_llvm_build.c
+++ b/src/amd/common/ac_llvm_build.c
@@ -723,20 +723,37 @@ ac_build_buffer_load(struct ac_llvm_context *ctx,
}
 
snprintf(name, sizeof(name), "llvm.SI.buffer.load.dword.%s.%s",
 type_names[func], arg_type);
 
return ac_emit_llvm_intrinsic(ctx, name, types[func], args,
   ARRAY_SIZE(args), 
AC_FUNC_ATTR_READONLY);
}
 }
 
+LLVMValueRef ac_build_buffer_load_format(struct ac_llvm_context *ctx,
+LLVMValueRef rsrc,
+LLVMValueRef vindex,
+LLVMValueRef voffset,
+bool readonly_memory)
+{
+   LLVMValueRef args[] = {
+   rsrc,
+   voffset,
+   vindex,
+   };
+   return ac_emit_llvm_intrinsic(ctx, "llvm.SI.vs.load.input",
+ ctx->v4f32, args, 3,
+ AC_FUNC_ATTR_READNONE |
+ AC_FUNC_ATTR_LEGACY);
+}
+
 /**
  * Set range metadata on an instruction.  This can only be used on load and
  * call instructions.  If you know an instruction can only produce the values
  * 0, 1, 2, you would do set_range_metadata(value, 0, 3);
  * \p lo is the minimum value inclusive.
  * \p hi is the maximum value exclusive.
  */
 static void set_range_metadata(struct ac_llvm_context *ctx,
   LLVMValueRef value, unsigned lo, unsigned hi)
 {
diff --git a/src/amd/common/ac_llvm_build.h b/src/amd/common/ac_llvm_build.h
index aa99e92..ae96d56 100644
--- a/src/amd/common/ac_llvm_build.h
+++ b/src/amd/common/ac_llvm_build.h
@@ -138,20 +138,26 @@ ac_build_buffer_load(struct ac_llvm_context *ctx,
 LLVMValueRef rsrc,
 int num_channels,
 LLVMValueRef vindex,
 LLVMValueRef voffset,
 LLVMValueRef soffset,
 unsigned inst_offset,
 unsigned glc,
 unsigned slc,
 bool readonly_memory);
 
+LLVMValueRef ac_build_buffer_load_format(struct ac_llvm_context *ctx,
+LLVMValueRef rsrc,
+LLVMValueRef vindex,
+LLVMValueRef voffset,
+bool readonly_memory);
+
 LLVMValueRef
 ac_get_thread_id(struct ac_llvm_context *ctx);
 
 #define AC_TID_MASK_TOP_LEFT 0xfffc
 #define AC_TID_MASK_TOP  0xfffd
 #define AC_TID_MASK_LEFT 0xfffe
 
 LLVMValueRef
 ac_emit_ddxy(struct ac_llvm_context *ctx,
 bool has_ds_bpermute,
diff --git a/src/gallium/drivers/radeonsi/si_shader.c 
b/src/gallium/drivers/radeonsi/si_shader.c
index 467d0bd..4705900 100644
--- a/src/gallium/drivers/radeonsi/si_shader.c
+++ b/src/gallium/drivers/radeonsi/si_shader.c
@@ -345,21 +345,20 @@ static void declare_input_vs(
 
unsigned chan;
unsigned fix_fetch;
unsigned num_fetches;
unsigned fetch_stride;
 
LLVMValueRef t_list_ptr;
LLVMValueRef t_offset;
LLVMValueRef t_list;
LLVMValueRef vertex_index;
-   LLVMValueRef args[3];
LLVMValueRef input[3];
 
/* Load the T list */
t_list_ptr = LLVMGetParam(ctx->main_fn, SI_PARAM_VERTEX_BUFFERS);
 
t_offset = lp_build_const_int32(gallivm, input_index);
 
t_list = ac_build_indexed_load_const(>ac, t_list_ptr, t_offset);
 
vertex_index = LLVMGetParam(ctx->main_fn,
@@ -386,30 +385,26 @@ static void declare_input_vs(
case SI_FIX_FETCH_RGB_16:
case SI_FIX_FETCH_RGB_16_INT:
num_fetches = 3;
fetch_stride = 2;
break;
default:
num_fetches = 1;
fetch_stride = 0;
}
 
-   args[0] = t_list;
-   args[2] = vertex_index;
-
for (unsigned i = 0; i < num_fetches; i++) {
-   args[1] = LLVMConstInt(ctx->i32, fetch_stride * i, 0);
+   LLVMValueRef voffset = LLVMConstInt(ctx->i32, fetch_stride * i, 
0);
 
-   input[i] = lp_build_intrinsic(gallivm->builder,
-   "llvm.SI.vs.load.input", ctx->v4f32, args, 3,
-   LP_FUNC_ATTR_READNONE |
-   LP_FUNC_ATTR_LEGACY);
+   input[i] = ac_build_buffer_load_format(>ac, t_list,
+  

[Mesa-dev] [PATCH 07/24] radeonsi: move image intrinsic building to amd/common

[Marek Olšák]

From: Marek Olšák 

---
 src/amd/common/ac_llvm_build.c   |  68 ++
 src/amd/common/ac_llvm_build.h   |  29 ++
 src/gallium/drivers/radeonsi/si_shader.c | 154 +--
 3 files changed, 159 insertions(+), 92 deletions(-)

diff --git a/src/amd/common/ac_llvm_build.c b/src/amd/common/ac_llvm_build.c
index bd1b63d..3a1ef93 100644
--- a/src/amd/common/ac_llvm_build.c
+++ b/src/amd/common/ac_llvm_build.c
@@ -925,10 +925,78 @@ void ac_emit_export(struct ac_llvm_context *ctx, struct 
ac_export_args *a)
args[0] = LLVMConstInt(ctx->i32, a->enabled_channels, 0);
args[1] = LLVMConstInt(ctx->i32, a->valid_mask, 0);
args[2] = LLVMConstInt(ctx->i32, a->done, 0);
args[3] = LLVMConstInt(ctx->i32, a->target, 0);
args[4] = LLVMConstInt(ctx->i32, a->compr, 0);
memcpy(args + 5, a->out, sizeof(a->out[0]) * 4);
 
ac_emit_llvm_intrinsic(ctx, "llvm.SI.export", ctx->voidt, args, 9,
   AC_FUNC_ATTR_LEGACY);
 }
+
+LLVMValueRef ac_emit_image_opcode(struct ac_llvm_context *ctx,
+ struct ac_image_args *a)
+{
+   LLVMTypeRef dst_type;
+   LLVMValueRef args[11];
+   unsigned num_args = 0;
+   const char *name;
+   char intr_name[128], type[64];
+
+   args[num_args++] = a->addr;
+   args[num_args++] = a->resource;
+
+   if (a->opcode == ac_image_load ||
+   a->opcode == ac_image_load_mip ||
+   a->opcode == ac_image_get_resinfo) {
+   dst_type = ctx->v4i32;
+   } else {
+   dst_type = ctx->v4f32;
+   args[num_args++] = a->sampler;
+   }
+
+   args[num_args++] = LLVMConstInt(ctx->i32, a->dmask, 0);
+   args[num_args++] = LLVMConstInt(ctx->i32, a->unorm, 0);
+   args[num_args++] = LLVMConstInt(ctx->i32, 0, 0); /* r128 */
+   args[num_args++] = LLVMConstInt(ctx->i32, a->da, 0);
+   args[num_args++] = LLVMConstInt(ctx->i32, 0, 0); /* glc */
+   args[num_args++] = LLVMConstInt(ctx->i32, 0, 0); /* slc */
+   args[num_args++] = LLVMConstInt(ctx->i32, 0, 0); /* tfe */
+   args[num_args++] = LLVMConstInt(ctx->i32, 0, 0); /* lwe */
+
+   switch (a->opcode) {
+   case ac_image_sample:
+   name = "llvm.SI.image.sample";
+   break;
+   case ac_image_gather4:
+   name = "llvm.SI.gather4";
+   break;
+   case ac_image_load:
+   name = "llvm.SI.image.load";
+   break;
+   case ac_image_load_mip:
+   name = "llvm.SI.image.load.mip";
+   break;
+   case ac_image_get_lod:
+   name = "llvm.SI.getlod";
+   break;
+   case ac_image_get_resinfo:
+   name = "llvm.SI.getresinfo";
+   break;
+   }
+
+   ac_build_type_name_for_intr(LLVMTypeOf(a->addr), type, sizeof(type));
+   snprintf(intr_name, sizeof(intr_name), "%s%s%s%s.%s",
+   name,
+   a->compare ? ".c" : "",
+   a->bias ? ".b" :
+   a->lod ? ".l" :
+   a->deriv ? ".d" :
+   a->level_zero ? ".lz" : "",
+   a->offset ? ".o" : "",
+   type);
+
+   return ac_emit_llvm_intrinsic(ctx, intr_name,
+ dst_type, args, num_args,
+ AC_FUNC_ATTR_READNONE |
+ AC_FUNC_ATTR_LEGACY);
+}
diff --git a/src/amd/common/ac_llvm_build.h b/src/amd/common/ac_llvm_build.h
index 27f2097..f57acc2 100644
--- a/src/amd/common/ac_llvm_build.h
+++ b/src/amd/common/ac_llvm_build.h
@@ -198,15 +198,44 @@ struct ac_export_args {
LLVMValueRef out[4];
 unsigned target;
 unsigned enabled_channels;
 bool compr;
 bool done;
 bool valid_mask;
 };
 
 void ac_emit_export(struct ac_llvm_context *ctx, struct ac_export_args *a);
 
+enum ac_image_opcode {
+   ac_image_sample,
+   ac_image_gather4,
+   ac_image_load,
+   ac_image_load_mip,
+   ac_image_get_lod,
+   ac_image_get_resinfo,
+};
+
+struct ac_image_args {
+   enum ac_image_opcode opcode;
+   bool level_zero;
+   bool bias;
+   bool lod;
+   bool deriv;
+   bool compare;
+   bool offset;
+
+   LLVMValueRef resource;
+   LLVMValueRef sampler;
+   LLVMValueRef addr;
+   unsigned dmask;
+   bool unorm;
+   bool da;
+};
+
+LLVMValueRef ac_emit_image_opcode(struct ac_llvm_context *ctx,
+ struct ac_image_args *a);
+
 #ifdef __cplusplus
 }
 #endif
 
 #endif
diff --git a/src/gallium/drivers/radeonsi/si_shader.c 
b/src/gallium/drivers/radeonsi/si_shader.c
index 8c07b4f..082e071 100644
--- a/src/gallium/drivers/radeonsi/si_shader.c
+++ b/src/gallium/drivers/radeonsi/si_shader.c
@@ -4054,63 +4054,47 @@ static void resq_emit(
z = 

[Mesa-dev] [PATCH 16/24] radeonsi: merge and simplify tbuffer_store functions

[Marek Olšák]

From: Marek Olšák 

---
 src/amd/common/ac_llvm_build.c   | 62 +
 src/amd/common/ac_llvm_build.h   | 34 --
 src/amd/common/ac_nir_to_llvm.c  | 16 +++
 src/gallium/drivers/radeonsi/si_shader.c | 79 
 4 files changed, 77 insertions(+), 114 deletions(-)

diff --git a/src/amd/common/ac_llvm_build.c b/src/amd/common/ac_llvm_build.c
index 34085bb..cc1eaf1 100644
--- a/src/amd/common/ac_llvm_build.c
+++ b/src/amd/common/ac_llvm_build.c
@@ -536,87 +536,69 @@ ac_build_indexed_load_const(struct ac_llvm_context *ctx,
LLVMValueRef result = ac_build_indexed_load(ctx, base_ptr, index, true);
LLVMSetMetadata(result, ctx->invariant_load_md_kind, ctx->empty_md);
return result;
 }
 
 /* TBUFFER_STORE_FORMAT_{X,XY,XYZ,XYZW} <- the suffix is selected by 
num_channels=1..4.
  * The type of vdata must be one of i32 (num_channels=1), v2i32 
(num_channels=2),
  * or v4i32 (num_channels=3,4).
  */
 void
-ac_build_tbuffer_store(struct ac_llvm_context *ctx,
-  LLVMValueRef rsrc,
-  LLVMValueRef vdata,
-  unsigned num_channels,
-  LLVMValueRef vaddr,
-  LLVMValueRef soffset,
-  unsigned inst_offset,
-  unsigned dfmt,
-  unsigned nfmt,
-  unsigned offen,
-  unsigned idxen,
-  unsigned glc,
-  unsigned slc,
-  unsigned tfe)
+ac_build_buffer_store_dword(struct ac_llvm_context *ctx,
+   LLVMValueRef rsrc,
+   LLVMValueRef vdata,
+   unsigned num_channels,
+   LLVMValueRef vaddr,
+   LLVMValueRef soffset,
+   unsigned inst_offset,
+   bool offen,
+   bool glc,
+   bool slc)
 {
+   static unsigned dfmt[] = {
+   V_008F0C_BUF_DATA_FORMAT_32,
+   V_008F0C_BUF_DATA_FORMAT_32_32,
+   V_008F0C_BUF_DATA_FORMAT_32_32_32,
+   V_008F0C_BUF_DATA_FORMAT_32_32_32_32
+   };
+   assert(num_channels >= 1 && num_channels <= 4);
+
LLVMValueRef args[] = {
rsrc,
vdata,
LLVMConstInt(ctx->i32, num_channels, 0),
vaddr,
soffset,
LLVMConstInt(ctx->i32, inst_offset, 0),
-   LLVMConstInt(ctx->i32, dfmt, 0),
-   LLVMConstInt(ctx->i32, nfmt, 0),
+   LLVMConstInt(ctx->i32, dfmt[num_channels - 1], 0),
+   LLVMConstInt(ctx->i32, V_008F0C_BUF_NUM_FORMAT_UINT, 0),
LLVMConstInt(ctx->i32, offen, 0),
-   LLVMConstInt(ctx->i32, idxen, 0),
+   LLVMConstInt(ctx->i32, 0, 0), /* idxen */
LLVMConstInt(ctx->i32, glc, 0),
LLVMConstInt(ctx->i32, slc, 0),
-   LLVMConstInt(ctx->i32, tfe, 0)
+   LLVMConstInt(ctx->i32, 0, 0), /* tfe*/
};
 
/* The instruction offset field has 12 bits */
assert(offen || inst_offset < (1 << 12));
 
/* The intrinsic is overloaded, we need to add a type suffix for 
overloading to work. */
unsigned func = CLAMP(num_channels, 1, 3) - 1;
const char *types[] = {"i32", "v2i32", "v4i32"};
char name[256];
snprintf(name, sizeof(name), "llvm.SI.tbuffer.store.%s", types[func]);
 
ac_emit_llvm_intrinsic(ctx, name, ctx->voidt,
   args, ARRAY_SIZE(args),
   AC_FUNC_ATTR_LEGACY);
 }
 
-void
-ac_build_tbuffer_store_dwords(struct ac_llvm_context *ctx,
- LLVMValueRef rsrc,
- LLVMValueRef vdata,
- unsigned num_channels,
- LLVMValueRef vaddr,
- LLVMValueRef soffset,
- unsigned inst_offset)
-{
-   static unsigned dfmt[] = {
-   V_008F0C_BUF_DATA_FORMAT_32,
-   V_008F0C_BUF_DATA_FORMAT_32_32,
-   V_008F0C_BUF_DATA_FORMAT_32_32_32,
-   V_008F0C_BUF_DATA_FORMAT_32_32_32_32
-   };
-   assert(num_channels >= 1 && num_channels <= 4);
-
-   ac_build_tbuffer_store(ctx, rsrc, vdata, num_channels, vaddr, soffset,
-  inst_offset, dfmt[num_channels - 1],
-  V_008F0C_BUF_NUM_FORMAT_UINT, 1, 0, 1, 1, 0);
-}
-
 LLVMValueRef
 ac_build_buffer_load(struct ac_llvm_context *ctx,
 LLVMValueRef rsrc,
 int num_channels,
 LLVMValueRef vindex,
 LLVMValueRef voffset,
 LLVMValueRef soffset,
 

[Mesa-dev] [PATCH 20/24] ac: replace llvm.SI.tbuffer.store with llvm.amdgcn.buffer.store if ADD_TID=0

[Marek Olšák]

From: Marek Olšák 

TODO: ADD_TID doesn't work. Needs more investigation.
---
 src/amd/common/ac_llvm_build.c| 58 ++-
 src/amd/common/ac_llvm_build.h|  4 +-
 src/amd/common/ac_nir_to_llvm.c   |  4 +-
 src/gallium/drivers/radeonsi/si_descriptors.c | 12 +-
 src/gallium/drivers/radeonsi/si_shader.c  | 35 ++--
 5 files changed, 95 insertions(+), 18 deletions(-)

diff --git a/src/amd/common/ac_llvm_build.c b/src/amd/common/ac_llvm_build.c
index 08fedc7..9435b18 100644
--- a/src/amd/common/ac_llvm_build.c
+++ b/src/amd/common/ac_llvm_build.c
@@ -544,22 +544,78 @@ ac_build_indexed_load_const(struct ac_llvm_context *ctx,
  */
 void
 ac_build_buffer_store_dword(struct ac_llvm_context *ctx,
LLVMValueRef rsrc,
LLVMValueRef vdata,
unsigned num_channels,
LLVMValueRef voffset,
LLVMValueRef soffset,
unsigned inst_offset,
bool glc,
-   bool slc)
+   bool slc,
+   bool writeonly_memory,
+   bool has_add_tid)
 {
+   /* TODO: Fix stores with ADD_TID and remove the "has_add_tid" flag. */
+   if (HAVE_LLVM >= 0x0309 && !has_add_tid) {
+   /* Split 3 channel stores, becase LLVM doesn't support 3-channel
+* intrinsics. */
+   if (num_channels == 3) {
+   LLVMValueRef v[3], v01;
+
+   for (int i = 0; i < 3; i++) {
+   v[i] = LLVMBuildExtractElement(ctx->builder, 
vdata,
+   LLVMConstInt(ctx->i32, i, 0), 
"");
+   }
+   v01 = ac_build_gather_values(ctx, v, 2);
+
+   ac_build_buffer_store_dword(ctx, rsrc, v01, 2, voffset,
+   soffset, inst_offset, glc, 
slc,
+   writeonly_memory, 
has_add_tid);
+   ac_build_buffer_store_dword(ctx, rsrc, v[2], 1, voffset,
+   soffset, inst_offset + 8,
+   glc, slc,
+   writeonly_memory, 
has_add_tid);
+   return;
+   }
+
+   unsigned func = CLAMP(num_channels, 1, 3) - 1;
+   static const char *types[] = {"f32", "v2f32", "v4f32"};
+   char name[256];
+   LLVMValueRef offset = soffset;
+
+   if (inst_offset)
+   offset = LLVMBuildAdd(ctx->builder, offset,
+ LLVMConstInt(ctx->i32, 
inst_offset, 0), "");
+   if (voffset)
+   offset = LLVMBuildAdd(ctx->builder, offset, voffset, 
"");
+
+   LLVMValueRef args[] = {
+   bitcast_to_float(ctx, vdata),
+   LLVMBuildBitCast(ctx->builder, rsrc, ctx->v4i32, ""),
+   LLVMConstInt(ctx->i32, 0, 0),
+   offset,
+   LLVMConstInt(ctx->i1, glc, 0),
+   LLVMConstInt(ctx->i1, slc, 0),
+   };
+
+   snprintf(name, sizeof(name), "llvm.amdgcn.buffer.store.%s",
+types[func]);
+
+   ac_emit_llvm_intrinsic(ctx, name, ctx->voidt,
+  args, ARRAY_SIZE(args),
+  writeonly_memory ?
+   AC_FUNC_ATTR_INACCESSIBLE_MEM_ONLY :
+   AC_FUNC_ATTR_WRITEONLY);
+   return;
+   }
+
static unsigned dfmt[] = {
V_008F0C_BUF_DATA_FORMAT_32,
V_008F0C_BUF_DATA_FORMAT_32_32,
V_008F0C_BUF_DATA_FORMAT_32_32_32,
V_008F0C_BUF_DATA_FORMAT_32_32_32_32
};
assert(num_channels >= 1 && num_channels <= 4);
 
LLVMValueRef args[] = {
rsrc,
diff --git a/src/amd/common/ac_llvm_build.h b/src/amd/common/ac_llvm_build.h
index 78df441..aa99e92 100644
--- a/src/amd/common/ac_llvm_build.h
+++ b/src/amd/common/ac_llvm_build.h
@@ -123,21 +123,23 @@ ac_build_indexed_load_const(struct ac_llvm_context *ctx,
 
 void
 ac_build_buffer_store_dword(struct ac_llvm_context *ctx,
LLVMValueRef rsrc,
LLVMValueRef vdata,
unsigned num_channels,
LLVMValueRef voffset,
LLVMValueRef soffset,
unsigned inst_offset,
bool glc,
-

[Mesa-dev] [PATCH 19/24] radeonsi: use the writeonly LLVM attribute

[Marek Olšák]

From: Marek Olšák 

---
 src/gallium/drivers/radeonsi/si_shader.c | 9 ++---
 1 file changed, 6 insertions(+), 3 deletions(-)

diff --git a/src/gallium/drivers/radeonsi/si_shader.c 
b/src/gallium/drivers/radeonsi/si_shader.c
index dd5bdf6..16579af 100644
--- a/src/gallium/drivers/radeonsi/si_shader.c
+++ b/src/gallium/drivers/radeonsi/si_shader.c
@@ -3720,21 +3720,22 @@ static void store_emit_buffer(
offset = LLVMBuildAdd(
builder, offset,
lp_build_const_int32(gallivm, start * 4), "");
}
 
emit_data->args[0] = data;
emit_data->args[3] = offset;
 
lp_build_intrinsic(
builder, intrinsic_name, emit_data->dst_type,
-   emit_data->args, emit_data->arg_count, 0);
+   emit_data->args, emit_data->arg_count,
+   LP_FUNC_ATTR_WRITEONLY);
}
 }
 
 static void store_emit_memory(
struct si_shader_context *ctx,
struct lp_build_emit_data *emit_data)
 {
const struct tgsi_full_instruction *inst = emit_data->inst;
struct gallivm_state *gallivm = >gallivm;
struct lp_build_context *base = >bld_base.base;
@@ -3778,32 +3779,34 @@ static void store_emit(
 
if (inst->Dst[0].Register.File == TGSI_FILE_BUFFER) {
store_emit_buffer(ctx, emit_data);
return;
}
 
if (target == TGSI_TEXTURE_BUFFER) {
emit_data->output[emit_data->chan] = lp_build_intrinsic(
builder, "llvm.amdgcn.buffer.store.format.v4f32",
emit_data->dst_type, emit_data->args,
-   emit_data->arg_count, 0);
+   emit_data->arg_count,
+   LP_FUNC_ATTR_WRITEONLY);
} else {
get_image_intr_name("llvm.amdgcn.image.store",
LLVMTypeOf(emit_data->args[0]), /* vdata */
LLVMTypeOf(emit_data->args[1]), /* coords */
LLVMTypeOf(emit_data->args[2]), /* rsrc */
intrinsic_name, sizeof(intrinsic_name));
 
emit_data->output[emit_data->chan] =
lp_build_intrinsic(
builder, intrinsic_name, emit_data->dst_type,
-   emit_data->args, emit_data->arg_count, 0);
+   emit_data->args, emit_data->arg_count,
+   LP_FUNC_ATTR_WRITEONLY);
}
 }
 
 static void atomic_fetch_args(
struct lp_build_tgsi_context * bld_base,
struct lp_build_emit_data * emit_data)
 {
struct si_shader_context *ctx = si_shader_context(bld_base);
struct gallivm_state *gallivm = bld_base->base.gallivm;
LLVMBuilderRef builder = gallivm->builder;
-- 
2.7.4

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[Mesa-dev] [PATCH 18/24] ac: remove offen parameter from ac_build_buffer_store_dword

[Marek Olšák]

From: Marek Olšák 

---
 src/amd/common/ac_llvm_build.c   |  9 -
 src/amd/common/ac_llvm_build.h   |  3 +--
 src/amd/common/ac_nir_to_llvm.c  |  6 +++---
 src/gallium/drivers/radeonsi/si_shader.c | 25 -
 4 files changed, 20 insertions(+), 23 deletions(-)

diff --git a/src/amd/common/ac_llvm_build.c b/src/amd/common/ac_llvm_build.c
index cc1eaf1..08fedc7 100644
--- a/src/amd/common/ac_llvm_build.c
+++ b/src/amd/common/ac_llvm_build.c
@@ -540,53 +540,52 @@ ac_build_indexed_load_const(struct ac_llvm_context *ctx,
 
 /* TBUFFER_STORE_FORMAT_{X,XY,XYZ,XYZW} <- the suffix is selected by 
num_channels=1..4.
  * The type of vdata must be one of i32 (num_channels=1), v2i32 
(num_channels=2),
  * or v4i32 (num_channels=3,4).
  */
 void
 ac_build_buffer_store_dword(struct ac_llvm_context *ctx,
LLVMValueRef rsrc,
LLVMValueRef vdata,
unsigned num_channels,
-   LLVMValueRef vaddr,
+   LLVMValueRef voffset,
LLVMValueRef soffset,
unsigned inst_offset,
-   bool offen,
bool glc,
bool slc)
 {
static unsigned dfmt[] = {
V_008F0C_BUF_DATA_FORMAT_32,
V_008F0C_BUF_DATA_FORMAT_32_32,
V_008F0C_BUF_DATA_FORMAT_32_32_32,
V_008F0C_BUF_DATA_FORMAT_32_32_32_32
};
assert(num_channels >= 1 && num_channels <= 4);
 
LLVMValueRef args[] = {
rsrc,
vdata,
LLVMConstInt(ctx->i32, num_channels, 0),
-   vaddr,
+   voffset ? voffset : LLVMGetUndef(ctx->i32),
soffset,
LLVMConstInt(ctx->i32, inst_offset, 0),
LLVMConstInt(ctx->i32, dfmt[num_channels - 1], 0),
LLVMConstInt(ctx->i32, V_008F0C_BUF_NUM_FORMAT_UINT, 0),
-   LLVMConstInt(ctx->i32, offen, 0),
+   LLVMConstInt(ctx->i32, voffset != NULL, 0),
LLVMConstInt(ctx->i32, 0, 0), /* idxen */
LLVMConstInt(ctx->i32, glc, 0),
LLVMConstInt(ctx->i32, slc, 0),
LLVMConstInt(ctx->i32, 0, 0), /* tfe*/
};
 
/* The instruction offset field has 12 bits */
-   assert(offen || inst_offset < (1 << 12));
+   assert(voffset || inst_offset < (1 << 12));
 
/* The intrinsic is overloaded, we need to add a type suffix for 
overloading to work. */
unsigned func = CLAMP(num_channels, 1, 3) - 1;
const char *types[] = {"i32", "v2i32", "v4i32"};
char name[256];
snprintf(name, sizeof(name), "llvm.SI.tbuffer.store.%s", types[func]);
 
ac_emit_llvm_intrinsic(ctx, name, ctx->voidt,
   args, ARRAY_SIZE(args),
   AC_FUNC_ATTR_LEGACY);
diff --git a/src/amd/common/ac_llvm_build.h b/src/amd/common/ac_llvm_build.h
index 65a9a05..78df441 100644
--- a/src/amd/common/ac_llvm_build.h
+++ b/src/amd/common/ac_llvm_build.h
@@ -119,24 +119,23 @@ ac_build_indexed_load(struct ac_llvm_context *ctx,
 
 LLVMValueRef
 ac_build_indexed_load_const(struct ac_llvm_context *ctx,
LLVMValueRef base_ptr, LLVMValueRef index);
 
 void
 ac_build_buffer_store_dword(struct ac_llvm_context *ctx,
LLVMValueRef rsrc,
LLVMValueRef vdata,
unsigned num_channels,
-   LLVMValueRef vaddr,
+   LLVMValueRef voffset,
LLVMValueRef soffset,
unsigned inst_offset,
-   bool offen,
bool glc,
bool slc);
 LLVMValueRef
 ac_build_buffer_load(struct ac_llvm_context *ctx,
 LLVMValueRef rsrc,
 int num_channels,
 LLVMValueRef vindex,
 LLVMValueRef voffset,
 LLVMValueRef soffset,
 unsigned inst_offset,
diff --git a/src/amd/common/ac_nir_to_llvm.c b/src/amd/common/ac_nir_to_llvm.c
index 4143b3c..9a91e1a 100644
--- a/src/amd/common/ac_nir_to_llvm.c
+++ b/src/amd/common/ac_nir_to_llvm.c
@@ -3134,21 +3134,21 @@ visit_emit_vertex(struct nir_to_llvm_context *ctx,
 out_ptr[j], "");
LLVMValueRef voffset = LLVMConstInt(ctx->i32, (slot * 4 
+ j + start) * ctx->gs_max_out_vertices, false);
voffset = LLVMBuildAdd(ctx->builder, voffset, 
gs_next_vertex, "");
voffset = LLVMBuildMul(ctx->builder, voffset, 
LLVMConstInt(ctx->i32, 4, false), "");
 
out_val = 

[Mesa-dev] [PATCH 09/24] ac: replace old image intrinsics with new ones

[Marek Olšák]

From: Marek Olšák 

---
 src/amd/common/ac_llvm_build.c | 80 ++
 1 file changed, 80 insertions(+)

diff --git a/src/amd/common/ac_llvm_build.c b/src/amd/common/ac_llvm_build.c
index 3a1ef93..187c2cb 100644
--- a/src/amd/common/ac_llvm_build.c
+++ b/src/amd/common/ac_llvm_build.c
@@ -107,20 +107,34 @@ ac_emit_llvm_intrinsic(struct ac_llvm_context *ctx, const 
char *name,
if (!set_callsite_attrs)
ac_add_func_attributes(ctx->context, function, 
attrib_mask);
}
 
call = LLVMBuildCall(ctx->builder, function, params, param_count, "");
if (set_callsite_attrs)
ac_add_func_attributes(ctx->context, call, attrib_mask);
return call;
 }
 
+static LLVMValueRef bitcast_to_float(struct ac_llvm_context *ctx,
+LLVMValueRef value)
+{
+   LLVMTypeRef type = LLVMTypeOf(value);
+   LLVMTypeRef new_type;
+
+   if (LLVMGetTypeKind(type) == LLVMVectorTypeKind)
+   new_type = LLVMVectorType(ctx->f32, LLVMGetVectorSize(type));
+   else
+   new_type = ctx->f32;
+
+   return LLVMBuildBitCast(ctx->builder, value, new_type, "");
+}
+
 /**
  * Given the i32 or vNi32 \p type, generate the textual name (e.g. for use with
  * intrinsic names).
  */
 void ac_build_type_name_for_intr(LLVMTypeRef type, char *buf, unsigned bufsize)
 {
LLVMTypeRef elem_type = type;
 
assert(bufsize >= 8);
 
@@ -935,20 +949,86 @@ void ac_emit_export(struct ac_llvm_context *ctx, struct 
ac_export_args *a)
 
 LLVMValueRef ac_emit_image_opcode(struct ac_llvm_context *ctx,
  struct ac_image_args *a)
 {
LLVMTypeRef dst_type;
LLVMValueRef args[11];
unsigned num_args = 0;
const char *name;
char intr_name[128], type[64];
 
+   if (HAVE_LLVM >= 0x0400) {
+   bool sample = a->opcode == ac_image_sample ||
+ a->opcode == ac_image_gather4 ||
+ a->opcode == ac_image_get_lod;
+
+   if (sample)
+   args[num_args++] = bitcast_to_float(ctx, a->addr);
+   else
+   args[num_args++] = a->addr;
+
+   args[num_args++] = a->resource;
+   if (sample)
+   args[num_args++] = a->sampler;
+   args[num_args++] = LLVMConstInt(ctx->i32, a->dmask, 0);
+   if (sample)
+   args[num_args++] = LLVMConstInt(ctx->i1, a->unorm, 0);
+   args[num_args++] = LLVMConstInt(ctx->i1, 0, 0); /* glc */
+   args[num_args++] = LLVMConstInt(ctx->i1, 0, 0); /* slc */
+   args[num_args++] = LLVMConstInt(ctx->i1, 0, 0); /* lwe */
+   args[num_args++] = LLVMConstInt(ctx->i1, a->da, 0);
+
+   switch (a->opcode) {
+   case ac_image_sample:
+   name = "llvm.amdgcn.image.sample";
+   break;
+   case ac_image_gather4:
+   name = "llvm.amdgcn.image.gather4";
+   break;
+   case ac_image_load:
+   name = "llvm.amdgcn.image.load";
+   break;
+   case ac_image_load_mip:
+   name = "llvm.amdgcn.image.load.mip";
+   break;
+   case ac_image_get_lod:
+   name = "llvm.amdgcn.image.getlod";
+   break;
+   case ac_image_get_resinfo:
+   name = "llvm.amdgcn.image.getresinfo";
+   break;
+   }
+
+   ac_build_type_name_for_intr(LLVMTypeOf(args[0]), type,
+   sizeof(type));
+
+   snprintf(intr_name, sizeof(intr_name), 
"%s%s%s%s.v4f32.%s.v8i32",
+   name,
+   a->compare ? ".c" : "",
+   a->bias ? ".b" :
+   a->lod ? ".l" :
+   a->deriv ? ".d" :
+   a->level_zero ? ".lz" : "",
+   a->offset ? ".o" : "",
+   type);
+
+   LLVMValueRef result =
+   ac_emit_llvm_intrinsic(ctx, intr_name,
+  ctx->v4f32, args, num_args,
+  AC_FUNC_ATTR_READNONE);
+   if (!sample) {
+   result = LLVMBuildBitCast(ctx->builder, result,
+ ctx->v4i32, "");
+   }
+   return result;
+   }
+
args[num_args++] = a->addr;
args[num_args++] = a->resource;
 
if (a->opcode == ac_image_load ||
a->opcode == ac_image_load_mip ||
a->opcode == ac_image_get_resinfo) {

[Mesa-dev] [PATCH 06/24] ac: replace SI.export with amdgcn.exp.*

[Marek Olšák]

From: Marek Olšák 

---
 src/amd/common/ac_llvm_build.c   | 31 +++
 src/gallium/drivers/radeonsi/si_shader.c |  8 +---
 2 files changed, 36 insertions(+), 3 deletions(-)

diff --git a/src/amd/common/ac_llvm_build.c b/src/amd/common/ac_llvm_build.c
index fae5510..bd1b63d 100644
--- a/src/amd/common/ac_llvm_build.c
+++ b/src/amd/common/ac_llvm_build.c
@@ -884,20 +884,51 @@ LLVMValueRef ac_emit_clamp(struct ac_llvm_context *ctx, 
LLVMValueRef value)
 
return ac_emit_llvm_intrinsic(ctx, intr, ctx->f32, args, 3,
  AC_FUNC_ATTR_READNONE |
  AC_FUNC_ATTR_LEGACY);
 }
 
 void ac_emit_export(struct ac_llvm_context *ctx, struct ac_export_args *a)
 {
LLVMValueRef args[9];
 
+   if (HAVE_LLVM >= 0x0500) {
+   args[0] = LLVMConstInt(ctx->i32, a->target, 0);
+   args[1] = LLVMConstInt(ctx->i32, a->enabled_channels, 0);
+
+   if (a->compr) {
+   LLVMTypeRef i16 = LLVMInt16TypeInContext(ctx->context);
+   LLVMTypeRef v2i16 = LLVMVectorType(i16, 2);
+
+   args[2] = LLVMBuildBitCast(ctx->builder, a->out[0],
+  v2i16, "");
+   args[3] = LLVMBuildBitCast(ctx->builder, a->out[1],
+  v2i16, "");
+   args[4] = LLVMConstInt(ctx->i1, a->done, 0);
+   args[5] = LLVMConstInt(ctx->i1, a->valid_mask, 0);
+
+   ac_emit_llvm_intrinsic(ctx, 
"llvm.amdgcn.exp.compr.v2i16",
+  ctx->voidt, args, 6, 0);
+   } else {
+   args[2] = a->out[0];
+   args[3] = a->out[1];
+   args[4] = a->out[2];
+   args[5] = a->out[3];
+   args[6] = LLVMConstInt(ctx->i1, a->done, 0);
+   args[7] = LLVMConstInt(ctx->i1, a->valid_mask, 0);
+
+   ac_emit_llvm_intrinsic(ctx, "llvm.amdgcn.exp.f32",
+  ctx->voidt, args, 8, 0);
+   }
+   return;
+   }
+
args[0] = LLVMConstInt(ctx->i32, a->enabled_channels, 0);
args[1] = LLVMConstInt(ctx->i32, a->valid_mask, 0);
args[2] = LLVMConstInt(ctx->i32, a->done, 0);
args[3] = LLVMConstInt(ctx->i32, a->target, 0);
args[4] = LLVMConstInt(ctx->i32, a->compr, 0);
memcpy(args + 5, a->out, sizeof(a->out[0]) * 4);
 
ac_emit_llvm_intrinsic(ctx, "llvm.SI.export", ctx->voidt, args, 9,
   AC_FUNC_ATTR_LEGACY);
 }
diff --git a/src/gallium/drivers/radeonsi/si_shader.c 
b/src/gallium/drivers/radeonsi/si_shader.c
index 61e05d5..8c07b4f 100644
--- a/src/gallium/drivers/radeonsi/si_shader.c
+++ b/src/gallium/drivers/radeonsi/si_shader.c
@@ -6485,21 +6485,21 @@ static void si_init_shader_ctx(struct si_shader_context 
*ctx,
 static bool si_eliminate_const_output(struct si_shader_context *ctx,
  LLVMValueRef inst, unsigned offset)
 {
struct si_shader *shader = ctx->shader;
unsigned num_outputs = shader->selector->info.num_outputs;
unsigned i, default_val; /* SPI_PS_INPUT_CNTL_i.DEFAULT_VAL */
bool is_zero[4] = {}, is_one[4] = {};
 
for (i = 0; i < 4; i++) {
LLVMBool loses_info;
-   LLVMValueRef p = LLVMGetOperand(inst, 5 + i);
+   LLVMValueRef p = LLVMGetOperand(inst, (HAVE_LLVM >= 0x0500 ? 2 
: 5) + i);
 
/* It's a constant expression. Undef outputs are eliminated 
too. */
if (LLVMIsUndef(p)) {
is_zero[i] = true;
is_one[i] = true;
} else if (LLVMIsAConstantFP(p)) {
double a = LLVMConstRealGetDouble(p, _info);
 
if (a == 0)
is_zero[i] = true;
@@ -6569,24 +6569,26 @@ static void si_eliminate_const_vs_outputs(struct 
si_shader_context *ctx)
 
LLVMValueRef callee = lp_get_called_value(cur);
 
if (!lp_is_function(callee))
continue;
 
const char *name = LLVMGetValueName(callee);
unsigned num_args = LLVMCountParams(callee);
 
/* Check if this is an export instruction. */
-   if (num_args != 9 || strcmp(name, "llvm.SI.export"))
+   if ((num_args != 9 && num_args != 8) ||
+   (strcmp(name, "llvm.SI.export") &&
+strcmp(name, "llvm.amdgcn.exp.")))
continue;
 
-   LLVMValueRef arg = LLVMGetOperand(cur, 3);
+   

[Mesa-dev] [PATCH 04/24] ac: unify build_type_name_for_intr functions

[Marek Olšák]

From: Marek Olšák 

---
 src/amd/common/ac_llvm_build.c   | 37 
 src/amd/common/ac_llvm_build.h   |  2 ++
 src/amd/common/ac_nir_to_llvm.c  | 41 ++
 src/gallium/drivers/radeonsi/si_shader.c | 49 
 4 files changed, 47 insertions(+), 82 deletions(-)

diff --git a/src/amd/common/ac_llvm_build.c b/src/amd/common/ac_llvm_build.c
index a0b74a5..114cb0c 100644
--- a/src/amd/common/ac_llvm_build.c
+++ b/src/amd/common/ac_llvm_build.c
@@ -107,20 +107,57 @@ ac_emit_llvm_intrinsic(struct ac_llvm_context *ctx, const 
char *name,
if (!set_callsite_attrs)
ac_add_func_attributes(ctx->context, function, 
attrib_mask);
}
 
call = LLVMBuildCall(ctx->builder, function, params, param_count, "");
if (set_callsite_attrs)
ac_add_func_attributes(ctx->context, call, attrib_mask);
return call;
 }
 
+/**
+ * Given the i32 or vNi32 \p type, generate the textual name (e.g. for use with
+ * intrinsic names).
+ */
+void ac_build_type_name_for_intr(LLVMTypeRef type, char *buf, unsigned bufsize)
+{
+   LLVMTypeRef elem_type = type;
+
+   assert(bufsize >= 8);
+
+   if (LLVMGetTypeKind(type) == LLVMVectorTypeKind) {
+   int ret = snprintf(buf, bufsize, "v%u",
+   LLVMGetVectorSize(type));
+   if (ret < 0) {
+   char *type_name = LLVMPrintTypeToString(type);
+   fprintf(stderr, "Error building type name for: %s\n",
+   type_name);
+   return;
+   }
+   elem_type = LLVMGetElementType(type);
+   buf += ret;
+   bufsize -= ret;
+   }
+   switch (LLVMGetTypeKind(elem_type)) {
+   default: break;
+   case LLVMIntegerTypeKind:
+   snprintf(buf, bufsize, "i%d", LLVMGetIntTypeWidth(elem_type));
+   break;
+   case LLVMFloatTypeKind:
+   snprintf(buf, bufsize, "f32");
+   break;
+   case LLVMDoubleTypeKind:
+   snprintf(buf, bufsize, "f64");
+   break;
+   }
+}
+
 LLVMValueRef
 ac_build_gather_values_extended(struct ac_llvm_context *ctx,
LLVMValueRef *values,
unsigned value_count,
unsigned value_stride,
bool load)
 {
LLVMBuilderRef builder = ctx->builder;
LLVMValueRef vec = NULL;
unsigned i;
diff --git a/src/amd/common/ac_llvm_build.h b/src/amd/common/ac_llvm_build.h
index 57bfdbd..46da79e 100644
--- a/src/amd/common/ac_llvm_build.h
+++ b/src/amd/common/ac_llvm_build.h
@@ -55,20 +55,22 @@ struct ac_llvm_context {
 };
 
 void
 ac_llvm_context_init(struct ac_llvm_context *ctx, LLVMContextRef context);
 
 LLVMValueRef
 ac_emit_llvm_intrinsic(struct ac_llvm_context *ctx, const char *name,
   LLVMTypeRef return_type, LLVMValueRef *params,
   unsigned param_count, unsigned attrib_mask);
 
+void ac_build_type_name_for_intr(LLVMTypeRef type, char *buf, unsigned 
bufsize);
+
 LLVMValueRef
 ac_build_gather_values_extended(struct ac_llvm_context *ctx,
LLVMValueRef *values,
unsigned value_count,
unsigned value_stride,
bool load);
 LLVMValueRef
 ac_build_gather_values(struct ac_llvm_context *ctx,
   LLVMValueRef *values,
   unsigned value_count);
diff --git a/src/amd/common/ac_nir_to_llvm.c b/src/amd/common/ac_nir_to_llvm.c
index b6d9292..30d48aa 100644
--- a/src/amd/common/ac_nir_to_llvm.c
+++ b/src/amd/common/ac_nir_to_llvm.c
@@ -2371,75 +2371,40 @@ static int image_type_to_components_count(enum 
glsl_sampler_dim dim, bool array)
return 2;
case GLSL_SAMPLER_DIM_SUBPASS_MS:
return 3;
default:
break;
}
return 0;
 }
 
 
-static void build_type_name_for_intr(
-LLVMTypeRef type,
-char *buf, unsigned bufsize)
-{
-LLVMTypeRef elem_type = type;
-
-assert(bufsize >= 8);
-
-if (LLVMGetTypeKind(type) == LLVMVectorTypeKind) {
-int ret = snprintf(buf, bufsize, "v%u",
-LLVMGetVectorSize(type));
-if (ret < 0) {
-char *type_name = LLVMPrintTypeToString(type);
-fprintf(stderr, "Error building type name for: %s\n",
-type_name);
-return;
-}
-elem_type = LLVMGetElementType(type);
-buf += ret;
-bufsize -= ret;
-}
-switch 

[Mesa-dev] [PATCH 10/24] radeonsi: replace SI.packf16 with amdgcn.cvt.pkrtz

[Marek Olšák]

From: Marek Olšák 

---
 src/amd/common/ac_llvm_build.c   | 18 ++
 src/amd/common/ac_llvm_build.h   |  2 ++
 src/gallium/drivers/radeonsi/si_shader.c |  6 +-
 3 files changed, 21 insertions(+), 5 deletions(-)

diff --git a/src/amd/common/ac_llvm_build.c b/src/amd/common/ac_llvm_build.c
index 187c2cb..42965b6 100644
--- a/src/amd/common/ac_llvm_build.c
+++ b/src/amd/common/ac_llvm_build.c
@@ -1073,10 +1073,28 @@ LLVMValueRef ac_emit_image_opcode(struct 
ac_llvm_context *ctx,
a->deriv ? ".d" :
a->level_zero ? ".lz" : "",
a->offset ? ".o" : "",
type);
 
return ac_emit_llvm_intrinsic(ctx, intr_name,
  dst_type, args, num_args,
  AC_FUNC_ATTR_READNONE |
  AC_FUNC_ATTR_LEGACY);
 }
+
+LLVMValueRef ac_emit_cvt_pkrtz_f16(struct ac_llvm_context *ctx,
+  LLVMValueRef args[2])
+{
+   if (HAVE_LLVM >= 0x0500) {
+   LLVMTypeRef v2f16 =
+   LLVMVectorType(LLVMHalfTypeInContext(ctx->context), 2);
+   LLVMValueRef res =
+   ac_emit_llvm_intrinsic(ctx, "llvm.amdgcn.cvt.pkrtz",
+  v2f16, args, 2,
+  AC_FUNC_ATTR_READNONE);
+   return LLVMBuildBitCast(ctx->builder, res, ctx->i32, "");
+   }
+
+   return ac_emit_llvm_intrinsic(ctx, "llvm.SI.packf16", ctx->i32, args, 2,
+ AC_FUNC_ATTR_READNONE |
+ AC_FUNC_ATTR_LEGACY);
+}
diff --git a/src/amd/common/ac_llvm_build.h b/src/amd/common/ac_llvm_build.h
index f57acc2..e6bb90f 100644
--- a/src/amd/common/ac_llvm_build.h
+++ b/src/amd/common/ac_llvm_build.h
@@ -226,16 +226,18 @@ struct ac_image_args {
LLVMValueRef resource;
LLVMValueRef sampler;
LLVMValueRef addr;
unsigned dmask;
bool unorm;
bool da;
 };
 
 LLVMValueRef ac_emit_image_opcode(struct ac_llvm_context *ctx,
  struct ac_image_args *a);
+LLVMValueRef ac_emit_cvt_pkrtz_f16(struct ac_llvm_context *ctx,
+  LLVMValueRef args[2]);
 
 #ifdef __cplusplus
 }
 #endif
 
 #endif
diff --git a/src/gallium/drivers/radeonsi/si_shader.c 
b/src/gallium/drivers/radeonsi/si_shader.c
index f894bc0..af031c7 100644
--- a/src/gallium/drivers/radeonsi/si_shader.c
+++ b/src/gallium/drivers/radeonsi/si_shader.c
@@ -1815,25 +1815,21 @@ static void si_llvm_init_export_args(struct 
lp_build_tgsi_context *bld_base,
case V_028714_SPI_SHADER_FP16_ABGR:
args->compr = 1; /* COMPR flag */
 
for (chan = 0; chan < 2; chan++) {
LLVMValueRef pack_args[2] = {
values[2 * chan],
values[2 * chan + 1]
};
LLVMValueRef packed;
 
-   packed = lp_build_intrinsic(base->gallivm->builder,
-   "llvm.SI.packf16",
-   ctx->i32, pack_args, 2,
-   LP_FUNC_ATTR_READNONE |
-   LP_FUNC_ATTR_LEGACY);
+   packed = ac_emit_cvt_pkrtz_f16(>ac, pack_args);
args->out[chan] =
LLVMBuildBitCast(base->gallivm->builder,
 packed, ctx->f32, "");
}
break;
 
case V_028714_SPI_SHADER_UNORM16_ABGR:
for (chan = 0; chan < 4; chan++) {
val[chan] = ac_emit_clamp(>ac, values[chan]);
val[chan] = LLVMBuildFMul(builder, val[chan],
-- 
2.7.4

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[Mesa-dev] [PATCH 14/24] radeonsi: replace AMDGPU.bfe.* with amdgcn.*bfe

[Marek Olšák]

From: Marek Olšák 

---
 src/amd/common/ac_llvm_build.c| 26 +++
 src/amd/common/ac_llvm_build.h|  3 +++
 src/gallium/drivers/radeonsi/si_shader_tgsi_alu.c | 11 --
 3 files changed, 33 insertions(+), 7 deletions(-)

diff --git a/src/amd/common/ac_llvm_build.c b/src/amd/common/ac_llvm_build.c
index a569a7c..34085bb 100644
--- a/src/amd/common/ac_llvm_build.c
+++ b/src/amd/common/ac_llvm_build.c
@@ -1114,10 +1114,36 @@ LLVMValueRef ac_emit_cvt_pkrtz_f16(struct 
ac_llvm_context *ctx,
 void ac_emit_kill(struct ac_llvm_context *ctx, LLVMValueRef value)
 {
if (value) {
ac_emit_llvm_intrinsic(ctx, "llvm.AMDGPU.kill", ctx->voidt,
   , 1, AC_FUNC_ATTR_LEGACY);
} else {
ac_emit_llvm_intrinsic(ctx, "llvm.AMDGPU.kilp", ctx->voidt,
   NULL, 0, AC_FUNC_ATTR_LEGACY);
}
 }
+
+LLVMValueRef ac_emit_bfe(struct ac_llvm_context *ctx, LLVMValueRef input,
+LLVMValueRef offset, LLVMValueRef width,
+bool is_signed)
+{
+   LLVMValueRef args[] = {
+   input,
+   offset,
+   width,
+   };
+
+   if (HAVE_LLVM >= 0x0500) {
+   return ac_emit_llvm_intrinsic(ctx,
+ is_signed ? 
"llvm.amdgcn.sbfe.i32" :
+ 
"llvm.amdgcn.ubfe.i32",
+ ctx->i32, args, 3,
+ AC_FUNC_ATTR_READNONE);
+   }
+
+   return ac_emit_llvm_intrinsic(ctx,
+ is_signed ? "llvm.AMDGPU.bfe.i32" :
+ "llvm.AMDGPU.bfe.u32",
+ ctx->i32, args, 3,
+ AC_FUNC_ATTR_READNONE |
+ AC_FUNC_ATTR_LEGACY);
+}
diff --git a/src/amd/common/ac_llvm_build.h b/src/amd/common/ac_llvm_build.h
index af16a2b..e7773d7 100644
--- a/src/amd/common/ac_llvm_build.h
+++ b/src/amd/common/ac_llvm_build.h
@@ -230,16 +230,19 @@ struct ac_image_args {
unsigned dmask;
bool unorm;
bool da;
 };
 
 LLVMValueRef ac_emit_image_opcode(struct ac_llvm_context *ctx,
  struct ac_image_args *a);
 LLVMValueRef ac_emit_cvt_pkrtz_f16(struct ac_llvm_context *ctx,
   LLVMValueRef args[2]);
 void ac_emit_kill(struct ac_llvm_context *ctx, LLVMValueRef value);
+LLVMValueRef ac_emit_bfe(struct ac_llvm_context *ctx, LLVMValueRef input,
+LLVMValueRef offset, LLVMValueRef width,
+bool is_signed);
 
 #ifdef __cplusplus
 }
 #endif
 
 #endif
diff --git a/src/gallium/drivers/radeonsi/si_shader_tgsi_alu.c 
b/src/gallium/drivers/radeonsi/si_shader_tgsi_alu.c
index d80848e..91fd7e4 100644
--- a/src/gallium/drivers/radeonsi/si_shader_tgsi_alu.c
+++ b/src/gallium/drivers/radeonsi/si_shader_tgsi_alu.c
@@ -493,30 +493,29 @@ static void emit_bfi(const struct lp_build_tgsi_action 
*action,
cond = LLVMBuildICmp(builder, LLVMIntUGE, emit_data->args[3],
 lp_build_const_int32(gallivm, 32), "");
emit_data->output[emit_data->chan] =
LLVMBuildSelect(builder, cond, emit_data->args[1], bfi_sm5, "");
 }
 
 static void emit_bfe(const struct lp_build_tgsi_action *action,
 struct lp_build_tgsi_context *bld_base,
 struct lp_build_emit_data *emit_data)
 {
+   struct si_shader_context *ctx = si_shader_context(bld_base);
struct gallivm_state *gallivm = bld_base->base.gallivm;
LLVMBuilderRef builder = gallivm->builder;
LLVMValueRef bfe_sm5;
LLVMValueRef cond;
 
-   bfe_sm5 = lp_build_intrinsic(builder, action->intr_name,
-emit_data->dst_type, emit_data->args,
-emit_data->arg_count,
-LP_FUNC_ATTR_READNONE |
-LP_FUNC_ATTR_LEGACY);
+   bfe_sm5 = ac_emit_bfe(>ac, emit_data->args[0],
+ emit_data->args[1], emit_data->args[2],
+ emit_data->info->opcode == TGSI_OPCODE_IBFE);
 
/* Correct for GLSL semantics. */
cond = LLVMBuildICmp(builder, LLVMIntUGE, emit_data->args[2],
 lp_build_const_int32(gallivm, 32), "");
emit_data->output[emit_data->chan] =
LLVMBuildSelect(builder, cond, emit_data->args[0], bfe_sm5, "");
 }
 
 /* this is ffs in C */
 static void emit_lsb(const struct lp_build_tgsi_action *action,
@@ -763,21 +762,20 @@ void si_shader_context_init_alu(struct 
lp_build_tgsi_context *bld_base)

[Mesa-dev] [PATCH 02/24] gallivm, ac: add writeonly and inaccessiblememonly attributes

[Marek Olšák]

From: Marek Olšák 

---
 src/amd/common/ac_llvm_util.c   | 2 ++
 src/amd/common/ac_llvm_util.h   | 2 ++
 src/gallium/auxiliary/gallivm/lp_bld_intr.c | 2 ++
 src/gallium/auxiliary/gallivm/lp_bld_intr.h | 2 ++
 4 files changed, 8 insertions(+)

diff --git a/src/amd/common/ac_llvm_util.c b/src/amd/common/ac_llvm_util.c
index fb525dd..3cc06d4 100644
--- a/src/amd/common/ac_llvm_util.c
+++ b/src/amd/common/ac_llvm_util.c
@@ -165,20 +165,22 @@ static LLVMAttribute ac_attr_to_llvm_attr(enum 
ac_func_attr attr)
 static const char *attr_to_str(enum ac_func_attr attr)
 {
switch (attr) {
case AC_FUNC_ATTR_ALWAYSINLINE: return "alwaysinline";
case AC_FUNC_ATTR_BYVAL: return "byval";
case AC_FUNC_ATTR_INREG: return "inreg";
case AC_FUNC_ATTR_NOALIAS: return "noalias";
case AC_FUNC_ATTR_NOUNWIND: return "nounwind";
case AC_FUNC_ATTR_READNONE: return "readnone";
case AC_FUNC_ATTR_READONLY: return "readonly";
+   case AC_FUNC_ATTR_WRITEONLY: return "writeonly";
+   case AC_FUNC_ATTR_INACCESSIBLE_MEM_ONLY: return "inaccessiblememonly";
default:
   fprintf(stderr, "Unhandled function attribute: %x\n", attr);
   return 0;
}
 }
 
 #endif
 
 static void
 ac_add_function_attr(LLVMContextRef ctx, LLVMValueRef function,
diff --git a/src/amd/common/ac_llvm_util.h b/src/amd/common/ac_llvm_util.h
index 4fe4ab4..1cdee2e 100644
--- a/src/amd/common/ac_llvm_util.h
+++ b/src/amd/common/ac_llvm_util.h
@@ -34,20 +34,22 @@ extern "C" {
 #endif
 
 enum ac_func_attr {
AC_FUNC_ATTR_ALWAYSINLINE = (1 << 0),
AC_FUNC_ATTR_BYVAL= (1 << 1),
AC_FUNC_ATTR_INREG= (1 << 2),
AC_FUNC_ATTR_NOALIAS  = (1 << 3),
AC_FUNC_ATTR_NOUNWIND = (1 << 4),
AC_FUNC_ATTR_READNONE = (1 << 5),
AC_FUNC_ATTR_READONLY = (1 << 6),
+   AC_FUNC_ATTR_WRITEONLY= HAVE_LLVM >= 0x0400 ? (1 << 7) : 0,
+   AC_FUNC_ATTR_INACCESSIBLE_MEM_ONLY = HAVE_LLVM >= 0x0400 ? (1 << 8) : 0,
 
/* Legacy intrinsic that needs attributes on function declarations
 * and they must match the internal LLVM definition exactly, otherwise
 * intrinsic selection fails.
 */
AC_FUNC_ATTR_LEGACY   = (1u << 31),
 };
 
 LLVMTargetMachineRef ac_create_target_machine(enum radeon_family family, bool 
supports_spill);
 
diff --git a/src/gallium/auxiliary/gallivm/lp_bld_intr.c 
b/src/gallium/auxiliary/gallivm/lp_bld_intr.c
index 1b50e68..0be57c9 100644
--- a/src/gallium/auxiliary/gallivm/lp_bld_intr.c
+++ b/src/gallium/auxiliary/gallivm/lp_bld_intr.c
@@ -143,20 +143,22 @@ static LLVMAttribute lp_attr_to_llvm_attr(enum 
lp_func_attr attr)
 static const char *attr_to_str(enum lp_func_attr attr)
 {
switch (attr) {
case LP_FUNC_ATTR_ALWAYSINLINE: return "alwaysinline";
case LP_FUNC_ATTR_BYVAL: return "byval";
case LP_FUNC_ATTR_INREG: return "inreg";
case LP_FUNC_ATTR_NOALIAS: return "noalias";
case LP_FUNC_ATTR_NOUNWIND: return "nounwind";
case LP_FUNC_ATTR_READNONE: return "readnone";
case LP_FUNC_ATTR_READONLY: return "readonly";
+   case LP_FUNC_ATTR_WRITEONLY: return "writeonly";
+   case LP_FUNC_ATTR_INACCESSIBLE_MEM_ONLY: return "inaccessiblememonly";
default:
   _debug_printf("Unhandled function attribute: %x\n", attr);
   return 0;
}
 }
 
 #endif
 
 void
 lp_add_function_attr(LLVMContextRef ctx, LLVMValueRef function,
diff --git a/src/gallium/auxiliary/gallivm/lp_bld_intr.h 
b/src/gallium/auxiliary/gallivm/lp_bld_intr.h
index d279911..4d14725 100644
--- a/src/gallium/auxiliary/gallivm/lp_bld_intr.h
+++ b/src/gallium/auxiliary/gallivm/lp_bld_intr.h
@@ -47,20 +47,22 @@
 #define LP_MAX_FUNC_ARGS 32
 
 enum lp_func_attr {
LP_FUNC_ATTR_ALWAYSINLINE = (1 << 0),
LP_FUNC_ATTR_BYVAL= (1 << 1),
LP_FUNC_ATTR_INREG= (1 << 2),
LP_FUNC_ATTR_NOALIAS  = (1 << 3),
LP_FUNC_ATTR_NOUNWIND = (1 << 4),
LP_FUNC_ATTR_READNONE = (1 << 5),
LP_FUNC_ATTR_READONLY = (1 << 6),
+   LP_FUNC_ATTR_WRITEONLY= HAVE_LLVM >= 0x0400 ? (1 << 7) : 0,
+   LP_FUNC_ATTR_INACCESSIBLE_MEM_ONLY = HAVE_LLVM >= 0x0400 ? (1 << 8) : 0,
 
/* Legacy intrinsic that needs attributes on function declarations
 * and they must match the internal LLVM definition exactly, otherwise
 * intrinsic selection fails.
 */
LP_FUNC_ATTR_LEGACY   = (1u << 31),
 };
 
 void
 lp_format_intrinsic(char *name,
-- 
2.7.4

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[Mesa-dev] [PATCH 05/24] radeonsi: move llvm.SI.export building to amd/common

[Marek Olšák]

From: Marek Olšák 

---
 src/amd/common/ac_llvm_build.c   |  15 ++
 src/amd/common/ac_llvm_build.h   |  11 ++
 src/gallium/drivers/radeonsi/si_shader.c | 306 +++
 3 files changed, 170 insertions(+), 162 deletions(-)

diff --git a/src/amd/common/ac_llvm_build.c b/src/amd/common/ac_llvm_build.c
index 114cb0c..fae5510 100644
--- a/src/amd/common/ac_llvm_build.c
+++ b/src/amd/common/ac_llvm_build.c
@@ -879,10 +879,25 @@ LLVMValueRef ac_emit_clamp(struct ac_llvm_context *ctx, 
LLVMValueRef value)
LLVMValueRef args[3] = {
value,
LLVMConstReal(ctx->f32, 0),
LLVMConstReal(ctx->f32, 1),
};
 
return ac_emit_llvm_intrinsic(ctx, intr, ctx->f32, args, 3,
  AC_FUNC_ATTR_READNONE |
  AC_FUNC_ATTR_LEGACY);
 }
+
+void ac_emit_export(struct ac_llvm_context *ctx, struct ac_export_args *a)
+{
+   LLVMValueRef args[9];
+
+   args[0] = LLVMConstInt(ctx->i32, a->enabled_channels, 0);
+   args[1] = LLVMConstInt(ctx->i32, a->valid_mask, 0);
+   args[2] = LLVMConstInt(ctx->i32, a->done, 0);
+   args[3] = LLVMConstInt(ctx->i32, a->target, 0);
+   args[4] = LLVMConstInt(ctx->i32, a->compr, 0);
+   memcpy(args + 5, a->out, sizeof(a->out[0]) * 4);
+
+   ac_emit_llvm_intrinsic(ctx, "llvm.SI.export", ctx->voidt, args, 9,
+  AC_FUNC_ATTR_LEGACY);
+}
diff --git a/src/amd/common/ac_llvm_build.h b/src/amd/common/ac_llvm_build.h
index 46da79e..27f2097 100644
--- a/src/amd/common/ac_llvm_build.h
+++ b/src/amd/common/ac_llvm_build.h
@@ -187,15 +187,26 @@ void ac_emit_sendmsg(struct ac_llvm_context *ctx,
 LLVMValueRef ac_emit_imsb(struct ac_llvm_context *ctx,
  LLVMValueRef arg,
  LLVMTypeRef dst_type);
 
 LLVMValueRef ac_emit_umsb(struct ac_llvm_context *ctx,
  LLVMValueRef arg,
  LLVMTypeRef dst_type);
 
 LLVMValueRef ac_emit_clamp(struct ac_llvm_context *ctx, LLVMValueRef value);
 
+struct ac_export_args {
+   LLVMValueRef out[4];
+unsigned target;
+unsigned enabled_channels;
+bool compr;
+bool done;
+bool valid_mask;
+};
+
+void ac_emit_export(struct ac_llvm_context *ctx, struct ac_export_args *a);
+
 #ifdef __cplusplus
 }
 #endif
 
 #endif
diff --git a/src/gallium/drivers/radeonsi/si_shader.c 
b/src/gallium/drivers/radeonsi/si_shader.c
index 21efaa4..61e05d5 100644
--- a/src/gallium/drivers/radeonsi/si_shader.c
+++ b/src/gallium/drivers/radeonsi/si_shader.c
@@ -1742,120 +1742,119 @@ static LLVMValueRef 
si_llvm_pack_two_int32_as_int16(struct gallivm_state *galliv
 lp_build_const_int32(gallivm, 0x), ""),
val[1],
};
return si_llvm_pack_two_int16(gallivm, v);
 }
 
 /* Initialize arguments for the shader export intrinsic */
 static void si_llvm_init_export_args(struct lp_build_tgsi_context *bld_base,
 LLVMValueRef *values,
 unsigned target,
-LLVMValueRef *args)
+struct ac_export_args *args)
 {
struct si_shader_context *ctx = si_shader_context(bld_base);
-   struct lp_build_context *uint = >bld_base.uint_bld;
struct lp_build_context *base = _base->base;
struct gallivm_state *gallivm = base->gallivm;
LLVMBuilderRef builder = base->gallivm->builder;
LLVMValueRef val[4];
unsigned spi_shader_col_format = V_028714_SPI_SHADER_32_ABGR;
unsigned chan;
bool is_int8, is_int10;
 
/* Default is 0xf. Adjusted below depending on the format. */
-   args[0] = lp_build_const_int32(base->gallivm, 0xf); /* writemask */
+   args->enabled_channels = 0xf; /* writemask */
 
/* Specify whether the EXEC mask represents the valid mask */
-   args[1] = uint->zero;
+   args->valid_mask = 0;
 
/* Specify whether this is the last export */
-   args[2] = uint->zero;
+   args->done = 0;
 
/* Specify the target we are exporting */
-   args[3] = lp_build_const_int32(base->gallivm, target);
+   args->target = target;
 
if (ctx->type == PIPE_SHADER_FRAGMENT) {
const struct si_shader_key *key = >shader->key;
unsigned col_formats = 
key->part.ps.epilog.spi_shader_col_format;
int cbuf = target - V_008DFC_SQ_EXP_MRT;
 
assert(cbuf >= 0 && cbuf < 8);
spi_shader_col_format = (col_formats >> (cbuf * 4)) & 0xf;
is_int8 = (key->part.ps.epilog.color_is_int8 >> cbuf) & 0x1;
is_int10 = (key->part.ps.epilog.color_is_int10 >> cbuf) & 0x1;
}
 
-   args[4] = uint->zero; /* COMPR flag */
-   args[5] = base->undef;
-   

[Mesa-dev] [PATCH 12/24] radeonsi: set readnone on reads from read-only memory

[Marek Olšák]

From: Marek Olšák 

---
 src/amd/common/ac_llvm_build.c   | 11 +--
 src/amd/common/ac_llvm_build.h   |  3 ++-
 src/gallium/drivers/radeonsi/si_shader.c | 20 ++--
 3 files changed, 21 insertions(+), 13 deletions(-)

diff --git a/src/amd/common/ac_llvm_build.c b/src/amd/common/ac_llvm_build.c
index 42965b6..f0ab9cb 100644
--- a/src/amd/common/ac_llvm_build.c
+++ b/src/amd/common/ac_llvm_build.c
@@ -612,21 +612,22 @@ ac_build_tbuffer_store_dwords(struct ac_llvm_context *ctx,
 
 LLVMValueRef
 ac_build_buffer_load(struct ac_llvm_context *ctx,
 LLVMValueRef rsrc,
 int num_channels,
 LLVMValueRef vindex,
 LLVMValueRef voffset,
 LLVMValueRef soffset,
 unsigned inst_offset,
 unsigned glc,
-unsigned slc)
+unsigned slc,
+bool readonly_memory)
 {
unsigned func = CLAMP(num_channels, 1, 3) - 1;
 
if (HAVE_LLVM >= 0x309) {
LLVMValueRef args[] = {
LLVMBuildBitCast(ctx->builder, rsrc, ctx->v4i32, ""),
vindex ? vindex : LLVMConstInt(ctx->i32, 0, 0),
LLVMConstInt(ctx->i32, inst_offset, 0),
LLVMConstInt(ctx->i1, glc, 0),
LLVMConstInt(ctx->i1, slc, 0)
@@ -644,21 +645,27 @@ ac_build_buffer_load(struct ac_llvm_context *ctx,
 
if (soffset) {
args[2] = LLVMBuildAdd(ctx->builder, args[2], soffset,
   "");
}
 
snprintf(name, sizeof(name), "llvm.amdgcn.buffer.load.%s",
 type_names[func]);
 
return ac_emit_llvm_intrinsic(ctx, name, types[func], args,
- ARRAY_SIZE(args), 
AC_FUNC_ATTR_READONLY);
+ ARRAY_SIZE(args),
+ /* READNONE means writes can't
+  * affect it, while READONLY means
+  * that writes can affect it. */
+ readonly_memory ?
+ AC_FUNC_ATTR_READNONE :
+ AC_FUNC_ATTR_READONLY);
} else {
LLVMValueRef args[] = {
LLVMBuildBitCast(ctx->builder, rsrc, ctx->v16i8, ""),
voffset ? voffset : vindex,
soffset,
LLVMConstInt(ctx->i32, inst_offset, 0),
LLVMConstInt(ctx->i32, voffset ? 1 : 0, 0), // offen
LLVMConstInt(ctx->i32, vindex ? 1 : 0, 0), //idxen
LLVMConstInt(ctx->i32, glc, 0),
LLVMConstInt(ctx->i32, slc, 0),
diff --git a/src/amd/common/ac_llvm_build.h b/src/amd/common/ac_llvm_build.h
index e6bb90f..e6e4e43 100644
--- a/src/amd/common/ac_llvm_build.h
+++ b/src/amd/common/ac_llvm_build.h
@@ -148,21 +148,22 @@ ac_build_tbuffer_store(struct ac_llvm_context *ctx,
 
 LLVMValueRef
 ac_build_buffer_load(struct ac_llvm_context *ctx,
 LLVMValueRef rsrc,
 int num_channels,
 LLVMValueRef vindex,
 LLVMValueRef voffset,
 LLVMValueRef soffset,
 unsigned inst_offset,
 unsigned glc,
-unsigned slc);
+unsigned slc,
+bool readonly_memory);
 
 LLVMValueRef
 ac_get_thread_id(struct ac_llvm_context *ctx);
 
 #define AC_TID_MASK_TOP_LEFT 0xfffc
 #define AC_TID_MASK_TOP  0xfffd
 #define AC_TID_MASK_LEFT 0xfffe
 
 LLVMValueRef
 ac_emit_ddxy(struct ac_llvm_context *ctx,
diff --git a/src/gallium/drivers/radeonsi/si_shader.c 
b/src/gallium/drivers/radeonsi/si_shader.c
index 887e6a4..999aa40 100644
--- a/src/gallium/drivers/radeonsi/si_shader.c
+++ b/src/gallium/drivers/radeonsi/si_shader.c
@@ -819,49 +819,49 @@ static LLVMValueRef get_tcs_tes_buffer_address_from_reg(
   lp_build_const_int32(gallivm, 
param_index_base),
   "");
 
return get_tcs_tes_buffer_address(ctx, get_rel_patch_id(ctx),
  vertex_index, param_index);
 }
 
 static LLVMValueRef buffer_load(struct lp_build_tgsi_context *bld_base,
 enum tgsi_opcode_type type, unsigned swizzle,
 LLVMValueRef buffer, LLVMValueRef offset,
-LLVMValueRef base)
+LLVMValueRef base, bool readonly_memory)
 {
struct 

[Mesa-dev] [PATCH 08/24] radeonsi: remove last use of llvm.SI.resinfo

[Marek Olšák]

From: Marek Olšák 

and move one function up to reuse the code.
---
 src/gallium/drivers/radeonsi/si_shader.c | 97 
 1 file changed, 49 insertions(+), 48 deletions(-)

diff --git a/src/gallium/drivers/radeonsi/si_shader.c 
b/src/gallium/drivers/radeonsi/si_shader.c
index 082e071..f894bc0 100644
--- a/src/gallium/drivers/radeonsi/si_shader.c
+++ b/src/gallium/drivers/radeonsi/si_shader.c
@@ -3982,121 +3982,122 @@ static void atomic_emit(
 action->intr_name, coords_type);
}
 
tmp = lp_build_intrinsic(
builder, intrinsic_name, bld_base->uint_bld.elem_type,
emit_data->args, emit_data->arg_count, 0);
emit_data->output[emit_data->chan] =
LLVMBuildBitCast(builder, tmp, bld_base->base.elem_type, "");
 }
 
+static void set_tex_fetch_args(struct si_shader_context *ctx,
+  struct lp_build_emit_data *emit_data,
+  unsigned target,
+  LLVMValueRef res_ptr, LLVMValueRef samp_ptr,
+  LLVMValueRef *param, unsigned count,
+  unsigned dmask)
+{
+   struct gallivm_state *gallivm = >gallivm;
+   struct ac_image_args args = {};
+
+   /* Pad to power of two vector */
+   while (count < util_next_power_of_two(count))
+   param[count++] = LLVMGetUndef(ctx->i32);
+
+   if (count > 1)
+   args.addr = lp_build_gather_values(gallivm, param, count);
+   else
+   args.addr = param[0];
+
+   args.resource = res_ptr;
+   args.sampler = samp_ptr;
+   args.dmask = dmask;
+   args.unorm = target == TGSI_TEXTURE_RECT ||
+target == TGSI_TEXTURE_SHADOWRECT;
+   args.da = tgsi_is_array_sampler(target);
+
+   /* Ugly, but we seem to have no other choice right now. */
+   STATIC_ASSERT(sizeof(args) <= sizeof(emit_data->args));
+   memcpy(emit_data->args, , sizeof(args));
+}
+
 static void resq_fetch_args(
struct lp_build_tgsi_context * bld_base,
struct lp_build_emit_data * emit_data)
 {
struct si_shader_context *ctx = si_shader_context(bld_base);
-   struct gallivm_state *gallivm = bld_base->base.gallivm;
const struct tgsi_full_instruction *inst = emit_data->inst;
const struct tgsi_full_src_register *reg = >Src[0];
 
emit_data->dst_type = ctx->v4i32;
 
if (reg->Register.File == TGSI_FILE_BUFFER) {
emit_data->args[0] = shader_buffer_fetch_rsrc(ctx, reg);
emit_data->arg_count = 1;
} else if (inst->Memory.Texture == TGSI_TEXTURE_BUFFER) {
image_fetch_rsrc(bld_base, reg, false, inst->Memory.Texture,
 _data->args[0]);
emit_data->arg_count = 1;
} else {
-   emit_data->args[0] = bld_base->uint_bld.zero; /* mip level */
+   LLVMValueRef res_ptr;
+   unsigned image_target;
+
+   if (inst->Memory.Texture == TGSI_TEXTURE_3D)
+   image_target = TGSI_TEXTURE_2D_ARRAY;
+   else
+   image_target = inst->Memory.Texture;
+
image_fetch_rsrc(bld_base, reg, false, inst->Memory.Texture,
-_data->args[1]);
-   emit_data->args[2] = lp_build_const_int32(gallivm, 15); /* 
dmask */
-   emit_data->args[3] = bld_base->uint_bld.zero; /* unorm */
-   emit_data->args[4] = bld_base->uint_bld.zero; /* r128 */
-   emit_data->args[5] = tgsi_is_array_image(inst->Memory.Texture) ?
-   bld_base->uint_bld.one : bld_base->uint_bld.zero; /* da 
*/
-   emit_data->args[6] = bld_base->uint_bld.zero; /* glc */
-   emit_data->args[7] = bld_base->uint_bld.zero; /* slc */
-   emit_data->args[8] = bld_base->uint_bld.zero; /* tfe */
-   emit_data->args[9] = bld_base->uint_bld.zero; /* lwe */
-   emit_data->arg_count = 10;
+_ptr);
+   set_tex_fetch_args(ctx, emit_data, image_target,
+  res_ptr, NULL, _base->uint_bld.zero, 1,
+  0xf);
}
 }
 
 static void resq_emit(
const struct lp_build_tgsi_action *action,
struct lp_build_tgsi_context *bld_base,
struct lp_build_emit_data *emit_data)
 {
+   struct si_shader_context *ctx = si_shader_context(bld_base);
struct gallivm_state *gallivm = bld_base->base.gallivm;
LLVMBuilderRef builder = gallivm->builder;
const struct tgsi_full_instruction *inst = emit_data->inst;
LLVMValueRef out;
 
if (inst->Src[0].Register.File == TGSI_FILE_BUFFER) {
out = LLVMBuildExtractElement(builder, 

[Mesa-dev] [PATCH 11/24] radeonsi: replace SI.buffer.load.dword with amdgcn.buffer.load

[Marek Olšák]

From: Marek Olšák 

---
 src/gallium/drivers/radeonsi/si_shader.c | 64 ++--
 1 file changed, 19 insertions(+), 45 deletions(-)

diff --git a/src/gallium/drivers/radeonsi/si_shader.c 
b/src/gallium/drivers/radeonsi/si_shader.c
index af031c7..887e6a4 100644
--- a/src/gallium/drivers/radeonsi/si_shader.c
+++ b/src/gallium/drivers/radeonsi/si_shader.c
@@ -1065,22 +1065,21 @@ static LLVMValueRef fetch_input_gs(
struct lp_build_tgsi_context *bld_base,
const struct tgsi_full_src_register *reg,
enum tgsi_opcode_type type,
unsigned swizzle)
 {
struct lp_build_context *base = _base->base;
struct si_shader_context *ctx = si_shader_context(bld_base);
struct si_shader *shader = ctx->shader;
struct lp_build_context *uint = >bld_base.uint_bld;
struct gallivm_state *gallivm = base->gallivm;
-   LLVMValueRef vtx_offset;
-   LLVMValueRef args[9];
+   LLVMValueRef vtx_offset, soffset;
unsigned vtx_offset_param;
struct tgsi_shader_info *info = >selector->info;
unsigned semantic_name = info->input_semantic_name[reg->Register.Index];
unsigned semantic_index = 
info->input_semantic_index[reg->Register.Index];
unsigned param;
LLVMValueRef value;
 
if (swizzle != ~0 && semantic_name == TGSI_SEMANTIC_PRIMID)
return get_primitive_id(bld_base, swizzle);
 
@@ -1104,43 +1103,31 @@ static LLVMValueRef fetch_input_gs(
} else {
assert(vtx_offset_param < 6);
vtx_offset_param += SI_PARAM_VTX2_OFFSET - 2;
}
vtx_offset = lp_build_mul_imm(uint,
  LLVMGetParam(ctx->main_fn,
   vtx_offset_param),
  4);
 
param = si_shader_io_get_unique_index(semantic_name, semantic_index);
-   args[0] = ctx->esgs_ring;
-   args[1] = vtx_offset;
-   args[2] = lp_build_const_int32(gallivm, (param * 4 + swizzle) * 256);
-   args[3] = uint->zero;
-   args[4] = uint->one;  /* OFFEN */
-   args[5] = uint->zero; /* IDXEN */
-   args[6] = uint->one;  /* GLC */
-   args[7] = uint->zero; /* SLC */
-   args[8] = uint->zero; /* TFE */
-
-   value = lp_build_intrinsic(gallivm->builder,
-  "llvm.SI.buffer.load.dword.i32.i32",
-  ctx->i32, args, 9,
-  LP_FUNC_ATTR_READONLY |
-  LP_FUNC_ATTR_LEGACY);
+   soffset = LLVMConstInt(ctx->i32, (param * 4 + swizzle) * 256, 0);
+
+   value = ac_build_buffer_load(>ac, ctx->esgs_ring, 1, uint->zero,
+vtx_offset, soffset, 0, 1, 0);
if (tgsi_type_is_64bit(type)) {
LLVMValueRef value2;
-   args[2] = lp_build_const_int32(gallivm, (param * 4 + swizzle + 
1) * 256);
-   value2 = lp_build_intrinsic(gallivm->builder,
-   "llvm.SI.buffer.load.dword.i32.i32",
-   ctx->i32, args, 9,
-   LP_FUNC_ATTR_READONLY |
-   LP_FUNC_ATTR_LEGACY);
+   soffset = LLVMConstInt(ctx->i32, (param * 4 + swizzle + 1) * 
256, 0);
+
+   value2 = ac_build_buffer_load(>ac, ctx->esgs_ring, 1,
+ uint->zero, vtx_offset, soffset,
+ 0, 1, 0);
return si_llvm_emit_fetch_64bit(bld_base, type,
value, value2);
}
return LLVMBuildBitCast(gallivm->builder,
value,
tgsi2llvmtype(bld_base, type), "");
 }
 
 static int lookup_interp_param_index(unsigned interpolate, unsigned location)
 {
@@ -6138,21 +6125,20 @@ si_generate_gs_copy_shader(struct si_screen *sscreen,
   struct pipe_debug_callback *debug)
 {
struct si_shader_context ctx;
struct si_shader *shader;
struct gallivm_state *gallivm = 
LLVMBuilderRef builder;
struct lp_build_tgsi_context *bld_base = _base;
struct lp_build_context *uint = _base->uint_bld;
struct si_shader_output_values *outputs;
struct tgsi_shader_info *gsinfo = _selector->info;
-   LLVMValueRef args[9];
int i, r;
 
outputs = MALLOC(gsinfo->num_outputs * sizeof(outputs[0]));
 
if (!outputs)
return NULL;
 
shader = CALLOC_STRUCT(si_shader);
if (!shader) {
FREE(outputs);
@@ -6164,31 +6150,23 @@ si_generate_gs_copy_shader(struct si_screen *sscreen,
shader->is_gs_copy_shader = true;
 
si_init_shader_ctx(, sscreen, shader, tm);
ctx.type = 

[Mesa-dev] [PATCH 15/24] radeonsi: set noalias on input shader pointers

[Marek Olšák]

From: Marek Olšák 

---
 src/gallium/drivers/radeonsi/si_shader.c | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/src/gallium/drivers/radeonsi/si_shader.c 
b/src/gallium/drivers/radeonsi/si_shader.c
index caff95b..699fefd 100644
--- a/src/gallium/drivers/radeonsi/si_shader.c
+++ b/src/gallium/drivers/radeonsi/si_shader.c
@@ -5146,20 +5146,22 @@ static void si_create_function(struct si_shader_context 
*ctx,
/* The combination of:
 * - ByVal
 * - dereferenceable
 * - invariant.load
 * allows the optimization passes to move loads and reduces
 * SGPR spilling significantly.
 */
if (LLVMGetTypeKind(LLVMTypeOf(P)) == LLVMPointerTypeKind) {
lp_add_function_attr(ctx->gallivm.context, ctx->main_fn,
  i + 1, LP_FUNC_ATTR_BYVAL);
+   lp_add_function_attr(ctx->gallivm.context, ctx->main_fn,
+i + 1, LP_FUNC_ATTR_NOALIAS);
lp_add_attr_dereferenceable(P, UINT64_MAX);
} else
lp_add_function_attr(ctx->gallivm.context, ctx->main_fn,
  i + 1, LP_FUNC_ATTR_INREG);
}
 
LLVMAddTargetDependentFunctionAttr(ctx->main_fn,
   "no-signed-zeros-fp-math",
   "true");
 
-- 
2.7.4

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[Mesa-dev] [PATCH 00/24] RadeonSI moving away from legacy intrinsics & more

[Marek Olšák]

Hi,

This series depends on the patch adding attributes at call sites:
https://patchwork.freedesktop.org/series/20100/

The only legacy intrinsics still in use are:
- llvm.SI.load.const
- llvm.SI.tbuffer.store (when ADD_TID = 1)
- llvm.AMDGPU.kill
- llvm.AMDGPU.kilp

A lot of the code that builds LLVM intrinsics is moved from radeonsi
to ac_llvm_build.c.

This series also makes use of callsite attributes. It uses readnone for
loads from read-only memory, and inaccessiblememonly for stores to
write-only memory, taking into account the GLSL restrict modifier, and
when read-only memory is implied by the lack of stores in a shader, and
when write-only memory is implied by the lack of loads. It also sets
noalias on descriptor arrays. There is not much difference in shader-db
from these changes.

Lastly, TC L2 is enabled for tessellation offchip stores. It should have
been enabled from the beginning, but it wasn't.

Please review.

Marek
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[Mesa-dev] [PATCH 13/24] radeonsi: move kill intrinsic building into amd/common

[Marek Olšák]

From: Marek Olšák 

just a cleanup
---
 src/amd/common/ac_llvm_build.c| 16 
 src/amd/common/ac_llvm_build.h|  1 +
 src/gallium/drivers/radeonsi/si_shader.c  | 12 
 src/gallium/drivers/radeonsi/si_shader_tgsi_alu.c | 14 --
 4 files changed, 29 insertions(+), 14 deletions(-)

diff --git a/src/amd/common/ac_llvm_build.c b/src/amd/common/ac_llvm_build.c
index f0ab9cb..a569a7c 100644
--- a/src/amd/common/ac_llvm_build.c
+++ b/src/amd/common/ac_llvm_build.c
@@ -1098,10 +1098,26 @@ LLVMValueRef ac_emit_cvt_pkrtz_f16(struct 
ac_llvm_context *ctx,
ac_emit_llvm_intrinsic(ctx, "llvm.amdgcn.cvt.pkrtz",
   v2f16, args, 2,
   AC_FUNC_ATTR_READNONE);
return LLVMBuildBitCast(ctx->builder, res, ctx->i32, "");
}
 
return ac_emit_llvm_intrinsic(ctx, "llvm.SI.packf16", ctx->i32, args, 2,
  AC_FUNC_ATTR_READNONE |
  AC_FUNC_ATTR_LEGACY);
 }
+
+/**
+ * KILL, AKA discard in GLSL.
+ *
+ * \param value  kill if value < 0.0 or value == NULL.
+ */
+void ac_emit_kill(struct ac_llvm_context *ctx, LLVMValueRef value)
+{
+   if (value) {
+   ac_emit_llvm_intrinsic(ctx, "llvm.AMDGPU.kill", ctx->voidt,
+  , 1, AC_FUNC_ATTR_LEGACY);
+   } else {
+   ac_emit_llvm_intrinsic(ctx, "llvm.AMDGPU.kilp", ctx->voidt,
+  NULL, 0, AC_FUNC_ATTR_LEGACY);
+   }
+}
diff --git a/src/amd/common/ac_llvm_build.h b/src/amd/common/ac_llvm_build.h
index e6e4e43..af16a2b 100644
--- a/src/amd/common/ac_llvm_build.h
+++ b/src/amd/common/ac_llvm_build.h
@@ -229,16 +229,17 @@ struct ac_image_args {
LLVMValueRef addr;
unsigned dmask;
bool unorm;
bool da;
 };
 
 LLVMValueRef ac_emit_image_opcode(struct ac_llvm_context *ctx,
  struct ac_image_args *a);
 LLVMValueRef ac_emit_cvt_pkrtz_f16(struct ac_llvm_context *ctx,
   LLVMValueRef args[2]);
+void ac_emit_kill(struct ac_llvm_context *ctx, LLVMValueRef value);
 
 #ifdef __cplusplus
 }
 #endif
 
 #endif
diff --git a/src/gallium/drivers/radeonsi/si_shader.c 
b/src/gallium/drivers/radeonsi/si_shader.c
index 999aa40..caff95b 100644
--- a/src/gallium/drivers/radeonsi/si_shader.c
+++ b/src/gallium/drivers/radeonsi/si_shader.c
@@ -1933,25 +1933,23 @@ static void si_alpha_test(struct lp_build_tgsi_context 
*bld_base,
LLVMValueRef alpha_pass =
lp_build_cmp(_base->base,
 ctx->shader->key.part.ps.epilog.alpha_func,
 alpha, alpha_ref);
LLVMValueRef arg =
lp_build_select(_base->base,
alpha_pass,
lp_build_const_float(gallivm, 1.0f),
lp_build_const_float(gallivm, -1.0f));
 
-   lp_build_intrinsic(gallivm->builder, "llvm.AMDGPU.kill",
-  ctx->voidt, , 1, LP_FUNC_ATTR_LEGACY);
+   ac_emit_kill(>ac, arg);
} else {
-   lp_build_intrinsic(gallivm->builder, "llvm.AMDGPU.kilp",
-  ctx->voidt, NULL, 0, LP_FUNC_ATTR_LEGACY);
+   ac_emit_kill(>ac, NULL);
}
 }
 
 static LLVMValueRef si_scale_alpha_by_sample_mask(struct lp_build_tgsi_context 
*bld_base,
  LLVMValueRef alpha,
  unsigned samplemask_param)
 {
struct si_shader_context *ctx = si_shader_context(bld_base);
struct gallivm_state *gallivm = bld_base->base.gallivm;
LLVMValueRef coverage;
@@ -5026,22 +5024,21 @@ static void si_llvm_emit_vertex(
can_emit = LLVMBuildICmp(gallivm->builder, LLVMIntULT, gs_next_vertex,
 lp_build_const_int32(gallivm,
  
shader->selector->gs_max_out_vertices), "");
 
bool use_kill = !info->writes_memory;
if (use_kill) {
kill = lp_build_select(_base->base, can_emit,
   lp_build_const_float(gallivm, 1.0f),
   lp_build_const_float(gallivm, -1.0f));
 
-   lp_build_intrinsic(gallivm->builder, "llvm.AMDGPU.kill",
-  ctx->voidt, , 1, LP_FUNC_ATTR_LEGACY);
+   ac_emit_kill(>ac, kill);
} else {
lp_build_if(_state, gallivm, can_emit);
}
 
offset = 0;
for (i = 0; i < info->num_outputs; i++) {
LLVMValueRef *out_ptr = ctx->outputs[i];
 
  

[Mesa-dev] [PATCH 01/24] tgsi/scan: record load/store/atomic image usage

[Marek Olšák]

From: Marek Olšák 

---
 src/gallium/auxiliary/tgsi/tgsi_scan.c   | 15 ++-
 src/gallium/auxiliary/tgsi/tgsi_scan.h   |  8 +++-
 src/gallium/drivers/radeonsi/si_shader.c |  4 +++-
 3 files changed, 16 insertions(+), 11 deletions(-)

diff --git a/src/gallium/auxiliary/tgsi/tgsi_scan.c 
b/src/gallium/auxiliary/tgsi/tgsi_scan.c
index 7d5496c..99799fa 100644
--- a/src/gallium/auxiliary/tgsi/tgsi_scan.c
+++ b/src/gallium/auxiliary/tgsi/tgsi_scan.c
@@ -276,31 +276,36 @@ scan_src_operand(struct tgsi_shader_info *info,
 
if (is_memory_file(src->Register.File) &&
!is_mem_query_inst(fullinst->Instruction.Opcode)) {
   *is_mem_inst = true;
 
   if (tgsi_get_opcode_info(fullinst->Instruction.Opcode)->is_store) {
  info->writes_memory = TRUE;
 
  if (src->Register.File == TGSI_FILE_IMAGE) {
 if (src->Register.Indirect)
-   info->images_writemask = info->images_declared;
+   info->images_atomic = info->images_declared;
 else
-   info->images_writemask |= 1 << src->Register.Index;
+   info->images_atomic |= 1 << src->Register.Index;
  } else if (src->Register.File == TGSI_FILE_BUFFER) {
 if (src->Register.Indirect)
info->shader_buffers_atomic = info->shader_buffers_declared;
 else
info->shader_buffers_atomic |= 1 << src->Register.Index;
  }
   } else {
- if (src->Register.File == TGSI_FILE_BUFFER) {
+ if (src->Register.File == TGSI_FILE_IMAGE) {
+if (src->Register.Indirect)
+   info->images_load = info->images_declared;
+else
+   info->images_load |= 1 << src->Register.Index;
+ } else if (src->Register.File == TGSI_FILE_BUFFER) {
 if (src->Register.Indirect)
info->shader_buffers_load = info->shader_buffers_declared;
 else
info->shader_buffers_load |= 1 << src->Register.Index;
  }
   }
}
 }
 
 
@@ -418,23 +423,23 @@ scan_instruction(struct tgsi_shader_info *info,
  info->dim_indirect_files |= 1u << dst->Register.File;
 
   if (is_memory_file(dst->Register.File)) {
  assert(fullinst->Instruction.Opcode == TGSI_OPCODE_STORE);
 
  is_mem_inst = true;
  info->writes_memory = TRUE;
 
  if (dst->Register.File == TGSI_FILE_IMAGE) {
 if (dst->Register.Indirect)
-   info->images_writemask = info->images_declared;
+   info->images_store = info->images_declared;
 else
-   info->images_writemask |= 1 << dst->Register.Index;
+   info->images_store |= 1 << dst->Register.Index;
  } else if (dst->Register.File == TGSI_FILE_BUFFER) {
 if (dst->Register.Indirect)
info->shader_buffers_store = info->shader_buffers_declared;
 else
info->shader_buffers_store |= 1 << dst->Register.Index;
  }
   }
}
 
if (is_mem_inst)
diff --git a/src/gallium/auxiliary/tgsi/tgsi_scan.h 
b/src/gallium/auxiliary/tgsi/tgsi_scan.h
index e3c24e9..3854827 100644
--- a/src/gallium/auxiliary/tgsi/tgsi_scan.h
+++ b/src/gallium/auxiliary/tgsi/tgsi_scan.h
@@ -131,28 +131,26 @@ struct tgsi_shader_info
boolean is_msaa_sampler[PIPE_MAX_SAMPLERS];
boolean uses_doubles; /**< uses any of the double instructions */
boolean uses_derivatives;
unsigned clipdist_writemask;
unsigned culldist_writemask;
unsigned num_written_culldistance;
unsigned num_written_clipdistance;
 
unsigned images_declared; /**< bitmask of declared images */
/**
-* Bitmask indicating which images are written to (STORE / ATOM*).
-* Indirect image accesses are not reflected in this mask.
-*/
-   unsigned images_writemask;
-   /**
 * Bitmask indicating which declared image is a buffer.
 */
unsigned images_buffers;
+   unsigned images_load; /**< bitmask of images using loads */
+   unsigned images_store; /**< bitmask of images using stores */
+   unsigned images_atomic; /**< bitmask of images using atomics */
unsigned shader_buffers_declared; /**< bitmask of declared shader buffers */
unsigned shader_buffers_load; /**< bitmask of shader buffers using loads */
unsigned shader_buffers_store; /**< bitmask of shader buffers using stores 
*/
unsigned shader_buffers_atomic; /**< bitmask of shader buffers using 
atomics */
/**
 * Bitmask indicating which register files are accessed with
 * indirect addressing.  The bits are (1 << TGSI_FILE_x), etc.
 */
unsigned indirect_files;
/**
diff --git a/src/gallium/drivers/radeonsi/si_shader.c 
b/src/gallium/drivers/radeonsi/si_shader.c
index ea3f4fd..0299298 100644
--- a/src/gallium/drivers/radeonsi/si_shader.c
+++ b/src/gallium/drivers/radeonsi/si_shader.c
@@ -3321,24 +3321,26 @@ image_fetch_rsrc(
struct 

[Mesa-dev] [PATCH 03/24] radeonsi: set unorm=1 for TGSI_TEXTURE_SHADOWRECT as well

[Marek Olšák]

From: Marek Olšák 

It was harmless, because we also set unorm in the sampler state.
---
 src/gallium/drivers/radeonsi/si_shader.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/src/gallium/drivers/radeonsi/si_shader.c 
b/src/gallium/drivers/radeonsi/si_shader.c
index 0299298..8fae876 100644
--- a/src/gallium/drivers/radeonsi/si_shader.c
+++ b/src/gallium/drivers/radeonsi/si_shader.c
@@ -4115,21 +4115,22 @@ static void resq_emit(
 
 static void set_tex_fetch_args(struct si_shader_context *ctx,
   struct lp_build_emit_data *emit_data,
   unsigned opcode, unsigned target,
   LLVMValueRef res_ptr, LLVMValueRef samp_ptr,
   LLVMValueRef *param, unsigned count,
   unsigned dmask)
 {
struct gallivm_state *gallivm = >gallivm;
unsigned num_args;
-   unsigned is_rect = target == TGSI_TEXTURE_RECT;
+   unsigned is_rect = target == TGSI_TEXTURE_RECT ||
+  target == TGSI_TEXTURE_SHADOWRECT;
 
/* Pad to power of two vector */
while (count < util_next_power_of_two(count))
param[count++] = LLVMGetUndef(ctx->i32);
 
/* Texture coordinates. */
if (count > 1)
emit_data->args[0] = lp_build_gather_values(gallivm, param, 
count);
else
emit_data->args[0] = param[0];
-- 
2.7.4

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[Mesa-dev] [Bug 99856] OpenCL Hello world returns "unsupported call to function get_local_size"

[bugzilla-daemon]

https://bugs.freedesktop.org/show_bug.cgi?id=99856

--- Comment #14 from Jan Vesely  ---
I think the problem is that the libclc implementation contains uninlined calls
(function calls are not supported an AMD GPUs):

; Function Attrs: alwaysinline nounwind
define linkonce_odr i32 @get_global_id(i32) local_unnamed_addr #12 {
  switch i32 %0, label %get_group_id.exit [
i32 0, label %get_group_id.exit.thread
i32 1, label %get_group_id.exit.thread1
i32 2, label %get_group_id.exit.thread2
  ]

get_group_id.exit.thread: ; preds = %1
  %2 = tail call i32 @llvm.amdgcn.workgroup.id.x() #14
  %3 = tail call i32 bitcast (i64 (i32)* @get_local_size to i32 (i32)*)(i32 0)
#18

attributes #12 = { alwaysinline nounwind ...
attributes #18 = { nobuiltin nounwind }

libclc commit 520743b generates this code when compiled using llvm-3.9.
This does not happen with LLVM-4/5.

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[Mesa-dev] [Bug 99856] OpenCL Hello world returns "unsupported call to function get_local_size"

[bugzilla-daemon]

https://bugs.freedesktop.org/show_bug.cgi?id=99856

--- Comment #13 from Henrique Dante de Almeida  ---
Created attachment 129916
  --> https://bugs.freedesktop.org/attachment.cgi?id=129916=edit
Arch Linux libclc tahiti-amdgcn--.bc

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[Mesa-dev] [Bug 99856] OpenCL Hello world returns "unsupported call to function get_local_size"

[bugzilla-daemon]

https://bugs.freedesktop.org/show_bug.cgi?id=99856

--- Comment #12 from Jan Vesely  ---
(In reply to Henrique Dante de Almeida from comment #11)
> Created attachment 129915 [details]
> OpenCL hello strace

thank you.
libclc is located and loaded correctly.
can you attach /usr/lib/clc/tahiti-amdgcn--.bc ?

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[Mesa-dev] [Bug 99856] OpenCL Hello world returns "unsupported call to function get_local_size"

[bugzilla-daemon]

https://bugs.freedesktop.org/show_bug.cgi?id=99856

--- Comment #11 from Henrique Dante de Almeida  ---
Created attachment 129915
  --> https://bugs.freedesktop.org/attachment.cgi?id=129915=edit
OpenCL hello strace

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[Mesa-dev] [Bug 99856] OpenCL Hello world returns "unsupported call to function get_local_size"

[bugzilla-daemon]

https://bugs.freedesktop.org/show_bug.cgi?id=99856

--- Comment #10 from Jan Vesely  ---
(In reply to Henrique Dante de Almeida from comment #8)
> Should I have verde-r600-* ? I'm not using amdgpu.

no. verde-amdgcn- is correct.

the Linux kernel driver does not matter. the failure is in gpu-kernel build
phase.

can you run strace with the failing program (append as attachment, pls).
mesa is probably looking for libclc in wrong place.

another possibility is that the kernel is built using -cl-opt-disable option,
but that should not be the case unless the program explicitly requests it.

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[Mesa-dev] [PATCH v4 6/8] nir: Add a simple int64 lowering pass

[Jason Ekstrand]

The algorithms used by this pass, especially for division, are heavily
based on the work Ian Romanick did for the similar int64 lowering pass
in the GLSL compiler.

v2: Properly handle vectors

v3: Get rid of log2_denom stuff.  Since we're using bcsel, we do all the
calculations anyway and this is just extra instructions.

v4:
 - Add back in the log2_denom stuff since it's needed for ensuring that
   the shifts don't overflow.
 - Rework the looping part of the pass to be easier to expand.
---
 src/compiler/Makefile.sources  |   1 +
 src/compiler/nir/nir.h |   9 ++
 src/compiler/nir/nir_lower_int64.c | 279 +
 3 files changed, 289 insertions(+)
 create mode 100644 src/compiler/nir/nir_lower_int64.c

diff --git a/src/compiler/Makefile.sources b/src/compiler/Makefile.sources
index 643a018..2455d4e 100644
--- a/src/compiler/Makefile.sources
+++ b/src/compiler/Makefile.sources
@@ -221,6 +221,7 @@ NIR_FILES = \
nir/nir_lower_locals_to_regs.c \
nir/nir_lower_idiv.c \
nir/nir_lower_indirect_derefs.c \
+   nir/nir_lower_int64.c \
nir/nir_lower_io.c \
nir/nir_lower_io_to_temporaries.c \
nir/nir_lower_io_to_scalar.c \
diff --git a/src/compiler/nir/nir.h b/src/compiler/nir/nir.h
index 5243a9e..dd1e407 100644
--- a/src/compiler/nir/nir.h
+++ b/src/compiler/nir/nir.h
@@ -2540,6 +2540,15 @@ void nir_lower_to_source_mods(nir_shader *shader);
 bool nir_lower_gs_intrinsics(nir_shader *shader);
 
 typedef enum {
+   nir_lower_imul64 = (1 << 0),
+   nir_lower_isign64 = (1 << 1),
+   /** Lower all int64 modulus and division opcodes */
+   nir_lower_divmod64 = (1 << 2),
+} nir_lower_int64_options;
+
+bool nir_lower_int64(nir_shader *shader, nir_lower_int64_options options);
+
+typedef enum {
nir_lower_drcp = (1 << 0),
nir_lower_dsqrt = (1 << 1),
nir_lower_drsq = (1 << 2),
diff --git a/src/compiler/nir/nir_lower_int64.c 
b/src/compiler/nir/nir_lower_int64.c
new file mode 100644
index 000..4914091
--- /dev/null
+++ b/src/compiler/nir/nir_lower_int64.c
@@ -0,0 +1,279 @@
+/*
+ * Copyright © 2016 Intel Corporation
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the next
+ * paragraph) shall be included in all copies or substantial portions of the
+ * Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
+ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
+ * IN THE SOFTWARE.
+ */
+
+#include "nir.h"
+#include "nir_builder.h"
+
+static nir_ssa_def *
+lower_umul64(nir_builder *b, nir_ssa_def *x, nir_ssa_def *y)
+{
+   nir_ssa_def *x_lo = nir_unpack_64_2x32_split_x(b, x);
+   nir_ssa_def *x_hi = nir_unpack_64_2x32_split_y(b, x);
+   nir_ssa_def *y_lo = nir_unpack_64_2x32_split_x(b, y);
+   nir_ssa_def *y_hi = nir_unpack_64_2x32_split_y(b, y);
+
+   nir_ssa_def *res_lo = nir_imul(b, x_lo, y_lo);
+   nir_ssa_def *res_hi = nir_iadd(b, nir_umul_high(b, x_lo, y_lo),
+ nir_iadd(b, nir_imul(b, x_lo, y_hi),
+ nir_imul(b, x_hi, y_lo)));
+
+   return nir_pack_64_2x32_split(b, res_lo, res_hi);
+}
+
+static nir_ssa_def *
+lower_isign64(nir_builder *b, nir_ssa_def *x)
+{
+   nir_ssa_def *x_lo = nir_unpack_64_2x32_split_x(b, x);
+   nir_ssa_def *x_hi = nir_unpack_64_2x32_split_y(b, x);
+
+   nir_ssa_def *is_non_zero = nir_i2b(b, nir_ior(b, x_lo, x_hi));
+   nir_ssa_def *res_hi = nir_ishr(b, x_hi, nir_imm_int(b, 31));
+   nir_ssa_def *res_lo = nir_ior(b, res_hi, nir_b2i(b, is_non_zero));
+
+   return nir_pack_64_2x32_split(b, res_lo, res_hi);
+}
+
+static void
+lower_udiv64_mod64(nir_builder *b, nir_ssa_def *n, nir_ssa_def *d,
+   nir_ssa_def **q, nir_ssa_def **r)
+{
+   /* TODO: We should specially handle the case where the denominator is a
+* constant.  In that case, we should be able to reduce it to a multiply by
+* a constant, some shifts, and an add.
+*/
+   nir_ssa_def *n_lo = nir_unpack_64_2x32_split_x(b, n);
+   nir_ssa_def *n_hi = nir_unpack_64_2x32_split_y(b, n);
+   nir_ssa_def *d_lo = nir_unpack_64_2x32_split_x(b, d);
+   nir_ssa_def *d_hi = nir_unpack_64_2x32_split_y(b, d);
+
+   

[Mesa-dev] [Bug 99856] OpenCL Hello world returns "unsupported call to function get_local_size"

[bugzilla-daemon]

https://bugs.freedesktop.org/show_bug.cgi?id=99856

--- Comment #9 from Henrique Dante de Almeida  ---
I'm currently unable to use amdgpu with kernel 4.9. I'm getting this when
exiting X and unable to shutdown cleanly:

fev 25 18:00:44 dragonmount kernel: amdgpu :01:00.0: couldn't schedule ib
on ring 
fev 25 18:00:44 dragonmount kernel: [drm:amdgpu_job_run [amdgpu]] *ERROR* Error
scheduling IBs (
fev 25 18:00:44 dragonmount kernel: [drm:amd_sched_main [amdgpu]] *ERROR*
Failed to run job!
fev 25 18:00:44 dragonmount kernel: amdgpu :01:00.0: couldn't schedule ib
on ring 
fev 25 18:00:44 dragonmount kernel: [drm:amdgpu_job_run [amdgpu]] *ERROR* Error
scheduling IBs (
fev 25 18:00:44 dragonmount kernel: [drm:amd_sched_main [amdgpu]] *ERROR*
Failed to run job!
f


https://bbs.archlinux.org/viewtopic.php?id=222476


Can we fix this for the radeon driver for now ?

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[Mesa-dev] [Bug 99856] OpenCL Hello world returns "unsupported call to function get_local_size"

[bugzilla-daemon]

https://bugs.freedesktop.org/show_bug.cgi?id=99856

--- Comment #8 from Henrique Dante de Almeida  ---
Should I have verde-r600-* ? I'm not using amdgpu.

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[Mesa-dev] [Bug 99856] OpenCL Hello world returns "unsupported call to function get_local_size"

[bugzilla-daemon]

https://bugs.freedesktop.org/show_bug.cgi?id=99856

--- Comment #7 from Henrique Dante de Almeida  ---
libclc /usr/
libclc /usr/include/
libclc /usr/include/clc/
libclc /usr/include/clc/as_type.h
libclc /usr/include/clc/async/
libclc /usr/include/clc/async/async_work_group_copy.h
libclc /usr/include/clc/async/async_work_group_copy.inc
libclc /usr/include/clc/async/async_work_group_strided_copy.h
libclc /usr/include/clc/async/async_work_group_strided_copy.inc
libclc /usr/include/clc/async/gentype.inc
libclc /usr/include/clc/async/prefetch.h
libclc /usr/include/clc/async/prefetch.inc
libclc /usr/include/clc/async/wait_group_events.h
libclc /usr/include/clc/atomic/
libclc /usr/include/clc/atomic/atomic_add.h
libclc /usr/include/clc/atomic/atomic_and.h
libclc /usr/include/clc/atomic/atomic_cmpxchg.h
libclc /usr/include/clc/atomic/atomic_dec.h
libclc /usr/include/clc/atomic/atomic_decl.inc
libclc /usr/include/clc/atomic/atomic_inc.h
libclc /usr/include/clc/atomic/atomic_max.h
libclc /usr/include/clc/atomic/atomic_min.h
libclc /usr/include/clc/atomic/atomic_or.h
libclc /usr/include/clc/atomic/atomic_sub.h
libclc /usr/include/clc/atomic/atomic_xchg.h
libclc /usr/include/clc/atomic/atomic_xor.h
libclc /usr/include/clc/cl_khr_global_int32_base_atomics/
libclc /usr/include/clc/cl_khr_global_int32_base_atomics/atom_add.h
libclc /usr/include/clc/cl_khr_global_int32_base_atomics/atom_cmpxchg.h
libclc /usr/include/clc/cl_khr_global_int32_base_atomics/atom_dec.h
libclc /usr/include/clc/cl_khr_global_int32_base_atomics/atom_inc.h
libclc /usr/include/clc/cl_khr_global_int32_base_atomics/atom_sub.h
libclc /usr/include/clc/cl_khr_global_int32_base_atomics/atom_xchg.h
libclc /usr/include/clc/cl_khr_global_int32_extended_atomics/
libclc /usr/include/clc/cl_khr_global_int32_extended_atomics/atom_and.h
libclc /usr/include/clc/cl_khr_global_int32_extended_atomics/atom_max.h
libclc /usr/include/clc/cl_khr_global_int32_extended_atomics/atom_min.h
libclc /usr/include/clc/cl_khr_global_int32_extended_atomics/atom_or.h
libclc /usr/include/clc/cl_khr_global_int32_extended_atomics/atom_xor.h
libclc /usr/include/clc/cl_khr_local_int32_base_atomics/
libclc /usr/include/clc/cl_khr_local_int32_base_atomics/atom_add.h
libclc /usr/include/clc/cl_khr_local_int32_base_atomics/atom_cmpxchg.h
libclc /usr/include/clc/cl_khr_local_int32_base_atomics/atom_dec.h
libclc /usr/include/clc/cl_khr_local_int32_base_atomics/atom_inc.h
libclc /usr/include/clc/cl_khr_local_int32_base_atomics/atom_sub.h
libclc /usr/include/clc/cl_khr_local_int32_base_atomics/atom_xchg.h
libclc /usr/include/clc/cl_khr_local_int32_extended_atomics/
libclc /usr/include/clc/cl_khr_local_int32_extended_atomics/atom_and.h
libclc /usr/include/clc/cl_khr_local_int32_extended_atomics/atom_max.h
libclc /usr/include/clc/cl_khr_local_int32_extended_atomics/atom_min.h
libclc /usr/include/clc/cl_khr_local_int32_extended_atomics/atom_or.h
libclc /usr/include/clc/cl_khr_local_int32_extended_atomics/atom_xor.h
libclc /usr/include/clc/clc.h
libclc /usr/include/clc/clcfunc.h
libclc /usr/include/clc/clctypes.h
libclc /usr/include/clc/clcversion.h
libclc /usr/include/clc/common/
libclc /usr/include/clc/common/degrees.h
libclc /usr/include/clc/common/degrees.inc
libclc /usr/include/clc/common/mix.h
libclc /usr/include/clc/common/mix.inc
libclc /usr/include/clc/common/radians.h
libclc /usr/include/clc/common/radians.inc
libclc /usr/include/clc/common/sign.h
libclc /usr/include/clc/common/smoothstep.h
libclc /usr/include/clc/common/smoothstep.inc
libclc /usr/include/clc/common/step.h
libclc /usr/include/clc/common/step.inc
libclc /usr/include/clc/convert.h
libclc /usr/include/clc/float/
libclc /usr/include/clc/float/definitions.h
libclc /usr/include/clc/geometric/
libclc /usr/include/clc/geometric/cross.h
libclc /usr/include/clc/geometric/distance.h
libclc /usr/include/clc/geometric/distance.inc
libclc /usr/include/clc/geometric/dot.h
libclc /usr/include/clc/geometric/dot.inc
libclc /usr/include/clc/geometric/fast_distance.h
libclc /usr/include/clc/geometric/fast_distance.inc
libclc /usr/include/clc/geometric/fast_length.h
libclc /usr/include/clc/geometric/fast_length.inc
libclc /usr/include/clc/geometric/fast_normalize.h
libclc /usr/include/clc/geometric/fast_normalize.inc
libclc /usr/include/clc/geometric/floatn.inc
libclc /usr/include/clc/geometric/length.h
libclc /usr/include/clc/geometric/length.inc
libclc /usr/include/clc/geometric/normalize.h
libclc /usr/include/clc/geometric/normalize.inc
libclc /usr/include/clc/image/
libclc /usr/include/clc/image/image.h
libclc /usr/include/clc/image/image_defines.h
libclc /usr/include/clc/integer/
libclc /usr/include/clc/integer/abs.h
libclc /usr/include/clc/integer/abs.inc
libclc /usr/include/clc/integer/abs_diff.h
libclc /usr/include/clc/integer/abs_diff.inc
libclc /usr/include/clc/integer/add_sat.h
libclc /usr/include/clc/integer/add_sat.inc
libclc /usr/include/clc/integer/clz.h
libclc /usr/include/clc/integer/clz.inc
libclc 

[Mesa-dev] [Bug 99856] OpenCL Hello world returns "unsupported call to function get_local_size"

[bugzilla-daemon]

https://bugs.freedesktop.org/show_bug.cgi?id=99856

--- Comment #6 from Jan Vesely  ---
(In reply to Henrique Dante de Almeida from comment #2)
> Yes:
> 
> Nome : libclc
> Versão   : 0.2.0+334+520743b-1
> Descrição: Library requirements of the OpenCL C programming
> language
> Arquitetura  : any
> URL  : http://libclc.llvm.org/
> Licenças : MIT
> Grupos   : Nenhum
> Provê: Nenhum
> Depende de   : Nenhum
> Depend. opcionais: Nenhum
> Necessário para  : Nenhum
> Opcional para: Nenhum
> Conflita com : Nenhum
> Substitui: Nenhum
> Tamanho instalado: 35,96 MiB
> Empacotador  : Laurent Carlier 
> Data da compilação   : qui 27 out 2016 08:58:06 BRST
> Data de instalação   : qua 02 nov 2016 16:03:36 BRST
> Motivo da instalação : Instalado como dependência de outro pacote
> Script de instalação : Não
> Validado por : Assinatura

can you post the list of files installed by this package?

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[Mesa-dev] [Bug 99856] OpenCL Hello world returns "unsupported call to function get_local_size"

[bugzilla-daemon]

https://bugs.freedesktop.org/show_bug.cgi?id=99856

--- Comment #5 from Henrique Dante de Almeida  ---
I'll try with an upstream environment and generate strace output soon

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Re: [Mesa-dev] [PATCH 1/2] radeonsi: add support for an on-disk shader cache

[Marek Olšák]

On Sat, Feb 25, 2017 at 5:06 PM, Dieter Nützel  wrote:
> Am 25.02.2017 05:56, schrieb Timothy Arceri:
>>
>> On 24/02/17 21:02, Marek Olšák wrote:
>>>
>>> On Fri, Feb 24, 2017 at 3:18 AM, Timothy Arceri 
>>> wrote:



 On 24/02/17 08:49, Timothy Arceri wrote:
>
>
>
>
> On 24/02/17 05:12, Marek Olšák wrote:
>>
>>
>> On Thu, Feb 23, 2017 at 3:09 AM, Timothy Arceri
>>  wrote:
>>>
>>>
>>> From: kdj0c 
>>>
>>> V2 (Timothy Arceri):
>>> - when loading from disk cache also binary insert into memory cache.
>>> - check that the binary loaded from disk is the correct size. If not
>>>   delete the cache item and skip loading from cache.
>>> ---
>>>  src/gallium/drivers/radeonsi/si_state_shaders.c | 69
>>> ++---
>>>  1 file changed, 62 insertions(+), 7 deletions(-)
>>>
>>> diff --git a/src/gallium/drivers/radeonsi/si_state_shaders.c
>>> b/src/gallium/drivers/radeonsi/si_state_shaders.c
>>> index f615aa8..71556f9 100644
>>> --- a/src/gallium/drivers/radeonsi/si_state_shaders.c
>>> +++ b/src/gallium/drivers/radeonsi/si_state_shaders.c
>>> @@ -36,6 +36,9 @@
>>>  #include "util/u_memory.h"
>>>  #include "util/u_prim.h"
>>>
>>> +#include "util/disk_cache.h"
>>> +#include "util/mesa-sha1.h"
>>> +
>>>  /* SHADER_CACHE */
>>>
>>>  /**
>>> @@ -182,10 +185,12 @@ static bool si_load_shader_binary(struct
>>> si_shader *shader, void *binary)
>>>   */
>>>  static bool si_shader_cache_insert_shader(struct si_screen *sscreen,
>>>   void *tgsi_binary,
>>> - struct si_shader *shader)
>>> + struct si_shader *shader,
>>> + bool
>>> insert_into_disk_cache)
>>>  {
>>> void *hw_binary;
>>> struct hash_entry *entry;
>>> +   uint8_t key[CACHE_KEY_SIZE];
>>>
>>> entry = _mesa_hash_table_search(sscreen->shader_cache,
>>> tgsi_binary);
>>> if (entry)
>>> @@ -201,6 +206,12 @@ static bool si_shader_cache_insert_shader(struct
>>> si_screen *sscreen,
>>> return false;
>>> }
>>>
>>> +   if (sscreen->b.disk_shader_cache && insert_into_disk_cache) {
>>> +   _mesa_sha1_compute(tgsi_binary, *((uint32_t
>>> *)tgsi_binary), key);
>>
>>
>>
>> What happens if we randomly get a sha1 collision?
>
>
>
> You should stop playing your game which will be rendering incorrectly
> and by a lotto ticket.
>
>> Shouldn't we store the whole key as well?
>
>
>
> Sure I can add that, its cheap to check here anyway. Although the other
> cache stages rely on a collision being improbable.




 For some reason I thought the key was simpler than it is. It seems
 excessive
 to store and compare the tgsi again. I don't think git even worries
 about
 the possibility of a collision and we will be dealing with much smaller
 amounts of cache items then commits in a git repository.

 Thoughts?
>>>
>>>
>>> I'll let others comment on this. If nobody comments, checking only the
>>> key can stay.
>>
>>
>> Seems SVN didn't used to worry about collisions either.
>>
>>
>> https://arstechnica.com/security/2017/02/watershed-sha1-collision-just-broke-the-webkit-repository-others-may-follow/
>
>
> Shouldn't sha1 _completely_ avoided, then?

We don't use SHA1 for security.

I guess there were problems with SVN before, they just weren't given
any publicity. It's an SVN bug, not a SHA1 issue.

Marek
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[Mesa-dev] [Bug 99856] OpenCL Hello world returns "unsupported call to function get_local_size"

[bugzilla-daemon]

https://bugs.freedesktop.org/show_bug.cgi?id=99856

--- Comment #4 from Aidan Thornton  ---
I've been having the same issue on Gentoo for a while with Mesa and libdrm from
git master, and it appears someone's been having the same problem with the
Debian-packaged version of Mesa too:
https://bugs.debian.org/cgi-bin/bugreport.cgi?bug=848258

So if it is a distro issue it's one that affects multiple distros.  There's a
comment on the Debian bug from a Debian developer/AMD employee complaining that
it's an upstream bug too.

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[Mesa-dev] [PATCH] android: vulkan: add support for libmesa_vulkan_{util, wsi}

[Mauro Rossi]

The following commits require android porting:

e9dcb17 "vulkan/util: Add generator for enum_to_str functions"
8e03250 "vulkan: Combine wsi and util makefiles"

The following changes are implemented in this patch:

Add src/vulkan/Android.mk to build libmesa_vulkan_util and libmesa_vulkan_wsi
Android.mk: add src/vulkan to SUBDIR to build new modules
intel/vulkan: fix libmesa_vulkan_util,vk_enum_to_str.h dependencies
Add -o OUTPUT_PATH option in src/vulkan/util/gen_enum_to_str.py script
Use -o OUTPUT_PATH option in automake generation rules for vk_enum_to_str.{c,h}

Tested with nougat-x86 32bit and 64bit builds
---
 Android.mk |  3 +-
 src/intel/vulkan/Android.mk|  8 +++--
 src/vulkan/Android.mk  | 70 ++
 src/vulkan/Makefile.am |  2 +-
 src/vulkan/util/gen_enum_to_str.py | 13 +--
 5 files changed, 90 insertions(+), 6 deletions(-)
 create mode 100644 src/vulkan/Android.mk

diff --git a/Android.mk b/Android.mk
index 4168b4d..bb70321 100644
--- a/Android.mk
+++ b/Android.mk
@@ -92,7 +92,8 @@ SUBDIRS := \
src/egl \
src/amd \
src/intel \
-   src/mesa/drivers/dri
+   src/mesa/drivers/dri \
+   src/vulkan
 
 INC_DIRS := $(call all-named-subdir-makefiles,$(SUBDIRS))
 
diff --git a/src/intel/vulkan/Android.mk b/src/intel/vulkan/Android.mk
index 1e53970..a6a7d26 100644
--- a/src/intel/vulkan/Android.mk
+++ b/src/intel/vulkan/Android.mk
@@ -74,7 +74,8 @@ include $(BUILD_STATIC_LIBRARY)
 ANV_INCLUDES := \
$(VULKAN_COMMON_INCLUDES) \
$(call 
generated-sources-dir-for,STATIC_LIBRARIES,libmesa_anv_entrypoints,,) \
-   $(call generated-sources-dir-for,STATIC_LIBRARIES,libmesa_nir,,)/nir
+   $(call generated-sources-dir-for,STATIC_LIBRARIES,libmesa_nir,,)/nir \
+   $(call 
generated-sources-dir-for,STATIC_LIBRARIES,libmesa_vulkan_util,,)/util
 
 #
 # libanv for gen7
@@ -172,7 +173,10 @@ LOCAL_C_INCLUDES := \
$(ANV_INCLUDES) \
$(MESA_TOP)/src/compiler
 
-LOCAL_WHOLE_STATIC_LIBRARIES := libmesa_anv_entrypoints libmesa_genxml
+LOCAL_WHOLE_STATIC_LIBRARIES := \
+   libmesa_anv_entrypoints \
+   libmesa_genxml \
+   libmesa_vulkan_util
 
 LOCAL_GENERATED_SOURCES += $(intermediates)/anv_entrypoints.c
 
diff --git a/src/vulkan/Android.mk b/src/vulkan/Android.mk
new file mode 100644
index 000..4ba5750
--- /dev/null
+++ b/src/vulkan/Android.mk
@@ -0,0 +1,70 @@
+# Copyright © 2017 Mauro Rossi 
+#
+# Permission is hereby granted, free of charge, to any person obtaining a
+# copy of this software and associated documentation files (the "Software"),
+# to deal in the Software without restriction, including without limitation
+# the rights to use, copy, modify, merge, publish, distribute, sublicense,
+# and/or sell copies of the Software, and to permit persons to whom the
+# Software is furnished to do so, subject to the following conditions:
+#
+# The above copyright notice and this permission notice (including the next
+# paragraph) shall be included in all copies or substantial portions of the
+# Software.
+#
+# THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+# IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+# FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
+# THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+# LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+# FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
+# IN THE SOFTWARE.
+
+LOCAL_PATH := $(call my-dir)
+
+# Import variables
+include $(LOCAL_PATH)/Makefile.sources
+
+#
+# libmesa_vulkan_util
+#
+
+include $(CLEAR_VARS)
+LOCAL_MODULE := libmesa_vulkan_util
+LOCAL_MODULE_CLASS := STATIC_LIBRARIES
+
+intermediates := $(call local-generated-sources-dir)
+
+LOCAL_C_INCLUDES := \
+   $(MESA_TOP)/include/vulkan
+
+LOCAL_GENERATED_SOURCES := \
+   $(intermediates)/util/vk_enum_to_str.c \
+   $(intermediates)/util/vk_enum_to_str.h
+
+vulkan_api_xml = $(MESA_TOP)/src/vulkan/registry/vk.xml
+
+$(LOCAL_GENERATED_SOURCES): PRIVATE_PYTHON := $(MESA_PYTHON2)
+$(LOCAL_GENERATED_SOURCES): PRIVATE_CUSTOM_TOOL := $(PRIVATE_PYTHON) 
$(MESA_TOP)/src/vulkan/util/gen_enum_to_str.py -o $(intermediates)/util
+$(LOCAL_GENERATED_SOURCES): $(MESA_TOP)/src/vulkan/util/gen_enum_to_str.py 
$(vulkan_api_xml)
+   $(transform-generated-source)
+
+LOCAL_EXPORT_C_INCLUDE_DIRS := \
+$(intermediates)
+
+include $(MESA_COMMON_MK)
+include $(BUILD_STATIC_LIBRARY)
+
+#
+# libmesa_vulkan_wsi
+#
+
+include $(CLEAR_VARS)
+LOCAL_MODULE := libmesa_vulkan_wsi
+
+LOCAL_SRC_FILES := $(VULKAN_WSI_SOURCES)
+
+LOCAL_C_INCLUDES := \
+   $(MESA_TOP)/include/vulkan
+
+include $(MESA_COMMON_MK)
+include $(BUILD_STATIC_LIBRARY)
diff --git a/src/vulkan/Makefile.am b/src/vulkan/Makefile.am
index 5cdffbf..019da13 100644
--- 

Re: [Mesa-dev] [RESEND 08/13] anv: generate anv_entrypoints.{h, c} in one command

[Mauro Rossi]

>
> Besides this issue, also  8e03250fcf4fc5de31e92ca4919959d932888a69
> "vulkan: Combine wsi and util makefiles" requires changes/an Android.mk
> makefile
>
> Regarding the -o argument,
>  it is indeed essential for Android Build System that generated
> sources/headers
> go in $(OUT)/gen/{EXECUTABLE,{SHARED,STATIC}_LIBRARIES}/[
> module]_intermediates
> so the possibility to direct the generated files is needed,
> but at this point I'm not even sure Android Build System will not complain,
> I need to check.
>
> Mauro
>

Hi,

the problem mentioned above is confirmed, due to:
e9dcb17 "vulkan/util: Add generator for enum_to_str functions"
8e03250 "vulkan: Combine wsi and util makefiles"

I will send patch in separate ML thread to fix the necessary -o OUTPUT_PATH
option
for this pre-exiting problem.

After that we will tackle with anv_entrypoints.{h, c} generation rules.

For Tapani, I could build mesa-dev with vulkan.mesa_intel module
and I don't see the build-id error, could you send me a PM with info?
Thanks

Mauro
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Re: [Mesa-dev] [PATCH 1/2] radeonsi: add support for an on-disk shader cache

[Dieter Nützel]

Am 25.02.2017 05:56, schrieb Timothy Arceri:

On 24/02/17 21:02, Marek Olšák wrote:
On Fri, Feb 24, 2017 at 3:18 AM, Timothy Arceri 
 wrote:



On 24/02/17 08:49, Timothy Arceri wrote:




On 24/02/17 05:12, Marek Olšák wrote:


On Thu, Feb 23, 2017 at 3:09 AM, Timothy Arceri
 wrote:


From: kdj0c 

V2 (Timothy Arceri):
- when loading from disk cache also binary insert into memory 
cache.
- check that the binary loaded from disk is the correct size. If 
not

  delete the cache item and skip loading from cache.
---
 src/gallium/drivers/radeonsi/si_state_shaders.c | 69
++---
 1 file changed, 62 insertions(+), 7 deletions(-)

diff --git a/src/gallium/drivers/radeonsi/si_state_shaders.c
b/src/gallium/drivers/radeonsi/si_state_shaders.c
index f615aa8..71556f9 100644
--- a/src/gallium/drivers/radeonsi/si_state_shaders.c
+++ b/src/gallium/drivers/radeonsi/si_state_shaders.c
@@ -36,6 +36,9 @@
 #include "util/u_memory.h"
 #include "util/u_prim.h"

+#include "util/disk_cache.h"
+#include "util/mesa-sha1.h"
+
 /* SHADER_CACHE */

 /**
@@ -182,10 +185,12 @@ static bool si_load_shader_binary(struct
si_shader *shader, void *binary)
  */
 static bool si_shader_cache_insert_shader(struct si_screen 
*sscreen,

  void *tgsi_binary,
- struct si_shader 
*shader)
+ struct si_shader 
*shader,
+ bool 
insert_into_disk_cache)

 {
void *hw_binary;
struct hash_entry *entry;
+   uint8_t key[CACHE_KEY_SIZE];

entry = _mesa_hash_table_search(sscreen->shader_cache,
tgsi_binary);
if (entry)
@@ -201,6 +206,12 @@ static bool 
si_shader_cache_insert_shader(struct

si_screen *sscreen,
return false;
}

+   if (sscreen->b.disk_shader_cache && 
insert_into_disk_cache) {

+   _mesa_sha1_compute(tgsi_binary, *((uint32_t
*)tgsi_binary), key);



What happens if we randomly get a sha1 collision?



You should stop playing your game which will be rendering 
incorrectly

and by a lotto ticket.


Shouldn't we store the whole key as well?



Sure I can add that, its cheap to check here anyway. Although the 
other

cache stages rely on a collision being improbable.




For some reason I thought the key was simpler than it is. It seems 
excessive
to store and compare the tgsi again. I don't think git even worries 
about
the possibility of a collision and we will be dealing with much 
smaller

amounts of cache items then commits in a git repository.

Thoughts?


I'll let others comment on this. If nobody comments, checking only the
key can stay.


Seems SVN didn't used to worry about collisions either.

https://arstechnica.com/security/2017/02/watershed-sha1-collision-just-broke-the-webkit-repository-others-may-follow/


Shouldn't sha1 _completely_ avoided, then?

Greetings,
  Dieter



Marek

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[Mesa-dev] PSA: kmscube moved to fd.o

[Rob Clark]

Anyone with mesa/libdrm push access should in theory be able to push
directly.  Not really any point to wait for me to have time to merge
pullreqs on github ;-)

I've spiffed it out slightly, so it supports both legacy pageflip mode
and atomic/fence mode, etc.

https://cgit.freedesktop.org/mesa/kmscube/

BR,
-R
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[Mesa-dev] [Bug 99953] device9.c:122:49: error: ‘PIPE_CAP_USER_INDEX_BUFFERS’ undeclared (first use in this function)

[bugzilla-daemon]

https://bugs.freedesktop.org/show_bug.cgi?id=99953

Mike Lothian  changed:

   What|Removed |Added

 Resolution|--- |FIXED
 CC||m...@fireburn.co.uk
 Status|NEW |RESOLVED

--- Comment #1 from Mike Lothian  ---
Should now be fixed
https://cgit.freedesktop.org/mesa/mesa/commit/?id=47c49f619045f8b3d597558adac736578c3f14cb

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Re: [Mesa-dev] [PATCH v5] st/nine: Drop USER_INDEX_BUFFERS check

[Mike Lothian]

Thanks for pushing and being patient with me

On Sat, 25 Feb 2017 at 12:13 Edward O'Callaghan 
wrote:

> Very noisy but you got there in the end,
>
> Reviewed-by: Edward O'Callaghan 
>
> On 02/25/2017 10:50 PM, Mike Lothian wrote:
> > This fixes 4a883966c1f74f43afc145d2c3d27af7b8c5e01a where the
> > PIPE_CAP was removed.
> >
> > Now USER_INDEX_BUFFERS are always enabled remove the check and only
> > check for cmst_active directly.
> >
> > v2: Axel pointed out the code was still needed when cmst was inactive,
> > Rebase on master too
> > v3: Drop struct member user_ibufs also && fixup shortlog (Edward).
> > v4: Fix negation
> > v5: Use the right variable name csmt != cmst (and learn git rebase)
> >
> > Fixes: 4a883966c1f7 ("gallium: remove PIPE_CAP_USER_INDEX_BUFFERS")
> > Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=99953
> > Reported-and-tested-by: Vinson Lee  (v1)
> > Cc: Marek Olšák 
> > Cc: Axel Davy 
> > Signed-off-by: Edward O'Callaghan 
> > Signed-off-by: Mike Lothian 
> > ---
> >  src/gallium/state_trackers/nine/device9.c | 3 +--
> >  src/gallium/state_trackers/nine/device9.h | 1 -
> >  2 files changed, 1 insertion(+), 3 deletions(-)
> >
> > diff --git a/src/gallium/state_trackers/nine/device9.c
> b/src/gallium/state_trackers/nine/device9.c
> > index c3924a21e2..843716207d 100644
> > --- a/src/gallium/state_trackers/nine/device9.c
> > +++ b/src/gallium/state_trackers/nine/device9.c
> > @@ -473,7 +473,6 @@ NineDevice9_ctor( struct NineDevice9 *This,
> >  /* Allocate upload helper for drivers that suck (from st pov ;). */
> >
> >  This->driver_caps.user_vbufs = GET_PCAP(USER_VERTEX_BUFFERS) &&
> !This->csmt_active;
> > -This->driver_caps.user_ibufs = GET_PCAP(USER_INDEX_BUFFERS) &&
> !This->csmt_active;
> >  This->driver_caps.user_cbufs = GET_PCAP(USER_CONSTANT_BUFFERS);
> >  This->driver_caps.user_sw_vbufs =
> This->screen_sw->get_param(This->screen_sw, PIPE_CAP_USER_VERTEX_BUFFERS);
> >  This->driver_caps.user_sw_cbufs =
> This->screen_sw->get_param(This->screen_sw, PIPE_CAP_USER_CONSTANT_BUFFERS);
> > @@ -2896,7 +2895,7 @@ NineDevice9_DrawIndexedPrimitiveUP( struct
> NineDevice9 *This,
> >  vbuf.buffer_offset -= base;
> >  vbuf.user_buffer = NULL;
> >  }
> > -if (!This->driver_caps.user_ibufs) {
> > +if (This->csmt_active) {
> >  u_upload_data(This->context.pipe->stream_uploader,
> >0,
> >(prim_count_to_vertex_count(PrimitiveType,
> PrimitiveCount)) * ibuf.index_size,
> > diff --git a/src/gallium/state_trackers/nine/device9.h
> b/src/gallium/state_trackers/nine/device9.h
> > index 71ebbdc935..4b1630c40f 100644
> > --- a/src/gallium/state_trackers/nine/device9.h
> > +++ b/src/gallium/state_trackers/nine/device9.h
> > @@ -127,7 +127,6 @@ struct NineDevice9
> >
> >  struct {
> >  boolean user_vbufs;
> > -boolean user_ibufs;
> >  boolean user_cbufs;
> >  boolean user_sw_vbufs;
> >  boolean user_sw_cbufs;
> >
>
>
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Re: [Mesa-dev] [PATCH v5] st/nine: Drop USER_INDEX_BUFFERS check

[Edward O'Callaghan]

Very noisy but you got there in the end,

Reviewed-by: Edward O'Callaghan 

On 02/25/2017 10:50 PM, Mike Lothian wrote:
> This fixes 4a883966c1f74f43afc145d2c3d27af7b8c5e01a where the
> PIPE_CAP was removed.
> 
> Now USER_INDEX_BUFFERS are always enabled remove the check and only
> check for cmst_active directly.
> 
> v2: Axel pointed out the code was still needed when cmst was inactive,
> Rebase on master too
> v3: Drop struct member user_ibufs also && fixup shortlog (Edward).
> v4: Fix negation
> v5: Use the right variable name csmt != cmst (and learn git rebase)
> 
> Fixes: 4a883966c1f7 ("gallium: remove PIPE_CAP_USER_INDEX_BUFFERS")
> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=99953
> Reported-and-tested-by: Vinson Lee  (v1)
> Cc: Marek Olšák 
> Cc: Axel Davy 
> Signed-off-by: Edward O'Callaghan 
> Signed-off-by: Mike Lothian 
> ---
>  src/gallium/state_trackers/nine/device9.c | 3 +--
>  src/gallium/state_trackers/nine/device9.h | 1 -
>  2 files changed, 1 insertion(+), 3 deletions(-)
> 
> diff --git a/src/gallium/state_trackers/nine/device9.c 
> b/src/gallium/state_trackers/nine/device9.c
> index c3924a21e2..843716207d 100644
> --- a/src/gallium/state_trackers/nine/device9.c
> +++ b/src/gallium/state_trackers/nine/device9.c
> @@ -473,7 +473,6 @@ NineDevice9_ctor( struct NineDevice9 *This,
>  /* Allocate upload helper for drivers that suck (from st pov ;). */
>  
>  This->driver_caps.user_vbufs = GET_PCAP(USER_VERTEX_BUFFERS) && 
> !This->csmt_active;
> -This->driver_caps.user_ibufs = GET_PCAP(USER_INDEX_BUFFERS) && 
> !This->csmt_active;
>  This->driver_caps.user_cbufs = GET_PCAP(USER_CONSTANT_BUFFERS);
>  This->driver_caps.user_sw_vbufs = 
> This->screen_sw->get_param(This->screen_sw, PIPE_CAP_USER_VERTEX_BUFFERS);
>  This->driver_caps.user_sw_cbufs = 
> This->screen_sw->get_param(This->screen_sw, PIPE_CAP_USER_CONSTANT_BUFFERS);
> @@ -2896,7 +2895,7 @@ NineDevice9_DrawIndexedPrimitiveUP( struct NineDevice9 
> *This,
>  vbuf.buffer_offset -= base;
>  vbuf.user_buffer = NULL;
>  }
> -if (!This->driver_caps.user_ibufs) {
> +if (This->csmt_active) {
>  u_upload_data(This->context.pipe->stream_uploader,
>0,
>(prim_count_to_vertex_count(PrimitiveType, 
> PrimitiveCount)) * ibuf.index_size,
> diff --git a/src/gallium/state_trackers/nine/device9.h 
> b/src/gallium/state_trackers/nine/device9.h
> index 71ebbdc935..4b1630c40f 100644
> --- a/src/gallium/state_trackers/nine/device9.h
> +++ b/src/gallium/state_trackers/nine/device9.h
> @@ -127,7 +127,6 @@ struct NineDevice9
>  
>  struct {
>  boolean user_vbufs;
> -boolean user_ibufs;
>  boolean user_cbufs;
>  boolean user_sw_vbufs;
>  boolean user_sw_cbufs;
> 



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[Mesa-dev] [PATCH v5] st/nine: Drop USER_INDEX_BUFFERS check

[Mike Lothian]

This fixes 4a883966c1f74f43afc145d2c3d27af7b8c5e01a where the
PIPE_CAP was removed.

Now USER_INDEX_BUFFERS are always enabled remove the check and only
check for cmst_active directly.

v2: Axel pointed out the code was still needed when cmst was inactive,
Rebase on master too
v3: Drop struct member user_ibufs also && fixup shortlog (Edward).
v4: Fix negation
v5: Use the right variable name csmt != cmst (and learn git rebase)

Fixes: 4a883966c1f7 ("gallium: remove PIPE_CAP_USER_INDEX_BUFFERS")
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=99953
Reported-and-tested-by: Vinson Lee  (v1)
Cc: Marek Olšák 
Cc: Axel Davy 
Signed-off-by: Edward O'Callaghan 
Signed-off-by: Mike Lothian 
---
 src/gallium/state_trackers/nine/device9.c | 3 +--
 src/gallium/state_trackers/nine/device9.h | 1 -
 2 files changed, 1 insertion(+), 3 deletions(-)

diff --git a/src/gallium/state_trackers/nine/device9.c 
b/src/gallium/state_trackers/nine/device9.c
index c3924a21e2..843716207d 100644
--- a/src/gallium/state_trackers/nine/device9.c
+++ b/src/gallium/state_trackers/nine/device9.c
@@ -473,7 +473,6 @@ NineDevice9_ctor( struct NineDevice9 *This,
 /* Allocate upload helper for drivers that suck (from st pov ;). */
 
 This->driver_caps.user_vbufs = GET_PCAP(USER_VERTEX_BUFFERS) && 
!This->csmt_active;
-This->driver_caps.user_ibufs = GET_PCAP(USER_INDEX_BUFFERS) && 
!This->csmt_active;
 This->driver_caps.user_cbufs = GET_PCAP(USER_CONSTANT_BUFFERS);
 This->driver_caps.user_sw_vbufs = 
This->screen_sw->get_param(This->screen_sw, PIPE_CAP_USER_VERTEX_BUFFERS);
 This->driver_caps.user_sw_cbufs = 
This->screen_sw->get_param(This->screen_sw, PIPE_CAP_USER_CONSTANT_BUFFERS);
@@ -2896,7 +2895,7 @@ NineDevice9_DrawIndexedPrimitiveUP( struct NineDevice9 
*This,
 vbuf.buffer_offset -= base;
 vbuf.user_buffer = NULL;
 }
-if (!This->driver_caps.user_ibufs) {
+if (This->csmt_active) {
 u_upload_data(This->context.pipe->stream_uploader,
   0,
   (prim_count_to_vertex_count(PrimitiveType, 
PrimitiveCount)) * ibuf.index_size,
diff --git a/src/gallium/state_trackers/nine/device9.h 
b/src/gallium/state_trackers/nine/device9.h
index 71ebbdc935..4b1630c40f 100644
--- a/src/gallium/state_trackers/nine/device9.h
+++ b/src/gallium/state_trackers/nine/device9.h
@@ -127,7 +127,6 @@ struct NineDevice9
 
 struct {
 boolean user_vbufs;
-boolean user_ibufs;
 boolean user_cbufs;
 boolean user_sw_vbufs;
 boolean user_sw_cbufs;
-- 
2.11.1

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Re: [Mesa-dev] [PATCH v4] st/nine: Drop USER_INDEX_BUFFERS check

[Edward O'Callaghan]

On 02/25/2017 10:39 PM, Mike Lothian wrote:
> This fixes 4a883966c1f74f43afc145d2c3d27af7b8c5e01a where the
> PIPE_CAP was removed.
> 
> Now USER_INDEX_BUFFERS are always enabled remove the check and only
> check for cmst_active directly.
> 
> v2: Axel pointed out the code was still needed when cmst was inactive,
> Rebase on master too
> v3: Drop struct member user_ibufs also && fixup shortlog (Edward).
> v4: Fix negation
> 
> Fixes: 4a883966c1f7 ("gallium: remove PIPE_CAP_USER_INDEX_BUFFERS")
> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=99953
> Reported-and-tested-by: Vinson Lee  (v1)
> Cc: Marek Olšák 
> Cc: Axel Davy 
> Signed-off-by: Mike Lothian 
> Signed-off-by: Edward O'Callaghan 
> ---
>  src/gallium/state_trackers/nine/device9.c | 3 +--
>  src/gallium/state_trackers/nine/device9.h | 1 -
>  2 files changed, 1 insertion(+), 3 deletions(-)
> 
> diff --git a/src/gallium/state_trackers/nine/device9.c 
> b/src/gallium/state_trackers/nine/device9.c
> index c3924a21e2..822a306544 100644
> --- a/src/gallium/state_trackers/nine/device9.c
> +++ b/src/gallium/state_trackers/nine/device9.c
> @@ -473,7 +473,6 @@ NineDevice9_ctor( struct NineDevice9 *This,
>  /* Allocate upload helper for drivers that suck (from st pov ;). */
>  
>  This->driver_caps.user_vbufs = GET_PCAP(USER_VERTEX_BUFFERS) && 
> !This->csmt_active;
> -This->driver_caps.user_ibufs = GET_PCAP(USER_INDEX_BUFFERS) && 
> !This->csmt_active;
>  This->driver_caps.user_cbufs = GET_PCAP(USER_CONSTANT_BUFFERS);
>  This->driver_caps.user_sw_vbufs = 
> This->screen_sw->get_param(This->screen_sw, PIPE_CAP_USER_VERTEX_BUFFERS);
>  This->driver_caps.user_sw_cbufs = 
> This->screen_sw->get_param(This->screen_sw, PIPE_CAP_USER_CONSTANT_BUFFERS);
> @@ -2896,7 +2895,7 @@ NineDevice9_DrawIndexedPrimitiveUP( struct NineDevice9 
> *This,
>  vbuf.buffer_offset -= base;
>  vbuf.user_buffer = NULL;
>  }
> -if (!This->driver_caps.user_ibufs) {
> +if (This->cmst_active) {
you mean This->csmt_active

you should compile test things really at the very least :/

>  u_upload_data(This->context.pipe->stream_uploader,
>0,
>(prim_count_to_vertex_count(PrimitiveType, 
> PrimitiveCount)) * ibuf.index_size,
> diff --git a/src/gallium/state_trackers/nine/device9.h 
> b/src/gallium/state_trackers/nine/device9.h
> index 71ebbdc935..4b1630c40f 100644
> --- a/src/gallium/state_trackers/nine/device9.h
> +++ b/src/gallium/state_trackers/nine/device9.h
> @@ -127,7 +127,6 @@ struct NineDevice9
>  
>  struct {
>  boolean user_vbufs;
> -boolean user_ibufs;
>  boolean user_cbufs;
>  boolean user_sw_vbufs;
>  boolean user_sw_cbufs;
> 



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[Mesa-dev] [PATCH v4] st/nine: Drop USER_INDEX_BUFFERS check

[Mike Lothian]

This fixes 4a883966c1f74f43afc145d2c3d27af7b8c5e01a where the
PIPE_CAP was removed.

Now USER_INDEX_BUFFERS are always enabled remove the check and only
check for cmst_active directly.

v2: Axel pointed out the code was still needed when cmst was inactive,
Rebase on master too
v3: Drop struct member user_ibufs also && fixup shortlog (Edward).
v4: Fix negation

Fixes: 4a883966c1f7 ("gallium: remove PIPE_CAP_USER_INDEX_BUFFERS")
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=99953
Reported-and-tested-by: Vinson Lee  (v1)
Cc: Marek Olšák 
Cc: Axel Davy 
Signed-off-by: Mike Lothian 
Signed-off-by: Edward O'Callaghan 
---
 src/gallium/state_trackers/nine/device9.c | 3 +--
 src/gallium/state_trackers/nine/device9.h | 1 -
 2 files changed, 1 insertion(+), 3 deletions(-)

diff --git a/src/gallium/state_trackers/nine/device9.c 
b/src/gallium/state_trackers/nine/device9.c
index c3924a21e2..822a306544 100644
--- a/src/gallium/state_trackers/nine/device9.c
+++ b/src/gallium/state_trackers/nine/device9.c
@@ -473,7 +473,6 @@ NineDevice9_ctor( struct NineDevice9 *This,
 /* Allocate upload helper for drivers that suck (from st pov ;). */
 
 This->driver_caps.user_vbufs = GET_PCAP(USER_VERTEX_BUFFERS) && 
!This->csmt_active;
-This->driver_caps.user_ibufs = GET_PCAP(USER_INDEX_BUFFERS) && 
!This->csmt_active;
 This->driver_caps.user_cbufs = GET_PCAP(USER_CONSTANT_BUFFERS);
 This->driver_caps.user_sw_vbufs = 
This->screen_sw->get_param(This->screen_sw, PIPE_CAP_USER_VERTEX_BUFFERS);
 This->driver_caps.user_sw_cbufs = 
This->screen_sw->get_param(This->screen_sw, PIPE_CAP_USER_CONSTANT_BUFFERS);
@@ -2896,7 +2895,7 @@ NineDevice9_DrawIndexedPrimitiveUP( struct NineDevice9 
*This,
 vbuf.buffer_offset -= base;
 vbuf.user_buffer = NULL;
 }
-if (!This->driver_caps.user_ibufs) {
+if (This->cmst_active) {
 u_upload_data(This->context.pipe->stream_uploader,
   0,
   (prim_count_to_vertex_count(PrimitiveType, 
PrimitiveCount)) * ibuf.index_size,
diff --git a/src/gallium/state_trackers/nine/device9.h 
b/src/gallium/state_trackers/nine/device9.h
index 71ebbdc935..4b1630c40f 100644
--- a/src/gallium/state_trackers/nine/device9.h
+++ b/src/gallium/state_trackers/nine/device9.h
@@ -127,7 +127,6 @@ struct NineDevice9
 
 struct {
 boolean user_vbufs;
-boolean user_ibufs;
 boolean user_cbufs;
 boolean user_sw_vbufs;
 boolean user_sw_cbufs;
-- 
2.11.1

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Re: [Mesa-dev] [PATCH] st/nine: Drop USER_INDEX_BUFFERS check

[Mike Lothian]

Will do.

On Sat, 25 Feb 2017 at 11:31 Edward O'Callaghan 
wrote:

> oh yes I missed that, you want to have drop the negation in your patch
> Mike.
>
> On 02/25/2017 10:28 PM, Mike Lothian wrote:
> > I think my question regarding the double negative still stands. Is it
> > "!This->cmst_active" ot "This->cmst_active"
> >
> > On Sat, 25 Feb 2017 at 11:23 Edward O'Callaghan
> > >
> wrote:
> >
> > From: Mike Lothian  >>
> >
> > This fixes 4a883966c1f74f43afc145d2c3d27af7b8c5e01a where the
> > PIPE_CAP was removed.
> >
> > Now USER_INDEX_BUFFERS are always enabled remove the check and only
> > check for cmst_active directly.
> >
> > v2: Axel pointed out the code was still needed when cmst was
> inactive,
> > Rebase on master too
> > v3: drop struct member user_ibufs also && fixup shortlog (Edward).
> >
> > Fixes: 4a883966c1f7 ("gallium: remove PIPE_CAP_USER_INDEX_BUFFERS")
> > Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=99953
> > Reported-and-tested-by: Vinson Lee  > > (v1)
> > Cc: Marek Olšák >
> > Cc: Axel Davy >
> > Signed-off-by: Mike Lothian  > >
> > Signed-off-by: Edward O'Callaghan  > >
> > ---
> >  src/gallium/state_trackers/nine/device9.c | 3 +--
> >  src/gallium/state_trackers/nine/device9.h | 1 -
> >  2 files changed, 1 insertion(+), 3 deletions(-)
> >
> > diff --git a/src/gallium/state_trackers/nine/device9.c
> > b/src/gallium/state_trackers/nine/device9.c
> > index c3924a2..30ab8de 100644
> > --- a/src/gallium/state_trackers/nine/device9.c
> > +++ b/src/gallium/state_trackers/nine/device9.c
> > @@ -473,7 +473,6 @@ NineDevice9_ctor( struct NineDevice9 *This,
> >  /* Allocate upload helper for drivers that suck (from st pov
> ;). */
> >
> >  This->driver_caps.user_vbufs = GET_PCAP(USER_VERTEX_BUFFERS) &&
> > !This->csmt_active;
> > -This->driver_caps.user_ibufs = GET_PCAP(USER_INDEX_BUFFERS) &&
> > !This->csmt_active;
> >  This->driver_caps.user_cbufs = GET_PCAP(USER_CONSTANT_BUFFERS);
> >  This->driver_caps.user_sw_vbufs =
> > This->screen_sw->get_param(This->screen_sw,
> > PIPE_CAP_USER_VERTEX_BUFFERS);
> >  This->driver_caps.user_sw_cbufs =
> > This->screen_sw->get_param(This->screen_sw,
> > PIPE_CAP_USER_CONSTANT_BUFFERS);
> > @@ -2896,7 +2895,7 @@ NineDevice9_DrawIndexedPrimitiveUP( struct
> > NineDevice9 *This,
> >  vbuf.buffer_offset -= base;
> >  vbuf.user_buffer = NULL;
> >  }
> > -if (!This->driver_caps.user_ibufs) {
> > +if (!This->cmst_active) {
> >  u_upload_data(This->context.pipe->stream_uploader,
> >0,
> >(prim_count_to_vertex_count(PrimitiveType,
> > PrimitiveCount)) * ibuf.index_size,
> > diff --git a/src/gallium/state_trackers/nine/device9.h
> > b/src/gallium/state_trackers/nine/device9.h
> > index 71ebbdc..4b1630c 100644
> > --- a/src/gallium/state_trackers/nine/device9.h
> > +++ b/src/gallium/state_trackers/nine/device9.h
> > @@ -127,7 +127,6 @@ struct NineDevice9
> >
> >  struct {
> >  boolean user_vbufs;
> > -boolean user_ibufs;
> >  boolean user_cbufs;
> >  boolean user_sw_vbufs;
> >  boolean user_sw_cbufs;
> > --
> > 2.9.3
> >
>
>
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Re: [Mesa-dev] [PATCH] st/nine: Drop USER_INDEX_BUFFERS check

[Edward O'Callaghan]

oh yes I missed that, you want to have drop the negation in your patch Mike.

On 02/25/2017 10:28 PM, Mike Lothian wrote:
> I think my question regarding the double negative still stands. Is it
> "!This->cmst_active" ot "This->cmst_active"
> 
> On Sat, 25 Feb 2017 at 11:23 Edward O'Callaghan
> > wrote:
> 
> From: Mike Lothian >
> 
> This fixes 4a883966c1f74f43afc145d2c3d27af7b8c5e01a where the
> PIPE_CAP was removed.
> 
> Now USER_INDEX_BUFFERS are always enabled remove the check and only
> check for cmst_active directly.
> 
> v2: Axel pointed out the code was still needed when cmst was inactive,
> Rebase on master too
> v3: drop struct member user_ibufs also && fixup shortlog (Edward).
> 
> Fixes: 4a883966c1f7 ("gallium: remove PIPE_CAP_USER_INDEX_BUFFERS")
> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=99953
> Reported-and-tested-by: Vinson Lee  > (v1)
> Cc: Marek Olšák >
> Cc: Axel Davy >
> Signed-off-by: Mike Lothian  >
> Signed-off-by: Edward O'Callaghan  >
> ---
>  src/gallium/state_trackers/nine/device9.c | 3 +--
>  src/gallium/state_trackers/nine/device9.h | 1 -
>  2 files changed, 1 insertion(+), 3 deletions(-)
> 
> diff --git a/src/gallium/state_trackers/nine/device9.c
> b/src/gallium/state_trackers/nine/device9.c
> index c3924a2..30ab8de 100644
> --- a/src/gallium/state_trackers/nine/device9.c
> +++ b/src/gallium/state_trackers/nine/device9.c
> @@ -473,7 +473,6 @@ NineDevice9_ctor( struct NineDevice9 *This,
>  /* Allocate upload helper for drivers that suck (from st pov ;). */
> 
>  This->driver_caps.user_vbufs = GET_PCAP(USER_VERTEX_BUFFERS) &&
> !This->csmt_active;
> -This->driver_caps.user_ibufs = GET_PCAP(USER_INDEX_BUFFERS) &&
> !This->csmt_active;
>  This->driver_caps.user_cbufs = GET_PCAP(USER_CONSTANT_BUFFERS);
>  This->driver_caps.user_sw_vbufs =
> This->screen_sw->get_param(This->screen_sw,
> PIPE_CAP_USER_VERTEX_BUFFERS);
>  This->driver_caps.user_sw_cbufs =
> This->screen_sw->get_param(This->screen_sw,
> PIPE_CAP_USER_CONSTANT_BUFFERS);
> @@ -2896,7 +2895,7 @@ NineDevice9_DrawIndexedPrimitiveUP( struct
> NineDevice9 *This,
>  vbuf.buffer_offset -= base;
>  vbuf.user_buffer = NULL;
>  }
> -if (!This->driver_caps.user_ibufs) {
> +if (!This->cmst_active) {
>  u_upload_data(This->context.pipe->stream_uploader,
>0,
>(prim_count_to_vertex_count(PrimitiveType,
> PrimitiveCount)) * ibuf.index_size,
> diff --git a/src/gallium/state_trackers/nine/device9.h
> b/src/gallium/state_trackers/nine/device9.h
> index 71ebbdc..4b1630c 100644
> --- a/src/gallium/state_trackers/nine/device9.h
> +++ b/src/gallium/state_trackers/nine/device9.h
> @@ -127,7 +127,6 @@ struct NineDevice9
> 
>  struct {
>  boolean user_vbufs;
> -boolean user_ibufs;
>  boolean user_cbufs;
>  boolean user_sw_vbufs;
>  boolean user_sw_cbufs;
> --
> 2.9.3
> 



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Re: [Mesa-dev] [PATCH] st/nine: Drop USER_INDEX_BUFFERS check

[Mike Lothian]

I think my question regarding the double negative still stands. Is it
"!This->cmst_active" ot "This->cmst_active"

On Sat, 25 Feb 2017 at 11:23 Edward O'Callaghan 
wrote:

> From: Mike Lothian 
>
> This fixes 4a883966c1f74f43afc145d2c3d27af7b8c5e01a where the
> PIPE_CAP was removed.
>
> Now USER_INDEX_BUFFERS are always enabled remove the check and only
> check for cmst_active directly.
>
> v2: Axel pointed out the code was still needed when cmst was inactive,
> Rebase on master too
> v3: drop struct member user_ibufs also && fixup shortlog (Edward).
>
> Fixes: 4a883966c1f7 ("gallium: remove PIPE_CAP_USER_INDEX_BUFFERS")
> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=99953
> Reported-and-tested-by: Vinson Lee  (v1)
> Cc: Marek Olšák 
> Cc: Axel Davy 
> Signed-off-by: Mike Lothian 
> Signed-off-by: Edward O'Callaghan 
> ---
>  src/gallium/state_trackers/nine/device9.c | 3 +--
>  src/gallium/state_trackers/nine/device9.h | 1 -
>  2 files changed, 1 insertion(+), 3 deletions(-)
>
> diff --git a/src/gallium/state_trackers/nine/device9.c
> b/src/gallium/state_trackers/nine/device9.c
> index c3924a2..30ab8de 100644
> --- a/src/gallium/state_trackers/nine/device9.c
> +++ b/src/gallium/state_trackers/nine/device9.c
> @@ -473,7 +473,6 @@ NineDevice9_ctor( struct NineDevice9 *This,
>  /* Allocate upload helper for drivers that suck (from st pov ;). */
>
>  This->driver_caps.user_vbufs = GET_PCAP(USER_VERTEX_BUFFERS) &&
> !This->csmt_active;
> -This->driver_caps.user_ibufs = GET_PCAP(USER_INDEX_BUFFERS) &&
> !This->csmt_active;
>  This->driver_caps.user_cbufs = GET_PCAP(USER_CONSTANT_BUFFERS);
>  This->driver_caps.user_sw_vbufs =
> This->screen_sw->get_param(This->screen_sw, PIPE_CAP_USER_VERTEX_BUFFERS);
>  This->driver_caps.user_sw_cbufs =
> This->screen_sw->get_param(This->screen_sw, PIPE_CAP_USER_CONSTANT_BUFFERS);
> @@ -2896,7 +2895,7 @@ NineDevice9_DrawIndexedPrimitiveUP( struct
> NineDevice9 *This,
>  vbuf.buffer_offset -= base;
>  vbuf.user_buffer = NULL;
>  }
> -if (!This->driver_caps.user_ibufs) {
> +if (!This->cmst_active) {
>  u_upload_data(This->context.pipe->stream_uploader,
>0,
>(prim_count_to_vertex_count(PrimitiveType,
> PrimitiveCount)) * ibuf.index_size,
> diff --git a/src/gallium/state_trackers/nine/device9.h
> b/src/gallium/state_trackers/nine/device9.h
> index 71ebbdc..4b1630c 100644
> --- a/src/gallium/state_trackers/nine/device9.h
> +++ b/src/gallium/state_trackers/nine/device9.h
> @@ -127,7 +127,6 @@ struct NineDevice9
>
>  struct {
>  boolean user_vbufs;
> -boolean user_ibufs;
>  boolean user_cbufs;
>  boolean user_sw_vbufs;
>  boolean user_sw_cbufs;
> --
> 2.9.3
>
>
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Re: [Mesa-dev] [PATCH] gallium/nine: Fix build regression

[Edward O'Callaghan]

yes sorry disregard this one, I got report this independently.
sorry for the noise.

On 02/25/2017 10:18 PM, Mike Lothian wrote:
> Are we better off just checking for cmst_active now? Since that's all
> we're checking
> 
> On Sat, 25 Feb 2017 at 11:12 Edward O'Callaghan
> > wrote:
> 
> commit 4a88396 dropped 'PIPE_CAP_USER_INDEX_BUFFERS' however
> this case was missed.
> 
> Signed-off-by: Edward O'Callaghan  >
> ---
>  src/gallium/state_trackers/nine/device9.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/src/gallium/state_trackers/nine/device9.c
> b/src/gallium/state_trackers/nine/device9.c
> index c3924a2..8a75859 100644
> --- a/src/gallium/state_trackers/nine/device9.c
> +++ b/src/gallium/state_trackers/nine/device9.c
> @@ -473,7 +473,7 @@ NineDevice9_ctor( struct NineDevice9 *This,
>  /* Allocate upload helper for drivers that suck (from st pov ;). */
> 
>  This->driver_caps.user_vbufs = GET_PCAP(USER_VERTEX_BUFFERS) &&
> !This->csmt_active;
> -This->driver_caps.user_ibufs = GET_PCAP(USER_INDEX_BUFFERS) &&
> !This->csmt_active;
> +This->driver_caps.user_ibufs = !This->csmt_active;
>  This->driver_caps.user_cbufs = GET_PCAP(USER_CONSTANT_BUFFERS);
>  This->driver_caps.user_sw_vbufs =
> This->screen_sw->get_param(This->screen_sw,
> PIPE_CAP_USER_VERTEX_BUFFERS);
>  This->driver_caps.user_sw_cbufs =
> This->screen_sw->get_param(This->screen_sw,
> PIPE_CAP_USER_CONSTANT_BUFFERS);
> --
> 2.9.3
> 
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[Mesa-dev] [PATCH] st/nine: Drop USER_INDEX_BUFFERS check

[Edward O'Callaghan]

From: Mike Lothian 

This fixes 4a883966c1f74f43afc145d2c3d27af7b8c5e01a where the
PIPE_CAP was removed.

Now USER_INDEX_BUFFERS are always enabled remove the check and only
check for cmst_active directly.

v2: Axel pointed out the code was still needed when cmst was inactive,
Rebase on master too
v3: drop struct member user_ibufs also && fixup shortlog (Edward).

Fixes: 4a883966c1f7 ("gallium: remove PIPE_CAP_USER_INDEX_BUFFERS")
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=99953
Reported-and-tested-by: Vinson Lee  (v1)
Cc: Marek Olšák 
Cc: Axel Davy 
Signed-off-by: Mike Lothian 
Signed-off-by: Edward O'Callaghan 
---
 src/gallium/state_trackers/nine/device9.c | 3 +--
 src/gallium/state_trackers/nine/device9.h | 1 -
 2 files changed, 1 insertion(+), 3 deletions(-)

diff --git a/src/gallium/state_trackers/nine/device9.c 
b/src/gallium/state_trackers/nine/device9.c
index c3924a2..30ab8de 100644
--- a/src/gallium/state_trackers/nine/device9.c
+++ b/src/gallium/state_trackers/nine/device9.c
@@ -473,7 +473,6 @@ NineDevice9_ctor( struct NineDevice9 *This,
 /* Allocate upload helper for drivers that suck (from st pov ;). */
 
 This->driver_caps.user_vbufs = GET_PCAP(USER_VERTEX_BUFFERS) && 
!This->csmt_active;
-This->driver_caps.user_ibufs = GET_PCAP(USER_INDEX_BUFFERS) && 
!This->csmt_active;
 This->driver_caps.user_cbufs = GET_PCAP(USER_CONSTANT_BUFFERS);
 This->driver_caps.user_sw_vbufs = 
This->screen_sw->get_param(This->screen_sw, PIPE_CAP_USER_VERTEX_BUFFERS);
 This->driver_caps.user_sw_cbufs = 
This->screen_sw->get_param(This->screen_sw, PIPE_CAP_USER_CONSTANT_BUFFERS);
@@ -2896,7 +2895,7 @@ NineDevice9_DrawIndexedPrimitiveUP( struct NineDevice9 
*This,
 vbuf.buffer_offset -= base;
 vbuf.user_buffer = NULL;
 }
-if (!This->driver_caps.user_ibufs) {
+if (!This->cmst_active) {
 u_upload_data(This->context.pipe->stream_uploader,
   0,
   (prim_count_to_vertex_count(PrimitiveType, 
PrimitiveCount)) * ibuf.index_size,
diff --git a/src/gallium/state_trackers/nine/device9.h 
b/src/gallium/state_trackers/nine/device9.h
index 71ebbdc..4b1630c 100644
--- a/src/gallium/state_trackers/nine/device9.h
+++ b/src/gallium/state_trackers/nine/device9.h
@@ -127,7 +127,6 @@ struct NineDevice9
 
 struct {
 boolean user_vbufs;
-boolean user_ibufs;
 boolean user_cbufs;
 boolean user_sw_vbufs;
 boolean user_sw_cbufs;
-- 
2.9.3

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Re: [Mesa-dev] [PATCH] gallium/nine: Fix build regression

[Mike Lothian]

Are we better off just checking for cmst_active now? Since that's all we're
checking

On Sat, 25 Feb 2017 at 11:12 Edward O'Callaghan 
wrote:

> commit 4a88396 dropped 'PIPE_CAP_USER_INDEX_BUFFERS' however
> this case was missed.
>
> Signed-off-by: Edward O'Callaghan 
> ---
>  src/gallium/state_trackers/nine/device9.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/src/gallium/state_trackers/nine/device9.c
> b/src/gallium/state_trackers/nine/device9.c
> index c3924a2..8a75859 100644
> --- a/src/gallium/state_trackers/nine/device9.c
> +++ b/src/gallium/state_trackers/nine/device9.c
> @@ -473,7 +473,7 @@ NineDevice9_ctor( struct NineDevice9 *This,
>  /* Allocate upload helper for drivers that suck (from st pov ;). */
>
>  This->driver_caps.user_vbufs = GET_PCAP(USER_VERTEX_BUFFERS) &&
> !This->csmt_active;
> -This->driver_caps.user_ibufs = GET_PCAP(USER_INDEX_BUFFERS) &&
> !This->csmt_active;
> +This->driver_caps.user_ibufs = !This->csmt_active;
>  This->driver_caps.user_cbufs = GET_PCAP(USER_CONSTANT_BUFFERS);
>  This->driver_caps.user_sw_vbufs =
> This->screen_sw->get_param(This->screen_sw, PIPE_CAP_USER_VERTEX_BUFFERS);
>  This->driver_caps.user_sw_cbufs =
> This->screen_sw->get_param(This->screen_sw, PIPE_CAP_USER_CONSTANT_BUFFERS);
> --
> 2.9.3
>
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[Mesa-dev] [PATCH] glsl: remove unecessary flags.q.subroutine_def

[Samuel Pitoiset]

This bit is definitely not necessary because subroutine_list
can be used instead. This frees one more bit in the flags.q
struct which is nice because arb_bindless_texture will need
4 bits for the new layout qualifiers.

No piglit regressions found (including compiler tests) with
"-t subroutine".

Signed-off-by: Samuel Pitoiset 
---
 src/compiler/glsl/ast.h  | 1 -
 src/compiler/glsl/ast_to_hir.cpp | 6 +++---
 src/compiler/glsl/ast_type.cpp   | 6 ++
 src/compiler/glsl/glsl_parser.yy | 1 -
 src/compiler/glsl/glsl_parser_extras.cpp | 2 +-
 5 files changed, 6 insertions(+), 10 deletions(-)

diff --git a/src/compiler/glsl/ast.h b/src/compiler/glsl/ast.h
index 11a092e41c..d27b940744 100644
--- a/src/compiler/glsl/ast.h
+++ b/src/compiler/glsl/ast.h
@@ -607,7 +607,6 @@ struct ast_type_qualifier {
  /** \name Qualifiers for GL_ARB_shader_subroutine */
 /** \{ */
  unsigned subroutine:1;  /**< Is this marked 'subroutine' */
- unsigned subroutine_def:1; /**< Is this marked 'subroutine' with a 
list of types */
 /** \} */
 
  /** \name Qualifiers for GL_KHR_blend_equation_advanced */
diff --git a/src/compiler/glsl/ast_to_hir.cpp b/src/compiler/glsl/ast_to_hir.cpp
index f033d7df97..7e99faeaed 100644
--- a/src/compiler/glsl/ast_to_hir.cpp
+++ b/src/compiler/glsl/ast_to_hir.cpp
@@ -3510,7 +3510,7 @@ apply_layout_qualifier_to_variable(const struct 
ast_type_qualifier *qual,
  }
   }
} else if (qual->flags.q.explicit_index) {
-  if (!qual->flags.q.subroutine_def)
+  if (!qual->subroutine_list)
  _mesa_glsl_error(loc, state,
   "explicit index requires explicit location");
} else if (qual->flags.q.explicit_component) {
@@ -5568,7 +5568,7 @@ ast_function::hir(exec_list *instructions,
 *  "Subroutine declarations cannot be prototyped. It is an error to prepend
 *   subroutine(...) to a function declaration."
 */
-   if (this->return_type->qualifier.flags.q.subroutine_def && !is_definition) {
+   if (this->return_type->qualifier.subroutine_list && !is_definition) {
   YYLTYPE loc = this->get_location();
   _mesa_glsl_error(, state,
"function declaration `%s' cannot have subroutine 
prepended",
@@ -5716,7 +5716,7 @@ ast_function::hir(exec_list *instructions,
sig->replace_parameters(_parameters);
signature = sig;
 
-   if (this->return_type->qualifier.flags.q.subroutine_def) {
+   if (this->return_type->qualifier.subroutine_list) {
   int idx;
 
   if (this->return_type->qualifier.flags.q.explicit_index) {
diff --git a/src/compiler/glsl/ast_type.cpp b/src/compiler/glsl/ast_type.cpp
index 96d20c10af..5f868a81f2 100644
--- a/src/compiler/glsl/ast_type.cpp
+++ b/src/compiler/glsl/ast_type.cpp
@@ -44,7 +44,6 @@ 
ast_fully_specified_type::has_qualifiers(_mesa_glsl_parse_state *state) const
ast_type_qualifier subroutine_only;
subroutine_only.flags.i = 0;
subroutine_only.flags.q.subroutine = 1;
-   subroutine_only.flags.q.subroutine_def = 1;
if (state->has_explicit_uniform_location()) {
   subroutine_only.flags.q.explicit_index = 1;
}
@@ -285,8 +284,8 @@ ast_type_qualifier::merge_qualifier(YYLTYPE *loc,
   }
}
 
-   if (q.flags.q.subroutine_def) {
-  if (this->flags.q.subroutine_def) {
+   if (q.subroutine_list) {
+  if (this->subroutine_list) {
  _mesa_glsl_error(loc, state,
   "conflicting subroutine qualifiers used");
   } else {
@@ -772,7 +771,6 @@ ast_type_qualifier::validate_flags(YYLTYPE *loc,
 bad.flags.q.point_mode ? " point_mode" : "",
 bad.flags.q.vertices ? " vertices" : "",
 bad.flags.q.subroutine ? " subroutine" : "",
-bad.flags.q.subroutine_def ? " subroutine_def" : "",
 bad.flags.q.blend_support ? " blend_support" : "",
 bad.flags.q.inner_coverage ? " inner_coverage" : "",
 bad.flags.q.post_depth_coverage ? " post_depth_coverage" : 
"");
diff --git a/src/compiler/glsl/glsl_parser.yy b/src/compiler/glsl/glsl_parser.yy
index d703f8..b79fcee550 100644
--- a/src/compiler/glsl/glsl_parser.yy
+++ b/src/compiler/glsl/glsl_parser.yy
@@ -1812,7 +1812,6 @@ subroutine_qualifier:
| SUBROUTINE '(' subroutine_type_list ')'
{
   memset(& $$, 0, sizeof($$));
-  $$.flags.q.subroutine_def = 1;
   $$.subroutine_list = $3;
}
;
diff --git a/src/compiler/glsl/glsl_parser_extras.cpp 
b/src/compiler/glsl/glsl_parser_extras.cpp
index 375a99a49d..e88dd071b3 100644
--- a/src/compiler/glsl/glsl_parser_extras.cpp
+++ b/src/compiler/glsl/glsl_parser_extras.cpp
@@ -1075,7 +1075,7 @@ _mesa_ast_type_qualifier_print(const struct 
ast_type_qualifier *q)
if (q->flags.q.subroutine)
   printf("subroutine ");
 
-   if (q->flags.q.subroutine_def) {
+   if 

[Mesa-dev] [PATCH] gallium/nine: Fix build regression

[Edward O'Callaghan]

commit 4a88396 dropped 'PIPE_CAP_USER_INDEX_BUFFERS' however
this case was missed.

Signed-off-by: Edward O'Callaghan 
---
 src/gallium/state_trackers/nine/device9.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/gallium/state_trackers/nine/device9.c 
b/src/gallium/state_trackers/nine/device9.c
index c3924a2..8a75859 100644
--- a/src/gallium/state_trackers/nine/device9.c
+++ b/src/gallium/state_trackers/nine/device9.c
@@ -473,7 +473,7 @@ NineDevice9_ctor( struct NineDevice9 *This,
 /* Allocate upload helper for drivers that suck (from st pov ;). */
 
 This->driver_caps.user_vbufs = GET_PCAP(USER_VERTEX_BUFFERS) && 
!This->csmt_active;
-This->driver_caps.user_ibufs = GET_PCAP(USER_INDEX_BUFFERS) && 
!This->csmt_active;
+This->driver_caps.user_ibufs = !This->csmt_active;
 This->driver_caps.user_cbufs = GET_PCAP(USER_CONSTANT_BUFFERS);
 This->driver_caps.user_sw_vbufs = 
This->screen_sw->get_param(This->screen_sw, PIPE_CAP_USER_VERTEX_BUFFERS);
 This->driver_caps.user_sw_cbufs = 
This->screen_sw->get_param(This->screen_sw, PIPE_CAP_USER_CONSTANT_BUFFERS);
-- 
2.9.3

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[Mesa-dev] [Bug 99319] godot engine poor performance

[bugzilla-daemon]

https://bugs.freedesktop.org/show_bug.cgi?id=99319

--- Comment #7 from Bas Nieuwenhuizen  ---
I think this is actually fixed in Mesa git. I get 60 fps for the platformer
demo now.

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Re: [Mesa-dev] [PATCH v2] st/nine: Remove check for USER_INDEX_BUFFERS use csmt_active instead

[Mike Lothian]

There's too many negatives, not sure if this should really be "if
(This->cmst_active) {" or not

On Sat, 25 Feb 2017 at 10:42 Mike Lothian  wrote:

> This fixes 4a883966c1f74f43afc145d2c3d27af7b8c5e01a where the pipe cap
> was removed
>
> Now USER_INDEX_BUFFERS are always enabled remove the check and only
> check for cmst_active
>
> v2: Axel pointed out the code was still needed when cmst was inactive,
> Rebase on master too
>
> Fixes: 4a883966c1f7 ("gallium: remove PIPE_CAP_USER_INDEX_BUFFERS")
> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=99953
> Reported-and-tested-by: Vinson Lee  (v1)
> Cc: Marek Olšák 
> Cc: Axel Davy 
> Signed-off-by: Mike Lothian 
> ---
>  src/gallium/state_trackers/nine/device9.c | 3 +--
>  1 file changed, 1 insertion(+), 2 deletions(-)
>
> diff --git a/src/gallium/state_trackers/nine/device9.c
> b/src/gallium/state_trackers/nine/device9.c
> index c3924a21e2..30ab8deed7 100644
> --- a/src/gallium/state_trackers/nine/device9.c
> +++ b/src/gallium/state_trackers/nine/device9.c
> @@ -473,7 +473,6 @@ NineDevice9_ctor( struct NineDevice9 *This,
>  /* Allocate upload helper for drivers that suck (from st pov ;). */
>
>  This->driver_caps.user_vbufs = GET_PCAP(USER_VERTEX_BUFFERS) &&
> !This->csmt_active;
> -This->driver_caps.user_ibufs = GET_PCAP(USER_INDEX_BUFFERS) &&
> !This->csmt_active;
>  This->driver_caps.user_cbufs = GET_PCAP(USER_CONSTANT_BUFFERS);
>  This->driver_caps.user_sw_vbufs =
> This->screen_sw->get_param(This->screen_sw, PIPE_CAP_USER_VERTEX_BUFFERS);
>  This->driver_caps.user_sw_cbufs =
> This->screen_sw->get_param(This->screen_sw, PIPE_CAP_USER_CONSTANT_BUFFERS);
> @@ -2896,7 +2895,7 @@ NineDevice9_DrawIndexedPrimitiveUP( struct
> NineDevice9 *This,
>  vbuf.buffer_offset -= base;
>  vbuf.user_buffer = NULL;
>  }
> -if (!This->driver_caps.user_ibufs) {
> +if (!This->cmst_active) {
>  u_upload_data(This->context.pipe->stream_uploader,
>0,
>(prim_count_to_vertex_count(PrimitiveType,
> PrimitiveCount)) * ibuf.index_size,
> --
> 2.11.1
>
>
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[Mesa-dev] [PATCH v2] st/nine: Remove check for USER_INDEX_BUFFERS use csmt_active instead

[Mike Lothian]

This fixes 4a883966c1f74f43afc145d2c3d27af7b8c5e01a where the pipe cap
was removed

Now USER_INDEX_BUFFERS are always enabled remove the check and only
check for cmst_active

v2: Axel pointed out the code was still needed when cmst was inactive,
Rebase on master too

Fixes: 4a883966c1f7 ("gallium: remove PIPE_CAP_USER_INDEX_BUFFERS")
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=99953
Reported-and-tested-by: Vinson Lee  (v1)
Cc: Marek Olšák 
Cc: Axel Davy 
Signed-off-by: Mike Lothian 
---
 src/gallium/state_trackers/nine/device9.c | 3 +--
 1 file changed, 1 insertion(+), 2 deletions(-)

diff --git a/src/gallium/state_trackers/nine/device9.c 
b/src/gallium/state_trackers/nine/device9.c
index c3924a21e2..30ab8deed7 100644
--- a/src/gallium/state_trackers/nine/device9.c
+++ b/src/gallium/state_trackers/nine/device9.c
@@ -473,7 +473,6 @@ NineDevice9_ctor( struct NineDevice9 *This,
 /* Allocate upload helper for drivers that suck (from st pov ;). */
 
 This->driver_caps.user_vbufs = GET_PCAP(USER_VERTEX_BUFFERS) && 
!This->csmt_active;
-This->driver_caps.user_ibufs = GET_PCAP(USER_INDEX_BUFFERS) && 
!This->csmt_active;
 This->driver_caps.user_cbufs = GET_PCAP(USER_CONSTANT_BUFFERS);
 This->driver_caps.user_sw_vbufs = 
This->screen_sw->get_param(This->screen_sw, PIPE_CAP_USER_VERTEX_BUFFERS);
 This->driver_caps.user_sw_cbufs = 
This->screen_sw->get_param(This->screen_sw, PIPE_CAP_USER_CONSTANT_BUFFERS);
@@ -2896,7 +2895,7 @@ NineDevice9_DrawIndexedPrimitiveUP( struct NineDevice9 
*This,
 vbuf.buffer_offset -= base;
 vbuf.user_buffer = NULL;
 }
-if (!This->driver_caps.user_ibufs) {
+if (!This->cmst_active) {
 u_upload_data(This->context.pipe->stream_uploader,
   0,
   (prim_count_to_vertex_count(PrimitiveType, 
PrimitiveCount)) * ibuf.index_size,
-- 
2.11.1

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Re: [Mesa-dev] [PATCH] st/nine: Remove code for no USER_INDEX_BUFFERS as these are always on

[Mike Lothian]

Ah that's what I did first, but figured it was probably in accurate naming
after that

On Sat, 25 Feb 2017 at 08:21 Axel Davy  wrote:

> Hi Mike,
>
> We really want not to use user index buffers when csmt is active (thus
> the !This->csmt_active).
> This should be a one line patch to just remove the part
> GET_PCAP(USER_INDEX_BUFFERS)
>
> Yours,
>
> Axel Davy
>
> On 25/02/2017 06:23, Mike Lothian wrote:
> > This fixes 4a883966c1f74f43afc145d2c3d27af7b8c5e01a where the pipe cap
> > was removed
> >
> > Now USER_INDEX_BUFFERS are always enabled remove code that checks for
> > them and works around them not being available
> >
> > Signed-off-by: Mike Lothian 
> > Cc: Marek Olšák 
> > Cc: Axel Davy 
> > ---
> >   src/gallium/state_trackers/nine/device9.c | 17 -
> >   1 file changed, 17 deletions(-)
> >
> > diff --git a/src/gallium/state_trackers/nine/device9.c
> b/src/gallium/state_trackers/nine/device9.c
> > index b9b7a637d7..2217cc9d0c 100644
> > --- a/src/gallium/state_trackers/nine/device9.c
> > +++ b/src/gallium/state_trackers/nine/device9.c
> > @@ -473,7 +473,6 @@ NineDevice9_ctor( struct NineDevice9 *This,
> >   /* Allocate upload helper for drivers that suck (from st pov ;). */
> >
> >   This->driver_caps.user_vbufs = GET_PCAP(USER_VERTEX_BUFFERS) &&
> !This->csmt_active;
> > -This->driver_caps.user_ibufs = GET_PCAP(USER_INDEX_BUFFERS) &&
> !This->csmt_active;
> >   This->driver_caps.user_cbufs = GET_PCAP(USER_CONSTANT_BUFFERS);
> >   This->driver_caps.user_sw_vbufs =
> This->screen_sw->get_param(This->screen_sw, PIPE_CAP_USER_VERTEX_BUFFERS);
> >   This->driver_caps.user_sw_cbufs =
> This->screen_sw->get_param(This->screen_sw, PIPE_CAP_USER_CONSTANT_BUFFERS);
> > @@ -488,11 +487,6 @@ NineDevice9_ctor( struct NineDevice9 *This,
> >
>  PIPE_BIND_VERTEX_BUFFER, PIPE_USAGE_STREAM);
> >   This->vertex_sw_uploader = u_upload_create(This->pipe_sw, 65536,
> >   PIPE_BIND_VERTEX_BUFFER,
> PIPE_USAGE_STREAM);
> > -if (!This->driver_caps.user_ibufs)
> > -This->index_uploader = u_upload_create(This->csmt_active ?
> > -
> This->pipe_secondary : This->context.pipe,
> > -   128 * 1024,
> > -   PIPE_BIND_INDEX_BUFFER,
> PIPE_USAGE_STREAM);
> >   if (!This->driver_caps.user_cbufs) {
> >   This->constbuf_alignment =
> GET_PCAP(CONSTANT_BUFFER_OFFSET_ALIGNMENT);
> >   This->constbuf_uploader = u_upload_create(This->context.pipe,
> This->vs_const_size,
> > @@ -2928,17 +2922,6 @@ NineDevice9_DrawIndexedPrimitiveUP( struct
> NineDevice9 *This,
> >   vbuf.buffer_offset -= base;
> >   vbuf.user_buffer = NULL;
> >   }
> > -if (!This->driver_caps.user_ibufs) {
> > -u_upload_data(This->index_uploader,
> > -  0,
> > -  (prim_count_to_vertex_count(PrimitiveType,
> PrimitiveCount)) * ibuf.index_size,
> > -  4,
> > -  ibuf.user_buffer,
> > -  ,
> > -  );
> > -u_upload_unmap(This->index_uploader);
> > -ibuf.user_buffer = NULL;
> > -}
> >
> >   NineBeforeDraw(This);
> >   nine_context_draw_indexed_primitive_from_vtxbuf_idxbuf(This,
> PrimitiveType,
>
>
>
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Re: [Mesa-dev] [PATCH] st/nine: Remove code for no USER_INDEX_BUFFERS as these are always on

[Axel Davy]

Hi Mike,

We really want not to use user index buffers when csmt is active (thus 
the !This->csmt_active).
This should be a one line patch to just remove the part 
GET_PCAP(USER_INDEX_BUFFERS)


Yours,

Axel Davy

On 25/02/2017 06:23, Mike Lothian wrote:

This fixes 4a883966c1f74f43afc145d2c3d27af7b8c5e01a where the pipe cap
was removed

Now USER_INDEX_BUFFERS are always enabled remove code that checks for
them and works around them not being available

Signed-off-by: Mike Lothian 
Cc: Marek Olšák 
Cc: Axel Davy 
---
  src/gallium/state_trackers/nine/device9.c | 17 -
  1 file changed, 17 deletions(-)

diff --git a/src/gallium/state_trackers/nine/device9.c 
b/src/gallium/state_trackers/nine/device9.c
index b9b7a637d7..2217cc9d0c 100644
--- a/src/gallium/state_trackers/nine/device9.c
+++ b/src/gallium/state_trackers/nine/device9.c
@@ -473,7 +473,6 @@ NineDevice9_ctor( struct NineDevice9 *This,
  /* Allocate upload helper for drivers that suck (from st pov ;). */
  
  This->driver_caps.user_vbufs = GET_PCAP(USER_VERTEX_BUFFERS) && !This->csmt_active;

-This->driver_caps.user_ibufs = GET_PCAP(USER_INDEX_BUFFERS) && 
!This->csmt_active;
  This->driver_caps.user_cbufs = GET_PCAP(USER_CONSTANT_BUFFERS);
  This->driver_caps.user_sw_vbufs = 
This->screen_sw->get_param(This->screen_sw, PIPE_CAP_USER_VERTEX_BUFFERS);
  This->driver_caps.user_sw_cbufs = 
This->screen_sw->get_param(This->screen_sw, PIPE_CAP_USER_CONSTANT_BUFFERS);
@@ -488,11 +487,6 @@ NineDevice9_ctor( struct NineDevice9 *This,
  PIPE_BIND_VERTEX_BUFFER, 
PIPE_USAGE_STREAM);
  This->vertex_sw_uploader = u_upload_create(This->pipe_sw, 65536,
  PIPE_BIND_VERTEX_BUFFER, 
PIPE_USAGE_STREAM);
-if (!This->driver_caps.user_ibufs)
-This->index_uploader = u_upload_create(This->csmt_active ?
-This->pipe_secondary : 
This->context.pipe,
-   128 * 1024,
-   PIPE_BIND_INDEX_BUFFER, 
PIPE_USAGE_STREAM);
  if (!This->driver_caps.user_cbufs) {
  This->constbuf_alignment = GET_PCAP(CONSTANT_BUFFER_OFFSET_ALIGNMENT);
  This->constbuf_uploader = u_upload_create(This->context.pipe, 
This->vs_const_size,
@@ -2928,17 +2922,6 @@ NineDevice9_DrawIndexedPrimitiveUP( struct NineDevice9 
*This,
  vbuf.buffer_offset -= base;
  vbuf.user_buffer = NULL;
  }
-if (!This->driver_caps.user_ibufs) {
-u_upload_data(This->index_uploader,
-  0,
-  (prim_count_to_vertex_count(PrimitiveType, 
PrimitiveCount)) * ibuf.index_size,
-  4,
-  ibuf.user_buffer,
-  ,
-  );
-u_upload_unmap(This->index_uploader);
-ibuf.user_buffer = NULL;
-}
  
  NineBeforeDraw(This);

  nine_context_draw_indexed_primitive_from_vtxbuf_idxbuf(This, 
PrimitiveType,



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