Re: [Mesa-dev] [PATCH] i965: Upload atomic buffer state for compute shaders
On Friday, April 24, 2015 04:35:46 PM Jordan Justen wrote:
Signed-off-by: Jordan Justen jordan.l.jus...@intel.com
---
git://people.freedesktop.org/~jljusten/mesa i965-cs-atomic-counters-v1
src/mesa/drivers/dri/i965/brw_context.h | 2 +-
src/mesa/drivers/dri/i965/brw_state.h| 1 +
src/mesa/drivers/dri/i965/brw_state_upload.c | 2 ++
src/mesa/drivers/dri/i965/brw_wm_surface_state.c | 25
4 files changed, 29 insertions(+), 1 deletion(-)
diff --git a/src/mesa/drivers/dri/i965/brw_context.h
b/src/mesa/drivers/dri/i965/brw_context.h
index e679d2b..48e8076 100644
--- a/src/mesa/drivers/dri/i965/brw_context.h
+++ b/src/mesa/drivers/dri/i965/brw_context.h
@@ -1437,7 +1437,7 @@ struct brw_context
int num_atoms[BRW_NUM_PIPELINES];
const struct brw_tracked_state render_atoms[57];
- const struct brw_tracked_state compute_atoms[2];
+ const struct brw_tracked_state compute_atoms[3];
/* If (INTEL_DEBUG DEBUG_BATCH) */
struct {
diff --git a/src/mesa/drivers/dri/i965/brw_state.h
b/src/mesa/drivers/dri/i965/brw_state.h
index 4b3184c..7e2c74b 100644
--- a/src/mesa/drivers/dri/i965/brw_state.h
+++ b/src/mesa/drivers/dri/i965/brw_state.h
@@ -84,6 +84,7 @@ extern const struct brw_tracked_state brw_gs_binding_table;
extern const struct brw_tracked_state brw_vs_binding_table;
extern const struct brw_tracked_state brw_wm_ubo_surfaces;
extern const struct brw_tracked_state brw_wm_abo_surfaces;
+extern const struct brw_tracked_state brw_cs_abo_surfaces;
extern const struct brw_tracked_state brw_wm_unit;
extern const struct brw_tracked_state brw_interpolation_map;
diff --git a/src/mesa/drivers/dri/i965/brw_state_upload.c
b/src/mesa/drivers/dri/i965/brw_state_upload.c
index 686a3da..84b0861 100644
--- a/src/mesa/drivers/dri/i965/brw_state_upload.c
+++ b/src/mesa/drivers/dri/i965/brw_state_upload.c
@@ -250,6 +250,7 @@ static const struct brw_tracked_state
*gen7_render_atoms[] =
static const struct brw_tracked_state *gen7_compute_atoms[] =
{
brw_state_base_address,
+ brw_cs_abo_surfaces,
brw_cs_state,
};
@@ -332,6 +333,7 @@ static const struct brw_tracked_state
*gen8_render_atoms[] =
static const struct brw_tracked_state *gen8_compute_atoms[] =
{
gen8_state_base_address,
+ brw_cs_abo_surfaces,
brw_cs_state,
};
diff --git a/src/mesa/drivers/dri/i965/brw_wm_surface_state.c
b/src/mesa/drivers/dri/i965/brw_wm_surface_state.c
index 161d140..62b606c 100644
--- a/src/mesa/drivers/dri/i965/brw_wm_surface_state.c
+++ b/src/mesa/drivers/dri/i965/brw_wm_surface_state.c
@@ -986,6 +986,31 @@ const struct brw_tracked_state brw_wm_abo_surfaces = {
.emit = brw_upload_wm_abo_surfaces,
};
+static void
+brw_upload_cs_abo_surfaces(struct brw_context *brw)
+{
+ struct gl_context *ctx = brw-ctx;
+ /* _NEW_PROGRAM */
+ struct gl_shader_program *prog =
+ ctx-_Shader-CurrentProgram[MESA_SHADER_COMPUTE];
+
+ if (prog) {
+ /* CACHE_NEW_WM_PROG */
I think you mean:
/* BRW_NEW_CS_PROG_DATA */
+ brw_upload_abo_surfaces(brw, prog, brw-cs.base,
+ brw-cs.prog_data-base);
+ }
+}
+
+const struct brw_tracked_state brw_cs_abo_surfaces = {
+ .dirty = {
+ .mesa = _NEW_PROGRAM,
+ .brw = BRW_NEW_COMPUTE_PROGRAM |
I don't see BRW_NEW_COMPUTE_PROGRAM used here (it uses _NEW_PROGRAM
instead) - I think you want BRW_NEW_CS_PROG_DATA here.
+ BRW_NEW_BATCH |
+ BRW_NEW_ATOMIC_BUFFER,
These should be alphabetized. With those fixed, this is:
Reviewed-by: Kenneth Graunke kenn...@whitecape.org
+ },
+ .emit = brw_upload_cs_abo_surfaces,
+};
+
void
gen4_init_vtable_surface_functions(struct brw_context *brw)
{
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[Mesa-dev] [PATCH] i965: Upload atomic buffer state for compute shaders
Signed-off-by: Jordan Justen jordan.l.jus...@intel.com
---
git://people.freedesktop.org/~jljusten/mesa i965-cs-atomic-counters-v1
src/mesa/drivers/dri/i965/brw_context.h | 2 +-
src/mesa/drivers/dri/i965/brw_state.h| 1 +
src/mesa/drivers/dri/i965/brw_state_upload.c | 2 ++
src/mesa/drivers/dri/i965/brw_wm_surface_state.c | 25
4 files changed, 29 insertions(+), 1 deletion(-)
diff --git a/src/mesa/drivers/dri/i965/brw_context.h
b/src/mesa/drivers/dri/i965/brw_context.h
index e679d2b..48e8076 100644
--- a/src/mesa/drivers/dri/i965/brw_context.h
+++ b/src/mesa/drivers/dri/i965/brw_context.h
@@ -1437,7 +1437,7 @@ struct brw_context
int num_atoms[BRW_NUM_PIPELINES];
const struct brw_tracked_state render_atoms[57];
- const struct brw_tracked_state compute_atoms[2];
+ const struct brw_tracked_state compute_atoms[3];
/* If (INTEL_DEBUG DEBUG_BATCH) */
struct {
diff --git a/src/mesa/drivers/dri/i965/brw_state.h
b/src/mesa/drivers/dri/i965/brw_state.h
index 4b3184c..7e2c74b 100644
--- a/src/mesa/drivers/dri/i965/brw_state.h
+++ b/src/mesa/drivers/dri/i965/brw_state.h
@@ -84,6 +84,7 @@ extern const struct brw_tracked_state brw_gs_binding_table;
extern const struct brw_tracked_state brw_vs_binding_table;
extern const struct brw_tracked_state brw_wm_ubo_surfaces;
extern const struct brw_tracked_state brw_wm_abo_surfaces;
+extern const struct brw_tracked_state brw_cs_abo_surfaces;
extern const struct brw_tracked_state brw_wm_unit;
extern const struct brw_tracked_state brw_interpolation_map;
diff --git a/src/mesa/drivers/dri/i965/brw_state_upload.c
b/src/mesa/drivers/dri/i965/brw_state_upload.c
index 686a3da..84b0861 100644
--- a/src/mesa/drivers/dri/i965/brw_state_upload.c
+++ b/src/mesa/drivers/dri/i965/brw_state_upload.c
@@ -250,6 +250,7 @@ static const struct brw_tracked_state *gen7_render_atoms[] =
static const struct brw_tracked_state *gen7_compute_atoms[] =
{
brw_state_base_address,
+ brw_cs_abo_surfaces,
brw_cs_state,
};
@@ -332,6 +333,7 @@ static const struct brw_tracked_state *gen8_render_atoms[] =
static const struct brw_tracked_state *gen8_compute_atoms[] =
{
gen8_state_base_address,
+ brw_cs_abo_surfaces,
brw_cs_state,
};
diff --git a/src/mesa/drivers/dri/i965/brw_wm_surface_state.c
b/src/mesa/drivers/dri/i965/brw_wm_surface_state.c
index 161d140..62b606c 100644
--- a/src/mesa/drivers/dri/i965/brw_wm_surface_state.c
+++ b/src/mesa/drivers/dri/i965/brw_wm_surface_state.c
@@ -986,6 +986,31 @@ const struct brw_tracked_state brw_wm_abo_surfaces = {
.emit = brw_upload_wm_abo_surfaces,
};
+static void
+brw_upload_cs_abo_surfaces(struct brw_context *brw)
+{
+ struct gl_context *ctx = brw-ctx;
+ /* _NEW_PROGRAM */
+ struct gl_shader_program *prog =
+ ctx-_Shader-CurrentProgram[MESA_SHADER_COMPUTE];
+
+ if (prog) {
+ /* CACHE_NEW_WM_PROG */
+ brw_upload_abo_surfaces(brw, prog, brw-cs.base,
+ brw-cs.prog_data-base);
+ }
+}
+
+const struct brw_tracked_state brw_cs_abo_surfaces = {
+ .dirty = {
+ .mesa = _NEW_PROGRAM,
+ .brw = BRW_NEW_COMPUTE_PROGRAM |
+ BRW_NEW_BATCH |
+ BRW_NEW_ATOMIC_BUFFER,
+ },
+ .emit = brw_upload_cs_abo_surfaces,
+};
+
void
gen4_init_vtable_surface_functions(struct brw_context *brw)
{
--
2.1.4
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