Re: [Mesa-dev] [PATCH] radeon/vcn: enable rate control for hevc encoding

2019-12-16 Thread Michel Dänzer 
On 2019-12-13 11:01 p.m., Alex Deucher wrote:
> 
> Merging a branch:
> 1*) Check that all CI pipelines have succeeded.
> 2) Rebase your local branch and force-push to your private branch.
> 3) Wait for the CI to complete
> 4) Push the merge button

This is already obsolete again. :) In order to merge an MR, reassign it
to "Marge Bot" (@marge-bot). Marge will take care of rebasing and
merging the MR once the CI pipeline has passed.


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Libre software enthusiast | Mesa and X developer
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Re: [Mesa-dev] [PATCH] radeon/vcn: enable rate control for hevc encoding

2019-12-13 Thread Alex Deucher 
The mesa process has switched to using merge requests.

The steps for creating a MR are:
1*) Click "fork" in the Meso repo to create a private repo where
you'll push branches for MRs.
2) git push your branch into your private repo
3) The "git push" command printed a link to create a MR for that
branch. Open it.
4*) Add labels, then click "Allow commits from members who can merge
to the target branch" and click Submit.

Merging a branch:
1*) Check that all CI pipelines have succeeded.
2) Rebase your local branch and force-push to your private branch.
3) Wait for the CI to complete
4) Push the merge button


On Fri, Dec 13, 2019 at 4:43 PM Zhang, Boyuan  wrote:
>
> Port changes from radeon_vcn_enc_1_2.c to radeon_vcn_enc_2_0.c
>
>
>
> Set cu_qp_delta_enable_flag on when rate control is enabled, and set it
>
> off when rate control is disabled (e.g. constant qp).
>
>
>
> Signed-off-by: Boyuan Zhang 
>
> ---
>
>  src/gallium/drivers/radeon/radeon_vcn_enc_2_0.c | 8 +++-
>
>  1 file changed, 7 insertions(+), 1 deletion(-)
>
>
>
> diff --git a/src/gallium/drivers/radeon/radeon_vcn_enc_2_0.c 
> b/src/gallium/drivers/radeon/radeon_vcn_enc_2_0.c
>
> index d2c6378a055..580a084a1c1 100644
>
> --- a/src/gallium/drivers/radeon/radeon_vcn_enc_2_0.c
>
> +++ b/src/gallium/drivers/radeon/radeon_vcn_enc_2_0.c
>
> @@ -196,7 +196,13 @@ static void radeon_enc_nalu_pps_hevc(struct 
> radeon_encoder *enc)
>
>   radeon_enc_code_se(enc, 0x0);
>
>   radeon_enc_code_fixed_bits(enc, 
> enc->enc_pic.hevc_spec_misc.constrained_intra_pred_flag, 1);
>
>   radeon_enc_code_fixed_bits(enc, 0x0, 1);
>
> - radeon_enc_code_fixed_bits(enc, 0x0, 1);
>
> + if (enc->enc_pic.rc_session_init.rate_control_method ==
>
> + RENCODE_RATE_CONTROL_METHOD_NONE)
>
> + radeon_enc_code_fixed_bits(enc, 0x0, 1);
>
> + else {
>
> + radeon_enc_code_fixed_bits(enc, 0x1, 1);
>
> + radeon_enc_code_ue(enc, 0x0);
>
> + }
>
>   radeon_enc_code_se(enc, enc->enc_pic.hevc_deblock.cb_qp_offset);
>
>   radeon_enc_code_se(enc, enc->enc_pic.hevc_deblock.cr_qp_offset);
>
>   radeon_enc_code_fixed_bits(enc, 0x0, 1);
>
> --
>
> 2.17.1
>
>
>
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[Mesa-dev] [PATCH] radeon/vcn: enable rate control for hevc encoding

2019-12-13 Thread Zhang, Boyuan 
Port changes from radeon_vcn_enc_1_2.c to radeon_vcn_enc_2_0.c

Set cu_qp_delta_enable_flag on when rate control is enabled, and set it
off when rate control is disabled (e.g. constant qp).

Signed-off-by: Boyuan Zhang 
---
 src/gallium/drivers/radeon/radeon_vcn_enc_2_0.c | 8 +++-
 1 file changed, 7 insertions(+), 1 deletion(-)

diff --git a/src/gallium/drivers/radeon/radeon_vcn_enc_2_0.c 
b/src/gallium/drivers/radeon/radeon_vcn_enc_2_0.c
index d2c6378a055..580a084a1c1 100644
--- a/src/gallium/drivers/radeon/radeon_vcn_enc_2_0.c
+++ b/src/gallium/drivers/radeon/radeon_vcn_enc_2_0.c
@@ -196,7 +196,13 @@ static void radeon_enc_nalu_pps_hevc(struct radeon_encoder 
*enc)
  radeon_enc_code_se(enc, 0x0);
  radeon_enc_code_fixed_bits(enc, 
enc->enc_pic.hevc_spec_misc.constrained_intra_pred_flag, 1);
  radeon_enc_code_fixed_bits(enc, 0x0, 1);
- radeon_enc_code_fixed_bits(enc, 0x0, 1);
+ if (enc->enc_pic.rc_session_init.rate_control_method ==
+ RENCODE_RATE_CONTROL_METHOD_NONE)
+ radeon_enc_code_fixed_bits(enc, 0x0, 1);
+ else {
+ radeon_enc_code_fixed_bits(enc, 0x1, 1);
+ radeon_enc_code_ue(enc, 0x0);
+ }
  radeon_enc_code_se(enc, enc->enc_pic.hevc_deblock.cb_qp_offset);
  radeon_enc_code_se(enc, enc->enc_pic.hevc_deblock.cr_qp_offset);
  radeon_enc_code_fixed_bits(enc, 0x0, 1);
--
2.17.1

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[Mesa-dev] [PATCH] radeon/vcn: enable rate control for hevc encoding

2019-06-19 Thread boyuan.zhang 
From: Boyuan Zhang 

Set cu_qp_delta_enable_flag on when rate control is enabled, and set it
off when rate control is disabled (e.g. constant qp).

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=110673
Cc: mesa-sta...@lists.freedesktop.org

V2: fix typo and add bugzilla info

Signed-off-by: Boyuan Zhang 
Acked-by: Leo Liu 
---
 src/gallium/drivers/radeon/radeon_vcn_enc_1_2.c | 8 +++-
 1 file changed, 7 insertions(+), 1 deletion(-)

diff --git a/src/gallium/drivers/radeon/radeon_vcn_enc_1_2.c 
b/src/gallium/drivers/radeon/radeon_vcn_enc_1_2.c
index 3302ed7524..e4b9162034 100644
--- a/src/gallium/drivers/radeon/radeon_vcn_enc_1_2.c
+++ b/src/gallium/drivers/radeon/radeon_vcn_enc_1_2.c
@@ -687,7 +687,13 @@ static void radeon_enc_nalu_pps_hevc(struct radeon_encoder 
*enc)
radeon_enc_code_se(enc, 0x0);
radeon_enc_code_fixed_bits(enc, 
enc->enc_pic.hevc_spec_misc.constrained_intra_pred_flag, 1);
radeon_enc_code_fixed_bits(enc, 0x0, 1);
-   radeon_enc_code_fixed_bits(enc, 0x0, 1);
+   if (enc->enc_pic.rc_session_init.rate_control_method ==
+   RENCODE_RATE_CONTROL_METHOD_NONE)
+   radeon_enc_code_fixed_bits(enc, 0x0, 1);
+   else {
+   radeon_enc_code_fixed_bits(enc, 0x1, 1);
+   radeon_enc_code_ue(enc, 0x0);
+   }
radeon_enc_code_se(enc, enc->enc_pic.hevc_deblock.cb_qp_offset);
radeon_enc_code_se(enc, enc->enc_pic.hevc_deblock.cr_qp_offset);
radeon_enc_code_fixed_bits(enc, 0x0, 1);
-- 
2.17.1

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Re: [Mesa-dev] [PATCH] radeon/vcn: enable rate control for hevc encoding

2019-06-19 Thread Liu, Leo 
Please tag the bugzilla link to the commit messages. With that, the set 
of patches are

Acked-by: Leo Liu 


On 2019-06-17 3:07 p.m., boyuan.zh...@amd.com wrote:
> From: Boyuan Zhang 
>
> Set cu_qp_delta_enable_flag on when rate control is enabled, and it
> off when no rate control is disabled (constant qp).
>
> Signed-off-by: Boyuan Zhang 
> ---
>   src/gallium/drivers/radeon/radeon_vcn_enc_1_2.c | 8 +++-
>   1 file changed, 7 insertions(+), 1 deletion(-)
>
> diff --git a/src/gallium/drivers/radeon/radeon_vcn_enc_1_2.c 
> b/src/gallium/drivers/radeon/radeon_vcn_enc_1_2.c
> index 3302ed7524..e4b9162034 100644
> --- a/src/gallium/drivers/radeon/radeon_vcn_enc_1_2.c
> +++ b/src/gallium/drivers/radeon/radeon_vcn_enc_1_2.c
> @@ -687,7 +687,13 @@ static void radeon_enc_nalu_pps_hevc(struct 
> radeon_encoder *enc)
>   radeon_enc_code_se(enc, 0x0);
>   radeon_enc_code_fixed_bits(enc, 
> enc->enc_pic.hevc_spec_misc.constrained_intra_pred_flag, 1);
>   radeon_enc_code_fixed_bits(enc, 0x0, 1);
> - radeon_enc_code_fixed_bits(enc, 0x0, 1);
> + if (enc->enc_pic.rc_session_init.rate_control_method ==
> + RENC_UVD_RATE_CONTROL_METHOD_NONE)
> + radeon_uvd_enc_code_fixed_bits(enc, 0x0, 1);
> + else {
> + radeon_uvd_enc_code_fixed_bits(enc, 0x1, 1);
> + radeon_uvd_enc_code_ue(enc, 0x0);
> + }
>   radeon_enc_code_se(enc, enc->enc_pic.hevc_deblock.cb_qp_offset);
>   radeon_enc_code_se(enc, enc->enc_pic.hevc_deblock.cr_qp_offset);
>   radeon_enc_code_fixed_bits(enc, 0x0, 1);
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[Mesa-dev] [PATCH] radeon/vcn: enable rate control for hevc encoding

2019-06-17 Thread boyuan.zhang 
From: Boyuan Zhang 

Set cu_qp_delta_enable_flag on when rate control is enabled, and it
off when no rate control is disabled (constant qp).

Signed-off-by: Boyuan Zhang 
---
 src/gallium/drivers/radeon/radeon_vcn_enc_1_2.c | 8 +++-
 1 file changed, 7 insertions(+), 1 deletion(-)

diff --git a/src/gallium/drivers/radeon/radeon_vcn_enc_1_2.c 
b/src/gallium/drivers/radeon/radeon_vcn_enc_1_2.c
index 3302ed7524..e4b9162034 100644
--- a/src/gallium/drivers/radeon/radeon_vcn_enc_1_2.c
+++ b/src/gallium/drivers/radeon/radeon_vcn_enc_1_2.c
@@ -687,7 +687,13 @@ static void radeon_enc_nalu_pps_hevc(struct radeon_encoder 
*enc)
radeon_enc_code_se(enc, 0x0);
radeon_enc_code_fixed_bits(enc, 
enc->enc_pic.hevc_spec_misc.constrained_intra_pred_flag, 1);
radeon_enc_code_fixed_bits(enc, 0x0, 1);
-   radeon_enc_code_fixed_bits(enc, 0x0, 1);
+   if (enc->enc_pic.rc_session_init.rate_control_method ==
+   RENC_UVD_RATE_CONTROL_METHOD_NONE)
+   radeon_uvd_enc_code_fixed_bits(enc, 0x0, 1);
+   else {
+   radeon_uvd_enc_code_fixed_bits(enc, 0x1, 1);
+   radeon_uvd_enc_code_ue(enc, 0x0);
+   }
radeon_enc_code_se(enc, enc->enc_pic.hevc_deblock.cb_qp_offset);
radeon_enc_code_se(enc, enc->enc_pic.hevc_deblock.cr_qp_offset);
radeon_enc_code_fixed_bits(enc, 0x0, 1);
-- 
2.17.1

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