Re: [Mesa-dev] [PATCH] radeonsi: Program RASTER_CONFIG for harvested GPUs v2

[Marek Olšák]

I haven't read the hardware docs on this, so I can't say if it's correct.

Acked-by: Marek Olšák 

Marek

On Thu, May 1, 2014 at 4:55 AM, Tom Stellard  wrote:
> v2:
>   - Write RASTER_CONFIG for all SEs
>
> https://bugs.freedesktop.org/show_bug.cgi?id=60879
> ---
>  src/gallium/drivers/radeonsi/si_state.c   | 100 
> --
>  src/gallium/drivers/radeonsi/sid.h|   8 +-
>  src/gallium/winsys/radeon/drm/radeon_drm_winsys.c |   3 +
>  src/gallium/winsys/radeon/drm/radeon_winsys.h |   1 +
>  4 files changed, 106 insertions(+), 6 deletions(-)
>
> diff --git a/src/gallium/drivers/radeonsi/si_state.c 
> b/src/gallium/drivers/radeonsi/si_state.c
> index 921264e..509ba5b 100644
> --- a/src/gallium/drivers/radeonsi/si_state.c
> +++ b/src/gallium/drivers/radeonsi/si_state.c
> @@ -3024,6 +3024,17 @@ void si_init_state_functions(struct si_context *sctx)
> sctx->b.b.draw_vbo = si_draw_vbo;
>  }
>
> +static unsigned pkr_mask_to_map(unsigned mask)
> +{
> +   switch(mask & 0x3) {
> +   case 0x0:
> +   case 0x1: return 0x0;
> +   case 0x2: return 0x3;
> +   case 0x3: return 0x2;
> +   }
> +   return 0;
> +}
> +
>  void si_init_config(struct si_context *sctx)
>  {
> struct si_pm4_state *pm4 = si_pm4_alloc_state(sctx);
> @@ -3101,24 +3112,103 @@ void si_init_config(struct si_context *sctx)
> break;
> }
> } else {
> +   unsigned raster_config = 0;
> +   unsigned default_rb_mask = 0;
> +   unsigned sh_per_se;
> +   unsigned num_se;
> +   unsigned rb_mask = 
> sctx->screen->b.info.si_backend_enabled_mask;
> +   unsigned i;
> switch (sctx->screen->b.family) {
> case CHIP_TAHITI:
> case CHIP_PITCAIRN:
> -   si_pm4_set_reg(pm4, R_028350_PA_SC_RASTER_CONFIG, 
> 0x2a00126a);
> +   raster_config = 0x2a00126a;
> +   sh_per_se = 2;
> +   num_se = 2;
> break;
> case CHIP_VERDE:
> -   si_pm4_set_reg(pm4, R_028350_PA_SC_RASTER_CONFIG, 
> 0x124a);
> +   raster_config = 0x124a;
> +   sh_per_se = 2;
> +   num_se = 1;
> break;
> case CHIP_OLAND:
> -   si_pm4_set_reg(pm4, R_028350_PA_SC_RASTER_CONFIG, 
> 0x0082);
> +   raster_config = 0x0082;
> +   sh_per_se = 1;
> +   num_se = 1;
> break;
> case CHIP_HAINAN:
> -   si_pm4_set_reg(pm4, R_028350_PA_SC_RASTER_CONFIG, 
> 0x);
> +   raster_config = 0x;
> +   sh_per_se = 1;
> +   num_se = 1;
> break;
> default:
> -   si_pm4_set_reg(pm4, R_028350_PA_SC_RASTER_CONFIG, 
> 0x);
> +   raster_config = 0x;
> +   sh_per_se = 1;
> +   num_se = 1;
> break;
> }
> +
> +   if (rb_mask) {
> +   /* XXX: I can't figure out what the *_XSEL and *_YSEL
> +* fields are for, so I'm leaving them as their 
> default
> +* values. */
> +   unsigned pkr_mask = (sh_per_se | 0x1);
> +   unsigned se0_pkr0 = rb_mask & pkr_mask;
> +   unsigned se0_pkr1 = (rb_mask >>= sh_per_se) & 
> pkr_mask;
> +   unsigned se1_pkr0 = (rb_mask >>= sh_per_se) & 
> pkr_mask;
> +   unsigned se1_pkr1 = (rb_mask >>= sh_per_se) & 
> pkr_mask;
> +   unsigned se_map = 0;
> +   unsigned se0_pkr_map = 0;
> +   unsigned se1_pkr_map = 0;
> +   unsigned se0_pkr0_rb_map = 0;
> +   unsigned se0_pkr1_rb_map = 0;
> +   unsigned se1_pkr0_rb_map = 0;
> +   unsigned se1_pkr1_rb_map = 0;
> +   if (!se0_pkr0 && !se0_pkr1) {
> +   /* se0 disabled */
> +   se_map |= 0x1;
> +   }
> +   if (se1_pkr0 || se1_pkr1) {
> +   /* se1 enabled */
> +   se_map |= 0x2;
> +   }
> +   if (!se0_pkr0) {
> +   /* se0 pkr0 disabled */
> +   se0_pkr_map |= 0x1;
> +   }
> +   if (se0_pkr1) {
> +   /* se0 pkr1 enabled */
> +   se0_pkr_m

[Mesa-dev] [PATCH] radeonsi: Program RASTER_CONFIG for harvested GPUs v2

[Tom Stellard]

v2:
  - Write RASTER_CONFIG for all SEs

https://bugs.freedesktop.org/show_bug.cgi?id=60879
---
 src/gallium/drivers/radeonsi/si_state.c   | 100 --
 src/gallium/drivers/radeonsi/sid.h|   8 +-
 src/gallium/winsys/radeon/drm/radeon_drm_winsys.c |   3 +
 src/gallium/winsys/radeon/drm/radeon_winsys.h |   1 +
 4 files changed, 106 insertions(+), 6 deletions(-)

diff --git a/src/gallium/drivers/radeonsi/si_state.c 
b/src/gallium/drivers/radeonsi/si_state.c
index 921264e..509ba5b 100644
--- a/src/gallium/drivers/radeonsi/si_state.c
+++ b/src/gallium/drivers/radeonsi/si_state.c
@@ -3024,6 +3024,17 @@ void si_init_state_functions(struct si_context *sctx)
sctx->b.b.draw_vbo = si_draw_vbo;
 }
 
+static unsigned pkr_mask_to_map(unsigned mask)
+{
+   switch(mask & 0x3) {
+   case 0x0:
+   case 0x1: return 0x0;
+   case 0x2: return 0x3;
+   case 0x3: return 0x2;
+   }
+   return 0;
+}
+
 void si_init_config(struct si_context *sctx)
 {
struct si_pm4_state *pm4 = si_pm4_alloc_state(sctx);
@@ -3101,24 +3112,103 @@ void si_init_config(struct si_context *sctx)
break;
}
} else {
+   unsigned raster_config = 0;
+   unsigned default_rb_mask = 0;
+   unsigned sh_per_se;
+   unsigned num_se;
+   unsigned rb_mask = sctx->screen->b.info.si_backend_enabled_mask;
+   unsigned i;
switch (sctx->screen->b.family) {
case CHIP_TAHITI:
case CHIP_PITCAIRN:
-   si_pm4_set_reg(pm4, R_028350_PA_SC_RASTER_CONFIG, 
0x2a00126a);
+   raster_config = 0x2a00126a;
+   sh_per_se = 2;
+   num_se = 2;
break;
case CHIP_VERDE:
-   si_pm4_set_reg(pm4, R_028350_PA_SC_RASTER_CONFIG, 
0x124a);
+   raster_config = 0x124a;
+   sh_per_se = 2;
+   num_se = 1;
break;
case CHIP_OLAND:
-   si_pm4_set_reg(pm4, R_028350_PA_SC_RASTER_CONFIG, 
0x0082);
+   raster_config = 0x0082;
+   sh_per_se = 1;
+   num_se = 1;
break;
case CHIP_HAINAN:
-   si_pm4_set_reg(pm4, R_028350_PA_SC_RASTER_CONFIG, 
0x);
+   raster_config = 0x;
+   sh_per_se = 1;
+   num_se = 1;
break;
default:
-   si_pm4_set_reg(pm4, R_028350_PA_SC_RASTER_CONFIG, 
0x);
+   raster_config = 0x;
+   sh_per_se = 1;
+   num_se = 1;
break;
}
+
+   if (rb_mask) {
+   /* XXX: I can't figure out what the *_XSEL and *_YSEL
+* fields are for, so I'm leaving them as their default
+* values. */
+   unsigned pkr_mask = (sh_per_se | 0x1);
+   unsigned se0_pkr0 = rb_mask & pkr_mask;
+   unsigned se0_pkr1 = (rb_mask >>= sh_per_se) & pkr_mask;
+   unsigned se1_pkr0 = (rb_mask >>= sh_per_se) & pkr_mask;
+   unsigned se1_pkr1 = (rb_mask >>= sh_per_se) & pkr_mask;
+   unsigned se_map = 0;
+   unsigned se0_pkr_map = 0;
+   unsigned se1_pkr_map = 0;
+   unsigned se0_pkr0_rb_map = 0;
+   unsigned se0_pkr1_rb_map = 0;
+   unsigned se1_pkr0_rb_map = 0;
+   unsigned se1_pkr1_rb_map = 0;
+   if (!se0_pkr0 && !se0_pkr1) {
+   /* se0 disabled */
+   se_map |= 0x1;
+   }
+   if (se1_pkr0 || se1_pkr1) {
+   /* se1 enabled */
+   se_map |= 0x2;
+   }
+   if (!se0_pkr0) {
+   /* se0 pkr0 disabled */
+   se0_pkr_map |= 0x1;
+   }
+   if (se0_pkr1) {
+   /* se0 pkr1 enabled */
+   se0_pkr_map |= 0x2;
+   }
+   if (!se1_pkr0) {
+   /* se1 pkr0 disabled */
+   se1_pkr_map |= 0x1;
+   }
+   if (se1_pkr1) {
+   /* se1 pkr1 enabled */
+   se1_pkr_map |= 0x2;
+   }
+
+