Re: [Mesa-dev] [PATCH 05/37] i965/gen6/gs: Setup constant push buffers for gen6 geometry shaders.

2014-09-03 Thread Jordan Justen 
On Thu, Aug 14, 2014 at 4:11 AM, Iago Toral Quiroga ito...@igalia.com wrote:
 ---
  src/mesa/drivers/dri/i965/brw_state.h|  1 +
  src/mesa/drivers/dri/i965/brw_state_upload.c |  1 +
  src/mesa/drivers/dri/i965/gen6_gs_state.c| 59 
 ++--
  3 files changed, 49 insertions(+), 12 deletions(-)

 diff --git a/src/mesa/drivers/dri/i965/brw_state.h 
 b/src/mesa/drivers/dri/i965/brw_state.h
 index abead18..95dc411 100644
 --- a/src/mesa/drivers/dri/i965/brw_state.h
 +++ b/src/mesa/drivers/dri/i965/brw_state.h
 @@ -101,6 +101,7 @@ extern const struct brw_tracked_state gen6_clip_vp;
  extern const struct brw_tracked_state gen6_color_calc_state;
  extern const struct brw_tracked_state gen6_depth_stencil_state;
  extern const struct brw_tracked_state gen6_gs_state;
 +extern const struct brw_tracked_state gen6_gs_push_constants;
  extern const struct brw_tracked_state gen6_gs_binding_table;
  extern const struct brw_tracked_state gen6_multisample_state;
  extern const struct brw_tracked_state gen6_renderbuffer_surfaces;
 diff --git a/src/mesa/drivers/dri/i965/brw_state_upload.c 
 b/src/mesa/drivers/dri/i965/brw_state_upload.c
 index 086956d..0481790 100644
 --- a/src/mesa/drivers/dri/i965/brw_state_upload.c
 +++ b/src/mesa/drivers/dri/i965/brw_state_upload.c
 @@ -128,6 +128,7 @@ static const struct brw_tracked_state *gen6_atoms[] =
 gen6_depth_stencil_state,  /* must do before cc unit */

 gen6_vs_push_constants, /* Before vs_state */
 +   gen6_gs_push_constants, /* Before gs_state */
 gen6_wm_push_constants, /* Before wm_state */

 /* Surface state setup.  Must come before the VS/WM unit.  The binding
 diff --git a/src/mesa/drivers/dri/i965/gen6_gs_state.c 
 b/src/mesa/drivers/dri/i965/gen6_gs_state.c
 index e132959..987b7d2 100644
 --- a/src/mesa/drivers/dri/i965/gen6_gs_state.c
 +++ b/src/mesa/drivers/dri/i965/gen6_gs_state.c
 @@ -31,17 +31,36 @@
  #include intel_batchbuffer.h

  static void
 -upload_gs_state_for_tf(struct brw_context *brw)
 +gen6_upload_gs_push_constants(struct brw_context *brw)
  {
 -   /* Disable all the constant buffers. */
 -   BEGIN_BATCH(5);
 -   OUT_BATCH(_3DSTATE_CONSTANT_GS  16 | (5 - 2));
 -   OUT_BATCH(0);
 -   OUT_BATCH(0);
 -   OUT_BATCH(0);
 -   OUT_BATCH(0);
 -   ADVANCE_BATCH();
 +   /* BRW_NEW_GEOMETRY_PROGRAM */
 +   const struct brw_geometry_program *gp =
 +  (struct brw_geometry_program *) brw-geometry_program;
 +
 +   if (gp) {
 +  /* CACHE_NEW_GS_PROG */
 +  struct brw_stage_state *stage_state = brw-gs.base;
 +  struct brw_stage_prog_data *prog_data = brw-gs.prog_data-base.base;
 +
 +  gen6_upload_push_constants(brw, gp-program.Base, prog_data,
 + stage_state, AUB_TRACE_VS_CONSTANTS);
 +   }

Why not upload _3DSTATE_CONSTANT_GS here like gen7?

-Jordan

 +}

 +const struct brw_tracked_state gen6_gs_push_constants = {
 +   .dirty = {
 +  .mesa  = _NEW_TRANSFORM | _NEW_PROGRAM_CONSTANTS,
 +  .brw   = (BRW_NEW_BATCH |
 +BRW_NEW_GEOMETRY_PROGRAM |
 +BRW_NEW_PUSH_CONSTANT_ALLOCATION),
 +  .cache = CACHE_NEW_GS_PROG,
 +   },
 +   .emit = gen6_upload_gs_push_constants,
 +};
 +
 +static void
 +upload_gs_state_for_tf(struct brw_context *brw)
 +{
 if (brw-ff_gs.prog_active) {
BEGIN_BATCH(7);
OUT_BATCH(_3DSTATE_GS  16 | (7 - 2));
 @@ -87,8 +106,8 @@ upload_gs_state(struct brw_context *brw)
 const struct brw_vec4_prog_data *prog_data = brw-gs.prog_data-base;
 const struct brw_stage_state *stage_state = brw-gs.base;

 -   if (active) {
 -  /* FIXME: enable constant buffers */
 +   if (!active || stage_state-push_const_size == 0) {
 +  /* Disable the push constant buffers. */
BEGIN_BATCH(5);
OUT_BATCH(_3DSTATE_CONSTANT_GS  16 | (5 - 2));
OUT_BATCH(0);
 @@ -96,7 +115,23 @@ upload_gs_state(struct brw_context *brw)
OUT_BATCH(0);
OUT_BATCH(0);
ADVANCE_BATCH();
 +   } else {
 +  BEGIN_BATCH(5);
 +  OUT_BATCH(_3DSTATE_CONSTANT_GS  16 |
 +   GEN6_CONSTANT_BUFFER_0_ENABLE |
 +   (5 - 2));
 +  /* Pointer to the GS constant buffer.  Covered by the set of
 +   * state flags from gen6_upload_vs_constants
 +   */
 +  OUT_BATCH(stage_state-push_const_offset +
 +stage_state-push_const_size - 1);
 +  OUT_BATCH(0);
 +  OUT_BATCH(0);
 +  OUT_BATCH(0);
 +  ADVANCE_BATCH();
 +   }

 +   if (active) {
BEGIN_BATCH(7);
OUT_BATCH(_3DSTATE_GS  16 | (7 - 2));
OUT_BATCH(stage_state-prog_offset);
 @@ -163,7 +198,7 @@ upload_gs_state(struct brw_context *brw)

  const struct brw_tracked_state gen6_gs_state = {
 .dirty = {
 -  .mesa  = _NEW_TRANSFORM,
 +  .mesa  = _NEW_TRANSFORM | _NEW_PROGRAM_CONSTANTS,
.brw   = BRW_NEW_CONTEXT | BRW_NEW_PUSH_CONSTANT_ALLOCATION,
.cache = (CACHE_NEW_GS_PROG | CACHE_NEW_FF_GS_PROG)
 },
 --
 1.9.1

[Mesa-dev] [PATCH 05/37] i965/gen6/gs: Setup constant push buffers for gen6 geometry shaders.

2014-08-14 Thread Iago Toral Quiroga 
---
 src/mesa/drivers/dri/i965/brw_state.h|  1 +
 src/mesa/drivers/dri/i965/brw_state_upload.c |  1 +
 src/mesa/drivers/dri/i965/gen6_gs_state.c| 59 ++--
 3 files changed, 49 insertions(+), 12 deletions(-)

diff --git a/src/mesa/drivers/dri/i965/brw_state.h 
b/src/mesa/drivers/dri/i965/brw_state.h
index abead18..95dc411 100644
--- a/src/mesa/drivers/dri/i965/brw_state.h
+++ b/src/mesa/drivers/dri/i965/brw_state.h
@@ -101,6 +101,7 @@ extern const struct brw_tracked_state gen6_clip_vp;
 extern const struct brw_tracked_state gen6_color_calc_state;
 extern const struct brw_tracked_state gen6_depth_stencil_state;
 extern const struct brw_tracked_state gen6_gs_state;
+extern const struct brw_tracked_state gen6_gs_push_constants;
 extern const struct brw_tracked_state gen6_gs_binding_table;
 extern const struct brw_tracked_state gen6_multisample_state;
 extern const struct brw_tracked_state gen6_renderbuffer_surfaces;
diff --git a/src/mesa/drivers/dri/i965/brw_state_upload.c 
b/src/mesa/drivers/dri/i965/brw_state_upload.c
index 086956d..0481790 100644
--- a/src/mesa/drivers/dri/i965/brw_state_upload.c
+++ b/src/mesa/drivers/dri/i965/brw_state_upload.c
@@ -128,6 +128,7 @@ static const struct brw_tracked_state *gen6_atoms[] =
gen6_depth_stencil_state,  /* must do before cc unit */
 
gen6_vs_push_constants, /* Before vs_state */
+   gen6_gs_push_constants, /* Before gs_state */
gen6_wm_push_constants, /* Before wm_state */
 
/* Surface state setup.  Must come before the VS/WM unit.  The binding
diff --git a/src/mesa/drivers/dri/i965/gen6_gs_state.c 
b/src/mesa/drivers/dri/i965/gen6_gs_state.c
index e132959..987b7d2 100644
--- a/src/mesa/drivers/dri/i965/gen6_gs_state.c
+++ b/src/mesa/drivers/dri/i965/gen6_gs_state.c
@@ -31,17 +31,36 @@
 #include intel_batchbuffer.h
 
 static void
-upload_gs_state_for_tf(struct brw_context *brw)
+gen6_upload_gs_push_constants(struct brw_context *brw)
 {
-   /* Disable all the constant buffers. */
-   BEGIN_BATCH(5);
-   OUT_BATCH(_3DSTATE_CONSTANT_GS  16 | (5 - 2));
-   OUT_BATCH(0);
-   OUT_BATCH(0);
-   OUT_BATCH(0);
-   OUT_BATCH(0);
-   ADVANCE_BATCH();
+   /* BRW_NEW_GEOMETRY_PROGRAM */
+   const struct brw_geometry_program *gp =
+  (struct brw_geometry_program *) brw-geometry_program;
+
+   if (gp) {
+  /* CACHE_NEW_GS_PROG */
+  struct brw_stage_state *stage_state = brw-gs.base;
+  struct brw_stage_prog_data *prog_data = brw-gs.prog_data-base.base;
+
+  gen6_upload_push_constants(brw, gp-program.Base, prog_data,
+ stage_state, AUB_TRACE_VS_CONSTANTS);
+   }
+}
 
+const struct brw_tracked_state gen6_gs_push_constants = {
+   .dirty = {
+  .mesa  = _NEW_TRANSFORM | _NEW_PROGRAM_CONSTANTS,
+  .brw   = (BRW_NEW_BATCH |
+BRW_NEW_GEOMETRY_PROGRAM |
+BRW_NEW_PUSH_CONSTANT_ALLOCATION),
+  .cache = CACHE_NEW_GS_PROG,
+   },
+   .emit = gen6_upload_gs_push_constants,
+};
+
+static void
+upload_gs_state_for_tf(struct brw_context *brw)
+{
if (brw-ff_gs.prog_active) {
   BEGIN_BATCH(7);
   OUT_BATCH(_3DSTATE_GS  16 | (7 - 2));
@@ -87,8 +106,8 @@ upload_gs_state(struct brw_context *brw)
const struct brw_vec4_prog_data *prog_data = brw-gs.prog_data-base;
const struct brw_stage_state *stage_state = brw-gs.base;
 
-   if (active) {
-  /* FIXME: enable constant buffers */
+   if (!active || stage_state-push_const_size == 0) {
+  /* Disable the push constant buffers. */
   BEGIN_BATCH(5);
   OUT_BATCH(_3DSTATE_CONSTANT_GS  16 | (5 - 2));
   OUT_BATCH(0);
@@ -96,7 +115,23 @@ upload_gs_state(struct brw_context *brw)
   OUT_BATCH(0);
   OUT_BATCH(0);
   ADVANCE_BATCH();
+   } else {
+  BEGIN_BATCH(5);
+  OUT_BATCH(_3DSTATE_CONSTANT_GS  16 |
+   GEN6_CONSTANT_BUFFER_0_ENABLE |
+   (5 - 2));
+  /* Pointer to the GS constant buffer.  Covered by the set of
+   * state flags from gen6_upload_vs_constants
+   */
+  OUT_BATCH(stage_state-push_const_offset +
+stage_state-push_const_size - 1);
+  OUT_BATCH(0);
+  OUT_BATCH(0);
+  OUT_BATCH(0);
+  ADVANCE_BATCH();
+   }
 
+   if (active) {
   BEGIN_BATCH(7);
   OUT_BATCH(_3DSTATE_GS  16 | (7 - 2));
   OUT_BATCH(stage_state-prog_offset);
@@ -163,7 +198,7 @@ upload_gs_state(struct brw_context *brw)
 
 const struct brw_tracked_state gen6_gs_state = {
.dirty = {
-  .mesa  = _NEW_TRANSFORM,
+  .mesa  = _NEW_TRANSFORM | _NEW_PROGRAM_CONSTANTS,
   .brw   = BRW_NEW_CONTEXT | BRW_NEW_PUSH_CONSTANT_ALLOCATION,
   .cache = (CACHE_NEW_GS_PROG | CACHE_NEW_FF_GS_PROG)
},
-- 
1.9.1

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