Re: [Mesa-dev] [PATCH 1/2] i965: Reorganize prog_data->total_scratch code a bit.

2016-06-16 Thread Ian Romanick
I like this organization much better.  This patch is

Reviewed-by: Ian Romanick 

On 06/16/2016 07:58 PM, Kenneth Graunke wrote:
> Cc: "12.0" 
> Signed-off-by: Kenneth Graunke 
> ---
>  src/mesa/drivers/dri/i965/brw_fs.cpp | 35 +++
>  1 file changed, 19 insertions(+), 16 deletions(-)
> 
> diff --git a/src/mesa/drivers/dri/i965/brw_fs.cpp 
> b/src/mesa/drivers/dri/i965/brw_fs.cpp
> index 8774f25..cadf905 100644
> --- a/src/mesa/drivers/dri/i965/brw_fs.cpp
> +++ b/src/mesa/drivers/dri/i965/brw_fs.cpp
> @@ -5973,23 +5973,26 @@ fs_visitor::allocate_registers(bool allow_spilling)
> schedule_instructions(SCHEDULE_POST);
>  
> if (last_scratch > 0) {
> -  prog_data->total_scratch = brw_get_scratch_size(last_scratch);
> +  unsigned max_scratch_size = 2 * 1024 * 1024;
>  
> -  if (devinfo->is_haswell && stage == MESA_SHADER_COMPUTE) {
> - /* According to the MEDIA_VFE_STATE's "Per Thread Scratch Space"
> -  * field documentation, Haswell supports a minimum of 2kB of
> -  * scratch space for compute shaders, unlike every other stage
> -  * and platform.
> -  */
> - prog_data->total_scratch = MAX2(prog_data->total_scratch, 2048);
> -  } else if (devinfo->gen <= 7 && stage == MESA_SHADER_COMPUTE) {
> - /* According to the MEDIAVFE_STATE's "Per Thread Scratch Space"
> -  * field documentation, platforms prior to Haswell measure scratch
> -  * size linearly with a range of [1kB, 12kB] and 1kB granularity.
> -  */
> - prog_data->total_scratch = ALIGN(last_scratch, 1024);
> +  prog_data->total_scratch = brw_get_scratch_size(last_scratch);
>  
> - assert(prog_data->total_scratch < 12 * 1024);
> +  if (stage == MESA_SHADER_COMPUTE) {
> + if (devinfo->is_haswell) {
> +/* According to the MEDIA_VFE_STATE's "Per Thread Scratch Space"
> + * field documentation, Haswell supports a minimum of 2kB of
> + * scratch space for compute shaders, unlike every other stage
> + * and platform.
> + */
> +prog_data->total_scratch = MAX2(prog_data->total_scratch, 2048);
> + } else if (devinfo->gen <= 7) {
> +/* According to the MEDIA_VFE_STATE's "Per Thread Scratch Space"
> + * field documentation, platforms prior to Haswell measure 
> scratch
> + * size linearly with a range of [1kB, 12kB] and 1kB granularity.
> + */
> +prog_data->total_scratch = ALIGN(last_scratch, 1024);
> +max_scratch_size = 12 * 1024;
> + }
>}
>  
>/* We currently only support up to 2MB of scratch space.  If we
> @@ -6002,7 +6005,7 @@ fs_visitor::allocate_registers(bool allow_spilling)
> * See 3D-Media-GPGPU Engine > Media GPGPU Pipeline >
> * Thread Group Tracking > Local Memory/Scratch Space.
> */
> -  assert(prog_data->total_scratch < 2 * 1024 * 1024);
> +  assert(prog_data->total_scratch < max_scratch_size);
> }
>  }
>  
> 

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[Mesa-dev] [PATCH 1/2] i965: Reorganize prog_data->total_scratch code a bit.

2016-06-16 Thread Kenneth Graunke
Cc: "12.0" 
Signed-off-by: Kenneth Graunke 
---
 src/mesa/drivers/dri/i965/brw_fs.cpp | 35 +++
 1 file changed, 19 insertions(+), 16 deletions(-)

diff --git a/src/mesa/drivers/dri/i965/brw_fs.cpp 
b/src/mesa/drivers/dri/i965/brw_fs.cpp
index 8774f25..cadf905 100644
--- a/src/mesa/drivers/dri/i965/brw_fs.cpp
+++ b/src/mesa/drivers/dri/i965/brw_fs.cpp
@@ -5973,23 +5973,26 @@ fs_visitor::allocate_registers(bool allow_spilling)
schedule_instructions(SCHEDULE_POST);
 
if (last_scratch > 0) {
-  prog_data->total_scratch = brw_get_scratch_size(last_scratch);
+  unsigned max_scratch_size = 2 * 1024 * 1024;
 
-  if (devinfo->is_haswell && stage == MESA_SHADER_COMPUTE) {
- /* According to the MEDIA_VFE_STATE's "Per Thread Scratch Space"
-  * field documentation, Haswell supports a minimum of 2kB of
-  * scratch space for compute shaders, unlike every other stage
-  * and platform.
-  */
- prog_data->total_scratch = MAX2(prog_data->total_scratch, 2048);
-  } else if (devinfo->gen <= 7 && stage == MESA_SHADER_COMPUTE) {
- /* According to the MEDIAVFE_STATE's "Per Thread Scratch Space"
-  * field documentation, platforms prior to Haswell measure scratch
-  * size linearly with a range of [1kB, 12kB] and 1kB granularity.
-  */
- prog_data->total_scratch = ALIGN(last_scratch, 1024);
+  prog_data->total_scratch = brw_get_scratch_size(last_scratch);
 
- assert(prog_data->total_scratch < 12 * 1024);
+  if (stage == MESA_SHADER_COMPUTE) {
+ if (devinfo->is_haswell) {
+/* According to the MEDIA_VFE_STATE's "Per Thread Scratch Space"
+ * field documentation, Haswell supports a minimum of 2kB of
+ * scratch space for compute shaders, unlike every other stage
+ * and platform.
+ */
+prog_data->total_scratch = MAX2(prog_data->total_scratch, 2048);
+ } else if (devinfo->gen <= 7) {
+/* According to the MEDIA_VFE_STATE's "Per Thread Scratch Space"
+ * field documentation, platforms prior to Haswell measure scratch
+ * size linearly with a range of [1kB, 12kB] and 1kB granularity.
+ */
+prog_data->total_scratch = ALIGN(last_scratch, 1024);
+max_scratch_size = 12 * 1024;
+ }
   }
 
   /* We currently only support up to 2MB of scratch space.  If we
@@ -6002,7 +6005,7 @@ fs_visitor::allocate_registers(bool allow_spilling)
* See 3D-Media-GPGPU Engine > Media GPGPU Pipeline >
* Thread Group Tracking > Local Memory/Scratch Space.
*/
-  assert(prog_data->total_scratch < 2 * 1024 * 1024);
+  assert(prog_data->total_scratch < max_scratch_size);
}
 }
 
-- 
2.8.3

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