Re: [Mesa-dev] [PATCH 1/3] ac/nir: mark some arguments const

[Bas Nieuwenhuizen]

This series is

Reviewed-by: Bas Nieuwenhuizen 

On Wed, Jun 7, 2017 at 1:31 AM, Grazvydas Ignotas  wrote:
> Most functions are only inspecting nir, so nir related arguments can be
> marked const. Some more can be done if/when some nir changes are
> accepted.
>
> Signed-off-by: Grazvydas Ignotas 
> ---
> does *not* depend on the nir patch
>
>  src/amd/common/ac_nir_to_llvm.c | 61 
> +
>  1 file changed, 31 insertions(+), 30 deletions(-)
>
> diff --git a/src/amd/common/ac_nir_to_llvm.c b/src/amd/common/ac_nir_to_llvm.c
> index 4e5d19a..5f62769 100644
> --- a/src/amd/common/ac_nir_to_llvm.c
> +++ b/src/amd/common/ac_nir_to_llvm.c
> @@ -174,11 +174,11 @@ struct nir_to_llvm_context {
> uint64_t tess_outputs_written;
> uint64_t tess_patch_outputs_written;
>  };
>
>  static LLVMValueRef get_sampler_desc(struct nir_to_llvm_context *ctx,
> -nir_deref_var *deref,
> +const nir_deref_var *deref,
>  enum desc_type desc_type);
>  static unsigned radeon_llvm_reg_index_soa(unsigned index, unsigned chan)
>  {
> return (index * 4) + chan;
>  }
> @@ -1077,11 +1077,11 @@ build_store_values_extended(struct 
> nir_to_llvm_context *ctx,
> LLVMBuildStore(builder, value, ptr);
> }
>  }
>
>  static LLVMTypeRef get_def_type(struct nir_to_llvm_context *ctx,
> -nir_ssa_def *def)
> +const nir_ssa_def *def)
>  {
> LLVMTypeRef type = LLVMIntTypeInContext(ctx->context, def->bit_size);
> if (def->num_components > 1) {
> type = LLVMVectorType(type, def->num_components);
> }
> @@ -1095,11 +1095,11 @@ static LLVMValueRef get_src(struct 
> nir_to_llvm_context *ctx, nir_src src)
> return (LLVMValueRef)entry->data;
>  }
>
>
>  static LLVMBasicBlockRef get_block(struct nir_to_llvm_context *ctx,
> -   struct nir_block *b)
> +   const struct nir_block *b)
>  {
> struct hash_entry *entry = _mesa_hash_table_search(ctx->defs, b);
> return (LLVMBasicBlockRef)entry->data;
>  }
>
> @@ -1385,11 +1385,11 @@ static LLVMValueRef emit_imul_high(struct 
> nir_to_llvm_context *ctx,
> return result;
>  }
>
>  static LLVMValueRef emit_bitfield_extract(struct nir_to_llvm_context *ctx,
>   bool is_signed,
> - LLVMValueRef srcs[3])
> + const LLVMValueRef srcs[3])
>  {
> LLVMValueRef result;
> LLVMValueRef icond = LLVMBuildICmp(ctx->builder, LLVMIntEQ, srcs[2], 
> LLVMConstInt(ctx->i32, 32, false), "");
>
> result = ac_build_bfe(>ac, srcs[0], srcs[1], srcs[2], is_signed);
> @@ -1524,11 +1524,11 @@ static LLVMValueRef emit_ddxy_interp(
> result[2+i] = emit_ddxy(ctx, nir_op_fddy, a);
> }
> return ac_build_gather_values(>ac, result, 4);
>  }
>
> -static void visit_alu(struct nir_to_llvm_context *ctx, nir_alu_instr *instr)
> +static void visit_alu(struct nir_to_llvm_context *ctx, const nir_alu_instr 
> *instr)
>  {
> LLVMValueRef src[4], result = NULL;
> unsigned num_components = instr->dest.dest.ssa.num_components;
> unsigned src_components;
> LLVMTypeRef def_type = get_def_type(ctx, >dest.dest.ssa);
> @@ -1890,11 +1890,11 @@ static void visit_alu(struct nir_to_llvm_context 
> *ctx, nir_alu_instr *instr)
> result);
> }
>  }
>
>  static void visit_load_const(struct nir_to_llvm_context *ctx,
> - nir_load_const_instr *instr)
> + const nir_load_const_instr *instr)
>  {
> LLVMValueRef values[4], value = NULL;
> LLVMTypeRef element_type =
> LLVMIntTypeInContext(ctx->context, instr->def.bit_size);
>
> @@ -1974,11 +1974,11 @@ static void build_int_type_name(
> strcpy(buf, "i32");
>  }
>
>  static LLVMValueRef radv_lower_gather4_integer(struct nir_to_llvm_context 
> *ctx,
>struct ac_image_args *args,
> -  nir_tex_instr *instr)
> +  const nir_tex_instr *instr)
>  {
> enum glsl_base_type stype = 
> glsl_get_sampler_result_type(instr->texture->var->type);
> LLVMValueRef coord = args->addr;
> LLVMValueRef half_texel[2];
> LLVMValueRef compare_cube_wa;
> @@ -2087,11 +2087,11 @@ static LLVMValueRef radv_lower_gather4_integer(struct 
> nir_to_llvm_context *ctx,
> }
> return result;
>  }
>
>  static LLVMValueRef build_tex_intrinsic(struct nir_to_llvm_context *ctx,
> -  

[Mesa-dev] [PATCH 1/3] ac/nir: mark some arguments const

[Grazvydas Ignotas]

Most functions are only inspecting nir, so nir related arguments can be
marked const. Some more can be done if/when some nir changes are
accepted.

Signed-off-by: Grazvydas Ignotas 
---
does *not* depend on the nir patch

 src/amd/common/ac_nir_to_llvm.c | 61 +
 1 file changed, 31 insertions(+), 30 deletions(-)

diff --git a/src/amd/common/ac_nir_to_llvm.c b/src/amd/common/ac_nir_to_llvm.c
index 4e5d19a..5f62769 100644
--- a/src/amd/common/ac_nir_to_llvm.c
+++ b/src/amd/common/ac_nir_to_llvm.c
@@ -174,11 +174,11 @@ struct nir_to_llvm_context {
uint64_t tess_outputs_written;
uint64_t tess_patch_outputs_written;
 };
 
 static LLVMValueRef get_sampler_desc(struct nir_to_llvm_context *ctx,
-nir_deref_var *deref,
+const nir_deref_var *deref,
 enum desc_type desc_type);
 static unsigned radeon_llvm_reg_index_soa(unsigned index, unsigned chan)
 {
return (index * 4) + chan;
 }
@@ -1077,11 +1077,11 @@ build_store_values_extended(struct nir_to_llvm_context 
*ctx,
LLVMBuildStore(builder, value, ptr);
}
 }
 
 static LLVMTypeRef get_def_type(struct nir_to_llvm_context *ctx,
-nir_ssa_def *def)
+const nir_ssa_def *def)
 {
LLVMTypeRef type = LLVMIntTypeInContext(ctx->context, def->bit_size);
if (def->num_components > 1) {
type = LLVMVectorType(type, def->num_components);
}
@@ -1095,11 +1095,11 @@ static LLVMValueRef get_src(struct nir_to_llvm_context 
*ctx, nir_src src)
return (LLVMValueRef)entry->data;
 }
 
 
 static LLVMBasicBlockRef get_block(struct nir_to_llvm_context *ctx,
-   struct nir_block *b)
+   const struct nir_block *b)
 {
struct hash_entry *entry = _mesa_hash_table_search(ctx->defs, b);
return (LLVMBasicBlockRef)entry->data;
 }
 
@@ -1385,11 +1385,11 @@ static LLVMValueRef emit_imul_high(struct 
nir_to_llvm_context *ctx,
return result;
 }
 
 static LLVMValueRef emit_bitfield_extract(struct nir_to_llvm_context *ctx,
  bool is_signed,
- LLVMValueRef srcs[3])
+ const LLVMValueRef srcs[3])
 {
LLVMValueRef result;
LLVMValueRef icond = LLVMBuildICmp(ctx->builder, LLVMIntEQ, srcs[2], 
LLVMConstInt(ctx->i32, 32, false), "");
 
result = ac_build_bfe(>ac, srcs[0], srcs[1], srcs[2], is_signed);
@@ -1524,11 +1524,11 @@ static LLVMValueRef emit_ddxy_interp(
result[2+i] = emit_ddxy(ctx, nir_op_fddy, a);
}
return ac_build_gather_values(>ac, result, 4);
 }
 
-static void visit_alu(struct nir_to_llvm_context *ctx, nir_alu_instr *instr)
+static void visit_alu(struct nir_to_llvm_context *ctx, const nir_alu_instr 
*instr)
 {
LLVMValueRef src[4], result = NULL;
unsigned num_components = instr->dest.dest.ssa.num_components;
unsigned src_components;
LLVMTypeRef def_type = get_def_type(ctx, >dest.dest.ssa);
@@ -1890,11 +1890,11 @@ static void visit_alu(struct nir_to_llvm_context *ctx, 
nir_alu_instr *instr)
result);
}
 }
 
 static void visit_load_const(struct nir_to_llvm_context *ctx,
- nir_load_const_instr *instr)
+ const nir_load_const_instr *instr)
 {
LLVMValueRef values[4], value = NULL;
LLVMTypeRef element_type =
LLVMIntTypeInContext(ctx->context, instr->def.bit_size);
 
@@ -1974,11 +1974,11 @@ static void build_int_type_name(
strcpy(buf, "i32");
 }
 
 static LLVMValueRef radv_lower_gather4_integer(struct nir_to_llvm_context *ctx,
   struct ac_image_args *args,
-  nir_tex_instr *instr)
+  const nir_tex_instr *instr)
 {
enum glsl_base_type stype = 
glsl_get_sampler_result_type(instr->texture->var->type);
LLVMValueRef coord = args->addr;
LLVMValueRef half_texel[2];
LLVMValueRef compare_cube_wa;
@@ -2087,11 +2087,11 @@ static LLVMValueRef radv_lower_gather4_integer(struct 
nir_to_llvm_context *ctx,
}
return result;
 }
 
 static LLVMValueRef build_tex_intrinsic(struct nir_to_llvm_context *ctx,
-   nir_tex_instr *instr,
+   const nir_tex_instr *instr,
bool lod_is_zero,
struct ac_image_args *args)
 {
if (instr->sampler_dim == GLSL_SAMPLER_DIM_BUF) {
return ac_build_buffer_load_format(>ac,
@@ -2200,11 +2200,11 @@ static