Re: [Mesa-dev] [PATCH 1/8] i965/msaa: Move {rt, tex}_interleaved into blorp program key.

2012-07-09 Thread Chad Versace 
 @@ -192,6 +192,12 @@ struct brw_blorp_blit_prog_key
  */
 unsigned tex_samples;
  
 +   /* If tex_samples  0, whether or not the GPU pipeline will be configured
 +* to read from it as though it were an interleaved MSAA layout.  False if
 +* tex_samples == 0.
 +*/
 +   bool tex_interleaved;

There's a confusing sentence fragment here.
 +
 /* Actual number of samples per pixel in the source image. */
 unsigned src_samples;
  
 @@ -205,6 +211,12 @@ struct brw_blorp_blit_prog_key
  */
 unsigned rt_samples;
  
 +   /* If rt_samples  0, whether or not the GPU pipeline will be configured
 +* to write to it as though it were an interleaved MSAA layout.  False if
 +* rt_samples == 0.
 +*/
 +   bool rt_interleaved;

Here too.

But you kill these comments in the next patch, so whatever.

Reviewed-by: Chad Versace chad.vers...@linux.intel.com
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Re: [Mesa-dev] [PATCH 1/8] i965/msaa: Move {rt, tex}_interleaved into blorp program key.

2012-07-09 Thread Paul Berry 
On 9 July 2012 13:35, Chad Versace chad.vers...@linux.intel.com wrote:

  @@ -192,6 +192,12 @@ struct brw_blorp_blit_prog_key
   */
  unsigned tex_samples;
 
  +   /* If tex_samples  0, whether or not the GPU pipeline will be
 configured
  +* to read from it as though it were an interleaved MSAA layout.
  False if
  +* tex_samples == 0.
  +*/
  +   bool tex_interleaved;

 There's a confusing sentence fragment here.


Oh, wow, that's a pretty bad garden path sentence.  I'll fix it to If
tex_samples  0, this boolean indicates whether or not the GPU pipeline
will be configured


  +
  /* Actual number of samples per pixel in the source image. */
  unsigned src_samples;
 
  @@ -205,6 +211,12 @@ struct brw_blorp_blit_prog_key
   */
  unsigned rt_samples;
 
  +   /* If rt_samples  0, whether or not the GPU pipeline will be
 configured
  +* to write to it as though it were an interleaved MSAA layout.
  False if
  +* rt_samples == 0.
  +*/
  +   bool rt_interleaved;

 Here too.

 But you kill these comments in the next patch, so whatever.

 Reviewed-by: Chad Versace chad.vers...@linux.intel.com

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[Mesa-dev] [PATCH 1/8] i965/msaa: Move {rt, tex}_interleaved into blorp program key.

2012-07-06 Thread Paul Berry 
On Gen6, MSAA buffers always use an interleaved layout and non-MSAA
buffers always use a non-interleaved layout, so it is not strictly
necessary to keep track of the layout of the texture and render target
surfaces in the blorp program key.  However, it is cleaner to do so,
since (a) it makes the blorp compiler less dependent on implicit
knowledge about how the GPU pipeline is configured, and (b) it paves
the way for implementing compressed multisampled surfaces in Gen7.

This patch won't cause any redundant compiles, because the layout of
the texture and render target surfaces depends on other parameters
that are already in the blorp program key.
---
 src/mesa/drivers/dri/i965/brw_blorp.h|   12 ++
 src/mesa/drivers/dri/i965/brw_blorp_blit.cpp |   30 +
 2 files changed, 28 insertions(+), 14 deletions(-)

diff --git a/src/mesa/drivers/dri/i965/brw_blorp.h 
b/src/mesa/drivers/dri/i965/brw_blorp.h
index 4c74c91..4259d9c 100644
--- a/src/mesa/drivers/dri/i965/brw_blorp.h
+++ b/src/mesa/drivers/dri/i965/brw_blorp.h
@@ -192,6 +192,12 @@ struct brw_blorp_blit_prog_key
 */
unsigned tex_samples;
 
+   /* If tex_samples  0, whether or not the GPU pipeline will be configured
+* to read from it as though it were an interleaved MSAA layout.  False if
+* tex_samples == 0.
+*/
+   bool tex_interleaved;
+
/* Actual number of samples per pixel in the source image. */
unsigned src_samples;
 
@@ -205,6 +211,12 @@ struct brw_blorp_blit_prog_key
 */
unsigned rt_samples;
 
+   /* If rt_samples  0, whether or not the GPU pipeline will be configured
+* to write to it as though it were an interleaved MSAA layout.  False if
+* rt_samples == 0.
+*/
+   bool rt_interleaved;
+
/* Actual number of samples per pixel in the destination image. */
unsigned dst_samples;
 
diff --git a/src/mesa/drivers/dri/i965/brw_blorp_blit.cpp 
b/src/mesa/drivers/dri/i965/brw_blorp_blit.cpp
index 0bed768..0467607 100644
--- a/src/mesa/drivers/dri/i965/brw_blorp_blit.cpp
+++ b/src/mesa/drivers/dri/i965/brw_blorp_blit.cpp
@@ -510,14 +510,6 @@ const GLuint *
 brw_blorp_blit_program::compile(struct brw_context *brw,
 GLuint *program_size)
 {
-   /* Since blorp uses color textures and render targets to do all its work
-* (even when blitting stencil and depth data), we always have to configure
-* the Gen7 GPU to use sliced layout on Gen7.  On Gen6, the MSAA layout is
-* always interleaved.
-*/
-   const bool rt_interleaved = key-rt_samples  0  brw-intel.gen == 6;
-   const bool tex_interleaved = key-tex_samples  0  brw-intel.gen == 6;
-
/* Sanity checks */
if (key-dst_tiled_w  key-rt_samples  0) {
   /* If the destination image is W tiled and multisampled, then the thread
@@ -537,7 +529,7 @@ brw_blorp_blit_program::compile(struct brw_context *brw,
*/
   assert(!key-src_tiled_w);
   assert(key-tex_samples == key-src_samples);
-  assert(tex_interleaved == key-src_interleaved);
+  assert(key-tex_interleaved == key-src_interleaved);
   assert(key-tex_samples  0);
}
 
@@ -549,7 +541,7 @@ brw_blorp_blit_program::compile(struct brw_context *brw,
}
 
/* Interleaved only makes sense on MSAA surfaces */
-   if (tex_interleaved) assert(key-tex_samples  0);
+   if (key-tex_interleaved) assert(key-tex_samples  0);
if (key-src_interleaved) assert(key-src_samples  0);
if (key-dst_interleaved) assert(key-dst_samples  0);
 
@@ -579,8 +571,8 @@ brw_blorp_blit_program::compile(struct brw_context *brw,
 */
if (rt_tiled_w != key-dst_tiled_w ||
key-rt_samples != key-dst_samples ||
-   rt_interleaved != key-dst_interleaved) {
-  encode_msaa(key-rt_samples, rt_interleaved);
+   key-rt_interleaved != key-dst_interleaved) {
+  encode_msaa(key-rt_samples, key-rt_interleaved);
   /* Now (X, Y, S) = detile(rt_tiling, offset) */
   translate_tiling(rt_tiled_w, key-dst_tiled_w);
   /* Now (X, Y, S) = detile(dst_tiling, offset) */
@@ -634,12 +626,12 @@ brw_blorp_blit_program::compile(struct brw_context *brw,
*/
   if (tex_tiled_w != key-src_tiled_w ||
   key-tex_samples != key-src_samples ||
-  tex_interleaved != key-src_interleaved) {
+  key-tex_interleaved != key-src_interleaved) {
  encode_msaa(key-src_samples, key-src_interleaved);
  /* Now (X, Y, S) = detile(src_tiling, offset) */
  translate_tiling(key-src_tiled_w, tex_tiled_w);
  /* Now (X, Y, S) = detile(tex_tiling, offset) */
- decode_msaa(key-tex_samples, tex_interleaved);
+ decode_msaa(key-tex_samples, key-tex_interleaved);
   }
 
   /* Now (X, Y, S) = decode_msaa(tex_samples, detile(tex_tiling, offset)).
@@ -1332,6 +1324,16 @@ brw_blorp_blit_params::brw_blorp_blit_params(struct 
brw_context *brw,
wm_prog_key.tex_samples = src.num_samples;
wm_prog_key.rt_samples  = dst.num_samples;
 
+