Re: [Mesa-dev] [PATCH 12/20] intel/genxml: Make 3DSTATE_WM more consistent across gens
On Mon, Nov 14, 2016 at 2:46 AM, Timothy Arceri <
timothy.arc...@collabora.com> wrote:
> On Sat, 2016-11-12 at 13:34 -0800, Jason Ekstrand wrote:
> > ---
> > src/intel/blorp/blorp_genX_exec.h | 4 ++--
> > src/intel/genxml/gen6.xml | 16 +---
> > src/intel/genxml/gen7.xml | 16 +---
> > src/intel/genxml/gen75.xml| 16 +---
> > src/intel/genxml/gen8.xml | 6 +++---
> > src/intel/genxml/gen9.xml | 6 +++---
> > src/intel/vulkan/gen7_pipeline.c | 2 +-
> > src/intel/vulkan/gen8_pipeline.c | 8
> > 8 files changed, 52 insertions(+), 22 deletions(-)
> >
> > diff --git a/src/intel/blorp/blorp_genX_exec.h
> > b/src/intel/blorp/blorp_genX_exec.h
> > index 4a98371..5921190 100644
> > --- a/src/intel/blorp/blorp_genX_exec.h
> > +++ b/src/intel/blorp/blorp_genX_exec.h
> > @@ -608,7 +608,7 @@ blorp_emit_ps_config(struct blorp_batch *batch,
> > wm.ThreadDispatchEnable = true;
> >
> >if (params->src.enabled)
> > - wm.PixelShaderKillPixel = true;
> > + wm.PixelShaderKillsPixel = true;
> >
> >if (params->dst.surf.samples > 1) {
> > wm.MultisampleRasterizationMode = MSRASTMODE_ON_PATTERN;
> > @@ -709,7 +709,7 @@ blorp_emit_ps_config(struct blorp_batch *batch,
> >
> >if (params->src.enabled) {
> > wm.SamplerCount = 1; /* Up to 4 samplers */
> > - wm.PixelShaderKillPixel = true; /* TODO: temporarily smash
> > on */
> > + wm.PixelShaderKillsPixel = true; /* TODO: temporarily smash
> > on */
> >}
> >
> >if (params->dst.surf.samples > 1) {
> > diff --git a/src/intel/genxml/gen6.xml b/src/intel/genxml/gen6.xml
> > index 60e403a..2d19305 100644
> > --- a/src/intel/genxml/gen6.xml
> > +++ b/src/intel/genxml/gen6.xml
> > @@ -1464,12 +1464,22 @@
> >
> > > type="uint"/>
> > > end="183" type="bool"/>
> > - > type="bool"/>
> > + > type="bool"/>
> > > type="bool"/>
> > > end="180" type="bool"/>
> > > type="bool"/>
> > - > end="177" type="uint"/>
> > - > end="175" type="uint"/>
> > + > end="177" type="uint">
> > +
> > +
> > +
> > +
> > +
> > + > end="175" type="uint">
> > +
> > +
> > +
> > +
> > +
> > > type="bool"/>
> > > type="bool"/>
> > > end="169" type="bool"/>
> > diff --git a/src/intel/genxml/gen7.xml b/src/intel/genxml/gen7.xml
> > index 7ac421f..9bb8633 100644
> > --- a/src/intel/genxml/gen7.xml
> > +++ b/src/intel/genxml/gen7.xml
> > @@ -1637,7 +1637,12 @@
> >
> >
> >
> > - > end="81" type="uint"/>
> > + > end="81" type="uint">
> > +
> > +
> > +
> > +
> > +
> > > type="bool"/>
> > > end="73" type="uint"/>
> > > type="bool"/>
> > @@ -1907,7 +1912,7 @@
> > > type="bool"/>
> > > start="59" end="59" type="bool"/>
> > > end="58" type="bool"/>
> > - > type="bool"/>
> > + > type="bool"/>
> > > end="56" type="uint">
> >
> >
> > @@ -1929,7 +1934,12 @@
> > > type="uint"/>
> > > end="42" type="bool"/>
> > > end="41" type="uint"/>
> > - > type="uint"/>
> > + > type="uint">
> > +
> > +
> > +
> > +
> > +
> > > type="bool"/>
> > > type="bool"/>
> > > type="uint">
> > diff --git a/src/intel/genxml/gen75.xml b/src/intel/genxml/gen75.xml
> > index 1f8d77a..15c9caa 100644
> > --- a/src/intel/genxml/gen75.xml
> > +++ b/src/intel/genxml/gen75.xml
> > @@ -1892,7 +1892,12 @@
> >
> >
> >
> > - > end="81" type="uint"/>
> > + > end="81" type="uint">
> > +
> > +
> > +
> > +
> > +
> > > type="bool"/>
> > > type="bool"/>
> > > end="74" type="bool"/>
> > @@ -2180,7 +2185,7 @@
> > > type="bool"/>
> > > start="59" end="59" type="bool"/>
> > > end="58" type="bool"/>
> > - > type="bool"/>
> > + > type="bool"/>
> > > end="56" type="uint">
> >
> >
> > @@ -2202,7 +2207,12 @@
> > > type="uint"/>
> > > end="42" type="bool"/>
> > > end="41" type="uint"/>
> > - > type="uint"/>
> > + > type="uint">
> > +
> > +
> > +
> > +
> > +
> > > end="37" type="bool"/>
> > > type="bool"/>
> > > type="bool"/>
> > diff --git a/src/intel/genxml/gen8.xml b/src/intel/genxml/gen8.xml
> > index f4dda4e..3178b1d 100644
> > --- a/src/intel/genxml/gen8.xml
> > +++ b/src/intel/genxml/gen8.xml
> > @@ -2310,9 +2310,9 @@
> > > start="59" end="59" type="bool"/>
> > > end="58" type="bool"/>
> > > type="uint">
> > -
> > -
> > -
> > +
> > +
> > +
> >
> > > type="uint">
> >
> > diff --git a/src/intel/genxml/gen9.xml b/src/intel/genxml/gen9.xml
> > index 58b41f7..3d44cdb 100644
> > --- a/src/intel/genxml/gen9.xml
> > +++
Re: [Mesa-dev] [PATCH 12/20] intel/genxml: Make 3DSTATE_WM more consistent across gens
On Sat, 2016-11-12 at 13:34 -0800, Jason Ekstrand wrote:
> ---
> src/intel/blorp/blorp_genX_exec.h | 4 ++--
> src/intel/genxml/gen6.xml | 16 +---
> src/intel/genxml/gen7.xml | 16 +---
> src/intel/genxml/gen75.xml| 16 +---
> src/intel/genxml/gen8.xml | 6 +++---
> src/intel/genxml/gen9.xml | 6 +++---
> src/intel/vulkan/gen7_pipeline.c | 2 +-
> src/intel/vulkan/gen8_pipeline.c | 8
> 8 files changed, 52 insertions(+), 22 deletions(-)
>
> diff --git a/src/intel/blorp/blorp_genX_exec.h
> b/src/intel/blorp/blorp_genX_exec.h
> index 4a98371..5921190 100644
> --- a/src/intel/blorp/blorp_genX_exec.h
> +++ b/src/intel/blorp/blorp_genX_exec.h
> @@ -608,7 +608,7 @@ blorp_emit_ps_config(struct blorp_batch *batch,
> wm.ThreadDispatchEnable = true;
>
> if (params->src.enabled)
> - wm.PixelShaderKillPixel = true;
> + wm.PixelShaderKillsPixel = true;
>
> if (params->dst.surf.samples > 1) {
> wm.MultisampleRasterizationMode = MSRASTMODE_ON_PATTERN;
> @@ -709,7 +709,7 @@ blorp_emit_ps_config(struct blorp_batch *batch,
>
> if (params->src.enabled) {
> wm.SamplerCount = 1; /* Up to 4 samplers */
> - wm.PixelShaderKillPixel = true; /* TODO: temporarily smash
> on */
> + wm.PixelShaderKillsPixel = true; /* TODO: temporarily smash
> on */
> }
>
> if (params->dst.surf.samples > 1) {
> diff --git a/src/intel/genxml/gen6.xml b/src/intel/genxml/gen6.xml
> index 60e403a..2d19305 100644
> --- a/src/intel/genxml/gen6.xml
> +++ b/src/intel/genxml/gen6.xml
> @@ -1464,12 +1464,22 @@
>
> type="uint"/>
> end="183" type="bool"/>
> - type="bool"/>
> + type="bool"/>
> type="bool"/>
> end="180" type="bool"/>
> type="bool"/>
> - end="177" type="uint"/>
> - end="175" type="uint"/>
> + end="177" type="uint">
> +
> +
> +
> +
> +
> + end="175" type="uint">
> +
> +
> +
> +
> +
> type="bool"/>
> type="bool"/>
> end="169" type="bool"/>
> diff --git a/src/intel/genxml/gen7.xml b/src/intel/genxml/gen7.xml
> index 7ac421f..9bb8633 100644
> --- a/src/intel/genxml/gen7.xml
> +++ b/src/intel/genxml/gen7.xml
> @@ -1637,7 +1637,12 @@
>
>
>
> - end="81" type="uint"/>
> + end="81" type="uint">
> +
> +
> +
> +
> +
> type="bool"/>
> end="73" type="uint"/>
> type="bool"/>
> @@ -1907,7 +1912,7 @@
> type="bool"/>
> start="59" end="59" type="bool"/>
> end="58" type="bool"/>
> - type="bool"/>
> + type="bool"/>
> end="56" type="uint">
>
>
> @@ -1929,7 +1934,12 @@
> type="uint"/>
> end="42" type="bool"/>
> end="41" type="uint"/>
> - type="uint"/>
> + type="uint">
> +
> +
> +
> +
> +
> type="bool"/>
> type="bool"/>
> type="uint">
> diff --git a/src/intel/genxml/gen75.xml b/src/intel/genxml/gen75.xml
> index 1f8d77a..15c9caa 100644
> --- a/src/intel/genxml/gen75.xml
> +++ b/src/intel/genxml/gen75.xml
> @@ -1892,7 +1892,12 @@
>
>
>
> - end="81" type="uint"/>
> + end="81" type="uint">
> +
> +
> +
> +
> +
> type="bool"/>
> type="bool"/>
> end="74" type="bool"/>
> @@ -2180,7 +2185,7 @@
> type="bool"/>
> start="59" end="59" type="bool"/>
> end="58" type="bool"/>
> - type="bool"/>
> + type="bool"/>
> end="56" type="uint">
>
>
> @@ -2202,7 +2207,12 @@
> type="uint"/>
> end="42" type="bool"/>
> end="41" type="uint"/>
> - type="uint"/>
> + type="uint">
> +
> +
> +
> +
> +
> end="37" type="bool"/>
> type="bool"/>
> type="bool"/>
> diff --git a/src/intel/genxml/gen8.xml b/src/intel/genxml/gen8.xml
> index f4dda4e..3178b1d 100644
> --- a/src/intel/genxml/gen8.xml
> +++ b/src/intel/genxml/gen8.xml
> @@ -2310,9 +2310,9 @@
> start="59" end="59" type="bool"/>
> end="58" type="bool"/>
> type="uint">
> -
> -
> -
> +
> +
> +
>
> type="uint">
>
> diff --git a/src/intel/genxml/gen9.xml b/src/intel/genxml/gen9.xml
> index 58b41f7..3d44cdb 100644
> --- a/src/intel/genxml/gen9.xml
> +++ b/src/intel/genxml/gen9.xml
> @@ -2535,9 +2535,9 @@
> start="59" end="59" type="bool"/>
> end="58" type="bool"/>
> type="uint">
> -
> -
> -
> +
> +
> +
>
> type="uint">
>
> diff --git a/src/intel/vulkan/gen7_pipeline.c
> b/src/intel/vulkan/gen7_pipeline.c
> index dbec828..3aecd7c 100644
> --- a/src/intel/vulkan/gen7_pipeline.c
> +++ b/src/intel/vulkan/gen7_pipeline.c
> @@ -137,7 +137,7 @@ genX(graphics_pipeline_create)(
>
[Mesa-dev] [PATCH 12/20] intel/genxml: Make 3DSTATE_WM more consistent across gens
---
src/intel/blorp/blorp_genX_exec.h | 4 ++--
src/intel/genxml/gen6.xml | 16 +---
src/intel/genxml/gen7.xml | 16 +---
src/intel/genxml/gen75.xml| 16 +---
src/intel/genxml/gen8.xml | 6 +++---
src/intel/genxml/gen9.xml | 6 +++---
src/intel/vulkan/gen7_pipeline.c | 2 +-
src/intel/vulkan/gen8_pipeline.c | 8
8 files changed, 52 insertions(+), 22 deletions(-)
diff --git a/src/intel/blorp/blorp_genX_exec.h
b/src/intel/blorp/blorp_genX_exec.h
index 4a98371..5921190 100644
--- a/src/intel/blorp/blorp_genX_exec.h
+++ b/src/intel/blorp/blorp_genX_exec.h
@@ -608,7 +608,7 @@ blorp_emit_ps_config(struct blorp_batch *batch,
wm.ThreadDispatchEnable = true;
if (params->src.enabled)
- wm.PixelShaderKillPixel = true;
+ wm.PixelShaderKillsPixel = true;
if (params->dst.surf.samples > 1) {
wm.MultisampleRasterizationMode = MSRASTMODE_ON_PATTERN;
@@ -709,7 +709,7 @@ blorp_emit_ps_config(struct blorp_batch *batch,
if (params->src.enabled) {
wm.SamplerCount = 1; /* Up to 4 samplers */
- wm.PixelShaderKillPixel = true; /* TODO: temporarily smash on */
+ wm.PixelShaderKillsPixel = true; /* TODO: temporarily smash on */
}
if (params->dst.surf.samples > 1) {
diff --git a/src/intel/genxml/gen6.xml b/src/intel/genxml/gen6.xml
index 60e403a..2d19305 100644
--- a/src/intel/genxml/gen6.xml
+++ b/src/intel/genxml/gen6.xml
@@ -1464,12 +1464,22 @@
-
+
-
-
+
+
+
+
+
+
+
+
+
+
+
+
diff --git a/src/intel/genxml/gen7.xml b/src/intel/genxml/gen7.xml
index 7ac421f..9bb8633 100644
--- a/src/intel/genxml/gen7.xml
+++ b/src/intel/genxml/gen7.xml
@@ -1637,7 +1637,12 @@
-
+
+
+
+
+
+
@@ -1907,7 +1912,7 @@
-
+
@@ -1929,7 +1934,12 @@
-
+
+
+
+
+
+
diff --git a/src/intel/genxml/gen75.xml b/src/intel/genxml/gen75.xml
index 1f8d77a..15c9caa 100644
--- a/src/intel/genxml/gen75.xml
+++ b/src/intel/genxml/gen75.xml
@@ -1892,7 +1892,12 @@
-
+
+
+
+
+
+
@@ -2180,7 +2185,7 @@
-
+
@@ -2202,7 +2207,12 @@
-
+
+
+
+
+
+
diff --git a/src/intel/genxml/gen8.xml b/src/intel/genxml/gen8.xml
index f4dda4e..3178b1d 100644
--- a/src/intel/genxml/gen8.xml
+++ b/src/intel/genxml/gen8.xml
@@ -2310,9 +2310,9 @@
-
-
-
+
+
+
diff --git a/src/intel/genxml/gen9.xml b/src/intel/genxml/gen9.xml
index 58b41f7..3d44cdb 100644
--- a/src/intel/genxml/gen9.xml
+++ b/src/intel/genxml/gen9.xml
@@ -2535,9 +2535,9 @@
-
-
-
+
+
+
diff --git a/src/intel/vulkan/gen7_pipeline.c b/src/intel/vulkan/gen7_pipeline.c
index dbec828..3aecd7c 100644
--- a/src/intel/vulkan/gen7_pipeline.c
+++ b/src/intel/vulkan/gen7_pipeline.c
@@ -137,7 +137,7 @@ genX(graphics_pipeline_create)(
wm.LineEndCapAntialiasingRegionWidth = 0; /* 0.5 pixels */
wm.LineAntialiasingRegionWidth = 1; /* 1.0 pixels */
wm.PointRasterizationRule = RASTRULE_UPPER_RIGHT;
- wm.PixelShaderKillPixel= wm_prog_data->uses_kill;
+ wm.PixelShaderKillsPixel = wm_prog_data->uses_kill;
wm.PixelShaderComputedDepthMode=
wm_prog_data->computed_depth_mode;
wm.PixelShaderUsesSourceDepth = wm_prog_data->uses_src_depth;
wm.PixelShaderUsesSourceW = wm_prog_data->uses_src_w;
diff --git a/src/intel/vulkan/gen8_pipeline.c b/src/intel/vulkan/gen8_pipeline.c
index 56eb032..e668f94 100644
--- a/src/intel/vulkan/gen8_pipeline.c
+++ b/src/intel/vulkan/gen8_pipeline.c
@@ -94,15 +94,15 @@ genX(graphics_pipeline_create)(
wm.StatisticsEnable= true;
wm.LineEndCapAntialiasingRegionWidth = _05pixels;
wm.LineAntialiasingRegionWidth = _10pixels;
- wm.ForceThreadDispatchEnable = NORMAL;
+ wm.ForceThreadDispatchEnable = 0 /* Normal */;
wm.PointRasterizationRule = RASTRULE_UPPER_RIGHT;
if (wm_prog_data && wm_prog_data->early_fragment_tests) {
- wm.EarlyDepthStencilControl = PREPS;
+ wm.EarlyDepthStencilControl = EDSC_PREPS;
} else if (wm_prog_data && wm_prog_data->has_side_effects) {
- wm.EarlyDepthStencilControl = PSEXEC;
+ wm.EarlyDepthStencilControl = EDSC_PSEXEC;
} else {
