subject:"\[Mesa\-dev\] \[PATCH 13\/24\] i965\/cnl\: Update few assertions"

Re: [Mesa-dev] [PATCH 13/24] i965/cnl: Update few assertions

2017-06-09 Thread Jason Ekstrand


On June 9, 2017 2:41:46 PM Anuj Phogat  wrote:


On Thu, Jun 8, 2017 at 5:07 PM, Jason Ekstrand  wrote:

On Mon, May 15, 2017 at 10:05 AM, Anuj Phogat  wrote:




On Sat, May 13, 2017 at 9:43 AM, Jason Ekstrand 
wrote:


On May 12, 2017 4:41:36 PM Anuj Phogat  wrote:


Signed-off-by: Anuj Phogat 
---
 src/intel/compiler/brw_compiler.h   | 2 +-
 src/mesa/drivers/dri/i965/brw_program.c | 2 +-
 2 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/src/intel/compiler/brw_compiler.h
b/src/intel/compiler/brw_compiler.h
index b5b1ee9..d6bbda1 100644
--- a/src/intel/compiler/brw_compiler.h
+++ b/src/intel/compiler/brw_compiler.h
@@ -1042,7 +1042,7 @@ brw_stage_has_packed_dispatch(const struct
gen_device_info *devinfo,
 * to do a full test run with brw_fs_test_dispatch_packing() hooked
up to
 * the NIR front-end before changing this assertion.
 */
-   assert(devinfo->gen <= 9);
+   assert(devinfo->gen <= 10);



Did you actually do the test described in the above comment?


I've taken this change out of Ben's "[PATCH 08/12] i965/cnl: Add a
preliminary device for CNL"
and I doubt he got the chance to run the test. Adding him in Cc. I'll run
the test and post the
update here. Thanks for catching it.



Has anything happened here?


I did the test with full piglit run. Observed no GPU hangs.


Fantastic.  In that case, this patch is

Reviewed-by: Jason Ekstrand 

Let's land Canon Lake support!






switch (stage) {
case MESA_SHADER_FRAGMENT: {
diff --git a/src/mesa/drivers/dri/i965/brw_program.c
b/src/mesa/drivers/dri/i965/brw_program.c
index d26dce0..f442d55 100644
--- a/src/mesa/drivers/dri/i965/brw_program.c
+++ b/src/mesa/drivers/dri/i965/brw_program.c
@@ -290,7 +290,7 @@ brw_memory_barrier(struct gl_context *ctx,
GLbitfield barriers)
unsigned bits = (PIPE_CONTROL_DATA_CACHE_FLUSH |
 PIPE_CONTROL_NO_WRITE |
 PIPE_CONTROL_CS_STALL);
-   assert(brw->gen >= 7 && brw->gen <= 9);
+   assert(brw->gen >= 7 && brw->gen <= 10);

if (barriers & (GL_VERTEX_ATTRIB_ARRAY_BARRIER_BIT |
GL_ELEMENT_ARRAY_BARRIER_BIT |
--
2.9.3

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Re: [Mesa-dev] [PATCH 13/24] i965/cnl: Update few assertions

2017-06-09 Thread Anuj Phogat

On Thu, Jun 8, 2017 at 5:07 PM, Jason Ekstrand  wrote:
> On Mon, May 15, 2017 at 10:05 AM, Anuj Phogat  wrote:
>>
>>
>>
>> On Sat, May 13, 2017 at 9:43 AM, Jason Ekstrand 
>> wrote:
>>>
>>> On May 12, 2017 4:41:36 PM Anuj Phogat  wrote:
>>>
 Signed-off-by: Anuj Phogat 
 ---
  src/intel/compiler/brw_compiler.h   | 2 +-
  src/mesa/drivers/dri/i965/brw_program.c | 2 +-
  2 files changed, 2 insertions(+), 2 deletions(-)

 diff --git a/src/intel/compiler/brw_compiler.h
 b/src/intel/compiler/brw_compiler.h
 index b5b1ee9..d6bbda1 100644
 --- a/src/intel/compiler/brw_compiler.h
 +++ b/src/intel/compiler/brw_compiler.h
 @@ -1042,7 +1042,7 @@ brw_stage_has_packed_dispatch(const struct
 gen_device_info *devinfo,
  * to do a full test run with brw_fs_test_dispatch_packing() hooked
 up to
  * the NIR front-end before changing this assertion.
  */
 -   assert(devinfo->gen <= 9);
 +   assert(devinfo->gen <= 10);
>>>
>>>
>>> Did you actually do the test described in the above comment?
>>
>> I've taken this change out of Ben's "[PATCH 08/12] i965/cnl: Add a
>> preliminary device for CNL"
>> and I doubt he got the chance to run the test. Adding him in Cc. I'll run
>> the test and post the
>> update here. Thanks for catching it.
>
>
> Has anything happened here?
>
I did the test with full piglit run. Observed no GPU hangs.

>>>
>>>

 switch (stage) {
 case MESA_SHADER_FRAGMENT: {
 diff --git a/src/mesa/drivers/dri/i965/brw_program.c
 b/src/mesa/drivers/dri/i965/brw_program.c
 index d26dce0..f442d55 100644
 --- a/src/mesa/drivers/dri/i965/brw_program.c
 +++ b/src/mesa/drivers/dri/i965/brw_program.c
 @@ -290,7 +290,7 @@ brw_memory_barrier(struct gl_context *ctx,
 GLbitfield barriers)
 unsigned bits = (PIPE_CONTROL_DATA_CACHE_FLUSH |
  PIPE_CONTROL_NO_WRITE |
  PIPE_CONTROL_CS_STALL);
 -   assert(brw->gen >= 7 && brw->gen <= 9);
 +   assert(brw->gen >= 7 && brw->gen <= 10);

 if (barriers & (GL_VERTEX_ATTRIB_ARRAY_BARRIER_BIT |
 GL_ELEMENT_ARRAY_BARRIER_BIT |
 --
 2.9.3

 ___
 mesa-dev mailing list
 mesa-dev@lists.freedesktop.org
 https://lists.freedesktop.org/mailman/listinfo/mesa-dev
>>>
>>>
>>>
>>
>
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Re: [Mesa-dev] [PATCH 13/24] i965/cnl: Update few assertions

2017-06-08 Thread Jason Ekstrand

On Mon, May 15, 2017 at 10:05 AM, Anuj Phogat  wrote:

> 
>
>
> On Sat, May 13, 2017 at 9:43 AM, Jason Ekstrand 
> wrote:
>
>> On May 12, 2017 4:41:36 PM Anuj Phogat  wrote:
>>
>> Signed-off-by: Anuj Phogat 
>>> ---
>>>  src/intel/compiler/brw_compiler.h   | 2 +-
>>>  src/mesa/drivers/dri/i965/brw_program.c | 2 +-
>>>  2 files changed, 2 insertions(+), 2 deletions(-)
>>>
>>> diff --git a/src/intel/compiler/brw_compiler.h
>>> b/src/intel/compiler/brw_compiler.h
>>> index b5b1ee9..d6bbda1 100644
>>> --- a/src/intel/compiler/brw_compiler.h
>>> +++ b/src/intel/compiler/brw_compiler.h
>>> @@ -1042,7 +1042,7 @@ brw_stage_has_packed_dispatch(const struct
>>> gen_device_info *devinfo,
>>>  * to do a full test run with brw_fs_test_dispatch_packing() hooked
>>> up to
>>>  * the NIR front-end before changing this assertion.
>>>  */
>>> -   assert(devinfo->gen <= 9);
>>> +   assert(devinfo->gen <= 10);
>>>
>>
>> Did you actually do the test described in the above comment?
>>
> I've taken this change out of Ben's "[PATCH 08/12] i965/cnl: Add a
> preliminary device for CNL"
> and I doubt he got the chance to run the test. Adding him in Cc. I'll run
> the test and post the
> update here. Thanks for catching it.
>

Has anything happened here?


>
>>
>>> switch (stage) {
>>> case MESA_SHADER_FRAGMENT: {
>>> diff --git a/src/mesa/drivers/dri/i965/brw_program.c
>>> b/src/mesa/drivers/dri/i965/brw_program.c
>>> index d26dce0..f442d55 100644
>>> --- a/src/mesa/drivers/dri/i965/brw_program.c
>>> +++ b/src/mesa/drivers/dri/i965/brw_program.c
>>> @@ -290,7 +290,7 @@ brw_memory_barrier(struct gl_context *ctx,
>>> GLbitfield barriers)
>>> unsigned bits = (PIPE_CONTROL_DATA_CACHE_FLUSH |
>>>  PIPE_CONTROL_NO_WRITE |
>>>  PIPE_CONTROL_CS_STALL);
>>> -   assert(brw->gen >= 7 && brw->gen <= 9);
>>> +   assert(brw->gen >= 7 && brw->gen <= 10);
>>>
>>> if (barriers & (GL_VERTEX_ATTRIB_ARRAY_BARRIER_BIT |
>>> GL_ELEMENT_ARRAY_BARRIER_BIT |
>>> --
>>> 2.9.3
>>>
>>> ___
>>> mesa-dev mailing list
>>> mesa-dev@lists.freedesktop.org
>>> https://lists.freedesktop.org/mailman/listinfo/mesa-dev
>>>
>>
>>
>>
>
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Re: [Mesa-dev] [PATCH 13/24] i965/cnl: Update few assertions

2017-05-15 Thread Anuj Phogat




On Sat, May 13, 2017 at 9:43 AM, Jason Ekstrand 
wrote:

> On May 12, 2017 4:41:36 PM Anuj Phogat  wrote:
>
> Signed-off-by: Anuj Phogat 
>> ---
>>  src/intel/compiler/brw_compiler.h   | 2 +-
>>  src/mesa/drivers/dri/i965/brw_program.c | 2 +-
>>  2 files changed, 2 insertions(+), 2 deletions(-)
>>
>> diff --git a/src/intel/compiler/brw_compiler.h
>> b/src/intel/compiler/brw_compiler.h
>> index b5b1ee9..d6bbda1 100644
>> --- a/src/intel/compiler/brw_compiler.h
>> +++ b/src/intel/compiler/brw_compiler.h
>> @@ -1042,7 +1042,7 @@ brw_stage_has_packed_dispatch(const struct
>> gen_device_info *devinfo,
>>  * to do a full test run with brw_fs_test_dispatch_packing() hooked
>> up to
>>  * the NIR front-end before changing this assertion.
>>  */
>> -   assert(devinfo->gen <= 9);
>> +   assert(devinfo->gen <= 10);
>>
>
> Did you actually do the test described in the above comment?
>
I've taken this change out of Ben's "[PATCH 08/12] i965/cnl: Add a
preliminary device for CNL"
and I doubt he got the chance to run the test. Adding him in Cc. I'll run
the test and post the
update here. Thanks for catching it.

>
>
>> switch (stage) {
>> case MESA_SHADER_FRAGMENT: {
>> diff --git a/src/mesa/drivers/dri/i965/brw_program.c
>> b/src/mesa/drivers/dri/i965/brw_program.c
>> index d26dce0..f442d55 100644
>> --- a/src/mesa/drivers/dri/i965/brw_program.c
>> +++ b/src/mesa/drivers/dri/i965/brw_program.c
>> @@ -290,7 +290,7 @@ brw_memory_barrier(struct gl_context *ctx, GLbitfield
>> barriers)
>> unsigned bits = (PIPE_CONTROL_DATA_CACHE_FLUSH |
>>  PIPE_CONTROL_NO_WRITE |
>>  PIPE_CONTROL_CS_STALL);
>> -   assert(brw->gen >= 7 && brw->gen <= 9);
>> +   assert(brw->gen >= 7 && brw->gen <= 10);
>>
>> if (barriers & (GL_VERTEX_ATTRIB_ARRAY_BARRIER_BIT |
>> GL_ELEMENT_ARRAY_BARRIER_BIT |
>> --
>> 2.9.3
>>
>> ___
>> mesa-dev mailing list
>> mesa-dev@lists.freedesktop.org
>> https://lists.freedesktop.org/mailman/listinfo/mesa-dev
>>
>
>
>
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Re: [Mesa-dev] [PATCH 13/24] i965/cnl: Update few assertions

2017-05-13 Thread Jason Ekstrand


On May 12, 2017 4:41:36 PM Anuj Phogat  wrote:


Signed-off-by: Anuj Phogat 
---
 src/intel/compiler/brw_compiler.h   | 2 +-
 src/mesa/drivers/dri/i965/brw_program.c | 2 +-
 2 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/src/intel/compiler/brw_compiler.h 
b/src/intel/compiler/brw_compiler.h

index b5b1ee9..d6bbda1 100644
--- a/src/intel/compiler/brw_compiler.h
+++ b/src/intel/compiler/brw_compiler.h
@@ -1042,7 +1042,7 @@ brw_stage_has_packed_dispatch(const struct 
gen_device_info *devinfo,

 * to do a full test run with brw_fs_test_dispatch_packing() hooked up to
 * the NIR front-end before changing this assertion.
 */
-   assert(devinfo->gen <= 9);
+   assert(devinfo->gen <= 10);


Did you actually do the test described in the above comment?



switch (stage) {
case MESA_SHADER_FRAGMENT: {
diff --git a/src/mesa/drivers/dri/i965/brw_program.c 
b/src/mesa/drivers/dri/i965/brw_program.c

index d26dce0..f442d55 100644
--- a/src/mesa/drivers/dri/i965/brw_program.c
+++ b/src/mesa/drivers/dri/i965/brw_program.c
@@ -290,7 +290,7 @@ brw_memory_barrier(struct gl_context *ctx, GLbitfield 
barriers)

unsigned bits = (PIPE_CONTROL_DATA_CACHE_FLUSH |
 PIPE_CONTROL_NO_WRITE |
 PIPE_CONTROL_CS_STALL);
-   assert(brw->gen >= 7 && brw->gen <= 9);
+   assert(brw->gen >= 7 && brw->gen <= 10);

if (barriers & (GL_VERTEX_ATTRIB_ARRAY_BARRIER_BIT |
GL_ELEMENT_ARRAY_BARRIER_BIT |
--
2.9.3

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[Mesa-dev] [PATCH 13/24] i965/cnl: Update few assertions

2017-05-12 Thread Anuj Phogat

Signed-off-by: Anuj Phogat 
---
 src/intel/compiler/brw_compiler.h   | 2 +-
 src/mesa/drivers/dri/i965/brw_program.c | 2 +-
 2 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/src/intel/compiler/brw_compiler.h 
b/src/intel/compiler/brw_compiler.h
index b5b1ee9..d6bbda1 100644
--- a/src/intel/compiler/brw_compiler.h
+++ b/src/intel/compiler/brw_compiler.h
@@ -1042,7 +1042,7 @@ brw_stage_has_packed_dispatch(const struct 
gen_device_info *devinfo,
 * to do a full test run with brw_fs_test_dispatch_packing() hooked up to
 * the NIR front-end before changing this assertion.
 */
-   assert(devinfo->gen <= 9);
+   assert(devinfo->gen <= 10);
 
switch (stage) {
case MESA_SHADER_FRAGMENT: {
diff --git a/src/mesa/drivers/dri/i965/brw_program.c 
b/src/mesa/drivers/dri/i965/brw_program.c
index d26dce0..f442d55 100644
--- a/src/mesa/drivers/dri/i965/brw_program.c
+++ b/src/mesa/drivers/dri/i965/brw_program.c
@@ -290,7 +290,7 @@ brw_memory_barrier(struct gl_context *ctx, GLbitfield 
barriers)
unsigned bits = (PIPE_CONTROL_DATA_CACHE_FLUSH |
 PIPE_CONTROL_NO_WRITE |
 PIPE_CONTROL_CS_STALL);
-   assert(brw->gen >= 7 && brw->gen <= 9);
+   assert(brw->gen >= 7 && brw->gen <= 10);
 
if (barriers & (GL_VERTEX_ATTRIB_ARRAY_BARRIER_BIT |
GL_ELEMENT_ARRAY_BARRIER_BIT |
-- 
2.9.3

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Re: [Mesa-dev] [PATCH 13/24] i965/cnl: Update few assertions

Re: [Mesa-dev] [PATCH 13/24] i965/cnl: Update few assertions

Re: [Mesa-dev] [PATCH 13/24] i965/cnl: Update few assertions

Re: [Mesa-dev] [PATCH 13/24] i965/cnl: Update few assertions

Re: [Mesa-dev] [PATCH 13/24] i965/cnl: Update few assertions

[Mesa-dev] [PATCH 13/24] i965/cnl: Update few assertions

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