Re: [Mesa-dev] [PATCH 15/17] intel/compiler: Add instruction compaction support on Gen11

2018-02-23 Thread Kenneth Graunke 
On Tuesday, February 20, 2018 9:15:22 PM PST Matt Turner wrote:
> Gen11 only differs from SKL+ in that it uses a new datatype index table.
> ---
>  src/intel/compiler/brw_eu_compact.c | 42 
> +
>  1 file changed, 42 insertions(+)
> 
> diff --git a/src/intel/compiler/brw_eu_compact.c 
> b/src/intel/compiler/brw_eu_compact.c
> index 8d33e2adffc..ae14ef10ec0 100644
> --- a/src/intel/compiler/brw_eu_compact.c
> +++ b/src/intel/compiler/brw_eu_compact.c
> @@ -637,6 +637,41 @@ static const uint16_t gen8_src_index_table[32] = {
> 0b010110001000
>  };
>  
> +static const uint32_t gen11_datatype_table[32] = {
> +   0b00101,
> +   0b001000100,
> +   0b001000101,
> +   0b001001101,
> +   0b0010101100101,
> +   0b0010010100101,
> +   0b0010010010101,
> +   0b00100100101000101,
> +   0b00100100101100101,
> +   0b001010101,
> +   0b001110100,
> +   0b001110101,
> +   0b001000101000101000101,
> +   0b001000111000101000100,
> +   0b001000111000101000101,
> +   0b001100100100101100101,
> +   0b001100101100100100101,
> +   0b001100101100101100100,
> +   0b001100101100101100101,
> +   0b00110000101100100,
> +   0b001001100,
> +   0b0010001100101,
> +   0b0010101000101,
> +   0b001010100,
> +   0b001000101000101000100,
> +   0b00100011100010100,
> +   0b00100100100101001,
> +   0b00110100101100101,
> +   0b00110000101100101,
> +   0b00100001101001100,
> +   0b001001001001001001000,
> +   0b001001011001001001000,
> +};
> +
>  /* This is actually the control index table for Cherryview (26 bits), but the
>   * only difference from Broadwell (24 bits) is that it has two extra 0-bits 
> at
>   * the start.
> @@ -1450,8 +1485,15 @@ brw_init_compaction_tables(const struct 
> gen_device_info *devinfo)
> assert(gen8_datatype_table[ARRAY_SIZE(gen8_datatype_table) - 1] != 0);
> assert(gen8_subreg_table[ARRAY_SIZE(gen8_subreg_table) - 1] != 0);
> assert(gen8_src_index_table[ARRAY_SIZE(gen8_src_index_table) - 1] != 0);
> +   assert(gen11_datatype_table[ARRAY_SIZE(gen11_datatype_table) - 1] != 0);
>  
> switch (devinfo->gen) {
> +   case 11:
> +  control_index_table = gen8_control_index_table;
> +  datatype_table = gen11_datatype_table;
> +  subreg_table = gen8_subreg_table;
> +  src_index_table = gen8_src_index_table;
> +  break;
> case 10:
> case 9:
> case 8:
> 

This looks right to me.

Reviewed-by: Kenneth Graunke 


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[Mesa-dev] [PATCH 15/17] intel/compiler: Add instruction compaction support on Gen11

2018-02-20 Thread Matt Turner 
Gen11 only differs from SKL+ in that it uses a new datatype index table.
---
 src/intel/compiler/brw_eu_compact.c | 42 +
 1 file changed, 42 insertions(+)

diff --git a/src/intel/compiler/brw_eu_compact.c 
b/src/intel/compiler/brw_eu_compact.c
index 8d33e2adffc..ae14ef10ec0 100644
--- a/src/intel/compiler/brw_eu_compact.c
+++ b/src/intel/compiler/brw_eu_compact.c
@@ -637,6 +637,41 @@ static const uint16_t gen8_src_index_table[32] = {
0b010110001000
 };
 
+static const uint32_t gen11_datatype_table[32] = {
+   0b00101,
+   0b001000100,
+   0b001000101,
+   0b001001101,
+   0b0010101100101,
+   0b0010010100101,
+   0b0010010010101,
+   0b00100100101000101,
+   0b00100100101100101,
+   0b001010101,
+   0b001110100,
+   0b001110101,
+   0b001000101000101000101,
+   0b001000111000101000100,
+   0b001000111000101000101,
+   0b001100100100101100101,
+   0b001100101100100100101,
+   0b001100101100101100100,
+   0b001100101100101100101,
+   0b00110000101100100,
+   0b001001100,
+   0b0010001100101,
+   0b0010101000101,
+   0b001010100,
+   0b001000101000101000100,
+   0b00100011100010100,
+   0b00100100100101001,
+   0b00110100101100101,
+   0b00110000101100101,
+   0b00100001101001100,
+   0b001001001001001001000,
+   0b001001011001001001000,
+};
+
 /* This is actually the control index table for Cherryview (26 bits), but the
  * only difference from Broadwell (24 bits) is that it has two extra 0-bits at
  * the start.
@@ -1450,8 +1485,15 @@ brw_init_compaction_tables(const struct gen_device_info 
*devinfo)
assert(gen8_datatype_table[ARRAY_SIZE(gen8_datatype_table) - 1] != 0);
assert(gen8_subreg_table[ARRAY_SIZE(gen8_subreg_table) - 1] != 0);
assert(gen8_src_index_table[ARRAY_SIZE(gen8_src_index_table) - 1] != 0);
+   assert(gen11_datatype_table[ARRAY_SIZE(gen11_datatype_table) - 1] != 0);
 
switch (devinfo->gen) {
+   case 11:
+  control_index_table = gen8_control_index_table;
+  datatype_table = gen11_datatype_table;
+  subreg_table = gen8_subreg_table;
+  src_index_table = gen8_src_index_table;
+  break;
case 10:
case 9:
case 8:
-- 
2.16.1

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