Re: [Mesa-dev] [PATCH 17/20] ac: add si_nir_load_input_gs() to the abi
On 15/11/17 22:17, Nicolai Hähnle wrote:
On 15.11.2017 12:09, Timothy Arceri wrote:
On 15/11/17 21:56, Nicolai Hähnle wrote:
On 10.11.2017 04:13, Timothy Arceri wrote:
---
src/amd/common/ac_nir_to_llvm.c | 24
-
src/amd/common/ac_shader_abi.h | 7 ++
src/gallium/drivers/radeonsi/si_shader.c | 1 +
src/gallium/drivers/radeonsi/si_shader_internal.h | 5 +
src/gallium/drivers/radeonsi/si_shader_nir.c | 26
+++
5 files changed, 53 insertions(+), 10 deletions(-)
diff --git a/src/amd/common/ac_nir_to_llvm.c
b/src/amd/common/ac_nir_to_llvm.c
index 158e954fa8..483dd52b36 100644
--- a/src/amd/common/ac_nir_to_llvm.c
+++ b/src/amd/common/ac_nir_to_llvm.c
@@ -2854,32 +2854,31 @@ load_tes_input(struct nir_to_llvm_context *ctx,
buf_addr = LLVMBuildAdd(ctx->builder, buf_addr, comp_offset, "");
result = ac_build_buffer_load(>ac,
ctx->hs_ring_tess_offchip, instr->num_components, NULL,
buf_addr, ctx->oc_lds, is_compact ? (4 *
const_index) : 0, 1, 0, true, false);
result = trim_vector(>ac, result, instr->num_components);
result = LLVMBuildBitCast(ctx->builder, result,
get_def_type(ctx->nir, >dest.ssa), "");
return result;
}
static LLVMValueRef
-load_gs_input(struct nir_to_llvm_context *ctx,
- nir_intrinsic_instr *instr)
+load_gs_input(struct ac_shader_abi *abi,
+ nir_intrinsic_instr *instr,
+ unsigned vertex_index,
+ unsigned const_index)
{
- LLVMValueRef indir_index, vtx_offset;
- unsigned const_index;
+ struct nir_to_llvm_context *ctx =
nir_to_llvm_context_from_abi(abi);
+ LLVMValueRef vtx_offset;
LLVMValueRef args[9];
unsigned param, vtx_offset_param;
LLVMValueRef value[4], result;
- unsigned vertex_index;
- get_deref_offset(ctx->nir, instr->variables[0],
- false, _index, NULL,
- _index, _index);
+
vtx_offset_param = vertex_index;
assert(vtx_offset_param < 6);
vtx_offset = LLVMBuildMul(ctx->builder,
ctx->gs_vtx_offset[vtx_offset_param],
LLVMConstInt(ctx->ac.i32, 4, false), "");
param =
shader_io_get_unique_index(instr->variables[0]->var->data.location);
unsigned comp = instr->variables[0]->var->data.location_frac;
for (unsigned i = comp; i < instr->num_components + comp; i++) {
if (ctx->ac.chip_class >= GFX9) {
@@ -2966,21 +2965,26 @@ static LLVMValueRef visit_load_var(struct
ac_nir_context *ctx,
if (instr->dest.ssa.bit_size == 64)
ve *= 2;
switch (instr->variables[0]->var->data.mode) {
case nir_var_shader_in:
if (ctx->stage == MESA_SHADER_TESS_CTRL)
return load_tcs_input(ctx->nctx, instr);
if (ctx->stage == MESA_SHADER_TESS_EVAL)
return load_tes_input(ctx->nctx, instr);
if (ctx->stage == MESA_SHADER_GEOMETRY) {
- return load_gs_input(ctx->nctx, instr);
+ LLVMValueRef indir_index;
+ unsigned const_index, vertex_index;
+ get_deref_offset(ctx, instr->variables[0],
+ false, _index, NULL,
+ _index, _index);
The indentation looks wrong here.
+ return ctx->abi->load_inputs(ctx->abi, instr,
vertex_index, const_index);
}
for (unsigned chan = comp; chan < ve + comp; chan++) {
if (indir_index) {
unsigned count = glsl_count_attribute_slots(
instr->variables[0]->var->type,
ctx->stage == MESA_SHADER_VERTEX);
count -= chan / 4;
LLVMValueRef tmp_vec =
ac_build_gather_values_extended(
>ac, ctx->abi->inputs + idx + chan,
count,
@@ -6489,22 +6493,22 @@ LLVMModuleRef
ac_translate_nir_to_llvm(LLVMTargetMachineRef tm,
for(int i = 0; i < shader_count; ++i) {
ctx.stage = shaders[i]->info.stage;
ctx.output_mask = 0;
ctx.tess_outputs_written = 0;
ctx.num_output_clips =
shaders[i]->info.clip_distance_array_size;
ctx.num_output_culls =
shaders[i]->info.cull_distance_array_size;
if (shaders[i]->info.stage == MESA_SHADER_GEOMETRY) {
ctx.gs_next_vertex = ac_build_alloca(,
ctx.ac.i32, "gs_next_vertex");
-
ctx.gs_max_out_vertices =
shaders[i]->info.gs.vertices_out;
+ ctx.abi.load_inputs = load_gs_input;
} else if (shaders[i]->info.stage == MESA_SHADER_TESS_EVAL) {
ctx.tes_primitive_mode =
shaders[i]->info.tess.primitive_mode;
} else if (shaders[i]->info.stage == MESA_SHADER_VERTEX) {
if (shader_info->info.vs.needs_instance_id) {
ctx.shader_info->vs.vgpr_comp_cnt =
MAX2(3, ctx.shader_info->vs.vgpr_comp_cnt);
}
Re: [Mesa-dev] [PATCH 17/20] ac: add si_nir_load_input_gs() to the abi
On 15.11.2017 12:09, Timothy Arceri wrote:
On 15/11/17 21:56, Nicolai Hähnle wrote:
On 10.11.2017 04:13, Timothy Arceri wrote:
---
src/amd/common/ac_nir_to_llvm.c | 24
-
src/amd/common/ac_shader_abi.h | 7 ++
src/gallium/drivers/radeonsi/si_shader.c | 1 +
src/gallium/drivers/radeonsi/si_shader_internal.h | 5 +
src/gallium/drivers/radeonsi/si_shader_nir.c | 26
+++
5 files changed, 53 insertions(+), 10 deletions(-)
diff --git a/src/amd/common/ac_nir_to_llvm.c
b/src/amd/common/ac_nir_to_llvm.c
index 158e954fa8..483dd52b36 100644
--- a/src/amd/common/ac_nir_to_llvm.c
+++ b/src/amd/common/ac_nir_to_llvm.c
@@ -2854,32 +2854,31 @@ load_tes_input(struct nir_to_llvm_context *ctx,
buf_addr = LLVMBuildAdd(ctx->builder, buf_addr, comp_offset, "");
result = ac_build_buffer_load(>ac,
ctx->hs_ring_tess_offchip, instr->num_components, NULL,
buf_addr, ctx->oc_lds, is_compact ? (4 *
const_index) : 0, 1, 0, true, false);
result = trim_vector(>ac, result, instr->num_components);
result = LLVMBuildBitCast(ctx->builder, result,
get_def_type(ctx->nir, >dest.ssa), "");
return result;
}
static LLVMValueRef
-load_gs_input(struct nir_to_llvm_context *ctx,
- nir_intrinsic_instr *instr)
+load_gs_input(struct ac_shader_abi *abi,
+ nir_intrinsic_instr *instr,
+ unsigned vertex_index,
+ unsigned const_index)
{
- LLVMValueRef indir_index, vtx_offset;
- unsigned const_index;
+ struct nir_to_llvm_context *ctx =
nir_to_llvm_context_from_abi(abi);
+ LLVMValueRef vtx_offset;
LLVMValueRef args[9];
unsigned param, vtx_offset_param;
LLVMValueRef value[4], result;
- unsigned vertex_index;
- get_deref_offset(ctx->nir, instr->variables[0],
- false, _index, NULL,
- _index, _index);
+
vtx_offset_param = vertex_index;
assert(vtx_offset_param < 6);
vtx_offset = LLVMBuildMul(ctx->builder,
ctx->gs_vtx_offset[vtx_offset_param],
LLVMConstInt(ctx->ac.i32, 4, false), "");
param =
shader_io_get_unique_index(instr->variables[0]->var->data.location);
unsigned comp = instr->variables[0]->var->data.location_frac;
for (unsigned i = comp; i < instr->num_components + comp; i++) {
if (ctx->ac.chip_class >= GFX9) {
@@ -2966,21 +2965,26 @@ static LLVMValueRef visit_load_var(struct
ac_nir_context *ctx,
if (instr->dest.ssa.bit_size == 64)
ve *= 2;
switch (instr->variables[0]->var->data.mode) {
case nir_var_shader_in:
if (ctx->stage == MESA_SHADER_TESS_CTRL)
return load_tcs_input(ctx->nctx, instr);
if (ctx->stage == MESA_SHADER_TESS_EVAL)
return load_tes_input(ctx->nctx, instr);
if (ctx->stage == MESA_SHADER_GEOMETRY) {
- return load_gs_input(ctx->nctx, instr);
+ LLVMValueRef indir_index;
+ unsigned const_index, vertex_index;
+ get_deref_offset(ctx, instr->variables[0],
+ false, _index, NULL,
+ _index, _index);
The indentation looks wrong here.
+ return ctx->abi->load_inputs(ctx->abi, instr,
vertex_index, const_index);
}
for (unsigned chan = comp; chan < ve + comp; chan++) {
if (indir_index) {
unsigned count = glsl_count_attribute_slots(
instr->variables[0]->var->type,
ctx->stage == MESA_SHADER_VERTEX);
count -= chan / 4;
LLVMValueRef tmp_vec =
ac_build_gather_values_extended(
>ac, ctx->abi->inputs + idx + chan,
count,
@@ -6489,22 +6493,22 @@ LLVMModuleRef
ac_translate_nir_to_llvm(LLVMTargetMachineRef tm,
for(int i = 0; i < shader_count; ++i) {
ctx.stage = shaders[i]->info.stage;
ctx.output_mask = 0;
ctx.tess_outputs_written = 0;
ctx.num_output_clips =
shaders[i]->info.clip_distance_array_size;
ctx.num_output_culls =
shaders[i]->info.cull_distance_array_size;
if (shaders[i]->info.stage == MESA_SHADER_GEOMETRY) {
ctx.gs_next_vertex = ac_build_alloca(,
ctx.ac.i32, "gs_next_vertex");
-
ctx.gs_max_out_vertices =
shaders[i]->info.gs.vertices_out;
+ ctx.abi.load_inputs = load_gs_input;
} else if (shaders[i]->info.stage == MESA_SHADER_TESS_EVAL) {
ctx.tes_primitive_mode =
shaders[i]->info.tess.primitive_mode;
} else if (shaders[i]->info.stage == MESA_SHADER_VERTEX) {
if (shader_info->info.vs.needs_instance_id) {
ctx.shader_info->vs.vgpr_comp_cnt =
MAX2(3, ctx.shader_info->vs.vgpr_comp_cnt);
}
} else if (shaders[i]->info.stage ==
Re: [Mesa-dev] [PATCH 17/20] ac: add si_nir_load_input_gs() to the abi
On 15/11/17 21:56, Nicolai Hähnle wrote:
On 10.11.2017 04:13, Timothy Arceri wrote:
---
src/amd/common/ac_nir_to_llvm.c | 24
-
src/amd/common/ac_shader_abi.h | 7 ++
src/gallium/drivers/radeonsi/si_shader.c | 1 +
src/gallium/drivers/radeonsi/si_shader_internal.h | 5 +
src/gallium/drivers/radeonsi/si_shader_nir.c | 26
+++
5 files changed, 53 insertions(+), 10 deletions(-)
diff --git a/src/amd/common/ac_nir_to_llvm.c
b/src/amd/common/ac_nir_to_llvm.c
index 158e954fa8..483dd52b36 100644
--- a/src/amd/common/ac_nir_to_llvm.c
+++ b/src/amd/common/ac_nir_to_llvm.c
@@ -2854,32 +2854,31 @@ load_tes_input(struct nir_to_llvm_context *ctx,
buf_addr = LLVMBuildAdd(ctx->builder, buf_addr, comp_offset, "");
result = ac_build_buffer_load(>ac,
ctx->hs_ring_tess_offchip, instr->num_components, NULL,
buf_addr, ctx->oc_lds, is_compact ? (4 *
const_index) : 0, 1, 0, true, false);
result = trim_vector(>ac, result, instr->num_components);
result = LLVMBuildBitCast(ctx->builder, result,
get_def_type(ctx->nir, >dest.ssa), "");
return result;
}
static LLVMValueRef
-load_gs_input(struct nir_to_llvm_context *ctx,
- nir_intrinsic_instr *instr)
+load_gs_input(struct ac_shader_abi *abi,
+ nir_intrinsic_instr *instr,
+ unsigned vertex_index,
+ unsigned const_index)
{
- LLVMValueRef indir_index, vtx_offset;
- unsigned const_index;
+ struct nir_to_llvm_context *ctx = nir_to_llvm_context_from_abi(abi);
+ LLVMValueRef vtx_offset;
LLVMValueRef args[9];
unsigned param, vtx_offset_param;
LLVMValueRef value[4], result;
- unsigned vertex_index;
- get_deref_offset(ctx->nir, instr->variables[0],
- false, _index, NULL,
- _index, _index);
+
vtx_offset_param = vertex_index;
assert(vtx_offset_param < 6);
vtx_offset = LLVMBuildMul(ctx->builder,
ctx->gs_vtx_offset[vtx_offset_param],
LLVMConstInt(ctx->ac.i32, 4, false), "");
param =
shader_io_get_unique_index(instr->variables[0]->var->data.location);
unsigned comp = instr->variables[0]->var->data.location_frac;
for (unsigned i = comp; i < instr->num_components + comp; i++) {
if (ctx->ac.chip_class >= GFX9) {
@@ -2966,21 +2965,26 @@ static LLVMValueRef visit_load_var(struct
ac_nir_context *ctx,
if (instr->dest.ssa.bit_size == 64)
ve *= 2;
switch (instr->variables[0]->var->data.mode) {
case nir_var_shader_in:
if (ctx->stage == MESA_SHADER_TESS_CTRL)
return load_tcs_input(ctx->nctx, instr);
if (ctx->stage == MESA_SHADER_TESS_EVAL)
return load_tes_input(ctx->nctx, instr);
if (ctx->stage == MESA_SHADER_GEOMETRY) {
- return load_gs_input(ctx->nctx, instr);
+ LLVMValueRef indir_index;
+ unsigned const_index, vertex_index;
+ get_deref_offset(ctx, instr->variables[0],
+ false, _index, NULL,
+ _index, _index);
The indentation looks wrong here.
+ return ctx->abi->load_inputs(ctx->abi, instr,
vertex_index, const_index);
}
for (unsigned chan = comp; chan < ve + comp; chan++) {
if (indir_index) {
unsigned count = glsl_count_attribute_slots(
instr->variables[0]->var->type,
ctx->stage == MESA_SHADER_VERTEX);
count -= chan / 4;
LLVMValueRef tmp_vec = ac_build_gather_values_extended(
>ac, ctx->abi->inputs + idx + chan, count,
@@ -6489,22 +6493,22 @@ LLVMModuleRef
ac_translate_nir_to_llvm(LLVMTargetMachineRef tm,
for(int i = 0; i < shader_count; ++i) {
ctx.stage = shaders[i]->info.stage;
ctx.output_mask = 0;
ctx.tess_outputs_written = 0;
ctx.num_output_clips =
shaders[i]->info.clip_distance_array_size;
ctx.num_output_culls =
shaders[i]->info.cull_distance_array_size;
if (shaders[i]->info.stage == MESA_SHADER_GEOMETRY) {
ctx.gs_next_vertex = ac_build_alloca(,
ctx.ac.i32, "gs_next_vertex");
-
ctx.gs_max_out_vertices = shaders[i]->info.gs.vertices_out;
+ ctx.abi.load_inputs = load_gs_input;
} else if (shaders[i]->info.stage == MESA_SHADER_TESS_EVAL) {
ctx.tes_primitive_mode =
shaders[i]->info.tess.primitive_mode;
} else if (shaders[i]->info.stage == MESA_SHADER_VERTEX) {
if (shader_info->info.vs.needs_instance_id) {
ctx.shader_info->vs.vgpr_comp_cnt =
MAX2(3, ctx.shader_info->vs.vgpr_comp_cnt);
}
} else if (shaders[i]->info.stage == MESA_SHADER_FRAGMENT) {
Re: [Mesa-dev] [PATCH 17/20] ac: add si_nir_load_input_gs() to the abi
On 10.11.2017 04:13, Timothy Arceri wrote:
---
src/amd/common/ac_nir_to_llvm.c | 24 -
src/amd/common/ac_shader_abi.h| 7 ++
src/gallium/drivers/radeonsi/si_shader.c | 1 +
src/gallium/drivers/radeonsi/si_shader_internal.h | 5 +
src/gallium/drivers/radeonsi/si_shader_nir.c | 26 +++
5 files changed, 53 insertions(+), 10 deletions(-)
diff --git a/src/amd/common/ac_nir_to_llvm.c b/src/amd/common/ac_nir_to_llvm.c
index 158e954fa8..483dd52b36 100644
--- a/src/amd/common/ac_nir_to_llvm.c
+++ b/src/amd/common/ac_nir_to_llvm.c
@@ -2854,32 +2854,31 @@ load_tes_input(struct nir_to_llvm_context *ctx,
buf_addr = LLVMBuildAdd(ctx->builder, buf_addr, comp_offset, "");
result = ac_build_buffer_load(>ac, ctx->hs_ring_tess_offchip, instr->num_components, NULL,
buf_addr, ctx->oc_lds, is_compact ? (4 *
const_index) : 0, 1, 0, true, false);
result = trim_vector(>ac, result, instr->num_components);
result = LLVMBuildBitCast(ctx->builder, result, get_def_type(ctx->nir,
>dest.ssa), "");
return result;
}
static LLVMValueRef
-load_gs_input(struct nir_to_llvm_context *ctx,
- nir_intrinsic_instr *instr)
+load_gs_input(struct ac_shader_abi *abi,
+ nir_intrinsic_instr *instr,
+ unsigned vertex_index,
+ unsigned const_index)
{
- LLVMValueRef indir_index, vtx_offset;
- unsigned const_index;
+ struct nir_to_llvm_context *ctx = nir_to_llvm_context_from_abi(abi);
+ LLVMValueRef vtx_offset;
LLVMValueRef args[9];
unsigned param, vtx_offset_param;
LLVMValueRef value[4], result;
- unsigned vertex_index;
- get_deref_offset(ctx->nir, instr->variables[0],
-false, _index, NULL,
-_index, _index);
+
vtx_offset_param = vertex_index;
assert(vtx_offset_param < 6);
vtx_offset = LLVMBuildMul(ctx->builder,
ctx->gs_vtx_offset[vtx_offset_param],
LLVMConstInt(ctx->ac.i32, 4, false), "");
param = shader_io_get_unique_index(instr->variables[0]->var->data.location);
unsigned comp = instr->variables[0]->var->data.location_frac;
for (unsigned i = comp; i < instr->num_components + comp; i++) {
if (ctx->ac.chip_class >= GFX9) {
@@ -2966,21 +2965,26 @@ static LLVMValueRef visit_load_var(struct
ac_nir_context *ctx,
if (instr->dest.ssa.bit_size == 64)
ve *= 2;
switch (instr->variables[0]->var->data.mode) {
case nir_var_shader_in:
if (ctx->stage == MESA_SHADER_TESS_CTRL)
return load_tcs_input(ctx->nctx, instr);
if (ctx->stage == MESA_SHADER_TESS_EVAL)
return load_tes_input(ctx->nctx, instr);
if (ctx->stage == MESA_SHADER_GEOMETRY) {
- return load_gs_input(ctx->nctx, instr);
+ LLVMValueRef indir_index;
+ unsigned const_index, vertex_index;
+ get_deref_offset(ctx, instr->variables[0],
+false, _index, NULL,
+_index, _index);
The indentation looks wrong here.
+ return ctx->abi->load_inputs(ctx->abi, instr,
vertex_index, const_index);
}
for (unsigned chan = comp; chan < ve + comp; chan++) {
if (indir_index) {
unsigned count = glsl_count_attribute_slots(
instr->variables[0]->var->type,
ctx->stage ==
MESA_SHADER_VERTEX);
count -= chan / 4;
LLVMValueRef tmp_vec =
ac_build_gather_values_extended(
>ac, ctx->abi->inputs +
idx + chan, count,
@@ -6489,22 +6493,22 @@ LLVMModuleRef
ac_translate_nir_to_llvm(LLVMTargetMachineRef tm,
for(int i = 0; i < shader_count; ++i) {
ctx.stage = shaders[i]->info.stage;
ctx.output_mask = 0;
ctx.tess_outputs_written = 0;
ctx.num_output_clips =
shaders[i]->info.clip_distance_array_size;
ctx.num_output_culls =
shaders[i]->info.cull_distance_array_size;
if (shaders[i]->info.stage == MESA_SHADER_GEOMETRY) {
ctx.gs_next_vertex = ac_build_alloca(, ctx.ac.i32,
"gs_next_vertex");
-
ctx.gs_max_out_vertices =
shaders[i]->info.gs.vertices_out;
+ ctx.abi.load_inputs = load_gs_input;
} else if (shaders[i]->info.stage == MESA_SHADER_TESS_EVAL) {
[Mesa-dev] [PATCH 17/20] ac: add si_nir_load_input_gs() to the abi
---
src/amd/common/ac_nir_to_llvm.c | 24 -
src/amd/common/ac_shader_abi.h| 7 ++
src/gallium/drivers/radeonsi/si_shader.c | 1 +
src/gallium/drivers/radeonsi/si_shader_internal.h | 5 +
src/gallium/drivers/radeonsi/si_shader_nir.c | 26 +++
5 files changed, 53 insertions(+), 10 deletions(-)
diff --git a/src/amd/common/ac_nir_to_llvm.c b/src/amd/common/ac_nir_to_llvm.c
index 158e954fa8..483dd52b36 100644
--- a/src/amd/common/ac_nir_to_llvm.c
+++ b/src/amd/common/ac_nir_to_llvm.c
@@ -2854,32 +2854,31 @@ load_tes_input(struct nir_to_llvm_context *ctx,
buf_addr = LLVMBuildAdd(ctx->builder, buf_addr, comp_offset, "");
result = ac_build_buffer_load(>ac, ctx->hs_ring_tess_offchip,
instr->num_components, NULL,
buf_addr, ctx->oc_lds, is_compact ? (4 *
const_index) : 0, 1, 0, true, false);
result = trim_vector(>ac, result, instr->num_components);
result = LLVMBuildBitCast(ctx->builder, result, get_def_type(ctx->nir,
>dest.ssa), "");
return result;
}
static LLVMValueRef
-load_gs_input(struct nir_to_llvm_context *ctx,
- nir_intrinsic_instr *instr)
+load_gs_input(struct ac_shader_abi *abi,
+ nir_intrinsic_instr *instr,
+ unsigned vertex_index,
+ unsigned const_index)
{
- LLVMValueRef indir_index, vtx_offset;
- unsigned const_index;
+ struct nir_to_llvm_context *ctx = nir_to_llvm_context_from_abi(abi);
+ LLVMValueRef vtx_offset;
LLVMValueRef args[9];
unsigned param, vtx_offset_param;
LLVMValueRef value[4], result;
- unsigned vertex_index;
- get_deref_offset(ctx->nir, instr->variables[0],
-false, _index, NULL,
-_index, _index);
+
vtx_offset_param = vertex_index;
assert(vtx_offset_param < 6);
vtx_offset = LLVMBuildMul(ctx->builder,
ctx->gs_vtx_offset[vtx_offset_param],
LLVMConstInt(ctx->ac.i32, 4, false), "");
param =
shader_io_get_unique_index(instr->variables[0]->var->data.location);
unsigned comp = instr->variables[0]->var->data.location_frac;
for (unsigned i = comp; i < instr->num_components + comp; i++) {
if (ctx->ac.chip_class >= GFX9) {
@@ -2966,21 +2965,26 @@ static LLVMValueRef visit_load_var(struct
ac_nir_context *ctx,
if (instr->dest.ssa.bit_size == 64)
ve *= 2;
switch (instr->variables[0]->var->data.mode) {
case nir_var_shader_in:
if (ctx->stage == MESA_SHADER_TESS_CTRL)
return load_tcs_input(ctx->nctx, instr);
if (ctx->stage == MESA_SHADER_TESS_EVAL)
return load_tes_input(ctx->nctx, instr);
if (ctx->stage == MESA_SHADER_GEOMETRY) {
- return load_gs_input(ctx->nctx, instr);
+ LLVMValueRef indir_index;
+ unsigned const_index, vertex_index;
+ get_deref_offset(ctx, instr->variables[0],
+false, _index, NULL,
+_index, _index);
+ return ctx->abi->load_inputs(ctx->abi, instr,
vertex_index, const_index);
}
for (unsigned chan = comp; chan < ve + comp; chan++) {
if (indir_index) {
unsigned count = glsl_count_attribute_slots(
instr->variables[0]->var->type,
ctx->stage ==
MESA_SHADER_VERTEX);
count -= chan / 4;
LLVMValueRef tmp_vec =
ac_build_gather_values_extended(
>ac, ctx->abi->inputs +
idx + chan, count,
@@ -6489,22 +6493,22 @@ LLVMModuleRef
ac_translate_nir_to_llvm(LLVMTargetMachineRef tm,
for(int i = 0; i < shader_count; ++i) {
ctx.stage = shaders[i]->info.stage;
ctx.output_mask = 0;
ctx.tess_outputs_written = 0;
ctx.num_output_clips =
shaders[i]->info.clip_distance_array_size;
ctx.num_output_culls =
shaders[i]->info.cull_distance_array_size;
if (shaders[i]->info.stage == MESA_SHADER_GEOMETRY) {
ctx.gs_next_vertex = ac_build_alloca(,
ctx.ac.i32, "gs_next_vertex");
-
ctx.gs_max_out_vertices =
shaders[i]->info.gs.vertices_out;
+ ctx.abi.load_inputs = load_gs_input;
} else if (shaders[i]->info.stage == MESA_SHADER_TESS_EVAL) {
ctx.tes_primitive_mode =
shaders[i]->info.tess.primitive_mode;
