Re: [Mesa-dev] [PATCH 2/2] radeonsi: Enable loading into CE RAM.

2016-04-21 Thread Bas Nieuwenhuizen 
Hi Marek,

The hang was most likely related to something else I tried to fix the
loads and that started doing something once the loads were enabled.
With the kernel patch I had the hang too until I cleaned up the
leftovers of all my previous attempts at fixes in mesa.

- Bas



On Thu, Apr 21, 2016 at 11:44 AM, Marek Olšák  wrote:
> On Thu, Apr 21, 2016 at 1:49 AM, Bas Nieuwenhuizen
>  wrote:
>> We need to enable a bit in the CONTEXT_CONTROL packet for the
>> loads to work.
>>
>> Signed-off-by: Bas Nieuwenhuizen 
>> ---
>>  src/gallium/drivers/radeonsi/si_descriptors.c | 6 ++
>>  src/gallium/drivers/radeonsi/si_hw_context.c  | 5 +
>>  src/gallium/drivers/radeonsi/si_state.h   | 1 +
>>  3 files changed, 12 insertions(+)
>>
>> diff --git a/src/gallium/drivers/radeonsi/si_descriptors.c 
>> b/src/gallium/drivers/radeonsi/si_descriptors.c
>> index 1580e61..30e65a9 100644
>> --- a/src/gallium/drivers/radeonsi/si_descriptors.c
>> +++ b/src/gallium/drivers/radeonsi/si_descriptors.c
>> @@ -185,6 +185,12 @@ static void si_reinitialize_ce_ram(struct si_context 
>> *sctx,
>> desc->ce_ram_dirty = false;
>>  }
>>
>> +void si_ce_enable_loads(struct radeon_winsys_cs *ib) {
>> +   radeon_emit(ib, PKT3(PKT3_CONTEXT_CONTROL, 1, 0));
>> +   radeon_emit(ib, LOAD_CONTROL_UPDATE(1) | LOAD_CONTROL_CE_RAM_EN(1));
>> +   radeon_emit(ib, SHADOW_ENABLE_UPDATE(1));
>> +}
>> +
>>  static bool si_upload_descriptors(struct si_context *sctx,
>>   struct si_descriptors *desc,
>>   struct r600_atom * atom)
>> diff --git a/src/gallium/drivers/radeonsi/si_hw_context.c 
>> b/src/gallium/drivers/radeonsi/si_hw_context.c
>> index e3abb7f..e6018f3 100644
>> --- a/src/gallium/drivers/radeonsi/si_hw_context.c
>> +++ b/src/gallium/drivers/radeonsi/si_hw_context.c
>> @@ -202,6 +202,11 @@ void si_begin_new_cs(struct si_context *ctx)
>> if (ctx->init_config_gs_rings)
>> si_pm4_emit(ctx, ctx->init_config_gs_rings);
>>
>> +   if (ctx->ce_preamble_ib)
>> +   si_ce_enable_loads(ctx->ce_preamble_ib);
>> +   else if (ctx->ce_ib)
>> +   si_ce_enable_loads(ctx->ce_ib);
>
> So what was the cause of hangs you were seeing? Does it not hang when
> there is CONTEXT_CONTROL in the CE IB?
>
> Marek
___
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/mesa-dev

Re: [Mesa-dev] [PATCH 2/2] radeonsi: Enable loading into CE RAM.

2016-04-21 Thread Marek Olšák 
On Thu, Apr 21, 2016 at 1:49 AM, Bas Nieuwenhuizen
 wrote:
> We need to enable a bit in the CONTEXT_CONTROL packet for the
> loads to work.
>
> Signed-off-by: Bas Nieuwenhuizen 
> ---
>  src/gallium/drivers/radeonsi/si_descriptors.c | 6 ++
>  src/gallium/drivers/radeonsi/si_hw_context.c  | 5 +
>  src/gallium/drivers/radeonsi/si_state.h   | 1 +
>  3 files changed, 12 insertions(+)
>
> diff --git a/src/gallium/drivers/radeonsi/si_descriptors.c 
> b/src/gallium/drivers/radeonsi/si_descriptors.c
> index 1580e61..30e65a9 100644
> --- a/src/gallium/drivers/radeonsi/si_descriptors.c
> +++ b/src/gallium/drivers/radeonsi/si_descriptors.c
> @@ -185,6 +185,12 @@ static void si_reinitialize_ce_ram(struct si_context 
> *sctx,
> desc->ce_ram_dirty = false;
>  }
>
> +void si_ce_enable_loads(struct radeon_winsys_cs *ib) {
> +   radeon_emit(ib, PKT3(PKT3_CONTEXT_CONTROL, 1, 0));
> +   radeon_emit(ib, LOAD_CONTROL_UPDATE(1) | LOAD_CONTROL_CE_RAM_EN(1));
> +   radeon_emit(ib, SHADOW_ENABLE_UPDATE(1));
> +}
> +
>  static bool si_upload_descriptors(struct si_context *sctx,
>   struct si_descriptors *desc,
>   struct r600_atom * atom)
> diff --git a/src/gallium/drivers/radeonsi/si_hw_context.c 
> b/src/gallium/drivers/radeonsi/si_hw_context.c
> index e3abb7f..e6018f3 100644
> --- a/src/gallium/drivers/radeonsi/si_hw_context.c
> +++ b/src/gallium/drivers/radeonsi/si_hw_context.c
> @@ -202,6 +202,11 @@ void si_begin_new_cs(struct si_context *ctx)
> if (ctx->init_config_gs_rings)
> si_pm4_emit(ctx, ctx->init_config_gs_rings);
>
> +   if (ctx->ce_preamble_ib)
> +   si_ce_enable_loads(ctx->ce_preamble_ib);
> +   else if (ctx->ce_ib)
> +   si_ce_enable_loads(ctx->ce_ib);

So what was the cause of hangs you were seeing? Does it not hang when
there is CONTEXT_CONTROL in the CE IB?

Marek
___
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/mesa-dev

Re: [Mesa-dev] [PATCH 2/2] radeonsi: Enable loading into CE RAM.

2016-04-20 Thread Nicolai Hähnle 

On 20.04.2016 18:49, Bas Nieuwenhuizen wrote:

We need to enable a bit in the CONTEXT_CONTROL packet for the
loads to work.

Signed-off-by: Bas Nieuwenhuizen 
---
  src/gallium/drivers/radeonsi/si_descriptors.c | 6 ++
  src/gallium/drivers/radeonsi/si_hw_context.c  | 5 +
  src/gallium/drivers/radeonsi/si_state.h   | 1 +
  3 files changed, 12 insertions(+)

diff --git a/src/gallium/drivers/radeonsi/si_descriptors.c 
b/src/gallium/drivers/radeonsi/si_descriptors.c
index 1580e61..30e65a9 100644
--- a/src/gallium/drivers/radeonsi/si_descriptors.c
+++ b/src/gallium/drivers/radeonsi/si_descriptors.c
@@ -185,6 +185,12 @@ static void si_reinitialize_ce_ram(struct si_context *sctx,
desc->ce_ram_dirty = false;
  }

+void si_ce_enable_loads(struct radeon_winsys_cs *ib) {


Need to get that LLVM brace style out of your system ;-)

Apart from this and the field names, the patches are

Reviewed-by: Nicolai Hähnle 


+   radeon_emit(ib, PKT3(PKT3_CONTEXT_CONTROL, 1, 0));
+   radeon_emit(ib, LOAD_CONTROL_UPDATE(1) | LOAD_CONTROL_CE_RAM_EN(1));
+   radeon_emit(ib, SHADOW_ENABLE_UPDATE(1));
+}
+
  static bool si_upload_descriptors(struct si_context *sctx,
  struct si_descriptors *desc,
  struct r600_atom * atom)
diff --git a/src/gallium/drivers/radeonsi/si_hw_context.c 
b/src/gallium/drivers/radeonsi/si_hw_context.c
index e3abb7f..e6018f3 100644
--- a/src/gallium/drivers/radeonsi/si_hw_context.c
+++ b/src/gallium/drivers/radeonsi/si_hw_context.c
@@ -202,6 +202,11 @@ void si_begin_new_cs(struct si_context *ctx)
if (ctx->init_config_gs_rings)
si_pm4_emit(ctx, ctx->init_config_gs_rings);

+   if (ctx->ce_preamble_ib)
+   si_ce_enable_loads(ctx->ce_preamble_ib);
+   else if (ctx->ce_ib)
+   si_ce_enable_loads(ctx->ce_ib);
+
ctx->framebuffer.dirty_cbufs = (1 << 8) - 1;
ctx->framebuffer.dirty_zsbuf = true;
si_mark_atom_dirty(ctx, >framebuffer.atom);
diff --git a/src/gallium/drivers/radeonsi/si_state.h 
b/src/gallium/drivers/radeonsi/si_state.h
index c4b2b45..cbe91dd 100644
--- a/src/gallium/drivers/radeonsi/si_state.h
+++ b/src/gallium/drivers/radeonsi/si_state.h
@@ -251,6 +251,7 @@ struct si_buffer_resources {
} while(0)

  /* si_descriptors.c */
+void si_ce_enable_loads(struct radeon_winsys_cs *ib);
  void si_set_ring_buffer(struct pipe_context *ctx, uint shader, uint slot,
struct pipe_resource *buffer,
unsigned stride, unsigned num_records,


___
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/mesa-dev

[Mesa-dev] [PATCH 2/2] radeonsi: Enable loading into CE RAM.

2016-04-20 Thread Bas Nieuwenhuizen 
We need to enable a bit in the CONTEXT_CONTROL packet for the
loads to work.

Signed-off-by: Bas Nieuwenhuizen 
---
 src/gallium/drivers/radeonsi/si_descriptors.c | 6 ++
 src/gallium/drivers/radeonsi/si_hw_context.c  | 5 +
 src/gallium/drivers/radeonsi/si_state.h   | 1 +
 3 files changed, 12 insertions(+)

diff --git a/src/gallium/drivers/radeonsi/si_descriptors.c 
b/src/gallium/drivers/radeonsi/si_descriptors.c
index 1580e61..30e65a9 100644
--- a/src/gallium/drivers/radeonsi/si_descriptors.c
+++ b/src/gallium/drivers/radeonsi/si_descriptors.c
@@ -185,6 +185,12 @@ static void si_reinitialize_ce_ram(struct si_context *sctx,
desc->ce_ram_dirty = false;
 }
 
+void si_ce_enable_loads(struct radeon_winsys_cs *ib) {
+   radeon_emit(ib, PKT3(PKT3_CONTEXT_CONTROL, 1, 0));
+   radeon_emit(ib, LOAD_CONTROL_UPDATE(1) | LOAD_CONTROL_CE_RAM_EN(1));
+   radeon_emit(ib, SHADOW_ENABLE_UPDATE(1));
+}
+
 static bool si_upload_descriptors(struct si_context *sctx,
  struct si_descriptors *desc,
  struct r600_atom * atom)
diff --git a/src/gallium/drivers/radeonsi/si_hw_context.c 
b/src/gallium/drivers/radeonsi/si_hw_context.c
index e3abb7f..e6018f3 100644
--- a/src/gallium/drivers/radeonsi/si_hw_context.c
+++ b/src/gallium/drivers/radeonsi/si_hw_context.c
@@ -202,6 +202,11 @@ void si_begin_new_cs(struct si_context *ctx)
if (ctx->init_config_gs_rings)
si_pm4_emit(ctx, ctx->init_config_gs_rings);
 
+   if (ctx->ce_preamble_ib)
+   si_ce_enable_loads(ctx->ce_preamble_ib);
+   else if (ctx->ce_ib)
+   si_ce_enable_loads(ctx->ce_ib);
+
ctx->framebuffer.dirty_cbufs = (1 << 8) - 1;
ctx->framebuffer.dirty_zsbuf = true;
si_mark_atom_dirty(ctx, >framebuffer.atom);
diff --git a/src/gallium/drivers/radeonsi/si_state.h 
b/src/gallium/drivers/radeonsi/si_state.h
index c4b2b45..cbe91dd 100644
--- a/src/gallium/drivers/radeonsi/si_state.h
+++ b/src/gallium/drivers/radeonsi/si_state.h
@@ -251,6 +251,7 @@ struct si_buffer_resources {
} while(0)
 
 /* si_descriptors.c */
+void si_ce_enable_loads(struct radeon_winsys_cs *ib);
 void si_set_ring_buffer(struct pipe_context *ctx, uint shader, uint slot,
struct pipe_resource *buffer,
unsigned stride, unsigned num_records,
-- 
2.8.0

___
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/mesa-dev