Re: [Mesa-dev] [PATCH 2/3] radv: merge radv_dcc_clear_level() into radv_clear_dcc()
On Mon, Jul 1, 2019 at 2:15 PM Samuel Pitoiset
wrote:
>
>
> On 7/1/19 2:13 PM, Bas Nieuwenhuizen wrote:
> > On Thu, Jun 27, 2019 at 3:02 PM Samuel Pitoiset
> > wrote:
> >> This will help for clearing DCC arrays because we need to know
> >> the subresource range.
> > How will it help? I don't think we use it in the next commit in the series?
> It will help for arrays, not levels. I can add it into a different
> series if you prefer.
Please do. IMO it makes the code messier, so I'd be great if we keep
it in the same series as the user of the change.
> >> Signed-off-by: Samuel Pitoiset
> >> ---
> >> src/amd/vulkan/radv_meta_clear.c | 52 ++--
> >> 1 file changed, 22 insertions(+), 30 deletions(-)
> >>
> >> diff --git a/src/amd/vulkan/radv_meta_clear.c
> >> b/src/amd/vulkan/radv_meta_clear.c
> >> index b0b17f4f7b3..e5181daf0f2 100644
> >> --- a/src/amd/vulkan/radv_meta_clear.c
> >> +++ b/src/amd/vulkan/radv_meta_clear.c
> >> @@ -1367,34 +1367,6 @@ radv_clear_fmask(struct radv_cmd_buffer *cmd_buffer,
> >> return radv_fill_buffer(cmd_buffer, image->bo, offset, size,
> >> value);
> >> }
> >>
> >> -static uint32_t
> >> -radv_dcc_clear_level(struct radv_cmd_buffer *cmd_buffer,
> >> -const struct radv_image *image,
> >> -uint32_t level, uint32_t value)
> >> -{
> >> - uint64_t offset = image->offset + image->dcc_offset;
> >> - uint32_t size;
> >> -
> >> - if (cmd_buffer->device->physical_device->rad_info.chip_class >=
> >> GFX9) {
> >> - /* Mipmap levels aren't implemented. */
> >> - assert(level == 0);
> >> - size = image->planes[0].surface.dcc_size;
> >> - } else {
> >> - const struct legacy_surf_level *surf_level =
> >> - >planes[0].surface.u.legacy.level[level];
> >> -
> >> - /* If dcc_fast_clear_size is 0 (which might happens for
> >> -* mipmaps) the fill buffer operation below is a no-op.
> >> This
> >> -* can only happen during initialization as the fast clear
> >> path
> >> -* fallbacks to slow clears if one level can't be fast
> >> cleared.
> >> -*/
> >> - offset += surf_level->dcc_offset;
> >> - size = surf_level->dcc_fast_clear_size;
> >> - }
> >> -
> >> - return radv_fill_buffer(cmd_buffer, image->bo, offset, size,
> >> value);
> >> -}
> >> -
> >> uint32_t
> >> radv_clear_dcc(struct radv_cmd_buffer *cmd_buffer,
> >> struct radv_image *image,
> >> @@ -1407,10 +1379,30 @@ radv_clear_dcc(struct radv_cmd_buffer *cmd_buffer,
> >> radv_update_dcc_metadata(cmd_buffer, image, range, true);
> >>
> >> for (uint32_t l = 0; l < level_count; l++) {
> >> + uint64_t offset = image->offset + image->dcc_offset;
> >> uint32_t level = range->baseMipLevel + l;
> >> + uint64_t size;
> >> +
> >> + if
> >> (cmd_buffer->device->physical_device->rad_info.chip_class >= GFX9) {
> >> + /* Mipmap levels aren't implemented. */
> >> + assert(level == 0);
> >> + size = image->planes[0].surface.dcc_size;
> >> + } else {
> >> + const struct legacy_surf_level *surf_level =
> >> +
> >> >planes[0].surface.u.legacy.level[level];
> >> +
> >> + /* If dcc_fast_clear_size is 0 (which might
> >> happens for
> >> +* mipmaps) the fill buffer operation below is a
> >> no-op.
> >> +* This can only happen during initialization as
> >> the
> >> +* fast clear path fallbacks to slow clears if one
> >> +* level can't be fast cleared.
> >> +*/
> >> + offset += surf_level->dcc_offset;
> >> + size = surf_level->dcc_fast_clear_size;
> >> + }
> >>
> >> - flush_bits |= radv_dcc_clear_level(cmd_buffer, image,
> >> - level, value);
> >> + flush_bits |= radv_fill_buffer(cmd_buffer, image->bo,
> >> offset,
> >> + size, value);
> >> }
> >>
> >> return flush_bits;
> >> --
> >> 2.22.0
> >>
> >> ___
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> >> mesa-dev@lists.freedesktop.org
> >> https://lists.freedesktop.org/mailman/listinfo/mesa-dev
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Re: [Mesa-dev] [PATCH 2/3] radv: merge radv_dcc_clear_level() into radv_clear_dcc()
On 7/1/19 2:13 PM, Bas Nieuwenhuizen wrote:
On Thu, Jun 27, 2019 at 3:02 PM Samuel Pitoiset
wrote:
This will help for clearing DCC arrays because we need to know
the subresource range.
How will it help? I don't think we use it in the next commit in the series?
It will help for arrays, not levels. I can add it into a different
series if you prefer.
Signed-off-by: Samuel Pitoiset
---
src/amd/vulkan/radv_meta_clear.c | 52 ++--
1 file changed, 22 insertions(+), 30 deletions(-)
diff --git a/src/amd/vulkan/radv_meta_clear.c b/src/amd/vulkan/radv_meta_clear.c
index b0b17f4f7b3..e5181daf0f2 100644
--- a/src/amd/vulkan/radv_meta_clear.c
+++ b/src/amd/vulkan/radv_meta_clear.c
@@ -1367,34 +1367,6 @@ radv_clear_fmask(struct radv_cmd_buffer *cmd_buffer,
return radv_fill_buffer(cmd_buffer, image->bo, offset, size, value);
}
-static uint32_t
-radv_dcc_clear_level(struct radv_cmd_buffer *cmd_buffer,
-const struct radv_image *image,
-uint32_t level, uint32_t value)
-{
- uint64_t offset = image->offset + image->dcc_offset;
- uint32_t size;
-
- if (cmd_buffer->device->physical_device->rad_info.chip_class >= GFX9) {
- /* Mipmap levels aren't implemented. */
- assert(level == 0);
- size = image->planes[0].surface.dcc_size;
- } else {
- const struct legacy_surf_level *surf_level =
- >planes[0].surface.u.legacy.level[level];
-
- /* If dcc_fast_clear_size is 0 (which might happens for
-* mipmaps) the fill buffer operation below is a no-op. This
-* can only happen during initialization as the fast clear path
-* fallbacks to slow clears if one level can't be fast cleared.
-*/
- offset += surf_level->dcc_offset;
- size = surf_level->dcc_fast_clear_size;
- }
-
- return radv_fill_buffer(cmd_buffer, image->bo, offset, size, value);
-}
-
uint32_t
radv_clear_dcc(struct radv_cmd_buffer *cmd_buffer,
struct radv_image *image,
@@ -1407,10 +1379,30 @@ radv_clear_dcc(struct radv_cmd_buffer *cmd_buffer,
radv_update_dcc_metadata(cmd_buffer, image, range, true);
for (uint32_t l = 0; l < level_count; l++) {
+ uint64_t offset = image->offset + image->dcc_offset;
uint32_t level = range->baseMipLevel + l;
+ uint64_t size;
+
+ if (cmd_buffer->device->physical_device->rad_info.chip_class >=
GFX9) {
+ /* Mipmap levels aren't implemented. */
+ assert(level == 0);
+ size = image->planes[0].surface.dcc_size;
+ } else {
+ const struct legacy_surf_level *surf_level =
+ >planes[0].surface.u.legacy.level[level];
+
+ /* If dcc_fast_clear_size is 0 (which might happens for
+* mipmaps) the fill buffer operation below is a no-op.
+* This can only happen during initialization as the
+* fast clear path fallbacks to slow clears if one
+* level can't be fast cleared.
+*/
+ offset += surf_level->dcc_offset;
+ size = surf_level->dcc_fast_clear_size;
+ }
- flush_bits |= radv_dcc_clear_level(cmd_buffer, image,
- level, value);
+ flush_bits |= radv_fill_buffer(cmd_buffer, image->bo, offset,
+ size, value);
}
return flush_bits;
--
2.22.0
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Re: [Mesa-dev] [PATCH 2/3] radv: merge radv_dcc_clear_level() into radv_clear_dcc()
On Thu, Jun 27, 2019 at 3:02 PM Samuel Pitoiset
wrote:
>
> This will help for clearing DCC arrays because we need to know
> the subresource range.
How will it help? I don't think we use it in the next commit in the series?
>
> Signed-off-by: Samuel Pitoiset
> ---
> src/amd/vulkan/radv_meta_clear.c | 52 ++--
> 1 file changed, 22 insertions(+), 30 deletions(-)
>
> diff --git a/src/amd/vulkan/radv_meta_clear.c
> b/src/amd/vulkan/radv_meta_clear.c
> index b0b17f4f7b3..e5181daf0f2 100644
> --- a/src/amd/vulkan/radv_meta_clear.c
> +++ b/src/amd/vulkan/radv_meta_clear.c
> @@ -1367,34 +1367,6 @@ radv_clear_fmask(struct radv_cmd_buffer *cmd_buffer,
> return radv_fill_buffer(cmd_buffer, image->bo, offset, size, value);
> }
>
> -static uint32_t
> -radv_dcc_clear_level(struct radv_cmd_buffer *cmd_buffer,
> -const struct radv_image *image,
> -uint32_t level, uint32_t value)
> -{
> - uint64_t offset = image->offset + image->dcc_offset;
> - uint32_t size;
> -
> - if (cmd_buffer->device->physical_device->rad_info.chip_class >= GFX9)
> {
> - /* Mipmap levels aren't implemented. */
> - assert(level == 0);
> - size = image->planes[0].surface.dcc_size;
> - } else {
> - const struct legacy_surf_level *surf_level =
> - >planes[0].surface.u.legacy.level[level];
> -
> - /* If dcc_fast_clear_size is 0 (which might happens for
> -* mipmaps) the fill buffer operation below is a no-op. This
> -* can only happen during initialization as the fast clear
> path
> -* fallbacks to slow clears if one level can't be fast
> cleared.
> -*/
> - offset += surf_level->dcc_offset;
> - size = surf_level->dcc_fast_clear_size;
> - }
> -
> - return radv_fill_buffer(cmd_buffer, image->bo, offset, size, value);
> -}
> -
> uint32_t
> radv_clear_dcc(struct radv_cmd_buffer *cmd_buffer,
>struct radv_image *image,
> @@ -1407,10 +1379,30 @@ radv_clear_dcc(struct radv_cmd_buffer *cmd_buffer,
> radv_update_dcc_metadata(cmd_buffer, image, range, true);
>
> for (uint32_t l = 0; l < level_count; l++) {
> + uint64_t offset = image->offset + image->dcc_offset;
> uint32_t level = range->baseMipLevel + l;
> + uint64_t size;
> +
> + if (cmd_buffer->device->physical_device->rad_info.chip_class
> >= GFX9) {
> + /* Mipmap levels aren't implemented. */
> + assert(level == 0);
> + size = image->planes[0].surface.dcc_size;
> + } else {
> + const struct legacy_surf_level *surf_level =
> +
> >planes[0].surface.u.legacy.level[level];
> +
> + /* If dcc_fast_clear_size is 0 (which might happens
> for
> +* mipmaps) the fill buffer operation below is a
> no-op.
> +* This can only happen during initialization as the
> +* fast clear path fallbacks to slow clears if one
> +* level can't be fast cleared.
> +*/
> + offset += surf_level->dcc_offset;
> + size = surf_level->dcc_fast_clear_size;
> + }
>
> - flush_bits |= radv_dcc_clear_level(cmd_buffer, image,
> - level, value);
> + flush_bits |= radv_fill_buffer(cmd_buffer, image->bo, offset,
> + size, value);
> }
>
> return flush_bits;
> --
> 2.22.0
>
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[Mesa-dev] [PATCH 2/3] radv: merge radv_dcc_clear_level() into radv_clear_dcc()
This will help for clearing DCC arrays because we need to know
the subresource range.
Signed-off-by: Samuel Pitoiset
---
src/amd/vulkan/radv_meta_clear.c | 52 ++--
1 file changed, 22 insertions(+), 30 deletions(-)
diff --git a/src/amd/vulkan/radv_meta_clear.c b/src/amd/vulkan/radv_meta_clear.c
index b0b17f4f7b3..e5181daf0f2 100644
--- a/src/amd/vulkan/radv_meta_clear.c
+++ b/src/amd/vulkan/radv_meta_clear.c
@@ -1367,34 +1367,6 @@ radv_clear_fmask(struct radv_cmd_buffer *cmd_buffer,
return radv_fill_buffer(cmd_buffer, image->bo, offset, size, value);
}
-static uint32_t
-radv_dcc_clear_level(struct radv_cmd_buffer *cmd_buffer,
-const struct radv_image *image,
-uint32_t level, uint32_t value)
-{
- uint64_t offset = image->offset + image->dcc_offset;
- uint32_t size;
-
- if (cmd_buffer->device->physical_device->rad_info.chip_class >= GFX9) {
- /* Mipmap levels aren't implemented. */
- assert(level == 0);
- size = image->planes[0].surface.dcc_size;
- } else {
- const struct legacy_surf_level *surf_level =
- >planes[0].surface.u.legacy.level[level];
-
- /* If dcc_fast_clear_size is 0 (which might happens for
-* mipmaps) the fill buffer operation below is a no-op. This
-* can only happen during initialization as the fast clear path
-* fallbacks to slow clears if one level can't be fast cleared.
-*/
- offset += surf_level->dcc_offset;
- size = surf_level->dcc_fast_clear_size;
- }
-
- return radv_fill_buffer(cmd_buffer, image->bo, offset, size, value);
-}
-
uint32_t
radv_clear_dcc(struct radv_cmd_buffer *cmd_buffer,
struct radv_image *image,
@@ -1407,10 +1379,30 @@ radv_clear_dcc(struct radv_cmd_buffer *cmd_buffer,
radv_update_dcc_metadata(cmd_buffer, image, range, true);
for (uint32_t l = 0; l < level_count; l++) {
+ uint64_t offset = image->offset + image->dcc_offset;
uint32_t level = range->baseMipLevel + l;
+ uint64_t size;
+
+ if (cmd_buffer->device->physical_device->rad_info.chip_class >=
GFX9) {
+ /* Mipmap levels aren't implemented. */
+ assert(level == 0);
+ size = image->planes[0].surface.dcc_size;
+ } else {
+ const struct legacy_surf_level *surf_level =
+ >planes[0].surface.u.legacy.level[level];
+
+ /* If dcc_fast_clear_size is 0 (which might happens for
+* mipmaps) the fill buffer operation below is a no-op.
+* This can only happen during initialization as the
+* fast clear path fallbacks to slow clears if one
+* level can't be fast cleared.
+*/
+ offset += surf_level->dcc_offset;
+ size = surf_level->dcc_fast_clear_size;
+ }
- flush_bits |= radv_dcc_clear_level(cmd_buffer, image,
- level, value);
+ flush_bits |= radv_fill_buffer(cmd_buffer, image->bo, offset,
+ size, value);
}
return flush_bits;
--
2.22.0
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