Let all the while loop stack just store the instruction index. This is somehow more flexible than store the instruction memory address.
This is a prepare work of let us increase the instruction store size dynamically by reralloc. Signed-off-by: Yuanhan Liu <yuanhan....@linux.intel.com> --- src/mesa/drivers/dri/i965/brw_clip_line.c | 4 ++-- src/mesa/drivers/dri/i965/brw_clip_tri.c | 12 ++++++------ src/mesa/drivers/dri/i965/brw_clip_unfilled.c | 10 +++++----- src/mesa/drivers/dri/i965/brw_eu.h | 2 +- src/mesa/drivers/dri/i965/brw_eu_emit.c | 11 ++++++----- src/mesa/drivers/dri/i965/brw_fs_emit.cpp | 15 ++++++++------- src/mesa/drivers/dri/i965/brw_vec4_emit.cpp | 15 ++++++++------- src/mesa/drivers/dri/i965/brw_vs_emit.c | 12 +++++++----- 8 files changed, 43 insertions(+), 38 deletions(-) diff --git a/src/mesa/drivers/dri/i965/brw_clip_line.c b/src/mesa/drivers/dri/i965/brw_clip_line.c index 4313637..c37ac53 100644 --- a/src/mesa/drivers/dri/i965/brw_clip_line.c +++ b/src/mesa/drivers/dri/i965/brw_clip_line.c @@ -132,7 +132,7 @@ static void clip_and_emit_line( struct brw_clip_compile *c ) struct brw_indirect newvtx0 = brw_indirect(2, 0); struct brw_indirect newvtx1 = brw_indirect(3, 0); struct brw_indirect plane_ptr = brw_indirect(4, 0); - struct brw_instruction *plane_loop; + int plane_loop; struct brw_reg v1_null_ud = retype(vec1(brw_null_reg()), BRW_REGISTER_TYPE_UD); GLuint hpos_offset = brw_vert_result_to_offset(&c->vue_map, VERT_RESULT_HPOS); @@ -160,7 +160,7 @@ static void clip_and_emit_line( struct brw_clip_compile *c ) brw_set_predicate_control(p, BRW_PREDICATE_NONE); - plane_loop = brw_insn_of(p, brw_DO(p, BRW_EXECUTE_1)); + plane_loop = brw_DO(p, BRW_EXECUTE_1); { /* if (planemask & 1) */ diff --git a/src/mesa/drivers/dri/i965/brw_clip_tri.c b/src/mesa/drivers/dri/i965/brw_clip_tri.c index 97eae35..3182a98 100644 --- a/src/mesa/drivers/dri/i965/brw_clip_tri.c +++ b/src/mesa/drivers/dri/i965/brw_clip_tri.c @@ -232,8 +232,8 @@ void brw_clip_tri( struct brw_clip_compile *c ) struct brw_indirect inlist_ptr = brw_indirect(4, 0); struct brw_indirect outlist_ptr = brw_indirect(5, 0); struct brw_indirect freelist_ptr = brw_indirect(6, 0); - struct brw_instruction *plane_loop; - struct brw_instruction *vertex_loop; + int plane_loop; + int vertex_loop; GLuint hpos_offset = brw_vert_result_to_offset(&c->vue_map, VERT_RESULT_HPOS); @@ -244,7 +244,7 @@ void brw_clip_tri( struct brw_clip_compile *c ) brw_MOV(p, get_addr_reg(freelist_ptr), brw_address(c->reg.vertex[3]) ); - plane_loop = brw_insn_of(p, brw_DO(p, BRW_EXECUTE_1)); + plane_loop = brw_DO(p, BRW_EXECUTE_1); { /* if (planemask & 1) */ @@ -266,7 +266,7 @@ void brw_clip_tri( struct brw_clip_compile *c ) brw_MOV(p, c->reg.loopcount, c->reg.nr_verts); brw_MOV(p, c->reg.nr_verts, brw_imm_ud(0)); - vertex_loop = brw_insn_of(p, brw_DO(p, BRW_EXECUTE_1)); + vertex_loop = brw_DO(p, BRW_EXECUTE_1); { /* vtx = *input_ptr; */ @@ -404,7 +404,7 @@ void brw_clip_tri( struct brw_clip_compile *c ) void brw_clip_tri_emit_polygon(struct brw_clip_compile *c) { struct brw_compile *p = &c->func; - struct brw_instruction *loop; + int loop; /* for (loopcount = nr_verts-2; loopcount > 0; loopcount--) */ @@ -427,7 +427,7 @@ void brw_clip_tri_emit_polygon(struct brw_clip_compile *c) brw_ADD(p, get_addr_reg(vptr), get_addr_reg(vptr), brw_imm_uw(2)); brw_MOV(p, get_addr_reg(v0), deref_1uw(vptr, 0)); - loop = brw_insn_of(p, brw_DO(p, BRW_EXECUTE_1)); + loop = brw_DO(p, BRW_EXECUTE_1); { brw_clip_emit_vue(c, v0, 1, 0, (_3DPRIM_TRIFAN << 2)); diff --git a/src/mesa/drivers/dri/i965/brw_clip_unfilled.c b/src/mesa/drivers/dri/i965/brw_clip_unfilled.c index 2a984fe..d057695 100644 --- a/src/mesa/drivers/dri/i965/brw_clip_unfilled.c +++ b/src/mesa/drivers/dri/i965/brw_clip_unfilled.c @@ -273,7 +273,7 @@ static void emit_lines(struct brw_clip_compile *c, bool do_offset) { struct brw_compile *p = &c->func; - struct brw_instruction *loop; + int loop; struct brw_indirect v0 = brw_indirect(0, 0); struct brw_indirect v1 = brw_indirect(1, 0); struct brw_indirect v0ptr = brw_indirect(2, 0); @@ -285,7 +285,7 @@ static void emit_lines(struct brw_clip_compile *c, brw_MOV(p, c->reg.loopcount, c->reg.nr_verts); brw_MOV(p, get_addr_reg(v0ptr), brw_address(c->reg.inlist)); - loop = brw_insn_of(p, brw_DO(p, BRW_EXECUTE_1)); + loop = brw_DO(p, BRW_EXECUTE_1); { brw_MOV(p, get_addr_reg(v0), deref_1uw(v0ptr, 0)); brw_ADD(p, get_addr_reg(v0ptr), get_addr_reg(v0ptr), brw_imm_uw(2)); @@ -307,7 +307,7 @@ static void emit_lines(struct brw_clip_compile *c, brw_ADD(p, get_addr_reg(v1ptr), get_addr_reg(v1ptr), retype(c->reg.nr_verts, BRW_REGISTER_TYPE_UW)); brw_MOV(p, deref_1uw(v1ptr, 0), deref_1uw(v0ptr, 0)); - loop = brw_insn_of(p, brw_DO(p, BRW_EXECUTE_1)); + loop = brw_DO(p, BRW_EXECUTE_1); { brw_MOV(p, get_addr_reg(v0), deref_1uw(v0ptr, 0)); brw_MOV(p, get_addr_reg(v1), deref_1uw(v0ptr, 2)); @@ -338,7 +338,7 @@ static void emit_points(struct brw_clip_compile *c, bool do_offset ) { struct brw_compile *p = &c->func; - struct brw_instruction *loop; + int loop; struct brw_indirect v0 = brw_indirect(0, 0); struct brw_indirect v0ptr = brw_indirect(2, 0); @@ -346,7 +346,7 @@ static void emit_points(struct brw_clip_compile *c, brw_MOV(p, c->reg.loopcount, c->reg.nr_verts); brw_MOV(p, get_addr_reg(v0ptr), brw_address(c->reg.inlist)); - loop = brw_insn_of(p, brw_DO(p, BRW_EXECUTE_1)); + loop = brw_DO(p, BRW_EXECUTE_1); { brw_MOV(p, get_addr_reg(v0), deref_1uw(v0ptr, 0)); brw_ADD(p, get_addr_reg(v0ptr), get_addr_reg(v0ptr), brw_imm_uw(2)); diff --git a/src/mesa/drivers/dri/i965/brw_eu.h b/src/mesa/drivers/dri/i965/brw_eu.h index 53c0383..638358f 100644 --- a/src/mesa/drivers/dri/i965/brw_eu.h +++ b/src/mesa/drivers/dri/i965/brw_eu.h @@ -1002,7 +1002,7 @@ void brw_ENDIF(struct brw_compile *p); */ int brw_DO(struct brw_compile *p, GLuint execute_size); -int brw_WHILE(struct brw_compile *p, struct brw_instruction *patch_insn); +int brw_WHILE(struct brw_compile *p, int do_insn_idx); int brw_BREAK(struct brw_compile *p, int pop_count); int brw_CONT(struct brw_compile *p, int pop_count); diff --git a/src/mesa/drivers/dri/i965/brw_eu_emit.c b/src/mesa/drivers/dri/i965/brw_eu_emit.c index 9b37e81..a611a1b 100644 --- a/src/mesa/drivers/dri/i965/brw_eu_emit.c +++ b/src/mesa/drivers/dri/i965/brw_eu_emit.c @@ -1293,11 +1293,12 @@ int brw_DO(struct brw_compile *p, GLuint execute_size) -int brw_WHILE(struct brw_compile *p, struct brw_instruction *do_insn) +int brw_WHILE(struct brw_compile *p, int do_insn_idx) { struct intel_context *intel = &p->brw->intel; int insn_idx = next_insn(p, BRW_OPCODE_WHILE); struct brw_instruction *insn = brw_insn_of(p, insn_idx); + struct brw_instruction *do_insn = brw_insn_of(p, do_insn_idx); GLuint br = 1; if (intel->gen >= 5) @@ -1307,12 +1308,12 @@ int brw_WHILE(struct brw_compile *p, struct brw_instruction *do_insn) brw_set_dest(p, insn, retype(brw_null_reg(), BRW_REGISTER_TYPE_D)); brw_set_src0(p, insn, retype(brw_null_reg(), BRW_REGISTER_TYPE_D)); brw_set_src1(p, insn, brw_imm_ud(0)); - insn->bits3.break_cont.jip = br * (do_insn - insn); + insn->bits3.break_cont.jip = br * (do_insn_idx - insn_idx); insn->header.execution_size = BRW_EXECUTE_8; } else if (intel->gen == 6) { brw_set_dest(p, insn, brw_imm_w(0)); - insn->bits1.branch_gen6.jump_count = br * (do_insn - insn); + insn->bits1.branch_gen6.jump_count = br * (do_insn_idx - insn_idx); brw_set_src0(p, insn, retype(brw_null_reg(), BRW_REGISTER_TYPE_D)); brw_set_src1(p, insn, retype(brw_null_reg(), BRW_REGISTER_TYPE_D)); @@ -1321,7 +1322,7 @@ int brw_WHILE(struct brw_compile *p, struct brw_instruction *do_insn) if (p->single_program_flow) { brw_set_dest(p, insn, brw_ip_reg()); brw_set_src0(p, insn, brw_ip_reg()); - brw_set_src1(p, insn, brw_imm_d((do_insn - insn) * 16)); + brw_set_src1(p, insn, brw_imm_d((do_insn_idx - insn_idx) * 16)); insn->header.execution_size = BRW_EXECUTE_1; } else { assert(do_insn->header.opcode == BRW_OPCODE_DO); @@ -1331,7 +1332,7 @@ int brw_WHILE(struct brw_compile *p, struct brw_instruction *do_insn) brw_set_src1(p, insn, brw_imm_d(0)); insn->header.execution_size = do_insn->header.execution_size; - insn->bits3.if_else.jump_count = br * (do_insn - insn + 1); + insn->bits3.if_else.jump_count = br * (do_insn_idx - insn_idx + 1); insn->bits3.if_else.pop_count = 0; insn->bits3.if_else.pad0 = 0; } diff --git a/src/mesa/drivers/dri/i965/brw_fs_emit.cpp b/src/mesa/drivers/dri/i965/brw_fs_emit.cpp index f78723e..44f5878 100644 --- a/src/mesa/drivers/dri/i965/brw_fs_emit.cpp +++ b/src/mesa/drivers/dri/i965/brw_fs_emit.cpp @@ -641,8 +641,7 @@ fs_visitor::generate_code() int loop_stack_array_size = 16; int loop_stack_depth = 0; - brw_instruction **loop_stack = - rzalloc_array(this->mem_ctx, brw_instruction *, loop_stack_array_size); + int *loop_stack = rzalloc_array(this->mem_ctx, int, loop_stack_array_size); int *if_depth_in_loop = rzalloc_array(this->mem_ctx, int, loop_stack_array_size); @@ -778,10 +777,10 @@ fs_visitor::generate_code() break; case BRW_OPCODE_DO: - loop_stack[loop_stack_depth++] = brw_insn_of(p, brw_DO(p, BRW_EXECUTE_8)); + loop_stack[loop_stack_depth++] = brw_DO(p, BRW_EXECUTE_8); if (loop_stack_array_size <= loop_stack_depth) { loop_stack_array_size *= 2; - loop_stack = reralloc(this->mem_ctx, loop_stack, brw_instruction *, + loop_stack = reralloc(this->mem_ctx, loop_stack, int, loop_stack_array_size); if_depth_in_loop = reralloc(this->mem_ctx, if_depth_in_loop, int, loop_stack_array_size); @@ -803,6 +802,7 @@ fs_visitor::generate_code() break; case BRW_OPCODE_WHILE: { + int inst0_idx; struct brw_instruction *inst0, *inst1; GLuint br = 1; @@ -811,11 +811,12 @@ fs_visitor::generate_code() assert(loop_stack_depth > 0); loop_stack_depth--; - inst0 = inst1 = brw_insn_of(p, brw_WHILE(p, loop_stack[loop_stack_depth])); + inst0_idx = brw_WHILE(p, loop_stack[loop_stack_depth]); + inst0 = inst1 = brw_insn_of(p, inst0_idx); if (intel->gen < 6) { /* patch all the BREAK/CONT instructions from last BGNLOOP */ - while (inst0 > loop_stack[loop_stack_depth]) { - inst0--; + while (inst0_idx > loop_stack[loop_stack_depth]) { + inst0 = brw_insn_of(p, --inst0_idx); if (inst0->header.opcode == BRW_OPCODE_BREAK && inst0->bits3.if_else.jump_count == 0) { inst0->bits3.if_else.jump_count = br * (inst1 - inst0 + 1); diff --git a/src/mesa/drivers/dri/i965/brw_vec4_emit.cpp b/src/mesa/drivers/dri/i965/brw_vec4_emit.cpp index e36adae..dc40763 100644 --- a/src/mesa/drivers/dri/i965/brw_vec4_emit.cpp +++ b/src/mesa/drivers/dri/i965/brw_vec4_emit.cpp @@ -678,8 +678,7 @@ vec4_visitor::generate_code() int loop_stack_array_size = 16; int loop_stack_depth = 0; - brw_instruction **loop_stack = - rzalloc_array(this->mem_ctx, brw_instruction *, loop_stack_array_size); + int *loop_stack = rzalloc_array(this->mem_ctx, int, loop_stack_array_size); int *if_depth_in_loop = rzalloc_array(this->mem_ctx, int, loop_stack_array_size); @@ -809,10 +808,10 @@ vec4_visitor::generate_code() break; case BRW_OPCODE_DO: - loop_stack[loop_stack_depth++] = brw_insn_of(p, brw_DO(p, BRW_EXECUTE_8)); + loop_stack[loop_stack_depth++] = brw_DO(p, BRW_EXECUTE_8); if (loop_stack_array_size <= loop_stack_depth) { loop_stack_array_size *= 2; - loop_stack = reralloc(this->mem_ctx, loop_stack, brw_instruction *, + loop_stack = reralloc(this->mem_ctx, loop_stack, int, loop_stack_array_size); if_depth_in_loop = reralloc(this->mem_ctx, if_depth_in_loop, int, loop_stack_array_size); @@ -834,6 +833,7 @@ vec4_visitor::generate_code() break; case BRW_OPCODE_WHILE: { + int inst0_idx; struct brw_instruction *inst0, *inst1; GLuint br = 1; @@ -842,11 +842,12 @@ vec4_visitor::generate_code() assert(loop_stack_depth > 0); loop_stack_depth--; - inst0 = inst1 = brw_insn_of(p, brw_WHILE(p, loop_stack[loop_stack_depth])); + inst0_idx = brw_WHILE(p, loop_stack[loop_stack_depth]); + inst0 = inst1 = brw_insn_of(p, inst0_idx); if (intel->gen < 6) { /* patch all the BREAK/CONT instructions from last BGNLOOP */ - while (inst0 > loop_stack[loop_stack_depth]) { - inst0--; + while (inst0_idx > loop_stack[loop_stack_depth]) { + inst0 = brw_insn_of(p, --inst0_idx); if (inst0->header.opcode == BRW_OPCODE_BREAK && inst0->bits3.if_else.jump_count == 0) { inst0->bits3.if_else.jump_count = br * (inst1 - inst0 + 1); diff --git a/src/mesa/drivers/dri/i965/brw_vs_emit.c b/src/mesa/drivers/dri/i965/brw_vs_emit.c index 6d50fad..1d5dc9c 100644 --- a/src/mesa/drivers/dri/i965/brw_vs_emit.c +++ b/src/mesa/drivers/dri/i965/brw_vs_emit.c @@ -1844,7 +1844,7 @@ void brw_old_vs_emit(struct brw_vs_compile *c ) struct intel_context *intel = &brw->intel; const GLuint nr_insns = c->vp->program.Base.NumInstructions; GLuint insn, loop_depth = 0; - struct brw_instruction *loop_inst[MAX_LOOP_DEPTH] = { 0 }; + int loop_inst[MAX_LOOP_DEPTH] = { 0 }; int if_depth_in_loop[MAX_LOOP_DEPTH]; const struct brw_indirect stack_index = brw_indirect(0, 0); GLuint index; @@ -2096,7 +2096,7 @@ void brw_old_vs_emit(struct brw_vs_compile *c ) break; case OPCODE_BGNLOOP: clear_current_const(c); - loop_inst[loop_depth++] = brw_insn_of(p, brw_DO(p, BRW_EXECUTE_8)); + loop_inst[loop_depth++] = brw_DO(p, BRW_EXECUTE_8); if_depth_in_loop[loop_depth] = 0; break; case OPCODE_BRK: @@ -2116,6 +2116,7 @@ void brw_old_vs_emit(struct brw_vs_compile *c ) case OPCODE_ENDLOOP: { clear_current_const(c); + int inst0_idx; struct brw_instruction *inst0, *inst1; GLuint br = 1; @@ -2124,12 +2125,13 @@ void brw_old_vs_emit(struct brw_vs_compile *c ) if (intel->gen == 5) br = 2; - inst0 = inst1 = brw_insn_of(p, brw_WHILE(p, loop_inst[loop_depth])); + inst0_idx = brw_WHILE(p, loop_inst[loop_depth]); + inst0 = inst1 = brw_insn_of(p, inst0_idx); if (intel->gen < 6) { /* patch all the BREAK/CONT instructions from last BEGINLOOP */ - while (inst0 > loop_inst[loop_depth]) { - inst0--; + while (inst0_idx > loop_inst[loop_depth]) { + inst0 = brw_insn_of(p, --inst0_idx); if (inst0->header.opcode == BRW_OPCODE_BREAK && inst0->bits3.if_else.jump_count == 0) { inst0->bits3.if_else.jump_count = br * (inst1 - inst0 + 1); -- 1.7.4.4 _______________________________________________ mesa-dev mailing list mesa-dev@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-dev