Reviewed-by: Jason Ekstrand
On Tue, Dec 4, 2018 at 1:18 AM Iago Toral Quiroga wrote:
> The hardware only allows a stride of 1 on a Byte destination for raw
> byte MOV instructions. This is required even when the destination
> is the NULL register.
>
> Rather than making sure that we emit a proper NULL:B destination
> every time we need one, just fix it at emission time.
> ---
> src/intel/compiler/brw_eu_emit.c | 11 +++
> 1 file changed, 11 insertions(+)
>
> diff --git a/src/intel/compiler/brw_eu_emit.c
> b/src/intel/compiler/brw_eu_emit.c
> index 66edfb43baf..eef36705c7b 100644
> --- a/src/intel/compiler/brw_eu_emit.c
> +++ b/src/intel/compiler/brw_eu_emit.c
> @@ -94,6 +94,17 @@ brw_set_dest(struct brw_codegen *p, brw_inst *inst,
> struct brw_reg dest)
> else if (dest.file != BRW_ARCHITECTURE_REGISTER_FILE)
>assert(dest.nr < 128);
>
> + /* The hardware has a restriction where if the destination is Byte,
> +* the instruction needs to have a stride of 2 (except for packed byte
> +* MOV). This seems to be required even if the destination is the NULL
> +* register.
> +*/
> + if (dest.file == BRW_ARCHITECTURE_REGISTER_FILE &&
> + dest.nr == BRW_ARF_NULL &&
> + type_sz(dest.type) == 1) {
> + dest.hstride = BRW_HORIZONTAL_STRIDE_2;
> + }
> +
> gen7_convert_mrf_to_grf(p, );
>
> brw_inst_set_dst_file_type(devinfo, inst, dest.file, dest.type);
> --
> 2.17.1
>
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