Re: [Mesa-dev] [PATCH 5/8] nv50/ir: Add nv50_ir_prog_info serialize
On Mon, Feb 17, 2020 at 6:41 PM Mark Menzynski wrote:
>
> Adds a function for serializing a nv50_ir_prog_info structure, which is
> needed for shader caching.
>
> Signed-off-by: Mark Menzynski
> ---
> .../drivers/nouveau/codegen/nv50_ir_driver.h | 4 +
> .../nouveau/codegen/nv50_ir_serialize.cpp | 81 +++
> 2 files changed, 85 insertions(+)
>
> diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_driver.h
> b/src/gallium/drivers/nouveau/codegen/nv50_ir_driver.h
> index 9eb8a4c4798..cdf19eeabcf 100644
> --- a/src/gallium/drivers/nouveau/codegen/nv50_ir_driver.h
> +++ b/src/gallium/drivers/nouveau/codegen/nv50_ir_driver.h
> @@ -278,6 +278,10 @@ namespace nv50_ir
> extern void
> nv50_ir_prog_info_out_print(struct nv50_ir_prog_info_out *);
>
> +/* Serialize a nv50_ir_prog_info structure and save it into blob */
> +extern bool
> +nv50_ir_prog_info_serialize(struct blob *, struct nv50_ir_prog_info *);
> +
> /* Serialize a nv50_ir_prog_info_out structure and save it into blob */
> extern bool
> nv50_ir_prog_info_out_serialize(struct blob *, struct nv50_ir_prog_info_out
> *);
> diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_serialize.cpp
> b/src/gallium/drivers/nouveau/codegen/nv50_ir_serialize.cpp
> index 077f3eba6c8..0f47189f10b 100644
> --- a/src/gallium/drivers/nouveau/codegen/nv50_ir_serialize.cpp
> +++ b/src/gallium/drivers/nouveau/codegen/nv50_ir_serialize.cpp
> @@ -17,6 +17,87 @@ enum InterpApply {
> FLIP_GM107 = 7
> };
>
> +extern bool
> +nv50_ir_prog_info_serialize(struct blob *blob, struct nv50_ir_prog_info
> *info)
> +{
> + blob_write_uint16(blob, info->target);
> + blob_write_uint8(blob, info->type);
> + blob_write_uint8(blob, info->optLevel);
> + blob_write_uint8(blob, info->dbgFlags);
> + blob_write_uint8(blob, info->omitLineNum);
> + blob_write_uint32(blob, info->bin.smemSize);
> + blob_write_uint16(blob, info->bin.maxOutput);
> + blob_write_uint8(blob, info->bin.sourceRep);
> +
> + switch(info->bin.sourceRep) {
> + case PIPE_SHADER_IR_TGSI: {
> + struct tgsi_token *tokens = (struct tgsi_token *)info->bin.source;
> + unsigned int num_tokens = tgsi_num_tokens(tokens);
> +
> + blob_write_uint32(blob, num_tokens);
> + blob_write_bytes(blob, tokens, num_tokens * sizeof(struct
> tgsi_token));
> + break;
> + }
> + case PIPE_SHADER_IR_NIR: {
> + struct nir_shader *nir = (struct nir_shader *)info->bin.source;
> + nir_serialize(blob, nir, false);
> + break;
> + }
> + default:
> + assert(!"unhandled info->bin.sourceRep");
> + return false;
> + }
> +
> + blob_write_uint16(blob, info->immd.bufSize);
> + blob_write_bytes(blob, info->immd.buf, info->immd.bufSize *
> sizeof(*info->immd.buf));
> + blob_write_uint16(blob, info->immd.count);
> + blob_write_bytes(blob, info->immd.data, info->immd.count *
> sizeof(*info->immd.data));
> + blob_write_bytes(blob, info->immd.type, info->immd.count * 16); // for
> each vec4 (128 bit)
> +
> + switch (info->type) {
> + case PIPE_SHADER_VERTEX:
> + blob_write_bytes(blob, info->prop.vp.inputMask,
> + 4 * sizeof(*info->prop.vp.inputMask)); /* array of
> size 4 */
we have an ARRAY_SIZE macro, but sizeof(info->prop.vp.inputMask)
should give you the full array size already, no?
> + break;
> + case PIPE_SHADER_TESS_CTRL:
> + blob_write_uint32(blob, info->prop.cp.inputOffset);
> + blob_write_uint32(blob, info->prop.cp.sharedOffset);
> + blob_write_uint32(blob, info->prop.cp.gridInfoBase);
> + blob_write_bytes(blob, info->prop.cp.numThreads,
> + 3 * sizeof(*info->prop.cp.numThreads)); /* array
> of size 3 */
same here
> + case PIPE_SHADER_GEOMETRY:
> + blob_write_uint8(blob, info->prop.gp.inputPrim);
> + break;
> + case PIPE_SHADER_FRAGMENT:
> + blob_write_uint8(blob, info->prop.fp.persampleInvocation);
> + break;
> + default:
> + break;
> + }
> +
> + blob_write_uint8(blob, info->io.auxCBSlot);
> + blob_write_uint16(blob, info->io.ucpBase);
> + blob_write_uint16(blob, info->io.drawInfoBase);
> + blob_write_uint16(blob, info->io.alphaRefBase);
> + blob_write_uint8(blob, info->io.pointSize);
> + blob_write_uint8(blob, info->io.viewportId);
> + blob_write_bytes(blob, info->io.backFaceColor, 2 *
> sizeof(*info->io.backFaceColor));
and here
> + blob_write_uint8(blob, info->io.mul_zero_wins);
> + blob_write_uint8(blob, info->io.nv50styleSurfaces);
> + blob_write_uint16(blob, info->io.texBindBase);
> + blob_write_uint16(blob, info->io.fbtexBindBase);
> + blob_write_uint16(blob, info->io.suInfoBase);
> + blob_write_uint16(blob, info->io.bindlessBase);
> + blob_write_uint16(blob, info->io.bufInfoBase);
> + blob_write_uint16(blob, info->io.sampleInfoBase);
> + blob_write_uint8(blob,
[Mesa-dev] [PATCH 5/8] nv50/ir: Add nv50_ir_prog_info serialize
Adds a function for serializing a nv50_ir_prog_info structure, which is
needed for shader caching.
Signed-off-by: Mark Menzynski
---
.../drivers/nouveau/codegen/nv50_ir_driver.h | 4 +
.../nouveau/codegen/nv50_ir_serialize.cpp | 81 +++
2 files changed, 85 insertions(+)
diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_driver.h
b/src/gallium/drivers/nouveau/codegen/nv50_ir_driver.h
index 9eb8a4c4798..cdf19eeabcf 100644
--- a/src/gallium/drivers/nouveau/codegen/nv50_ir_driver.h
+++ b/src/gallium/drivers/nouveau/codegen/nv50_ir_driver.h
@@ -278,6 +278,10 @@ namespace nv50_ir
extern void
nv50_ir_prog_info_out_print(struct nv50_ir_prog_info_out *);
+/* Serialize a nv50_ir_prog_info structure and save it into blob */
+extern bool
+nv50_ir_prog_info_serialize(struct blob *, struct nv50_ir_prog_info *);
+
/* Serialize a nv50_ir_prog_info_out structure and save it into blob */
extern bool
nv50_ir_prog_info_out_serialize(struct blob *, struct nv50_ir_prog_info_out *);
diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_serialize.cpp
b/src/gallium/drivers/nouveau/codegen/nv50_ir_serialize.cpp
index 077f3eba6c8..0f47189f10b 100644
--- a/src/gallium/drivers/nouveau/codegen/nv50_ir_serialize.cpp
+++ b/src/gallium/drivers/nouveau/codegen/nv50_ir_serialize.cpp
@@ -17,6 +17,87 @@ enum InterpApply {
FLIP_GM107 = 7
};
+extern bool
+nv50_ir_prog_info_serialize(struct blob *blob, struct nv50_ir_prog_info *info)
+{
+ blob_write_uint16(blob, info->target);
+ blob_write_uint8(blob, info->type);
+ blob_write_uint8(blob, info->optLevel);
+ blob_write_uint8(blob, info->dbgFlags);
+ blob_write_uint8(blob, info->omitLineNum);
+ blob_write_uint32(blob, info->bin.smemSize);
+ blob_write_uint16(blob, info->bin.maxOutput);
+ blob_write_uint8(blob, info->bin.sourceRep);
+
+ switch(info->bin.sourceRep) {
+ case PIPE_SHADER_IR_TGSI: {
+ struct tgsi_token *tokens = (struct tgsi_token *)info->bin.source;
+ unsigned int num_tokens = tgsi_num_tokens(tokens);
+
+ blob_write_uint32(blob, num_tokens);
+ blob_write_bytes(blob, tokens, num_tokens * sizeof(struct
tgsi_token));
+ break;
+ }
+ case PIPE_SHADER_IR_NIR: {
+ struct nir_shader *nir = (struct nir_shader *)info->bin.source;
+ nir_serialize(blob, nir, false);
+ break;
+ }
+ default:
+ assert(!"unhandled info->bin.sourceRep");
+ return false;
+ }
+
+ blob_write_uint16(blob, info->immd.bufSize);
+ blob_write_bytes(blob, info->immd.buf, info->immd.bufSize *
sizeof(*info->immd.buf));
+ blob_write_uint16(blob, info->immd.count);
+ blob_write_bytes(blob, info->immd.data, info->immd.count *
sizeof(*info->immd.data));
+ blob_write_bytes(blob, info->immd.type, info->immd.count * 16); // for each
vec4 (128 bit)
+
+ switch (info->type) {
+ case PIPE_SHADER_VERTEX:
+ blob_write_bytes(blob, info->prop.vp.inputMask,
+ 4 * sizeof(*info->prop.vp.inputMask)); /* array of
size 4 */
+ break;
+ case PIPE_SHADER_TESS_CTRL:
+ blob_write_uint32(blob, info->prop.cp.inputOffset);
+ blob_write_uint32(blob, info->prop.cp.sharedOffset);
+ blob_write_uint32(blob, info->prop.cp.gridInfoBase);
+ blob_write_bytes(blob, info->prop.cp.numThreads,
+ 3 * sizeof(*info->prop.cp.numThreads)); /* array of
size 3 */
+ case PIPE_SHADER_GEOMETRY:
+ blob_write_uint8(blob, info->prop.gp.inputPrim);
+ break;
+ case PIPE_SHADER_FRAGMENT:
+ blob_write_uint8(blob, info->prop.fp.persampleInvocation);
+ break;
+ default:
+ break;
+ }
+
+ blob_write_uint8(blob, info->io.auxCBSlot);
+ blob_write_uint16(blob, info->io.ucpBase);
+ blob_write_uint16(blob, info->io.drawInfoBase);
+ blob_write_uint16(blob, info->io.alphaRefBase);
+ blob_write_uint8(blob, info->io.pointSize);
+ blob_write_uint8(blob, info->io.viewportId);
+ blob_write_bytes(blob, info->io.backFaceColor, 2 *
sizeof(*info->io.backFaceColor));
+ blob_write_uint8(blob, info->io.mul_zero_wins);
+ blob_write_uint8(blob, info->io.nv50styleSurfaces);
+ blob_write_uint16(blob, info->io.texBindBase);
+ blob_write_uint16(blob, info->io.fbtexBindBase);
+ blob_write_uint16(blob, info->io.suInfoBase);
+ blob_write_uint16(blob, info->io.bindlessBase);
+ blob_write_uint16(blob, info->io.bufInfoBase);
+ blob_write_uint16(blob, info->io.sampleInfoBase);
+ blob_write_uint8(blob, info->io.msInfoCBSlot);
+ blob_write_uint16(blob, info->io.msInfoBase);
+ blob_write_uint16(blob, info->io.uboInfoBase);
+ blob_write_uint8(blob, info->io.genUserClip);
+
+ return true;
+}
+
extern bool
nv50_ir_prog_info_out_serialize(struct blob *blob,
struct nv50_ir_prog_info_out *info_out)
--
2.21.1
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