Re: [Mesa-dev] [PATCH 6/9] nir: Add nir_const_value_negative_equal
I really like this one; its very readable =)
Reviewed-by: Thomas Helland
Den tor. 30. aug. 2018 kl. 07:37 skrev Ian Romanick :
>
> From: Ian Romanick
>
> Signed-off-by: Ian Romanick
> ---
> src/compiler/nir/meson.build| 12 +
> src/compiler/nir/nir.h | 6 +
> src/compiler/nir/nir_instr_set.c| 98 +
> src/compiler/nir/tests/negative_equal_tests.cpp | 278
>
> 4 files changed, 394 insertions(+)
> create mode 100644 src/compiler/nir/tests/negative_equal_tests.cpp
>
> diff --git a/src/compiler/nir/meson.build b/src/compiler/nir/meson.build
> index 090aa7a628f..5438c17a8f8 100644
> --- a/src/compiler/nir/meson.build
> +++ b/src/compiler/nir/meson.build
> @@ -245,4 +245,16 @@ if with_tests
>link_with : libmesa_util,
> )
>)
> +
> + test(
> +'negative_equal',
> +executable(
> + 'negative_equal',
> + files('tests/negative_equal_tests.cpp'),
> + c_args : [c_vis_args, c_msvc_compat_args, no_override_init_args],
> + include_directories : [inc_common],
> + dependencies : [dep_thread, idep_gtest, idep_nir],
> + link_with : libmesa_util,
> +)
> + )
> endif
> diff --git a/src/compiler/nir/nir.h b/src/compiler/nir/nir.h
> index 9bca6d487e9..f94538e0782 100644
> --- a/src/compiler/nir/nir.h
> +++ b/src/compiler/nir/nir.h
> @@ -955,6 +955,12 @@ nir_ssa_alu_instr_src_components(const nir_alu_instr
> *instr, unsigned src)
> return instr->dest.dest.ssa.num_components;
> }
>
> +bool nir_const_value_negative_equal(const nir_const_value *c1,
> +const nir_const_value *c2,
> +unsigned components,
> +nir_alu_type base_type,
> +unsigned bits);
> +
> bool nir_alu_srcs_equal(const nir_alu_instr *alu1, const nir_alu_instr *alu2,
> unsigned src1, unsigned src2);
>
> diff --git a/src/compiler/nir/nir_instr_set.c
> b/src/compiler/nir/nir_instr_set.c
> index 19771fcd9dd..009d9661e60 100644
> --- a/src/compiler/nir/nir_instr_set.c
> +++ b/src/compiler/nir/nir_instr_set.c
> @@ -23,6 +23,7 @@
>
> #include "nir_instr_set.h"
> #include "nir_vla.h"
> +#include "util/half_float.h"
>
> #define HASH(hash, data) _mesa_fnv32_1a_accumulate((hash), (data))
>
> @@ -261,6 +262,103 @@ nir_srcs_equal(nir_src src1, nir_src src2)
> }
> }
>
> +bool
> +nir_const_value_negative_equal(const nir_const_value *c1,
> + const nir_const_value *c2,
> + unsigned components,
> + nir_alu_type base_type,
> + unsigned bits)
> +{
> + assert(base_type == nir_alu_type_get_base_type(base_type));
> + assert(base_type != nir_type_invalid);
> +
> + switch (base_type) {
> + case nir_type_float:
> + switch (bits) {
> + case 16:
> + for (unsigned i = 0; i < components; i++) {
> +if (_mesa_half_to_float(c1->u16[i]) !=
> +-_mesa_half_to_float(c2->u16[i])) {
> + return false;
> +}
> + }
> +
> + return true;
> +
> + case 32:
> + for (unsigned i = 0; i < components; i++) {
> +if (c1->f32[i] != -c2->f32[i])
> + return false;
> + }
> +
> + return true;
> +
> + case 64:
> + for (unsigned i = 0; i < components; i++) {
> +if (c1->f64[i] != -c2->f64[i])
> + return false;
> + }
> +
> + return true;
> +
> + default:
> + unreachable("unknown bit size");
> + }
> +
> + break;
> +
> + case nir_type_int:
> + case nir_type_uint:
> + switch (bits) {
> + case 8:
> + for (unsigned i = 0; i < components; i++) {
> +if (c1->i8[i] != -c2->i8[i])
> + return false;
> + }
> +
> + return true;
> +
> + case 16:
> + for (unsigned i = 0; i < components; i++) {
> +if (c1->i16[i] != -c2->i16[i])
> + return false;
> + }
> +
> + return true;
> + break;
> +
> + case 32:
> + for (unsigned i = 0; i < components; i++) {
> +if (c1->i32[i] != -c2->i32[i])
> + return false;
> + }
> +
> + return true;
> +
> + case 64:
> + for (unsigned i = 0; i < components; i++) {
> +if (c1->i64[i] != -c2->i64[i])
> + return false;
> + }
> +
> + return true;
> +
> + default:
> + unreachable("unknown bit size");
> + }
> +
> + break;
> +
> + case nir_type_bool:
> + return false;
> +
> + default:
> + break;
> + }
> +
> + return false;
> +}
> +
> bool
> nir_alu_srcs_equal(const nir_alu_instr *alu1, const nir_alu_instr *alu2,
> unsigned src1, unsigned src2)
> diff
[Mesa-dev] [PATCH 6/9] nir: Add nir_const_value_negative_equal
From: Ian Romanick
Signed-off-by: Ian Romanick
---
src/compiler/nir/meson.build| 12 +
src/compiler/nir/nir.h | 6 +
src/compiler/nir/nir_instr_set.c| 98 +
src/compiler/nir/tests/negative_equal_tests.cpp | 278
4 files changed, 394 insertions(+)
create mode 100644 src/compiler/nir/tests/negative_equal_tests.cpp
diff --git a/src/compiler/nir/meson.build b/src/compiler/nir/meson.build
index 090aa7a628f..5438c17a8f8 100644
--- a/src/compiler/nir/meson.build
+++ b/src/compiler/nir/meson.build
@@ -245,4 +245,16 @@ if with_tests
link_with : libmesa_util,
)
)
+
+ test(
+'negative_equal',
+executable(
+ 'negative_equal',
+ files('tests/negative_equal_tests.cpp'),
+ c_args : [c_vis_args, c_msvc_compat_args, no_override_init_args],
+ include_directories : [inc_common],
+ dependencies : [dep_thread, idep_gtest, idep_nir],
+ link_with : libmesa_util,
+)
+ )
endif
diff --git a/src/compiler/nir/nir.h b/src/compiler/nir/nir.h
index 9bca6d487e9..f94538e0782 100644
--- a/src/compiler/nir/nir.h
+++ b/src/compiler/nir/nir.h
@@ -955,6 +955,12 @@ nir_ssa_alu_instr_src_components(const nir_alu_instr
*instr, unsigned src)
return instr->dest.dest.ssa.num_components;
}
+bool nir_const_value_negative_equal(const nir_const_value *c1,
+const nir_const_value *c2,
+unsigned components,
+nir_alu_type base_type,
+unsigned bits);
+
bool nir_alu_srcs_equal(const nir_alu_instr *alu1, const nir_alu_instr *alu2,
unsigned src1, unsigned src2);
diff --git a/src/compiler/nir/nir_instr_set.c b/src/compiler/nir/nir_instr_set.c
index 19771fcd9dd..009d9661e60 100644
--- a/src/compiler/nir/nir_instr_set.c
+++ b/src/compiler/nir/nir_instr_set.c
@@ -23,6 +23,7 @@
#include "nir_instr_set.h"
#include "nir_vla.h"
+#include "util/half_float.h"
#define HASH(hash, data) _mesa_fnv32_1a_accumulate((hash), (data))
@@ -261,6 +262,103 @@ nir_srcs_equal(nir_src src1, nir_src src2)
}
}
+bool
+nir_const_value_negative_equal(const nir_const_value *c1,
+ const nir_const_value *c2,
+ unsigned components,
+ nir_alu_type base_type,
+ unsigned bits)
+{
+ assert(base_type == nir_alu_type_get_base_type(base_type));
+ assert(base_type != nir_type_invalid);
+
+ switch (base_type) {
+ case nir_type_float:
+ switch (bits) {
+ case 16:
+ for (unsigned i = 0; i < components; i++) {
+if (_mesa_half_to_float(c1->u16[i]) !=
+-_mesa_half_to_float(c2->u16[i])) {
+ return false;
+}
+ }
+
+ return true;
+
+ case 32:
+ for (unsigned i = 0; i < components; i++) {
+if (c1->f32[i] != -c2->f32[i])
+ return false;
+ }
+
+ return true;
+
+ case 64:
+ for (unsigned i = 0; i < components; i++) {
+if (c1->f64[i] != -c2->f64[i])
+ return false;
+ }
+
+ return true;
+
+ default:
+ unreachable("unknown bit size");
+ }
+
+ break;
+
+ case nir_type_int:
+ case nir_type_uint:
+ switch (bits) {
+ case 8:
+ for (unsigned i = 0; i < components; i++) {
+if (c1->i8[i] != -c2->i8[i])
+ return false;
+ }
+
+ return true;
+
+ case 16:
+ for (unsigned i = 0; i < components; i++) {
+if (c1->i16[i] != -c2->i16[i])
+ return false;
+ }
+
+ return true;
+ break;
+
+ case 32:
+ for (unsigned i = 0; i < components; i++) {
+if (c1->i32[i] != -c2->i32[i])
+ return false;
+ }
+
+ return true;
+
+ case 64:
+ for (unsigned i = 0; i < components; i++) {
+if (c1->i64[i] != -c2->i64[i])
+ return false;
+ }
+
+ return true;
+
+ default:
+ unreachable("unknown bit size");
+ }
+
+ break;
+
+ case nir_type_bool:
+ return false;
+
+ default:
+ break;
+ }
+
+ return false;
+}
+
bool
nir_alu_srcs_equal(const nir_alu_instr *alu1, const nir_alu_instr *alu2,
unsigned src1, unsigned src2)
diff --git a/src/compiler/nir/tests/negative_equal_tests.cpp
b/src/compiler/nir/tests/negative_equal_tests.cpp
new file mode 100644
index 000..e450a8172db
--- /dev/null
+++ b/src/compiler/nir/tests/negative_equal_tests.cpp
@@ -0,0 +1,278 @@
+/*
+ * Copyright © 2018 Intel Corporation
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal
