Re: [Mesa-dev] [PATCH v2 02/32] nir: Get rid of nir_shader::stage

[Kenneth Graunke]

On Wednesday, October 18, 2017 10:31:50 PM PDT Jordan Justen wrote:
> From: Jason Ekstrand 
> 
> It's redundant with nir_shader::info::stage.

I hate the extra wordiness here, but removing the redundancy is
certainly a reasonable thing to do.

So, as much as I dislike this,
Reviewed-by: Kenneth Graunke 


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Re: [Mesa-dev] [PATCH v2 02/32] nir: Get rid of nir_shader::stage

[Timothy Arceri]

Acked-by: Timothy Arceri 
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[Mesa-dev] [PATCH v2 02/32] nir: Get rid of nir_shader::stage

[Jordan Justen]

From: Jason Ekstrand 

It's redundant with nir_shader::info::stage.
---
 src/amd/common/ac_nir_to_llvm.c| 30 ++---
 src/amd/common/ac_shader_info.c|  2 +-
 src/amd/vulkan/radv_shader.c   |  4 +-
 src/compiler/glsl/glsl_to_nir.cpp  | 10 ++---
 src/compiler/nir/nir.c | 16 ---
 src/compiler/nir/nir.h |  3 --
 src/compiler/nir/nir_clone.c   |  2 +-
 src/compiler/nir/nir_gather_info.c | 14 +++---
 src/compiler/nir/nir_linking_helpers.c | 14 +++---
 src/compiler/nir/nir_lower_alpha_test.c|  2 +-
 src/compiler/nir/nir_lower_atomics.c   |  2 +-
 src/compiler/nir/nir_lower_bitmap.c|  2 +-
 src/compiler/nir/nir_lower_clamp_color_outputs.c   |  2 +-
 .../nir/nir_lower_clip_cull_distance_arrays.c  |  8 ++--
 src/compiler/nir/nir_lower_drawpixels.c|  2 +-
 src/compiler/nir/nir_lower_io.c|  4 +-
 src/compiler/nir/nir_lower_io_to_temporaries.c |  4 +-
 src/compiler/nir/nir_lower_io_types.c  |  2 +-
 src/compiler/nir/nir_lower_samplers.c  |  3 +-
 src/compiler/nir/nir_lower_samplers_as_deref.c |  2 +-
 src/compiler/nir/nir_lower_two_sided_color.c   |  2 +-
 src/compiler/nir/nir_lower_wpos_center.c   |  2 +-
 src/compiler/nir/nir_lower_wpos_ytransform.c   |  2 +-
 src/compiler/nir/nir_print.c   |  6 +--
 src/compiler/nir/nir_validate.c|  2 +-
 src/compiler/spirv/spirv_to_nir.c  | 52 +++---
 src/compiler/spirv/vtn_variables.c | 16 +++
 src/gallium/auxiliary/nir/tgsi_to_nir.c|  2 +-
 src/gallium/drivers/freedreno/ir3/ir3_cmdline.c|  4 +-
 src/gallium/drivers/freedreno/ir3/ir3_nir.c|  4 +-
 src/gallium/drivers/radeonsi/si_shader_nir.c   | 22 -
 src/gallium/drivers/vc4/vc4_program.c  |  2 +-
 src/intel/blorp/blorp_priv.h   |  2 +-
 src/intel/compiler/brw_nir.c   | 24 +-
 src/intel/compiler/brw_nir_analyze_ubo_ranges.c|  2 +-
 src/intel/compiler/brw_nir_lower_cs_intrinsics.c   |  2 +-
 src/intel/compiler/brw_nir_tcs_workarounds.c   |  2 +-
 src/intel/compiler/brw_shader.cpp  |  2 +-
 src/intel/compiler/brw_vec4_generator.cpp  | 10 ++---
 src/intel/vulkan/anv_nir_apply_pipeline_layout.c   | 13 +++---
 src/intel/vulkan/anv_nir_lower_input_attachments.c |  2 +-
 src/intel/vulkan/anv_nir_lower_multiview.c | 14 +++---
 src/intel/vulkan/anv_pipeline.c|  2 +-
 src/mesa/drivers/dri/i965/brw_link.cpp |  6 ++-
 src/mesa/drivers/dri/i965/brw_nir_uniforms.cpp |  4 +-
 src/mesa/state_tracker/st_glsl_to_nir.cpp  | 10 ++---
 46 files changed, 172 insertions(+), 167 deletions(-)

diff --git a/src/amd/common/ac_nir_to_llvm.c b/src/amd/common/ac_nir_to_llvm.c
index 3ba3ebf051..4e0a6f7aaa 100644
--- a/src/amd/common/ac_nir_to_llvm.c
+++ b/src/amd/common/ac_nir_to_llvm.c
@@ -6247,7 +6247,7 @@ static unsigned
 ac_nir_get_max_workgroup_size(enum chip_class chip_class,
  const struct nir_shader *nir)
 {
-   switch (nir->stage) {
+   switch (nir->info.stage) {
case MESA_SHADER_TESS_CTRL:
return chip_class >= CIK ? 128 : 64;
case MESA_SHADER_GEOMETRY:
@@ -6277,7 +6277,7 @@ void ac_nir_translate(struct ac_llvm_context *ac, struct 
ac_shader_abi *abi,
if (nctx)
nctx->nir = 
 
-   ctx.stage = nir->stage;
+   ctx.stage = nir->info.stage;
 
ctx.main_function = 
LLVMGetBasicBlockParent(LLVMGetInsertBlock(ctx.ac.builder));
 
@@ -6295,7 +6295,7 @@ void ac_nir_translate(struct ac_llvm_context *ac, struct 
ac_shader_abi *abi,
 
setup_locals(, func);
 
-   if (nir->stage == MESA_SHADER_COMPUTE)
+   if (nir->info.stage == MESA_SHADER_COMPUTE)
setup_shared(, nir);
 
visit_cf_list(, >impl->body);
@@ -6345,7 +6345,7 @@ LLVMModuleRef 
ac_translate_nir_to_llvm(LLVMTargetMachineRef tm,
 
ctx.builder = LLVMCreateBuilderInContext(ctx.context);
ctx.ac.builder = ctx.builder;
-   ctx.stage = nir->stage;
+   ctx.stage = nir->info.stage;
ctx.max_workgroup_size = 
ac_nir_get_max_workgroup_size(ctx.options->chip_class, nir);
 
for (i = 0; i < AC_UD_MAX_SETS; i++)
@@ -6355,18 +6355,18 @@ LLVMModuleRef 
ac_translate_nir_to_llvm(LLVMTargetMachineRef tm,
 
create_function();
 
-   if (nir->stage == MESA_SHADER_GEOMETRY) {
+   if (nir->info.stage == MESA_SHADER_GEOMETRY) {
ctx.gs_next_vertex = ac_build_alloca(, ctx.i32, 
"gs_next_vertex");
 
ctx.gs_max_out_vertices = nir->info.gs.vertices_out;
-   } else if (nir->stage == MESA_SHADER_TESS_EVAL)