Re: [Mesa-dev] [PATCH v2 3/4] spirv: Add a 64-bit implementation of OpIsInf

2018-04-17 Thread Jason Ekstrand
Reviewed-by: Jason Ekstrand 

On Wed, Mar 21, 2018 at 12:34 PM, Neil Roberts  wrote:

> The only change neccessary is to change the type of the constant used
> to compare against.
>
> This has been tested against the arb_gpu_shader_fp64/execution/
> fs-isinf-dvec tests using the ARB_gl_spirv branch.
>
> v2: Use nir_imm_floatN_t for the constant.
> ---
>  src/compiler/spirv/vtn_alu.c | 7 ---
>  1 file changed, 4 insertions(+), 3 deletions(-)
>
> diff --git a/src/compiler/spirv/vtn_alu.c b/src/compiler/spirv/vtn_alu.c
> index 01be397e271..3226e5b8739 100644
> --- a/src/compiler/spirv/vtn_alu.c
> +++ b/src/compiler/spirv/vtn_alu.c
> @@ -563,10 +563,11 @@ vtn_handle_alu(struct vtn_builder *b, SpvOp opcode,
>val->ssa->def = nir_fne(&b->nb, src[0], src[0]);
>break;
>
> -   case SpvOpIsInf:
> -  val->ssa->def = nir_ieq(&b->nb, nir_fabs(&b->nb, src[0]),
> -  nir_imm_float(&b->nb, INFINITY));
> +   case SpvOpIsInf: {
> +  nir_ssa_def *inf = nir_imm_floatN_t(&b->nb, INFINITY,
> src[0]->bit_size);
> +  val->ssa->def = nir_ieq(&b->nb, nir_fabs(&b->nb, src[0]), inf);
>break;
> +   }
>
> case SpvOpFUnordEqual:
> case SpvOpFUnordNotEqual:
> --
> 2.14.3
>
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[Mesa-dev] [PATCH v2 3/4] spirv: Add a 64-bit implementation of OpIsInf

2018-03-21 Thread Neil Roberts
The only change neccessary is to change the type of the constant used
to compare against.

This has been tested against the arb_gpu_shader_fp64/execution/
fs-isinf-dvec tests using the ARB_gl_spirv branch.

v2: Use nir_imm_floatN_t for the constant.
---
 src/compiler/spirv/vtn_alu.c | 7 ---
 1 file changed, 4 insertions(+), 3 deletions(-)

diff --git a/src/compiler/spirv/vtn_alu.c b/src/compiler/spirv/vtn_alu.c
index 01be397e271..3226e5b8739 100644
--- a/src/compiler/spirv/vtn_alu.c
+++ b/src/compiler/spirv/vtn_alu.c
@@ -563,10 +563,11 @@ vtn_handle_alu(struct vtn_builder *b, SpvOp opcode,
   val->ssa->def = nir_fne(&b->nb, src[0], src[0]);
   break;
 
-   case SpvOpIsInf:
-  val->ssa->def = nir_ieq(&b->nb, nir_fabs(&b->nb, src[0]),
-  nir_imm_float(&b->nb, INFINITY));
+   case SpvOpIsInf: {
+  nir_ssa_def *inf = nir_imm_floatN_t(&b->nb, INFINITY, src[0]->bit_size);
+  val->ssa->def = nir_ieq(&b->nb, nir_fabs(&b->nb, src[0]), inf);
   break;
+   }
 
case SpvOpFUnordEqual:
case SpvOpFUnordNotEqual:
-- 
2.14.3

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