Re: [Mesa-dev] [PATCH] r600/llvm: Store inputs in function arguments
Hi, Am Donnerstag, 14. November 2013, 10:24:52 schrieb Andy Furniss: Vincent Lejeune wrote: --- src/gallium/drivers/r600/r600_llvm.c | 119 +++ src/gallium/drivers/r600/r600_shader.c | 1 + src/gallium/drivers/radeon/radeon_llvm.h | 1 + 3 files changed, 121 insertions(+) Looks like this or whatever version went in to mesa is stopping Unigine heaven 3.0 starting on my 4890. No errors, just gets to the end of the loading screen and stays there, pkill works. Works with R600_LLVM=0, LLVM is/was current (yesterday), Nexuiz is not affected. me too (RS880), looks like a shader never finishes to compile. I attached a dump diff of the relavant shader. Marc dump.gz Description: application/gzip ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-dev
Re: [Mesa-dev] [PATCH] r600/llvm: Store inputs in function arguments
sorry, mailer program ate the cc list... Hi, Am Donnerstag, 14. November 2013, 10:24:52 schrieb Andy Furniss: Vincent Lejeune wrote: --- src/gallium/drivers/r600/r600_llvm.c | 119 +++ src/gallium/drivers/r600/r600_shader.c | 1 + src/gallium/drivers/radeon/radeon_llvm.h | 1 + 3 files changed, 121 insertions(+) Looks like this or whatever version went in to mesa is stopping Unigine heaven 3.0 starting on my 4890. No errors, just gets to the end of the loading screen and stays there, pkill works. Works with R600_LLVM=0, LLVM is/was current (yesterday), Nexuiz is not affected. me too (RS880), looks like a shader never finishes to compile. I attached a dump diff of the relavant shader. Marc dump.gz Description: application/gzip ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-dev
Re: [Mesa-dev] [PATCH] r600/llvm: Store inputs in function arguments
Vincent Lejeune wrote: --- src/gallium/drivers/r600/r600_llvm.c | 119 +++ src/gallium/drivers/r600/r600_shader.c | 1 + src/gallium/drivers/radeon/radeon_llvm.h | 1 + 3 files changed, 121 insertions(+) Looks like this or whatever version went in to mesa is stopping Unigine heaven 3.0 starting on my 4890. No errors, just gets to the end of the loading screen and stays there, pkill works. Works with R600_LLVM=0, LLVM is/was current (yesterday), Nexuiz is not affected. ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-dev
Re: [Mesa-dev] [PATCH] r600/llvm: Store inputs in function arguments
On Mon, Nov 11, 2013 at 03:45:53PM +0100, Vincent Lejeune wrote:
Reviewed-by: Tom Stellard thomas.stell...@amd.com
---
src/gallium/drivers/r600/r600_llvm.c | 119
+++
src/gallium/drivers/r600/r600_shader.c | 1 +
src/gallium/drivers/radeon/radeon_llvm.h | 1 +
3 files changed, 121 insertions(+)
diff --git a/src/gallium/drivers/r600/r600_llvm.c
b/src/gallium/drivers/r600/r600_llvm.c
index 5afe3cb..a2ff0ec 100644
--- a/src/gallium/drivers/r600/r600_llvm.c
+++ b/src/gallium/drivers/r600/r600_llvm.c
@@ -77,6 +77,11 @@ static void llvm_load_system_value(
default: assert(!unknown system value);
}
+#if HAVE_LLVM = 0x0304
+ ctx-system_values[index] =
LLVMBuildExtractElement(ctx-gallivm.builder,
+ LLVMGetParam(ctx-main_fn, 0),
lp_build_const_int32((ctx-gallivm), chan),
+ );
+#else
LLVMValueRef reg = lp_build_const_int32(
ctx-soa.bld_base.base.gallivm, chan);
ctx-system_values[index] = build_intrinsic(
@@ -84,8 +89,49 @@ static void llvm_load_system_value(
llvm.R600.load.input,
ctx-soa.bld_base.base.elem_type, reg, 1,
LLVMReadNoneAttribute);
+#endif
}
+#if HAVE_LLVM = 0x0304
+static LLVMValueRef
+llvm_load_input_vector(
+ struct radeon_llvm_context * ctx, unsigned location, unsigned ijregs,
+ boolean interp)
+{
+ LLVMTypeRef VecType;
+ LLVMValueRef Args[3] = {
+ lp_build_const_int32((ctx-gallivm), location)
+ };
+ unsigned ArgCount = 1;
+ if (interp) {
+ VecType =
LLVMVectorType(ctx-soa.bld_base.base.elem_type, 2);
+ LLVMValueRef IJIndex = LLVMGetParam(ctx-main_fn,
ijregs / 2);
+ Args[ArgCount++] =
LLVMBuildExtractElement(ctx-gallivm.builder, IJIndex,
+ lp_build_const_int32((ctx-gallivm), 2 *
(ijregs % 2)), );
+ Args[ArgCount++] =
LLVMBuildExtractElement(ctx-gallivm.builder, IJIndex,
+ lp_build_const_int32((ctx-gallivm), 2 *
(ijregs % 2) + 1), );
+ LLVMValueRef HalfVec[2] = {
+ build_intrinsic(ctx-gallivm.builder,
llvm.R600.interp.xy,
+ VecType, Args, ArgCount,
LLVMReadNoneAttribute),
+ build_intrinsic(ctx-gallivm.builder,
llvm.R600.interp.zw,
+ VecType, Args, ArgCount,
LLVMReadNoneAttribute)
+ };
+ LLVMValueRef MaskInputs[4] = {
+ lp_build_const_int32((ctx-gallivm), 0),
+ lp_build_const_int32((ctx-gallivm), 1),
+ lp_build_const_int32((ctx-gallivm), 2),
+ lp_build_const_int32((ctx-gallivm), 3)
+ };
+ LLVMValueRef Mask = LLVMConstVector(MaskInputs, 4);
+ return LLVMBuildShuffleVector(ctx-gallivm.builder,
HalfVec[0], HalfVec[1],
+ Mask, );
+ } else {
+ VecType =
LLVMVectorType(ctx-soa.bld_base.base.elem_type, 4);
+ return build_intrinsic(ctx-gallivm.builder,
llvm.R600.interp.const,
+ VecType, Args, ArgCount, LLVMReadNoneAttribute);
+ }
+}
+#else
static LLVMValueRef
llvm_load_input_helper(
struct radeon_llvm_context * ctx,
@@ -110,7 +156,22 @@ llvm_load_input_helper(
return build_intrinsic(bb-gallivm-builder, intrinsic,
bb-elem_type, arg[0], arg_count, LLVMReadNoneAttribute);
}
+#endif
+#if HAVE_LLVM = 0x0304
+static LLVMValueRef
+llvm_face_select_helper(
+ struct radeon_llvm_context * ctx,
+ LLVMValueRef face, LLVMValueRef front_color, LLVMValueRef back_color)
+{
+ const struct lp_build_context * bb = ctx-soa.bld_base.base;
+ LLVMValueRef is_front = LLVMBuildFCmp(
+ bb-gallivm-builder, LLVMRealUGT, face,
+ lp_build_const_float(bb-gallivm, 0.0f),);
+ return LLVMBuildSelect(bb-gallivm-builder, is_front,
+ front_color, back_color, );
+}
+#else
static LLVMValueRef
llvm_face_select_helper(
struct radeon_llvm_context * ctx,
@@ -124,6 +185,7 @@ llvm_face_select_helper(
return LLVMBuildSelect(bb-gallivm-builder, is_front,
front_color, back_color, );
}
+#endif
static void llvm_load_input(
struct radeon_llvm_context * ctx,
@@ -132,11 +194,55 @@ static void llvm_load_input(
{
const struct r600_shader_io * input = ctx-r600_inputs[input_index];
unsigned chan;
+#if HAVE_LLVM 0x0304
unsigned interp = 0;
int ij_index;
+#endif
int two_side = (ctx-two_side
Re: [Mesa-dev] [PATCH] r600/llvm: Store inputs in function arguments
On Sun, Nov 03, 2013 at 06:58:18PM +0100, Vincent Lejeune wrote:
---
src/gallium/drivers/r600/r600_llvm.c | 125
-
src/gallium/drivers/r600/r600_shader.c | 2 +
src/gallium/drivers/radeon/radeon_llvm.h | 1 +
.../drivers/radeon/radeon_setup_tgsi_llvm.c| 2 +-
4 files changed, 75 insertions(+), 55 deletions(-)
As discussed on IRC, I think this will need some ifdefs to remain
compatible with older LLVM. Plus, I have two comments below:
diff --git a/src/gallium/drivers/r600/r600_llvm.c
b/src/gallium/drivers/r600/r600_llvm.c
index 5afe3cb..8dcda1a 100644
--- a/src/gallium/drivers/r600/r600_llvm.c
+++ b/src/gallium/drivers/r600/r600_llvm.c
@@ -87,37 +87,50 @@ static void llvm_load_system_value(
}
static LLVMValueRef
-llvm_load_input_helper(
- struct radeon_llvm_context * ctx,
- unsigned idx, int interp, int ij_index)
+llvm_load_input_vector(
+ struct radeon_llvm_context * ctx, unsigned location, unsigned ijregs,
+ boolean interp)
{
- const struct lp_build_context * bb = ctx-soa.bld_base.base;
- LLVMValueRef arg[2];
- int arg_count;
- const char * intrinsic;
-
- arg[0] = lp_build_const_int32(bb-gallivm, idx);
-
- if (interp) {
- intrinsic = llvm.R600.interp.input;
- arg[1] = lp_build_const_int32(bb-gallivm, ij_index);
- arg_count = 2;
- } else {
- intrinsic = llvm.R600.load.input;
- arg_count = 1;
- }
-
- return build_intrinsic(bb-gallivm-builder, intrinsic,
- bb-elem_type, arg[0], arg_count, LLVMReadNoneAttribute);
+ LLVMTypeRef VecType;
+ LLVMValueRef Args[2] = {
+ lp_build_const_int32((ctx-gallivm), location)
+ };
+ unsigned ArgCount = 1;
+ if (interp) {
+ VecType =
LLVMVectorType(ctx-soa.bld_base.base.elem_type, 2);
+ LLVMValueRef IJIndex = LLVMGetParam(ctx-main_fn,
ijregs / 2);
+ Args[ArgCount++] =
LLVMBuildExtractElement(ctx-gallivm.builder, IJIndex,
+ lp_build_const_int32((ctx-gallivm), 2 * (ijregs %
2)), );
+ Args[ArgCount++] =
LLVMBuildExtractElement(ctx-gallivm.builder, IJIndex,
+ lp_build_const_int32((ctx-gallivm), 2 * (ijregs % 2)
+ 1), );
+ LLVMValueRef HalfVec[2] = {
+ build_intrinsic(ctx-gallivm.builder,
llvm.R600.interp.xy,
+ VecType, Args, ArgCount,
LLVMReadNoneAttribute),
+ build_intrinsic(ctx-gallivm.builder,
llvm.R600.interp.zw,
+ VecType, Args, ArgCount,
LLVMReadNoneAttribute)
+ };
+ LLVMValueRef MaskInputs[4] = {
+ lp_build_const_int32((ctx-gallivm), 0),
+ lp_build_const_int32((ctx-gallivm), 1),
+ lp_build_const_int32((ctx-gallivm), 2),
+ lp_build_const_int32((ctx-gallivm), 3)
+ };
+ LLVMValueRef Mask = LLVMConstVector(MaskInputs, 4);
+ return LLVMBuildShuffleVector(ctx-gallivm.builder,
HalfVec[0], HalfVec[1],
+ Mask, );
+ } else {
+ VecType =
LLVMVectorType(ctx-soa.bld_base.base.elem_type, 4);
+ return build_intrinsic(ctx-gallivm.builder,
llvm.R600.interp.const,
+ VecType, Args, ArgCount, LLVMReadNoneAttribute);
+ }
}
static LLVMValueRef
llvm_face_select_helper(
struct radeon_llvm_context * ctx,
- unsigned face_loc, LLVMValueRef front_color, LLVMValueRef back_color)
+ LLVMValueRef face, LLVMValueRef front_color, LLVMValueRef back_color)
{
const struct lp_build_context * bb = ctx-soa.bld_base.base;
- LLVMValueRef face = llvm_load_input_helper(ctx, face_loc, 0, 0);
LLVMValueRef is_front = LLVMBuildFCmp(
bb-gallivm-builder, LLVMRealUGT, face,
lp_build_const_float(bb-gallivm, 0.0f),);
@@ -132,50 +145,46 @@ static void llvm_load_input(
{
const struct r600_shader_io * input = ctx-r600_inputs[input_index];
unsigned chan;
- unsigned interp = 0;
- int ij_index;
int two_side = (ctx-two_side input-name == TGSI_SEMANTIC_COLOR);
LLVMValueRef v;
+ boolean require_interp_intrinsic = ctx-chip_class = EVERGREEN
+ ctx-type == TGSI_PROCESSOR_FRAGMENT;
- if (ctx-chip_class = EVERGREEN ctx-type ==
TGSI_PROCESSOR_FRAGMENT
- input-spi_sid) {
- interp = 1;
- ij_index = (input-interpolate 0) ? input-ij_index : -1;
- }
+ if
