Re: [Mesa-dev] [PATCH 6/6] radeonsi: rename prefixes from radeon to si

2016-10-18 Thread Marek Olšák 
On Tue, Oct 18, 2016 at 11:54 AM, Nicolai Hähnle  wrote:
> Makes sense as a cleanup. At some point it would make sense to look into
> sharing some stuff with radv instead. There's probably not a huge amount
> because of the NIR/TGSI split, but still.

I'm always for code sharing, but I don't know whether radv will ever
be considered important outside of the radv camp. If somebody else
wants to share code with radv, I'll gladly accept patches.

Marek
___
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/mesa-dev

Re: [Mesa-dev] [PATCH 6/6] radeonsi: rename prefixes from radeon to si

2016-10-18 Thread Marek Olšák 
On Tue, Oct 18, 2016 at 6:28 PM, Emil Velikov  wrote:
> On 17 October 2016 at 14:44, Marek Olšák  wrote:
>> From: Marek Olšák 
>>
>> ---
>>  src/gallium/drivers/radeonsi/si_pipe.c |   2 +-
>>  src/gallium/drivers/radeonsi/si_shader.c   |  96 ++---
>>  src/gallium/drivers/radeonsi/si_shader_internal.h  |  70 +-
>>  .../drivers/radeonsi/si_shader_tgsi_setup.c| 150 
>> ++---
>>  4 files changed, 159 insertions(+), 159 deletions(-)
>>
> From build POV everything is perfect thanks Marek ! For those
> Reviewed-by: Emil Velikov 

Thanks.

>
> Humble suggestion - set the following for friendlier patches ;-)
> $ git config --global diff.renames true

I forgot to remove one (almost empty) file, so a rename wasn't
detected properly. I do send all my Mesa patches with git send-email
-M.

Marek
___
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/mesa-dev

Re: [Mesa-dev] [PATCH 6/6] radeonsi: rename prefixes from radeon to si

2016-10-18 Thread Emil Velikov 
On 17 October 2016 at 14:44, Marek Olšák  wrote:
> From: Marek Olšák 
>
> ---
>  src/gallium/drivers/radeonsi/si_pipe.c |   2 +-
>  src/gallium/drivers/radeonsi/si_shader.c   |  96 ++---
>  src/gallium/drivers/radeonsi/si_shader_internal.h  |  70 +-
>  .../drivers/radeonsi/si_shader_tgsi_setup.c| 150 
> ++---
>  4 files changed, 159 insertions(+), 159 deletions(-)
>
From build POV everything is perfect thanks Marek ! For those
Reviewed-by: Emil Velikov 

Humble suggestion - set the following for friendlier patches ;-)
$ git config --global diff.renames true

Emil
___
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/mesa-dev

Re: [Mesa-dev] [PATCH 6/6] radeonsi: rename prefixes from radeon to si

2016-10-18 Thread Nicolai Hähnle 
Makes sense as a cleanup. At some point it would make sense to look into 
sharing some stuff with radv instead. There's probably not a huge amount 
because of the NIR/TGSI split, but still.


Patches 1 & 4:

Acked-by: Nicolai Hähnle 

Patches 2, 3, 5, 6:

Reviewed-by: Nicolai Hähnle 

On 17.10.2016 15:44, Marek Olšák wrote:

From: Marek Olšák 

---
 src/gallium/drivers/radeonsi/si_pipe.c |   2 +-
 src/gallium/drivers/radeonsi/si_shader.c   |  96 ++---
 src/gallium/drivers/radeonsi/si_shader_internal.h  |  70 +-
 .../drivers/radeonsi/si_shader_tgsi_setup.c| 150 ++---
 4 files changed, 159 insertions(+), 159 deletions(-)

diff --git a/src/gallium/drivers/radeonsi/si_pipe.c 
b/src/gallium/drivers/radeonsi/si_pipe.c
index 7924375..a9faa75 100644
--- a/src/gallium/drivers/radeonsi/si_pipe.c
+++ b/src/gallium/drivers/radeonsi/si_pipe.c
@@ -119,21 +119,21 @@ static void si_emit_string_marker(struct pipe_context 
*ctx,
struct si_context *sctx = (struct si_context *)ctx;

dd_parse_apitrace_marker(string, len, >apitrace_call_number);
 }

 static LLVMTargetMachineRef
 si_create_llvm_target_machine(struct si_screen *sscreen)
 {
const char *triple = "amdgcn--";

-   return LLVMCreateTargetMachine(radeon_llvm_get_r600_target(triple), 
triple,
+   return LLVMCreateTargetMachine(si_llvm_get_amdgpu_target(triple), 
triple,
   
r600_get_llvm_processor_name(sscreen->b.family),
 #if HAVE_LLVM >= 0x0308
   sscreen->b.debug_flags & DBG_SI_SCHED ?
   SI_LLVM_DEFAULT_FEATURES 
",+si-scheduler" :
 #endif
   SI_LLVM_DEFAULT_FEATURES,
   LLVMCodeGenLevelDefault,
   LLVMRelocDefault,
   LLVMCodeModelDefault);
 }
diff --git a/src/gallium/drivers/radeonsi/si_shader.c 
b/src/gallium/drivers/radeonsi/si_shader.c
index bca07ac..cbf2090 100644
--- a/src/gallium/drivers/radeonsi/si_shader.c
+++ b/src/gallium/drivers/radeonsi/si_shader.c
@@ -478,21 +478,21 @@ static LLVMValueRef get_bounded_indirect_index(struct 
si_shader_context *ctx,
 {
LLVMValueRef result = get_indirect_index(ctx, ind, rel_index);

/* LLVM 3.8: If indirect resource indexing is used:
 * - SI & CIK hang
 * - VI crashes
 */
if (HAVE_LLVM <= 0x0308)
return LLVMGetUndef(ctx->i32);

-   return radeon_llvm_bound_index(ctx, result, num);
+   return si_llvm_bound_index(ctx, result, num);
 }


 /**
  * Calculate a dword address given an input or output register and a stride.
  */
 static LLVMValueRef get_dw_address(struct si_shader_context *ctx,
   const struct tgsi_full_dst_register *dst,
   const struct tgsi_full_src_register *src,
   LLVMValueRef vertex_dw_stride,
@@ -869,21 +869,21 @@ static LLVMValueRef buffer_load(struct 
lp_build_tgsi_context *bld_base,
return LLVMBuildExtractElement(gallivm->builder, value,
lp_build_const_int32(gallivm, swizzle), "");
}

value = build_buffer_load(ctx, buffer, 1, NULL, base, offset,
  swizzle * 4, 1, 0);

value2 = build_buffer_load(ctx, buffer, 1, NULL, base, offset,
   swizzle * 4 + 4, 1, 0);

-   return radeon_llvm_emit_fetch_64bit(bld_base, type, value, value2);
+   return si_llvm_emit_fetch_64bit(bld_base, type, value, value2);
 }

 /**
  * Load from LDS.
  *
  * \param type output value type
  * \param swizzle  offset (typically 0..3); it can be ~0, which loads a 
vec4
  * \param dw_addr  address in dwords
  */
 static LLVMValueRef lds_load(struct lp_build_tgsi_context *bld_base,
@@ -906,21 +906,21 @@ static LLVMValueRef lds_load(struct lp_build_tgsi_context 
*bld_base,

dw_addr = lp_build_add(_base->uint_bld, dw_addr,
lp_build_const_int32(gallivm, swizzle));

value = build_indexed_load(ctx, ctx->lds, dw_addr, false);
if (tgsi_type_is_64bit(type)) {
LLVMValueRef value2;
dw_addr = lp_build_add(_base->uint_bld, dw_addr,
   lp_build_const_int32(gallivm, swizzle + 
1));
value2 = build_indexed_load(ctx, ctx->lds, dw_addr, false);
-   return radeon_llvm_emit_fetch_64bit(bld_base, type, value, 
value2);
+   return si_llvm_emit_fetch_64bit(bld_base, type, value, value2);
}

return LLVMBuildBitCast(gallivm->builder, value,
tgsi2llvmtype(bld_base, type), "");
 }

 /**
  * Store to LDS.
  *