date:20160105

[Mesa-dev] [PATCH 4/6] gallium/drivers/ilo: Use unsigned for loop index

2016-01-05 Thread Edward O'Callaghan

Found-by: Coccinelle
Signed-off-by: Edward O'Callaghan 
Reviewed-by: Brian Paul 
---
 src/gallium/drivers/ilo/core/ilo_builder.c   |  8 
 src/gallium/drivers/ilo/shader/ilo_shader_fs.c   | 16 
 src/gallium/drivers/ilo/shader/ilo_shader_vs.c   |  4 ++--
 src/gallium/drivers/ilo/shader/toy_legalize_ra.c |  4 ++--
 4 files changed, 16 insertions(+), 16 deletions(-)

diff --git a/src/gallium/drivers/ilo/core/ilo_builder.c 
b/src/gallium/drivers/ilo/core/ilo_builder.c
index 9d51951..079872f 100644
--- a/src/gallium/drivers/ilo/core/ilo_builder.c
+++ b/src/gallium/drivers/ilo/core/ilo_builder.c
@@ -333,7 +333,7 @@ ilo_builder_init(struct ilo_builder *builder,
  const struct ilo_dev *dev,
  struct intel_winsys *winsys)
 {
-   int i;
+   unsigned i;
 
assert(ilo_is_zeroed(builder, sizeof(*builder)));
 
@@ -366,7 +366,7 @@ ilo_builder_init(struct ilo_builder *builder,
 void
 ilo_builder_reset(struct ilo_builder *builder)
 {
-   int i;
+   unsigned i;
 
for (i = 0; i < ILO_BUILDER_WRITER_COUNT; i++)
   ilo_builder_writer_reset(builder, i);
@@ -382,7 +382,7 @@ ilo_builder_reset(struct ilo_builder *builder)
 bool
 ilo_builder_begin(struct ilo_builder *builder)
 {
-   int i;
+   unsigned i;
 
for (i = 0; i < ILO_BUILDER_WRITER_COUNT; i++) {
   if (!ilo_builder_writer_alloc_and_map(builder, i)) {
@@ -407,7 +407,7 @@ struct intel_bo *
 ilo_builder_end(struct ilo_builder *builder, unsigned *used)
 {
struct ilo_builder_writer *bat;
-   int i;
+   unsigned i;
 
ilo_builder_batch_patch_sba(builder);
 
diff --git a/src/gallium/drivers/ilo/shader/ilo_shader_fs.c 
b/src/gallium/drivers/ilo/shader/ilo_shader_fs.c
index 5250115..f46126e 100644
--- a/src/gallium/drivers/ilo/shader/ilo_shader_fs.c
+++ b/src/gallium/drivers/ilo/shader/ilo_shader_fs.c
@@ -266,7 +266,7 @@ fs_lower_opcode_tgsi_indirect_const(struct 
fs_compile_context *fcc,
struct toy_inst *inst;
struct toy_src desc, real_src[4];
struct toy_dst tmp, real_dst[4];
-   int i;
+   unsigned i;
 
tsrc_transpose(idx, real_src);
 
@@ -319,7 +319,7 @@ fs_lower_opcode_tgsi_const_pcb(struct fs_compile_context 
*fcc,
const int grf_subreg = (idx.val32 & 1) * 16;
struct toy_src src;
struct toy_dst real_dst[4];
-   int i;
+   unsigned i;
 
if (!fcc->variant->use_pcb || dim != 0 || idx.file != TOY_FILE_IMM ||
grf >= fcc->first_attr_grf)
@@ -350,7 +350,7 @@ fs_lower_opcode_tgsi_const_gen6(struct fs_compile_context 
*fcc,
struct toy_inst *inst;
struct toy_src desc;
struct toy_dst tmp, real_dst[4];
-   int i;
+   unsigned i;
 
if (fs_lower_opcode_tgsi_const_pcb(fcc, dst, dim, idx))
   return;
@@ -396,7 +396,7 @@ fs_lower_opcode_tgsi_const_gen7(struct fs_compile_context 
*fcc,
struct toy_src desc;
struct toy_inst *inst;
struct toy_dst tmp, real_dst[4];
-   int i;
+   unsigned i;
 
if (fs_lower_opcode_tgsi_const_pcb(fcc, dst, dim, idx))
   return;
@@ -1168,7 +1168,7 @@ fs_lower_opcode_derivative(struct toy_compiler *tc, 
struct toy_inst *inst)
 {
struct toy_dst dst[4];
struct toy_src src[4];
-   int i;
+   unsigned i;
 
tdst_transpose(inst->dst, dst);
tsrc_transpose(inst->src[0], src);
@@ -1257,7 +1257,7 @@ fs_lower_opcode_kil(struct toy_compiler *tc, struct 
toy_inst *inst)
}
else {
   struct toy_src src[4];
-  int i;
+  unsigned i;
 
   tsrc_transpose(inst->src[0], src);
   /* mask out killed pixels */
@@ -1583,7 +1583,7 @@ fs_write_fb(struct fs_compile_context *fcc)
 static void
 fs_setup_shader_out(struct ilo_shader *sh, const struct toy_tgsi *tgsi)
 {
-   int i;
+   unsigned i;
 
sh->out.count = tgsi->num_outputs;
for (i = 0; i < tgsi->num_outputs; i++) {
@@ -1603,7 +1603,7 @@ static void
 fs_setup_shader_in(struct ilo_shader *sh, const struct toy_tgsi *tgsi,
bool flatshade)
 {
-   int i;
+   unsigned i;
 
sh->in.count = tgsi->num_inputs;
for (i = 0; i < tgsi->num_inputs; i++) {
diff --git a/src/gallium/drivers/ilo/shader/ilo_shader_vs.c 
b/src/gallium/drivers/ilo/shader/ilo_shader_vs.c
index 46a7e6f..0df0afc 100644
--- a/src/gallium/drivers/ilo/shader/ilo_shader_vs.c
+++ b/src/gallium/drivers/ilo/shader/ilo_shader_vs.c
@@ -522,7 +522,7 @@ vs_prepare_tgsi_sampling(struct vs_compile_context *vcc,
   if (num_coords >= 3) {
  struct toy_dst tmp, max;
  struct toy_src abs_coords[3];
- int i;
+ unsigned i;
 
  tmp = tc_alloc_tmp(tc);
  max = tdst_writemask(tmp, TOY_WRITEMASK_W);
@@ -804,7 +804,7 @@ static int
 vs_collect_outputs(struct vs_compile_context *vcc, struct toy_src *outs)
 {
const struct toy_tgsi *tgsi = >tgsi;
-   int i;
+   unsigned i;
 
for (i = 0; i < vcc->shader->out.count; i++) {
   const int slot = vcc->output_map[i];
diff --git a/src/gallium/drivers/ilo/shader/toy_legalize_ra.c

[Mesa-dev] [PATCH 3/6] gallium: Use unsigned for loop index

2016-01-05 Thread Edward O'Callaghan

Found-by: Coccinelle
Signed-off-by: Edward O'Callaghan 
Reviewed-by: Brian Paul 
---
 src/gallium/auxiliary/gallivm/lp_bld_tgsi_soa.c | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/src/gallium/auxiliary/gallivm/lp_bld_tgsi_soa.c 
b/src/gallium/auxiliary/gallivm/lp_bld_tgsi_soa.c
index 09c1b37..8c39ab0 100644
--- a/src/gallium/auxiliary/gallivm/lp_bld_tgsi_soa.c
+++ b/src/gallium/auxiliary/gallivm/lp_bld_tgsi_soa.c
@@ -1197,7 +1197,7 @@ get_soa_array_offsets(struct lp_build_context *uint_bld,
 
if (need_perelement_offset) {
   LLVMValueRef pixel_offsets;
-  int i;
+  unsigned i;
  /* build pixel offset vector: {0, 1, 2, 3, ...} */
   pixel_offsets = uint_bld->undef;
   for (i = 0; i < uint_bld->type.length; i++) {
@@ -1809,7 +1809,7 @@ emit_store_double_chan(struct lp_build_tgsi_context 
*bld_base,
struct gallivm_state *gallivm = bld_base->base.gallivm;
LLVMBuilderRef builder = gallivm->builder;
struct lp_build_context *float_bld = _base->base;
-   int i;
+   unsigned i;
LLVMValueRef temp, temp2;
LLVMValueRef shuffles[8];
LLVMValueRef shuffles2[8];
@@ -2713,7 +2713,7 @@ static boolean
 near_end_of_shader(struct lp_build_tgsi_soa_context *bld,
int pc)
 {
-   int i;
+   unsigned i;
 
for (i = 0; i < 5; i++) {
   unsigned opcode;
-- 
2.5.0

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[Mesa-dev] [PATCH 6/6] gallium/drivers/svga: Use unsigned for loop index

2016-01-05 Thread Edward O'Callaghan

Fix a 's/unsigned int/unsigned/' consistency case while here.

Found-by: Coccinelle
Signed-off-by: Edward O'Callaghan 
Reviewed-by: Brian Paul 
---
 src/gallium/drivers/svga/svga_resource_buffer_upload.c |  2 +-
 src/gallium/drivers/svga/svga_tgsi_insn.c  | 12 ++--
 2 files changed, 7 insertions(+), 7 deletions(-)

diff --git a/src/gallium/drivers/svga/svga_resource_buffer_upload.c 
b/src/gallium/drivers/svga/svga_resource_buffer_upload.c
index 8c5cff5..ba1a1f2 100644
--- a/src/gallium/drivers/svga/svga_resource_buffer_upload.c
+++ b/src/gallium/drivers/svga/svga_resource_buffer_upload.c
@@ -221,7 +221,7 @@ svga_buffer_upload_gb_command(struct svga_context *svga,
struct svga_3d_update_gb_image *whole_update_cmd = NULL;
uint32 numBoxes = sbuf->map.num_ranges;
struct pipe_resource *dummy;
-   unsigned int i;
+   unsigned i;
 
assert(numBoxes);
assert(sbuf->dma.updates == NULL);
diff --git a/src/gallium/drivers/svga/svga_tgsi_insn.c 
b/src/gallium/drivers/svga/svga_tgsi_insn.c
index dbb90f7..970e70a 100644
--- a/src/gallium/drivers/svga/svga_tgsi_insn.c
+++ b/src/gallium/drivers/svga/svga_tgsi_insn.c
@@ -166,7 +166,7 @@ scalar(struct src_register src, unsigned comp)
 static boolean
 svga_arl_needs_adjustment( const struct svga_shader_emitter *emit )
 {
-   int i;
+   unsigned i;
 
for (i = 0; i < emit->num_arl_consts; ++i) {
   if (emit->arl_consts[i].arl_num == emit->current_arl)
@@ -179,7 +179,7 @@ svga_arl_needs_adjustment( const struct svga_shader_emitter 
*emit )
 static int
 svga_arl_adjustment( const struct svga_shader_emitter *emit )
 {
-   int i;
+   unsigned i;
 
for (i = 0; i < emit->num_arl_consts; ++i) {
   if (emit->arl_consts[i].arl_num == emit->current_arl)
@@ -1175,7 +1175,7 @@ emit_div(struct svga_shader_emitter *emit,
const struct src_register src1 =
   translate_src_register(emit, >Src[1] );
SVGA3dShaderDestToken temp = get_temp( emit );
-   int i;
+   unsigned i;
 
/* For each enabled element, perform a RCP instruction.  Note that
 * RCP is scalar in SVGA3D:
@@ -1822,7 +1822,7 @@ emit_tex_swizzle(struct svga_shader_emitter *emit,
const unsigned swizzleIn[4] = {swizzle_x, swizzle_y, swizzle_z, swizzle_w};
unsigned srcSwizzle[4];
unsigned srcWritemask = 0x0, zeroWritemask = 0x0, oneWritemask = 0x0;
-   int i;
+   unsigned i;
 
/* build writemasks and srcSwizzle terms */
for (i = 0; i < 4; i++) {
@@ -3371,7 +3371,7 @@ emit_light_twoside(struct svga_shader_emitter *emit)
struct src_register back[2];
SVGA3dShaderDestToken color[2];
int count = emit->internal_color_count;
-   int i;
+   unsigned i;
SVGA3dShaderInstToken if_token;
 
if (count == 0)
@@ -3698,7 +3698,7 @@ static boolean
 pre_parse_add_indirect( struct svga_shader_emitter *emit,
 int num, int current_arl)
 {
-   int i;
+   unsigned i;
assert(num < 0);
 
for (i = 0; i < emit->num_arl_consts; ++i) {
-- 
2.5.0

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[Mesa-dev] [PATCH 2/6] gallium/drivers: Remove unnecessary semicolons

2016-01-05 Thread Edward O'Callaghan

Found-by: Coccinelle
Signed-off-by: Edward O'Callaghan 
Reviewed-by: Brian Paul 
---
 src/gallium/drivers/i915/i915_state.c | 2 +-
 src/gallium/drivers/ilo/shader/ilo_shader_vs.c| 2 +-
 src/gallium/drivers/llvmpipe/lp_test_blend.c  | 2 +-
 src/gallium/drivers/llvmpipe/lp_test_conv.c   | 2 +-
 src/gallium/drivers/r300/compiler/r500_fragprog.c | 2 +-
 src/gallium/drivers/r600/r600_shader.c| 2 +-
 src/gallium/drivers/radeonsi/cik_sdma.c   | 2 +-
 src/gallium/drivers/softpipe/sp_query.c   | 2 +-
 src/gallium/drivers/svga/svga_cmd.c   | 4 ++--
 src/gallium/drivers/vc4/vc4_program.c | 2 +-
 10 files changed, 11 insertions(+), 11 deletions(-)

diff --git a/src/gallium/drivers/i915/i915_state.c 
b/src/gallium/drivers/i915/i915_state.c
index 6ba9646..d1661fe 100644
--- a/src/gallium/drivers/i915/i915_state.c
+++ b/src/gallium/drivers/i915/i915_state.c
@@ -423,7 +423,7 @@ i915_prepare_vertex_sampling(struct i915_context *i915)
  for (j = view->u.tex.first_level; j <= tex->last_level; j++) {
 mip_offsets[j] = i915_texture_offset(i915_tex, j , 0 /* FIXME 
depth */);
 row_stride[j] = i915_tex->stride;
-img_stride[j] = 0; /* FIXME */;
+img_stride[j] = 0; /* FIXME */
  }
 
  draw_set_mapped_texture(i915->draw,
diff --git a/src/gallium/drivers/ilo/shader/ilo_shader_vs.c 
b/src/gallium/drivers/ilo/shader/ilo_shader_vs.c
index a29baab..46a7e6f 100644
--- a/src/gallium/drivers/ilo/shader/ilo_shader_vs.c
+++ b/src/gallium/drivers/ilo/shader/ilo_shader_vs.c
@@ -126,7 +126,7 @@ vs_lower_opcode_tgsi_const_gen6(struct vs_compile_context 
*vcc,
tc_MOV(tc, block_offsets, idx);
 
msg_type = GEN6_MSG_DP_OWORD_DUAL_BLOCK_READ;
-   msg_ctrl = GEN6_MSG_DP_OWORD_DUAL_BLOCK_SIZE_1;;
+   msg_ctrl = GEN6_MSG_DP_OWORD_DUAL_BLOCK_SIZE_1;
msg_len = 2;
 
desc = tsrc_imm_mdesc_data_port(tc, false, msg_len, 1, true, false,
diff --git a/src/gallium/drivers/llvmpipe/lp_test_blend.c 
b/src/gallium/drivers/llvmpipe/lp_test_blend.c
index 7b19174..9139b83 100644
--- a/src/gallium/drivers/llvmpipe/lp_test_blend.c
+++ b/src/gallium/drivers/llvmpipe/lp_test_blend.c
@@ -184,7 +184,7 @@ add_blend_test(struct gallivm_state *gallivm,
 
LLVMBuildStore(builder, res, res_ptr);
 
-   LLVMBuildRetVoid(builder);;
+   LLVMBuildRetVoid(builder);
 
gallivm_verify_function(gallivm, func);
 
diff --git a/src/gallium/drivers/llvmpipe/lp_test_conv.c 
b/src/gallium/drivers/llvmpipe/lp_test_conv.c
index a30f35c..02a6319 100644
--- a/src/gallium/drivers/llvmpipe/lp_test_conv.c
+++ b/src/gallium/drivers/llvmpipe/lp_test_conv.c
@@ -140,7 +140,7 @@ add_conv_test(struct gallivm_state *gallivm,
   LLVMBuildStore(builder, dst[i], ptr);
}
 
-   LLVMBuildRetVoid(builder);;
+   LLVMBuildRetVoid(builder);
 
gallivm_verify_function(gallivm, func);
 
diff --git a/src/gallium/drivers/r300/compiler/r500_fragprog.c 
b/src/gallium/drivers/r300/compiler/r500_fragprog.c
index 88aad8a..4c415af 100644
--- a/src/gallium/drivers/r300/compiler/r500_fragprog.c
+++ b/src/gallium/drivers/r300/compiler/r500_fragprog.c
@@ -384,7 +384,7 @@ void r500FragmentProgramDump(struct radeon_compiler *c, 
void *user)
 case R500_INST_TYPE_OUT: str = "OUT"; break;
 case R500_INST_TYPE_FC: str = "FC"; break;
 case R500_INST_TYPE_TEX: str = "TEX"; break;
-};
+}
 fprintf(stderr,"%s %s %s %s %s ", str,
inst & R500_INST_TEX_SEM_WAIT ? "TEX_WAIT" : "",
inst & R500_INST_LAST ? "LAST" : "",
diff --git a/src/gallium/drivers/r600/r600_shader.c 
b/src/gallium/drivers/r600/r600_shader.c
index c156549..07d06aa 100644
--- a/src/gallium/drivers/r600/r600_shader.c
+++ b/src/gallium/drivers/r600/r600_shader.c
@@ -4427,7 +4427,7 @@ static int cayman_mul_double_instr(struct r600_shader_ctx 
*ctx)
memset(, 0, sizeof(struct r600_bytecode_alu));
alu.op = ctx->inst_info->op;
for (j = 0; j < inst->Instruction.NumSrcRegs; j++) {
-   r600_bytecode_src([j], >src[j], k 
* 2 + ((i == 3) ? 0 : 1));;
+   r600_bytecode_src([j], >src[j], k 
* 2 + ((i == 3) ? 0 : 1));
}
alu.dst.sel = t1;
alu.dst.chan = i;
diff --git a/src/gallium/drivers/radeonsi/cik_sdma.c 
b/src/gallium/drivers/radeonsi/cik_sdma.c
index 2de237b..105a1b2 100644
--- a/src/gallium/drivers/radeonsi/cik_sdma.c
+++ b/src/gallium/drivers/radeonsi/cik_sdma.c
@@ -196,7 +196,7 @@ static void cik_sdma_copy_tile(struct si_context *ctx,
(tile_split << 11) | (mt << 8) | (array_mode << 3) |
lbpe;
cs->buf[cs->cdw++] = y << 16; /* | x */
-   cs->buf[cs->cdw++] = 0; /* z */;
+   cs->buf[cs->cdw++] = 0; /* z */

[Mesa-dev] [PATCH 5/6] gallium/drivers/r600: Use unsigned for loop index

2016-01-05 Thread Edward O'Callaghan

Found-by: Coccinelle
Signed-off-by: Edward O'Callaghan 
Reviewed-by: Brian Paul 
---
 src/gallium/drivers/r600/r600_shader.c | 18 +-
 1 file changed, 9 insertions(+), 9 deletions(-)

diff --git a/src/gallium/drivers/r600/r600_shader.c 
b/src/gallium/drivers/r600/r600_shader.c
index 07d06aa..df40f94 100644
--- a/src/gallium/drivers/r600/r600_shader.c
+++ b/src/gallium/drivers/r600/r600_shader.c
@@ -395,7 +395,7 @@ static int tgsi_last_instruction(unsigned writemask)
 static int tgsi_is_supported(struct r600_shader_ctx *ctx)
 {
struct tgsi_full_instruction *i = >parse.FullToken.FullInstruction;
-   int j;
+   unsigned j;
 
if (i->Instruction.NumDstRegs > 1 && i->Instruction.Opcode != 
TGSI_OPCODE_DFRACEXP) {
R600_ERR("too many dst (%d)\n", i->Instruction.NumDstRegs);
@@ -1167,7 +1167,7 @@ static int allocate_system_value_inputs(struct 
r600_shader_ctx *ctx, int gpr_off
 */
 static int evergreen_gpr_count(struct r600_shader_ctx *ctx)
 {
-   int i;
+   unsigned i;
int num_baryc;
struct tgsi_parse_context parse;
 
@@ -1586,7 +1586,7 @@ static int fetch_gs_input(struct r600_shader_ctx *ctx, 
struct tgsi_full_src_regi
 static int tgsi_split_gs_inputs(struct r600_shader_ctx *ctx)
 {
struct tgsi_full_instruction *inst = 
>parse.FullToken.FullInstruction;
-   int i;
+   unsigned i;
 
for (i = 0; i < inst->Instruction.NumSrcRegs; i++) {
struct tgsi_full_src_register *src = >Src[i];
@@ -1855,7 +1855,7 @@ static int fetch_tcs_output(struct r600_shader_ctx *ctx, 
struct tgsi_full_src_re
 static int tgsi_split_lds_inputs(struct r600_shader_ctx *ctx)
 {
struct tgsi_full_instruction *inst = 
>parse.FullToken.FullInstruction;
-   int i;
+   unsigned i;
 
for (i = 0; i < inst->Instruction.NumSrcRegs; i++) {
struct tgsi_full_src_register *src = >Src[i];
@@ -2785,7 +2785,7 @@ static int r600_tess_factor_read(struct r600_shader_ctx 
*ctx,
 
 static int r600_emit_tess_factor(struct r600_shader_ctx *ctx)
 {
-   int i;
+   unsigned i;
int stride, outer_comps, inner_comps;
int tessinner_idx = -1, tessouter_idx = -1;
int r;
@@ -4794,7 +4794,7 @@ static int tgsi_lit(struct r600_shader_ctx *ctx)
{
int chan;
int sel;
-   int i;
+   unsigned i;
 
if (ctx->bc->chip_class == CAYMAN) {
for (i = 0; i < 3; i++) {
@@ -7928,7 +7928,7 @@ static int tgsi_exp(struct r600_shader_ctx *ctx)
struct tgsi_full_instruction *inst = 
>parse.FullToken.FullInstruction;
struct r600_bytecode_alu alu;
int r;
-   int i;
+   unsigned i;
 
/* result.x = 2^floor(src); */
if (inst->Dst[0].Register.WriteMask & 1) {
@@ -8057,7 +8057,7 @@ static int tgsi_log(struct r600_shader_ctx *ctx)
struct tgsi_full_instruction *inst = 
>parse.FullToken.FullInstruction;
struct r600_bytecode_alu alu;
int r;
-   int i;
+   unsigned i;
 
/* result.x = floor(log2(|src|)); */
if (inst->Dst[0].Register.WriteMask & 1) {
@@ -8784,7 +8784,7 @@ static int tgsi_bgnloop(struct r600_shader_ctx *ctx)
 
 static int tgsi_endloop(struct r600_shader_ctx *ctx)
 {
-   int i;
+   unsigned i;
 
r600_bytecode_add_cfinst(ctx->bc, CF_OP_LOOP_END);
 
-- 
2.5.0

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[Mesa-dev] [PATCH 1/6] gallium: Remove unnecessary semicolons

2016-01-05 Thread Edward O'Callaghan

Fix silly issue with MSVC case fall-though support to need
a extra 'break;'

Found-by: Coccinelle
Signed-off-by: Edward O'Callaghan 
Reviewed-by: Brian Paul 
---
 src/gallium/auxiliary/draw/draw_pipe_aaline.c  | 2 +-
 src/gallium/auxiliary/gallivm/lp_bld_swizzle.c | 2 +-
 src/gallium/auxiliary/nir/tgsi_to_nir.c| 2 +-
 src/gallium/auxiliary/util/u_surface.c | 3 ++-
 src/gallium/auxiliary/vl/vl_mpeg12_decoder.c   | 2 +-
 src/gallium/state_trackers/nine/swapchain9.c   | 2 +-
 src/gallium/state_trackers/omx/entrypoint.c| 2 +-
 src/gallium/state_trackers/vdpau/mixer.c   | 2 +-
 8 files changed, 9 insertions(+), 8 deletions(-)

diff --git a/src/gallium/auxiliary/draw/draw_pipe_aaline.c 
b/src/gallium/auxiliary/draw/draw_pipe_aaline.c
index 3ce550a..e85ae16 100644
--- a/src/gallium/auxiliary/draw/draw_pipe_aaline.c
+++ b/src/gallium/auxiliary/draw/draw_pipe_aaline.c
@@ -938,7 +938,7 @@ draw_aaline_prepare_outputs(struct draw_context *draw,
const struct pipe_rasterizer_state *rast = draw->rasterizer;
 
/* update vertex attrib info */
-   aaline->pos_slot = draw_current_shader_position_output(draw);;
+   aaline->pos_slot = draw_current_shader_position_output(draw);
 
if (!rast->line_smooth)
   return;
diff --git a/src/gallium/auxiliary/gallivm/lp_bld_swizzle.c 
b/src/gallium/auxiliary/gallivm/lp_bld_swizzle.c
index b1aef71..f571838 100644
--- a/src/gallium/auxiliary/gallivm/lp_bld_swizzle.c
+++ b/src/gallium/auxiliary/gallivm/lp_bld_swizzle.c
@@ -720,7 +720,7 @@ lp_build_transpose_aos_n(struct gallivm_state *gallivm,
 
   default:
  assert(0);
-   };
+   }
 }
 
 
diff --git a/src/gallium/auxiliary/nir/tgsi_to_nir.c 
b/src/gallium/auxiliary/nir/tgsi_to_nir.c
index 94d992b..7c57759 100644
--- a/src/gallium/auxiliary/nir/tgsi_to_nir.c
+++ b/src/gallium/auxiliary/nir/tgsi_to_nir.c
@@ -1950,7 +1950,7 @@ tgsi_processor_to_shader_stage(unsigned processor)
case TGSI_PROCESSOR_COMPUTE:   return MESA_SHADER_COMPUTE;
default:
   unreachable("invalid TGSI processor");
-   };
+   }
 }
 
 struct nir_shader *
diff --git a/src/gallium/auxiliary/util/u_surface.c 
b/src/gallium/auxiliary/util/u_surface.c
index 6aa44f9..c150d92 100644
--- a/src/gallium/auxiliary/util/u_surface.c
+++ b/src/gallium/auxiliary/util/u_surface.c
@@ -600,7 +600,8 @@ is_box_inside_resource(const struct pipe_resource *res,
   depth = res->array_size;
   assert(res->array_size % 6 == 0);
   break;
-   case PIPE_MAX_TEXTURE_TYPES:;
+   case PIPE_MAX_TEXTURE_TYPES:
+  break;
}
 
return box->x >= 0 &&
diff --git a/src/gallium/auxiliary/vl/vl_mpeg12_decoder.c 
b/src/gallium/auxiliary/vl/vl_mpeg12_decoder.c
index f5bb3a0..b5c7045 100644
--- a/src/gallium/auxiliary/vl/vl_mpeg12_decoder.c
+++ b/src/gallium/auxiliary/vl/vl_mpeg12_decoder.c
@@ -792,7 +792,7 @@ vl_mpeg12_end_frame(struct pipe_video_codec *decoder,
   for (j = 0; j < VL_MAX_REF_FRAMES; ++j) {
  if (!ref_frames[j] || !ref_frames[j][i]) continue;
 
- vb[2] = vl_vb_get_mv(>vertex_stream, j);;
+ vb[2] = vl_vb_get_mv(>vertex_stream, j);
  dec->context->set_vertex_buffers(dec->context, 0, 3, vb);
 
  vl_mc_render_ref(i ? >mc_c : >mc_y, >mc[i], 
ref_frames[j][i]);
diff --git a/src/gallium/state_trackers/nine/swapchain9.c 
b/src/gallium/state_trackers/nine/swapchain9.c
index 3f5be26..3b1a7a4 100644
--- a/src/gallium/state_trackers/nine/swapchain9.c
+++ b/src/gallium/state_trackers/nine/swapchain9.c
@@ -790,7 +790,7 @@ NineSwapChain9_Present( struct NineSwapChain9 *This,
 case D3DSWAPEFFECT_FLIP:
 UNTESTED(4);
 case D3DSWAPEFFECT_DISCARD:
-/* rotate the queue */;
+/* rotate the queue */
 pipe_resource_reference(, This->buffers[0]->base.resource);
 for (i = 1; i <= This->params.BackBufferCount; i++) {
 NineSurface9_SetResourceResize(This->buffers[i - 1],
diff --git a/src/gallium/state_trackers/omx/entrypoint.c 
b/src/gallium/state_trackers/omx/entrypoint.c
index da9ca10..afcbd97 100644
--- a/src/gallium/state_trackers/omx/entrypoint.c
+++ b/src/gallium/state_trackers/omx/entrypoint.c
@@ -137,7 +137,7 @@ OMX_ERRORTYPE omx_workaround_Destructor(OMX_COMPONENTTYPE 
*comp)
priv->state = OMX_StateInvalid;
tsem_up(priv->messageSem);
 
-   /* wait for thread to exit */;
+   /* wait for thread to exit */
pthread_join(priv->messageHandlerThread, NULL);
 
return omx_base_component_Destructor(comp);
diff --git a/src/gallium/state_trackers/vdpau/mixer.c 
b/src/gallium/state_trackers/vdpau/mixer.c
index c0b1ecc..dec79ff 100644
--- a/src/gallium/state_trackers/vdpau/mixer.c
+++ b/src/gallium/state_trackers/vdpau/mixer.c
@@ -294,7 +294,7 @@ VdpStatus vlVdpVideoMixerRender(VdpVideoMixer mixer,
default:
   pipe_mutex_unlock(vmixer->device->mutex);
   return VDP_STATUS_INVALID_VIDEO_MIXER_PICTURE_STRUCTURE;
-   };
+   }
 
if

Re: [Mesa-dev] [PATCH] gallium/dri2: Avoid uneeded stride to pitch conversion

2016-01-05 Thread Marek Olšák

On Tue, Jan 5, 2016 at 5:19 PM, Axel Davy  wrote:
> Hi Nicolas,
>
> I believe this patch doesn't fully solve the problem and could introduce
> some bugs.
>
> For example you change dri2_create_image_from_name pitch argument to stride,
> whereas this function is used as is to implement createImageFromName from
> __DRIimageExtensionRec,
> which takes a pitch. That said for this very function I'm not sure it is
> used correctly by the other parts of mesa,
> for example in dri2_create_image_mesa_drm_buffer it seems to pass a stride
> ...
>
> It is a good idea to clean the pitch/stride confusions that can occur in the
> code, but you should fix
> all occurences, not just some subset. I mean you'll have to change
> __DRIimageExtensionRec spec,
> adapt all users and implementers.

No, __DRIimageExtensionRec can't be changed. It's part of the stable
libGL->driver interface.

Marek
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Re: [Mesa-dev] [PATCH] i965: Use rcp in brw_lower_texture_gradients rather than 1.0 / x.

2016-01-05 Thread Pohjolainen, Topi

On Tue, Jan 05, 2016 at 05:33:09AM -0800, Kenneth Graunke wrote:
> That's what it's for.  Plus, we actually implement rcp.

Reviewed-by: Topi Pohjolainen 

> 
> Signed-off-by: Kenneth Graunke 
> ---
>  src/mesa/drivers/dri/i965/brw_lower_texture_gradients.cpp | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/src/mesa/drivers/dri/i965/brw_lower_texture_gradients.cpp 
> b/src/mesa/drivers/dri/i965/brw_lower_texture_gradients.cpp
> index d571ecd..c83b272 100644
> --- a/src/mesa/drivers/dri/i965/brw_lower_texture_gradients.cpp
> +++ b/src/mesa/drivers/dri/i965/brw_lower_texture_gradients.cpp
> @@ -279,7 +279,7 @@ lower_texture_grad_visitor::visit_leave(ir_texture *ir)
>  
>/* 2. quotient rule */
>ir_variable *recip = temp(mem_ctx, glsl_type::float_type, "recip");
> -  EMIT(assign(recip, div(new(mem_ctx) ir_constant(1.0f), swizzle_z(Q;
> +  EMIT(assign(recip, expr(ir_unop_rcp, swizzle_z(Q;
>  
>ir_variable *dx = temp(mem_ctx, glsl_type::vec2_type, "dx");
>ir_variable *dy = temp(mem_ctx, glsl_type::vec2_type, "dy");
> -- 
> 2.6.4
> 
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Re: [Mesa-dev] [PATCH shader-db 4/4] run.py: Add tessellation shader support.

2016-01-05 Thread Matt Turner

On Tue, Jan 5, 2016 at 6:04 AM, Kenneth Graunke  wrote:
> ---
>  run.py | 6 +++---
>  1 file changed, 3 insertions(+), 3 deletions(-)
>
> in case you want to use the old runner to produce .out files.


Thanks :)

All four look good to me.

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Re: [Mesa-dev] [PATCH] gallium/dri2: Avoid uneeded stride to pitch conversion

2016-01-05 Thread Nicolas Dufresne

Le mardi 05 janvier 2016 à 17:19 +0100, Axel Davy a écrit :
> Hi Nicolas,
> 
> I believe this patch doesn't fully solve the problem and could
> introduce some bugs.
> 
> For example you change dri2_create_image_from_name pitch argument to
> stride,
> whereas this function is used as is to implement createImageFromName
> from __DRIimageExtensionRec,
> which takes a pitch. That said for this very function I'm not sure it
> is used correctly by the other parts of mesa,
> for example in dri2_create_image_mesa_drm_buffer it seems to pass a
> stride ...

That was not intentional, I didn't expect to change anything in the
interface. I'll fix this and resubmit.

> 
> It is a good idea to clean the pitch/stride confusions that can occur
> in the code, but you should fix
> all occurences, not just some subset. I mean you'll have to change
> __DRIimageExtensionRec spec,
> adapt all users and implementers.
> 
> I guess piglit can be used to check for regressions

I'll look into this. There is no obvious confusing
in __DRIimageExtensionRec, so nothing to fix for now. There might be
confusing elsewhere in dri2.c (just grep for pitch = stride), though
I'm trying to focus on fixing importation of RGB565 dmabuf first, as
it's made very visible within GStreamer now, but was concerned not to
add extra conversion here.

thanks,
Nicolas

> 
> Yours,
> 
> Axel
> 
> On 05/01/2016 16:58, Nicolas Dufresne wrote:
> > Le me know if this patch needs an update.
> > 
> > cheers,
> > Nicolas
> > 
> > Le jeudi 24 décembre 2015 à 15:15 -0500, Nicolas Dufresne a écrit :
> > > In order to convert from stride to pitch, few functions were
> > > diving
> > > by 4
> > > the stride. This is not valid for RGB565 and this conversion was
> > > not
> > > needed anyway in this context.
> > > 
> > > Signed-off-by: Nicolas Dufresne 
> > > ---
> > >  src/gallium/state_trackers/dri/dri2.c | 33 -
> > > 
> > > 
> > >  1 file changed, 12 insertions(+), 21 deletions(-)
> > > 
> > > diff --git a/src/gallium/state_trackers/dri/dri2.c
> > > b/src/gallium/state_trackers/dri/dri2.c
> > > index a11a6cb..9f07a45 100644
> > > --- a/src/gallium/state_trackers/dri/dri2.c
> > > +++ b/src/gallium/state_trackers/dri/dri2.c
> > > @@ -708,7 +708,7 @@ dri2_lookup_egl_image(struct dri_screen
> > > *screen,
> > > void *handle)
> > >  static __DRIimage *
> > >  dri2_create_image_from_winsys(__DRIscreen *_screen,
> > >    int width, int height, int format,
> > > -  struct winsys_handle *whandle, int
> > > pitch,
> > > +  struct winsys_handle *whandle, int
> > > stride,
> > >    void *loaderPrivate)
> > >  {
> > > struct dri_screen *screen = dri_screen(_screen);
> > > @@ -753,7 +753,7 @@ dri2_create_image_from_winsys(__DRIscreen
> > > *_screen,
> > > templ.depth0 = 1;
> > > templ.array_size = 1;
> > >  
> > > -   whandle->stride = pitch * util_format_get_blocksize(pf);
> > > +   whandle->stride = stride;
> > >  
> > > img->texture = screen->base.screen-
> > > >resource_from_handle(screen-
> > > > base.screen,
> > >   , whandle);
> > > @@ -773,7 +773,7 @@ dri2_create_image_from_winsys(__DRIscreen
> > > *_screen,
> > >  static __DRIimage *
> > >  dri2_create_image_from_name(__DRIscreen *_screen,
> > >  int width, int height, int format,
> > > -int name, int pitch, void
> > > *loaderPrivate)
> > > +int name, int stride, void
> > > *loaderPrivate)
> > >  {
> > > struct winsys_handle whandle;
> > >  
> > > @@ -782,13 +782,13 @@ dri2_create_image_from_name(__DRIscreen
> > > *_screen,
> > > whandle.handle = name;
> > >  
> > > return dri2_create_image_from_winsys(_screen, width, height,
> > > format,
> > > -, pitch,
> > > loaderPrivate);
> > > +, stride,
> > > loaderPrivate);
> > >  }
> > >  
> > >  static __DRIimage *
> > >  dri2_create_image_from_fd(__DRIscreen *_screen,
> > >    int width, int height, int format,
> > > -  int fd, int pitch, void
> > > *loaderPrivate)
> > > +  int fd, int stride, void
> > > *loaderPrivate)
> > >  {
> > > struct winsys_handle whandle;
> > >  
> > > @@ -800,7 +800,7 @@ dri2_create_image_from_fd(__DRIscreen
> > > *_screen,
> > > whandle.handle = (unsigned)fd;
> > >  
> > > return dri2_create_image_from_winsys(_screen, width, height,
> > > format,
> > > -, pitch,
> > > loaderPrivate);
> > > +, stride,
> > > loaderPrivate);
> > >  }
> > >  
> > >  static __DRIimage *
> > > @@ -986,7 +986,7 @@ dri2_from_names(__DRIscreen *screen, int
> > > width,
> > > int height, int format,
> > >  void *loaderPrivate)
> > >

Re: [Mesa-dev] [PATCH] gallium/dri2: Avoid uneeded stride to pitch conversion

2016-01-05 Thread Axel Davy


Hi Nicolas,

I believe this patch doesn't fully solve the problem and could introduce 
some bugs.


For example you change dri2_create_image_from_name pitch argument to stride,
whereas this function is used as is to implement createImageFromName 
from __DRIimageExtensionRec,
which takes a pitch. That said for this very function I'm not sure it is 
used correctly by the other parts of mesa,
for example in dri2_create_image_mesa_drm_buffer it seems to pass a 
stride ...


It is a good idea to clean the pitch/stride confusions that can occur in 
the code, but you should fix
all occurences, not just some subset. I mean you'll have to change 
__DRIimageExtensionRec spec,

adapt all users and implementers.

I guess piglit can be used to check for regressions

Yours,

Axel

On 05/01/2016 16:58, Nicolas Dufresne wrote:

Le me know if this patch needs an update.

cheers,
Nicolas

Le jeudi 24 décembre 2015 à 15:15 -0500, Nicolas Dufresne a écrit :

In order to convert from stride to pitch, few functions were diving
by 4
the stride. This is not valid for RGB565 and this conversion was not
needed anyway in this context.

Signed-off-by: Nicolas Dufresne 
---
  src/gallium/state_trackers/dri/dri2.c | 33 -

  1 file changed, 12 insertions(+), 21 deletions(-)

diff --git a/src/gallium/state_trackers/dri/dri2.c
b/src/gallium/state_trackers/dri/dri2.c
index a11a6cb..9f07a45 100644
--- a/src/gallium/state_trackers/dri/dri2.c
+++ b/src/gallium/state_trackers/dri/dri2.c
@@ -708,7 +708,7 @@ dri2_lookup_egl_image(struct dri_screen *screen,
void *handle)
  static __DRIimage *
  dri2_create_image_from_winsys(__DRIscreen *_screen,
int width, int height, int format,
-  struct winsys_handle *whandle, int
pitch,
+  struct winsys_handle *whandle, int
stride,
void *loaderPrivate)
  {
 struct dri_screen *screen = dri_screen(_screen);
@@ -753,7 +753,7 @@ dri2_create_image_from_winsys(__DRIscreen
*_screen,
 templ.depth0 = 1;
 templ.array_size = 1;
  
-   whandle->stride = pitch * util_format_get_blocksize(pf);

+   whandle->stride = stride;
  
 img->texture = screen->base.screen->resource_from_handle(screen-

base.screen,

   , whandle);
@@ -773,7 +773,7 @@ dri2_create_image_from_winsys(__DRIscreen
*_screen,
  static __DRIimage *
  dri2_create_image_from_name(__DRIscreen *_screen,
  int width, int height, int format,
-int name, int pitch, void
*loaderPrivate)
+int name, int stride, void
*loaderPrivate)
  {
 struct winsys_handle whandle;
  
@@ -782,13 +782,13 @@ dri2_create_image_from_name(__DRIscreen

*_screen,
 whandle.handle = name;
  
 return dri2_create_image_from_winsys(_screen, width, height,

format,
-, pitch,
loaderPrivate);
+, stride,
loaderPrivate);
  }
  
  static __DRIimage *

  dri2_create_image_from_fd(__DRIscreen *_screen,
int width, int height, int format,
-  int fd, int pitch, void *loaderPrivate)
+  int fd, int stride, void *loaderPrivate)
  {
 struct winsys_handle whandle;
  
@@ -800,7 +800,7 @@ dri2_create_image_from_fd(__DRIscreen *_screen,

 whandle.handle = (unsigned)fd;
  
 return dri2_create_image_from_winsys(_screen, width, height,

format,
-, pitch,
loaderPrivate);
+, stride,
loaderPrivate);
  }
  
  static __DRIimage *

@@ -986,7 +986,7 @@ dri2_from_names(__DRIscreen *screen, int width,
int height, int format,
  void *loaderPrivate)
  {
 __DRIimage *img;
-   int stride, dri_components;
+   int dri_components;
  
 if (num_names != 1)

return NULL;
@@ -997,11 +997,8 @@ dri2_from_names(__DRIscreen *screen, int width,
int height, int format,
 if (format == -1)
return NULL;
  
-   /* Strides are in bytes not pixels. */

-   stride = strides[0] /4;
-
 img = dri2_create_image_from_name(screen, width, height, format,
- names[0], stride,
loaderPrivate);
+ names[0], strides[0],
loaderPrivate);
 if (img == NULL)
return NULL;
  
@@ -1101,7 +1098,7 @@ dri2_from_fds(__DRIscreen *screen, int width,

int height, int fourcc,
void *loaderPrivate)
  {
 __DRIimage *img;
-   int format, stride, dri_components;
+   int format, dri_components;
  
 if (num_fds != 1)

return NULL;
@@ -1112,11 +1109,8 @@ dri2_from_fds(__DRIscreen *screen, int width,
int height, int fourcc,
 if (format == -1)
return NULL;
  
-   /* Strides are in bytes not pixels. */

-   stride = strides[0] /4;
-
 img =

Re: [Mesa-dev] [PATCH 2/2] glsl: Relax ir_quadop_bitfield_insert type restrictions.

2016-01-05 Thread Matt Turner

Both look good to me. Thanks!

Reviewed-by: Matt Turner 
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Re: [Mesa-dev] [PATCH 2/2] glsl: Relax ir_quadop_bitfield_insert type restrictions.

2016-01-05 Thread Ilia Mirkin

On Tue, Jan 5, 2016 at 8:34 AM, Kenneth Graunke  wrote:
> While GLSL restricts bitfieldInsert's offset and bits parameters to
> be scalars, we shouldn't require this in the IR.
>
> In particular, opt_vectorize() tries to combine
>
> result.x = bitfieldInsert(src0.x, src1.x, src2.x, src3.x);
> result.y = bitfieldInsert(src0.y, src1.y, src2.y, src3.y);
> result.z = bitfieldInsert(src0.z, src1.z, src2.z, src3.z);
> result.w = bitfieldInsert(src0.w, src1.w, src2.w, src3.w);
>
> into a single ivec4 bitfieldInsert operation.  This currently breaks,
> because the last two types become ivec4 rather than int.  It seems
> perfectly reasonable to allow this.

Might I recommend also giving this treatment to
ir_triop_bitfield_extract? It seems like it would suffer from the same
failure with opt_vectorize.

>
> i965 lowers ir_quadop_bitfield_insert to ir_binop_bfm and ir_triop_bfi,
> which already lift these restrictions.
>
> (I debated about using is_integer() or base_type == GLSL_TYPE_INT here;
> I ended up relaxing it to allow either int/uint because ir_binop_bfm
> and ir_triop_bfi do that already.)
>
> Fixes assertion failures when compiling Shadow of Mordor vertex shaders
> on i965 in vec4 mode (where OptimizeForAOS enables opt_vectorize()).
>
> Signed-off-by: Kenneth Graunke 
> Cc: Matt Turner 
> Cc: mesa-sta...@lists.freedesktop.org
> ---
>  src/glsl/ir_validate.cpp | 4 ++--
>  1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/src/glsl/ir_validate.cpp b/src/glsl/ir_validate.cpp
> index dcc079c..b5eaaff 100644
> --- a/src/glsl/ir_validate.cpp
> +++ b/src/glsl/ir_validate.cpp
> @@ -661,8 +661,8 @@ ir_validate::visit_leave(ir_expression *ir)
> case ir_quadop_bitfield_insert:
>assert(ir->operands[0]->type == ir->type);
>assert(ir->operands[1]->type == ir->type);
> -  assert(ir->operands[2]->type == glsl_type::int_type);
> -  assert(ir->operands[3]->type == glsl_type::int_type);
> +  assert(ir->operands[2]->type->is_integer());
> +  assert(ir->operands[3]->type->is_integer());
>break;
>
> case ir_quadop_vector:
> --
> 2.6.4
>
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Re: [Mesa-dev] [PATCH] i965: Use rcp in brw_lower_texture_gradients rather than 1.0 / x.

2016-01-05 Thread Matt Turner

Reviewed-by: Matt Turner 
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Re: [Mesa-dev] [PATCH] glsl: add image_format check in cross_validate_globals()

2016-01-05 Thread Lofstedt, Marta

Thanks Samuel,

I confirm that your patch fixes the testcase for both BDW and SKL.

/Marta

From: Samuel Iglesias Gonsálvez [sigles...@igalia.com]
Sent: Tuesday, January 05, 2016 2:32 PM
To: mesa-dev@lists.freedesktop.org
Cc: Lofstedt, Marta; Samuel Iglesias Gonsálvez
Subject: [PATCH] glsl: add image_format check in cross_validate_globals()

Fixes CTS test:

ES31-CTS.shader_image_load_store.negative-linkErrors

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=93410

Signed-off-by: Samuel Iglesias Gonsálvez 
---
 src/glsl/linker.cpp | 6 ++
 1 file changed, 6 insertions(+)

diff --git a/src/glsl/linker.cpp b/src/glsl/linker.cpp
index a6e81b4..cf4d68d 100644
--- a/src/glsl/linker.cpp
+++ b/src/glsl/linker.cpp
@@ -1133,6 +1133,12 @@ cross_validate_globals(struct gl_shader_program *prog,
 mode_string(var), var->name);
return;
 }
+if (existing->data.image_format != var->data.image_format) {
+   linker_error(prog, "declarations for %s `%s` have "
+"mismatching image format qualifiers\n",
+mode_string(var), var->name);
+   return;
+}
 } else
variables.add_variable(var);
   }
--
2.5.0

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[Mesa-dev] [Bug 27512] Illegal instruction _mesa_x86_64_transform_points4_general

2016-01-05 Thread bugzilla-daemon

https://bugs.freedesktop.org/show_bug.cgi?id=27512

--- Comment #7 from Roland Scheidegger  ---
(In reply to Michael Harder from comment #6)
> I am experiencing a crash with a SIGILL, Illegal instruction in Debian when
> using Kodi.
> 
> [Thread debugging using libthread_db enabled]
> Using host libthread_db library "/lib/x86_64-linux-gnu/libthread_db.so.1".
> Core was generated by `/usr/lib/x86_64-linux-gnu/kodi/kodi.bin --standalone'.
> Program terminated with signal SIGILL, Illegal instruction.
> #0  _mesa_x86_64_transform_points4_general () at x86-64/xform4.S:72
> 72  prefetch 16(%rdx)
> [Current thread is 1 (Thread 0x7f9054aeb9c0 (LWP 791))]
> 

Oh what cpu? As far as I can tell, intel cpus never supported "prefetch" (new
ones support prefetchw which is the same opcode with different modr/m), only
prefetcht0/t1/t2/nta so I wonder how this is supposed to work.

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Re: [Mesa-dev] [PATCH] gallium/dri2: Avoid uneeded stride to pitch conversion

2016-01-05 Thread Nicolas Dufresne

Le me know if this patch needs an update.

cheers,
Nicolas

Le jeudi 24 décembre 2015 à 15:15 -0500, Nicolas Dufresne a écrit :
> In order to convert from stride to pitch, few functions were diving
> by 4
> the stride. This is not valid for RGB565 and this conversion was not
> needed anyway in this context.
> 
> Signed-off-by: Nicolas Dufresne 
> ---
>  src/gallium/state_trackers/dri/dri2.c | 33 -
> 
>  1 file changed, 12 insertions(+), 21 deletions(-)
> 
> diff --git a/src/gallium/state_trackers/dri/dri2.c
> b/src/gallium/state_trackers/dri/dri2.c
> index a11a6cb..9f07a45 100644
> --- a/src/gallium/state_trackers/dri/dri2.c
> +++ b/src/gallium/state_trackers/dri/dri2.c
> @@ -708,7 +708,7 @@ dri2_lookup_egl_image(struct dri_screen *screen,
> void *handle)
>  static __DRIimage *
>  dri2_create_image_from_winsys(__DRIscreen *_screen,
>    int width, int height, int format,
> -  struct winsys_handle *whandle, int
> pitch,
> +  struct winsys_handle *whandle, int
> stride,
>    void *loaderPrivate)
>  {
> struct dri_screen *screen = dri_screen(_screen);
> @@ -753,7 +753,7 @@ dri2_create_image_from_winsys(__DRIscreen
> *_screen,
> templ.depth0 = 1;
> templ.array_size = 1;
>  
> -   whandle->stride = pitch * util_format_get_blocksize(pf);
> +   whandle->stride = stride;
>  
> img->texture = screen->base.screen->resource_from_handle(screen-
> >base.screen,
>   , whandle);
> @@ -773,7 +773,7 @@ dri2_create_image_from_winsys(__DRIscreen
> *_screen,
>  static __DRIimage *
>  dri2_create_image_from_name(__DRIscreen *_screen,
>  int width, int height, int format,
> -int name, int pitch, void
> *loaderPrivate)
> +int name, int stride, void
> *loaderPrivate)
>  {
> struct winsys_handle whandle;
>  
> @@ -782,13 +782,13 @@ dri2_create_image_from_name(__DRIscreen
> *_screen,
> whandle.handle = name;
>  
> return dri2_create_image_from_winsys(_screen, width, height,
> format,
> -, pitch,
> loaderPrivate);
> +, stride,
> loaderPrivate);
>  }
>  
>  static __DRIimage *
>  dri2_create_image_from_fd(__DRIscreen *_screen,
>    int width, int height, int format,
> -  int fd, int pitch, void *loaderPrivate)
> +  int fd, int stride, void *loaderPrivate)
>  {
> struct winsys_handle whandle;
>  
> @@ -800,7 +800,7 @@ dri2_create_image_from_fd(__DRIscreen *_screen,
> whandle.handle = (unsigned)fd;
>  
> return dri2_create_image_from_winsys(_screen, width, height,
> format,
> -, pitch,
> loaderPrivate);
> +, stride,
> loaderPrivate);
>  }
>  
>  static __DRIimage *
> @@ -986,7 +986,7 @@ dri2_from_names(__DRIscreen *screen, int width,
> int height, int format,
>  void *loaderPrivate)
>  {
> __DRIimage *img;
> -   int stride, dri_components;
> +   int dri_components;
>  
> if (num_names != 1)
>    return NULL;
> @@ -997,11 +997,8 @@ dri2_from_names(__DRIscreen *screen, int width,
> int height, int format,
> if (format == -1)
>    return NULL;
>  
> -   /* Strides are in bytes not pixels. */
> -   stride = strides[0] /4;
> -
> img = dri2_create_image_from_name(screen, width, height, format,
> - names[0], stride,
> loaderPrivate);
> + names[0], strides[0],
> loaderPrivate);
> if (img == NULL)
>    return NULL;
>  
> @@ -1101,7 +1098,7 @@ dri2_from_fds(__DRIscreen *screen, int width,
> int height, int fourcc,
>    void *loaderPrivate)
>  {
> __DRIimage *img;
> -   int format, stride, dri_components;
> +   int format, dri_components;
>  
> if (num_fds != 1)
>    return NULL;
> @@ -1112,11 +1109,8 @@ dri2_from_fds(__DRIscreen *screen, int width,
> int height, int fourcc,
> if (format == -1)
>    return NULL;
>  
> -   /* Strides are in bytes not pixels. */
> -   stride = strides[0] /4;
> -
> img = dri2_create_image_from_fd(screen, width, height, format,
> -   fds[0], stride, loaderPrivate);
> +   fds[0], strides[0],
> loaderPrivate);
> if (img == NULL)
>    return NULL;
>  
> @@ -1137,7 +1131,7 @@ dri2_from_dma_bufs(__DRIscreen *screen,
> void *loaderPrivate)
>  {
> __DRIimage *img;
> -   int format, stride, dri_components;
> +   int format, dri_components;
>  
> if (num_fds != 1 || offsets[0] != 0) {
>    *error = __DRI_IMAGE_ERROR_BAD_MATCH;
> @@ -1150,11 +1144,8 @@ dri2_from_dma_bufs(__DRIscreen *screen,
>    return NULL;
> }
>  
> -   /* Strides

Re: [Mesa-dev] [PATCH shader-db] si-report: Track max waves per CU

2016-01-05 Thread Matt Arsenault

> On Jan 5, 2016, at 07:28, Marek Olšák  wrote:
> 
> Hi,
> 
> I'd like us to do this computation in Mesa, because it can be more
> accurate there. The pixel shader wave count depends heavily on LDS,
> because each interpolated input occupies 12 dwords of LDS per
> primitive and there can be 1-16 primitives per wave. With 32 inputs
> and 16 primitives, you can get 6144 dwords of LDS per wave and this is
> without the extra LDS storage needed by derivatives. In a nutshell,
> you need to know the number of interpolated inputs, then you can
> compute the best case (1 primitive) scenario and the worst case (16
> primitives).
> 
> Marek
> 

Are these dynamically known counts? I think having a statically known max waves 
would be useful (and noting that it is maximum static known) in addition to the 
dynamic from the runtime number of inputs.
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Re: [Mesa-dev] [PATCH shader-db] si-report: Track max waves per CU

2016-01-05 Thread Marek Olšák

On Tue, Jan 5, 2016 at 4:04 PM, Matt Arsenault  wrote:
>
>> On Jan 5, 2016, at 07:28, Marek Olšák  wrote:
>>
>> Hi,
>>
>> I'd like us to do this computation in Mesa, because it can be more
>> accurate there. The pixel shader wave count depends heavily on LDS,
>> because each interpolated input occupies 12 dwords of LDS per
>> primitive and there can be 1-16 primitives per wave. With 32 inputs
>> and 16 primitives, you can get 6144 dwords of LDS per wave and this is
>> without the extra LDS storage needed by derivatives. In a nutshell,
>> you need to know the number of interpolated inputs, then you can
>> compute the best case (1 primitive) scenario and the worst case (16
>> primitives).
>>
>> Marek
>>
>
> Are these dynamically known counts? I think having a statically known max 
> waves would be useful (and noting that it is maximum static known) in 
> addition to the dynamic from the runtime number of inputs.

The number of primitives is the only dynamically changing variable
that even Mesa doesn't know. It depends on geometry density and other
factors. We know it can be between 1 and 16 per wave and it varies
between waves too.

Marek
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Re: [Mesa-dev] [PATCH] i965: Only turn on ARB_compute_shader if we can write registers.

2016-01-05 Thread Francisco Jerez

Kenneth Graunke  writes:

> Compute shaders require reconfiguring the L3 for shared local memory
> support.  We have to be able to write the L3 registers to do that.
>
> This effectively turns off compute shaders prior to Kernel 4.2.
>
> (Previously, the extension enable was in an API_OPENGL_CORE conditional.
> However, that isn't necessary - core Mesa extension handling already
> restricts it properly.  I've moved it out in this patch.)
>
> Signed-off-by: Kenneth Graunke 

LGTM,

Reviewed-by: Francisco Jerez 

> ---
>  src/mesa/drivers/dri/i965/intel_extensions.c | 5 +++--
>  1 file changed, 3 insertions(+), 2 deletions(-)
>
> Tested with Kernel 3.18 (no longer enabled) and 4.3 (still enabled)
> on a Haswell laptop.
>
> diff --git a/src/mesa/drivers/dri/i965/intel_extensions.c 
> b/src/mesa/drivers/dri/i965/intel_extensions.c
> index e1338e9..889f7cb 100644
> --- a/src/mesa/drivers/dri/i965/intel_extensions.c
> +++ b/src/mesa/drivers/dri/i965/intel_extensions.c
> @@ -346,6 +346,9 @@ intelInitExtensions(struct gl_context *ctx)
>   ctx->Extensions.ARB_transform_feedback3 = true;
>   ctx->Extensions.ARB_transform_feedback_instanced = true;
>  
> + if (ctx->Const.MaxComputeWorkGroupSize[0] >= 1024)
> +ctx->Extensions.ARB_compute_shader = true;
> +
>   if (brw->intelScreen->cmd_parser_version >= 2)
>  brw->predicate.supported = true;
>}
> @@ -357,8 +360,6 @@ intelInitExtensions(struct gl_context *ctx)
>   ctx->Extensions.ARB_viewport_array = true;
>   ctx->Extensions.AMD_vertex_shader_viewport_index = true;
>   ctx->Extensions.ARB_shader_subroutine = true;
> - if (ctx->Const.MaxComputeWorkGroupSize[0] >= 1024)
> -ctx->Extensions.ARB_compute_shader = true;
>}
> }
>  
> -- 
> 2.2.2
>
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[Mesa-dev] [Bug 27512] Illegal instruction _mesa_x86_64_transform_points4_general

2016-01-05 Thread bugzilla-daemon

https://bugs.freedesktop.org/show_bug.cgi?id=27512

--- Comment #8 from Michael Harder  ---
>From 'cat /proc/cpuinfo'
model name  : Intel(R) Pentium(R) 4 CPU 3.00GHz

and from 'lspci'
VGA compatible controller: Intel Corporation 82915G/GV/910GL Integrated
Graphics Controller (rev 04)

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Re: [Mesa-dev] [PATCH 8/8] mesa: minor clean-up of some memcpy/sizeof() calls in m_matrix.c

2016-01-05 Thread Charmaine Lee

This series looks fine to me.

Reviewed-by: Charmaine Lee 

From: Brian Paul 
Sent: Monday, January 4, 2016 4:49 PM
To: mesa-dev@lists.freedesktop.org
Cc: Charmaine Lee
Subject: [PATCH 8/8] mesa: minor clean-up of some memcpy/sizeof() calls in 
m_matrix.c

---
 src/mesa/math/m_matrix.c | 14 +++---
 1 file changed, 7 insertions(+), 7 deletions(-)

diff --git a/src/mesa/math/m_matrix.c b/src/mesa/math/m_matrix.c
index 6522200..b3cfcd2 100644
--- a/src/mesa/math/m_matrix.c
+++ b/src/mesa/math/m_matrix.c
@@ -654,7 +654,7 @@ static GLboolean invert_matrix_3d_no_rot( GLmatrix *mat )
if (MAT(in,0,0) == 0 || MAT(in,1,1) == 0 || MAT(in,2,2) == 0 )
   return GL_FALSE;

-   memcpy( out, Identity, 16 * sizeof(GLfloat) );
+   memcpy( out, Identity, sizeof(Identity) );
MAT(out,0,0) = 1.0F / MAT(in,0,0);
MAT(out,1,1) = 1.0F / MAT(in,1,1);
MAT(out,2,2) = 1.0F / MAT(in,2,2);
@@ -687,7 +687,7 @@ static GLboolean invert_matrix_2d_no_rot( GLmatrix *mat )
if (MAT(in,0,0) == 0 || MAT(in,1,1) == 0)
   return GL_FALSE;

-   memcpy( out, Identity, 16 * sizeof(GLfloat) );
+   memcpy( out, Identity, sizeof(Identity) );
MAT(out,0,0) = 1.0F / MAT(in,0,0);
MAT(out,1,1) = 1.0F / MAT(in,1,1);

@@ -709,7 +709,7 @@ static GLboolean invert_matrix_perspective( GLmatrix *mat )
if (MAT(in,2,3) == 0)
   return GL_FALSE;

-   memcpy( out, Identity, 16 * sizeof(GLfloat) );
+   memcpy( out, Identity, sizeof(Identity) );

MAT(out,0,0) = 1.0F / MAT(in,0,0);
MAT(out,1,1) = 1.0F / MAT(in,1,1);
@@ -802,7 +802,7 @@ _math_matrix_rotate( GLmatrix *mat,
s = sinf( angle * M_PI / 180.0 );
c = cosf( angle * M_PI / 180.0 );

-   memcpy(m, Identity, sizeof(GLfloat)*16);
+   memcpy(m, Identity, sizeof(Identity));
optimized = GL_FALSE;

 #define M(row,col)  m[col*4+row]
@@ -1136,8 +1136,8 @@ _math_matrix_viewport(GLmatrix *m, const float scale[3],
 void
 _math_matrix_set_identity( GLmatrix *mat )
 {
-   memcpy( mat->m, Identity, 16*sizeof(GLfloat) );
-   memcpy( mat->inv, Identity, 16*sizeof(GLfloat) );
+   memcpy( mat->m, Identity, sizeof(Identity) );
+   memcpy( mat->inv, Identity, sizeof(Identity) );

mat->type = MATRIX_IDENTITY;
mat->flags &= ~(MAT_DIRTY_FLAGS|
@@ -1437,7 +1437,7 @@ _math_matrix_is_dirty( const GLmatrix *m )
 void
 _math_matrix_copy( GLmatrix *to, const GLmatrix *from )
 {
-   memcpy( to->m, from->m, sizeof(Identity) );
+   memcpy(to->m, from->m, 16 * sizeof(GLfloat));
memcpy(to->inv, from->inv, 16 * sizeof(GLfloat));
to->flags = from->flags;
to->type = from->type;
--
1.9.1

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Re: [Mesa-dev] [Bug 27512] Illegal instruction _mesa_x86_64_transform_points4_general

2016-01-05 Thread Patrick Baggett

Given that there is a _mesa_3dnow_transform_points4_2d in the x86-64 asm
(using MMX/3DNow! is deprecated in x86-64), it appears that this code was
copy-pasted. I wrote a quick patch to change prefetch[w] to prefetcht1,
which is more or less the equivalent in SSE. However, I'm not actually sure
those prefetches really benefit the code since they appear to be monotonic
addresses and hinting only 16 bytes ahead (a cache line is almost always at
least 32 bytes) -- maybe that sort of testing is for another day.
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[Mesa-dev] [PATCH 2/2] glsl: Relax ir_quadop_bitfield_insert type restrictions.

2016-01-05 Thread Kenneth Graunke

While GLSL restricts bitfieldInsert's offset and bits parameters to
be scalars, we shouldn't require this in the IR.

In particular, opt_vectorize() tries to combine

result.x = bitfieldInsert(src0.x, src1.x, src2.x, src3.x);
result.y = bitfieldInsert(src0.y, src1.y, src2.y, src3.y);
result.z = bitfieldInsert(src0.z, src1.z, src2.z, src3.z);
result.w = bitfieldInsert(src0.w, src1.w, src2.w, src3.w);

into a single ivec4 bitfieldInsert operation.  This currently breaks,
because the last two types become ivec4 rather than int.  It seems
perfectly reasonable to allow this.

i965 lowers ir_quadop_bitfield_insert to ir_binop_bfm and ir_triop_bfi,
which already lift these restrictions.

(I debated about using is_integer() or base_type == GLSL_TYPE_INT here;
I ended up relaxing it to allow either int/uint because ir_binop_bfm
and ir_triop_bfi do that already.)

Fixes assertion failures when compiling Shadow of Mordor vertex shaders
on i965 in vec4 mode (where OptimizeForAOS enables opt_vectorize()).

Signed-off-by: Kenneth Graunke 
Cc: Matt Turner 
Cc: mesa-sta...@lists.freedesktop.org
---
 src/glsl/ir_validate.cpp | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/src/glsl/ir_validate.cpp b/src/glsl/ir_validate.cpp
index dcc079c..b5eaaff 100644
--- a/src/glsl/ir_validate.cpp
+++ b/src/glsl/ir_validate.cpp
@@ -661,8 +661,8 @@ ir_validate::visit_leave(ir_expression *ir)
case ir_quadop_bitfield_insert:
   assert(ir->operands[0]->type == ir->type);
   assert(ir->operands[1]->type == ir->type);
-  assert(ir->operands[2]->type == glsl_type::int_type);
-  assert(ir->operands[3]->type == glsl_type::int_type);
+  assert(ir->operands[2]->type->is_integer());
+  assert(ir->operands[3]->type->is_integer());
   break;
 
case ir_quadop_vector:
-- 
2.6.4

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[Mesa-dev] [PATCH 1/2] glsl: Disallow vectorization of vector_insert/extract.

2016-01-05 Thread Kenneth Graunke

vector_insert takes a vector, a scalar location, and a scalar value,
and produces a new vector with that component updated.  As such, it
can't be vectorized properly.

vector_extract takes a vector and a scalar location, and returns
that scalar component of the vector.  Vectorization doesn't really
make any sense.

Treating both as horizontal operations makes sure the vectorizer
won't try to touch these.

Found by inspection.

Signed-off-by: Kenneth Graunke 
Cc: Matt Turner 
---
 src/glsl/ir.h | 2 ++
 1 file changed, 2 insertions(+)

I think this is necessary?  I haven't actually encountered any bugs
because of this - I was just in the area.  Should we Cc stable?

diff --git a/src/glsl/ir.h b/src/glsl/ir.h
index c56c959..a728c03 100644
--- a/src/glsl/ir.h
+++ b/src/glsl/ir.h
@@ -1724,6 +1724,8 @@ public:
   return operation == ir_binop_all_equal ||
  operation == ir_binop_any_nequal ||
  operation == ir_binop_dot ||
+ operation == ir_binop_vector_extract ||
+ operation == ir_triop_vector_insert ||
  operation == ir_quadop_vector;
}
 
-- 
2.6.4

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[Mesa-dev] [Bug 27512] Illegal instruction _mesa_x86_64_transform_points4_general

2016-01-05 Thread bugzilla-daemon

https://bugs.freedesktop.org/show_bug.cgi?id=27512

--- Comment #9 from Roland Scheidegger  ---
(In reply to Michael Harder from comment #8)
> From 'cat /proc/cpuinfo'
> model name  : Intel(R) Pentium(R) 4 CPU 3.00GHz


Using any special build flags? As said I can't see how this code could work
with intel cpus. There's other functions which should work (like
_mesa_sse_transform_points4_general) albeit these might be working in 32bit
builds only. Not my area of expertise...
At a quick glance USE_X86_64_ASM actually might be defined by default, but this
particular cpu instruction just doesn't look like it could run on intel cpus.
Unless some cpus tolerate that instruction even if the manuals don't say so
(would not be all that surprising even, seems the OP also had a P4, so maybe
all later cpus support prefetch/prefetchw for some reason regardless...). If so
the code should be fixed up (replacing prefetch/prefetchw with one of
prefetcht0/t1/t2/nta, these should run on all x86_64 capable cpus). I don't
really know that code, though...

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[Mesa-dev] [Bug 93577] Total war: Attila crashes at startup

2016-01-05 Thread bugzilla-daemon

https://bugs.freedesktop.org/show_bug.cgi?id=93577

Michel Dänzer  changed:

   What|Removed |Added

  Component|Drivers/Gallium/r600|Mesa core
   Assignee|dri-devel@lists.freedesktop |mesa-dev@lists.freedesktop.
   |.org|org
 QA Contact|dri-devel@lists.freedesktop |mesa-dev@lists.freedesktop.
   |.org|org

--- Comment #1 from Michel Dänzer  ---
Reassigning to Mesa core since it happens with the i965 driver as well, but it
looks like it might be a game bug.

BTW, an apitrace is only useful if replaying it reproduces the problem.

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[Mesa-dev] [PATCH 1/5] mesa/bufferobj: make _mesa_delete_buffer_object externally accessible

2016-01-05 Thread Nicolai Hähnle

From: Nicolai Hähnle 

gl_buffer_object has grown more complicated and requires cleanup. Using this
function from drivers will be more future-proof.
---
 src/mesa/main/bufferobj.c | 2 +-
 src/mesa/main/bufferobj.h | 4 
 2 files changed, 5 insertions(+), 1 deletion(-)

diff --git a/src/mesa/main/bufferobj.c b/src/mesa/main/bufferobj.c
index 8a9f9b6..4a098ac 100644
--- a/src/mesa/main/bufferobj.c
+++ b/src/mesa/main/bufferobj.c
@@ -447,7 +447,7 @@ _mesa_new_buffer_object(struct gl_context *ctx, GLuint name)
  *
  * Default callback for the \c dd_function_table::DeleteBuffer() hook.
  */
-static void
+void
 _mesa_delete_buffer_object(struct gl_context *ctx,
struct gl_buffer_object *bufObj)
 {
diff --git a/src/mesa/main/bufferobj.h b/src/mesa/main/bufferobj.h
index 3eac96d..a5bfe88 100644
--- a/src/mesa/main/bufferobj.h
+++ b/src/mesa/main/bufferobj.h
@@ -109,6 +109,10 @@ _mesa_initialize_buffer_object(struct gl_context *ctx,
GLuint name);
 
 extern void
+_mesa_delete_buffer_object(struct gl_context *ctx,
+   struct gl_buffer_object *bufObj);
+
+extern void
 _mesa_reference_buffer_object_(struct gl_context *ctx,
struct gl_buffer_object **ptr,
struct gl_buffer_object *bufObj);
-- 
2.5.0

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[Mesa-dev] [PATCH 5/5] i965: use _mesa_delete_buffer_object

2016-01-05 Thread Nicolai Hähnle

From: Nicolai Hähnle 

This is more future-proof, plugs the memory leak of Label and properly
destroys the buffer mutex.
---
 src/mesa/drivers/dri/i965/intel_buffer_objects.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/mesa/drivers/dri/i965/intel_buffer_objects.c 
b/src/mesa/drivers/dri/i965/intel_buffer_objects.c
index b26c939..ce6b358 100644
--- a/src/mesa/drivers/dri/i965/intel_buffer_objects.c
+++ b/src/mesa/drivers/dri/i965/intel_buffer_objects.c
@@ -167,7 +167,7 @@ brw_delete_buffer(struct gl_context * ctx, struct 
gl_buffer_object *obj)
_mesa_buffer_unmap_all_mappings(ctx, obj);
 
drm_intel_bo_unreference(intel_obj->buffer);
-   free(intel_obj);
+   _mesa_delete_buffer_object(ctx, obj);
 }
 
 
-- 
2.5.0

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[Mesa-dev] [PATCH 4/5] i915: use _mesa_delete_buffer_object

2016-01-05 Thread Nicolai Hähnle

From: Nicolai Hähnle 

This is more future-proof, plugs the memory leak of Label and properly
destroys the buffer mutex.
---
 src/mesa/drivers/dri/i915/intel_buffer_objects.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/mesa/drivers/dri/i915/intel_buffer_objects.c 
b/src/mesa/drivers/dri/i915/intel_buffer_objects.c
index ef06743..e676096 100644
--- a/src/mesa/drivers/dri/i915/intel_buffer_objects.c
+++ b/src/mesa/drivers/dri/i915/intel_buffer_objects.c
@@ -99,7 +99,7 @@ intel_bufferobj_free(struct gl_context * ctx, struct 
gl_buffer_object *obj)
_mesa_align_free(intel_obj->sys_buffer);
 
drm_intel_bo_unreference(intel_obj->buffer);
-   free(intel_obj);
+   _mesa_delete_buffer_object(ctx, obj);
 }
 
 
-- 
2.5.0

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[Mesa-dev] [PATCH 2/5] st/mesa: use _mesa_delete_buffer_object

2016-01-05 Thread Nicolai Hähnle

From: Nicolai Hähnle 

This is more future-proof than the current code.
---
 src/mesa/state_tracker/st_cb_bufferobjects.c | 4 +---
 1 file changed, 1 insertion(+), 3 deletions(-)

diff --git a/src/mesa/state_tracker/st_cb_bufferobjects.c 
b/src/mesa/state_tracker/st_cb_bufferobjects.c
index 5d20b26..c75f476 100644
--- a/src/mesa/state_tracker/st_cb_bufferobjects.c
+++ b/src/mesa/state_tracker/st_cb_bufferobjects.c
@@ -83,9 +83,7 @@ st_bufferobj_free(struct gl_context *ctx, struct 
gl_buffer_object *obj)
if (st_obj->buffer)
   pipe_resource_reference(_obj->buffer, NULL);
 
-   mtx_destroy(_obj->Base.Mutex);
-   free(st_obj->Base.Label);
-   free(st_obj);
+   _mesa_delete_buffer_object(ctx, obj);
 }
 
 
-- 
2.5.0

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[Mesa-dev] [PATCH 3/5] radeon: use _mesa_delete_buffer_object

2016-01-05 Thread Nicolai Hähnle

From: Nicolai Hähnle 

This is more future-proof, plugs the memory leak of Label and properly
destroys the buffer mutex.
---
 src/mesa/drivers/dri/radeon/radeon_buffer_objects.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/mesa/drivers/dri/radeon/radeon_buffer_objects.c 
b/src/mesa/drivers/dri/radeon/radeon_buffer_objects.c
index d9d4f5f..2b76305 100644
--- a/src/mesa/drivers/dri/radeon/radeon_buffer_objects.c
+++ b/src/mesa/drivers/dri/radeon/radeon_buffer_objects.c
@@ -71,7 +71,7 @@ radeonDeleteBufferObject(struct gl_context * ctx,
 radeon_bo_unref(radeon_obj->bo);
 }
 
-free(radeon_obj);
+_mesa_delete_buffer_object(ctx, obj);
 }
 
 
-- 
2.5.0

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Re: [Mesa-dev] [PATCH 1/3] tgsi/scan: set if a fragment shader writes sample mask

2016-01-05 Thread eocallaghan


This series is,

Reviewed-by: Edward O'Callaghan 

On 2016-01-06 12:46, Marek Olšák wrote:

From: Marek Olšák 

This will be used by radeonsi.
---
 src/gallium/auxiliary/tgsi/tgsi_scan.c | 2 ++
 src/gallium/auxiliary/tgsi/tgsi_scan.h | 1 +
 2 files changed, 3 insertions(+)

diff --git a/src/gallium/auxiliary/tgsi/tgsi_scan.c
b/src/gallium/auxiliary/tgsi/tgsi_scan.c
index e04f407..e3feed9 100644
--- a/src/gallium/auxiliary/tgsi/tgsi_scan.c
+++ b/src/gallium/auxiliary/tgsi/tgsi_scan.c
@@ -392,6 +392,8 @@ tgsi_scan_shader(const struct tgsi_token *tokens,
  }
  else if (semName == TGSI_SEMANTIC_STENCIL) {
 info->writes_stencil = TRUE;
+ } else if (semName == TGSI_SEMANTIC_SAMPLEMASK) {
+info->writes_samplemask = TRUE;
  }
   }

diff --git a/src/gallium/auxiliary/tgsi/tgsi_scan.h
b/src/gallium/auxiliary/tgsi/tgsi_scan.h
index 7e9a559..a3e4378 100644
--- a/src/gallium/auxiliary/tgsi/tgsi_scan.h
+++ b/src/gallium/auxiliary/tgsi/tgsi_scan.h
@@ -82,6 +82,7 @@ struct tgsi_shader_info
boolean reads_z; /**< does fragment shader read depth? */
boolean writes_z;  /**< does fragment shader write Z value? */
boolean writes_stencil; /**< does fragment shader write stencil 
value? */
+   boolean writes_samplemask; /**< does fragment shader write sample 
mask? */

boolean writes_edgeflag; /**< vertex shader outputs edgeflag */
boolean uses_kill;  /**< KILL or KILL_IF instruction used? */
boolean uses_persp_center;


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[Mesa-dev] [Bug 93524] Clover doesn't build

2016-01-05 Thread bugzilla-daemon

https://bugs.freedesktop.org/show_bug.cgi?id=93524

--- Comment #1 from Michel Dänzer  ---
Please send the patch to the mesa-dev mailing list for review, with the commit
log changed to something like:

 clover: Add libelf cflags

 Fixes the build when libelf is in a non default location.

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Re: [Mesa-dev] [PATCH 1/6] gallium: Remove unnecessary semicolons

2016-01-05 Thread eocallaghan


On 2016-01-06 10:30, Brian Paul wrote:

Series looks OK to me.  Reviewed-by: Brian Paul 

Do you need someone to commit/push for you?


I do yes, thank you kindly.

Edward.



-Brian

On 01/05/2016 03:07 AM, Edward O'Callaghan wrote:

Fix silly issue with MSVC case fall-though support to need
a extra 'break;'

Found-by: Coccinelle
Signed-off-by: Edward O'Callaghan 
Reviewed-by: Brian Paul 
---
  src/gallium/auxiliary/draw/draw_pipe_aaline.c  | 2 +-
  src/gallium/auxiliary/gallivm/lp_bld_swizzle.c | 2 +-
  src/gallium/auxiliary/nir/tgsi_to_nir.c| 2 +-
  src/gallium/auxiliary/util/u_surface.c | 3 ++-
  src/gallium/auxiliary/vl/vl_mpeg12_decoder.c   | 2 +-
  src/gallium/state_trackers/nine/swapchain9.c   | 2 +-
  src/gallium/state_trackers/omx/entrypoint.c| 2 +-
  src/gallium/state_trackers/vdpau/mixer.c   | 2 +-
  8 files changed, 9 insertions(+), 8 deletions(-)

diff --git a/src/gallium/auxiliary/draw/draw_pipe_aaline.c 
b/src/gallium/auxiliary/draw/draw_pipe_aaline.c

index 3ce550a..e85ae16 100644
--- a/src/gallium/auxiliary/draw/draw_pipe_aaline.c
+++ b/src/gallium/auxiliary/draw/draw_pipe_aaline.c
@@ -938,7 +938,7 @@ draw_aaline_prepare_outputs(struct draw_context 
*draw,

 const struct pipe_rasterizer_state *rast = draw->rasterizer;

 /* update vertex attrib info */
-   aaline->pos_slot = draw_current_shader_position_output(draw);;
+   aaline->pos_slot = draw_current_shader_position_output(draw);

 if (!rast->line_smooth)
return;
diff --git a/src/gallium/auxiliary/gallivm/lp_bld_swizzle.c 
b/src/gallium/auxiliary/gallivm/lp_bld_swizzle.c

index b1aef71..f571838 100644
--- a/src/gallium/auxiliary/gallivm/lp_bld_swizzle.c
+++ b/src/gallium/auxiliary/gallivm/lp_bld_swizzle.c
@@ -720,7 +720,7 @@ lp_build_transpose_aos_n(struct gallivm_state 
*gallivm,


default:
   assert(0);
-   };
+   }
  }


diff --git a/src/gallium/auxiliary/nir/tgsi_to_nir.c 
b/src/gallium/auxiliary/nir/tgsi_to_nir.c

index 94d992b..7c57759 100644
--- a/src/gallium/auxiliary/nir/tgsi_to_nir.c
+++ b/src/gallium/auxiliary/nir/tgsi_to_nir.c
@@ -1950,7 +1950,7 @@ tgsi_processor_to_shader_stage(unsigned 
processor)

 case TGSI_PROCESSOR_COMPUTE:   return MESA_SHADER_COMPUTE;
 default:
unreachable("invalid TGSI processor");
-   };
+   }
  }

  struct nir_shader *
diff --git a/src/gallium/auxiliary/util/u_surface.c 
b/src/gallium/auxiliary/util/u_surface.c

index 6aa44f9..c150d92 100644
--- a/src/gallium/auxiliary/util/u_surface.c
+++ b/src/gallium/auxiliary/util/u_surface.c
@@ -600,7 +600,8 @@ is_box_inside_resource(const struct pipe_resource 
*res,

depth = res->array_size;
assert(res->array_size % 6 == 0);
break;
-   case PIPE_MAX_TEXTURE_TYPES:;
+   case PIPE_MAX_TEXTURE_TYPES:
+  break;
 }

 return box->x >= 0 &&
diff --git a/src/gallium/auxiliary/vl/vl_mpeg12_decoder.c 
b/src/gallium/auxiliary/vl/vl_mpeg12_decoder.c

index f5bb3a0..b5c7045 100644
--- a/src/gallium/auxiliary/vl/vl_mpeg12_decoder.c
+++ b/src/gallium/auxiliary/vl/vl_mpeg12_decoder.c
@@ -792,7 +792,7 @@ vl_mpeg12_end_frame(struct pipe_video_codec 
*decoder,

for (j = 0; j < VL_MAX_REF_FRAMES; ++j) {
   if (!ref_frames[j] || !ref_frames[j][i]) continue;

- vb[2] = vl_vb_get_mv(>vertex_stream, j);;
+ vb[2] = vl_vb_get_mv(>vertex_stream, j);
   dec->context->set_vertex_buffers(dec->context, 0, 3, vb);

   vl_mc_render_ref(i ? >mc_c : >mc_y, >mc[i], 
ref_frames[j][i]);
diff --git a/src/gallium/state_trackers/nine/swapchain9.c 
b/src/gallium/state_trackers/nine/swapchain9.c

index 3f5be26..3b1a7a4 100644
--- a/src/gallium/state_trackers/nine/swapchain9.c
+++ b/src/gallium/state_trackers/nine/swapchain9.c
@@ -790,7 +790,7 @@ NineSwapChain9_Present( struct NineSwapChain9 
*This,

  case D3DSWAPEFFECT_FLIP:
  UNTESTED(4);
  case D3DSWAPEFFECT_DISCARD:
-/* rotate the queue */;
+/* rotate the queue */
  pipe_resource_reference(, 
This->buffers[0]->base.resource);

  for (i = 1; i <= This->params.BackBufferCount; i++) {
  NineSurface9_SetResourceResize(This->buffers[i - 1],
diff --git a/src/gallium/state_trackers/omx/entrypoint.c 
b/src/gallium/state_trackers/omx/entrypoint.c

index da9ca10..afcbd97 100644
--- a/src/gallium/state_trackers/omx/entrypoint.c
+++ b/src/gallium/state_trackers/omx/entrypoint.c
@@ -137,7 +137,7 @@ OMX_ERRORTYPE 
omx_workaround_Destructor(OMX_COMPONENTTYPE *comp)

 priv->state = OMX_StateInvalid;
 tsem_up(priv->messageSem);

-   /* wait for thread to exit */;
+   /* wait for thread to exit */
 pthread_join(priv->messageHandlerThread, NULL);

 return omx_base_component_Destructor(comp);
diff --git a/src/gallium/state_trackers/vdpau/mixer.c 
b/src/gallium/state_trackers/vdpau/mixer.c

index c0b1ecc..dec79ff 100644
---

[Mesa-dev] [Bug 27512] Illegal instruction _mesa_x86_64_transform_points4_general

2016-01-05 Thread bugzilla-daemon

https://bugs.freedesktop.org/show_bug.cgi?id=27512

--- Comment #14 from Michael Harder  ---
(In reply to Patrick Baggett from comment #11)
> Created attachment 120822 [details] [review]
> Use prefetcht1 instead of prefetch[w]
> 
> This should fix the SIGILL when running this code. It replaces 3DNow!
> prefetch[w] instructions with SSE prefetcht1. I'm still not convinced that
> the prefetch logic actually has any beneficial performance characteristics.

Thank you. This has resolved the issue for me.

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[Mesa-dev] [Bug 93003] mesa 11.x with vmwgfx (vmware Fusion 8.x) graphical corruption under gnome-shell on GTK applications.

2016-01-05 Thread bugzilla-daemon

https://bugs.freedesktop.org/show_bug.cgi?id=93003

--- Comment #2 from le...@thefnords.org ---
1) Mesa version was originally 11.0.6, and I know I've tested the update to
11.0.7/8.  I am not sure if I've tried it with the current F23 version
(11.1.0).  I'll check kernel version as soon as I'm home (can't fire up the
vmware guest while I'm using most of the memory in Parallels)

2) Will get you the log tonight.

3) Yes, enable 3D acceleration for the virtual machine.

4) I usually start up the terminal, browser and evolution.  By then it's
freaking out.  You won't even have to move things around, they'll start going
transparent.

5) I downgraded mesa via the Fedora method (I found the command in the Fedora
Forums, mentioning downgrading xorg, and applied that to mesa.)  I used the
following command;
sudo dnf --showduplicates --allowerasing --releasever=22 downgrade mesa*

6) I tested this with both Wayland and Classic mode as well as Gnome-Shell. 
All exhibited the same thing.  As mentioned, KDE / Qt applications did not.

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Re: [Mesa-dev] [PATCH V2] mesa: fix GL_MAX_NAME_LENGTH query for tessellation shaders

2016-01-05 Thread Timothy Arceri

ping

This fixes some piglit subtests for ARB_program_interface_query.


On Thu, 2015-12-24 at 13:16 +1100, Timothy Arceri wrote:
> V2: fix alignment
> ---
>  src/mesa/main/shader_query.cpp | 7 ++-
>  1 file changed, 6 insertions(+), 1 deletion(-)
> 
> diff --git a/src/mesa/main/shader_query.cpp
> b/src/mesa/main/shader_query.cpp
> index a1813ac..3a730af 100644
> --- a/src/mesa/main/shader_query.cpp
> +++ b/src/mesa/main/shader_query.cpp
> @@ -765,7 +765,12 @@ static bool
>  add_index_to_name(struct gl_program_resource *res)
>  {
> bool add_index = !(((res->Type == GL_PROGRAM_INPUT) &&
> -   res->StageReferences & (1 <<
> MESA_SHADER_GEOMETRY)));
> +res->StageReferences &
> +((1 << MESA_SHADER_GEOMETRY) |
> + (1 << MESA_SHADER_TESS_CTRL) |
> + (1 << MESA_SHADER_TESS_EVAL))) ||
> +  ((res->Type == GL_PROGRAM_OUTPUT) &&
> +res->StageReferences & (1 <<
> MESA_SHADER_TESS_CTRL)));
>  
> /* Transform feedback varyings have array index already appended
>  * in their names.
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Re: [Mesa-dev] [PATCH] i965: quieten compiler warning about out-of-bounds access

2016-01-05 Thread Timothy Arceri

Reviewed-by: Timothy Arceri  
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[Mesa-dev] [PATCH] i965: Only turn on ARB_compute_shader if we can write registers.

2016-01-05 Thread Kenneth Graunke

Compute shaders require reconfiguring the L3 for shared local memory
support.  We have to be able to write the L3 registers to do that.

This effectively turns off compute shaders prior to Kernel 4.2.

(Previously, the extension enable was in an API_OPENGL_CORE conditional.
However, that isn't necessary - core Mesa extension handling already
restricts it properly.  I've moved it out in this patch.)

Signed-off-by: Kenneth Graunke 
---
 src/mesa/drivers/dri/i965/intel_extensions.c | 5 +++--
 1 file changed, 3 insertions(+), 2 deletions(-)

Tested with Kernel 3.18 (no longer enabled) and 4.3 (still enabled)
on a Haswell laptop.

diff --git a/src/mesa/drivers/dri/i965/intel_extensions.c 
b/src/mesa/drivers/dri/i965/intel_extensions.c
index e1338e9..889f7cb 100644
--- a/src/mesa/drivers/dri/i965/intel_extensions.c
+++ b/src/mesa/drivers/dri/i965/intel_extensions.c
@@ -346,6 +346,9 @@ intelInitExtensions(struct gl_context *ctx)
  ctx->Extensions.ARB_transform_feedback3 = true;
  ctx->Extensions.ARB_transform_feedback_instanced = true;
 
+ if (ctx->Const.MaxComputeWorkGroupSize[0] >= 1024)
+ctx->Extensions.ARB_compute_shader = true;
+
  if (brw->intelScreen->cmd_parser_version >= 2)
 brw->predicate.supported = true;
   }
@@ -357,8 +360,6 @@ intelInitExtensions(struct gl_context *ctx)
  ctx->Extensions.ARB_viewport_array = true;
  ctx->Extensions.AMD_vertex_shader_viewport_index = true;
  ctx->Extensions.ARB_shader_subroutine = true;
- if (ctx->Const.MaxComputeWorkGroupSize[0] >= 1024)
-ctx->Extensions.ARB_compute_shader = true;
   }
}
 
-- 
2.2.2

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Re: [Mesa-dev] [PATCH v2] st/va: count number of slices

2016-01-05 Thread Christian König


On 04.01.2016 23:31, Julien Isorce wrote:

From: Julien Isorce 

The counter was not set but used by the nouveau driver.
It is required otherwise visual output is garbage.

Signed-off-by: Julien Isorce 


Reviewed-by: Christian König 


---
  src/gallium/state_trackers/va/picture.c| 8 
  src/gallium/state_trackers/va/picture_h264.c   | 2 ++
  src/gallium/state_trackers/va/picture_mpeg12.c | 6 ++
  src/gallium/state_trackers/va/picture_vc1.c| 7 +++
  src/gallium/state_trackers/va/va_private.h | 2 ++
  5 files changed, 25 insertions(+)

diff --git a/src/gallium/state_trackers/va/picture.c 
b/src/gallium/state_trackers/va/picture.c
index 7b30bf8..da9ca5a 100644
--- a/src/gallium/state_trackers/va/picture.c
+++ b/src/gallium/state_trackers/va/picture.c
@@ -174,6 +174,14 @@ static void
  handleSliceParameterBuffer(vlVaContext *context, vlVaBuffer *buf)
  {
 switch (u_reduce_video_profile(context->templat.profile)) {
+   case PIPE_VIDEO_FORMAT_MPEG12:
+  vlVaHandleSliceParameterBufferMPEG12(context, buf);
+  break;
+
+   case PIPE_VIDEO_FORMAT_VC1:
+  vlVaHandleSliceParameterBufferVC1(context, buf);
+  break;
+
 case PIPE_VIDEO_FORMAT_MPEG4_AVC:
vlVaHandleSliceParameterBufferH264(context, buf);
break;
diff --git a/src/gallium/state_trackers/va/picture_h264.c 
b/src/gallium/state_trackers/va/picture_h264.c
index acbfe5d..883a94a 100644
--- a/src/gallium/state_trackers/va/picture_h264.c
+++ b/src/gallium/state_trackers/va/picture_h264.c
@@ -48,6 +48,7 @@ void vlVaHandlePictureParameterBufferH264(vlVaDriver *drv, 
vlVaContext *context,
 unsigned i;
  
 assert(buf->size >= sizeof(VAPictureParameterBufferH264) && buf->num_elements == 1);

+   context->desc.h264.slice_count = 0;
 /*CurrPic*/
 context->desc.h264.field_order_cnt[0] = h264->CurrPic.TopFieldOrderCnt;
 context->desc.h264.field_order_cnt[1] = h264->CurrPic.BottomFieldOrderCnt;
@@ -162,6 +163,7 @@ void vlVaHandleSliceParameterBufferH264(vlVaContext 
*context, vlVaBuffer *buf)
 VASliceParameterBufferH264 *h264 = buf->data;
  
 assert(buf->size >= sizeof(VASliceParameterBufferH264) && buf->num_elements == 1);

+   context->desc.h264.slice_count += buf->num_elements;
 context->desc.h264.num_ref_idx_l0_active_minus1 =
h264->num_ref_idx_l0_active_minus1;
 context->desc.h264.num_ref_idx_l1_active_minus1 =
diff --git a/src/gallium/state_trackers/va/picture_mpeg12.c 
b/src/gallium/state_trackers/va/picture_mpeg12.c
index e587b1e..812e9e5 100644
--- a/src/gallium/state_trackers/va/picture_mpeg12.c
+++ b/src/gallium/state_trackers/va/picture_mpeg12.c
@@ -32,6 +32,7 @@ void vlVaHandlePictureParameterBufferMPEG12(vlVaDriver *drv, 
vlVaContext *contex
 VAPictureParameterBufferMPEG2 *mpeg2 = buf->data;
  
 assert(buf->size >= sizeof(VAPictureParameterBufferMPEG2) && buf->num_elements == 1);

+   context->desc.mpeg12.num_slices = 0;
 /*horizontal_size;*/
 /*vertical_size;*/
 vlVaGetReferenceFrame(drv, mpeg2->forward_reference_picture, 
>desc.mpeg12.ref[0]);
@@ -78,3 +79,8 @@ void vlVaHandleIQMatrixBufferMPEG12(vlVaContext *context, 
vlVaBuffer *buf)
context->desc.mpeg12.non_intra_matrix = NULL;
  }
  
+void vlVaHandleSliceParameterBufferMPEG12(vlVaContext *context, vlVaBuffer *buf)

+{
+   assert(buf->size >= sizeof(VASliceParameterBufferMPEG2) && 
buf->num_elements == 1);
+   context->desc.mpeg12.num_slices += buf->num_elements;
+}
diff --git a/src/gallium/state_trackers/va/picture_vc1.c 
b/src/gallium/state_trackers/va/picture_vc1.c
index f95fd83..6ad1571 100644
--- a/src/gallium/state_trackers/va/picture_vc1.c
+++ b/src/gallium/state_trackers/va/picture_vc1.c
@@ -32,6 +32,7 @@ void vlVaHandlePictureParameterBufferVC1(vlVaDriver *drv, 
vlVaContext *context,
 VAPictureParameterBufferVC1 * vc1 = buf->data;
  
 assert(buf->size >= sizeof(VAPictureParameterBufferVC1) && buf->num_elements == 1);

+   context->desc.vc1.slice_count = 0;
 vlVaGetReferenceFrame(drv, vc1->forward_reference_picture, 
>desc.vc1.ref[0]);
 vlVaGetReferenceFrame(drv, vc1->backward_reference_picture, 
>desc.vc1.ref[1]);
 context->desc.vc1.picture_type = vc1->picture_fields.bits.picture_type;
@@ -65,3 +66,9 @@ void vlVaHandlePictureParameterBufferVC1(vlVaDriver *drv, 
vlVaContext *context,
 context->desc.vc1.deblockEnable = vc1->post_processing != 0;
 context->desc.vc1.pquant = 
vc1->pic_quantizer_fields.bits.pic_quantizer_scale;
  }
+
+void vlVaHandleSliceParameterBufferVC1(vlVaContext *context, vlVaBuffer *buf)
+{
+   assert(buf->size >= sizeof(VASliceParameterBufferVC1) && buf->num_elements 
== 1);
+   context->desc.vc1.slice_count += buf->num_elements;
+}
diff --git a/src/gallium/state_trackers/va/va_private.h 
b/src/gallium/state_trackers/va/va_private.h
index fa6e0fb..bf9d24b 100644
--- a/src/gallium/state_trackers/va/va_private.h
+++

[Mesa-dev] [PATCH shader-db 3/4] report.py: Handle TCS and TES shaders.

2016-01-05 Thread Kenneth Graunke

VS/GS/FS match the regex '.S' but TCS/TES do not.  Just match \S+.
---
 report.py | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/report.py b/report.py
index 877e4ff..f9b1776 100755
--- a/report.py
+++ b/report.py
@@ -10,7 +10,7 @@ def get_results(filename):
 
 results = {}
 
-re_match = re.compile(r"(\S+) - (.S \S+) shader: (\S*) inst, (\S*) loops, 
(\S*) cycles")
+re_match = re.compile(r"(\S+) - (\S+ \S+) shader: (\S*) inst, (\S*) loops, 
(\S*) cycles")
 for line in lines:
 match = re.search(re_match, line)
 if match is None:
-- 
2.6.4

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[Mesa-dev] [PATCH shader-db 4/4] run.py: Add tessellation shader support.

2016-01-05 Thread Kenneth Graunke

---
 run.py | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

in case you want to use the old runner to produce .out files.

diff --git a/run.py b/run.py
index 58bdbbf..ced8710 100755
--- a/run.py
+++ b/run.py
@@ -48,7 +48,7 @@ def run_test(filename):
 
 lines = (line for line in results.splitlines())
 re_number = re.compile(
-r'Native code for (unnamed )?(fragment|vertex|geometry) shader 
(GLSL|ARB)(?P\d+)')
+r'Native code for (unnamed )?(fragment|vertex|geometry|tessellation 
control|tessellation evaluation) shader (GLSL|ARB)(?P\d+)')
 for line in lines:
 shader = re_number.match(line)
 if shader and int(shader.group('number')) > 0:
@@ -89,9 +89,9 @@ def main():
 os.environ["PIGLIT_PLATFORM"] = "gbm"
 if "INTEL_DEBUG" in os.environ:
 print("Warning: INTEL_DEBUG environment variable set!", 
file=sys.stderr)
-os.environ["INTEL_DEBUG"] += ",vs,gs,fs"
+os.environ["INTEL_DEBUG"] += ",vs,gs,fs,tcs,tes"
 else:
-os.environ["INTEL_DEBUG"] = "vs,gs,fs"
+os.environ["INTEL_DEBUG"] = "vs,gs,fs,tcs,tes"
 
 try:
 os.stat("bin/shader_runner")
-- 
2.6.4

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[Mesa-dev] [PATCH shader-db 2/4] report.py: Explicitly require python3

2016-01-05 Thread Kenneth Graunke

This will prevent more python2isms from creeping in.
---
 report.py | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/report.py b/report.py
index 1352f22..877e4ff 100755
--- a/report.py
+++ b/report.py
@@ -1,4 +1,4 @@
-#!/usr/bin/env python
+#!/usr/bin/env python3
 
 import re
 import argparse
-- 
2.6.4

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[Mesa-dev] [PATCH shader-db 1/4] Fix Python2ism that crept into report.py.

2016-01-05 Thread Kenneth Graunke

I ported this to Python 3 back in 2012.  It's not supposed to be run
with Python 2.
---
 report.py | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/report.py b/report.py
index 409474a..1352f22 100755
--- a/report.py
+++ b/report.py
@@ -73,7 +73,7 @@ def main():
 affected_before[m] = 0
 affected_after[m] = 0
 
-print m
+print(m)
 
 helped = []
 hurt = []
-- 
2.6.4

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Re: [Mesa-dev] [PATCH 1/8] tgsi: add ureg support for image decls

2016-01-05 Thread Roland Scheidegger

Am 04.01.2016 um 22:00 schrieb Samuel Pitoiset:
> 
> 
> On 01/04/2016 09:25 PM, Ilia Mirkin wrote:
>> On Mon, Jan 4, 2016 at 3:13 PM, Samuel Pitoiset
>>  wrote:
>>> On 01/03/2016 05:37 AM, Ilia Mirkin wrote:
 Signed-off-by: Ilia Mirkin 
 diff --git a/src/gallium/auxiliary/tgsi/tgsi_strings.c
 b/src/gallium/auxiliary/tgsi/tgsi_strings.c
 index fd926b3..ae30399 100644
 --- a/src/gallium/auxiliary/tgsi/tgsi_strings.c
 +++ b/src/gallium/auxiliary/tgsi/tgsi_strings.c
 @@ -54,8 +54,8 @@ static const char *tgsi_file_names[] =
   "IMM",
   "PRED",
   "SV",
 -   "RES",
 -   "SVIEW"
 +   "IMAGE",
 +   "SVIEW",
};
>>>
>>>
>>> You forgot to update src/gallium/tests/trivial/compute.c, and so you did
>>> break all of those compute tests. Please don't break them because
>>> they are
>>> useful for people which work on compute. :-)
>>
>> Can I update it by deleting it? Like I was saying, all that stuff
>> needs to be reworked... since compute.c doesn't *actually* work with
>> anything, and actively conflicts with plans for OpenGL things, I see
>> no problem with just invalidating the interfaces it was using. (This
>> is also why I was discouraging people from trying to do TGSI with
>> compute without considering these things first.)
> 
> We discussed about that on IRC and the plan is to update compute.c once
> the interface will be more suitable (when BUFFER/IMAGE will be
> implemented) because this RES thing is weird and need to be removed.
> 
FWIW the RES file name probably wasn't really intended to be used for
this in the first place. d3d10 has input resource declarations. These
are just your ordinary resource declarations for shaders to be used for
texturing / fetch (which of course GL doesn't have as it just has
samplers instead of samplers + resources). Albeit we used SVIEW for that
instead, I'm not entirely sure why actually, you can see in the svga
driver that it uses all this "resource" naming for converting sviews to
our protocol...

Roland

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[Mesa-dev] [Bug 27512] Illegal instruction _mesa_x86_64_transform_points4_general

2016-01-05 Thread bugzilla-daemon

https://bugs.freedesktop.org/show_bug.cgi?id=27512

--- Comment #11 from Patrick Baggett  ---
Created attachment 120822
  --> https://bugs.freedesktop.org/attachment.cgi?id=120822=edit
Use prefetcht1 instead of prefetch[w]

This should fix the SIGILL when running this code. It replaces 3DNow!
prefetch[w] instructions with SSE prefetcht1. I'm still not convinced that the
prefetch logic actually has any beneficial performance characteristics.

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[Mesa-dev] [Bug 27512] Illegal instruction _mesa_x86_64_transform_points4_general

2016-01-05 Thread bugzilla-daemon

https://bugs.freedesktop.org/show_bug.cgi?id=27512

Lars Kellogg-Stedman  changed:

   What|Removed |Added

 CC|l...@oddbit.com |

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[Mesa-dev] [Bug 27512] Illegal instruction _mesa_x86_64_transform_points4_general

2016-01-05 Thread bugzilla-daemon

https://bugs.freedesktop.org/show_bug.cgi?id=27512

--- Comment #13 from Roland Scheidegger  ---
(In reply to Patrick Baggett from comment #11)
> Created attachment 120822 [details] [review]
> Use prefetcht1 instead of prefetch[w]
> 
> This should fix the SIGILL when running this code. It replaces 3DNow!
> prefetch[w] instructions with SSE prefetcht1. I'm still not convinced that
> the prefetch logic actually has any beneficial performance characteristics.

I don't see much point though in replacing the prefetch[w] instructions in the
3dnow functions however. Though I'd guess since this is x86_64 it should still
work...

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[Mesa-dev] [Bug 27512] Illegal instruction _mesa_x86_64_transform_points4_general

2016-01-05 Thread bugzilla-daemon

https://bugs.freedesktop.org/show_bug.cgi?id=27512

--- Comment #12 from Roland Scheidegger  ---
(In reply to Patrick Baggett from comment #10)
> Created attachment 120821 [details]
> attachment-30621-0.html
> 
> Given that there is a _mesa_3dnow_transform_points4_2d in the x86-64 asm
> (using MMX/3DNow! is deprecated in x86-64), it appears that this code was
> copy-pasted. I wrote a quick patch to change prefetch[w] to prefetcht1,
> which is more or less the equivalent in SSE. However, I'm not actually sure
> those prefetches really benefit the code since they appear to be monotonic
> addresses and hinting only 16 bytes ahead (a cache line is almost always at
> least 32 bytes) -- maybe that sort of testing is for another day.

I'd agree that it's dubious that "modern" cpus would benefit - as you said
addresses are monotonic and certainly hw prefetchers should handle that pretty
well. Though you could argue someone might still use some cpus with terrible
prefetchers, and the prefetch instructions should not hurt (at least not much)
on modern cpus neither...

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[Mesa-dev] [Bug 93003] mesa 11.x with vmwgfx (vmware Fusion 8.x) graphical corruption under gnome-shell on GTK applications.

2016-01-05 Thread bugzilla-daemon

https://bugs.freedesktop.org/show_bug.cgi?id=93003

Sinclair Yeh  changed:

   What|Removed |Added

 Status|NEW |NEEDINFO

--- Comment #1 from Sinclair Yeh  ---
I am having a hard time reproducing this.  Things seem to work with a fresh
install of F23 (mesa 11.0.3 git-b4bfea0).  After "dnf upgrade", I have trouble
logging in.  When I eventually do, I still don't see a corruption.

Can you please provide the following:

1.  MESA version and kernel version
2.  vmware.log
3.  when you say "Enable 3D Acceleration", do you mean the check box in
the Fusion GUI under "Display"?
4.  To reproduce this, do I just need to start Terminal and drag the window
around?
5.  When you say downgrade all mesa library, do you mean checking out
mesa-10.6.9, for example, and "make install"?
6.  Do you log in in Wayland or Classic mode?

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[Mesa-dev] [PATCH] glsl: add image_format check in cross_validate_globals()

2016-01-05 Thread Samuel Iglesias Gonsálvez

Fixes CTS test:

ES31-CTS.shader_image_load_store.negative-linkErrors

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=93410

Signed-off-by: Samuel Iglesias Gonsálvez 
---
 src/glsl/linker.cpp | 6 ++
 1 file changed, 6 insertions(+)

diff --git a/src/glsl/linker.cpp b/src/glsl/linker.cpp
index a6e81b4..cf4d68d 100644
--- a/src/glsl/linker.cpp
+++ b/src/glsl/linker.cpp
@@ -1133,6 +1133,12 @@ cross_validate_globals(struct gl_shader_program *prog,
 mode_string(var), var->name);
return;
 }
+if (existing->data.image_format != var->data.image_format) {
+   linker_error(prog, "declarations for %s `%s` have "
+"mismatching image format qualifiers\n",
+mode_string(var), var->name);
+   return;
+}
 } else
variables.add_variable(var);
   }
-- 
2.5.0

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[Mesa-dev] [PATCH] i965: Use rcp in brw_lower_texture_gradients rather than 1.0 / x.

2016-01-05 Thread Kenneth Graunke

That's what it's for.  Plus, we actually implement rcp.

Signed-off-by: Kenneth Graunke 
---
 src/mesa/drivers/dri/i965/brw_lower_texture_gradients.cpp | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/mesa/drivers/dri/i965/brw_lower_texture_gradients.cpp 
b/src/mesa/drivers/dri/i965/brw_lower_texture_gradients.cpp
index d571ecd..c83b272 100644
--- a/src/mesa/drivers/dri/i965/brw_lower_texture_gradients.cpp
+++ b/src/mesa/drivers/dri/i965/brw_lower_texture_gradients.cpp
@@ -279,7 +279,7 @@ lower_texture_grad_visitor::visit_leave(ir_texture *ir)
 
   /* 2. quotient rule */
   ir_variable *recip = temp(mem_ctx, glsl_type::float_type, "recip");
-  EMIT(assign(recip, div(new(mem_ctx) ir_constant(1.0f), swizzle_z(Q;
+  EMIT(assign(recip, expr(ir_unop_rcp, swizzle_z(Q;
 
   ir_variable *dx = temp(mem_ctx, glsl_type::vec2_type, "dx");
   ir_variable *dy = temp(mem_ctx, glsl_type::vec2_type, "dy");
-- 
2.6.4

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Re: [Mesa-dev] [PATCH 2/2] glsl: Relax ir_quadop_bitfield_insert type restrictions.

2016-01-05 Thread Jason Ekstrand

On Jan 5, 2016 5:34 AM, "Kenneth Graunke"  wrote:
>
> While GLSL restricts bitfieldInsert's offset and bits parameters to
> be scalars, we shouldn't require this in the IR.
>
> In particular, opt_vectorize() tries to combine
>
> result.x = bitfieldInsert(src0.x, src1.x, src2.x, src3.x);
> result.y = bitfieldInsert(src0.y, src1.y, src2.y, src3.y);
> result.z = bitfieldInsert(src0.z, src1.z, src2.z, src3.z);
> result.w = bitfieldInsert(src0.w, src1.w, src2.w, src3.w);
>
> into a single ivec4 bitfieldInsert operation.  This currently breaks,
> because the last two types become ivec4 rather than int.  It seems
> perfectly reasonable to allow this.

You also need to fix NIR to handle this. At the moment, it splats the
offset and bits to all channels.  This will affect the opcode definition,
the constant folding expression, and possibly alu_to_scalar as well.

--Jason

> i965 lowers ir_quadop_bitfield_insert to ir_binop_bfm and ir_triop_bfi,
> which already lift these restrictions.
>
> (I debated about using is_integer() or base_type == GLSL_TYPE_INT here;
> I ended up relaxing it to allow either int/uint because ir_binop_bfm
> and ir_triop_bfi do that already.)
>
> Fixes assertion failures when compiling Shadow of Mordor vertex shaders
> on i965 in vec4 mode (where OptimizeForAOS enables opt_vectorize()).
>
> Signed-off-by: Kenneth Graunke 
> Cc: Matt Turner 
> Cc: mesa-sta...@lists.freedesktop.org
> ---
>  src/glsl/ir_validate.cpp | 4 ++--
>  1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/src/glsl/ir_validate.cpp b/src/glsl/ir_validate.cpp
> index dcc079c..b5eaaff 100644
> --- a/src/glsl/ir_validate.cpp
> +++ b/src/glsl/ir_validate.cpp
> @@ -661,8 +661,8 @@ ir_validate::visit_leave(ir_expression *ir)
> case ir_quadop_bitfield_insert:
>assert(ir->operands[0]->type == ir->type);
>assert(ir->operands[1]->type == ir->type);
> -  assert(ir->operands[2]->type == glsl_type::int_type);
> -  assert(ir->operands[3]->type == glsl_type::int_type);
> +  assert(ir->operands[2]->type->is_integer());
> +  assert(ir->operands[3]->type->is_integer());
>break;
>
> case ir_quadop_vector:
> --
> 2.6.4
>
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Re: [Mesa-dev] [PATCH] i965: quieten compiler warning about out-of-bounds access

2016-01-05 Thread Jason Ekstrand

On Jan 4, 2016 8:30 PM, "Ilia Mirkin"  wrote:
>
> gcc 4.9.3 shows the following error:
>
> brw_vue_map.c:260:20: warning: array subscript is above array bounds
> [-Warray-bounds]
> return brw_names[slot - VARYING_SLOT_MAX];
>
> This is because BRW_VARYING_SLOT_COUNT is a valid value for the enum
> type. Adding an assert will generate no additional code but will teach
> the compiler to not complain.

What of you build in release mode?

> Signed-off-by: Ilia Mirkin 
> ---
>  src/mesa/drivers/dri/i965/brw_vue_map.c | 1 +
>  1 file changed, 1 insertion(+)
>
> diff --git a/src/mesa/drivers/dri/i965/brw_vue_map.c
b/src/mesa/drivers/dri/i965/brw_vue_map.c
> index 09eadbc..fea2436 100644
> --- a/src/mesa/drivers/dri/i965/brw_vue_map.c
> +++ b/src/mesa/drivers/dri/i965/brw_vue_map.c
> @@ -257,6 +257,7 @@ varying_name(brw_varying_slot slot)
>[BRW_VARYING_SLOT_PNTC - VARYING_SLOT_MAX] =
"BRW_VARYING_SLOT_PNTC",
> };
>
> +   assert(slot < BRW_VARYING_SLOT_COUNT);
> return brw_names[slot - VARYING_SLOT_MAX];
>  }
>
> --
> 2.4.10
>
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[Mesa-dev] [PATCH v2] mesa: remove link validation that should be done elsewhere

2016-01-05 Thread Timothy Arceri

Even if re-linking fails rendering shouldn't fail as the previous
succesfully linked program will still be available. It also shouldn't
be possible to have an unlinked program as part of the current rendering
state.

This fixes a subtest in:
ES31-CTS.sepshaderobjs.StateInteraction

This change should improve performance on CPU limited benchmarks as noted
in commit d6c6b186cf308f.

From Section 7.3 (Program Objects) of the OpenGL 4.5 spec:

   "If a program object that is active for any shader stage is re-linked
unsuccessfully, the link status will be set to FALSE, but any existing
executables and associated state will remain part of the current rendering
state until a subsequent call to UseProgram, UseProgramStages, or
BindProgramPipeline removes them from use. If such a program is attached to
any program pipeline object, the existing executables and associated state
will remain part of the program pipeline object until a subsequent call to
UseProgramStages removes them from use. An unsuccessfully linked program may
not be made part of the current rendering state by UseProgram or added to
program pipeline objects by UseProgramStages until it is successfully
re-linked."

   "void UseProgram(uint program);

   ...

   An INVALID_OPERATION error is generated if program has not been linked, or
   was last linked unsuccessfully.  The current rendering state is not 
modified."

V2: apply the rule to both core and compat.

Cc: Tapani Pälli 
Cc: Ian Romanick 
Cc: Brian Paul 
---
 src/mesa/main/context.c | 63 +++--
 1 file changed, 3 insertions(+), 60 deletions(-)

diff --git a/src/mesa/main/context.c b/src/mesa/main/context.c
index be983d4..f3fd01f 100644
--- a/src/mesa/main/context.c
+++ b/src/mesa/main/context.c
@@ -1930,31 +1930,6 @@ _mesa_check_blend_func_error(struct gl_context *ctx)
return GL_TRUE;
 }
 
-static bool
-shader_linked_or_absent(struct gl_context *ctx,
-const struct gl_shader_program *shProg,
-bool *shader_present, const char *where)
-{
-   if (shProg) {
-  *shader_present = true;
-
-  if (!shProg->LinkStatus) {
- _mesa_error(ctx, GL_INVALID_OPERATION, "%s(shader not linked)", 
where);
- return false;
-  }
-#if 0 /* not normally enabled */
-  {
- char errMsg[100];
- if (!_mesa_validate_shader_program(ctx, shProg, errMsg)) {
-_mesa_warning(ctx, "Shader program %u is invalid: %s",
-  shProg->Name, errMsg);
- }
-  }
-#endif
-   }
-
-   return true;
-}
 
 /**
  * Prior to drawing anything with glBegin, glDrawArrays, etc. this function
@@ -1967,54 +1942,22 @@ shader_linked_or_absent(struct gl_context *ctx,
 GLboolean
 _mesa_valid_to_render(struct gl_context *ctx, const char *where)
 {
-   unsigned i;
-
/* This depends on having up to date derived state (shaders) */
if (ctx->NewState)
   _mesa_update_state(ctx);
 
-   if (ctx->API == API_OPENGL_CORE || ctx->API == API_OPENGLES2) {
-  bool from_glsl_shader[MESA_SHADER_COMPUTE] = { false };
-
-  for (i = 0; i < MESA_SHADER_COMPUTE; i++) {
- if (!shader_linked_or_absent(ctx, ctx->_Shader->CurrentProgram[i],
-  _glsl_shader[i], where))
-return GL_FALSE;
-  }
-
-  /* In OpenGL Core Profile and OpenGL ES 2.0 / 3.0, there are no assembly
-   * shaders.  Don't check state related to those.
-   */
-   } else {
-  bool has_vertex_shader = false;
-  bool has_fragment_shader = false;
-
-  /* In OpenGL Compatibility Profile, there is only vertex shader and
-   * fragment shader.  We take this path also for API_OPENGLES because
-   * optimizing that path would make the other (more common) paths
-   * slightly slower.
-   */
-  if (!shader_linked_or_absent(ctx,
-   
ctx->_Shader->CurrentProgram[MESA_SHADER_VERTEX],
-   _vertex_shader, where))
- return GL_FALSE;
-
-  if (!shader_linked_or_absent(ctx,
-   
ctx->_Shader->CurrentProgram[MESA_SHADER_FRAGMENT],
-   _fragment_shader, where))
- return GL_FALSE;
-
+   if (ctx->API == API_OPENGL_COMPAT) {
   /* Any shader stages that are not supplied by the GLSL shader and have
* assembly shaders enabled must now be validated.
*/
-  if (!has_vertex_shader
+  if (!ctx->_Shader->CurrentProgram[MESA_SHADER_VERTEX]
   && ctx->VertexProgram.Enabled && !ctx->VertexProgram._Enabled) {
  _mesa_error(ctx, GL_INVALID_OPERATION,
  "%s(vertex program not valid)", where);
  return GL_FALSE;
   }
 
-  if (!has_fragment_shader) {
+  if (!ctx->_Shader->CurrentProgram[MESA_SHADER_FRAGMENT]) {

[Mesa-dev] [PATCH 2/2] llvmpipe: avoid most 64 bit math in rasterization

2016-01-05 Thread sroland

From: Roland Scheidegger 

The trick here is to recognize that in the c + n * dcdx calculations,
not only can the lower FIXED_ORDER bits not change (as the dcdx values
have those all zero) but that this means the sign bit of the calculations
cannot be different as well, that is
sign(c + n*dcdx) == sign((c >> FIXED_ORDER) + n*(dcdx >> FIXED_ORDER)).
That shaves off more than enough bits to never require 64bit masks.
A shifted plane c value could still easily exceed 32 bits, however since we
throw out planes which are trivial accept even before binning (and similarly
don't even get to see tris for which there was a trivial reject plane)) this
is never a problem.
The idea isnt't all that revolutionary, in fact something similar was tried
ages ago (9773722c2b09d5f0615a47cecf4347859474dc56) back when the values were
only 32 bit anyway. I believe now it didn't quite work then because the
adjustment needed for testing trivial reject / partial masks wasn't handled
correctly.
This still keeps the separate 32/64 bit paths for now, as the 32 bit one still
looks minimally simpler (and also because if we'd pass in dcdx/dcdy/eo unscaled
from setup which would be a good reason to ditch the 32 bit path, we'd need to
change the special-purpose rasterization functions for small tris).

This passes piglit triangle-rasterization (-fbo -auto -max_size
-subpixelbits 8). It still fails triangle-rasterization-overdraw -max_size
(no change, fails everything at position 2048 - interestingly for softpipe,
nvidia maxwell 1 blob, and amd evergreen open-source drivers the test fails
as well but at 4096 - seems like we're missing a float mantissa bit
somewhere!).
---
 src/gallium/drivers/llvmpipe/lp_rast_tri.c |  84 +--
 src/gallium/drivers/llvmpipe/lp_rast_tri_tmp.h | 107 +
 2 files changed, 133 insertions(+), 58 deletions(-)

diff --git a/src/gallium/drivers/llvmpipe/lp_rast_tri.c 
b/src/gallium/drivers/llvmpipe/lp_rast_tri.c
index c9b9221..a4dd6ef 100644
--- a/src/gallium/drivers/llvmpipe/lp_rast_tri.c
+++ b/src/gallium/drivers/llvmpipe/lp_rast_tri.c
@@ -64,43 +64,43 @@ block_full_16(struct lp_rasterizer_task *task,
 }
 
 static inline unsigned
-build_mask_linear(int64_t c, int64_t dcdx, int64_t dcdy)
+build_mask_linear(int32_t c, int32_t dcdx, int32_t dcdy)
 {
unsigned mask = 0;
 
-   int64_t c0 = c;
-   int64_t c1 = c0 + dcdy;
-   int64_t c2 = c1 + dcdy;
-   int64_t c3 = c2 + dcdy;
-
-   mask |= ((c0 + 0 * dcdx) >> FIXED_SHIFT) & (1 << 0);
-   mask |= ((c0 + 1 * dcdx) >> FIXED_SHIFT) & (1 << 1);
-   mask |= ((c0 + 2 * dcdx) >> FIXED_SHIFT) & (1 << 2);
-   mask |= ((c0 + 3 * dcdx) >> FIXED_SHIFT) & (1 << 3);
-   mask |= ((c1 + 0 * dcdx) >> FIXED_SHIFT) & (1 << 4);
-   mask |= ((c1 + 1 * dcdx) >> FIXED_SHIFT) & (1 << 5);
-   mask |= ((c1 + 2 * dcdx) >> FIXED_SHIFT) & (1 << 6);
-   mask |= ((c1 + 3 * dcdx) >> FIXED_SHIFT) & (1 << 7);
-   mask |= ((c2 + 0 * dcdx) >> FIXED_SHIFT) & (1 << 8);
-   mask |= ((c2 + 1 * dcdx) >> FIXED_SHIFT) & (1 << 9);
-   mask |= ((c2 + 2 * dcdx) >> FIXED_SHIFT) & (1 << 10);
-   mask |= ((c2 + 3 * dcdx) >> FIXED_SHIFT) & (1 << 11);
-   mask |= ((c3 + 0 * dcdx) >> FIXED_SHIFT) & (1 << 12);
-   mask |= ((c3 + 1 * dcdx) >> FIXED_SHIFT) & (1 << 13);
-   mask |= ((c3 + 2 * dcdx) >> FIXED_SHIFT) & (1 << 14);
-   mask |= ((c3 + 3 * dcdx) >> FIXED_SHIFT) & (1 << 15);
+   int32_t c0 = c;
+   int32_t c1 = c0 + dcdy;
+   int32_t c2 = c1 + dcdy;
+   int32_t c3 = c2 + dcdy;
+
+   mask |= ((c0 + 0 * dcdx) >> 31) & (1 << 0);
+   mask |= ((c0 + 1 * dcdx) >> 31) & (1 << 1);
+   mask |= ((c0 + 2 * dcdx) >> 31) & (1 << 2);
+   mask |= ((c0 + 3 * dcdx) >> 31) & (1 << 3);
+   mask |= ((c1 + 0 * dcdx) >> 31) & (1 << 4);
+   mask |= ((c1 + 1 * dcdx) >> 31) & (1 << 5);
+   mask |= ((c1 + 2 * dcdx) >> 31) & (1 << 6);
+   mask |= ((c1 + 3 * dcdx) >> 31) & (1 << 7);
+   mask |= ((c2 + 0 * dcdx) >> 31) & (1 << 8);
+   mask |= ((c2 + 1 * dcdx) >> 31) & (1 << 9);
+   mask |= ((c2 + 2 * dcdx) >> 31) & (1 << 10);
+   mask |= ((c2 + 3 * dcdx) >> 31) & (1 << 11);
+   mask |= ((c3 + 0 * dcdx) >> 31) & (1 << 12);
+   mask |= ((c3 + 1 * dcdx) >> 31) & (1 << 13);
+   mask |= ((c3 + 2 * dcdx) >> 31) & (1 << 14);
+   mask |= ((c3 + 3 * dcdx) >> 31) & (1 << 15);
   
return mask;
 }
 
 
 static inline void
-build_masks(int64_t c,
-int64_t cdiff,
-int64_t dcdx,
-int64_t dcdy,
-   unsigned *outmask,
-   unsigned *partmask)
+build_masks(int32_t c,
+int32_t cdiff,
+int32_t dcdx,
+int32_t dcdy,
+unsigned *outmask,
+unsigned *partmask)
 {
*outmask |= build_mask_linear(c, dcdx, dcdy);
*partmask |= build_mask_linear(c + cdiff, dcdx, dcdy);
@@ -168,12 +168,12 @@ lp_rast_triangle_32_3_4(struct lp_rasterizer_task *task,
 
 
 static inline void
-build_masks_32(int c, 
-   int cdiff,
-   int dcdx,
-   int dcdy,
-   unsigned

[Mesa-dev] [PATCH 1/2] llvmpipe: scale up bounding box planes to subpixel precision

2016-01-05 Thread sroland

From: Roland Scheidegger 

Otherwise some planes we get in rasterization have subpixel precision, others
not. Doesn't matter so far, but will soon. (OpenGL actually supports viewports
with subpixel accuracy, so could even do bounding box calcs with that).
---
 src/gallium/drivers/llvmpipe/lp_setup_line.c  | 20 ++--
 src/gallium/drivers/llvmpipe/lp_setup_point.c | 20 ++--
 src/gallium/drivers/llvmpipe/lp_setup_tri.c   | 20 ++--
 3 files changed, 30 insertions(+), 30 deletions(-)

diff --git a/src/gallium/drivers/llvmpipe/lp_setup_line.c 
b/src/gallium/drivers/llvmpipe/lp_setup_line.c
index a0de599..f425825 100644
--- a/src/gallium/drivers/llvmpipe/lp_setup_line.c
+++ b/src/gallium/drivers/llvmpipe/lp_setup_line.c
@@ -713,24 +713,24 @@ try_setup_line( struct lp_setup_context *setup,
   const struct u_rect *scissor =
  >scissors[viewport_index];
 
-  plane[4].dcdx = -1;
+  plane[4].dcdx = -1 << 8;
   plane[4].dcdy = 0;
-  plane[4].c = 1-scissor->x0;
-  plane[4].eo = 1;
+  plane[4].c = (1-scissor->x0) << 8;
+  plane[4].eo = 1 << 8;
 
-  plane[5].dcdx = 1;
+  plane[5].dcdx = 1 << 8;
   plane[5].dcdy = 0;
-  plane[5].c = scissor->x1+1;
+  plane[5].c = (scissor->x1+1) << 8;
   plane[5].eo = 0;
 
   plane[6].dcdx = 0;
-  plane[6].dcdy = 1;
-  plane[6].c = 1-scissor->y0;
-  plane[6].eo = 1;
+  plane[6].dcdy = 1 << 8;
+  plane[6].c = (1-scissor->y0) << 8;
+  plane[6].eo = 1 << 8;
 
   plane[7].dcdx = 0;
-  plane[7].dcdy = -1;
-  plane[7].c = scissor->y1+1;
+  plane[7].dcdy = -1 << 8;
+  plane[7].c = (scissor->y1+1) << 8;
   plane[7].eo = 0;
}
 
diff --git a/src/gallium/drivers/llvmpipe/lp_setup_point.c 
b/src/gallium/drivers/llvmpipe/lp_setup_point.c
index 14c389f..ddb6f0e 100644
--- a/src/gallium/drivers/llvmpipe/lp_setup_point.c
+++ b/src/gallium/drivers/llvmpipe/lp_setup_point.c
@@ -492,24 +492,24 @@ try_setup_point( struct lp_setup_context *setup,
{
   struct lp_rast_plane *plane = GET_PLANES(point);
 
-  plane[0].dcdx = -1;
+  plane[0].dcdx = -1 << 8;
   plane[0].dcdy = 0;
-  plane[0].c = 1-bbox.x0;
-  plane[0].eo = 1;
+  plane[0].c = (1-bbox.x0) << 8;
+  plane[0].eo = 1 << 8;
 
-  plane[1].dcdx = 1;
+  plane[1].dcdx = 1 << 8;
   plane[1].dcdy = 0;
-  plane[1].c = bbox.x1+1;
+  plane[1].c = (bbox.x1+1) << 8;
   plane[1].eo = 0;
 
   plane[2].dcdx = 0;
-  plane[2].dcdy = 1;
-  plane[2].c = 1-bbox.y0;
-  plane[2].eo = 1;
+  plane[2].dcdy = 1 << 8;
+  plane[2].c = (1-bbox.y0) << 8;
+  plane[2].eo = 1 << 8;
 
   plane[3].dcdx = 0;
-  plane[3].dcdy = -1;
-  plane[3].c = bbox.y1+1;
+  plane[3].dcdy = -1 << 8;
+  plane[3].c = (bbox.y1+1) << 8;
   plane[3].eo = 0;
}
 
diff --git a/src/gallium/drivers/llvmpipe/lp_setup_tri.c 
b/src/gallium/drivers/llvmpipe/lp_setup_tri.c
index fefd1c1..5ad4ac1 100644
--- a/src/gallium/drivers/llvmpipe/lp_setup_tri.c
+++ b/src/gallium/drivers/llvmpipe/lp_setup_tri.c
@@ -576,24 +576,24 @@ do_triangle_ccw(struct lp_setup_context *setup,
if (nr_planes == 7) {
   const struct u_rect *scissor = >scissors[viewport_index];
 
-  plane[3].dcdx = -1;
+  plane[3].dcdx = -1 << 8;
   plane[3].dcdy = 0;
-  plane[3].c = 1-scissor->x0;
-  plane[3].eo = 1;
+  plane[3].c = (1-scissor->x0) << 8;
+  plane[3].eo = 1 << 8;
 
-  plane[4].dcdx = 1;
+  plane[4].dcdx = 1 << 8;
   plane[4].dcdy = 0;
-  plane[4].c = scissor->x1+1;
+  plane[4].c = (scissor->x1+1) << 8;
   plane[4].eo = 0;
 
   plane[5].dcdx = 0;
-  plane[5].dcdy = 1;
-  plane[5].c = 1-scissor->y0;
-  plane[5].eo = 1;
+  plane[5].dcdy = 1 << 8;
+  plane[5].c = (1-scissor->y0) << 8;
+  plane[5].eo = 1 << 8;
 
   plane[6].dcdx = 0;
-  plane[6].dcdy = -1;
-  plane[6].c = scissor->y1+1;
+  plane[6].dcdy = -1 << 8;
+  plane[6].c = (scissor->y1+1) << 8;
   plane[6].eo = 0;
}
 
-- 
2.1.4

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[Mesa-dev] [PATCH] nir: Add a lower_fdiv option, turn fdiv into fmul/frcp.

2016-01-05 Thread Kenneth Graunke

The nir_opt_algebraic rule

(('fadd', ('flog2', a), ('fneg', ('flog2', b))), ('flog2', ('fdiv', a, b))),

can produce new fdiv operations, which need to be lowered on i965,
as we don't actually implement fdiv.  (Normally, we handle this in
GLSL IR's lower_instructions pass, but in the above case we introduce
an fdiv after that point.  So, make NIR do it for us.)

Signed-off-by: Kenneth Graunke 
Cc: mesa-sta...@lists.freedesktop.org
---
 src/glsl/nir/nir.h   | 1 +
 src/glsl/nir/nir_opt_algebraic.py| 1 +
 src/mesa/drivers/dri/i965/brw_shader.cpp | 1 +
 3 files changed, 3 insertions(+)

diff --git a/src/glsl/nir/nir.h b/src/glsl/nir/nir.h
index 4286738..fed8a97 100644
--- a/src/glsl/nir/nir.h
+++ b/src/glsl/nir/nir.h
@@ -1440,6 +1440,7 @@ typedef struct nir_function {
 } nir_function;
 
 typedef struct nir_shader_compiler_options {
+   bool lower_fdiv;
bool lower_ffma;
bool lower_flrp;
bool lower_fpow;
diff --git a/src/glsl/nir/nir_opt_algebraic.py 
b/src/glsl/nir/nir_opt_algebraic.py
index 1fdad3d..c553de5 100644
--- a/src/glsl/nir/nir_opt_algebraic.py
+++ b/src/glsl/nir/nir_opt_algebraic.py
@@ -183,6 +183,7 @@ optimizations = [
(('fmul', ('fexp2', a), ('fexp2', b)), ('fexp2', ('fadd', a, b))),
# Division and reciprocal
(('fdiv', 1.0, a), ('frcp', a)),
+   (('fdiv', a, b), ('fmul', a, ('frcp', b)), 'options->lower_fdiv'),
(('frcp', ('frcp', a)), a),
(('frcp', ('fsqrt', a)), ('frsq', a)),
(('fsqrt', a), ('frcp', ('frsq', a)), 'options->lower_fsqrt'),
diff --git a/src/mesa/drivers/dri/i965/brw_shader.cpp 
b/src/mesa/drivers/dri/i965/brw_shader.cpp
index d4b6410..4bd24a7 100644
--- a/src/mesa/drivers/dri/i965/brw_shader.cpp
+++ b/src/mesa/drivers/dri/i965/brw_shader.cpp
@@ -97,6 +97,7 @@ brw_compiler_create(void *mem_ctx, const struct 
brw_device_info *devinfo)
nir_shader_compiler_options *nir_options =
   rzalloc(compiler, nir_shader_compiler_options);
nir_options->native_integers = true;
+   nir_options->lower_fdiv = true;
/* In order to help allow for better CSE at the NIR level we tell NIR
 * to split all ffma instructions during opt_algebraic and we then
 * re-combine them as a later step.
-- 
2.6.4

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Re: [Mesa-dev] [PATCH] nir: Add a lower_fdiv option, turn fdiv into fmul/frcp.

2016-01-05 Thread Jason Ekstrand

Reviewed-by: Jason Ekstrand 

On Tue, Jan 5, 2016 at 4:25 PM, Kenneth Graunke 
wrote:

> The nir_opt_algebraic rule
>
> (('fadd', ('flog2', a), ('fneg', ('flog2', b))), ('flog2', ('fdiv', a,
> b))),
>
> can produce new fdiv operations, which need to be lowered on i965,
> as we don't actually implement fdiv.  (Normally, we handle this in
> GLSL IR's lower_instructions pass, but in the above case we introduce
> an fdiv after that point.  So, make NIR do it for us.)
>
> Signed-off-by: Kenneth Graunke 
> Cc: mesa-sta...@lists.freedesktop.org
> ---
>  src/glsl/nir/nir.h   | 1 +
>  src/glsl/nir/nir_opt_algebraic.py| 1 +
>  src/mesa/drivers/dri/i965/brw_shader.cpp | 1 +
>  3 files changed, 3 insertions(+)
>
> diff --git a/src/glsl/nir/nir.h b/src/glsl/nir/nir.h
> index 4286738..fed8a97 100644
> --- a/src/glsl/nir/nir.h
> +++ b/src/glsl/nir/nir.h
> @@ -1440,6 +1440,7 @@ typedef struct nir_function {
>  } nir_function;
>
>  typedef struct nir_shader_compiler_options {
> +   bool lower_fdiv;
> bool lower_ffma;
> bool lower_flrp;
> bool lower_fpow;
> diff --git a/src/glsl/nir/nir_opt_algebraic.py
> b/src/glsl/nir/nir_opt_algebraic.py
> index 1fdad3d..c553de5 100644
> --- a/src/glsl/nir/nir_opt_algebraic.py
> +++ b/src/glsl/nir/nir_opt_algebraic.py
> @@ -183,6 +183,7 @@ optimizations = [
> (('fmul', ('fexp2', a), ('fexp2', b)), ('fexp2', ('fadd', a, b))),
> # Division and reciprocal
> (('fdiv', 1.0, a), ('frcp', a)),
> +   (('fdiv', a, b), ('fmul', a, ('frcp', b)), 'options->lower_fdiv'),
> (('frcp', ('frcp', a)), a),
> (('frcp', ('fsqrt', a)), ('frsq', a)),
> (('fsqrt', a), ('frcp', ('frsq', a)), 'options->lower_fsqrt'),
> diff --git a/src/mesa/drivers/dri/i965/brw_shader.cpp
> b/src/mesa/drivers/dri/i965/brw_shader.cpp
> index d4b6410..4bd24a7 100644
> --- a/src/mesa/drivers/dri/i965/brw_shader.cpp
> +++ b/src/mesa/drivers/dri/i965/brw_shader.cpp
> @@ -97,6 +97,7 @@ brw_compiler_create(void *mem_ctx, const struct
> brw_device_info *devinfo)
> nir_shader_compiler_options *nir_options =
>rzalloc(compiler, nir_shader_compiler_options);
> nir_options->native_integers = true;
> +   nir_options->lower_fdiv = true;
> /* In order to help allow for better CSE at the NIR level we tell NIR
>  * to split all ffma instructions during opt_algebraic and we then
>  * re-combine them as a later step.
> --
> 2.6.4
>
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Re: [Mesa-dev] [PATCH 2/2] glsl: Relax ir_quadop_bitfield_insert type restrictions.

2016-01-05 Thread Ilia Mirkin

On Tue, Jan 5, 2016 at 8:34 AM, Kenneth Graunke  wrote:
> While GLSL restricts bitfieldInsert's offset and bits parameters to
> be scalars, we shouldn't require this in the IR.
>
> In particular, opt_vectorize() tries to combine
>
> result.x = bitfieldInsert(src0.x, src1.x, src2.x, src3.x);
> result.y = bitfieldInsert(src0.y, src1.y, src2.y, src3.y);
> result.z = bitfieldInsert(src0.z, src1.z, src2.z, src3.z);
> result.w = bitfieldInsert(src0.w, src1.w, src2.w, src3.w);
>
> into a single ivec4 bitfieldInsert operation.  This currently breaks,
> because the last two types become ivec4 rather than int.  It seems
> perfectly reasonable to allow this.
>
> i965 lowers ir_quadop_bitfield_insert to ir_binop_bfm and ir_triop_bfi,
> which already lift these restrictions.
>
> (I debated about using is_integer() or base_type == GLSL_TYPE_INT here;
> I ended up relaxing it to allow either int/uint because ir_binop_bfm
> and ir_triop_bfi do that already.)
>
> Fixes assertion failures when compiling Shadow of Mordor vertex shaders
> on i965 in vec4 mode (where OptimizeForAOS enables opt_vectorize()).
>
> Signed-off-by: Kenneth Graunke 
> Cc: Matt Turner 
> Cc: mesa-sta...@lists.freedesktop.org
> ---
>  src/glsl/ir_validate.cpp | 4 ++--
>  1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/src/glsl/ir_validate.cpp b/src/glsl/ir_validate.cpp
> index dcc079c..b5eaaff 100644
> --- a/src/glsl/ir_validate.cpp
> +++ b/src/glsl/ir_validate.cpp
> @@ -661,8 +661,8 @@ ir_validate::visit_leave(ir_expression *ir)
> case ir_quadop_bitfield_insert:
>assert(ir->operands[0]->type == ir->type);
>assert(ir->operands[1]->type == ir->type);
> -  assert(ir->operands[2]->type == glsl_type::int_type);
> -  assert(ir->operands[3]->type == glsl_type::int_type);
> +  assert(ir->operands[2]->type->is_integer());
> +  assert(ir->operands[3]->type->is_integer());

I thought a bit more about this, and I think you need to check that
->vector_elements matches up, or is 1 -- you wouldn't want to allow
mixing a vec4 and vec2, for example. Not that anything would generate
that, but the point of these checks is to be strict about allowed
things.

As for int vs uint... meh. Don't care either way.

  -ilia
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Re: [Mesa-dev] [PATCH v2 5/5] llvmpipe: Optimize lp_rast_triangle_32_3_16 for POWER8

2016-01-05 Thread Roland Scheidegger

Am 03.01.2016 um 16:17 schrieb Oded Gabbay:
> This patch converts the SSE-optimized lp_rast_triangle_32_3_16()
> to VMX/VSX.
> 
> I measured the results on POWER8 machine with 32 cores at 3.4GHz and
> 16GB of RAM.
> 
>   FPS/Score
>  NameBefore AfterDelta
> 
> openarena16.35  16.7 2.14%
> xonotic  4.707  4.97 5.57%
> 
> glmark2 didn't show a significant (more than 1%) difference.
> 
> v2: Make sure code is build only on POWER8 LE machine
> 
> Signed-off-by: Oded Gabbay 
> ---
>  src/gallium/drivers/llvmpipe/lp_rast_tri.c | 142 
> -
>  1 file changed, 141 insertions(+), 1 deletion(-)
> 
> diff --git a/src/gallium/drivers/llvmpipe/lp_rast_tri.c 
> b/src/gallium/drivers/llvmpipe/lp_rast_tri.c
> index 09a182a..232c859 100644
> --- a/src/gallium/drivers/llvmpipe/lp_rast_tri.c
> +++ b/src/gallium/drivers/llvmpipe/lp_rast_tri.c
> @@ -512,7 +512,145 @@ build_mask_linear_32(int c, int dcdx, int dcdy)
> return vec_movemask_epi8(result);
>  }
>  
> -#endif /* _ARCH_PWR8 && PIPE_ARCH_LITTLE_ENDIAN */
> +static inline __m128i
> +lp_plane_to_m128i(const struct lp_rast_plane *plane)
> +{
> +   return vec_setr_epi32((int32_t)plane->c, (int32_t)plane->dcdx,
> + (int32_t)plane->dcdy, (int32_t)plane->eo);
> +}
> +
> +#define NR_PLANES 3
> +
> +void
> +lp_rast_triangle_32_3_16(struct lp_rasterizer_task *task,
> +  const union lp_rast_cmd_arg arg)
> +{
> +   const struct lp_rast_triangle *tri = arg.triangle.tri;
> +   const struct lp_rast_plane *plane = GET_PLANES(tri);
> +   int x = (arg.triangle.plane_mask & 0xff) + task->x;
> +   int y = (arg.triangle.plane_mask >> 8) + task->y;
> +   unsigned i, j;
> +
> +   struct { unsigned mask:16; unsigned i:8; unsigned j:8; } out[16];
> +   unsigned nr = 0;
> +
> +   __m128i p0 = lp_plane_to_m128i([0]); /* c, dcdx, dcdy, eo */
> +   __m128i p1 = lp_plane_to_m128i([1]); /* c, dcdx, dcdy, eo */
> +   __m128i p2 = lp_plane_to_m128i([2]); /* c, dcdx, dcdy, eo */
> +   __m128i zero = vec_splats((unsigned char) 0);
> +
> +   __m128i c;
> +   __m128i dcdx;
> +   __m128i dcdy;
> +   __m128i rej4;
> +
> +   __m128i dcdx2;
> +   __m128i dcdx3;
> +
> +   __m128i span_0;/* 0,dcdx,2dcdx,3dcdx for plane 0 */
> +   __m128i span_1;/* 0,dcdx,2dcdx,3dcdx for plane 1 */
> +   __m128i span_2;/* 0,dcdx,2dcdx,3dcdx for plane 2 */
> +   __m128i unused;
> +
> +   __m128i vshuf_mask0;
> +   __m128i vshuf_mask1;
> +   __m128i vshuf_mask2;
> +
> +#ifdef PIPE_ARCH_LITTLE_ENDIAN
> +   vshuf_mask0 = (__m128i) vec_splats((unsigned int) 0x03020100);
> +   vshuf_mask1 = (__m128i) vec_splats((unsigned int) 0x07060504);
> +   vshuf_mask2 = (__m128i) vec_splats((unsigned int) 0x0B0A0908);
> +#else
> +   vshuf_mask0 = (__m128i) vec_splats((unsigned int) 0x0C0D0E0F);
> +   vshuf_mask1 = (__m128i) vec_splats((unsigned int) 0x08090A0B);
> +   vshuf_mask2 = (__m128i) vec_splats((unsigned int) 0x04050607);
> +#endif
> +
> +   transpose4_epi32(, , , ,
> +, , , );
> +
> +   /* Adjust dcdx;
> +*/
> +   dcdx = vec_sub_epi32(zero, dcdx);
> +
> +   c = vec_add_epi32(c, vec_mullo_epi32(dcdx, (__m128i) vec_splats(x)));
> +   c = vec_add_epi32(c, vec_mullo_epi32(dcdy, (__m128i) vec_splats(y)));
> +   rej4 = vec_slli_epi32(rej4, 2);
> +
> +   /*
> +* Adjust so we can just check the sign bit (< 0 comparison),
> +* instead of having to do a less efficient <= 0 comparison
> +*/
> +   c = vec_sub_epi32(c, (__m128i) vec_splats((unsigned int) 1));
> +   rej4 = vec_add_epi32(rej4, (__m128i) vec_splats((unsigned int) 1));
> +
> +   dcdx2 = vec_add_epi32(dcdx, dcdx);
> +   dcdx3 = vec_add_epi32(dcdx2, dcdx);
> +
> +   transpose4_epi32(, , , ,
> +_0, _1, _2, );
> +
> +   for (i = 0; i < 4; i++) {
> +  __m128i cx = c;
> +
> +  for (j = 0; j < 4; j++) {
> + __m128i c4rej = vec_add_epi32(cx, rej4);
> + __m128i rej_masks = vec_srai_epi32(c4rej, 31);
> +
> + /* if (is_zero(rej_masks)) */
> + if (vec_movemask_epi8(rej_masks) == 0) {
> +__m128i c0_0 = vec_add_epi32(vec_perm(cx, cx, vshuf_mask0), 
> span_0);
> +__m128i c1_0 = vec_add_epi32(vec_perm(cx, cx, vshuf_mask1), 
> span_1);
> +__m128i c2_0 = vec_add_epi32(vec_perm(cx, cx, vshuf_mask2), 
> span_2);
> +
> +__m128i c_0 = vec_or(vec_or(c0_0, c1_0), c2_0);
> +
> +__m128i c0_1 = vec_add_epi32(c0_0, vec_perm(dcdy, dcdy, 
> vshuf_mask0));
> +__m128i c1_1 = vec_add_epi32(c1_0, vec_perm(dcdy, dcdy, 
> vshuf_mask1));
> +__m128i c2_1 = vec_add_epi32(c2_0, vec_perm(dcdy, dcdy, 
> vshuf_mask2));
> +
> +__m128i c_1 = vec_or(vec_or(c0_1, c1_1), c2_1);
> +__m128i c_01 = vec_packs_epi32(c_0, c_1);
> +
> +__m128i c0_2 = vec_add_epi32(c0_1,

[Mesa-dev] [Bug 27512] Illegal instruction _mesa_x86_64_transform_points4_general

2016-01-05 Thread bugzilla-daemon

https://bugs.freedesktop.org/show_bug.cgi?id=27512

--- Comment #10 from Patrick Baggett  ---
Given that there is a _mesa_3dnow_transform_points4_2d in the x86-64 asm
(using MMX/3DNow! is deprecated in x86-64), it appears that this code was
copy-pasted. I wrote a quick patch to change prefetch[w] to prefetcht1,
which is more or less the equivalent in SSE. However, I'm not actually sure
those prefetches really benefit the code since they appear to be monotonic
addresses and hinting only 16 bytes ahead (a cache line is almost always at
least 32 bytes) -- maybe that sort of testing is for another day.

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Re: [Mesa-dev] [PATCH 01/28] glsl: only add outward facing varyings to resourse list for SSO

2016-01-05 Thread Anuj Phogat

On Mon, Dec 28, 2015 at 9:00 PM, Timothy Arceri
 wrote:
> An SSO program can have multiple stages and we only want to add the externally
> facing varyings. The current code was adding both the packed inputs and 
> outputs
> for the first and last stage of each program.
> ---
>  src/glsl/linker.cpp | 17 ++---
>  1 file changed, 10 insertions(+), 7 deletions(-)
>
> diff --git a/src/glsl/linker.cpp b/src/glsl/linker.cpp
> index c7e6976..d11c404 100644
> --- a/src/glsl/linker.cpp
> +++ b/src/glsl/linker.cpp
> @@ -3433,7 +3433,7 @@ add_interface_variables(struct gl_shader_program 
> *shProg,
>  }
>
>  static bool
> -add_packed_varyings(struct gl_shader_program *shProg, int stage)
> +add_packed_varyings(struct gl_shader_program *shProg, int stage, GLenum type)
>  {
> struct gl_shader *sh = shProg->_LinkedShaders[stage];
> GLenum iface;
> @@ -3454,10 +3454,13 @@ add_packed_varyings(struct gl_shader_program *shProg, 
> int stage)
>   default:
>  unreachable("unexpected type");
>   }
> - if (!add_program_resource(shProg, iface, var,
> -   build_stageref(shProg, var->name,
> -  var->data.mode)))
> -return false;
> +
> + if (type == iface) {
> +if (!add_program_resource(shProg, iface, var,
> +  build_stageref(shProg, var->name,
> + var->data.mode)))
> +   return false;
> + }
>}
> }
> return true;
> @@ -3724,9 +3727,9 @@ build_program_resource_list(struct gl_shader_program 
> *shProg)
>
> /* Program interface needs to expose varyings in case of SSO. */
> if (shProg->SeparateShader) {
> -  if (!add_packed_varyings(shProg, input_stage))
> +  if (!add_packed_varyings(shProg, input_stage, GL_PROGRAM_INPUT))
>   return;
> -  if (!add_packed_varyings(shProg, output_stage))
> +  if (!add_packed_varyings(shProg, output_stage, GL_PROGRAM_OUTPUT))
>   return;
> }
>
> --
> 2.4.3
>
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Re: [Mesa-dev] [PATCH V2] mesa: fix GL_MAX_NAME_LENGTH query for tessellation shaders

2016-01-05 Thread Marek Olšák

Negating that expression would make it more readable. There are also a
lot of unnecessary parentheses. If you at least remove the
parentheses:

Reviewed-by: Marek Olšák 

Marek

On Tue, Jan 5, 2016 at 11:23 PM, Timothy Arceri
 wrote:
> ping
>
> This fixes some piglit subtests for ARB_program_interface_query.
>
>
> On Thu, 2015-12-24 at 13:16 +1100, Timothy Arceri wrote:
>> V2: fix alignment
>> ---
>>  src/mesa/main/shader_query.cpp | 7 ++-
>>  1 file changed, 6 insertions(+), 1 deletion(-)
>>
>> diff --git a/src/mesa/main/shader_query.cpp
>> b/src/mesa/main/shader_query.cpp
>> index a1813ac..3a730af 100644
>> --- a/src/mesa/main/shader_query.cpp
>> +++ b/src/mesa/main/shader_query.cpp
>> @@ -765,7 +765,12 @@ static bool
>>  add_index_to_name(struct gl_program_resource *res)
>>  {
>> bool add_index = !(((res->Type == GL_PROGRAM_INPUT) &&
>> -   res->StageReferences & (1 <<
>> MESA_SHADER_GEOMETRY)));
>> +res->StageReferences &
>> +((1 << MESA_SHADER_GEOMETRY) |
>> + (1 << MESA_SHADER_TESS_CTRL) |
>> + (1 << MESA_SHADER_TESS_EVAL))) ||
>> +  ((res->Type == GL_PROGRAM_OUTPUT) &&
>> +res->StageReferences & (1 <<
>> MESA_SHADER_TESS_CTRL)));
>>
>> /* Transform feedback varyings have array index already appended
>>  * in their names.
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Re: [Mesa-dev] [PATCH 02/28] glsl: move lowering after matching validation

2016-01-05 Thread Anuj Phogat

On Mon, Dec 28, 2015 at 9:00 PM, Timothy Arceri
 wrote:
> After lowering the matching flag is_unmatched_generic_inout is lost so
> we need to move this validation before lowering.
> ---
>  src/glsl/link_varyings.cpp | 22 +++---
>  1 file changed, 11 insertions(+), 11 deletions(-)
>
> diff --git a/src/glsl/link_varyings.cpp b/src/glsl/link_varyings.cpp
> index 9cc77fe..9fe05ca 100644
> --- a/src/glsl/link_varyings.cpp
> +++ b/src/glsl/link_varyings.cpp
> @@ -1640,17 +1640,6 @@ assign_varying_locations(struct gl_context *ctx,
> hash_table_dtor(consumer_inputs);
> hash_table_dtor(consumer_interface_inputs);
>
> -   if (!disable_varying_packing) {
> -  if (producer) {
> - lower_packed_varyings(mem_ctx, slots_used, ir_var_shader_out,
> -   0, producer);
> -  }
> -  if (consumer) {
> - lower_packed_varyings(mem_ctx, slots_used, ir_var_shader_in,
> -   consumer_vertices, consumer);
> -  }
> -   }
> -
> if (consumer && producer) {
>foreach_in_list(ir_instruction, node, consumer->ir) {
>   ir_variable *const var = node->as_variable();
> @@ -1700,6 +1689,17 @@ assign_varying_locations(struct gl_context *ctx,
>}
> }
>
> +   if (!disable_varying_packing) {
> +  if (producer) {
> + lower_packed_varyings(mem_ctx, slots_used, ir_var_shader_out,
> +   0, producer);
> +  }
> +  if (consumer) {
> + lower_packed_varyings(mem_ctx, slots_used, ir_var_shader_in,
> +   consumer_vertices, consumer);
> +  }
> +   }
> +
> return true;
>  }
>
> --
> 2.4.3
>
> ___
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LGTM.
Reviewed-by: Anuj Phogat 

Do we have a piglit test hitting this code?
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Re: [Mesa-dev] [PATCH 03/28] glsl: don't change the varying type in validation code

2016-01-05 Thread Anuj Phogat

On Mon, Dec 28, 2015 at 9:00 PM, Timothy Arceri
 wrote:
> There is a function dedicated to demoting unused varyings lets
> trust it to do its job.
> ---
>  src/glsl/link_varyings.cpp | 5 -
>  1 file changed, 5 deletions(-)
>
> diff --git a/src/glsl/link_varyings.cpp b/src/glsl/link_varyings.cpp
> index 9fe05ca..961c3d7 100644
> --- a/src/glsl/link_varyings.cpp
> +++ b/src/glsl/link_varyings.cpp
> @@ -1680,11 +1680,6 @@ assign_varying_locations(struct gl_context *ctx,
> var->name,
>  _mesa_shader_stage_to_string(producer->Stage));
>  }
> -
> -/* An 'in' variable is only really a shader input if its
> - * value is written by the previous stage.
> - */
> -var->data.mode = ir_var_auto;
>   }
>}
> }
> --
> 2.4.3
>
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Re: [Mesa-dev] [PATCH 1/6] gallium: Remove unnecessary semicolons

2016-01-05 Thread Brian Paul


Series looks OK to me.  Reviewed-by: Brian Paul 

Do you need someone to commit/push for you?

-Brian

On 01/05/2016 03:07 AM, Edward O'Callaghan wrote:

Fix silly issue with MSVC case fall-though support to need
a extra 'break;'

Found-by: Coccinelle
Signed-off-by: Edward O'Callaghan 
Reviewed-by: Brian Paul 
---
  src/gallium/auxiliary/draw/draw_pipe_aaline.c  | 2 +-
  src/gallium/auxiliary/gallivm/lp_bld_swizzle.c | 2 +-
  src/gallium/auxiliary/nir/tgsi_to_nir.c| 2 +-
  src/gallium/auxiliary/util/u_surface.c | 3 ++-
  src/gallium/auxiliary/vl/vl_mpeg12_decoder.c   | 2 +-
  src/gallium/state_trackers/nine/swapchain9.c   | 2 +-
  src/gallium/state_trackers/omx/entrypoint.c| 2 +-
  src/gallium/state_trackers/vdpau/mixer.c   | 2 +-
  8 files changed, 9 insertions(+), 8 deletions(-)

diff --git a/src/gallium/auxiliary/draw/draw_pipe_aaline.c 
b/src/gallium/auxiliary/draw/draw_pipe_aaline.c
index 3ce550a..e85ae16 100644
--- a/src/gallium/auxiliary/draw/draw_pipe_aaline.c
+++ b/src/gallium/auxiliary/draw/draw_pipe_aaline.c
@@ -938,7 +938,7 @@ draw_aaline_prepare_outputs(struct draw_context *draw,
 const struct pipe_rasterizer_state *rast = draw->rasterizer;

 /* update vertex attrib info */
-   aaline->pos_slot = draw_current_shader_position_output(draw);;
+   aaline->pos_slot = draw_current_shader_position_output(draw);

 if (!rast->line_smooth)
return;
diff --git a/src/gallium/auxiliary/gallivm/lp_bld_swizzle.c 
b/src/gallium/auxiliary/gallivm/lp_bld_swizzle.c
index b1aef71..f571838 100644
--- a/src/gallium/auxiliary/gallivm/lp_bld_swizzle.c
+++ b/src/gallium/auxiliary/gallivm/lp_bld_swizzle.c
@@ -720,7 +720,7 @@ lp_build_transpose_aos_n(struct gallivm_state *gallivm,

default:
   assert(0);
-   };
+   }
  }


diff --git a/src/gallium/auxiliary/nir/tgsi_to_nir.c 
b/src/gallium/auxiliary/nir/tgsi_to_nir.c
index 94d992b..7c57759 100644
--- a/src/gallium/auxiliary/nir/tgsi_to_nir.c
+++ b/src/gallium/auxiliary/nir/tgsi_to_nir.c
@@ -1950,7 +1950,7 @@ tgsi_processor_to_shader_stage(unsigned processor)
 case TGSI_PROCESSOR_COMPUTE:   return MESA_SHADER_COMPUTE;
 default:
unreachable("invalid TGSI processor");
-   };
+   }
  }

  struct nir_shader *
diff --git a/src/gallium/auxiliary/util/u_surface.c 
b/src/gallium/auxiliary/util/u_surface.c
index 6aa44f9..c150d92 100644
--- a/src/gallium/auxiliary/util/u_surface.c
+++ b/src/gallium/auxiliary/util/u_surface.c
@@ -600,7 +600,8 @@ is_box_inside_resource(const struct pipe_resource *res,
depth = res->array_size;
assert(res->array_size % 6 == 0);
break;
-   case PIPE_MAX_TEXTURE_TYPES:;
+   case PIPE_MAX_TEXTURE_TYPES:
+  break;
 }

 return box->x >= 0 &&
diff --git a/src/gallium/auxiliary/vl/vl_mpeg12_decoder.c 
b/src/gallium/auxiliary/vl/vl_mpeg12_decoder.c
index f5bb3a0..b5c7045 100644
--- a/src/gallium/auxiliary/vl/vl_mpeg12_decoder.c
+++ b/src/gallium/auxiliary/vl/vl_mpeg12_decoder.c
@@ -792,7 +792,7 @@ vl_mpeg12_end_frame(struct pipe_video_codec *decoder,
for (j = 0; j < VL_MAX_REF_FRAMES; ++j) {
   if (!ref_frames[j] || !ref_frames[j][i]) continue;

- vb[2] = vl_vb_get_mv(>vertex_stream, j);;
+ vb[2] = vl_vb_get_mv(>vertex_stream, j);
   dec->context->set_vertex_buffers(dec->context, 0, 3, vb);

   vl_mc_render_ref(i ? >mc_c : >mc_y, >mc[i], 
ref_frames[j][i]);
diff --git a/src/gallium/state_trackers/nine/swapchain9.c 
b/src/gallium/state_trackers/nine/swapchain9.c
index 3f5be26..3b1a7a4 100644
--- a/src/gallium/state_trackers/nine/swapchain9.c
+++ b/src/gallium/state_trackers/nine/swapchain9.c
@@ -790,7 +790,7 @@ NineSwapChain9_Present( struct NineSwapChain9 *This,
  case D3DSWAPEFFECT_FLIP:
  UNTESTED(4);
  case D3DSWAPEFFECT_DISCARD:
-/* rotate the queue */;
+/* rotate the queue */
  pipe_resource_reference(, This->buffers[0]->base.resource);
  for (i = 1; i <= This->params.BackBufferCount; i++) {
  NineSurface9_SetResourceResize(This->buffers[i - 1],
diff --git a/src/gallium/state_trackers/omx/entrypoint.c 
b/src/gallium/state_trackers/omx/entrypoint.c
index da9ca10..afcbd97 100644
--- a/src/gallium/state_trackers/omx/entrypoint.c
+++ b/src/gallium/state_trackers/omx/entrypoint.c
@@ -137,7 +137,7 @@ OMX_ERRORTYPE omx_workaround_Destructor(OMX_COMPONENTTYPE 
*comp)
 priv->state = OMX_StateInvalid;
 tsem_up(priv->messageSem);

-   /* wait for thread to exit */;
+   /* wait for thread to exit */
 pthread_join(priv->messageHandlerThread, NULL);

 return omx_base_component_Destructor(comp);
diff --git a/src/gallium/state_trackers/vdpau/mixer.c 
b/src/gallium/state_trackers/vdpau/mixer.c
index c0b1ecc..dec79ff 100644
--- a/src/gallium/state_trackers/vdpau/mixer.c
+++ b/src/gallium/state_trackers/vdpau/mixer.c
@@ -294,7 +294,7 @@

[Mesa-dev] [Bug 93003] mesa 11.x with vmwgfx (vmware Fusion 8.x) graphical corruption under gnome-shell on GTK applications.

2016-01-05 Thread bugzilla-daemon

https://bugs.freedesktop.org/show_bug.cgi?id=93003

Sinclair Yeh  changed:

   What|Removed |Added

 CC||s...@vmware.com

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Re: [Mesa-dev] [PATCH 04/28] glsl: remove unused varyings before packing them

2016-01-05 Thread Anuj Phogat

On Mon, Dec 28, 2015 at 9:00 PM, Timothy Arceri
 wrote:
> Previously we would pack varyings before trying to remove them, this
> relied on the packing pass not packing varyings with a location of -1
> to avoid packing varyings that should be removed.
> However this meant unused varyings with an explicit location would been
> packed before they could be removed when we enable packing of them in a
> later patch.
>
> V2: fix regression in V1 removing unused varyings in multi-stage SSO,
> fix regression with single stage programs.
> ---
>  src/glsl/link_varyings.cpp | 45 +++
>  src/glsl/link_varyings.h   |  5 +
>  src/glsl/linker.cpp| 52 
> --
>  3 files changed, 54 insertions(+), 48 deletions(-)
>
> diff --git a/src/glsl/link_varyings.cpp b/src/glsl/link_varyings.cpp
> index 961c3d7..2ff4552 100644
> --- a/src/glsl/link_varyings.cpp
> +++ b/src/glsl/link_varyings.cpp
> @@ -309,6 +309,41 @@ cross_validate_outputs_to_inputs(struct 
> gl_shader_program *prog,
> }
>  }
>
> +/**
> + * Demote shader inputs and outputs that are not used in other stages, and
> + * remove them via dead code elimination.
> + */
> +void
> +remove_unused_shader_inputs_and_outputs(bool is_separate_shader_object,
> +gl_shader *sh,
> +enum ir_variable_mode mode)
> +{
> +   if (is_separate_shader_object)
> +  return;
> +
> +   foreach_in_list(ir_instruction, node, sh->ir) {
> +  ir_variable *const var = node->as_variable();
> +
> +  if ((var == NULL) || (var->data.mode != int(mode)))
> +continue;
> +
> +  /* A shader 'in' or 'out' variable is only really an input or output if
> +   * its value is used by other shader stages. This will cause the
> +   * variable to have a location assigned.
> +   */
> +  if (var->data.is_unmatched_generic_inout) {
> + assert(var->data.mode != ir_var_temporary);
> +var->data.mode = ir_var_auto;
> +  }
> +   }
> +
> +   /* Eliminate code that is now dead due to unused inputs/outputs being
> +* demoted.
> +*/
> +   while (do_dead_code(sh->ir, false))
> +  ;
> +
> +}
>
>  /**
>   * Initialize this object based on a string that was passed to
> @@ -1682,6 +1717,16 @@ assign_varying_locations(struct gl_context *ctx,
>  }
>   }
>}
> +
> +  /* Now that validation is done its safe to remove unused varyings. As
> +   * we have both a producer and consumer its safe to remove unused
> +   * varyings even if the program is a SSO because the stages are being
> +   * linked together i.e. we have a multi-stage SSO.
> +   */
> +  remove_unused_shader_inputs_and_outputs(false, producer,
> +  ir_var_shader_out);
> +  remove_unused_shader_inputs_and_outputs(false, consumer,
> +  ir_var_shader_in);
> }
>
> if (!disable_varying_packing) {
> diff --git a/src/glsl/link_varyings.h b/src/glsl/link_varyings.h
> index 1d12978..b2812614 100644
> --- a/src/glsl/link_varyings.h
> +++ b/src/glsl/link_varyings.h
> @@ -268,6 +268,11 @@ parse_tfeedback_decls(struct gl_context *ctx, struct 
> gl_shader_program *prog,
>const void *mem_ctx, unsigned num_names,
>char **varying_names, tfeedback_decl *decls);
>
> +void
> +remove_unused_shader_inputs_and_outputs(bool is_separate_shader_object,
> +gl_shader *sh,
> +enum ir_variable_mode mode);
> +
>  bool
>  store_tfeedback_info(struct gl_context *ctx, struct gl_shader_program *prog,
>   unsigned num_tfeedback_decls,
> diff --git a/src/glsl/linker.cpp b/src/glsl/linker.cpp
> index d11c404..31d55e3 100644
> --- a/src/glsl/linker.cpp
> +++ b/src/glsl/linker.cpp
> @@ -2723,30 +2723,6 @@ match_explicit_outputs_to_inputs(struct 
> gl_shader_program *prog,
>  }
>
>  /**
> - * Demote shader inputs and outputs that are not used in other stages
> - */
> -void
> -demote_shader_inputs_and_outputs(gl_shader *sh, enum ir_variable_mode mode)
> -{
> -   foreach_in_list(ir_instruction, node, sh->ir) {
> -  ir_variable *const var = node->as_variable();
> -
> -  if ((var == NULL) || (var->data.mode != int(mode)))
> -continue;
> -
> -  /* A shader 'in' or 'out' variable is only really an input or output if
> -   * its value is used by other shader stages.  This will cause the 
> variable
> -   * to have a location assigned.
> -   */
> -  if (var->data.is_unmatched_generic_inout) {
> - assert(var->data.mode != ir_var_temporary);
> -var->data.mode = ir_var_auto;
> -  }
> -   }
> -}
> -
> -
> -/**
>   * Store the gl_FragDepth layout in the gl_shader_program struct.
>   */
>  static void
> @@ -4446,14

Re: [Mesa-dev] [PATCH shader-db] si-report: Track max waves per CU

2016-01-05 Thread Marek Olšák

Hi,

I'd like us to do this computation in Mesa, because it can be more
accurate there. The pixel shader wave count depends heavily on LDS,
because each interpolated input occupies 12 dwords of LDS per
primitive and there can be 1-16 primitives per wave. With 32 inputs
and 16 primitives, you can get 6144 dwords of LDS per wave and this is
without the extra LDS storage needed by derivatives. In a nutshell,
you need to know the number of interpolated inputs, then you can
compute the best case (1 primitive) scenario and the worst case (16
primitives).

Marek

On Tue, Jan 5, 2016 at 1:21 AM, Tom Stellard  wrote:
> ---
>  si-report.py | 56 ++--
>  1 file changed, 54 insertions(+), 2 deletions(-)
>
> diff --git a/si-report.py b/si-report.py
> index ec88112..e717af0 100755
> --- a/si-report.py
> +++ b/si-report.py
> @@ -65,6 +65,12 @@ def get_scratch_str(value, suffixes = True):
>  suffix = 'bytes per wave'
>  return get_value_str(value, 'Scratch', suffix)
>
> +def get_waves_per_cu_str(value, suffixes = True):
> +suffix = ''
> +if suffixes:
> +suffix = 'waves'
> +return get_value_str(value, 'Max Waves / CU', suffix)
> +
>  def calculate_percent_change(b, a):
>  if b == 0:
>  return 0
> @@ -89,15 +95,17 @@ class si_stats:
>  self.code_size = 0
>  self.lds = 0
>  self.scratch = 0
> +self.max_waves_per_cu = 0
>
>
>  def to_string(self, suffixes = True):
> -return "{}{}{}{}{}".format(
> +return "{}{}{}{}{}{}".format(
>  get_sgpr_str(self.sgprs, suffixes),
>  get_vgpr_str(self.vgprs, suffixes),
>  get_code_size_str(self.code_size, suffixes),
>  get_lds_str(self.lds, suffixes),
> -get_scratch_str(self.scratch, suffixes))
> +get_scratch_str(self.scratch, suffixes),
> +get_waves_per_cu_str(self.max_waves_per_cu, suffixes))
>
>
>  def __str__(self):
> @@ -109,6 +117,7 @@ class si_stats:
>  self.code_size += other.code_size
>  self.lds += other.lds
>  self.scratch += other.scratch
> +self.max_waves_per_cu += other.max_waves_per_cu
>
>  def update(self, comp, cmp_fn):
>  for name in self.__dict__.keys():
> @@ -153,6 +162,48 @@ class si_stats:
>  return False
>  return True
>
> +#TODO: Handle VI+ and take LDS into account.
> +def compute_max_waves_per_cu(sgprs, vgprs):
> +sgpr_waves = 10
> +if sgprs <= 48:
> +sgpr_waves = 10
> +elif sgprs <= 56:
> +sgpr_waves = 9
> +elif sgprs <= 64:
> +sgpr_waves = 8
> +elif sgprs <= 72:
> +sgpr_waves = 7
> +elif sgprs <= 80:
> +sgpr_waves = 6
> +elif sgprs <= 96:
> +sgpr_waves = 5
> +else:
> +sgpr_waves = 4
> +
> +vgpr_waves = 10
> +if vgprs <= 24:
> +vgpr_waves = 10
> +elif vgprs <= 28:
> +vgpr_waves = 9
> +elif vgprs <= 32:
> +vgpr_waves = 8
> +elif vgprs <= 36:
> +vgpr_waves = 7
> +elif vgprs <= 40:
> +vgpr_waves = 6
> +elif vgprs <= 48:
> +vgpr_waves = 5
> +elif vgprs <= 64:
> +vgpr_waves = 4
> +elif vgprs <= 84:
> +vgpr_waves = 3
> +elif vgprs <= 128:
> +vgpr_waves = 2
> +else:
> +vgpr_waves = 1
> +
> +return min(sgpr_waves, vgpr_waves)
> +
>  def get_results(filename):
>  file = open(filename, "r")
>  lines = file.read().split('\n')
> @@ -199,6 +250,7 @@ def get_results(filename):
>  current_stats.scratch = int(match.groups()[0])
>  continue
>
> +current_stats.max_waves_per_cu = 
> compute_max_waves_per_cu(current_stats.sgprs, current_stats.vgprs)
>  match = re.search(re_end, line)
>  if match:
>  results.append(current_stats)
> --
> 2.0.4
>
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[Mesa-dev] [PATCH 1/3] tgsi/scan: set if a fragment shader writes sample mask

2016-01-05 Thread Marek Olšák

From: Marek Olšák 

This will be used by radeonsi.
---
 src/gallium/auxiliary/tgsi/tgsi_scan.c | 2 ++
 src/gallium/auxiliary/tgsi/tgsi_scan.h | 1 +
 2 files changed, 3 insertions(+)

diff --git a/src/gallium/auxiliary/tgsi/tgsi_scan.c 
b/src/gallium/auxiliary/tgsi/tgsi_scan.c
index e04f407..e3feed9 100644
--- a/src/gallium/auxiliary/tgsi/tgsi_scan.c
+++ b/src/gallium/auxiliary/tgsi/tgsi_scan.c
@@ -392,6 +392,8 @@ tgsi_scan_shader(const struct tgsi_token *tokens,
  }
  else if (semName == TGSI_SEMANTIC_STENCIL) {
 info->writes_stencil = TRUE;
+ } else if (semName == TGSI_SEMANTIC_SAMPLEMASK) {
+info->writes_samplemask = TRUE;
  }
   }
 
diff --git a/src/gallium/auxiliary/tgsi/tgsi_scan.h 
b/src/gallium/auxiliary/tgsi/tgsi_scan.h
index 7e9a559..a3e4378 100644
--- a/src/gallium/auxiliary/tgsi/tgsi_scan.h
+++ b/src/gallium/auxiliary/tgsi/tgsi_scan.h
@@ -82,6 +82,7 @@ struct tgsi_shader_info
boolean reads_z; /**< does fragment shader read depth? */
boolean writes_z;  /**< does fragment shader write Z value? */
boolean writes_stencil; /**< does fragment shader write stencil value? */
+   boolean writes_samplemask; /**< does fragment shader write sample mask? */
boolean writes_edgeflag; /**< vertex shader outputs edgeflag */
boolean uses_kill;  /**< KILL or KILL_IF instruction used? */
boolean uses_persp_center;
-- 
2.1.4

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[Mesa-dev] [PATCH 3/3] tgsi/scan: set which color components are read by a fragment shader

2016-01-05 Thread Marek Olšák

From: Marek Olšák 

This will be used by radeonsi.
---
 src/gallium/auxiliary/tgsi/tgsi_scan.c | 30 ++
 src/gallium/auxiliary/tgsi/tgsi_scan.h |  1 +
 2 files changed, 23 insertions(+), 8 deletions(-)

diff --git a/src/gallium/auxiliary/tgsi/tgsi_scan.c 
b/src/gallium/auxiliary/tgsi/tgsi_scan.c
index e3a6fb0..6ea32ee 100644
--- a/src/gallium/auxiliary/tgsi/tgsi_scan.c
+++ b/src/gallium/auxiliary/tgsi/tgsi_scan.c
@@ -187,14 +187,28 @@ tgsi_scan_shader(const struct tgsi_token *tokens,
   }
 
   if (procType == TGSI_PROCESSOR_FRAGMENT &&
- !src->Register.Indirect &&
- info->input_semantic_name[src->Register.Index] ==
- TGSI_SEMANTIC_POSITION &&
-  (src->Register.SwizzleX == TGSI_SWIZZLE_Z ||
-   src->Register.SwizzleY == TGSI_SWIZZLE_Z ||
-   src->Register.SwizzleZ == TGSI_SWIZZLE_Z ||
-   src->Register.SwizzleW == TGSI_SWIZZLE_Z)) {
- info->reads_z = TRUE;
+  !src->Register.Indirect) {
+ unsigned name =
+info->input_semantic_name[src->Register.Index];
+ unsigned index =
+info->input_semantic_index[src->Register.Index];
+
+ if (name == TGSI_SEMANTIC_POSITION &&
+ (src->Register.SwizzleX == TGSI_SWIZZLE_Z ||
+  src->Register.SwizzleY == TGSI_SWIZZLE_Z ||
+  src->Register.SwizzleZ == TGSI_SWIZZLE_Z ||
+  src->Register.SwizzleW == TGSI_SWIZZLE_Z))
+info->reads_z = TRUE;
+
+ if (name == TGSI_SEMANTIC_COLOR) {
+unsigned mask =
+  (1 << src->Register.SwizzleX) |
+  (1 << src->Register.SwizzleY) |
+  (1 << src->Register.SwizzleZ) |
+  (1 << src->Register.SwizzleW);
+
+info->colors_read |= mask << (index * 4);
+ }
   }
}
 
diff --git a/src/gallium/auxiliary/tgsi/tgsi_scan.h 
b/src/gallium/auxiliary/tgsi/tgsi_scan.h
index a3e4378..b0b423a 100644
--- a/src/gallium/auxiliary/tgsi/tgsi_scan.h
+++ b/src/gallium/auxiliary/tgsi/tgsi_scan.h
@@ -77,6 +77,7 @@ struct tgsi_shader_info
 
uint opcode_count[TGSI_OPCODE_LAST];  /**< opcode histogram */
 
+   ubyte colors_read; /**< which color components are read by the FS */
ubyte colors_written;
boolean reads_position; /**< does fragment shader read position? */
boolean reads_z; /**< does fragment shader read depth? */
-- 
2.1.4

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[Mesa-dev] [PATCH 2/3] tgsi/scan: fix tgsi_shader_info::reads_z

2016-01-05 Thread Marek Olšák

From: Marek Olšák 

This has no users in Mesa.
---
 src/gallium/auxiliary/tgsi/tgsi_scan.c | 5 +++--
 1 file changed, 3 insertions(+), 2 deletions(-)

diff --git a/src/gallium/auxiliary/tgsi/tgsi_scan.c 
b/src/gallium/auxiliary/tgsi/tgsi_scan.c
index e3feed9..e3a6fb0 100644
--- a/src/gallium/auxiliary/tgsi/tgsi_scan.c
+++ b/src/gallium/auxiliary/tgsi/tgsi_scan.c
@@ -187,8 +187,9 @@ tgsi_scan_shader(const struct tgsi_token *tokens,
   }
 
   if (procType == TGSI_PROCESSOR_FRAGMENT &&
-  info->reads_position &&
-  src->Register.Index == 0 &&
+ !src->Register.Indirect &&
+ info->input_semantic_name[src->Register.Index] ==
+ TGSI_SEMANTIC_POSITION &&
   (src->Register.SwizzleX == TGSI_SWIZZLE_Z ||
src->Register.SwizzleY == TGSI_SWIZZLE_Z ||
src->Register.SwizzleZ == TGSI_SWIZZLE_Z ||
-- 
2.1.4

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Re: [Mesa-dev] [PATCH] nir: Add a lower_fdiv option, turn fdiv into fmul/frcp.

2016-01-05 Thread Matt Turner

Whoops. I think that was my fault.

Reviewed-by: Matt Turner 
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Re: [Mesa-dev] [PATCH] st/va: hardlink driver instances to gallium_drv_video.so

2016-01-05 Thread Jimmy Berry

I have been holding off v2 with correct spacing before \ (seemingly
missed the first time) waiting for a review to confirm that this is
the right approach as agreed in IRC.

Let me know if anything else.

--
Jimmy


On Sat, Dec 19, 2015 at 10:57 PM, Jimmy Berry  wrote:
> Removes the need to set LIBVA_DRIVER_NAME=gallium for supported targets and is
> consistent with vdpau and general gallium drivers.
>
> Signed-off-by: Jimmy Berry 
> ---
>  src/gallium/targets/va/Makefile.am | 14 ++
>  1 file changed, 14 insertions(+)
>
> diff --git a/src/gallium/targets/va/Makefile.am 
> b/src/gallium/targets/va/Makefile.am
> index 733e7ac..2cab898 100644
> --- a/src/gallium/targets/va/Makefile.am
> +++ b/src/gallium/targets/va/Makefile.am
> @@ -64,3 +64,17 @@ if HAVE_MESA_LLVM
>  gallium_drv_video_la_LIBADD += $(LLVM_LIBS)
>  gallium_drv_video_la_LDFLAGS += $(LLVM_LDFLAGS)
>  endif
> +
> +# hardlink each megadriver instance, but don't actually have
> +# gallium_drv_video.so in the set of final installed files.
> +install-data-hook:
> +   for i in $(TARGET_DRIVERS); do  \
> +   ln -f $(DESTDIR)$(vadir)/gallium_drv_video.so\
> + $(DESTDIR)$(vadir)/$${i}_drv_video.so; \
> +   done;   \
> +   $(RM) $(DESTDIR)$(vadir)/gallium_drv_video.*
> +
> +uninstall-hook:
> +   for i in $(TARGET_DRIVERS); do  \
> +   $(RM) $(DESTDIR)$(vadir)/$${i}_drv_video.so; \
> +   done;
> --
> 2.6.3
>
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