Re: [Mesa-dev] [PATCH V2] radeonsi/uvd: fix planar formats broken since f70f6baaa3bb0f8b280ac2eaea69bb

2017-09-30 Thread Christian König 

Am 29.09.2017 um 21:09 schrieb Benedikt Schemmer:

From: Benedikt Schemmer 
Date: Fri, 29 Sep 2017 21:02:13 +0200
Subject: [PATCH V2] radeonsi/uvd: fix planar formats broken since 
f70f6baaa3bb0f8b280ac2eaea69bb

V2: remove code duplication and one unnessecary variable, minor whitespace fix

---
  src/gallium/drivers/radeonsi/si_uvd.c | 40 +--
  1 file changed, 15 insertions(+), 25 deletions(-)

diff --git a/src/gallium/drivers/radeonsi/si_uvd.c 
b/src/gallium/drivers/radeonsi/si_uvd.c
index 4e8250664c..c2925ef9cd 100644
--- a/src/gallium/drivers/radeonsi/si_uvd.c
+++ b/src/gallium/drivers/radeonsi/si_uvd.c
@@ -64,30 +64,20 @@ struct pipe_video_buffer *si_video_buffer_create(struct 
pipe_context *pipe,
template.width = align(tmpl->width, VL_MACROBLOCK_WIDTH);
template.height = align(tmpl->height / array_size, 
VL_MACROBLOCK_HEIGHT);

-   vl_video_buffer_template(, , resource_formats[0], 1, 
array_size, PIPE_USAGE_DEFAULT, 0);
/* TODO: get tiling working */
-   templ.bind = PIPE_BIND_LINEAR;
-   resources[0] = (struct r600_texture *)
-   pipe->screen->resource_create(pipe->screen, );
-   if (!resources[0])
-   goto error;
-
-   if (resource_formats[1] != PIPE_FORMAT_NONE) {
-   vl_video_buffer_template(, , 
resource_formats[1], 1, array_size, PIPE_USAGE_DEFAULT, 1);
-   templ.bind = PIPE_BIND_LINEAR;
-   resources[1] = (struct r600_texture *)
-   pipe->screen->resource_create(pipe->screen, );
-   if (!resources[1])
-   goto error;
-   }
-
-   if (resource_formats[2] != PIPE_FORMAT_NONE) {
-   vl_video_buffer_template(, , 
resource_formats[2], 1, array_size, PIPE_USAGE_DEFAULT, 2);
-   templ.bind = PIPE_BIND_LINEAR;
-   resources[2] = (struct r600_texture *)
-   pipe->screen->resource_create(pipe->screen, );
-   if (!resources[2])
-   goto error;
+   
+   for (i = 0; i < VL_NUM_COMPONENTS; ++i) {
+   if (resource_formats[i] != PIPE_FORMAT_NONE) {


It should be handled as an error if resource_formats[0] is PIPE_FORMAT_NONE.

Better write this as:

if (resource_formats[i] == PIPE_FORMAT_NONE) {
if (i == 0)
gotot error;
continue;
}
...


+   vl_video_buffer_template(, ,
+resource_formats[i], 1,
+array_size, 
PIPE_USAGE_DEFAULT, i);
+   /* Set PIPE_BIND_SHARED to avoid reallocation in 
r600_texture_get_handle,
+* which can't handle joined surfaces. */
+   templ.bind = PIPE_BIND_LINEAR | PIPE_BIND_SHARED;
+   resources[i] = (struct r600_texture *)
+   pipe->screen->resource_create(pipe->screen, 
);
+   if (!resources[i]) goto error;


The "goto error" should be on a new line.


+   }
}

for (i = 0; i < VL_NUM_COMPONENTS; ++i) {
@@ -159,8 +149,8 @@ struct pipe_video_codec *si_uvd_create_decoder(struct 
pipe_context *context,
struct si_context *ctx = (struct si_context *)context;
bool vcn = (ctx->b.family == CHIP_RAVEN) ? true : false;

-if (templ->entrypoint == PIPE_VIDEO_ENTRYPOINT_ENCODE)
-return si_vce_create_encoder(context, templ, ctx->b.ws, 
si_vce_get_buffer);
+   if (templ->entrypoint == PIPE_VIDEO_ENTRYPOINT_ENCODE)
+   return si_vce_create_encoder(context, templ, ctx->b.ws, 
si_vce_get_buffer);

return (vcn) ?  radeon_create_decoder(context, templ) :
si_common_uvd_create_decoder(context, templ, si_uvd_set_dtb);



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Re: [Mesa-dev] [PATCH V2] radeonsi/uvd: fix planar formats broken since f70f6baaa3bb0f8b280ac2eaea69bb

2017-09-30 Thread Benedikt Schemmer 
>
> It should be handled as an error if resource_formats[0] is PIPE_FORMAT_NONE.
>
> Better write this as:
>
> if (resource_formats[i] == PIPE_FORMAT_NONE) {
> if (i == 0)
> gotot error;
> continue;
> }
> ...
>

I dont think it can be zero.
In the beginning of vl_video_buffer.c formats and return values are defined and 
resource_formats[0] is guranteed to not
be PIPE_FORMAT_NONE. The only other return value is null which caught 
immediately after requesting resource_formats
(line 59, in si_uvd.c).
So maybe
assert(resource_formats[0] == PIPE_FORMAT_NONE)
for debugging purposes?
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[Mesa-dev] [PATCH v2] etnaviv: Do GC3000 resolve-in-place when possible

2017-09-30 Thread Wladimir J. van der Laan 
If an RS blit is done with source exactly the same as destination, and
the hardware supports this, do an in-place resolve. This only fills in
tiles that have not been rendered to using information from the TS.

This is the same as the blob does and potentially saves significant
bandwidth when doing i.MX6qp scanout using PRE, and when rendering to
textures (though here using sampler TS would be even better).

Signed-off-by: Wladimir J. van der Laan 
---
 src/gallium/drivers/etnaviv/etnaviv_clear_blit.c |  1 +
 src/gallium/drivers/etnaviv/etnaviv_emit.c   |  9 -
 src/gallium/drivers/etnaviv/etnaviv_rs.c | 17 ++---
 src/gallium/drivers/etnaviv/etnaviv_rs.h |  2 ++
 4 files changed, 25 insertions(+), 4 deletions(-)

This depends (for updating the rnndb headers) on Lucas Stach's patch
"etnaviv: update HW headers and fix provoking vertex".

diff --git a/src/gallium/drivers/etnaviv/etnaviv_clear_blit.c 
b/src/gallium/drivers/etnaviv/etnaviv_clear_blit.c
index c85ada9..c62287b 100644
--- a/src/gallium/drivers/etnaviv/etnaviv_clear_blit.c
+++ b/src/gallium/drivers/etnaviv/etnaviv_clear_blit.c
@@ -591,6 +591,7 @@ etna_try_rs_blit(struct pipe_context *pctx,
   .source = src->bo,
   .source_offset = src_offset,
   .source_stride = src_lev->stride,
+  .source_padded_width = src_lev->padded_width,
   .source_padded_height = src_lev->padded_height,
   .dest_format = translate_rs_format(dst_format),
   .dest_tiling = dst->layout,
diff --git a/src/gallium/drivers/etnaviv/etnaviv_emit.c 
b/src/gallium/drivers/etnaviv/etnaviv_emit.c
index c2117d5..707b1e7 100644
--- a/src/gallium/drivers/etnaviv/etnaviv_emit.c
+++ b/src/gallium/drivers/etnaviv/etnaviv_emit.c
@@ -173,7 +173,14 @@ etna_submit_rs_state(struct etna_context *ctx,
 
ctx->stats.rs_operations++;
 
-   if (screen->specs.pixel_pipes == 1) {
+   if (cs->RS_KICKER_INPLACE) {
+  etna_cmd_stream_reserve(stream, 6);
+  etna_coalesce_start(stream, );
+  /* 0/1 */ EMIT_STATE(RS_EXTRA_CONFIG, cs->RS_EXTRA_CONFIG);
+  /* 2/3 */ EMIT_STATE(RS_SOURCE_STRIDE, cs->RS_SOURCE_STRIDE);
+  /* 4/5 */ EMIT_STATE(RS_KICKER_INPLACE, cs->RS_KICKER_INPLACE);
+  etna_coalesce_end(stream, );
+   } else if (screen->specs.pixel_pipes == 1) {
   etna_cmd_stream_reserve(stream, 22);
   etna_coalesce_start(stream, );
   /* 0/1 */ EMIT_STATE(RS_CONFIG, cs->RS_CONFIG);
diff --git a/src/gallium/drivers/etnaviv/etnaviv_rs.c 
b/src/gallium/drivers/etnaviv/etnaviv_rs.c
index 5c108a6..c9072c2 100644
--- a/src/gallium/drivers/etnaviv/etnaviv_rs.c
+++ b/src/gallium/drivers/etnaviv/etnaviv_rs.c
@@ -118,10 +118,21 @@ etna_compile_rs_state(struct etna_context *ctx, struct 
compiled_rs_state *cs,
cs->RS_FILL_VALUE[3] = rs->clear_value[3];
cs->RS_EXTRA_CONFIG = VIVS_RS_EXTRA_CONFIG_AA(rs->aa) |
  VIVS_RS_EXTRA_CONFIG_ENDIAN(rs->endian_mode);
-   /* TODO: cs->RS_UNK016B0 = s->size / 64 ?
-* The blob does this consistently but there seems to be no currently 
supported
-* model that needs it.
+
+   /* If source the same as destination, and the hardware supports this,
+* do an in-place resolve to fill in unrendered tiles.
 */
+   if (ctx->specs.single_buffer && rs->source == rs->dest &&
+ rs->source_offset == rs->dest_offset &&
+ rs->source_format == rs->dest_format &&
+ rs->source_tiling == rs->dest_tiling &&
+ rs->source_stride == rs->dest_stride &&
+ !rs->downsample_x && !rs->downsample_y &&
+ !rs->swap_rb && !rs->flip &&
+ !rs->clear_mode && rs->source_padded_width) {
+  /* Total number of tiles (same as for autodisable) */
+  cs->RS_KICKER_INPLACE = rs->source_padded_width * 
rs->source_padded_height / 16;
+   }
 }
 
 void
diff --git a/src/gallium/drivers/etnaviv/etnaviv_rs.h 
b/src/gallium/drivers/etnaviv/etnaviv_rs.h
index ec5b659..171d3fa 100644
--- a/src/gallium/drivers/etnaviv/etnaviv_rs.h
+++ b/src/gallium/drivers/etnaviv/etnaviv_rs.h
@@ -43,6 +43,7 @@ struct rs_state {
struct etna_bo *source;
uint32_t source_offset;
uint32_t source_stride;
+   uint32_t source_padded_width; /* total padded width (only needed for 
source) */
uint32_t source_padded_height; /* total padded height */
struct etna_bo *dest;
uint32_t dest_offset;
@@ -69,6 +70,7 @@ struct compiled_rs_state {
uint32_t RS_FILL_VALUE[4];
uint32_t RS_EXTRA_CONFIG;
uint32_t RS_PIPE_OFFSET[2];
+   uint32_t RS_KICKER_INPLACE; /* Set if source is destination */
 
struct etna_reloc source[2];
struct etna_reloc dest[2];
-- 
2.7.4

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Re: [Mesa-dev] [PATCH] radeonsi/uvd: fix planar formats broken since f70f6baaa3bb0f8b280ac2eaea69bb

2017-09-30 Thread Christian König 

Am 29.09.2017 um 16:11 schrieb Marek Olšák:

From: Marek Olšák 


Reviewed-by: Christian König 



---
  src/gallium/drivers/radeonsi/si_uvd.c | 11 ---
  1 file changed, 8 insertions(+), 3 deletions(-)

diff --git a/src/gallium/drivers/radeonsi/si_uvd.c 
b/src/gallium/drivers/radeonsi/si_uvd.c
index 4e82506..1a38b26 100644
--- a/src/gallium/drivers/radeonsi/si_uvd.c
+++ b/src/gallium/drivers/radeonsi/si_uvd.c
@@ -58,39 +58,44 @@ struct pipe_video_buffer *si_video_buffer_create(struct 
pipe_context *pipe,
resource_formats = vl_video_buffer_formats(pipe->screen, 
tmpl->buffer_format);
if (!resource_formats)
return NULL;
  
  	array_size = tmpl->interlaced ? 2 : 1;

template = *tmpl;
template.width = align(tmpl->width, VL_MACROBLOCK_WIDTH);
template.height = align(tmpl->height / array_size, 
VL_MACROBLOCK_HEIGHT);
  
  	vl_video_buffer_template(, , resource_formats[0], 1, array_size, PIPE_USAGE_DEFAULT, 0);

+
/* TODO: get tiling working */
-   templ.bind = PIPE_BIND_LINEAR;
+   /* Set PIPE_BIND_SHARED to avoid reallocation in 
r600_texture_get_handle,
+* which can't handle joined surfaces. */
+   unsigned bind = PIPE_BIND_LINEAR | PIPE_BIND_SHARED;
+
+   templ.bind = bind;
resources[0] = (struct r600_texture *)
pipe->screen->resource_create(pipe->screen, );
if (!resources[0])
goto error;
  
  	if (resource_formats[1] != PIPE_FORMAT_NONE) {

vl_video_buffer_template(, , 
resource_formats[1], 1, array_size, PIPE_USAGE_DEFAULT, 1);
-   templ.bind = PIPE_BIND_LINEAR;
+   templ.bind = bind;
resources[1] = (struct r600_texture *)
pipe->screen->resource_create(pipe->screen, );
if (!resources[1])
goto error;
}
  
  	if (resource_formats[2] != PIPE_FORMAT_NONE) {

vl_video_buffer_template(, , 
resource_formats[2], 1, array_size, PIPE_USAGE_DEFAULT, 2);
-   templ.bind = PIPE_BIND_LINEAR;
+   templ.bind = bind;
resources[2] = (struct r600_texture *)
pipe->screen->resource_create(pipe->screen, );
if (!resources[2])
goto error;
}
  
  	for (i = 0; i < VL_NUM_COMPONENTS; ++i) {

if (!resources[i])
continue;
  



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Re: [Mesa-dev] [PATCH V3] radeonsi/uvd: fix planar formats broken since f70f6baaa3bb0f8b280ac2eaea69bb

2017-09-30 Thread Marek Olšák 
FYI, I've just pushed the cleanup version as I mentioned before.

Marek

On Sat, Sep 30, 2017 at 6:20 PM, Benedikt Schemmer  wrote:
> From: Benedikt Schemmer 
> Date: Sat, 30 Sep 2017 18:05:43 +0200
> Subject: [PATCH V3] radeonsi/uvd: fix planar formats broken since 
> f70f6baaa3bb0f8b280ac2eaea69bb
>
>  V1: Marek Olsak
>  V2: remove code duplication and one unnecessary variable, minor whitespace 
> fix
>  V3: ensure valid resource format when debugging (is assumed to be valid in 
> release) (suggested by Christian König)
>
> ---
>  src/gallium/drivers/radeonsi/si_uvd.c | 41 
> +++
>  1 file changed, 17 insertions(+), 24 deletions(-)
>
> diff --git a/src/gallium/drivers/radeonsi/si_uvd.c 
> b/src/gallium/drivers/radeonsi/si_uvd.c
> index 4e8250664c..3cb45075c4 100644
> --- a/src/gallium/drivers/radeonsi/si_uvd.c
> +++ b/src/gallium/drivers/radeonsi/si_uvd.c
> @@ -64,30 +64,23 @@ struct pipe_video_buffer *si_video_buffer_create(struct 
> pipe_context *pipe,
> template.width = align(tmpl->width, VL_MACROBLOCK_WIDTH);
> template.height = align(tmpl->height / array_size, 
> VL_MACROBLOCK_HEIGHT);
>
> -   vl_video_buffer_template(, , resource_formats[0], 1, 
> array_size, PIPE_USAGE_DEFAULT, 0);
> /* TODO: get tiling working */
> -   templ.bind = PIPE_BIND_LINEAR;
> -   resources[0] = (struct r600_texture *)
> -   pipe->screen->resource_create(pipe->screen, );
> -   if (!resources[0])
> -   goto error;
> -
> -   if (resource_formats[1] != PIPE_FORMAT_NONE) {
> -   vl_video_buffer_template(, , 
> resource_formats[1], 1, array_size, PIPE_USAGE_DEFAULT, 1);
> -   templ.bind = PIPE_BIND_LINEAR;
> -   resources[1] = (struct r600_texture *)
> -   pipe->screen->resource_create(pipe->screen, );
> -   if (!resources[1])
> -   goto error;
> -   }
>
> -   if (resource_formats[2] != PIPE_FORMAT_NONE) {
> -   vl_video_buffer_template(, , 
> resource_formats[2], 1, array_size, PIPE_USAGE_DEFAULT, 2);
> -   templ.bind = PIPE_BIND_LINEAR;
> -   resources[2] = (struct r600_texture *)
> -   pipe->screen->resource_create(pipe->screen, );
> -   if (!resources[2])
> -   goto error;
> +   assert(resource_formats[0] != PIPE_FORMAT_NONE);
> +
> +   for (i = 0; i < VL_NUM_COMPONENTS; ++i) {
> +   if (resource_formats[i] != PIPE_FORMAT_NONE) {
> +   vl_video_buffer_template(, ,
> +resource_formats[i], 1,
> +array_size, 
> PIPE_USAGE_DEFAULT, i);
> +   /* Set PIPE_BIND_SHARED to avoid reallocation in 
> r600_texture_get_handle,
> +* which can't handle joined surfaces. */
> +   templ.bind = PIPE_BIND_LINEAR | PIPE_BIND_SHARED;
> +   resources[i] = (struct r600_texture *)
> +   
> pipe->screen->resource_create(pipe->screen, );
> +   if (!resources[i])
> +   goto error;
> +   }
> }
>
> for (i = 0; i < VL_NUM_COMPONENTS; ++i) {
> @@ -159,8 +152,8 @@ struct pipe_video_codec *si_uvd_create_decoder(struct 
> pipe_context *context,
> struct si_context *ctx = (struct si_context *)context;
> bool vcn = (ctx->b.family == CHIP_RAVEN) ? true : false;
>
> -if (templ->entrypoint == PIPE_VIDEO_ENTRYPOINT_ENCODE)
> -return si_vce_create_encoder(context, templ, ctx->b.ws, 
> si_vce_get_buffer);
> +   if (templ->entrypoint == PIPE_VIDEO_ENTRYPOINT_ENCODE)
> +   return si_vce_create_encoder(context, templ, ctx->b.ws, 
> si_vce_get_buffer);
>
> return (vcn) ?  radeon_create_decoder(context, templ) :
> si_common_uvd_create_decoder(context, templ, si_uvd_set_dtb);
> --
> 2.11.0
>
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[Mesa-dev] [PATCH V3] radeonsi/uvd: fix planar formats broken since f70f6baaa3bb0f8b280ac2eaea69bb

2017-09-30 Thread Benedikt Schemmer 
From: Benedikt Schemmer 
Date: Sat, 30 Sep 2017 18:05:43 +0200
Subject: [PATCH V3] radeonsi/uvd: fix planar formats broken since 
f70f6baaa3bb0f8b280ac2eaea69bb

 V1: Marek Olsak
 V2: remove code duplication and one unnecessary variable, minor whitespace fix
 V3: ensure valid resource format when debugging (is assumed to be valid in 
release) (suggested by Christian König)

---
 src/gallium/drivers/radeonsi/si_uvd.c | 41 +++
 1 file changed, 17 insertions(+), 24 deletions(-)

diff --git a/src/gallium/drivers/radeonsi/si_uvd.c 
b/src/gallium/drivers/radeonsi/si_uvd.c
index 4e8250664c..3cb45075c4 100644
--- a/src/gallium/drivers/radeonsi/si_uvd.c
+++ b/src/gallium/drivers/radeonsi/si_uvd.c
@@ -64,30 +64,23 @@ struct pipe_video_buffer *si_video_buffer_create(struct 
pipe_context *pipe,
template.width = align(tmpl->width, VL_MACROBLOCK_WIDTH);
template.height = align(tmpl->height / array_size, 
VL_MACROBLOCK_HEIGHT);

-   vl_video_buffer_template(, , resource_formats[0], 1, 
array_size, PIPE_USAGE_DEFAULT, 0);
/* TODO: get tiling working */
-   templ.bind = PIPE_BIND_LINEAR;
-   resources[0] = (struct r600_texture *)
-   pipe->screen->resource_create(pipe->screen, );
-   if (!resources[0])
-   goto error;
-
-   if (resource_formats[1] != PIPE_FORMAT_NONE) {
-   vl_video_buffer_template(, , 
resource_formats[1], 1, array_size, PIPE_USAGE_DEFAULT, 1);
-   templ.bind = PIPE_BIND_LINEAR;
-   resources[1] = (struct r600_texture *)
-   pipe->screen->resource_create(pipe->screen, );
-   if (!resources[1])
-   goto error;
-   }

-   if (resource_formats[2] != PIPE_FORMAT_NONE) {
-   vl_video_buffer_template(, , 
resource_formats[2], 1, array_size, PIPE_USAGE_DEFAULT, 2);
-   templ.bind = PIPE_BIND_LINEAR;
-   resources[2] = (struct r600_texture *)
-   pipe->screen->resource_create(pipe->screen, );
-   if (!resources[2])
-   goto error;
+   assert(resource_formats[0] != PIPE_FORMAT_NONE);
+
+   for (i = 0; i < VL_NUM_COMPONENTS; ++i) {
+   if (resource_formats[i] != PIPE_FORMAT_NONE) {
+   vl_video_buffer_template(, ,
+resource_formats[i], 1,
+array_size, 
PIPE_USAGE_DEFAULT, i);
+   /* Set PIPE_BIND_SHARED to avoid reallocation in 
r600_texture_get_handle,
+* which can't handle joined surfaces. */
+   templ.bind = PIPE_BIND_LINEAR | PIPE_BIND_SHARED;
+   resources[i] = (struct r600_texture *)
+   
pipe->screen->resource_create(pipe->screen, );
+   if (!resources[i])
+   goto error;
+   }
}

for (i = 0; i < VL_NUM_COMPONENTS; ++i) {
@@ -159,8 +152,8 @@ struct pipe_video_codec *si_uvd_create_decoder(struct 
pipe_context *context,
struct si_context *ctx = (struct si_context *)context;
bool vcn = (ctx->b.family == CHIP_RAVEN) ? true : false;

-if (templ->entrypoint == PIPE_VIDEO_ENTRYPOINT_ENCODE)
-return si_vce_create_encoder(context, templ, ctx->b.ws, 
si_vce_get_buffer);
+   if (templ->entrypoint == PIPE_VIDEO_ENTRYPOINT_ENCODE)
+   return si_vce_create_encoder(context, templ, ctx->b.ws, 
si_vce_get_buffer);

return (vcn) ?  radeon_create_decoder(context, templ) :
si_common_uvd_create_decoder(context, templ, si_uvd_set_dtb);
-- 
2.11.0

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Re: [Mesa-dev] [PATCH] intel: Always set Cube Face Enables for all surfaces.

2017-09-30 Thread Jason Ekstrand 

On September 30, 2017 12:29:56 AM Matt Turner  wrote:

On Fri, Sep 29, 2017 at 10:54 PM, Kenneth Graunke  
wrote:

These shouldn't matter for non-cubes, and we always enable them all
for cubes, so we may as well set them all the time.  We can just mark
the fields "mbo" (must be one) and genxml will automatically set them
for us, and we never even have to think about them.


I don't like overloading the concept of must-be-zero/one. It really
means that the hardware requires bits to be unset/set.


Agreed.  I'd rather we just set them since they do have meaning.


It looks like the if GEN_GEN check in isl_surface_state.c can go away
if we just make all of the genxml match. Not sure why we made gen8+
individual bits and earlier ones a uint bitfield. I think it's really
all the same.


Mostly because I couldn't decide which of the two I liked better so I never 
unified it.



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Re: [Mesa-dev] [PATCH 00/11] Gallium/RadeonSI: Allow any 1D register as a TGSI address operand

2017-09-30 Thread Gert Wollny 
Am Freitag, den 29.09.2017, 16:09 +0200 schrieb Marek Olšák:
> On Fri, Sep 29, 2017 at 3:33 PM, Gert Wollny 
> wrote:
> > 
> > Am 29.09.2017 14:51 schrieb "Marek Olšák" :
> > 
> > > 
> > > If all requirements are met, UARL isn't emitted and the source
> > > operand of UARL is folded into the instruction where ADDR would
> > > normally be used.
> > 
> > I only skimmed over the patches, but this will need
> > tracking  reladdr* in the temporary register  lifetime estimation
> > that is called by merge_registers, which is not yet done (unless I
> > missed a patch in the last few days or I didn't see it in this
> > set).
> > 
> > AFAIR radeonsi doesn't use it, but at least r600g does, for which
> > you also enabled this new behaviour.
> > 
> > On Monday I can have a closer look at it.
> 
> This is only enabled for radeonsi, not r600g.

My bad, shouldn't read patches on a mobile phone, but in any case, I
think to avoid problems if one wants to enable this for other drivers
it would be prudent to add an assert in merge_registers to make sure it
is not called.  

I'm currently working on improving the register merging, and there I'll
make sure that the reladdr* are tracked too.
 
Best, 
Gert 

Proposed patch: 

--- a/src/mesa/state_tracker/st_glsl_to_tgsi.cpp
+++ b/src/mesa/state_tracker/st_glsl_to_tgsi.cpp
@@ -5195,7 +5195,7 @@ glsl_to_tgsi_visitor::merge_two_dsts(void)
 void
 glsl_to_tgsi_visitor::merge_registers(void)
 {
-
+   assert(need_uarl);
struct lifetime *lifetimes =
  rzalloc_array(mem_ctx, struct lifetime, this->next_temp);



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Re: [Mesa-dev] [PATCH V2] radeonsi/uvd: fix planar formats broken since f70f6baaa3bb0f8b280ac2eaea69bb

2017-09-30 Thread Marek Olšák 
On Sat, Sep 30, 2017 at 5:47 PM, Christian König
 wrote:
> Am 30.09.2017 um 12:57 schrieb Benedikt Schemmer:
>>>
>>> It should be handled as an error if resource_formats[0] is
>>> PIPE_FORMAT_NONE.
>>>
>>> Better write this as:
>>>
>>> if (resource_formats[i] == PIPE_FORMAT_NONE) {
>>>  if (i == 0)
>>>  gotot error;
>>>  continue;
>>> }
>>> ...
>>>
>> I dont think it can be zero.
>> In the beginning of vl_video_buffer.c formats and return values are
>> defined and resource_formats[0] is guranteed to not
>> be PIPE_FORMAT_NONE. The only other return value is null which caught
>> immediately after requesting resource_formats
>> (line 59, in si_uvd.c).
>> So maybe
>> assert(resource_formats[0] == PIPE_FORMAT_NONE)
>> for debugging purposes?

Did you mean:
assert(resource_formats[0] != PIPE_FORMAT_NONE) ?

Marek
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Re: [Mesa-dev] [PATCH 00/11] Gallium/RadeonSI: Allow any 1D register as a TGSI address operand

2017-09-30 Thread Marek Olšák 
On Sat, Sep 30, 2017 at 4:49 PM, Gert Wollny  wrote:
> Am Freitag, den 29.09.2017, 16:09 +0200 schrieb Marek Olšák:
>> On Fri, Sep 29, 2017 at 3:33 PM, Gert Wollny 
>> wrote:
>> >
>> > Am 29.09.2017 14:51 schrieb "Marek Olšák" :
>> >
>> > >
>> > > If all requirements are met, UARL isn't emitted and the source
>> > > operand of UARL is folded into the instruction where ADDR would
>> > > normally be used.
>> >
>> > I only skimmed over the patches, but this will need
>> > tracking  reladdr* in the temporary register  lifetime estimation
>> > that is called by merge_registers, which is not yet done (unless I
>> > missed a patch in the last few days or I didn't see it in this
>> > set).
>> >
>> > AFAIR radeonsi doesn't use it, but at least r600g does, for which
>> > you also enabled this new behaviour.
>> >
>> > On Monday I can have a closer look at it.
>>
>> This is only enabled for radeonsi, not r600g.
>
> My bad, shouldn't read patches on a mobile phone, but in any case, I
> think to avoid problems if one wants to enable this for other drivers
> it would be prudent to add an assert in merge_registers to make sure it
> is not called.
>
> I'm currently working on improving the register merging, and there I'll
> make sure that the reladdr* are tracked too.
>
> Best,
> Gert
>
> Proposed patch:
>
> --- a/src/mesa/state_tracker/st_glsl_to_tgsi.cpp
> +++ b/src/mesa/state_tracker/st_glsl_to_tgsi.cpp
> @@ -5195,7 +5195,7 @@ glsl_to_tgsi_visitor::merge_two_dsts(void)
>  void
>  glsl_to_tgsi_visitor::merge_registers(void)
>  {
> -
> +   assert(need_uarl);
> struct lifetime *lifetimes =
>   rzalloc_array(mem_ctx, struct lifetime, this->next_temp);

Thanks, I'll include this in my commit.

Marek
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Re: [Mesa-dev] [PATCH V2] radeonsi/uvd: fix planar formats broken since f70f6baaa3bb0f8b280ac2eaea69bb

2017-09-30 Thread Benedikt Schemmer 
yes

Am 30.09.2017 um 17:53 schrieb Marek Olšák:
> On Sat, Sep 30, 2017 at 5:47 PM, Christian König
>  wrote:
>> Am 30.09.2017 um 12:57 schrieb Benedikt Schemmer:

 It should be handled as an error if resource_formats[0] is
 PIPE_FORMAT_NONE.

 Better write this as:

 if (resource_formats[i] == PIPE_FORMAT_NONE) {
  if (i == 0)
  gotot error;
  continue;
 }
 ...

>>> I dont think it can be zero.
>>> In the beginning of vl_video_buffer.c formats and return values are
>>> defined and resource_formats[0] is guranteed to not
>>> be PIPE_FORMAT_NONE. The only other return value is null which caught
>>> immediately after requesting resource_formats
>>> (line 59, in si_uvd.c).
>>> So maybe
>>> assert(resource_formats[0] == PIPE_FORMAT_NONE)
>>> for debugging purposes?
> 
> Did you mean:
> assert(resource_formats[0] != PIPE_FORMAT_NONE) ?
> 
> Marek
> 
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Re: [Mesa-dev] [PATCH] intel: Always set Cube Face Enables for all surfaces.

2017-09-30 Thread Matt Turner 
On Fri, Sep 29, 2017 at 10:54 PM, Kenneth Graunke  wrote:
> These shouldn't matter for non-cubes, and we always enable them all
> for cubes, so we may as well set them all the time.  We can just mark
> the fields "mbo" (must be one) and genxml will automatically set them
> for us, and we never even have to think about them.

I don't like overloading the concept of must-be-zero/one. It really
means that the hardware requires bits to be unset/set.

It looks like the if GEN_GEN check in isl_surface_state.c can go away
if we just make all of the genxml match. Not sure why we made gen8+
individual bits and earlier ones a uint bitfield. I think it's really
all the same.
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[Mesa-dev] [Bug 103002] string_buffer_test.cpp:43: error: ISO C++ forbids initialization of member ‘str1’

2017-09-30 Thread bugzilla-daemon 
https://bugs.freedesktop.org/show_bug.cgi?id=103002

Thomas Helland  changed:

   What|Removed |Added

 Status|NEW |RESOLVED
 Resolution|--- |FIXED

--- Comment #1 from Thomas Helland  ---
This should be fixed by commit ce09364d4ec527ceee5be8bf4a08fb27cd2bf152

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Re: [Mesa-dev] [PATCH] etnaviv: Do GC3000 resolve-in-place when possible

2017-09-30 Thread Wladimir J. van der Laan 
On Fri, Sep 29, 2017 at 06:00:13PM +0200, Wladimir J. van der Laan wrote:
> If an RS blit is done with source exactly the same as destination, and
> the hardware supports this, do an in-place resolve.
> 
> This is the same as the blob does and potentially saves significant
> bandwidth when doing i.MX6qp scanout using PRE, and when rendering to
> textures (though here using sampler TS would be even better).
> 
> Signed-off-by: Wladimir J. van der Laan 
> ---
>  src/gallium/drivers/etnaviv/etnaviv_emit.c |  9 -
>  src/gallium/drivers/etnaviv/etnaviv_rs.c   | 16 +---
>  src/gallium/drivers/etnaviv/etnaviv_rs.h   |  1 +
>  3 files changed, 22 insertions(+), 4 deletions(-)
> 

> +   if (ctx->specs.single_buffer && rs->source == rs->dest &&
> + rs->source_offset == rs->dest_offset &&
> + rs->source_format == rs->dest_format &&
> + rs->source_tiling == rs->dest_tiling &&
> + rs->source_stride == rs->dest_stride &&
> + !rs->downsample_x && !rs->downsample_y &&
> + !rs->swap_rb && !rs->flip &&
> + !rs->clear_mode) {
> +   cs->RS_KICKER_INPLACE = (rs->width / 4) * (rs->height / 4);

On second thought this computation is wrong in case of padding, the value we 
need here is
same as the autodisable tile count:

> surf->surf.padded_width * surf->surf.padded_height / 16

Will send a revised patch asap.

Regards
Wladimir
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Re: [Mesa-dev] [PATCH] glsl/ast: Stop processing a switch-statement after an error in the init-expression

2017-09-30 Thread Alejandro Piñeiro 
On 30/09/17 04:16, Ian Romanick wrote:
> From: Ian Romanick 
>
> This happens to work now because ir_binop_all_equal is used.  This
> causes vector typed init-expressions to produce scalar Boolean values
> after comparison.
>
> The next commit changes ir_binop_all_equal to ir_binop_equal.  Vector
> typed init-expressions will then produce vector Boolean values, and, in
> debug builds, the ir_assignment constructor will fail an assertion.
>
> Signed-off-by: Ian Romanick 
> ---

Thanks for the detailed explanation.
Reviewed-by: Alejandro Piñeiro 

> There were a number of flaws in the original series that went undetected
> until recently.  One flaw, noted below, is fatal.  I had been testing
> the series using our CI and shader-db.  The problems went undetected for
> several reasons.  On the shader-db runs, I was using release builds that
> omitted assertions.  At least one of the failures would have tri
>
> The first failure was in changing ir_binop_all_equal to ir_binop_equal.
> The code previously relied on ir_binop_all_equal accepting mixed scalar
> and vector operands so that cases like
>
> switch (ivec2(a, b)) {
> case 0:
> break;
> }
>
> would continue to compile.  An error would be emitted in the switch
> init-statement, but the compiler would carry on trying to find more
> errors.  That problem is addressed in this patch.  Once the error in the
> switch init-statement is detected, halt compilation.
>
> The second flaw was that if-to-conditional-assign did not respect the
> write-mask of the assignment.  This would result in things like
>
> if (cond)
> foo.wz = bar;
>
> being transformed to 'foo.wz = csel(cond.xx, bar, foo)'.  This was solved by
> converting the write mask to a swizzle on the LHS when used in the
> conditional-select.
>
> The third flaw was that several of the patches that replace conditions
> with conditional-select "forgot" that conditional-select is
> per-component, so the vector size of the condition has to match the
> vector size of the operands.
>
> This last flaw led to the discovery of the fatal problem: ir_triop_csel
> only works on scalar and vector operands.  Statements like:
>
> struct S s1;
> struct S s2;
>
> ...
>
> if (cond)
> s1 = s2;
>
> cannot be translated directly to a conditional-select.  Arrays and
> matrices have the same problem.  There are some possible solutions, but
> I'm not going to have time to tackle any of them right now.
>
> Assuming this patch meets with positive review, I intend to push a
> reduced series of the subset listed below.  Aside from the ordering
> change and the removal of 8 patches, the only change in the series is
> the addition of this patch.  None of the older patches are modified.
> This is still a nice clean up and a net removal of 56 lines of code.
> It's not the payoff I wanted, but I guess it's better than nothing.
>
> glsl: Fix coding standards issues in lower_if_to_cond_assign
> glsl: Fix coding standards issues in lower_vec_index_to_cond_assign
> glsl: Return ir_variable from compare_index_block
> glsl: Convert lower_vec_index_to_cond_assign to using ir_builder
> glsl: Fix coding standards issues in lower_variable_index_to_cond_assign
> glsl: Convert lower_variable_index_to_cond_assign to ir_builder
> glsl: Don't pass NULL to ir_assignment constructor when not necessary
> glsl/ast: Stop processing a switch-statement after an error in the 
> init-expression
> glsl/ast: Use ir_binop_equal instead of ir_binop_all_equal
> glsl/ast: Convert ast_case_label::hir to ir_builder
> glsl/ast: Explicitly track the set of case labels that occur after default
> glsl/ast: Generate a more compact expression to disable execution of default 
> case
> glsl/ast: Use logical-or instead of conditional assignment to set fallthru_var
> glsl: Move 'foo = foo;' optimization to opt_dead_code_local
> glsl: Remove spurious assertions
>
> This, along with the next series I intend to send out, is available at:
>
> https://cgit.freedesktop.org/~idr/mesa/log/?h=glsl-parser-diet
>
>  src/compiler/glsl/ast_to_hir.cpp | 1 +
>  1 file changed, 1 insertion(+)
>
> diff --git a/src/compiler/glsl/ast_to_hir.cpp 
> b/src/compiler/glsl/ast_to_hir.cpp
> index c464549..a569318 100644
> --- a/src/compiler/glsl/ast_to_hir.cpp
> +++ b/src/compiler/glsl/ast_to_hir.cpp
> @@ -6418,6 +6418,7 @@ ast_switch_statement::hir(exec_list *instructions,
> state,
> "switch-statement expression must be scalar "
> "integer");
> +  return NULL;
> }
>  
> /* Track the switch-statement nesting in a stack-like manner.

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[Mesa-dev] [PATCH 1/2] st/va: don't re-allocate interlaced buffer with pakced YUV format

2017-09-30 Thread Leo Liu 
It caused corruption, when vlVaPutImage putting YUV to the fields

Cc: mesa-sta...@lists.freedesktop.org
Cc: Andy Furniss 
---
 src/gallium/state_trackers/va/image.c | 8 
 1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/src/gallium/state_trackers/va/image.c 
b/src/gallium/state_trackers/va/image.c
index f87de8e5c4..84990d8a3d 100644
--- a/src/gallium/state_trackers/va/image.c
+++ b/src/gallium/state_trackers/va/image.c
@@ -487,10 +487,11 @@ vlVaPutImage(VADriverContextP ctx, VASurfaceID surface, 
VAImageID image,
  ((format != PIPE_FORMAT_YV12) || (surf->buffer->buffer_format != 
PIPE_FORMAT_NV12)) &&
  ((format != PIPE_FORMAT_IYUV) || (surf->buffer->buffer_format != 
PIPE_FORMAT_NV12))) {
   struct pipe_video_buffer *tmp_buf;
-  struct pipe_video_buffer templat = surf->templat;
 
-  templat.buffer_format = format;
-  tmp_buf = drv->pipe->create_video_buffer(drv->pipe, );
+  surf->templat.buffer_format = format;
+  if (format == PIPE_FORMAT_YUYV || format == PIPE_FORMAT_UYVY)
+ surf->templat.interlaced = false;
+  tmp_buf = drv->pipe->create_video_buffer(drv->pipe, >templat);
 
   if (!tmp_buf) {
  mtx_unlock(>mutex);
@@ -499,7 +500,6 @@ vlVaPutImage(VADriverContextP ctx, VASurfaceID surface, 
VAImageID image,
 
   surf->buffer->destroy(surf->buffer);
   surf->buffer = tmp_buf;
-  surf->templat.buffer_format = format;
}
 
views = surf->buffer->get_sampler_view_planes(surf->buffer);
-- 
2.11.0

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[Mesa-dev] [PATCH 2/2] st/vdpau: don't re-allocate interlaced buffer with packed YUV format

2017-09-30 Thread Leo Liu 
It caused corruption, when vlVdpVideoSurfacePutBitsYCbCr putting YUV to the 
fields

Cc: mesa-sta...@lists.freedesktop.org
Cc: Andy Furniss 
---
 src/gallium/state_trackers/vdpau/surface.c | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/src/gallium/state_trackers/vdpau/surface.c 
b/src/gallium/state_trackers/vdpau/surface.c
index 884ae30831..c678eb7037 100644
--- a/src/gallium/state_trackers/vdpau/surface.c
+++ b/src/gallium/state_trackers/vdpau/surface.c
@@ -350,6 +350,8 @@ vlVdpVideoSurfacePutBitsYCbCr(VdpVideoSurface surface,
 
  /* adjust the template parameters */
  p_surf->templat.buffer_format = nformat;
+ if (nformat == PIPE_FORMAT_YUYV || nformat == PIPE_FORMAT_UYVY)
+p_surf->templat.interlaced = false;
 
  /* and try to create the video buffer with the new format */
  p_surf->video_buffer = pipe->create_video_buffer(pipe, 
_surf->templat);
-- 
2.11.0

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Re: [Mesa-dev] Mesa 17.2.2 release candidate

2017-09-30 Thread Juan A. Suarez Romero 
On Fri, 2017-09-29 at 21:44 +0200, Nicolai Hähnle wrote:
> On 29.09.2017 21:31, Juan A. Suarez Romero wrote:
> > Hello list,
> > 
> > The candidate for the Mesa 17.2.2 is now available. Currently we have:
> >   - 43 queued
> >   - 7 nominated (outstanding)
> >   - and 3 rejected patches
> > 
> > 
> > In the current queue we have:
> > 
> > In build and integration system, we add a dependency on libunwind when
> > running make distcheck, as this is optional for libgallium but we want
> > to catch any problem. As consequence, also force LLVM 3.3 in Travis
> > when building Gallium ST Other, as this is the minimum required version
> > we want to test. On the other hand, we link libmesautil into
> > u_atomic_test, as this is required by platforms without particular
> > atomic operations. In this sense, there's a patch to implement
> > __sync_val_compare_and_swap_8, required by 32-bit PowerPC platforms.
> > Finally, there is also a fix to build in armel devices.
> > 
> > State tracker gets a couple of patches, one that fixes boolean
> > comparison involving 64-bit unsigned integers, and another that fixes a
> > postprocessing issue.
> > 
> > Vulkan's Wayland WSI gets several fixes related with display handling,
> > that was causing crashes.
> > 
> > Intel ANV driver gets a couple of fixes, one about copying descriptors
> > and another for the view transformation.
> > 
> > Intel i965 driver gets also a couple of fixes, one that fixes a crash
> > in Haswell devices when uploading stencil textures using BLORP, and a
> > couple more regarding ARB_shader_atomic_counter_ops implementation.
> > 
> > Broadcom VC4 driver gets several use-after-free fixes, as well as
> > another couple more to fix issues in allocator and shadow resources.
> > 
> > AMD RADV driver gets several fixes to optimize NIR conditionals, fix
> > problems when doing statistics/occlusion queries, and also a workaround
> > fix for GFX9 scissor.
> > 
> > Radeonsi driver gets also several fixes related with OpenGL ES: a
> > workaround for gather4 on integer cube maps, a fix for array textures
> > layer coordinate, and another fix involved with nearest mip selection.
> > 
> > There are also several patches common to all AMD drivers that fixes
> > several cases in texture filtering.
> > 
> > Finally, we have other fixes for SWR, Etnaviv, NV20, the GLSL linker,
> > and EGL/DRI2
> > 
> > Last, but not least, now we support LLVM 5.0 in Gallium drivers.
> > 
> > Take a look at section "Mesa stable queue" for more information.
> > 
> > 
> > Testing reports/general approval
> > 
> > 
> > Any testing reports (or general approval of the state of the branch)
> > will be greatly appreciated.
> > 
> > The plan is to have 17.2.2 next Monday (2nd of October), around or
> > shortly after 09:00 GMT.
> > 
> > If you have any questions or suggestions - be that about the current
> > patch queue or otherwise, please go ahead.
> > 
> > 
> > Trivial merge conflicts
> > ---
> > 
> > commit 996bf9c1cda9a3e18e0a03d16f13e1aae790b1dd
> > Author: Dave Airlie 
> > 
> >  radv/nir: call opt_remove_phis after trivial continues.
> > 
> >  (cherry picked from commit 64d9bd149aa7f5a09f73cae07499577933722fb2)
> > 
> > commit d2dca92a6cec69d71bc63e56d51241a3a5865b59
> > Author: Matt Turner 
> > 
> >  util: Link libmesautil into u_atomic_test
> > 
> >  (cherry picked from commit d075a4089ec62c489c8a3423f82371bf85f2ea6c)
> > 
> > commit 688f8415f7598addad9cd2a9d080fc5b3a48f9d2
> > Author: Nicolai Hähnle 
> > 
> >  amd/common: round cube array slice in ac_prepare_cube_coords
> >  
> >  (cherry picked from commit e0af3bed2cb52b5d8cf1da08b42cf28bae131c76)
> > 
> > 
> > Cheers,
> >   
> >   J.A.
> > 
> > 
> > Mesa stable queue
> > -
> > 
> > Nominated (7)
> > =
> > 
> > Leo Liu (1):
> >st/va: use pipe transfer_map to map upload buffer
> > 
> > Marek Olšák (1):
> >  mesa: fix texture updates for ATI_fragment_shader
> > 
> > Nicolai Hähnle (5):
> >  st/glsl_to_tgsi: fix conditional assignments to packed shader outputs
> >  amd/common: fix build_cube_select
> >  radeonsi/gfx9: fix geometry shaders without output vertices
> >  util/queue: fix a race condition in the fence code
> >  glsl/lower_instruction: handle denorms and overflow in ldexp correctly
> > 
> > 
> > Queued (43)
> > ===
> > 
> > Alexandru-Liviu Prodea (1):
> >Scons: Add LLVM 5.0 support
> > 
> > Boris Brezillon (1):
> >broadcom/vc4: Fix infinite retry in vc4_bo_alloc()
> > 
> > Dave Airlie (3):
> >st/glsl->tgsi: fix u64 to bool comparisons.
> >ac/surface: handle S8 on gfx9
> >  squashed with:
> >ac/surface: handle error when choosing preferred swizzle mode
> >radv/nir: call opt_remove_phis after trivial continues.
> > 
> > David Airlie (1):
> >radv:

Re: [Mesa-dev] [PATCH V2] radeonsi/uvd: fix planar formats broken since f70f6baaa3bb0f8b280ac2eaea69bb

2017-09-30 Thread Christian König 

Am 30.09.2017 um 12:57 schrieb Benedikt Schemmer:

It should be handled as an error if resource_formats[0] is PIPE_FORMAT_NONE.

Better write this as:

if (resource_formats[i] == PIPE_FORMAT_NONE) {
 if (i == 0)
 gotot error;
 continue;
}
...


I dont think it can be zero.
In the beginning of vl_video_buffer.c formats and return values are defined and 
resource_formats[0] is guranteed to not
be PIPE_FORMAT_NONE. The only other return value is null which caught 
immediately after requesting resource_formats
(line 59, in si_uvd.c).
So maybe
assert(resource_formats[0] == PIPE_FORMAT_NONE)
for debugging purposes?



Yeah, that works for me as well.

General idea is that the code should somehow fail gracefully if we see 
an format not supported as a template.


Regards,
Christian.
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[Mesa-dev] [Bug 103018] Add account for Rhys Kidd

2017-09-30 Thread bugzilla-daemon 
https://bugs.freedesktop.org/show_bug.cgi?id=103018

Rhys Kidd  changed:

   What|Removed |Added

   Assignee|sitewranglers@lists.freedes |mesa-dev@lists.freedesktop.
   |ktop.org|org
Version|unspecified |git
  Component|New Accounts|Other
 QA Contact||mesa-dev@lists.freedesktop.
   ||org
Product|freedesktop.org |Mesa

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[Mesa-dev] [PATCH 5/5] travis: add meson build for vulkan drivers.

2017-09-30 Thread Dylan Baker 
Signed-off-by: Dylan Baker 
---
 .travis.yml | 36 
 1 file changed, 36 insertions(+)

diff --git a/.travis.yml b/.travis.yml
index d9a8bf5a9d4..e8fff1b66ab 100644
--- a/.travis.yml
+++ b/.travis.yml
@@ -27,6 +27,7 @@ env:
 - WAYLAND_PROTOCOLS_VERSION=wayland-protocols-1.8
 - PKG_CONFIG_PATH=$HOME/prefix/lib/pkgconfig:$HOME/prefix/share/pkgconfig
 - LD_LIBRARY_PATH="$HOME/prefix/lib:$LD_LIBRARY_PATH"
+- PATH="$HOME/prefix/bin:$PATH"
 
 matrix:
   include:
@@ -393,10 +394,34 @@ matrix:
 - libexpat1-dev
 - libx11-xcb-dev
 - libelf-dev
+- env:
+- LABEL="meson Vulkan"
+- BUILD=meson
+- MESON_OPTIONS="-Dbuild-tests=true"
+  addons:
+apt:
+  sources:
+- llvm-toolchain-trusty-3.9
+  packages:
+# LLVM packaging is broken and misses these dependencies
+- libedit-dev
+# From sources above
+- llvm-3.9-dev
+# Common
+- xz-utils
+- libexpat1-dev
+- libelf-dev
+- python3-pip
 
 install:
   - pip install --user mako
 
+  # Install the latest meson from pip, since the version in the ubuntu repos is
+  # often quite old.
+  - if test "x$BUILD" = xmeson; then
+  pip3 install --user meson;
+fi
+
   # Since libdrm gets updated in configure.ac regularly, try to pick up the
   # latest version from there.
   - for line in `grep "^LIBDRM.*_REQUIRED=" configure.ac`; do
@@ -471,6 +496,11 @@ install:
   - tar -axvf $WAYLAND_PROTOCOLS_VERSION.tar.xz
   - (cd $WAYLAND_PROTOCOLS_VERSION && ./configure --prefix=$HOME/prefix && 
make install)
 
+  # Meson requires ninja >= 1.6, but trusty has 1.3.x
+  - wget 
https://github.com/ninja-build/ninja/releases/download/v1.6.0/ninja-linux.zip;
+  - unzip ninja-linux.zip
+  - mv ninja $HOME/prefix/bin/
+
   # Generate the header since one is missing on the Travis instance
   - mkdir -p linux
   - printf "%s\n" \
@@ -510,3 +540,9 @@ script:
   test -n "$OVERRIDE_CXX" && export CXX="$OVERRIDE_CXX";
   scons $SCONS_TARGET && eval $SCONS_CHECK_COMMAND;
 fi
+
+  - if test "x$BUILD" = xmeson; then
+  cp -r linux src/intel/vulkan/;
+  meson _build $MESON_OPTIONS;
+  ninja -C _build test;
+fi
-- 
2.14.1

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[Mesa-dev] [PATCH 3/5] meson: set C++ standard to C++11

2017-09-30 Thread Dylan Baker 
RadeonSI requires C++11, clover requires C++11, LLVM requires it, so
llvmpipe may require it, and that cover most of the C++ code in mesa.

Signed-off-by: Dylan Baker 
---
 meson.build | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/meson.build b/meson.build
index 15f7f0ea64f..9bc50abe860 100644
--- a/meson.build
+++ b/meson.build
@@ -19,7 +19,7 @@
 # SOFTWARE.
 
 project('mesa', ['c', 'cpp'], version : '17.3.0-devel', license : 'MIT',
-default_options : ['c_std=c99'])
+default_options : ['c_std=c99', 'cpp_std=c++11'])
 
 with_dri3 = true  # XXX: need a switch for this
 with_vulkan_icd_dir = get_option('vulkan_icd_dir')
-- 
2.14.1

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[Mesa-dev] [PATCH 4/5] meson: convert gtest to an internal dependency

2017-09-30 Thread Dylan Baker 
In truth gtest is an external dependency that upstream expects you to
"vendor" into your own tree. As such, it makes sense to treat it more
like a dependency than an internal library, and collect it's
requirements together in a dependency object.

Signed-off-by: Dylan Baker 
---
 src/compiler/nir/meson.build | 4 ++--
 src/gtest/meson.build| 6 ++
 src/intel/compiler/meson.build   | 6 +++---
 src/util/tests/string_buffer/meson.build | 4 ++--
 4 files changed, 13 insertions(+), 7 deletions(-)

diff --git a/src/compiler/nir/meson.build b/src/compiler/nir/meson.build
index c260dca5467..8a85d119530 100644
--- a/src/compiler/nir/meson.build
+++ b/src/compiler/nir/meson.build
@@ -197,8 +197,8 @@ if with_tests
 [files('tests/control_flow_tests.cpp'), nir_opcodes_h],
 c_args : [c_vis_args, c_msvc_compat_args, no_override_init_args],
 include_directories : [inc_common],
-dependencies : [dep_thread],
-link_with : [libmesa_util, libnir, libgtest],
+dependencies : [dep_thread, idep_gtest],
+link_with : [libmesa_util, libnir],
   )
 
   test('nir_control_flow', nir_control_flow_test)
diff --git a/src/gtest/meson.build b/src/gtest/meson.build
index b51504d400a..9832af93e25 100644
--- a/src/gtest/meson.build
+++ b/src/gtest/meson.build
@@ -24,3 +24,9 @@ libgtest = static_library(
   include_directories : include_directories('include'),
   build_by_default : false,
 )
+
+idep_gtest = declare_dependency(
+  link_with : libgtest,
+  include_directories : include_directories('include'),
+  compile_args : ['-Wno-sign-compare'],
+)
diff --git a/src/intel/compiler/meson.build b/src/intel/compiler/meson.build
index e12fa22cf1b..41c2f6ef1db 100644
--- a/src/intel/compiler/meson.build
+++ b/src/intel/compiler/meson.build
@@ -146,9 +146,9 @@ if with_tests
   [t, nir_opcodes_h, ir_expression_operation_h],
   'test_@0@.cpp'.format(t),
   include_directories : [inc_common, inc_intel],
-  link_with : [libgtest, libintel_compiler, libintel_common, libnir,
-   libmesa_util, libisl],
-  dependencies : [dep_thread, dep_dl],
+  link_with : [libintel_compiler, libintel_common, libnir, libmesa_util,
+   libisl],
+  dependencies : [dep_thread, dep_dl, idep_gtest],
 )
 test(t, _exe)
   endforeach
diff --git a/src/util/tests/string_buffer/meson.build 
b/src/util/tests/string_buffer/meson.build
index ea9b8a07dce..14dbebca7d8 100644
--- a/src/util/tests/string_buffer/meson.build
+++ b/src/util/tests/string_buffer/meson.build
@@ -21,9 +21,9 @@
 string_buffer_test = executable(
   'string_buffer_test',
   'string_buffer_test.cpp',
-  dependencies : [dep_thread, dep_dl],
+  dependencies : [dep_thread, dep_dl, idep_gtest],
   include_directories : inc_common,
-  link_with : [libmesa_util, libgtest],
+  link_with : [libmesa_util],
 )
 
 test('string_buffer', string_buffer_test)
-- 
2.14.1

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[Mesa-dev] Add a travis job for meson vulkan

2017-09-30 Thread Dylan Baker 
This adds a job to travis to build the vulkan driver and run some driver checks,
and fix building on travis (which uses a particularly old Ubuntu).

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[Mesa-dev] [PATCH 1/5] meson: look for libelf as a library if there is no pkgconfig

2017-09-30 Thread Dylan Baker 
Required for older versions of libelf that don't have a pkgconfig file.

Signed-off-by: Dylan Baker 
---
 meson.build | 5 -
 1 file changed, 4 insertions(+), 1 deletion(-)

diff --git a/meson.build b/meson.build
index 5353a417484..15f7f0ea64f 100644
--- a/meson.build
+++ b/meson.build
@@ -283,7 +283,10 @@ endif
 dep_zlib = dependency('zlib', version : '>= 1.2.3')
 dep_thread = dependency('threads')
 pre_args += '-DHAVE_PTHREAD'
-dep_elf = dependency('libelf')
+dep_elf = dependency('libelf', required : false)
+if not dep_elf.found()
+  dep_elf = cc.find_library('elf')
+endif
 dep_expat = dependency('expat')
 # this only exists on linux so either this is linux and it will be found, or
 # its not linux and and wont
-- 
2.14.1

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[Mesa-dev] [PATCH 2/5] meson: add window system deps to intel vulkan common

2017-09-30 Thread Dylan Baker 
Signed-off-by: Dylan Baker 
---
 src/intel/vulkan/meson.build | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/intel/vulkan/meson.build b/src/intel/vulkan/meson.build
index a0be95c747c..6ce092e05ce 100644
--- a/src/intel/vulkan/meson.build
+++ b/src/intel/vulkan/meson.build
@@ -135,7 +135,7 @@ libanv_common = static_library(
   include_directories : [inc_common, inc_intel, inc_compiler, inc_drm_uapi,
  inc_vulkan_util, inc_vulkan_wsi],
   c_args : [c_vis_args, no_override_init_args, '-msse2', anv_flags],
-  dependencies : [dep_valgrind],
+  dependencies : [dep_valgrind, anv_deps, dep_libdrm],
 )
 
 libvulkan_intel = shared_library(
-- 
2.14.1

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Re: [Mesa-dev] [PATCH 02/19] radv: do not allocate CMASK for unsupported 128 bit formats

2017-09-30 Thread Bas Nieuwenhuizen 
Do we know if this does not have any improvement for 128 bit MSAA,
even without fast clear?

On Fri, Sep 29, 2017 at 5:48 PM, Samuel Pitoiset
 wrote:
> Signed-off-by: Samuel Pitoiset 
> ---
>  src/amd/vulkan/radv_image.c  | 3 ++-
>  src/amd/vulkan/radv_meta_clear.c | 5 -
>  2 files changed, 2 insertions(+), 6 deletions(-)
>
> diff --git a/src/amd/vulkan/radv_image.c b/src/amd/vulkan/radv_image.c
> index c0578ff5d3..ce446f6569 100644
> --- a/src/amd/vulkan/radv_image.c
> +++ b/src/amd/vulkan/radv_image.c
> @@ -864,7 +864,8 @@ radv_image_create(VkDevice _device,
> if ((pCreateInfo->usage & VK_IMAGE_USAGE_COLOR_ATTACHMENT_BIT) &&
> pCreateInfo->mipLevels == 1 &&
> !image->surface.dcc_size && image->info.depth == 1 && 
> can_cmask_dcc &&
> -   !image->surface.is_linear)
> +   !image->surface.is_linear &&
> +   image->surface.bpe <= 8) /* 128 bit formats not supported */
> radv_image_alloc_cmask(device, image);
>
> if (image->info.samples > 1 && 
> vk_format_is_color(pCreateInfo->format)) {
> diff --git a/src/amd/vulkan/radv_meta_clear.c 
> b/src/amd/vulkan/radv_meta_clear.c
> index 62c920e869..8f94242c5d 100644
> --- a/src/amd/vulkan/radv_meta_clear.c
> +++ b/src/amd/vulkan/radv_meta_clear.c
> @@ -1038,11 +1038,6 @@ emit_fast_color_clear(struct radv_cmd_buffer 
> *cmd_buffer,
> radv_set_dcc_need_cmask_elim_pred(cmd_buffer, iview->image,
>   !can_avoid_fast_clear_elim);
> } else {
> -
> -   if (iview->image->surface.bpe > 8) {
> -   /* 128 bit formats not supported */
> -   return false;
> -   }
> radv_fill_buffer(cmd_buffer, iview->image->bo,
>  iview->image->offset + 
> iview->image->cmask.offset,
>  iview->image->cmask.size, 0);
> --
> 2.14.2
>
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