Help with diff for Samsung 950 Pro NVMe (unable to map registers)

2015-11-16 Thread Josh 
Hi,

Trying to get it recognized and initialized (Model Code MZ-V5P512BW)
Using 16th November snapshot:
...snip... (full dmesg below)
ppb2 at pci0 dev 28 function 4 "Intel 9 Series PCIE" rev 0xe3: msi
pci3 at ppb2 bus 3
vendor "Samsung", unknown product 0xa802 (class mass storage unknown
subclass 0x08, rev 0x01) at pci3 dev 0 function 0 not configured
ehci0 at pci0 dev 29 function 0 "Intel 9 Series USB" rev 0x03: apic 2 int 23
...

Applied the following diff:

*** ahci_pci.c.orig Sat Mar 14 11:38:48 2015
--- ahci_pci.c  Mon Nov 16 20:21:36 2015
***
*** 152,157 
--- 152,159 
NULL,   ahci_samsung_attach },
{ PCI_VENDOR_SAMSUNG2,  PCI_PRODUCT_SAMSUNG2_SM951,
NULL,   ahci_samsung_attach },
+   { PCI_VENDOR_SAMSUNG2,  PCI_PRODUCT_SAMSUNG2_950PRO,
+   NULL,   ahci_samsung_attach },

{ PCI_VENDOR_VIATECH,   PCI_PRODUCT_VIATECH_VT8251_SATA,
  ahci_no_match,ahci_vt8251_attach }

*** pcidevs.h.orig  Sat Nov 14 19:25:53 2015
--- pcidevs.h   Mon Nov 16 11:48:27 2015
***
*** 6387,6392 
--- 6387,6393 
  #define   PCI_PRODUCT_SAMSUNG2_S4LN053X01 0x1600  /* S4LN053X01
*/
  #define   PCI_PRODUCT_SAMSUNG2_XP941  0xa800  /* XP941 */
  #define   PCI_PRODUCT_SAMSUNG2_SM951  0xa801  /* SM951 */
+ #define   PCI_PRODUCT_SAMSUNG2_950PRO 0xa802  /* 950PRO */

  /* Sangoma products */
  #define   PCI_PRODUCT_SANGOMA_A10X0x0300  /* A10x */

*** pcidevs.origSat Nov 14 19:25:53 2015
--- pcidevs Mon Nov 16 11:47:59 2015
***
*** 6382,6387 
--- 6382,6388 
  product SAMSUNG2 S4LN053X01   0x1600  S4LN053X01
  product SAMSUNG2 XP9410xa800  XP941
  product SAMSUNG2 SM9510xa801  SM951
+ product SAMSUNG2 950PRO 0xa802950PRO

  /* Sangoma products */
  product SANGOMA A10X  0x0300  A10x

*** pcidevs_data.h.orig Sat Nov 14 19:25:53 2015
--- pcidevs_data.h  Mon Nov 16 11:49:24 2015
***
*** 22240,22245 
--- 22240,22249 
"SM951",
},
{
+   PCI_VENDOR_SAMSUNG2, PCI_PRODUCT_SAMSUNG2_950PRO,
+   "950PRO",
+   },
+   {
PCI_VENDOR_SANGOMA, PCI_PRODUCT_SANGOMA_A10X,
"A10x",
},

dmesg after compiling / rebooting:
... snip ...
ppb2 at pci0 dev 28 function 4 "Intel 9 Series PCIE" rev 0xe3: msi
pci3 at ppb2 bus 3
ahci0 at pci3 dev 0 function 0 "Samsung 950PRO" rev 0x01: apic 2 int
16, unable to map registers
ehci0 at pci0 dev 29 function 0 "Intel 9 Series USB" rev 0x03: apic 2 int 23
...

The device is "recognized" but unable to map registers. I am certainly
missing something. Any help would be greatly appreciated. (below full
pcidump and dmesg before and after the above patch).

Cheers

pcidump output

Domain /dev/pci0:
 0:0:0: Intel Core 5G Host
0x: Vendor ID: 8086 Product ID: 1604
0x0004: Command: 0006 Status: 2090
0x0008: Class: 06 Subclass: 00 Interface: 00 Revision: 09
0x000c: BIST: 00 Header Type: 00 Latency Timer: 00 Cache Line Size: 00
0x0010: BAR empty ()
0x0014: BAR empty ()
0x0018: BAR empty ()
0x001c: BAR empty ()
0x0020: BAR empty ()
0x0024: BAR empty ()
0x0028: Cardbus CIS: 
0x002c: Subsystem Vendor ID: 8086 Product ID: 2057
0x0030: Expansion ROM Base Address: 
0x0038: 
0x003c: Interrupt Pin: 00 Line: 00 Min Gnt: 00 Max Lat: 00
0x00e0: Capability 0x09: Vendor Specific
 0:2:0: Intel Iris Graphics 6100
0x: Vendor ID: 8086 Product ID: 162b
0x0004: Command: 0007 Status: 0090
0x0008: Class: 03 Subclass: 00 Interface: 00 Revision: 09
0x000c: BIST: 00 Header Type: 00 Latency Timer: 00 Cache Line Size: 00
0x0010: BAR mem 64bit addr: 0x7900/0x0100
0x0018: BAR mem prefetchable 64bit addr: 0x8000/0x4000
0x0020: BAR io addr: 0x4000/0x0040
0x0024: BAR empty ()
0x0028: Cardbus CIS: 
0x002c: Subsystem Vendor ID: 8086 Product ID: 2057
0x0030: Expansion ROM Base Address: 
0x0038: 
0x003c: Interrupt Pin: 01 Line: 0b Min Gnt: 00 Max Lat: 00
0x0090: Capability 0x05: Message Signaled Interrupts (MSI)
0x00d0: Capability 0x01: Power Management
0x00a4: Capability 0x13: PCI Advanced Features
 0:3:0: Intel Core 5G HD Audio
0x: Vendor ID: 8086 Product ID: 160c
0x0004: Command: 0006 Status: 0010
0x0008: Class: 04 Subclass: 03 Interface: 00 Revision: 09
0x000c: BIST: 00 Header Type: 00 Latency Timer: 00 Cache Line Size: 00
0x0010: BAR mem 64bit addr: 0x7a234000/0x4000
0x0018: BAR empty ()
0x001c: BAR empty ()
0x0020: BAR empty ()
0x0024: BAR empty ()
0x0028: Cardbus CIS:

Re: Help with diff for Samsung 950 Pro NVMe (unable to map registers)

2015-11-16 Thread Ted Unangst 
Josh wrote:
> Hi,
> 
> Trying to get it recognized and initialized (Model Code MZ-V5P512BW)
> Using 16th November snapshot:
> ...snip... (full dmesg below)
> ppb2 at pci0 dev 28 function 4 "Intel 9 Series PCIE" rev 0xe3: msi
> pci3 at ppb2 bus 3
> vendor "Samsung", unknown product 0xa802 (class mass storage unknown
> subclass 0x08, rev 0x01) at pci3 dev 0 function 0 not configured
> ehci0 at pci0 dev 29 function 0 "Intel 9 Series USB" rev 0x03: apic 2 int 23
> ...
> 
> Applied the following diff:
> 
> *** ahci_pci.c.orig Sat Mar 14 11:38:48 2015
> --- ahci_pci.c  Mon Nov 16 20:21:36 2015
> ***
> *** 152,157 
> --- 152,159 
> NULL,   ahci_samsung_attach },
> { PCI_VENDOR_SAMSUNG2,  PCI_PRODUCT_SAMSUNG2_SM951,
> NULL,   ahci_samsung_attach },
> +   { PCI_VENDOR_SAMSUNG2,  PCI_PRODUCT_SAMSUNG2_950PRO,
> +   NULL,   ahci_samsung_attach },
> 
> { PCI_VENDOR_VIATECH,   PCI_PRODUCT_VIATECH_VT8251_SATA,
>   ahci_no_match,ahci_vt8251_attach }

Does the 950 pro nvme support sata mode? The quirk for the interrupts isn't
anything like native nvme support. I imagine at some point newer drives are
going to stop pretending to have sata interfaces.

Re: Help with diff for Samsung 950 Pro NVMe (unable to map registers)

2015-11-16 Thread Josh 
Thanks Ted for the reply and the hint.
After a bit of research, it seems the 950 Pro use a PCIe NVMe
interface as opposed to the SM951 (already in the CVS tree) using PCIe
AHCI interface.
I did not find any mention of backwards compatibility with AHCI so far
for the 950 Pro and might correlate with your assumption.

A bit more research brought me to the nvme [1] driver found in
FreeBSD. Was there any attempts into porting that?
I am not a developer, but would be happy to help in testing patch/source code.

Cheers,

[1] https://www.freebsd.org/cgi/man.cgi?query=nvme=4


On Mon, Nov 16, 2015 at 11:32 PM, Ted Unangst  wrote:
> Josh wrote:
>> Hi,
>>
>> Trying to get it recognized and initialized (Model Code MZ-V5P512BW)
>> Using 16th November snapshot:
>> ...snip... (full dmesg below)
>> ppb2 at pci0 dev 28 function 4 "Intel 9 Series PCIE" rev 0xe3: msi
>> pci3 at ppb2 bus 3
>> vendor "Samsung", unknown product 0xa802 (class mass storage unknown
>> subclass 0x08, rev 0x01) at pci3 dev 0 function 0 not configured
>> ehci0 at pci0 dev 29 function 0 "Intel 9 Series USB" rev 0x03: apic 2 int 23
>> ...
>>
>> Applied the following diff:
>>
>> *** ahci_pci.c.orig Sat Mar 14 11:38:48 2015
>> --- ahci_pci.c  Mon Nov 16 20:21:36 2015
>> ***
>> *** 152,157 
>> --- 152,159 
>> NULL,   ahci_samsung_attach },
>> { PCI_VENDOR_SAMSUNG2,  PCI_PRODUCT_SAMSUNG2_SM951,
>> NULL,   ahci_samsung_attach },
>> +   { PCI_VENDOR_SAMSUNG2,  PCI_PRODUCT_SAMSUNG2_950PRO,
>> +   NULL,   ahci_samsung_attach },
>>
>> { PCI_VENDOR_VIATECH,   PCI_PRODUCT_VIATECH_VT8251_SATA,
>>   ahci_no_match,ahci_vt8251_attach }
>
> Does the 950 pro nvme support sata mode? The quirk for the interrupts isn't
> anything like native nvme support. I imagine at some point newer drives are
> going to stop pretending to have sata interfaces.

Re: Help with diff for Samsung 950 Pro NVMe (unable to map registers)

2015-11-16 Thread Janne Johansson 
There is some preliminary work in the obsd tree also from dlg@:
http://cvsweb.openbsd.org/cgi-bin/cvsweb/src/sys/dev/pci/nvme_pci.c


2015-11-17 3:00 GMT+01:00 Josh :

> Thanks Ted for the reply and the hint.
> After a bit of research, it seems the 950 Pro use a PCIe NVMe
> interface as opposed to the SM951 (already in the CVS tree) using PCIe
> AHCI interface.
> I did not find any mention of backwards compatibility with AHCI so far
> for the 950 Pro and might correlate with your assumption.
>
> A bit more research brought me to the nvme [1] driver found in
> FreeBSD. Was there any attempts into porting that?
> I am not a developer, but would be happy to help in testing patch/source
> code.
>
> Cheers,
>
> [1] https://www.freebsd.org/cgi/man.cgi?query=nvme=4
>
>
> On Mon, Nov 16, 2015 at 11:32 PM, Ted Unangst  wrote:
> > Josh wrote:
> >> Hi,
> >>
> >> Trying to get it recognized and initialized (Model Code MZ-V5P512BW)
> >> Using 16th November snapshot:
> >> ...snip... (full dmesg below)
> >> ppb2 at pci0 dev 28 function 4 "Intel 9 Series PCIE" rev 0xe3: msi
> >> pci3 at ppb2 bus 3
> >> vendor "Samsung", unknown product 0xa802 (class mass storage unknown
> >> subclass 0x08, rev 0x01) at pci3 dev 0 function 0 not configured
> >> ehci0 at pci0 dev 29 function 0 "Intel 9 Series USB" rev 0x03: apic 2
> int 23
> >> ...
> >>
> >> Applied the following diff:
> >>
> >> *** ahci_pci.c.orig Sat Mar 14 11:38:48 2015
> >> --- ahci_pci.c  Mon Nov 16 20:21:36 2015
> >> ***
> >> *** 152,157 
> >> --- 152,159 
> >> NULL,   ahci_samsung_attach },
> >> { PCI_VENDOR_SAMSUNG2,  PCI_PRODUCT_SAMSUNG2_SM951,
> >> NULL,   ahci_samsung_attach },
> >> +   { PCI_VENDOR_SAMSUNG2,  PCI_PRODUCT_SAMSUNG2_950PRO,
> >> +   NULL,   ahci_samsung_attach },
> >>
> >> { PCI_VENDOR_VIATECH,   PCI_PRODUCT_VIATECH_VT8251_SATA,
> >>   ahci_no_match,ahci_vt8251_attach }
> >
> > Does the 950 pro nvme support sata mode? The quirk for the interrupts
> isn't
> > anything like native nvme support. I imagine at some point newer drives
> are
> > going to stop pretending to have sata interfaces.
>
>


-- 
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