securelevel(7) and gpioctl(8)

2008-12-09 Thread Lars D . Noodén 

On Mon, 8 Dec 2008, Marc Balmer wrote:

NB:  not all arches have GPIO.


Thanks. Ok.  I see now.  The online pages return a result only for items 
present in all architectures.


The need for Securelevel 0 was mentioned.  Does that mean the device must 
operate in securelevel 0 in order to turn on and off one of the JP5 pins? 
Or just that they must be attached and then can be used for IO after 
switching to securelevel 1?


Also, can a custom kernal be avoided?  One appears to be needed in this 
note:

http://www.vnode.ch/reworking_gpio

Regards,
-Lars
Lars Nooden

Re: securelevel(7) and gpioctl(8)

2008-12-09 Thread Marc Balmer 
* Lars D. Noodin wrote:
 On Mon, 8 Dec 2008, Marc Balmer wrote:
 NB:  not all arches have GPIO.

 Thanks. Ok.  I see now.  The online pages return a result only for items
 present in all architectures.

 The need for Securelevel 0 was mentioned.  Does that mean the device must
 operate in securelevel 0 in order to turn on and off one of the JP5 pins?
 Or just that they must be attached and then can be used for IO after
 switching to securelevel 1?

The latter is the case.


 Also, can a custom kernal be avoided?  One appears to be needed in this
 note:
   http://www.vnode.ch/reworking_gpio

A custom kernel is no longer needed.


 Regards,
 -Lars
 Lars Nooden

--
Marc Balmer, Micro Systems, Wiesendamm 2a, Postfach, CH-4019 Basel,
Switzerland
http://www.msys.ch/ http://www.vnode.ch/   In God we trust, in C we
code.