Re: [PATCH V4 0/8] net: ethernet: stmmac: add support for stm32mp1

[Alexandre Torgue]

Hi Christophe,

On 05/23/2018 05:47 PM, Christophe Roullier wrote:

Patches to have Ethernet support on stm32mp1
Changelog:
Remark from Rob Herring
Move Documentation/devicetree/bindings/arm/stm32.txt in
Documentation/devicetree/bindings/arm/stm32/stm32.txt and create
Documentation/devicetree/bindings/arm/stm32/stm32-syscon.txt

Replace also in arch/arm/boot/dts/stm32mp157c.dtsi, syscfg: 
system-config@5002
with syscfg: syscon@5002syscfg: system-config@5002

Christophe Roullier (8):
   net: ethernet: stmmac: add adaptation for stm32mp157c.
   dt-bindings: stm32-dwmac: add support of MPU families
   ARM: dts: stm32: add ethernet pins to stm32mp157c
   ARM: dts: stm32: Add syscfg on stm32mp1
   ARM: dts: stm32: Add ethernet dwmac on stm32mp1
   net: stmmac: add dwmac-4.20a compatible
   ARM: dts: stm32: add support of ethernet on stm32mp157c-ev1
   dt-bindings: stm32: add compatible for syscon

  Documentation/devicetree/bindings/arm/stm32.txt|  10 -
  .../devicetree/bindings/arm/stm32/stm32-syscon.txt |  14 ++
  .../devicetree/bindings/arm/stm32/stm32.txt|  10 +
  .../devicetree/bindings/net/stm32-dwmac.txt|  18 +-
  arch/arm/boot/dts/stm32mp157-pinctrl.dtsi  |  46 
  arch/arm/boot/dts/stm32mp157c-ev1.dts  |  20 ++
  arch/arm/boot/dts/stm32mp157c.dtsi |  35 +++
  drivers/net/ethernet/stmicro/stmmac/dwmac-stm32.c  | 270 +++--
  .../net/ethernet/stmicro/stmmac/stmmac_platform.c  |   3 +-
  9 files changed, 398 insertions(+), 28 deletions(-)
  delete mode 100644 Documentation/devicetree/bindings/arm/stm32.txt
  create mode 100644 
Documentation/devicetree/bindings/arm/stm32/stm32-syscon.txt
  create mode 100644 Documentation/devicetree/bindings/arm/stm32/stm32.txt



As discussed I squashed "ARM: dts: stm32: add ethernet pins to 
stm32mp157c" and "ARM: dts: stm32: add support of ethernet on 
stm32mp157c-ev1" ans fixed interrupt binding issue.


So DT patches applied on stm32-next.

regards
Alex

Re: [PATCH V4 5/8] ARM: dts: stm32: Add ethernet dwmac on stm32mp1

[Alexandre Torgue]

Hi christophe

On 05/23/2018 05:47 PM, Christophe Roullier wrote:

Add Ethernet support (Synopsys MAC IP 4.20a) on stm32mp1 SOC.
Enable feature supported by the stmmac driver, such as TSO.

Signed-off-by: Christophe Roullier 
---
  arch/arm/boot/dts/stm32mp157c.dtsi | 30 ++
  1 file changed, 30 insertions(+)

diff --git a/arch/arm/boot/dts/stm32mp157c.dtsi 
b/arch/arm/boot/dts/stm32mp157c.dtsi
index 3db03a2..ea7b6cb 100644
--- a/arch/arm/boot/dts/stm32mp157c.dtsi
+++ b/arch/arm/boot/dts/stm32mp157c.dtsi
@@ -179,5 +179,35 @@
clocks = < USART1_K>;
status = "disabled";
};
+
+   stmmac_axi_config_0: stmmac-axi-config {
+   snps,wr_osr_lmt = <0x7>;
+   snps,rd_osr_lmt = <0x7>;
+   snps,blen = <0 0 0 0 16 8 4>;
+   };
+
+   ethernet0: ethernet@5800a000 {
+   compatible = "st,stm32mp1-dwmac", "snps,dwmac-4.20a";
+   reg = <0x5800a000 0x2000>;
+   reg-names = "stmmaceth";
+   interrupts-extended = < GIC_SPI 61 IRQ_TYPE_NONE>;


IRQ_TYPE_NONE souldn't be used. Please provide edge sensitiv or level 
sensitic type.



+   interrupt-names = "macirq";
+   clock-names = "stmmaceth",
+ "mac-clk-tx",
+ "mac-clk-rx",
+ "ethstp",
+ "syscfg-clk";
+   clocks = < ETHMAC>,
+< ETHTX>,
+< ETHRX>,
+< ETHSTP>,
+< SYSCFG>;
+   st,syscon = < 0x4>;
+   snps,mixed-burst;
+   snps,pbl = <2>;
+   snps,axi-config = <_axi_config_0>;
+   snps,tso;
+   status = "disabled";
+   };
};
  };

Re: [PATCH V4 1/8] net: ethernet: stmmac: add adaptation for stm32mp157c.

[Alexandre Torgue]

Hi,

On 05/23/2018 05:47 PM, Christophe Roullier wrote:

Glue codes to support stm32mp157c device and stay
compatible with stm32 mcu family

Signed-off-by: Christophe Roullier <christophe.roull...@st.com>
---


Acked-by: Alexandre TORGUE <alexandre.tor...@st.com>


  drivers/net/ethernet/stmicro/stmmac/dwmac-stm32.c | 270 --
  1 file changed, 255 insertions(+), 15 deletions(-)

diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac-stm32.c 
b/drivers/net/ethernet/stmicro/stmmac/dwmac-stm32.c
index 9e6db16..f51e327 100644
--- a/drivers/net/ethernet/stmicro/stmmac/dwmac-stm32.c
+++ b/drivers/net/ethernet/stmicro/stmmac/dwmac-stm32.c
@@ -16,49 +16,183 @@
  #include 
  #include 
  #include 
+#include 
  #include 
  #include 
  #include 
  
  #include "stmmac_platform.h"
  
-#define MII_PHY_SEL_MASK	BIT(23)

+#define SYSCFG_MCU_ETH_MASKBIT(23)
+#define SYSCFG_MP1_ETH_MASKGENMASK(23, 16)
+
+#define SYSCFG_PMCR_ETH_CLK_SELBIT(16)
+#define SYSCFG_PMCR_ETH_REF_CLK_SELBIT(17)
+#define SYSCFG_PMCR_ETH_SEL_MIIBIT(20)
+#define SYSCFG_PMCR_ETH_SEL_RGMII  BIT(21)
+#define SYSCFG_PMCR_ETH_SEL_RMII   BIT(23)
+#define SYSCFG_PMCR_ETH_SEL_GMII   0
+#define SYSCFG_MCU_ETH_SEL_MII 0
+#define SYSCFG_MCU_ETH_SEL_RMII1
  
  struct stm32_dwmac {

struct clk *clk_tx;
struct clk *clk_rx;
+   struct clk *clk_eth_ck;
+   struct clk *clk_ethstp;
+   struct clk *syscfg_clk;
+   bool int_phyclk;/* Clock from RCC to drive PHY */
u32 mode_reg;   /* MAC glue-logic mode register */
struct regmap *regmap;
u32 speed;
+   const struct stm32_ops *ops;
+   struct device *dev;
+};
+
+struct stm32_ops {
+   int (*set_mode)(struct plat_stmmacenet_data *plat_dat);
+   int (*clk_prepare)(struct stm32_dwmac *dwmac, bool prepare);
+   int (*suspend)(struct stm32_dwmac *dwmac);
+   void (*resume)(struct stm32_dwmac *dwmac);
+   int (*parse_data)(struct stm32_dwmac *dwmac,
+ struct device *dev);
+   u32 syscfg_eth_mask;
  };
  
  static int stm32_dwmac_init(struct plat_stmmacenet_data *plat_dat)

  {
struct stm32_dwmac *dwmac = plat_dat->bsp_priv;
-   u32 reg = dwmac->mode_reg;
-   u32 val;
int ret;
  
-	val = (plat_dat->interface == PHY_INTERFACE_MODE_MII) ? 0 : 1;

-   ret = regmap_update_bits(dwmac->regmap, reg, MII_PHY_SEL_MASK, val);
-   if (ret)
-   return ret;
+   if (dwmac->ops->set_mode) {
+   ret = dwmac->ops->set_mode(plat_dat);
+   if (ret)
+   return ret;
+   }
  
  	ret = clk_prepare_enable(dwmac->clk_tx);

if (ret)
return ret;
  
-	ret = clk_prepare_enable(dwmac->clk_rx);

-   if (ret)
-   clk_disable_unprepare(dwmac->clk_tx);
+   if (!dwmac->dev->power.is_suspended) {
+   ret = clk_prepare_enable(dwmac->clk_rx);
+   if (ret) {
+   clk_disable_unprepare(dwmac->clk_tx);
+   return ret;
+   }
+   }
+
+   if (dwmac->ops->clk_prepare) {
+   ret = dwmac->ops->clk_prepare(dwmac, true);
+   if (ret) {
+   clk_disable_unprepare(dwmac->clk_rx);
+   clk_disable_unprepare(dwmac->clk_tx);
+   }
+   }
  
  	return ret;

  }
  
+static int stm32mp1_clk_prepare(struct stm32_dwmac *dwmac, bool prepare)

+{
+   int ret = 0;
+
+   if (prepare) {
+   ret = clk_prepare_enable(dwmac->syscfg_clk);
+   if (ret)
+   return ret;
+
+   if (dwmac->int_phyclk) {
+   ret = clk_prepare_enable(dwmac->clk_eth_ck);
+   if (ret) {
+   clk_disable_unprepare(dwmac->syscfg_clk);
+   return ret;
+   }
+   }
+   } else {
+   clk_disable_unprepare(dwmac->syscfg_clk);
+   if (dwmac->int_phyclk)
+   clk_disable_unprepare(dwmac->clk_eth_ck);
+   }
+   return ret;
+}
+
+static int stm32mp1_set_mode(struct plat_stmmacenet_data *plat_dat)
+{
+   struct stm32_dwmac *dwmac = plat_dat->bsp_priv;
+   u32 reg = dwmac->mode_reg;
+   int val;
+
+   switch (plat_dat->interface) {
+   case PHY_INTERFACE_MODE_MII:
+   val = SYSCFG_PMCR_ETH_SEL_MII;
+   pr_debug("SYSCFG init : PHY_INTERFACE_MODE_MII\n");
+   break;
+   case PHY_INTERFACE_MODE_GMII:
+   val = SYSCFG_PMCR_ETH_SEL_GMII;
+   if (dwmac->int_phyclk)
+   val |= SYSCFG_PMCR_ETH_CLK_SEL;
+   pr_de

Re: [PATCH V4 0/8] net: ethernet: stmmac: add support for stm32mp1

[Alexandre Torgue]

On 05/23/2018 10:08 PM, David Miller wrote:

From: Christophe Roullier 
Date: Wed, 23 May 2018 17:47:51 +0200


Patches to have Ethernet support on stm32mp1
Changelog:
Remark from Rob Herring
Move Documentation/devicetree/bindings/arm/stm32.txt in
Documentation/devicetree/bindings/arm/stm32/stm32.txt and create
Documentation/devicetree/bindings/arm/stm32/stm32-syscon.txt

Replace also in arch/arm/boot/dts/stm32mp157c.dtsi, syscfg: 
system-config@5002
with syscfg: syscon@5002syscfg: system-config@5002


Probably the DTS file updates need to go in via the ARM tree, not
mine.


Yes I will take them in my tree



Can you respin a net-next targetted series that has just the driver
code and device tree binding updates?

Thank you!
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Re: [PATCH net-next] net: stmmac: Add Jose Abreu as co-maintainer

[Alexandre Torgue]

On 05/14/2018 11:29 AM, Jose Abreu wrote:

I'm offering to be a co-maintainer for stmmac driver.

As per discussion with Alexandre, I will arranje to get STM32 boards to
test patches in GMAC version 3.x and 4.1. I also have HW to test GMAC
version 5.

Looking forward to contribute to net-dev!

Signed-off-by: Jose Abreu <joab...@synopsys.com>
Cc: David S. Miller <da...@davemloft.net>
Cc: Joao Pinto <jpi...@synopsys.com>
Cc: Alexandre Torgue <alexandre.tor...@st.com>
Cc: Giuseppe Cavallaro <peppe.cavall...@st.com>
---
  MAINTAINERS |1 +
  1 files changed, 1 insertions(+), 0 deletions(-)

diff --git a/MAINTAINERS b/MAINTAINERS
index cecf461..c6989d0 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -13385,6 +13385,7 @@ F:  drivers/media/usb/stk1160/
  STMMAC ETHERNET DRIVER
  M:Giuseppe Cavallaro <peppe.cavall...@st.com>
  M:Alexandre Torgue <alexandre.tor...@st.com>
+M: Jose Abreu <joab...@synopsys.com>
  L:netdev@vger.kernel.org
  W:http://www.stlinux.com
  S:Supported



Thanks for this proposition.

Acked-by: Alexandre TORGUE <alexandre.tor...@st.com>

Re: [PATCH] net: stmmac: Avoid VLA usage

[Alexandre Torgue]

On 05/02/2018 04:07 PM, Jose Abreu wrote:



On 02-05-2018 13:36, Kees Cook wrote:

On Wed, May 2, 2018 at 1:54 AM, Jose Abreu  wrote:

Hi Kees,

On 01-05-2018 22:01, Kees Cook wrote:

In the quest to remove all stack VLAs from the kernel[1], this switches
the "status" stack buffer to use the existing small (8) upper bound on
how many queues can be checked for DMA, and adds a sanity-check just to
make sure it doesn't operate under pathological conditions.

[1] 
https://urldefense.proofpoint.com/v2/url?u=http-3A__lkml.kernel.org_r_CA-2B55aFzCG-2DzNmZwX4A2FQpadafLfEzK6CC-3DqPXydAacU1RqZWA-40mail.gmail.com=DwIBAg=DPL6_X_6JkXFx7AXWqB0tg=WHDsc6kcWAl4i96Vm5hJ_19IJiuxx_p_Rzo2g-uHDKw=TBD6a7UY2VbpPmV9LOW_eHAyg8uPq1ZPDhq93VROTVE=4fvOST1HhWmZ4lThQe-dHCJYEXNOwey00BCXOWm8tKo=

Signed-off-by: Kees Cook 


I rather prefer the variables declaration in reverse-tree order,
but thats just a minor pick.

I can explicitly reorder the other variables, if you want?


No need by me, unless Giuseppe or Alexandre prefer that. Thanks!


No need.



Best Regards,
Jose Miguel Abreu




Reviewed-by: Jose Abreu 

Thanks!


PS: Is VLA warning switch in gcc already active? Because I didn't
see this warning in my builds.

It is not. A bunch of people have been building with KCFLAGS=-Wvla to
find the VLAs and sending patches. Once we get rid of them all, we can
add the flag to the top-level Makefile.

-Kees

Re: [PATCH 3/8] ARM: dts: stm32: add ethernet pins to stm32mp157c

[Alexandre Torgue]

Hi Rob,

On 04/25/2018 05:09 PM, Rob Herring wrote:

On Tue, Apr 24, 2018 at 10:01 AM, Christophe Roullier
 wrote:

Add ethernet pins on stm32mp157c.

Signed-off-by: Christophe Roullier 
---
  arch/arm/boot/dts/stm32mp157-pinctrl.dtsi | 46 +++
  1 file changed, 46 insertions(+)

diff --git a/arch/arm/boot/dts/stm32mp157-pinctrl.dtsi 
b/arch/arm/boot/dts/stm32mp157-pinctrl.dtsi
index 6f044100..86720a5 100644
--- a/arch/arm/boot/dts/stm32mp157-pinctrl.dtsi
+++ b/arch/arm/boot/dts/stm32mp157-pinctrl.dtsi
@@ -158,6 +158,52 @@
 bias-disable;
 };
 };
+
+   ethernet0_rgmii_pins_a: rgmii@0 {


A unit-address without 'reg' property is not valid, so drop the '@0'.


Thanks for the highlights. We could replace rgmii@0 by rgmii-0.
If no objections, I will send a series to update all STM32 device tree 
files (MCUs legacy). I will take care about it for future STM32 DT review.


Thanks
Alex


Please build your dtb with W=1 or W=12 which will tell you this and
other errors.




Rob

Re: [PATCH] ethernet: dwmac-stm32: Fix copyright

[Alexandre Torgue]

On 11/29/2017 03:20 PM, Benjamin Gaignard wrote:

Uniformize STMicroelectronics copyrights header

Signed-off-by: Benjamin Gaignard <benjamin.gaign...@st.com>
CC: Alexandre Torgue <alexandre.tor...@st.com>
---
  drivers/net/ethernet/stmicro/stmmac/dwmac-stm32.c | 4 ++--
  1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac-stm32.c 
b/drivers/net/ethernet/stmicro/stmmac/dwmac-stm32.c
index 61cb24810d10..9e6db16af663 100644
--- a/drivers/net/ethernet/stmicro/stmmac/dwmac-stm32.c
+++ b/drivers/net/ethernet/stmicro/stmmac/dwmac-stm32.c
@@ -1,8 +1,8 @@
  /*
   * dwmac-stm32.c - DWMAC Specific Glue layer for STM32 MCU
   *
- * Copyright (C) Alexandre Torgue 2015
- * Author:  Alexandre Torgue <alexandre.tor...@gmail.com>
+ * Copyright (C) STMicroelectronics SA 2017
+ * Author:  Alexandre Torgue <alexandre.tor...@st.com> for STMicroelectronics.
   * License terms:  GNU General Public License (GPL), version 2
   *
   */


Acked-by: Alexandre TORGUE <alexandre.tor...@st.com>

Re: [PATCH net-next] bindings: net: stmmac: correctify note about LPI interrupt

[Alexandre Torgue]

On 11/09/2017 06:09 PM, Niklas Cassel wrote:

There are two different combined signal for various interrupt events:
In EQOS-CORE and EQOS-MTL configurations, mci_intr_o is the interrupt
signal.
In EQOS-DMA, EQOS-AHB and EQOS-AXI configurations, these interrupt events
are combined with the events in the DMA on the sbd_intr_o signal.

Depending on configuration, the device tree irq "macirq" will refer to
either mci_intr_o or sbd_intr_o.

The databook states:
"The MAC generates the LPI interrupt when the Tx or Rx side enters or exits
the LPI state. The interrupt mci_intr_o (sbd_intr_o in certain
configurations) is asserted when the LPI interrupt status is set.

When the MAC exits the Rx LPI state, then in addition to the mci_intr_o
(sbd_intr_o in certain configurations), the sideband signal lpi_intr_o is
asserted.

If you do not want to gate-off the application clock during the Rx LPI
state, you can leave the lpi_intr_o signal unconnected and use the
mci_intr_o (sbd_intr_o in certain configurations) signal to detect Rx LPI
exit."

Since the "macirq" is always raised when Tx or Rx enters/exits the LPI
state, "eth_lpi" must therefore refer to lpi_intr_o, which is only raised
when Rx exits the LPI state. Update the DT binding description to reflect
reality.

Signed-off-by: Niklas Cassel <niklas.cas...@axis.com>
---
  Documentation/devicetree/bindings/net/stmmac.txt | 2 +-
  1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/Documentation/devicetree/bindings/net/stmmac.txt 
b/Documentation/devicetree/bindings/net/stmmac.txt
index c3a7be6615c5..3a28a5d8857d 100644
--- a/Documentation/devicetree/bindings/net/stmmac.txt
+++ b/Documentation/devicetree/bindings/net/stmmac.txt
@@ -12,7 +12,7 @@ Required properties:
Valid interrupt names are:
- "macirq" (combined signal for various interrupt events)
- "eth_wake_irq" (the interrupt to manage the remote wake-up packet 
detection)
-  - "eth_lpi" (the interrupt that occurs when Tx or Rx enters/exits LPI state)
+  - "eth_lpi" (the interrupt that occurs when Rx exits the LPI state)
  - phy-mode: See ethernet.txt file in the same directory.
  - snps,reset-gpio gpio number for phy reset.
  - snps,reset-active-low boolean flag to indicate if phy reset is active low.


Acked-by: Alexandre TORGUE <alexandre.tor...@st.com>

Re: [PATCH net] net: stmmac: fix completely hung TX when using TSO

[Alexandre Torgue]

Hi Guys,

On 06/06/2017 10:00 AM, Giuseppe CAVALLARO wrote:

Hi Niklas

I get the point and I acked the patch but Alex, please, can you confirm
that this issue has never seen on your boxes where the TSO has been
fully tested? The initial development (commit f748be531) introduces
the following:
(last_segment) && (buff_size < TSO_MAX_BUFF_SIZE),


I don't remember to have seen this kind of issue in the past but for 
sure I agree with this patch.


Acked-by: Alexandre TORGUE <alexandre.tor...@st.com>


...

On 6/6/2017 9:25 AM, Niklas Cassel wrote:

stmmac_tso_allocator can fail to set the Last Descriptor bit
on a descriptor that actually was the last descriptor.

This happens when the buffer of the last descriptor ends
up having a size of exactly TSO_MAX_BUFF_SIZE.

When the IP eventually reaches the next last descriptor,
which actually has the bit set, the DMA will hang.

When the DMA hangs, we get a tx timeout, however,
since stmmac does not do a complete reset of the IP
in stmmac_tx_timeout, we end up in a state with
completely hung TX.

Signed-off-by: Niklas Cassel <niklas.cas...@axis.com>


Acked-by: Giuseppe Cavallaro <peppe.cavall...@st.com>


---
  drivers/net/ethernet/stmicro/stmmac/stmmac_main.c | 2 +-
  1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c
b/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c
index 68a188e74c54..440bea049a7f 100644
--- a/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c
+++ b/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c
@@ -2723,7 +2723,7 @@ static void stmmac_tso_allocator(struct
stmmac_priv *priv, unsigned int des,
priv->hw->desc->prepare_tso_tx_desc(desc, 0, buff_size,
  0, 1,
-(last_segment) && (buff_size < TSO_MAX_BUFF_SIZE),
+(last_segment) && (tmp_len <= TSO_MAX_BUFF_SIZE),
  0, 0);
tmp_len -= TSO_MAX_BUFF_SIZE;


Regards
Peppe

Re: [PATCH net-next] net: stmmac: set total length of the packet to be transmitted in TDES3

[Alexandre Torgue]

Hi,

On 04/11/2017 07:40 AM, Giuseppe CAVALLARO wrote:

Hi Niklas

patch looks ok for me, Alex any feedback?


It sounds good for me to.


peppe

On 4/10/2017 8:33 PM, Niklas Cassel wrote:

From: Niklas Cassel 

Field FL/TPL in register TDES3 is not correctly set on GMAC4.
TX appears to be functional on GMAC 4.10a even if this field is not set,
however, to avoid relying on undefined behavior, set the length in TDES3.

The field has a different meaning depending on if the TSE bit in TDES3
is set or not (TSO). However, regardless of the TSE bit, the field is
not optional. The field is already set correctly when the TSE bit is set.

Since there is no limit for the number of descriptors that can be
used for a single packet, the field should be set to the sum of
the buffers contained in:
[ ...  ...
], which should be equal to skb->len.

Signed-off-by: Niklas Cassel 
---
  drivers/net/ethernet/stmicro/stmmac/chain_mode.c   | 6 +++---
  drivers/net/ethernet/stmicro/stmmac/common.h   | 2 +-
  drivers/net/ethernet/stmicro/stmmac/dwmac4_descs.c | 3 ++-
  drivers/net/ethernet/stmicro/stmmac/enh_desc.c | 2 +-
  drivers/net/ethernet/stmicro/stmmac/norm_desc.c| 2 +-
  drivers/net/ethernet/stmicro/stmmac/ring_mode.c| 9 ++---
  drivers/net/ethernet/stmicro/stmmac/stmmac_main.c  | 5 +++--
  7 files changed, 17 insertions(+), 12 deletions(-)

diff --git a/drivers/net/ethernet/stmicro/stmmac/chain_mode.c
b/drivers/net/ethernet/stmicro/stmmac/chain_mode.c
index 37881f81319e..e93c40b4631e 100644
--- a/drivers/net/ethernet/stmicro/stmmac/chain_mode.c
+++ b/drivers/net/ethernet/stmicro/stmmac/chain_mode.c
@@ -52,7 +52,7 @@ static int stmmac_jumbo_frm(void *p, struct sk_buff
*skb, int csum)
  tx_q->tx_skbuff_dma[entry].len = bmax;
  /* do not close the descriptor and do not set own bit */
  priv->hw->desc->prepare_tx_desc(desc, 1, bmax, csum,
STMMAC_CHAIN_MODE,
-0, false);
+0, false, skb->len);
while (len != 0) {
  tx_q->tx_skbuff[entry] = NULL;
@@ -70,7 +70,7 @@ static int stmmac_jumbo_frm(void *p, struct sk_buff
*skb, int csum)
  tx_q->tx_skbuff_dma[entry].len = bmax;
  priv->hw->desc->prepare_tx_desc(desc, 0, bmax, csum,
  STMMAC_CHAIN_MODE, 1,
-false);
+false, skb->len);
  len -= bmax;
  i++;
  } else {
@@ -85,7 +85,7 @@ static int stmmac_jumbo_frm(void *p, struct sk_buff
*skb, int csum)
  /* last descriptor can be set now */
  priv->hw->desc->prepare_tx_desc(desc, 0, len, csum,
  STMMAC_CHAIN_MODE, 1,
-true);
+true, skb->len);
  len = 0;
  }
  }
diff --git a/drivers/net/ethernet/stmicro/stmmac/common.h
b/drivers/net/ethernet/stmicro/stmmac/common.h
index 90d28bcad880..b7ce3fbb5375 100644
--- a/drivers/net/ethernet/stmicro/stmmac/common.h
+++ b/drivers/net/ethernet/stmicro/stmmac/common.h
@@ -373,7 +373,7 @@ struct stmmac_desc_ops {
  /* Invoked by the xmit function to prepare the tx descriptor */
  void (*prepare_tx_desc) (struct dma_desc *p, int is_fs, int len,
   bool csum_flag, int mode, bool tx_own,
- bool ls);
+ bool ls, unsigned int tot_pkt_len);
  void (*prepare_tso_tx_desc)(struct dma_desc *p, int is_fs, int
len1,
  int len2, bool tx_own, bool ls,
  unsigned int tcphdrlen,
diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac4_descs.c
b/drivers/net/ethernet/stmicro/stmmac/dwmac4_descs.c
index 843ec69222ea..aa6476439aee 100644
--- a/drivers/net/ethernet/stmicro/stmmac/dwmac4_descs.c
+++ b/drivers/net/ethernet/stmicro/stmmac/dwmac4_descs.c
@@ -304,12 +304,13 @@ static void dwmac4_rd_init_tx_desc(struct
dma_desc *p, int mode, int end)
static void dwmac4_rd_prepare_tx_desc(struct dma_desc *p, int
is_fs, int len,
bool csum_flag, int mode, bool tx_own,
-  bool ls)
+  bool ls, unsigned int tot_pkt_len)
  {
  unsigned int tdes3 = le32_to_cpu(p->des3);
p->des2 |= cpu_to_le32(len & TDES2_BUFFER1_SIZE_MASK);
  +tdes3 |= tot_pkt_len & TDES3_PACKET_SIZE_MASK;
  if (is_fs)
  tdes3 |= TDES3_FIRST_DESCRIPTOR;
  else
diff --git a/drivers/net/ethernet/stmicro/stmmac/enh_desc.c
b/drivers/net/ethernet/stmicro/stmmac/enh_desc.c
index 323b59ec74a3..7546b3664113 100644
--- a/drivers/net/ethernet/stmicro/stmmac/enh_desc.c
+++ b/drivers/net/ethernet/stmicro/stmmac/enh_desc.c
@@ -315,7 +315,7 @@ static void enh_desc_release_tx_desc(struct
dma_desc *p, int mode)
static void enh_desc_prepare_tx_desc(struct dma_desc *p, int
is_fs, int len,
   bool csum_flag, int mode, bool tx_own,
- bool ls)
+   

Re: [v2,net-next,1/3] net: stmmac: enable multiple buffers

[Alexandre Torgue]

Hi Joao

On 03/24/2017 06:09 PM, Joao Pinto wrote:


Hello David,

Às 5:05 PM de 3/24/2017, David Miller escreveu:

From: Andrew Lunn 
Date: Fri, 24 Mar 2017 12:17:36 +0100


Yes it would be fantastic to have a set of boards, but I rarely see this in any
maintainer :).


Being a Marvell SoC and switch maintainer, i have around a dozen
boards. Some i got some simply by asking the manufacture, others i
purchased. I don't think i'm in the minority here. Without having
access to a number of different hardwares, i don't feel i would be
doing my work properly.


I try as hard as I can to network with people and try to minimize this
situations, but when there is so many different setups using a driver with diff
configurations, situations like this can happen, but I am here to help debugging
and solving them.


You made a move to rename stmmac to synopsys not long ago. It gave the
impression that synopsis wants to take over this driver. If there are
a number of different configurations, who better than synopsys to
actually properly test these configurations? If you ask around, i'm
sure people will send you hardware.


I completely agree with everything Andrew is saying here.



I'll maintain the driver if everyone agrees with it, no problem, mas I would
like to hear from Peppe and Alex, since they are the current maintainers.


I agree with this proposition. As you can see (and unfortunately) I have 
currently no time for reviewing (I'm busy on another subsystem). You are 
close to new GMAC evolution and very active (I hope for a long time).
For sure you need boards with old GMAC Ips. I will send you an STM32 
with GMAC IP 3.5. Don't hesitate to contact us if you have question 
about historic content of stmmac driver.


Thanks!

Alex





HW testing would be nice, but hard to justify investing in one shot, so it would
be great to receive hardware to make tests if the companies wish it.

About the problems in the last patch I am going to send a 2 patch set with 2
fixes, lets see if stuff gets better.

Thnaks
Joao

Re: [PATCH] stmmac: add missing of_node_put

[Alexandre Torgue]

Hi

On 01/17/2017 12:23 PM, Julia Lawall wrote:

The function stmmac_dt_phy provides several possibilities for initializing
plat->mdio_node, all of which have the effect of increasing the reference
count of the assigned value.  This field is not updated elsewhere, so the
value is live until the end of the lifetime of plat (devm_allocated), just
after the end of stmmac_remove_config_dt.  Thus, add an of_node_put on
plat->mdio_node in stmmac_remove_config_dt.  It is possible that the field
mdio_node is never initialized, but of_node_put is NULL-safe, so it is also
safe to call of_node_put in that case.

Signed-off-by: Julia Lawall <julia.law...@lip6.fr>

---
 drivers/net/ethernet/stmicro/stmmac/stmmac_platform.c |1 +
 1 file changed, 1 insertion(+)

diff --git a/drivers/net/ethernet/stmicro/stmmac/stmmac_platform.c 
b/drivers/net/ethernet/stmicro/stmmac/stmmac_platform.c
index 4daa8a3..460f94f 100644
--- a/drivers/net/ethernet/stmicro/stmmac/stmmac_platform.c
+++ b/drivers/net/ethernet/stmicro/stmmac/stmmac_platform.c
@@ -409,6 +409,7 @@ void stmmac_remove_config_dt(struct platform_device *pdev,
if (of_phy_is_fixed_link(np))
of_phy_deregister_fixed_link(np);
of_node_put(plat->phy_node);
+   of_node_put(plat->mdio_node);
 }
 #else
 struct plat_stmmacenet_data *



Acked-by: Alexandre TORGUE <alexandre.tor...@st.com>

Thanks
Alex

Re: [patch net-next] stmmac: indent an if statement

[Alexandre Torgue]

Hi Julia

On 01/16/2017 11:10 PM, Julia Lawall wrote:



On Tue, 17 Jan 2017, Dan Carpenter wrote:


On Mon, Jan 16, 2017 at 10:46:22PM +0100, Julia Lawall wrote:



On Mon, 16 Jan 2017, Dan Carpenter wrote:


On Mon, Jan 16, 2017 at 12:19:24PM +0300, Dan Carpenter wrote:

On Sun, Jan 15, 2017 at 10:14:38PM -0500, David Miller wrote:

From: Dan Carpenter 
Date: Thu, 12 Jan 2017 21:46:32 +0300


The break statement should be indented one more tab.

Signed-off-by: Dan Carpenter 


Applied, but like Julia I think we might have a missing of_node_put()
here.


Of course, sorry for dropping the ball on this.  I'll send a patch for
that.



Actually, I've looked at it some more and I think this function is OK.
We're supposed to do an of_node_put() later...  I can't find where that
happens, but presumably that's because I don't know stmmac well.  This
code here, though, is fine.


Why do you think it is fine?  Does anyone in the calling context know
which child would have caused the break?


Yeah.  It's saved in plat->mdio_node and we expect to be holding on
either path through the function.

(It would be better if one of the stmmac people were responding here
insead of a random fix the indenting weenie like myself.)


OK, I agree that there should not be an of_node_put with the break.

Perhaps there should be an of_node_put on plat->mdio_node in
stmmac_remove_config_dt, like there is an of_node_put on plat->phy_node.
But it would certainly be helpful to hear from someone who knows the code
better.


I also think it's missing! Can you propose a patch ?

br
Alex



julia

Re: [patch net-next] stmmac: indent an if statement

[Alexandre Torgue]

Dear David

On 01/16/2017 11:00 PM, David Miller wrote:

From: Dan Carpenter 
Date: Tue, 17 Jan 2017 00:56:15 +0300


(It would be better if one of the stmmac people were responding here
insead of a random fix the indenting weenie like myself.)


They are all too busy trying to rename the driver, because that's so
much more important.


No, we don't spend all our times to deals with stmmac renaming. Just 
busy on other topic and we continue to do our best with Peppe to review 
stmmac patch.


Regards
Alexandre

Re: [PATCH v2 2/2] stmmac: rename it to synopsys

[Alexandre Torgue]

Hi Joao

On 01/12/2017 10:43 AM, Joao Pinto wrote:


Hi Florian,

Às 9:14 PM de 1/11/2017, Florian Fainelli escreveu:

On 01/10/2017 06:52 AM, Joao Pinto wrote:

This patch renames stmicro/stmmac to synopsys/ since it is a standard
ethernet software package regarding synopsys ethernet controllers, supporting
the majority of Synopsys Ethernet IPs. The config IDs remain the same, for
retro-compatibility, only the description was changed.


Do re really have to do this? ST Micro were the first to upstream
support for a Synopsys IP, and it was later on identified as being
"stmicro" instead of "synopsys" (during the big driver move under
drivers/net/ethernet) whichever came first in the driver essentially "wins".

As mentioned before, although git is able to track renames, git log does
not automatically have --follow, so it can be hard for people to track
down the (new) history of the driver.

Personally, I don't see much value in doing this rename, especially when
all the driver internal structures are still going to be named with
stmmac (and please don't even think about doing a s/stmmac/snps/ inside
the driver ;)).

My 2 cents.



First of all, I am suggesting an alternative way of organizing the code, and
that's it, I have no second intentions about anything :).

Please don't see this as a take-over or erase Stmicro from credits, please... it
makes no sense. You can leave STMicro license and all the credits fine by me and
I insist on it. But lets name it for something that makes sense... lets call it
dwc (designware controllers), I am totally open to suggestions.

I don't understand the hostility of some comments, honestly.

The easiest way is to keep things like they are today, and believe me I have a
lot of things to do, like adding the support of multi-queues / multi-channels to
stmmac, so I not suggesting this because it is fun.

I am suggesting this because it is what I am used to seeing in other subsystems.
USB has dwc2 and dwc3 folders that clearly identifies that they are Designware
(synopsys) extensions to the USB 2.0 and 3.0. The author of dwc3 was Texas
Instruments, and they did not name it ti/usb. For example I use an AXS101
Development board that does not have a stmicro SoC but has a Designware Ethernet
IP in it, so uses stmicro/stmmac. For me it is confusing.

Lets not name it synopsys, for me it is totally fine, but naming it
stmicro/stmmac is not the right way because it seems like it is a driver just
for stmicro products, which is not, is for products that use Designware Ethernet
IPs.

I am volunteering to do this work, let's discuss this.


For me it makes no sens to rename only folder (stmicro/stmmac by 
synopsys) and keep stmmac* inside a synopsys folder (that is very 
confusing). If you propose that you have to change all.


BUT doing that, we will lose all stmmac driver story and we don't want 
that.






Thanks,
Joao

Re: [PATCH v2 0/2] remove dwc_eth_qos and rename stmicro/stmmac

[Alexandre Torgue]

On 01/11/2017 03:29 PM, Joao Pinto wrote:


Alex,

Às 2:25 PM de 1/11/2017, Alexandre Torgue escreveu:

Jao,

On 01/11/2017 12:54 PM, Joao Pinto wrote:


Hi Alex,

Às 11:39 AM de 1/11/2017, Alexandre Torgue escreveu:

Hi Jao,

On 01/10/2017 03:52 PM, Joao Pinto wrote:

This patch set removes the synopsys/dwc_eth_qos since it was merged recently
to stmmac (dwmac-dwc-qos-eth glue driver).

It also renames stmicro/stmmac to synopsys/ since it is a standard ethernet
software package regarding synopsys ethernet controllers, supporting the
majority of Synopsys Ethernet IPs.


I understand the reason to rename stmmac driver. The only risk I see is that
usual user will be a little bit lost to find code. It seems there no risk of
backward compatibility with current/old DT (I assume you already checked this
point).


I understand your concern, but for the Synopsys IPs users will be clearer what
drivers to use and what current stmmac has to offer.


I agree.



In terms of tests, I tested it and worked out of the box because the same
Kconfig IDs were used assuring the retro-compatibility that David suggested a
few weeks ago. For DT users no problems are expected as well.


Ok, sounds good.

I see that you rename also Documentation/devicetree/bindings/net/stmmac.txt. You
have also to change some words inside as it talks about Stmicroelectronics.


You are right. Going to change that and send a v3. Counting on your ack :)


I continue to review ;)
There is another point to talk. It will be strange to have the driver 
named "synopsys" but all file inside will continue to be called "stmmac" 
(and also function inside files). So either you plan to keep it as it is 
(and it is a little bit confusing) or you plan to change all file name + 
function name (+ few variable name) ?


regards
Alex





Thanks!



Regards
Alex



Thanks,
Joao


Let's see what David think about that but if there no risk of backward
compatibility with DT, I agree with the series.

Regards
Alex





In the future we should make an effort to migrate to this new synopsys/
driver package all the Ethernet Synopsys IP drivers scattered in net/ethernet.

Joao Pinto (2):
  synopsys: remove dwc_eth_qos driver
  stmmac: rename it to synopsys

 .../bindings/net/{stmmac.txt => synopsys.txt}  |0
 MAINTAINERS|   11 +-
 arch/arm/configs/multi_v7_defconfig|3 +-
 drivers/net/ethernet/Kconfig   |3 +-

Re: [PATCH v2 0/2] remove dwc_eth_qos and rename stmicro/stmmac

[Alexandre Torgue]

Jao,

On 01/11/2017 12:54 PM, Joao Pinto wrote:


Hi Alex,

Às 11:39 AM de 1/11/2017, Alexandre Torgue escreveu:

Hi Jao,

On 01/10/2017 03:52 PM, Joao Pinto wrote:

This patch set removes the synopsys/dwc_eth_qos since it was merged recently
to stmmac (dwmac-dwc-qos-eth glue driver).

It also renames stmicro/stmmac to synopsys/ since it is a standard ethernet
software package regarding synopsys ethernet controllers, supporting the
majority of Synopsys Ethernet IPs.


I understand the reason to rename stmmac driver. The only risk I see is that
usual user will be a little bit lost to find code. It seems there no risk of
backward compatibility with current/old DT (I assume you already checked this
point).


I understand your concern, but for the Synopsys IPs users will be clearer what
drivers to use and what current stmmac has to offer.


I agree.



In terms of tests, I tested it and worked out of the box because the same
Kconfig IDs were used assuring the retro-compatibility that David suggested a
few weeks ago. For DT users no problems are expected as well.


Ok, sounds good.

I see that you rename also 
Documentation/devicetree/bindings/net/stmmac.txt. You have also to 
change some words inside as it talks about Stmicroelectronics.


Regards
Alex



Thanks,
Joao


Let's see what David think about that but if there no risk of backward
compatibility with DT, I agree with the series.

Regards
Alex





In the future we should make an effort to migrate to this new synopsys/
driver package all the Ethernet Synopsys IP drivers scattered in net/ethernet.

Joao Pinto (2):
  synopsys: remove dwc_eth_qos driver
  stmmac: rename it to synopsys

 .../bindings/net/{stmmac.txt => synopsys.txt}  |0
 MAINTAINERS|   11 +-
 arch/arm/configs/multi_v7_defconfig|3 +-
 drivers/net/ethernet/Kconfig   |3 +-
 drivers/net/ethernet/Makefile  |3 +-
 drivers/net/ethernet/stmicro/Kconfig   |   21 -
 drivers/net/ethernet/stmicro/Makefile  |5 -
 drivers/net/ethernet/stmicro/stmmac/Kconfig|  162 --
 drivers/net/ethernet/stmicro/stmmac/Makefile   |   25 -
 drivers/net/ethernet/synopsys/Kconfig  |  165 +-
 drivers/net/ethernet/synopsys/Makefile |   28 +-
 .../{stmicro/stmmac => synopsys}/altr_tse_pcs.c|0
 .../{stmicro/stmmac => synopsys}/altr_tse_pcs.h|0
 .../{stmicro/stmmac => synopsys}/chain_mode.c  |0
 .../ethernet/{stmicro/stmmac => synopsys}/common.h |0
 .../ethernet/{stmicro/stmmac => synopsys}/descs.h  |0
 .../{stmicro/stmmac => synopsys}/descs_com.h   |0
 drivers/net/ethernet/synopsys/dwc_eth_qos.c| 2996 
 .../stmmac => synopsys}/dwmac-dwc-qos-eth.c|0
 .../{stmicro/stmmac => synopsys}/dwmac-generic.c   |0
 .../{stmicro/stmmac => synopsys}/dwmac-ipq806x.c   |0
 .../{stmicro/stmmac => synopsys}/dwmac-lpc18xx.c   |0
 .../{stmicro/stmmac => synopsys}/dwmac-meson.c |0
 .../{stmicro/stmmac => synopsys}/dwmac-meson8b.c   |0
 .../{stmicro/stmmac => synopsys}/dwmac-oxnas.c |0
 .../{stmicro/stmmac => synopsys}/dwmac-rk.c|0
 .../{stmicro/stmmac => synopsys}/dwmac-socfpga.c   |0
 .../{stmicro/stmmac => synopsys}/dwmac-sti.c   |0
 .../{stmicro/stmmac => synopsys}/dwmac-stm32.c |0
 .../{stmicro/stmmac => synopsys}/dwmac-sunxi.c |0
 .../{stmicro/stmmac => synopsys}/dwmac100.h|0
 .../{stmicro/stmmac => synopsys}/dwmac1000.h   |0
 .../{stmicro/stmmac => synopsys}/dwmac1000_core.c  |0
 .../{stmicro/stmmac => synopsys}/dwmac1000_dma.c   |0
 .../{stmicro/stmmac => synopsys}/dwmac100_core.c   |0
 .../{stmicro/stmmac => synopsys}/dwmac100_dma.c|0
 .../ethernet/{stmicro/stmmac => synopsys}/dwmac4.h |0
 .../{stmicro/stmmac => synopsys}/dwmac4_core.c |0
 .../{stmicro/stmmac => synopsys}/dwmac4_descs.c|0
 .../{stmicro/stmmac => synopsys}/dwmac4_descs.h|0
 .../{stmicro/stmmac => synopsys}/dwmac4_dma.c  |0
 .../{stmicro/stmmac => synopsys}/dwmac4_dma.h  |0
 .../{stmicro/stmmac => synopsys}/dwmac4_lib.c  |0
 .../{stmicro/stmmac => synopsys}/dwmac_dma.h   |0
 .../{stmicro/stmmac => synopsys}/dwmac_lib.c   |0
 .../{stmicro/stmmac => synopsys}/enh_desc.c|0
 .../ethernet/{stmicro/stmmac => synopsys}/mmc.h|0
 .../{stmicro/stmmac => synopsys}/mmc_core.c|0
 .../{stmicro/stmmac => synopsys}/norm_desc.c   |0
 .../{stmicro/stmmac => synopsys}/ring_mode.c   |0
 .../ethernet/{stmicro/stmmac => synopsys}/stmmac.h |0
 .../{stmicro/stmmac => synopsys}/stmmac_ethtool.c  |0
 .../{stmicro/stmmac => synopsys}/stmmac_hwtstamp.c |0
 .../{stmicro/stmmac =&g

Re: [PATCH v2 0/2] remove dwc_eth_qos and rename stmicro/stmmac

[Alexandre Torgue]

Hi Jao,

On 01/10/2017 03:52 PM, Joao Pinto wrote:

This patch set removes the synopsys/dwc_eth_qos since it was merged recently
to stmmac (dwmac-dwc-qos-eth glue driver).

It also renames stmicro/stmmac to synopsys/ since it is a standard ethernet
software package regarding synopsys ethernet controllers, supporting the
majority of Synopsys Ethernet IPs.


I understand the reason to rename stmmac driver. The only risk I see is 
that usual user will be a little bit lost to find code. It seems there 
no risk of backward compatibility with current/old DT (I assume you 
already checked this point).
Let's see what David think about that but if there no risk of backward 
compatibility with DT, I agree with the series.


Regards
Alex





In the future we should make an effort to migrate to this new synopsys/
driver package all the Ethernet Synopsys IP drivers scattered in net/ethernet.

Joao Pinto (2):
  synopsys: remove dwc_eth_qos driver
  stmmac: rename it to synopsys

 .../bindings/net/{stmmac.txt => synopsys.txt}  |0
 MAINTAINERS|   11 +-
 arch/arm/configs/multi_v7_defconfig|3 +-
 drivers/net/ethernet/Kconfig   |3 +-
 drivers/net/ethernet/Makefile  |3 +-
 drivers/net/ethernet/stmicro/Kconfig   |   21 -
 drivers/net/ethernet/stmicro/Makefile  |5 -
 drivers/net/ethernet/stmicro/stmmac/Kconfig|  162 --
 drivers/net/ethernet/stmicro/stmmac/Makefile   |   25 -
 drivers/net/ethernet/synopsys/Kconfig  |  165 +-
 drivers/net/ethernet/synopsys/Makefile |   28 +-
 .../{stmicro/stmmac => synopsys}/altr_tse_pcs.c|0
 .../{stmicro/stmmac => synopsys}/altr_tse_pcs.h|0
 .../{stmicro/stmmac => synopsys}/chain_mode.c  |0
 .../ethernet/{stmicro/stmmac => synopsys}/common.h |0
 .../ethernet/{stmicro/stmmac => synopsys}/descs.h  |0
 .../{stmicro/stmmac => synopsys}/descs_com.h   |0
 drivers/net/ethernet/synopsys/dwc_eth_qos.c| 2996 
 .../stmmac => synopsys}/dwmac-dwc-qos-eth.c|0
 .../{stmicro/stmmac => synopsys}/dwmac-generic.c   |0
 .../{stmicro/stmmac => synopsys}/dwmac-ipq806x.c   |0
 .../{stmicro/stmmac => synopsys}/dwmac-lpc18xx.c   |0
 .../{stmicro/stmmac => synopsys}/dwmac-meson.c |0
 .../{stmicro/stmmac => synopsys}/dwmac-meson8b.c   |0
 .../{stmicro/stmmac => synopsys}/dwmac-oxnas.c |0
 .../{stmicro/stmmac => synopsys}/dwmac-rk.c|0
 .../{stmicro/stmmac => synopsys}/dwmac-socfpga.c   |0
 .../{stmicro/stmmac => synopsys}/dwmac-sti.c   |0
 .../{stmicro/stmmac => synopsys}/dwmac-stm32.c |0
 .../{stmicro/stmmac => synopsys}/dwmac-sunxi.c |0
 .../{stmicro/stmmac => synopsys}/dwmac100.h|0
 .../{stmicro/stmmac => synopsys}/dwmac1000.h   |0
 .../{stmicro/stmmac => synopsys}/dwmac1000_core.c  |0
 .../{stmicro/stmmac => synopsys}/dwmac1000_dma.c   |0
 .../{stmicro/stmmac => synopsys}/dwmac100_core.c   |0
 .../{stmicro/stmmac => synopsys}/dwmac100_dma.c|0
 .../ethernet/{stmicro/stmmac => synopsys}/dwmac4.h |0
 .../{stmicro/stmmac => synopsys}/dwmac4_core.c |0
 .../{stmicro/stmmac => synopsys}/dwmac4_descs.c|0
 .../{stmicro/stmmac => synopsys}/dwmac4_descs.h|0
 .../{stmicro/stmmac => synopsys}/dwmac4_dma.c  |0
 .../{stmicro/stmmac => synopsys}/dwmac4_dma.h  |0
 .../{stmicro/stmmac => synopsys}/dwmac4_lib.c  |0
 .../{stmicro/stmmac => synopsys}/dwmac_dma.h   |0
 .../{stmicro/stmmac => synopsys}/dwmac_lib.c   |0
 .../{stmicro/stmmac => synopsys}/enh_desc.c|0
 .../ethernet/{stmicro/stmmac => synopsys}/mmc.h|0
 .../{stmicro/stmmac => synopsys}/mmc_core.c|0
 .../{stmicro/stmmac => synopsys}/norm_desc.c   |0
 .../{stmicro/stmmac => synopsys}/ring_mode.c   |0
 .../ethernet/{stmicro/stmmac => synopsys}/stmmac.h |0
 .../{stmicro/stmmac => synopsys}/stmmac_ethtool.c  |0
 .../{stmicro/stmmac => synopsys}/stmmac_hwtstamp.c |0
 .../{stmicro/stmmac => synopsys}/stmmac_main.c |0
 .../{stmicro/stmmac => synopsys}/stmmac_mdio.c |0
 .../{stmicro/stmmac => synopsys}/stmmac_pci.c  |0
 .../{stmicro/stmmac => synopsys}/stmmac_pcs.h  |0
 .../{stmicro/stmmac => synopsys}/stmmac_platform.c |0
 .../{stmicro/stmmac => synopsys}/stmmac_platform.h |0
 .../{stmicro/stmmac => synopsys}/stmmac_ptp.c  |0
 .../{stmicro/stmmac => synopsys}/stmmac_ptp.h  |0
 61 files changed, 180 insertions(+), 3242 deletions(-)
 rename Documentation/devicetree/bindings/net/{stmmac.txt => synopsys.txt} 
(100%)
 delete mode 100644 drivers/net/ethernet/stmicro/Kconfig
 delete mode 100644 drivers/net/ethernet/stmicro/Makefile
 delete mode 100644 drivers/net/ethernet/stmicro/stmmac/Kconfig
 delete mode 100644 

Re: [PATCH v3 3/3] stmmac: adding new glue driver dwmac-dwc-qos-eth

[Alexandre Torgue]

Hi Joao,

On 01/05/2017 06:49 PM, Joao Pinto wrote:

Hi Alex,

Às 5:19 PM de 1/5/2017, Alexandre Torgue escreveu:

Hi Joao,

On 01/04/2017 05:22 PM, Joao Pinto wrote:

This patch adds a new glue driver called dwmac-dwc-qos-eth which
was based in the dwc_eth_qos as is. To assure retro-compatibility a slight
tweak was also added to stmmac_platform.


Sorry to come late in the review. I have a basic question. Why do you create a
glue driver for that ?
dwmac-glues are currently vendor specific, so why create one for IP ? Why not
continue to use stmmac_platform.c ?
(It is very basic, I assume I miss something)



If you check in the kernel tree there is a synopsys qos driver under
net/ethernet/synopsys/*.qos.c. At this moment Synopsys has the goal to support
QoS in the mainline kernel and so a discussion took place a month ago, about
what would be the best solution. At the time we (mailing-list folks) decided to
port the net/ethernet/synopsys/*.qos.c driver to stmmac and remove it. This way
we can have stmmac has a single synopsys ethernet software package.


Yes I saw a thread about that and also discussed with Peppe. It is a 
very good thing to do that ! so thanks for that.



For us to achieve this we agreed that stmmac would have

Lars the current synopsys/*.qos.c maintainer requested that stmmac be compatible
with the devicetree bindings that axis' customers were using in the driver. So
if you check the new glue driver, you will see it parses the legacy drivers DT
bindings and initiates stmmac. So you can see it like a legacy compatible glue
for the stmmac.


Ok if it is to keep compatibility to existing DT.

Acked-by: Alexandre TORGUE <alexandre.tor...@st.com>



Thanks,
Joao


thanks
Alex





Signed-off-by: Joao Pinto <jpi...@synopsys.com>
---
changes v2 -> v3:
- Nothing changed, just to keep up patch set version
changes v1 -> v2:
- WOL was not declared in the new glue driver
- clocks were switched and now fixed (apb_pclk and phy_ref_clk)

 .../bindings/net/snps,dwc-qos-ethernet.txt |   3 +
 drivers/net/ethernet/stmicro/stmmac/Kconfig|   9 +
 drivers/net/ethernet/stmicro/stmmac/Makefile   |   1 +
 .../ethernet/stmicro/stmmac/dwmac-dwc-qos-eth.c| 200 +
 .../net/ethernet/stmicro/stmmac/stmmac_platform.c  |  15 +-
 5 files changed, 225 insertions(+), 3 deletions(-)
 create mode 100644 drivers/net/ethernet/stmicro/stmmac/dwmac-dwc-qos-eth.c

diff --git a/Documentation/devicetree/bindings/net/snps,dwc-qos-ethernet.txt
b/Documentation/devicetree/bindings/net/snps,dwc-qos-ethernet.txt
index d93f71c..21d27aa 100644
--- a/Documentation/devicetree/bindings/net/snps,dwc-qos-ethernet.txt
+++ b/Documentation/devicetree/bindings/net/snps,dwc-qos-ethernet.txt
@@ -1,5 +1,8 @@
 * Synopsys DWC Ethernet QoS IP version 4.10 driver (GMAC)

+This binding is deprecated, but it continues to be supported, but new
+features should be preferably added to the stmmac binding document.
+
 This binding supports the Synopsys Designware Ethernet QoS (Quality Of Service)
 IP block. The IP supports multiple options for bus type, clocking and reset
 structure, and feature list. Consequently, a number of properties and list
diff --git a/drivers/net/ethernet/stmicro/stmmac/Kconfig
b/drivers/net/ethernet/stmicro/stmmac/Kconfig
index ab66248..99594e3 100644
--- a/drivers/net/ethernet/stmicro/stmmac/Kconfig
+++ b/drivers/net/ethernet/stmicro/stmmac/Kconfig
@@ -29,6 +29,15 @@ config STMMAC_PLATFORM

 if STMMAC_PLATFORM

+config DWMAC_DWC_QOS_ETH
+tristate "Support for snps,dwc-qos-ethernet.txt DT binding."
+select PHYLIB
+select CRC32
+select MII
+depends on OF && HAS_DMA
+help
+  Support for chips using the snps,dwc-qos-ethernet.txt DT binding.
+
 config DWMAC_GENERIC
 tristate "Generic driver for DWMAC"
 default STMMAC_PLATFORM
diff --git a/drivers/net/ethernet/stmicro/stmmac/Makefile
b/drivers/net/ethernet/stmicro/stmmac/Makefile
index 8f83a86..700c603 100644
--- a/drivers/net/ethernet/stmicro/stmmac/Makefile
+++ b/drivers/net/ethernet/stmicro/stmmac/Makefile
@@ -16,6 +16,7 @@ obj-$(CONFIG_DWMAC_SOCFPGA)+= dwmac-altr-socfpga.o
 obj-$(CONFIG_DWMAC_STI)+= dwmac-sti.o
 obj-$(CONFIG_DWMAC_STM32)+= dwmac-stm32.o
 obj-$(CONFIG_DWMAC_SUNXI)+= dwmac-sunxi.o
+obj-$(CONFIG_DWMAC_DWC_QOS_ETH)+= dwmac-dwc-qos-eth.o
 obj-$(CONFIG_DWMAC_GENERIC)+= dwmac-generic.o
 stmmac-platform-objs:= stmmac_platform.o
 dwmac-altr-socfpga-objs := altr_tse_pcs.o dwmac-socfpga.o
diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac-dwc-qos-eth.c
b/drivers/net/ethernet/stmicro/stmmac/dwmac-dwc-qos-eth.c
new file mode 100644
index 000..4532a7c
--- /dev/null
+++ b/drivers/net/ethernet/stmicro/stmmac/dwmac-dwc-qos-eth.c
@@ -0,0 +1,200 @@
+/*
+ * Synopsys DWC Ethernet Quality-of-Service v4.10a linux driver
+ *
+ * Copyright (C) 2016 Joao Pinto <jpi...@synopsys.com>
+ *
+ * This program is free software; you can 

Re: [PATCH v3 3/3] stmmac: adding new glue driver dwmac-dwc-qos-eth

[Alexandre Torgue]

Hi Joao,

On 01/04/2017 05:22 PM, Joao Pinto wrote:

This patch adds a new glue driver called dwmac-dwc-qos-eth which
was based in the dwc_eth_qos as is. To assure retro-compatibility a slight
tweak was also added to stmmac_platform.


Sorry to come late in the review. I have a basic question. Why do you 
create a glue driver for that ?
dwmac-glues are currently vendor specific, so why create one for IP ? 
Why not continue to use stmmac_platform.c ?

(It is very basic, I assume I miss something)

thanks
Alex





Signed-off-by: Joao Pinto 
---
changes v2 -> v3:
- Nothing changed, just to keep up patch set version
changes v1 -> v2:
- WOL was not declared in the new glue driver
- clocks were switched and now fixed (apb_pclk and phy_ref_clk)

 .../bindings/net/snps,dwc-qos-ethernet.txt |   3 +
 drivers/net/ethernet/stmicro/stmmac/Kconfig|   9 +
 drivers/net/ethernet/stmicro/stmmac/Makefile   |   1 +
 .../ethernet/stmicro/stmmac/dwmac-dwc-qos-eth.c| 200 +
 .../net/ethernet/stmicro/stmmac/stmmac_platform.c  |  15 +-
 5 files changed, 225 insertions(+), 3 deletions(-)
 create mode 100644 drivers/net/ethernet/stmicro/stmmac/dwmac-dwc-qos-eth.c

diff --git a/Documentation/devicetree/bindings/net/snps,dwc-qos-ethernet.txt 
b/Documentation/devicetree/bindings/net/snps,dwc-qos-ethernet.txt
index d93f71c..21d27aa 100644
--- a/Documentation/devicetree/bindings/net/snps,dwc-qos-ethernet.txt
+++ b/Documentation/devicetree/bindings/net/snps,dwc-qos-ethernet.txt
@@ -1,5 +1,8 @@
 * Synopsys DWC Ethernet QoS IP version 4.10 driver (GMAC)

+This binding is deprecated, but it continues to be supported, but new
+features should be preferably added to the stmmac binding document.
+
 This binding supports the Synopsys Designware Ethernet QoS (Quality Of Service)
 IP block. The IP supports multiple options for bus type, clocking and reset
 structure, and feature list. Consequently, a number of properties and list
diff --git a/drivers/net/ethernet/stmicro/stmmac/Kconfig 
b/drivers/net/ethernet/stmicro/stmmac/Kconfig
index ab66248..99594e3 100644
--- a/drivers/net/ethernet/stmicro/stmmac/Kconfig
+++ b/drivers/net/ethernet/stmicro/stmmac/Kconfig
@@ -29,6 +29,15 @@ config STMMAC_PLATFORM

 if STMMAC_PLATFORM

+config DWMAC_DWC_QOS_ETH
+   tristate "Support for snps,dwc-qos-ethernet.txt DT binding."
+   select PHYLIB
+   select CRC32
+   select MII
+   depends on OF && HAS_DMA
+   help
+ Support for chips using the snps,dwc-qos-ethernet.txt DT binding.
+
 config DWMAC_GENERIC
tristate "Generic driver for DWMAC"
default STMMAC_PLATFORM
diff --git a/drivers/net/ethernet/stmicro/stmmac/Makefile 
b/drivers/net/ethernet/stmicro/stmmac/Makefile
index 8f83a86..700c603 100644
--- a/drivers/net/ethernet/stmicro/stmmac/Makefile
+++ b/drivers/net/ethernet/stmicro/stmmac/Makefile
@@ -16,6 +16,7 @@ obj-$(CONFIG_DWMAC_SOCFPGA)   += dwmac-altr-socfpga.o
 obj-$(CONFIG_DWMAC_STI)+= dwmac-sti.o
 obj-$(CONFIG_DWMAC_STM32)  += dwmac-stm32.o
 obj-$(CONFIG_DWMAC_SUNXI)  += dwmac-sunxi.o
+obj-$(CONFIG_DWMAC_DWC_QOS_ETH)+= dwmac-dwc-qos-eth.o
 obj-$(CONFIG_DWMAC_GENERIC)+= dwmac-generic.o
 stmmac-platform-objs:= stmmac_platform.o
 dwmac-altr-socfpga-objs := altr_tse_pcs.o dwmac-socfpga.o
diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac-dwc-qos-eth.c 
b/drivers/net/ethernet/stmicro/stmmac/dwmac-dwc-qos-eth.c
new file mode 100644
index 000..4532a7c
--- /dev/null
+++ b/drivers/net/ethernet/stmicro/stmmac/dwmac-dwc-qos-eth.c
@@ -0,0 +1,200 @@
+/*
+ * Synopsys DWC Ethernet Quality-of-Service v4.10a linux driver
+ *
+ * Copyright (C) 2016 Joao Pinto 
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program. If not, see .
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#include "stmmac_platform.h"
+
+static int dwc_eth_dwmac_config_dt(struct platform_device *pdev,
+  struct plat_stmmacenet_data *plat_dat)
+{
+   struct device_node *np = pdev->dev.of_node;
+   u32 burst_map = 0;
+   u32 bit_index = 0;
+   u32 a_index = 0;
+
+   if (!plat_dat->axi) {
+   plat_dat->axi = kzalloc(sizeof(struct stmmac_axi), GFP_KERNEL);
+
+   if (!plat_dat->axi)
+   return -ENOMEM;
+   }
+
+   plat_dat->axi->axi_lpi_en = of_property_read_bool(np, "snps,en-lpi");
+   if (of_property_read_u32(np, "snps,write-requests",
+_dat->axi->axi_wr_osr_lmt)) {
+   /**
+* Since the register has a reset value of 

Re: stmmac DT property snps,axi_all

[Alexandre Torgue]

Hi Niklas

On 12/09/2016 10:53 AM, Niklas Cassel wrote:

On 12/09/2016 10:20 AM, Niklas Cassel wrote:

On 12/08/2016 02:36 PM, Alexandre Torgue wrote:

Hi Niklas,

On 12/05/2016 05:18 PM, Niklas Cassel wrote:

Hello Giuseppe


I'm trying to figure out what snps,axi_all is supposed to represent.

It appears that the value is saved, but never used in the code.

Looking at the register specification, I'm guessing that it represents
Address-Aligned Beats, but there is already the property snps,aal
for that.

IMO, it is not useful. Indeed AXI_AAL is a read only bit (in AXI bus mode 
register) and reflects the aal bit in DMA bus register.
As you know we use "snps,aal" to set aal bit in DMA bus register.
So "snps,axi_all" entry seems useless. Let's see with Peppe.

Ok, I see. GMAC and GMAC4 is different here.

For GMAC4 AAL only exists in DMA_SYS_BUS_MODE.
It's not reflected anywhere else.

The code is correct in the driver.

If snps,axi_all is just created for a read-only register,
and it is currently never used in the code,
while we have snps,aal, which is correct and works,
I guess it should be ok to remove snps,axi_all.

I can cook up a patch.



Here we go :)

I will send it as a real patch once net-next reopens.


Thanks ;). Just check with Peppe next week (as he added in the past this 
property).


Regards
Alex




From defc01cb7c22611b89d9cf1fcae72544092bd62c Mon Sep 17 00:00:00 2001
From: Niklas Cassel <niklas.cas...@axis.com>
Date: Fri, 9 Dec 2016 10:27:00 +0100
Subject: [PATCH net-next] net: stmmac: remove unused duplicate property
 snps,axi_all

For core revision 3.x Address-Aligned Beats is available in two registers.
The DT property snps,aal was created for AAL in the DMA bus register,
which is a read/write bit.
The DT property snps,axi_all was created for AXI_AAL in the AXI bus mode
register, which is a read only bit that reflects the value of AAL in the
DMA bus register.

Since the value of snps,axi_all is never used in the driver,
and since the property was created for a bit that is read only,
it should be safe to remove the property.

Signed-off-by: Niklas Cassel <niklas.cas...@axis.com>
---
 Documentation/devicetree/bindings/net/stmmac.txt  | 1 -
 drivers/net/ethernet/stmicro/stmmac/stmmac_platform.c | 1 -
 include/linux/stmmac.h| 1 -
 3 files changed, 3 deletions(-)

diff --git a/Documentation/devicetree/bindings/net/stmmac.txt 
b/Documentation/devicetree/bindings/net/stmmac.txt
index 128da752fec9..c3d2fd480a1b 100644
--- a/Documentation/devicetree/bindings/net/stmmac.txt
+++ b/Documentation/devicetree/bindings/net/stmmac.txt
@@ -65,7 +65,6 @@ Optional properties:
 - snps,wr_osr_lmt: max write outstanding req. limit
 - snps,rd_osr_lmt: max read outstanding req. limit
 - snps,kbbe: do not cross 1KiB boundary.
-- snps,axi_all: align address
 - snps,blen: this is a vector of supported burst length.
 - snps,fb: fixed-burst
 - snps,mb: mixed-burst
diff --git a/drivers/net/ethernet/stmicro/stmmac/stmmac_platform.c 
b/drivers/net/ethernet/stmicro/stmmac/stmmac_platform.c
index 082cd48db6a7..60ba8993c650 100644
--- a/drivers/net/ethernet/stmicro/stmmac/stmmac_platform.c
+++ b/drivers/net/ethernet/stmicro/stmmac/stmmac_platform.c
@@ -121,7 +121,6 @@ static struct stmmac_axi *stmmac_axi_setup(struct 
platform_device *pdev)
 axi->axi_lpi_en = of_property_read_bool(np, "snps,lpi_en");
 axi->axi_xit_frm = of_property_read_bool(np, "snps,xit_frm");
 axi->axi_kbbe = of_property_read_bool(np, "snps,axi_kbbe");
-axi->axi_axi_all = of_property_read_bool(np, "snps,axi_all");
 axi->axi_fb = of_property_read_bool(np, "snps,axi_fb");
 axi->axi_mb = of_property_read_bool(np, "snps,axi_mb");
 axi->axi_rb =  of_property_read_bool(np, "snps,axi_rb");
diff --git a/include/linux/stmmac.h b/include/linux/stmmac.h
index 266dab9ad782..889e0e9a3f1c 100644
--- a/include/linux/stmmac.h
+++ b/include/linux/stmmac.h
@@ -103,7 +103,6 @@ struct stmmac_axi {
 u32 axi_wr_osr_lmt;
 u32 axi_rd_osr_lmt;
 bool axi_kbbe;
-bool axi_axi_all;
 u32 axi_blen[AXI_BLEN];
 bool axi_fb;
 bool axi_mb;

Re: [PATCH net-next 0/2] Initial driver for Synopsys DWC XLGMAC

[Alexandre Torgue]

Hi

On 12/07/2016 04:57 AM, Jie Deng wrote:

This series provides the support for 25/40/50/100 GbE
devices using Synopsys DWC Enterprise Ethernet (XLGMAC).


Can you explain which GMAC are you targeted ?

A driver which support some Synopsys GMAC IP already exists. It support 
GMAC 3.5, 3.7, 4.0, 4.10 versions. You can find it in: 
drivers/net/ethernet/stmicro/stmmac/. When I look at all files your 
gonna to create, it looks like to ones in stmmac driver so maybe you 
could easily add your IP inside stmmac driver.


Note that an other driver is existing for synopsys GMAC 4.0 IP. it is 
located in drivers/net/ethernet/synopsys/dwc_eth_qos.c and coming from 
AXIS guys. A task is ongoing to only have stmmac driver so it should be 
harmful to create a new one.


Regards
Alex






The first patch adds support for Synopsys XLGMII.
The second patch provides the initial driver for Synopsys XLGMAC

The driver has three layers by refactoring AMD XGBE.

dwc-eth-xxx.x
  The DWC ethernet core layer (DWC ECL). This layer contains codes
can be shared by different DWC series ethernet cores

dwc-xxx.x (e.g. dwc-xlgmac.c)
  The DWC MAC HW adapter layer (DWC MHAL). This layer contains
special support for a specific MAC. e.g. currently, XLGMAC.

xxx-xxx-pci.c xxx-xxx-plat.c (e.g. dwc-xlgmac-pci.c)
  The glue adapter layer (GAL). Vendors who adopt Synopsys Etherent
cores can develop a glue driver for their platform.

Jie Deng (2):
  net: phy: add extension of phy-mode for XLGMII
  net: ethernet: Initial driver for Synopsys DWC XLGMAC

 Documentation/devicetree/bindings/net/ethernet.txt |1 +
 MAINTAINERS|6 +
 drivers/net/ethernet/synopsys/Kconfig  |2 +
 drivers/net/ethernet/synopsys/Makefile |1 +
 drivers/net/ethernet/synopsys/dwc/Kconfig  |   37 +
 drivers/net/ethernet/synopsys/dwc/Makefile |9 +
 drivers/net/ethernet/synopsys/dwc/dwc-eth-dcb.c|  228 ++
 .../net/ethernet/synopsys/dwc/dwc-eth-debugfs.c|  328 +++
 drivers/net/ethernet/synopsys/dwc/dwc-eth-desc.c   |  715 +
 .../net/ethernet/synopsys/dwc/dwc-eth-ethtool.c|  567 
 drivers/net/ethernet/synopsys/dwc/dwc-eth-hw.c | 3098 
 drivers/net/ethernet/synopsys/dwc/dwc-eth-mdio.c   |  252 ++
 drivers/net/ethernet/synopsys/dwc/dwc-eth-net.c| 2319 +++
 drivers/net/ethernet/synopsys/dwc/dwc-eth-ptp.c|  216 ++
 drivers/net/ethernet/synopsys/dwc/dwc-eth-regacc.h | 1115 +++
 drivers/net/ethernet/synopsys/dwc/dwc-eth.h|  738 +
 drivers/net/ethernet/synopsys/dwc/dwc-xlgmac-pci.c |  538 
 drivers/net/ethernet/synopsys/dwc/dwc-xlgmac.c |  135 +
 drivers/net/ethernet/synopsys/dwc/dwc-xlgmac.h |   85 +
 include/linux/phy.h|3 +
 20 files changed, 10393 insertions(+)
 create mode 100644 drivers/net/ethernet/synopsys/dwc/Kconfig
 create mode 100644 drivers/net/ethernet/synopsys/dwc/Makefile
 create mode 100644 drivers/net/ethernet/synopsys/dwc/dwc-eth-dcb.c
 create mode 100644 drivers/net/ethernet/synopsys/dwc/dwc-eth-debugfs.c
 create mode 100644 drivers/net/ethernet/synopsys/dwc/dwc-eth-desc.c
 create mode 100644 drivers/net/ethernet/synopsys/dwc/dwc-eth-ethtool.c
 create mode 100644 drivers/net/ethernet/synopsys/dwc/dwc-eth-hw.c
 create mode 100644 drivers/net/ethernet/synopsys/dwc/dwc-eth-mdio.c
 create mode 100644 drivers/net/ethernet/synopsys/dwc/dwc-eth-net.c
 create mode 100644 drivers/net/ethernet/synopsys/dwc/dwc-eth-ptp.c
 create mode 100644 drivers/net/ethernet/synopsys/dwc/dwc-eth-regacc.h
 create mode 100644 drivers/net/ethernet/synopsys/dwc/dwc-eth.h
 create mode 100644 drivers/net/ethernet/synopsys/dwc/dwc-xlgmac-pci.c
 create mode 100644 drivers/net/ethernet/synopsys/dwc/dwc-xlgmac.c
 create mode 100644 drivers/net/ethernet/synopsys/dwc/dwc-xlgmac.h

Re: stmmac driver...

[Alexandre Torgue]

On 12/08/2016 04:25 PM, David Miller wrote:

From: Alexandre Torgue <alexandre.tor...@st.com>
Date: Thu, 8 Dec 2016 14:55:04 +0100


Maybe I forget some series. Do you have others in mind ?


Please see the thread titled:

"net: ethernet: Initial driver for Synopsys DWC XLGMAC"

which seems to be discussing consolidation of various drivers
for the same IP core, of which stmmac is one.

I personally am against any change of the driver name and
things like this, and wish the people doing that work would
simply contribute to making whatever changes they need directly
to the stmmac driver.

You really need to voice your opinion when major changes are being
proposed for the driver you maintain.


For sure I agree. I miss this one as it doesn't modify (yet) stmmac 
driver. I gonna respond to the thread;


Regards
Alex

Re: [PATCH v3 1/6] net: stmmac: return error if no DMA configuration is found

[Alexandre Torgue]

Hi David,

On 12/08/2016 04:19 PM, David Miller wrote:

From: Alexandre Torgue <alexandre.tor...@st.com>
Date: Thu, 8 Dec 2016 11:44:35 +0100


Acked-by: Alexandre Torgue <alexandre.torgue@stcom>


Typo in your email.

I would suggest that you put this into an editor macro or
similar in order to avoid such typos in the future.  That's
what people do who review a lot of patches.


Sorry, I will pay attention next time.

Re: stmmac driver...

[Alexandre Torgue]

Hi David,

On 12/07/2016 07:06 PM, David Miller wrote:


Giuseppe and Alexandre,

There are a lot of patches and discussions happening around the stammc
driver lately and both of you are listed as the maintainers.

I really need prompt and conclusive reviews of these patch submissions
from you, and participation in all discussions about the driver.

Otherwise I have only three things I can do: 1) let the patches rot in
patchwork for days 2) trust that the patches are sane and fit your
desires and goals and just apply them or 3) reject them since they
aren't being reviewed properly.


Sorry for the delay. I reviewed Niklas series this morning. I'm testing
"net: ethernet: stmmac: remove private tx queue lock".

Maybe I forget some series. Do you have others in mind ?

Regards
Alex


Thanks in advance.

Re: stmmac DT property snps,axi_all

[Alexandre Torgue]

Hi Niklas,

On 12/05/2016 05:18 PM, Niklas Cassel wrote:

Hello Giuseppe


I'm trying to figure out what snps,axi_all is supposed to represent.

It appears that the value is saved, but never used in the code.

Looking at the register specification, I'm guessing that it represents
Address-Aligned Beats, but there is already the property snps,aal
for that.


IMO, it is not useful. Indeed AXI_AAL is a read only bit (in AXI bus 
mode register) and reflects the aal bit in DMA bus register.

As you know we use "snps,aal" to set aal bit in DMA bus register.
So "snps,axi_all" entry seems useless. Let's see with Peppe.

Regards
Alex




Regards,
Niklas

Re: [PATCH v3 1/6] net: stmmac: return error if no DMA configuration is found

[Alexandre Torgue]

Hi Niklas,

On 12/07/2016 03:20 PM, Niklas Cassel wrote:

From: Niklas Cassel <niklas.cas...@axis.com>

All drivers except pci glue layer calls stmmac_probe_config_dt.
stmmac_probe_config_dt does a kzalloc dma_cfg.

pci glue layer does kzalloc dma_cfg explicitly, so all current
drivers does a kzalloc dma_cfg.

Return an error if no DMA configuration is found, that way
we can assume that the DMA configuration always exists.

Signed-off-by: Niklas Cassel <niklas.cas...@axis.com>


Acked-by: Alexandre Torgue <alexandre.torgue@stcom>


---
 drivers/net/ethernet/stmicro/stmmac/stmmac_main.c | 18 +-
 1 file changed, 9 insertions(+), 9 deletions(-)

diff --git a/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c 
b/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c
index 982c95213da4..14366800e5e6 100644
--- a/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c
+++ b/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c
@@ -1578,16 +1578,12 @@ static void stmmac_check_ether_addr(struct stmmac_priv 
*priv)
  */
 static int stmmac_init_dma_engine(struct stmmac_priv *priv)
 {
-   int pbl = DEFAULT_DMA_PBL, fixed_burst = 0, aal = 0;
-   int mixed_burst = 0;
int atds = 0;
int ret = 0;

-   if (priv->plat->dma_cfg) {
-   pbl = priv->plat->dma_cfg->pbl;
-   fixed_burst = priv->plat->dma_cfg->fixed_burst;
-   mixed_burst = priv->plat->dma_cfg->mixed_burst;
-   aal = priv->plat->dma_cfg->aal;
+   if (!priv->plat->dma_cfg) {
+   dev_err(priv->device, "DMA configuration not found\n");
+   return -EINVAL;
}

if (priv->extend_desc && (priv->mode == STMMAC_RING_MODE))
@@ -1599,8 +1595,12 @@ static int stmmac_init_dma_engine(struct stmmac_priv 
*priv)
return ret;
}

-   priv->hw->dma->init(priv->ioaddr, pbl, fixed_burst, mixed_burst,
-   aal, priv->dma_tx_phy, priv->dma_rx_phy, atds);
+   priv->hw->dma->init(priv->ioaddr,
+   priv->plat->dma_cfg->pbl,
+   priv->plat->dma_cfg->fixed_burst,
+   priv->plat->dma_cfg->mixed_burst,
+   priv->plat->dma_cfg->aal,
+   priv->dma_tx_phy, priv->dma_rx_phy, atds);

if (priv->synopsys_id >= DWMAC_CORE_4_00) {
priv->rx_tail_addr = priv->dma_rx_phy +

Re: [PATCH v3 6/6] net: smmac: allow configuring lower pbl values

[Alexandre Torgue]

Hi Niklas,

On 12/07/2016 03:20 PM, Niklas Cassel wrote:

From: Niklas Cassel 

The driver currently always sets the PBLx8/PBLx4 bit, which means that
the pbl values configured via the pbl/txpbl/rxpbl DT properties are
always multiplied by 8/4 in the hardware.

In order to allow the DT to configure lower pbl values, while at the
same time not changing behavior of any existing device trees using the
pbl/txpbl/rxpbl settings, add a property to disable the multiplication
of the pbl by 8/4 in the hardware.

Suggested-by: Rabin Vincent 
Signed-off-by: Niklas Cassel 


Thanks for this patch, you can add my Acked-by.

Thanks for the whole series.

Alex


---
 Documentation/devicetree/bindings/net/stmmac.txt  | 2 ++
 Documentation/networking/stmmac.txt   | 5 -
 drivers/net/ethernet/stmicro/stmmac/dwmac1000_dma.c   | 3 ++-
 drivers/net/ethernet/stmicro/stmmac/dwmac4_dma.c  | 3 ++-
 drivers/net/ethernet/stmicro/stmmac/stmmac_pci.c  | 2 ++
 drivers/net/ethernet/stmicro/stmmac/stmmac_platform.c | 1 +
 include/linux/stmmac.h| 1 +
 7 files changed, 14 insertions(+), 3 deletions(-)

diff --git a/Documentation/devicetree/bindings/net/stmmac.txt 
b/Documentation/devicetree/bindings/net/stmmac.txt
index 8080038ff1b2..128da752fec9 100644
--- a/Documentation/devicetree/bindings/net/stmmac.txt
+++ b/Documentation/devicetree/bindings/net/stmmac.txt
@@ -39,6 +39,8 @@ Optional properties:
If set, DMA tx will use this value rather than snps,pbl.
 - snps,rxpbl   Rx Programmable Burst Length. Only for GMAC and newer.
If set, DMA rx will use this value rather than snps,pbl.
+- snps,no-pbl-x8   Don't multiply the pbl/txpbl/rxpbl values by 8.
+   For core rev < 3.50, don't multiply the values by 4.
 - snps,aal Address-Aligned Beats
 - snps,fixed-burst Program the DMA to use the fixed burst mode
 - snps,mixed-burst Program the DMA to use the mixed burst mode
diff --git a/Documentation/networking/stmmac.txt 
b/Documentation/networking/stmmac.txt
index 6add57374f70..2bb07078f535 100644
--- a/Documentation/networking/stmmac.txt
+++ b/Documentation/networking/stmmac.txt
@@ -152,8 +152,9 @@ Where:
  o dma_cfg: internal DMA parameters
o pbl: the Programmable Burst Length is maximum number of beats to
be transferred in one DMA transaction.
-   GMAC also enables the 4xPBL by default.
+   GMAC also enables the 4xPBL by default. (8xPBL for GMAC 3.50 and newer)
o txpbl/rxpbl: GMAC and newer supports independent DMA pbl for tx/rx.
+   o pblx8: Enable 8xPBL (4xPBL for core rev < 3.50). Enabled by default.
o fixed_burst/mixed_burst/aal
  o clk_csr: fixed CSR Clock range selection.
  o has_gmac: uses the GMAC core.
@@ -208,6 +209,7 @@ struct stmmac_dma_cfg {
int pbl;
int txpbl;
int rxpbl;
+   bool pblx8;
int fixed_burst;
int mixed_burst;
bool aal;
@@ -219,6 +221,7 @@ Where:
 If set, DMA tx will use this value rather than pbl.
  o rxpbl: Receive Programmable Burst Length. Only for GMAC and newer.
 If set, DMA rx will use this value rather than pbl.
+ o pblx8: Enable 8xPBL (4xPBL for core rev < 3.50). Enabled by default.
  o fixed_burst: program the DMA to use the fixed burst mode
  o mixed_burst: program the DMA to use the mixed burst mode
  o aal: Address-Aligned Beats
diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac1000_dma.c 
b/drivers/net/ethernet/stmicro/stmmac/dwmac1000_dma.c
index 99b8040af592..612d3aaac9a4 100644
--- a/drivers/net/ethernet/stmicro/stmmac/dwmac1000_dma.c
+++ b/drivers/net/ethernet/stmicro/stmmac/dwmac1000_dma.c
@@ -98,7 +98,8 @@ static void dwmac1000_dma_init(void __iomem *ioaddr,
 * Note: before stmmac core 3.50 this mode bit was 4xPBL, and
 * post 3.5 mode bit acts as 8*PBL.
 */
-   value |= DMA_BUS_MODE_MAXPBL;
+   if (dma_cfg->pblx8)
+   value |= DMA_BUS_MODE_MAXPBL;
value |= DMA_BUS_MODE_USP;
value &= ~(DMA_BUS_MODE_PBL_MASK | DMA_BUS_MODE_RPBL_MASK);
value |= (txpbl << DMA_BUS_MODE_PBL_SHIFT);
diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac4_dma.c 
b/drivers/net/ethernet/stmicro/stmmac/dwmac4_dma.c
index 2c3b2098f350..8196ab5fc33c 100644
--- a/drivers/net/ethernet/stmicro/stmmac/dwmac4_dma.c
+++ b/drivers/net/ethernet/stmicro/stmmac/dwmac4_dma.c
@@ -84,7 +84,8 @@ static void dwmac4_dma_init_channel(void __iomem *ioaddr,
 * on each channel
 */
value = readl(ioaddr + DMA_CHAN_CONTROL(channel));
-   value = value | DMA_BUS_MODE_PBL;
+   if (dma_cfg->pblx8)
+   value = value | DMA_BUS_MODE_PBL;
writel(value, ioaddr + DMA_CHAN_CONTROL(channel));

value = readl(ioaddr + DMA_CHAN_TX_CONTROL(channel));
diff --git a/drivers/net/ethernet/stmicro/stmmac/stmmac_pci.c 

Re: [PATCH v3 5/6] net: stmmac: add support for independent DMA pbl for tx/rx

[Alexandre Torgue]

Hi Niklas

On 12/07/2016 03:20 PM, Niklas Cassel wrote:

From: Niklas Cassel 

GMAC and newer supports independent programmable burst lengths for
DMA tx/rx. Add new optional devicetree properties representing this.

To be backwards compatible, snps,pbl will still be valid, but
snps,txpbl/snps,rxpbl will override the value in snps,pbl if set.

If the IP is synthesized to use the AXI interface, there is a register
and a matching DT property inside the optional stmmac-axi-config DT node
for controlling burst lengths, named snps,blen.
However, using this register, it is not possible to control tx and rx
independently. Also, this register is not available if the IP was
synthesized with, e.g., the AHB interface.

Signed-off-by: Niklas Cassel 


Thanks, you can add my Acked-by.

Regards
Alex


---
 Documentation/devicetree/bindings/net/stmmac.txt  |  6 +-
 Documentation/networking/stmmac.txt   | 19 +--
 drivers/net/ethernet/stmicro/stmmac/dwmac1000_dma.c   | 12 ++--
 drivers/net/ethernet/stmicro/stmmac/dwmac4_dma.c  | 12 +++-
 drivers/net/ethernet/stmicro/stmmac/stmmac_platform.c |  2 ++
 include/linux/stmmac.h|  2 ++
 6 files changed, 35 insertions(+), 18 deletions(-)

diff --git a/Documentation/devicetree/bindings/net/stmmac.txt 
b/Documentation/devicetree/bindings/net/stmmac.txt
index b95ff998ba73..8080038ff1b2 100644
--- a/Documentation/devicetree/bindings/net/stmmac.txt
+++ b/Documentation/devicetree/bindings/net/stmmac.txt
@@ -34,7 +34,11 @@ Optional properties:
   platforms.
 - tx-fifo-depth: See ethernet.txt file in the same directory
 - rx-fifo-depth: See ethernet.txt file in the same directory
-- snps,pbl Programmable Burst Length
+- snps,pbl Programmable Burst Length (tx and rx)
+- snps,txpbl   Tx Programmable Burst Length. Only for GMAC and newer.
+   If set, DMA tx will use this value rather than snps,pbl.
+- snps,rxpbl   Rx Programmable Burst Length. Only for GMAC and newer.
+   If set, DMA rx will use this value rather than snps,pbl.
 - snps,aal Address-Aligned Beats
 - snps,fixed-burst Program the DMA to use the fixed burst mode
 - snps,mixed-burst Program the DMA to use the mixed burst mode
diff --git a/Documentation/networking/stmmac.txt 
b/Documentation/networking/stmmac.txt
index 014f4f756cb7..6add57374f70 100644
--- a/Documentation/networking/stmmac.txt
+++ b/Documentation/networking/stmmac.txt
@@ -153,7 +153,8 @@ Where:
o pbl: the Programmable Burst Length is maximum number of beats to
be transferred in one DMA transaction.
GMAC also enables the 4xPBL by default.
-   o fixed_burst/mixed_burst/burst_len
+   o txpbl/rxpbl: GMAC and newer supports independent DMA pbl for tx/rx.
+   o fixed_burst/mixed_burst/aal
  o clk_csr: fixed CSR Clock range selection.
  o has_gmac: uses the GMAC core.
  o enh_desc: if sets the MAC will use the enhanced descriptor structure.
@@ -205,16 +206,22 @@ tuned according to the HW capabilities.

 struct stmmac_dma_cfg {
int pbl;
+   int txpbl;
+   int rxpbl;
int fixed_burst;
-   int burst_len_supported;
+   int mixed_burst;
+   bool aal;
 };

 Where:
- o pbl: Programmable Burst Length
+ o pbl: Programmable Burst Length (tx and rx)
+ o txpbl: Transmit Programmable Burst Length. Only for GMAC and newer.
+If set, DMA tx will use this value rather than pbl.
+ o rxpbl: Receive Programmable Burst Length. Only for GMAC and newer.
+If set, DMA rx will use this value rather than pbl.
  o fixed_burst: program the DMA to use the fixed burst mode
- o burst_len: this is the value we put in the register
- supported values are provided as macros in
- linux/stmmac.h header file.
+ o mixed_burst: program the DMA to use the mixed burst mode
+ o aal: Address-Aligned Beats

 ---

diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac1000_dma.c 
b/drivers/net/ethernet/stmicro/stmmac/dwmac1000_dma.c
index 318ae9f10104..99b8040af592 100644
--- a/drivers/net/ethernet/stmicro/stmmac/dwmac1000_dma.c
+++ b/drivers/net/ethernet/stmicro/stmmac/dwmac1000_dma.c
@@ -89,20 +89,20 @@ static void dwmac1000_dma_init(void __iomem *ioaddr,
   u32 dma_tx, u32 dma_rx, int atds)
 {
u32 value = readl(ioaddr + DMA_BUS_MODE);
+   int txpbl = dma_cfg->txpbl ?: dma_cfg->pbl;
+   int rxpbl = dma_cfg->rxpbl ?: dma_cfg->pbl;

/*
 * Set the DMA PBL (Programmable Burst Length) mode.
 *
 * Note: before stmmac core 3.50 this mode bit was 4xPBL, and
 * post 3.5 mode bit acts as 8*PBL.
-*
-* This configuration doesn't take care about the Separate PBL
-* so only the bits: 13-8 are programmed with the PBL passed from the
-* platform.
 */
value |= 

Re: [PATCH v3 3/6] net: stmmac: stmmac_platform: fix parsing of DT binding

[Alexandre Torgue]

Hi

On 12/08/2016 10:46 AM, Niklas Cassel wrote:

On 12/08/2016 10:02 AM, Alexandre Torgue wrote:

Hi Niklas

On 12/07/2016 03:20 PM, Niklas Cassel wrote:

From: Niklas Cassel <niklas.cas...@axis.com>

commit 64c3b252e9fc ("net: stmmac: fixed the pbl setting with DT")
changed the parsing of the DT binding.

Before 64c3b252e9fc, snps,fixed-burst and snps,mixed-burst were parsed
regardless if the property snps,pbl existed or not.
After the commit, fixed burst and mixed burst are only parsed if
snps,pbl exists. Now when snps,aal has been added, it too is only
parsed if snps,pbl exists.

Since the DT binding does not specify that fixed burst, mixed burst
or aal depend on snps,pbl being specified, undo changes introduced
by 64c3b252e9fc.

The issue commit 64c3b252e9fc ("net: stmmac: fixed the pbl setting with
DT") tries to address is solved in another way:
The databook specifies that all values other than
1, 2, 4, 8, 16, or 32 results in undefined behavior,
so snps,pbl = <0> is invalid.

If pbl is 0 after parsing, set pbl to DEFAULT_DMA_PBL.
This handles the case where the property is omitted, and also handles
the case where the property is specified without any data.

Signed-off-by: Niklas Cassel <niklas.cas...@axis.com>
---
 drivers/net/ethernet/stmicro/stmmac/stmmac_main.c  |  4 +--
 .../net/ethernet/stmicro/stmmac/stmmac_platform.c  | 29 +++---
 2 files changed, 17 insertions(+), 16 deletions(-)

diff --git a/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c 
b/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c
index b1e42ddf0370..b5188122bc15 100644
--- a/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c
+++ b/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c
@@ -1581,8 +1581,8 @@ static int stmmac_init_dma_engine(struct stmmac_priv 
*priv)
 int atds = 0;
 int ret = 0;

-if (!priv->plat->dma_cfg) {
-dev_err(priv->device, "DMA configuration not found\n");
+if (!priv->plat->dma_cfg || !priv->plat->dma_cfg->pbl) {


How "priv->plat->dma_cfg->pbl" could be equal to 0 if you force it to DEFAULT_DMA_PBL in 
"stmmac_probe_config_dt" in case of DT doesn't set pbl value?


The PCI glue code does not call stmmac_probe_config_dt.

Also any glue driver could override the value set by stmmac_probe_config_dt
before calling stmmac_dvr_probe. So I guess if we want any trustworthy
sanity-checking, it actually has to be done in stmmac_main.c.


Ok I see, it is more safe. You can add my Acked-by.

Thanks
Alex








+dev_err(priv->device, "Invalid DMA configuration\n");
 return -EINVAL;
 }

diff --git a/drivers/net/ethernet/stmicro/stmmac/stmmac_platform.c 
b/drivers/net/ethernet/stmicro/stmmac/stmmac_platform.c
index d3b6f92f350a..81800f23a9c4 100644
--- a/drivers/net/ethernet/stmicro/stmmac/stmmac_platform.c
+++ b/drivers/net/ethernet/stmicro/stmmac/stmmac_platform.c
@@ -304,21 +304,22 @@ stmmac_probe_config_dt(struct platform_device *pdev, 
const char **mac)
 plat->force_sf_dma_mode = 1;
 }

-if (of_find_property(np, "snps,pbl", NULL)) {
-dma_cfg = devm_kzalloc(>dev, sizeof(*dma_cfg),
-   GFP_KERNEL);
-if (!dma_cfg) {
-stmmac_remove_config_dt(pdev, plat);
-return ERR_PTR(-ENOMEM);
-}
-plat->dma_cfg = dma_cfg;
-of_property_read_u32(np, "snps,pbl", _cfg->pbl);
-dma_cfg->aal = of_property_read_bool(np, "snps,aal");
-dma_cfg->fixed_burst =
-of_property_read_bool(np, "snps,fixed-burst");
-dma_cfg->mixed_burst =
-of_property_read_bool(np, "snps,mixed-burst");
+dma_cfg = devm_kzalloc(>dev, sizeof(*dma_cfg),
+   GFP_KERNEL);
+if (!dma_cfg) {
+stmmac_remove_config_dt(pdev, plat);
+return ERR_PTR(-ENOMEM);
 }
+plat->dma_cfg = dma_cfg;
+
+of_property_read_u32(np, "snps,pbl", _cfg->pbl);
+if (!dma_cfg->pbl)
+dma_cfg->pbl = DEFAULT_DMA_PBL;
+
+dma_cfg->aal = of_property_read_bool(np, "snps,aal");
+dma_cfg->fixed_burst = of_property_read_bool(np, "snps,fixed-burst");
+dma_cfg->mixed_burst = of_property_read_bool(np, "snps,mixed-burst");
+
 plat->force_thresh_dma_mode = of_property_read_bool(np, 
"snps,force_thresh_dma_mode");
 if (plat->force_thresh_dma_mode) {
 plat->force_sf_dma_mode = 0;

Re: [PATCH v3 4/6] net: stmmac: dwmac1000: fix define DMA_BUS_MODE_RPBL_MASK

[Alexandre Torgue]

Hi Niklas

On 12/07/2016 03:20 PM, Niklas Cassel wrote:

From: Niklas Cassel 

DMA_BUS_MODE_RPBL_MASK is really 6 bits,
just like DMA_BUS_MODE_PBL_MASK.

Signed-off-by: Niklas Cassel 
---
 drivers/net/ethernet/stmicro/stmmac/dwmac1000.h | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac1000.h 
b/drivers/net/ethernet/stmicro/stmmac/dwmac1000.h
index ff3e5ab39bd0..52b9407a8a39 100644
--- a/drivers/net/ethernet/stmicro/stmmac/dwmac1000.h
+++ b/drivers/net/ethernet/stmicro/stmmac/dwmac1000.h
@@ -225,7 +225,7 @@ enum rx_tx_priority_ratio {

 #define DMA_BUS_MODE_FB0x0001  /* Fixed burst */
 #define DMA_BUS_MODE_MB0x0400  /* Mixed burst */
-#define DMA_BUS_MODE_RPBL_MASK 0x003e  /* Rx-Programmable Burst Len */
+#define DMA_BUS_MODE_RPBL_MASK 0x007e  /* Rx-Programmable Burst Len */


Well spot. You can add my Acked-by.

Regards
Alex


 #define DMA_BUS_MODE_RPBL_SHIFT17
 #define DMA_BUS_MODE_USP   0x0080
 #define DMA_BUS_MODE_MAXPBL0x0100

Re: [PATCH v3 3/6] net: stmmac: stmmac_platform: fix parsing of DT binding

[Alexandre Torgue]

Hi Niklas

On 12/07/2016 03:20 PM, Niklas Cassel wrote:

From: Niklas Cassel 

commit 64c3b252e9fc ("net: stmmac: fixed the pbl setting with DT")
changed the parsing of the DT binding.

Before 64c3b252e9fc, snps,fixed-burst and snps,mixed-burst were parsed
regardless if the property snps,pbl existed or not.
After the commit, fixed burst and mixed burst are only parsed if
snps,pbl exists. Now when snps,aal has been added, it too is only
parsed if snps,pbl exists.

Since the DT binding does not specify that fixed burst, mixed burst
or aal depend on snps,pbl being specified, undo changes introduced
by 64c3b252e9fc.

The issue commit 64c3b252e9fc ("net: stmmac: fixed the pbl setting with
DT") tries to address is solved in another way:
The databook specifies that all values other than
1, 2, 4, 8, 16, or 32 results in undefined behavior,
so snps,pbl = <0> is invalid.

If pbl is 0 after parsing, set pbl to DEFAULT_DMA_PBL.
This handles the case where the property is omitted, and also handles
the case where the property is specified without any data.

Signed-off-by: Niklas Cassel 
---
 drivers/net/ethernet/stmicro/stmmac/stmmac_main.c  |  4 +--
 .../net/ethernet/stmicro/stmmac/stmmac_platform.c  | 29 +++---
 2 files changed, 17 insertions(+), 16 deletions(-)

diff --git a/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c 
b/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c
index b1e42ddf0370..b5188122bc15 100644
--- a/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c
+++ b/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c
@@ -1581,8 +1581,8 @@ static int stmmac_init_dma_engine(struct stmmac_priv 
*priv)
int atds = 0;
int ret = 0;

-   if (!priv->plat->dma_cfg) {
-   dev_err(priv->device, "DMA configuration not found\n");
+   if (!priv->plat->dma_cfg || !priv->plat->dma_cfg->pbl) {


How "priv->plat->dma_cfg->pbl" could be equal to 0 if you force it to 
DEFAULT_DMA_PBL in "stmmac_probe_config_dt" in case of DT doesn't set 
pbl value?




+   dev_err(priv->device, "Invalid DMA configuration\n");
return -EINVAL;
}

diff --git a/drivers/net/ethernet/stmicro/stmmac/stmmac_platform.c 
b/drivers/net/ethernet/stmicro/stmmac/stmmac_platform.c
index d3b6f92f350a..81800f23a9c4 100644
--- a/drivers/net/ethernet/stmicro/stmmac/stmmac_platform.c
+++ b/drivers/net/ethernet/stmicro/stmmac/stmmac_platform.c
@@ -304,21 +304,22 @@ stmmac_probe_config_dt(struct platform_device *pdev, 
const char **mac)
plat->force_sf_dma_mode = 1;
}

-   if (of_find_property(np, "snps,pbl", NULL)) {
-   dma_cfg = devm_kzalloc(>dev, sizeof(*dma_cfg),
-  GFP_KERNEL);
-   if (!dma_cfg) {
-   stmmac_remove_config_dt(pdev, plat);
-   return ERR_PTR(-ENOMEM);
-   }
-   plat->dma_cfg = dma_cfg;
-   of_property_read_u32(np, "snps,pbl", _cfg->pbl);
-   dma_cfg->aal = of_property_read_bool(np, "snps,aal");
-   dma_cfg->fixed_burst =
-   of_property_read_bool(np, "snps,fixed-burst");
-   dma_cfg->mixed_burst =
-   of_property_read_bool(np, "snps,mixed-burst");
+   dma_cfg = devm_kzalloc(>dev, sizeof(*dma_cfg),
+  GFP_KERNEL);
+   if (!dma_cfg) {
+   stmmac_remove_config_dt(pdev, plat);
+   return ERR_PTR(-ENOMEM);
}
+   plat->dma_cfg = dma_cfg;
+
+   of_property_read_u32(np, "snps,pbl", _cfg->pbl);
+   if (!dma_cfg->pbl)
+   dma_cfg->pbl = DEFAULT_DMA_PBL;
+
+   dma_cfg->aal = of_property_read_bool(np, "snps,aal");
+   dma_cfg->fixed_burst = of_property_read_bool(np, "snps,fixed-burst");
+   dma_cfg->mixed_burst = of_property_read_bool(np, "snps,mixed-burst");
+
plat->force_thresh_dma_mode = of_property_read_bool(np, 
"snps,force_thresh_dma_mode");
if (plat->force_thresh_dma_mode) {
plat->force_sf_dma_mode = 0;

Re: [PATCH v3 2/6] net: stmmac: simplify the common DMA init API

[Alexandre Torgue]

Hi Niklas,

On 12/07/2016 03:20 PM, Niklas Cassel wrote:

From: Niklas Cassel 

Use struct stmmac_dma_cfg *dma_cfg as an argument rather
than using all the struct members as individual arguments.

Signed-off-by: Niklas Cassel 


Thanks for this patch. You can add my Acked-by.

Regards
Alex



---
 drivers/net/ethernet/stmicro/stmmac/common.h|  4 ++--
 drivers/net/ethernet/stmicro/stmmac/dwmac1000_dma.c | 13 +++--
 drivers/net/ethernet/stmicro/stmmac/dwmac100_dma.c  |  7 ---
 drivers/net/ethernet/stmicro/stmmac/dwmac4_dma.c| 14 --
 drivers/net/ethernet/stmicro/stmmac/stmmac_main.c   |  6 +-
 5 files changed, 22 insertions(+), 22 deletions(-)

diff --git a/drivers/net/ethernet/stmicro/stmmac/common.h 
b/drivers/net/ethernet/stmicro/stmmac/common.h
index 3ced2e1703c1..b13a144f72ad 100644
--- a/drivers/net/ethernet/stmicro/stmmac/common.h
+++ b/drivers/net/ethernet/stmicro/stmmac/common.h
@@ -412,8 +412,8 @@ extern const struct stmmac_desc_ops ndesc_ops;
 struct stmmac_dma_ops {
/* DMA core initialization */
int (*reset)(void __iomem *ioaddr);
-   void (*init)(void __iomem *ioaddr, int pbl, int fb, int mb,
-int aal, u32 dma_tx, u32 dma_rx, int atds);
+   void (*init)(void __iomem *ioaddr, struct stmmac_dma_cfg *dma_cfg,
+u32 dma_tx, u32 dma_rx, int atds);
/* Configure the AXI Bus Mode Register */
void (*axi)(void __iomem *ioaddr, struct stmmac_axi *axi);
/* Dump DMA registers */
diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac1000_dma.c 
b/drivers/net/ethernet/stmicro/stmmac/dwmac1000_dma.c
index f35385266fbf..318ae9f10104 100644
--- a/drivers/net/ethernet/stmicro/stmmac/dwmac1000_dma.c
+++ b/drivers/net/ethernet/stmicro/stmmac/dwmac1000_dma.c
@@ -84,8 +84,9 @@ static void dwmac1000_dma_axi(void __iomem *ioaddr, struct 
stmmac_axi *axi)
writel(value, ioaddr + DMA_AXI_BUS_MODE);
 }

-static void dwmac1000_dma_init(void __iomem *ioaddr, int pbl, int fb, int mb,
-  int aal, u32 dma_tx, u32 dma_rx, int atds)
+static void dwmac1000_dma_init(void __iomem *ioaddr,
+  struct stmmac_dma_cfg *dma_cfg,
+  u32 dma_tx, u32 dma_rx, int atds)
 {
u32 value = readl(ioaddr + DMA_BUS_MODE);

@@ -101,20 +102,20 @@ static void dwmac1000_dma_init(void __iomem *ioaddr, int 
pbl, int fb, int mb,
 */
value |= DMA_BUS_MODE_MAXPBL;
value &= ~DMA_BUS_MODE_PBL_MASK;
-   value |= (pbl << DMA_BUS_MODE_PBL_SHIFT);
+   value |= (dma_cfg->pbl << DMA_BUS_MODE_PBL_SHIFT);

/* Set the Fixed burst mode */
-   if (fb)
+   if (dma_cfg->fixed_burst)
value |= DMA_BUS_MODE_FB;

/* Mixed Burst has no effect when fb is set */
-   if (mb)
+   if (dma_cfg->mixed_burst)
value |= DMA_BUS_MODE_MB;

if (atds)
value |= DMA_BUS_MODE_ATDS;

-   if (aal)
+   if (dma_cfg->aal)
value |= DMA_BUS_MODE_AAL;

writel(value, ioaddr + DMA_BUS_MODE);
diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac100_dma.c 
b/drivers/net/ethernet/stmicro/stmmac/dwmac100_dma.c
index 61f54c99a7de..e5664da382f3 100644
--- a/drivers/net/ethernet/stmicro/stmmac/dwmac100_dma.c
+++ b/drivers/net/ethernet/stmicro/stmmac/dwmac100_dma.c
@@ -32,11 +32,12 @@
 #include "dwmac100.h"
 #include "dwmac_dma.h"

-static void dwmac100_dma_init(void __iomem *ioaddr, int pbl, int fb, int mb,
- int aal, u32 dma_tx, u32 dma_rx, int atds)
+static void dwmac100_dma_init(void __iomem *ioaddr,
+ struct stmmac_dma_cfg *dma_cfg,
+ u32 dma_tx, u32 dma_rx, int atds)
 {
/* Enable Application Access by writing to DMA CSR0 */
-   writel(DMA_BUS_MODE_DEFAULT | (pbl << DMA_BUS_MODE_PBL_SHIFT),
+   writel(DMA_BUS_MODE_DEFAULT | (dma_cfg->pbl << DMA_BUS_MODE_PBL_SHIFT),
   ioaddr + DMA_BUS_MODE);

/* Mask interrupts by writing to CSR7 */
diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac4_dma.c 
b/drivers/net/ethernet/stmicro/stmmac/dwmac4_dma.c
index e81b6e565c29..7d82a3464097 100644
--- a/drivers/net/ethernet/stmicro/stmmac/dwmac4_dma.c
+++ b/drivers/net/ethernet/stmicro/stmmac/dwmac4_dma.c
@@ -99,27 +99,29 @@ static void dwmac4_dma_init_channel(void __iomem *ioaddr, 
int pbl,
writel(dma_rx_phy, ioaddr + DMA_CHAN_RX_BASE_ADDR(channel));
 }

-static void dwmac4_dma_init(void __iomem *ioaddr, int pbl, int fb, int mb,
-   int aal, u32 dma_tx, u32 dma_rx, int atds)
+static void dwmac4_dma_init(void __iomem *ioaddr,
+   struct stmmac_dma_cfg *dma_cfg,
+   u32 dma_tx, u32 dma_rx, int atds)
 {
u32 value = readl(ioaddr + DMA_SYS_BUS_MODE);
int i;

/* Set the Fixed burst mode 

Re: stmmac ethernet in kernel 4.9-rc6: coalescing related pauses.

[Alexandre Torgue]

Hi Pavel and Peppe,

On 12/02/2016 02:51 PM, Giuseppe CAVALLARO wrote:

On 12/2/2016 1:32 PM, Pavel Machek wrote:

Hi!


Well, if you have a workload that sends and receive packets, it tends
to work ok, as you do tx_clean() in stmmac_poll(). My workload is not
like that -- it is "sending packets at 3MB/sec, receiving none". So
the stmmac_tx_timer() is rescheduled and rescheduled and rescheduled,
and then we run out of transmit descriptors, and then 40msec passes,
and then we clean them. Bad.

And that's why low-res timers do not cut it.


in that case, I expect that the tuning of the driver could help you.
I mean, by using ethtool, it could be enough to set the IC bit on all
the descriptors. You should touch the tx_coal_frames.

Then you can use ethtool -S to monitor the status.


Yes, I did something similar. Unfortnunately that meant crash within
minutes, at least with 4.4 kernel. (If you know what was fixed between
4.4 and 4.9, that would be helpful).


4.4 has no GMAC4 support.
Alex, do you remember any patches to fix that?


No sorry Peppe.

Pavel,

Sorry but I'm a little bit confused. I'm dropped in some mails without 
historic. I see cleanup, coalescence issue and TSO question.

What is your main issue? Are you working on gmac4 or 3.x ?
Can you refresh a little bit the story please ?

Regards
Alex



We had experimented this tuning on STB IP where just datagrams
had to send externally. To be honest, although we had seen
better results w/o any timer, we kept this approach enabled
because the timer was fast enough to cover our tests on SH4 boxes.


Please reply to David, and explain how it is supposed to
work... because right now it does not. 40 msec delays are not
acceptable in default configuration.


I mean, that on UP and SMP system this schema helped
to improve the performance saving CPU on my side and this has been
tested since a long time (~4 years).
I tested something similar to yours where unidirectional traffic
with limited throughput was needed and I can confirm you that
tuning/removing coalesce parameters this helped. The tuning I decided
to keep in the driver was suitable in several user cases and if now
you have problems or you want to review it I can just confirm that
there are no problems on my side. If you want to simply the logic
around the tx process and remove timer on official driver I can accept
that. I will just ask you uto double check if the throughput and
CPU usage when request max throughput (better if on GiGa setup) has
no regressions.
Otherwise we could start thinking about adaptive schema if feasible.


In the ring, some descriptors can raise the irq (according to a
threshold) and set the IC bit. In this path, the NAPI  poll will be
scheduled.


Not NAPI poll but stmmac_tx_timer(), right?


in the xmit according the the threshold the timer is started or the
interrupt is set inside the descriptor.
Then stmmac_tx_clean will be always called and, if you see the flow,
no irqlock protection is needed!


Agreed that no irqlock protection is needed if we rely on napi and
timers.


ok




Concerning the lock protection, we had reviewed long time ago and
IIRC, no raise condition should be present. Open to review it,
again!

...

There's nothing that protect stmmac_poll() from running concurently
with stmmac_dma_interrupt(), right?


This is not necessary.


dma_interrupt accesses shared priv->xstats; variables are of type
unsigned long (not atomic_t), yet they are accesssed from interrupt
context and from stmmac_ethtool without any locking. That can result
in broken statistics AFAICT.


ok we can check this and welcome patches and I'd prefer to
remove xstats from critical part of the code like ISR (that
comes from old story of the driver).



Please take another look. As far as I can tell, you can have two cpus
at #1 and #2 in the code, at the same time. It looks like napi_... has
some atomic opertions inside so that looks safe at the first look. But
I'm not sure if they also include enough memory barriers to make it
safe...?


Although I have never reproduced related issues on SMP platforms
due to reordering of memory operations but, as said above, welcome
review on this especially if you are seeing problems when manage NAPI.

FYI, the only memory barrier you will see in the driver are about the
OWN_BIT setting till now.


static void stmmac_dma_interrupt(struct stmmac_priv *priv)
{
...
status = priv->hw->dma->dma_interrupt(priv->ioaddr,
>xstats);
if (likely((status & handle_rx)) || (status & handle_tx)) {
if (likely(napi_schedule_prep(>napi))) {
#1
stmmac_disable_dma_irq(priv);
__napi_schedule(>napi);
}
}


static int stmmac_poll(struct napi_struct *napi, int budget)
{
struct stmmac_priv *priv = container_of(napi, struct
stmmac_priv, napi);
int work_done = 0;

priv->xstats.napi_poll++;
stmmac_tx_clean(priv);

work_done = 

Re: [PATCH] stmmac: reduce code duplication getting basic descriptors

[Alexandre Torgue]

Hi Pavel,

On 11/28/2016 01:17 PM, Pavel Machek wrote:


Remove code duplication getting basic descriptors.


I agree with your patch, it will make code easier to understand.
After fix kbuild issue you can add my Acked-by;

Regards
Alex



Signed-off-by: Pavel Machek 

diff --git a/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c 
b/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c
index f7133d0..ed20668 100644
--- a/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c
+++ b/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c
@@ -929,6 +929,17 @@ static int stmmac_set_bfsize(int mtu, int bufsize)
return ret;
 }

+static inline struct dma_desc *stmmac_tx_desc(struct stmmac_priv *priv, int i)
+{
+   struct dma_desc *p;
+   if (priv->extend_desc)
+   p = &((priv->dma_etx + i)->basic);
+   else
+   p = priv->dma_tx + i;
+   return p;
+}
+
+
 /**
  * stmmac_clear_descriptors - clear descriptors
  * @priv: driver private structure
@@ -1078,11 +1089,7 @@ static int init_dma_desc_rings(struct net_device *dev, 
gfp_t flags)

/* TX INITIALIZATION */
for (i = 0; i < DMA_TX_SIZE; i++) {
-   struct dma_desc *p;
-   if (priv->extend_desc)
-   p = &((priv->dma_etx + i)->basic);
-   else
-   p = priv->dma_tx + i;
+   struct dma_desc *p = stmmac_tx_desc(priv, i);

if (priv->synopsys_id >= DWMAC_CORE_4_00) {
p->des0 = 0;
@@ -1129,12 +1136,7 @@ static void dma_free_tx_skbufs(struct stmmac_priv *priv)
int i;

for (i = 0; i < DMA_TX_SIZE; i++) {
-   struct dma_desc *p;
-
-   if (priv->extend_desc)
-   p = &((priv->dma_etx + i)->basic);
-   else
-   p = priv->dma_tx + i;
+   struct dma_desc *p = stmmac_tx_desc(priv, i);

if (priv->tx_skbuff_dma[i].buf) {
if (priv->tx_skbuff_dma[i].map_as_page)
@@ -1314,14 +1316,9 @@ static void __stmmac_tx_clean(struct stmmac_priv *priv)

while (entry != priv->cur_tx) {
struct sk_buff *skb = priv->tx_skbuff[entry];
-   struct dma_desc *p;
+   struct dma_desc *p = stmmac_tx_desc(priv, entry);
int status;

-   if (priv->extend_desc)
-   p = (struct dma_desc *)(priv->dma_etx + entry);
-   else
-   p = priv->dma_tx + entry;
-
status = priv->hw->desc->tx_status(>dev->stats,
  >xstats, p,
  priv->ioaddr);
@@ -2227,11 +2224,7 @@ static netdev_tx_t stmmac_xmit(struct sk_buff *skb, 
struct net_device *dev)

csum_insertion = (skb->ip_summed == CHECKSUM_PARTIAL);

-   if (likely(priv->extend_desc))
-   desc = (struct dma_desc *)(priv->dma_etx + entry);
-   else
-   desc = priv->dma_tx + entry;
-
+   desc = stmmac_tx_desc(priv, entry);
first = desc;

priv->tx_skbuff[first_entry] = skb;
@@ -2254,10 +2247,7 @@ static netdev_tx_t stmmac_xmit(struct sk_buff *skb, 
struct net_device *dev)

entry = STMMAC_GET_ENTRY(entry, DMA_TX_SIZE);

-   if (likely(priv->extend_desc))
-   desc = (struct dma_desc *)(priv->dma_etx + entry);
-   else
-   desc = priv->dma_tx + entry;
+   desc = stmmac_tx_desc(priv, entry);

des = skb_frag_dma_map(priv->device, frag, 0, len,
   DMA_TO_DEVICE);

Re: [PATCH] net: stmmac: enable tx queue 0 for gmac4 IPs synthesized with multiple TX queues

[Alexandre Torgue]

Hi David and Niklas,

On 11/28/2016 05:29 PM, David Miller wrote:

From: Niklas Cassel 
Date: Thu, 24 Nov 2016 15:36:33 +0100


From: Niklas Cassel 

The dwmac4 IP can synthesized with 1-8 number of tx queues.
On an IP synthesized with DWC_EQOS_NUM_TXQ > 1, all txqueues are disabled
by default. For these IPs, the bitfield TXQEN is R/W.

Always enable tx queue 0. The write will have no effect on IPs synthesized
with DWC_EQOS_NUM_TXQ == 1.

The driver does still not utilize more than one tx queue in the IP.

Signed-off-by: Niklas Cassel 


Alexandre, we are still waiting for your implicit/explicit ACK on this
change.


Yes you could add my Acked-by but it is already merged. My fault.
Sorry for my late answer :(



Thank you.

Re: [PATCH] net: stmmac: enable tx queue 0 for gmac4 IPs synthesized with multiple TX queues

[Alexandre Torgue]

Hi Niklas

On 11/25/2016 01:14 PM, Niklas Cassel wrote:

On 11/25/2016 01:10 PM, Niklas Cassel wrote:

On 11/24/2016 07:11 PM, Alexandre Torgue wrote:

Hi Niklas,

Hello Alexandre


On 11/24/2016 03:36 PM, Niklas Cassel wrote:

From: Niklas Cassel <niklas.cas...@axis.com>

The dwmac4 IP can synthesized with 1-8 number of tx queues.
On an IP synthesized with DWC_EQOS_NUM_TXQ > 1, all txqueues are disabled
by default. For these IPs, the bitfield TXQEN is R/W.

Always enable tx queue 0. The write will have no effect on IPs synthesized
with DWC_EQOS_NUM_TXQ == 1.

The driver does still not utilize more than one tx queue in the IP.

Signed-off-by: Niklas Cassel <niklas.cas...@axis.com>
---
 drivers/net/ethernet/stmicro/stmmac/dwmac4.h |  3 +++
 drivers/net/ethernet/stmicro/stmmac/dwmac4_dma.c | 12 +++-
 2 files changed, 14 insertions(+), 1 deletion(-)

diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac4.h 
b/drivers/net/ethernet/stmicro/stmmac/dwmac4.h
index 6f4f5ce25114..3e8d4fefa5e0 100644
--- a/drivers/net/ethernet/stmicro/stmmac/dwmac4.h
+++ b/drivers/net/ethernet/stmicro/stmmac/dwmac4.h
@@ -155,8 +155,11 @@ enum power_event {
 #define MTL_CHAN_RX_DEBUG(x)(MTL_CHANX_BASE_ADDR(x) + 0x38)

 #define MTL_OP_MODE_RSFBIT(5)
+#define MTL_OP_MODE_TXQENBIT(3)
 #define MTL_OP_MODE_TSFBIT(1)

+#define MTL_OP_MODE_TQS_MASKGENMASK(24, 16)
+
 #define MTL_OP_MODE_TTC_MASK0x70
 #define MTL_OP_MODE_TTC_SHIFT4

diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac4_dma.c 
b/drivers/net/ethernet/stmicro/stmmac/dwmac4_dma.c
index 116151cd6a95..577316de6ba8 100644
--- a/drivers/net/ethernet/stmicro/stmmac/dwmac4_dma.c
+++ b/drivers/net/ethernet/stmicro/stmmac/dwmac4_dma.c
@@ -213,7 +213,17 @@ static void dwmac4_dma_chan_op_mode(void __iomem *ioaddr, 
int txmode,
 else
 mtl_tx_op |= MTL_OP_MODE_TTC_512;
 }
-
+/* For an IP with DWC_EQOS_NUM_TXQ == 1, the fields TXQEN and TQS are RO
+ * with reset values: TXQEN on, TQS == DWC_EQOS_TXFIFO_SIZE.
+ * For an IP with DWC_EQOS_NUM_TXQ > 1, the fields TXQEN and TQS are R/W
+ * with reset values: TXQEN off, TQS 256 bytes.
+ *
+ * Write the bits in both cases, since it will have no effect when RO.
+ * For DWC_EQOS_NUM_TXQ > 1, the top bits in MTL_OP_MODE_TQS_MASK might
+ * be RO, however, writing the whole TQS field will result in a value
+ * equal to DWC_EQOS_TXFIFO_SIZE, just like for DWC_EQOS_NUM_TXQ == 1.
+ */
+mtl_tx_op |= MTL_OP_MODE_TXQEN | MTL_OP_MODE_TQS_MASK;

Your patch sounds good. Just one question:

In synopsys databook I use, I see that MTL_OP_MODE_TXQEN for channel 2 can take several 
values "disabled / enabled / Enabled in AV mode":

Transmit Queue Enable
This field is used to enable/disable the transmit queue 1. 00 R/W
■ 2'b00 - Not enabled
■ 2'b01 - Enable in AV mode (Reserved when Enable Audio Video
Bridging is not selected while configuring the core)
■ 2'b10 - Enabled
■ 2'b11 - Reserved

Do you plan to manage av mode in a future patch ?

We are not planning on using the AV mode.
We will probably not use TXQ1 at all.

I noticed that the MAC_HW_Feature2 Register actually has a TXQCNT field.
It is currently saved in priv->dma_cap.number_tx_channel.
If you prefer, I could do a patch V2 where we only set the bits if
priv->dma_cap.number_tx_channel > 1


Oh, sorry, that was number of tx _channels_,
not number of tx _queues_.

However, we could add a number_tx_queue to struct dma_features,
if you would prefer that.


I agree your patch is good. It will work even if we use several tx 
channels. We will see in the future for AV mode.


regards
alex





However, I don't think the current patch is too bad either, since the bits
are RO when number_tx_channel == 1.



Regards
Alex


 writel(mtl_tx_op, ioaddr +  MTL_CHAN_TX_OP_MODE(channel));

 mtl_rx_op = readl(ioaddr + MTL_CHAN_RX_OP_MODE(channel));

Re: [PATCH] net: stmmac: enable tx queue 0 for gmac4 IPs synthesized with multiple TX queues

[Alexandre Torgue]

Hi Niklas,

On 11/24/2016 03:36 PM, Niklas Cassel wrote:

From: Niklas Cassel 

The dwmac4 IP can synthesized with 1-8 number of tx queues.
On an IP synthesized with DWC_EQOS_NUM_TXQ > 1, all txqueues are disabled
by default. For these IPs, the bitfield TXQEN is R/W.

Always enable tx queue 0. The write will have no effect on IPs synthesized
with DWC_EQOS_NUM_TXQ == 1.

The driver does still not utilize more than one tx queue in the IP.

Signed-off-by: Niklas Cassel 
---
 drivers/net/ethernet/stmicro/stmmac/dwmac4.h |  3 +++
 drivers/net/ethernet/stmicro/stmmac/dwmac4_dma.c | 12 +++-
 2 files changed, 14 insertions(+), 1 deletion(-)

diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac4.h 
b/drivers/net/ethernet/stmicro/stmmac/dwmac4.h
index 6f4f5ce25114..3e8d4fefa5e0 100644
--- a/drivers/net/ethernet/stmicro/stmmac/dwmac4.h
+++ b/drivers/net/ethernet/stmicro/stmmac/dwmac4.h
@@ -155,8 +155,11 @@ enum power_event {
 #define MTL_CHAN_RX_DEBUG(x)   (MTL_CHANX_BASE_ADDR(x) + 0x38)

 #define MTL_OP_MODE_RSFBIT(5)
+#define MTL_OP_MODE_TXQEN  BIT(3)
 #define MTL_OP_MODE_TSFBIT(1)

+#define MTL_OP_MODE_TQS_MASK   GENMASK(24, 16)
+
 #define MTL_OP_MODE_TTC_MASK   0x70
 #define MTL_OP_MODE_TTC_SHIFT  4

diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac4_dma.c 
b/drivers/net/ethernet/stmicro/stmmac/dwmac4_dma.c
index 116151cd6a95..577316de6ba8 100644
--- a/drivers/net/ethernet/stmicro/stmmac/dwmac4_dma.c
+++ b/drivers/net/ethernet/stmicro/stmmac/dwmac4_dma.c
@@ -213,7 +213,17 @@ static void dwmac4_dma_chan_op_mode(void __iomem *ioaddr, 
int txmode,
else
mtl_tx_op |= MTL_OP_MODE_TTC_512;
}
-
+   /* For an IP with DWC_EQOS_NUM_TXQ == 1, the fields TXQEN and TQS are RO
+* with reset values: TXQEN on, TQS == DWC_EQOS_TXFIFO_SIZE.
+* For an IP with DWC_EQOS_NUM_TXQ > 1, the fields TXQEN and TQS are R/W
+* with reset values: TXQEN off, TQS 256 bytes.
+*
+* Write the bits in both cases, since it will have no effect when RO.
+* For DWC_EQOS_NUM_TXQ > 1, the top bits in MTL_OP_MODE_TQS_MASK might
+* be RO, however, writing the whole TQS field will result in a value
+* equal to DWC_EQOS_TXFIFO_SIZE, just like for DWC_EQOS_NUM_TXQ == 1.
+*/
+   mtl_tx_op |= MTL_OP_MODE_TXQEN | MTL_OP_MODE_TQS_MASK;


Your patch sounds good. Just one question:

In synopsys databook I use, I see that MTL_OP_MODE_TXQEN for channel 2 
can take several values "disabled / enabled / Enabled in AV mode":


Transmit Queue Enable
This field is used to enable/disable the transmit queue 1. 00 R/W
■ 2'b00 - Not enabled
■ 2'b01 - Enable in AV mode (Reserved when Enable Audio Video
Bridging is not selected while configuring the core)
■ 2'b10 - Enabled
■ 2'b11 - Reserved

Do you plan to manage av mode in a future patch ?

Regards
Alex


writel(mtl_tx_op, ioaddr +  MTL_CHAN_TX_OP_MODE(channel));

mtl_rx_op = readl(ioaddr + MTL_CHAN_RX_OP_MODE(channel));

Re: [PATCH 4/4] net: stmmac: stmmac_platform: use correct setup function for gmac4

[Alexandre Torgue]

Hi Niklas,

On 11/23/2016 03:25 PM, Niklas Cassel wrote:

From: Niklas Cassel 

devicetree binding for stmmac states:
- compatible: Should be "snps,dwmac-", "snps,dwmac"
For backwards compatibility: "st,spear600-gmac" is also supported.

Previously, when specifying "snps,dwmac-4.10a", "snps,dwmac" as your
compatible string, plat_stmmacenet_data would have both has_gmac and
has_gmac4 set.

This would lead to stmmac_hw_init calling dwmac1000_setup rather than
dwmac4_setup, resulting in a non-functional driver.
This happened since the check for has_gmac is done before the check for
has_gmac4. However, the order should not matter, so it does not make sense
to have both set.


Well spot.



If something is valid for both, you should do as the stmmac_interrupt does:
if (priv->plat->has_gmac || priv->plat->has_gmac4) ...

The places where it was obvious that the author actually meant
if (has_gmac || has_gmac4) rather than if (has_gmac) has been updated.

Signed-off-by: Niklas Cassel 
---
 drivers/net/ethernet/stmicro/stmmac/stmmac_ethtool.c  | 4 ++--
 drivers/net/ethernet/stmicro/stmmac/stmmac_platform.c | 1 +
 2 files changed, 3 insertions(+), 2 deletions(-)

diff --git a/drivers/net/ethernet/stmicro/stmmac/stmmac_ethtool.c 
b/drivers/net/ethernet/stmicro/stmmac/stmmac_ethtool.c
index d5a8122b6033..dd5b38e4cd1f 100644
--- a/drivers/net/ethernet/stmicro/stmmac/stmmac_ethtool.c
+++ b/drivers/net/ethernet/stmicro/stmmac/stmmac_ethtool.c
@@ -263,7 +263,7 @@ static void stmmac_ethtool_getdrvinfo(struct net_device 
*dev,
 {
struct stmmac_priv *priv = netdev_priv(dev);

-   if (priv->plat->has_gmac)
+   if (priv->plat->has_gmac || priv->plat->has_gmac4)
strlcpy(info->driver, GMAC_ETHTOOL_NAME, sizeof(info->driver));
else
strlcpy(info->driver, MAC100_ETHTOOL_NAME,
@@ -448,7 +448,7 @@ static void stmmac_ethtool_gregs(struct net_device *dev,

memset(reg_space, 0x0, REG_SPACE_SIZE);

-   if (!priv->plat->has_gmac) {
+   if (!(priv->plat->has_gmac || priv->plat->has_gmac4)) {
/* MAC registers */
for (i = 0; i < 12; i++)
reg_space[i] = readl(priv->ioaddr + (i * 4));
diff --git a/drivers/net/ethernet/stmicro/stmmac/stmmac_platform.c 
b/drivers/net/ethernet/stmicro/stmmac/stmmac_platform.c
index 4d544c34c1f2..c8a59f396c6e 100644
--- a/drivers/net/ethernet/stmicro/stmmac/stmmac_platform.c
+++ b/drivers/net/ethernet/stmicro/stmmac/stmmac_platform.c
@@ -291,6 +291,7 @@ stmmac_probe_config_dt(struct platform_device *pdev, const 
char **mac)
if (of_device_is_compatible(np, "snps,dwmac-4.00") ||
of_device_is_compatible(np, "snps,dwmac-4.10a")) {
plat->has_gmac4 = 1;
+   plat->has_gmac = 0;
plat->pmt = 1;
plat->tso_en = of_property_read_bool(np, "snps,tso");
}


Thanks Niklas, Acked-by: 

Regards
Alex

Re: [PATCH 1/4] bindings: net: stmmac: correct note about TSO

[Alexandre Torgue]

Hi Niklas,

On 11/23/2016 03:24 PM, Niklas Cassel wrote:

From: Niklas Cassel 

snps,tso was previously placed under AXI BUS Mode parameters,
suggesting that the property should be in the stmmac-axi-config node.

TSO (TCP Segmentation Offloading) has nothing to do with AXI BUS Mode
parameters, and the parser actually expects it to be in the root node,
not in the stmmac-axi-config.

Also added a note about snps,tso only being available on GMAC4 and newer.

Signed-off-by: Niklas Cassel 
---
 Documentation/devicetree/bindings/net/stmmac.txt | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/Documentation/devicetree/bindings/net/stmmac.txt 
b/Documentation/devicetree/bindings/net/stmmac.txt
index 41b49e6075f5..b95ff998ba73 100644
--- a/Documentation/devicetree/bindings/net/stmmac.txt
+++ b/Documentation/devicetree/bindings/net/stmmac.txt
@@ -1,7 +1,7 @@
 * STMicroelectronics 10/100/1000 Ethernet driver (GMAC)

 Required properties:
-- compatible: Should be "snps,dwmac-" "snps,dwmac"
+- compatible: Should be "snps,dwmac-", "snps,dwmac"
For backwards compatibility: "st,spear600-gmac" is also supported.
 - reg: Address and length of the register set for the device
 - interrupt-parent: Should be the phandle for the interrupt controller
@@ -50,6 +50,8 @@ Optional properties:
 - snps,ps-speed: port selection speed that can be passed to the core when
 PCS is supported. For example, this is used in case of SGMII
 and MAC2MAC connection.
+- snps,tso: this enables the TSO feature otherwise it will be managed by
+MAC HW capability register. Only for GMAC4 and newer.
 - AXI BUS Mode parameters: below the list of all the parameters to program the
   AXI register inside the DMA module:
- snps,lpi_en: enable Low Power Interface
@@ -62,8 +64,6 @@ Optional properties:
- snps,fb: fixed-burst
- snps,mb: mixed-burst
- snps,rb: rebuild INCRx Burst
-   - snps,tso: this enables the TSO feature otherwise it will be managed by
-   MAC HW capability register.
 - mdio: with compatible = "snps,dwmac-mdio", create and register mdio bus.

 Examples:


Acked-by: 

Re: [PATCH (net.git) 0/3] stmmac: fix PTP support

[Alexandre Torgue]

Hi Peppe,


On 10/26/2016 08:56 AM, Giuseppe Cavallaro wrote:

This subset of patches aim to fix the PTP support
for the stmmac and especially for 4.x chip series.
While setting PTP on an ST box with 4.00a Ethernet
core, the kernel panics due to a broken settings
of the descriptors. The patches review the
register configuration, the algo used for configuring
the protocol, the way to get the timestamp inside
the RX/TX descriptors and, in the end, the statistics
displayed by ethtool.

Giuseppe Cavallaro (3):
  stmmac: update the PTP header file
  stmmac: fix PTP support for GMAC4
  stmmac: fix PTP type ethtool stats

 drivers/net/ethernet/stmicro/stmmac/common.h   | 24 +++---
 drivers/net/ethernet/stmicro/stmmac/descs.h| 20 +++--
 drivers/net/ethernet/stmicro/stmmac/dwmac4_descs.c | 95 -
 drivers/net/ethernet/stmicro/stmmac/dwmac4_descs.h |  4 +
 drivers/net/ethernet/stmicro/stmmac/enh_desc.c | 28 ---
 drivers/net/ethernet/stmicro/stmmac/stmmac.h   |  1 +
 .../net/ethernet/stmicro/stmmac/stmmac_ethtool.c   | 19 +++--
 .../net/ethernet/stmicro/stmmac/stmmac_hwtstamp.c  | 43 --
 drivers/net/ethernet/stmicro/stmmac/stmmac_main.c  | 97 +++---
 drivers/net/ethernet/stmicro/stmmac/stmmac_ptp.c   |  9 +-
 drivers/net/ethernet/stmicro/stmmac/stmmac_ptp.h   | 72 
 11 files changed, 260 insertions(+), 152 deletions(-)



For the series:
Acked-by: Alexandre Torgue <alexandre.tor...@st.com>

Thanks
Alex

[PATCH v2 1/3] ARM: dts: stm32f429: Align Ethernet node with new bindings properties

[Alexandre TORGUE]

This patch aligns clocks names and node reference according to new
stm32-dwmac glue binding. It also renames Ethernet pinctrl phandle
(indeed there is no need to add 0 as Ethernet instance as there is only
one IP in SOC).

Signed-off-by: Alexandre TORGUE <alexandre.tor...@st.com>

diff --git a/arch/arm/boot/dts/stm32429i-eval.dts 
b/arch/arm/boot/dts/stm32429i-eval.dts
index 13c7cd2..fa30bf1 100644
--- a/arch/arm/boot/dts/stm32429i-eval.dts
+++ b/arch/arm/boot/dts/stm32429i-eval.dts
@@ -94,11 +94,12 @@
clock-frequency = <2500>;
 };
 
- {
+ {
status = "okay";
-   pinctrl-0   = <_mii>;
+   pinctrl-0   = <_mii>;
pinctrl-names   = "default";
-   phy-mode= "mii-id";
+   phy-mode= "mii";
+
mdio0 {
#address-cells = <1>;
#size-cells = <0>;
diff --git a/arch/arm/boot/dts/stm32f429.dtsi b/arch/arm/boot/dts/stm32f429.dtsi
index 336ee4f..6350117b 100644
--- a/arch/arm/boot/dts/stm32f429.dtsi
+++ b/arch/arm/boot/dts/stm32f429.dtsi
@@ -313,7 +313,7 @@
};
};
 
-   ethernet0_mii: mii@0 {
+   ethernet_mii: mii@0 {
pins {
pinmux = 
,
 
,
@@ -373,13 +373,13 @@
st,mem2mem;
};
 
-   ethernet0: dwmac@40028000 {
+   mac: ethernet@40028000 {
compatible = "st,stm32-dwmac", "snps,dwmac-3.50a";
reg = <0x40028000 0x8000>;
reg-names = "stmmaceth";
interrupts = <61>, <62>;
interrupt-names = "macirq", "eth_wake_irq";
-   clock-names = "stmmaceth", "tx-clk", "rx-clk";
+   clock-names = "stmmaceth", "mac-clk-tx", "mac-clk-rx";
clocks = < 0 25>, < 0 26>, < 0 27>;
st,syscon = < 0x4>;
snps,pbl = <8>;
-- 
1.9.1

[PATCH v2 3/3] ARM: dts: stm32f429: remove Ethernet wake on Lan support

[Alexandre TORGUE]

This patch removes WoL (Wake on Lan) support as it is not yet
fully supported and tested.

Signed-off-by: Alexandre TORGUE <alexandre.tor...@st.com>

diff --git a/arch/arm/boot/dts/stm32f429.dtsi b/arch/arm/boot/dts/stm32f429.dtsi
index 6350117b..ad0bc6a 100644
--- a/arch/arm/boot/dts/stm32f429.dtsi
+++ b/arch/arm/boot/dts/stm32f429.dtsi
@@ -377,8 +377,8 @@
compatible = "st,stm32-dwmac", "snps,dwmac-3.50a";
reg = <0x40028000 0x8000>;
reg-names = "stmmaceth";
-   interrupts = <61>, <62>;
-   interrupt-names = "macirq", "eth_wake_irq";
+   interrupts = <61>;
+   interrupt-names = "macirq";
clock-names = "stmmaceth", "mac-clk-tx", "mac-clk-rx";
clocks = < 0 25>, < 0 26>, < 0 27>;
st,syscon = < 0x4>;
-- 
1.9.1

[PATCH v2 0/3] STM32F429: Add Ethernet fixes

[Alexandre TORGUE]

This v2 to avoid build issue when only patch 1 (of first series) 
was build. 

This series adds several fixes for Ethernet for stm32f429 MCU.
First patch has already been reviewed some months ago when 
stm32 Ethernet glue has been pushed (I added in this series to keep
history). Fixes are:
 -Change DT to be compliant to stm32 ethernet glue binding
 -Add phy-handle to correctly use mdio subnode
 -Remove WoL support

changes since v1:
 -squash patch1 and patch2. 

Regards

Alex

Alexandre TORGUE (3):
  ARM: dts: stm32f429: Align Ethernet node with new bindings properties
  ARM: dts: stm32f429: Fix Ethernet node on Eval Board
  ARM: dts: stm32f429: remove Ethernet wake on Lan support

 arch/arm/boot/dts/stm32429i-eval.dts |  7 ---
 arch/arm/boot/dts/stm32f429.dtsi | 10 +-
 2 files changed, 9 insertions(+), 8 deletions(-)

-- 
1.9.1

[PATCH v2 2/3] ARM: dts: stm32f429: Fix Ethernet node on Eval Board

[Alexandre TORGUE]

"phy-handle" entry is mandatory when mdio subnode is used in
Ethernet node.

Signed-off-by: Alexandre TORGUE <alexandre.tor...@st.com>

diff --git a/arch/arm/boot/dts/stm32429i-eval.dts 
b/arch/arm/boot/dts/stm32429i-eval.dts
index fa30bf1..a11b108 100644
--- a/arch/arm/boot/dts/stm32429i-eval.dts
+++ b/arch/arm/boot/dts/stm32429i-eval.dts
@@ -99,7 +99,7 @@
pinctrl-0   = <_mii>;
pinctrl-names   = "default";
phy-mode= "mii";
-
+   phy-handle  = <>;
mdio0 {
#address-cells = <1>;
#size-cells = <0>;
-- 
1.9.1

Re: [PATCH 0/4] STM32F429: Add Ethernet fixes

[Alexandre Torgue]

Hi David,

On 10/20/2016 08:41 PM, David Miller wrote:

From: Alexandre TORGUE <alexandre.tor...@st.com>
Date: Thu, 20 Oct 2016 17:21:22 +0200


This series adds several fixes for Ethernet for stm32f429 MCU.
First 2 patches have already been reviewed some months ago when
stm32 Ethernet glue has been pushed (I added in this series to keep
history). Fixes are:
 -Change DT to be compliant to stm32 ethernet glue binding
 -Add phy-handle to correctly use mdio subnode
 -Remove WoL support


I'm assuming this will be merged via the ARM tree.


Yes, I will take it in my next pull request (if no issues).

[PATCH 4/4] ARM: dts: stm32f429: remove Ethernet wake on Lan support

[Alexandre TORGUE]

This patch removes WoL (Wake on Lan) support as it is not yet
fully supported and tested.

Signed-off-by: Alexandre TORGUE <alexandre.tor...@st.com>

diff --git a/arch/arm/boot/dts/stm32f429.dtsi b/arch/arm/boot/dts/stm32f429.dtsi
index 6350117b..ad0bc6a 100644
--- a/arch/arm/boot/dts/stm32f429.dtsi
+++ b/arch/arm/boot/dts/stm32f429.dtsi
@@ -377,8 +377,8 @@
compatible = "st,stm32-dwmac", "snps,dwmac-3.50a";
reg = <0x40028000 0x8000>;
reg-names = "stmmaceth";
-   interrupts = <61>, <62>;
-   interrupt-names = "macirq", "eth_wake_irq";
+   interrupts = <61>;
+   interrupt-names = "macirq";
clock-names = "stmmaceth", "mac-clk-tx", "mac-clk-rx";
clocks = < 0 25>, < 0 26>, < 0 27>;
st,syscon = < 0x4>;
-- 
1.9.1

[PATCH 2/4] ARM: dts: stm32f429: Update Ethernet node on Eval board

[Alexandre TORGUE]

Update new pinctrl phandle name and use new node name.

Signed-off-by: Alexandre TORGUE <alexandre.tor...@st.com>

diff --git a/arch/arm/boot/dts/stm32429i-eval.dts 
b/arch/arm/boot/dts/stm32429i-eval.dts
index 13c7cd2..fa30bf1 100644
--- a/arch/arm/boot/dts/stm32429i-eval.dts
+++ b/arch/arm/boot/dts/stm32429i-eval.dts
@@ -94,11 +94,12 @@
clock-frequency = <2500>;
 };
 
- {
+ {
status = "okay";
-   pinctrl-0   = <_mii>;
+   pinctrl-0   = <_mii>;
pinctrl-names   = "default";
-   phy-mode= "mii-id";
+   phy-mode= "mii";
+
mdio0 {
#address-cells = <1>;
#size-cells = <0>;
-- 
1.9.1

[PATCH 1/4] ARM: dts: stm32f429: Align Ethernet node with new bindings properties

[Alexandre TORGUE]

This patch aligns clocks names and node reference according to new
stm32-dwmac glue binding. It also renames Ethernet pinctrl phandle
(indeed there is no need to add 0 as Ethernet instance as there is only
one IP in SOC).

Signed-off-by: Alexandre TORGUE <alexandre.tor...@st.com>

diff --git a/arch/arm/boot/dts/stm32f429.dtsi b/arch/arm/boot/dts/stm32f429.dtsi
index 336ee4f..6350117b 100644
--- a/arch/arm/boot/dts/stm32f429.dtsi
+++ b/arch/arm/boot/dts/stm32f429.dtsi
@@ -313,7 +313,7 @@
};
};
 
-   ethernet0_mii: mii@0 {
+   ethernet_mii: mii@0 {
pins {
pinmux = 
,
 
,
@@ -373,13 +373,13 @@
st,mem2mem;
};
 
-   ethernet0: dwmac@40028000 {
+   mac: ethernet@40028000 {
compatible = "st,stm32-dwmac", "snps,dwmac-3.50a";
reg = <0x40028000 0x8000>;
reg-names = "stmmaceth";
interrupts = <61>, <62>;
interrupt-names = "macirq", "eth_wake_irq";
-   clock-names = "stmmaceth", "tx-clk", "rx-clk";
+   clock-names = "stmmaceth", "mac-clk-tx", "mac-clk-rx";
clocks = < 0 25>, < 0 26>, < 0 27>;
st,syscon = < 0x4>;
snps,pbl = <8>;
-- 
1.9.1

[PATCH 3/4] ARM: dts: stm32f429: Fix Ethernet node on Eval Board

[Alexandre TORGUE]

"phy-handle" entry is mandatory when mdio subnode is used in
Ethernet node.

Signed-off-by: Alexandre TORGUE <alexandre.tor...@st.com>

diff --git a/arch/arm/boot/dts/stm32429i-eval.dts 
b/arch/arm/boot/dts/stm32429i-eval.dts
index fa30bf1..a11b108 100644
--- a/arch/arm/boot/dts/stm32429i-eval.dts
+++ b/arch/arm/boot/dts/stm32429i-eval.dts
@@ -99,7 +99,7 @@
pinctrl-0   = <_mii>;
pinctrl-names   = "default";
phy-mode= "mii";
-
+   phy-handle  = <>;
mdio0 {
#address-cells = <1>;
#size-cells = <0>;
-- 
1.9.1

[PATCH 0/4] STM32F429: Add Ethernet fixes

[Alexandre TORGUE]

This series adds several fixes for Ethernet for stm32f429 MCU.
First 2 patches have already been reviewed some months ago when 
stm32 Ethernet glue has been pushed (I added in this series to keep
history). Fixes are:
 -Change DT to be compliant to stm32 ethernet glue binding
 -Add phy-handle to correctly use mdio subnode
 -Remove WoL support

Regards

Alex


Alexandre TORGUE (4):
  ARM: dts: stm32f429: Align Ethernet node with new bindings properties
  ARM: dts: stm32f429: Update Ethernet node on Eval board
  ARM: dts: stm32f429: Fix Ethernet node on Eval Board
  ARM: dts: stm32f429: remove Ethernet wake on Lan support

 arch/arm/boot/dts/stm32429i-eval.dts |  7 ---
 arch/arm/boot/dts/stm32f429.dtsi | 10 +-
 2 files changed, 9 insertions(+), 8 deletions(-)

-- 
1.9.1

Re: [PATCH (net.git)] stmmac: display the descriptors if DES0 = 0

[Alexandre Torgue]

Hi Peppe,

On 10/20/2016 10:01 AM, Giuseppe Cavallaro wrote:

It makes sense to display the descriptors even if
DES0 is zero. This helps for example in case of it
is needed to dump rx write-back descriptors to get
timestamp status.

Signed-off-by: Giuseppe Cavallaro <peppe.cavall...@st.com>
Cc: Alexandre TORGUE <alexandre.tor...@st.com>
---
 drivers/net/ethernet/stmicro/stmmac/dwmac4_descs.c | 7 +++
 1 file changed, 3 insertions(+), 4 deletions(-)

diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac4_descs.c 
b/drivers/net/ethernet/stmicro/stmmac/dwmac4_descs.c
index 4ec7397..a1b17cd 100644
--- a/drivers/net/ethernet/stmicro/stmmac/dwmac4_descs.c
+++ b/drivers/net/ethernet/stmicro/stmmac/dwmac4_descs.c
@@ -347,10 +347,9 @@ static void dwmac4_display_ring(void *head, unsigned int 
size, bool rx)
pr_info("%s descriptor ring:\n", rx ? "RX" : "TX");

for (i = 0; i < size; i++) {
-   if (p->des0)
-   pr_info("%d [0x%x]: 0x%x 0x%x 0x%x 0x%x\n",
-   i, (unsigned int)virt_to_phys(p),
-   p->des0, p->des1, p->des2, p->des3);
+   pr_info("%d [0x%x]: 0x%x 0x%x 0x%x 0x%x\n",
+   i, (unsigned int)virt_to_phys(p),
+   p->des0, p->des1, p->des2, p->des3);
p++;
}
 }


I agree. Acked-by: Alexandre Torgue <alexandre.tor...@st.com>

Thanks
Alex

Re: [PATCH 13/15] stmmac: use IS_ENABLED() instead of checking for built-in or module

[Alexandre Torgue]

Hi Javier,

On 09/12/2016 04:03 PM, Javier Martinez Canillas wrote:

The IS_ENABLED() macro checks if a Kconfig symbol has been enabled either
built-in or as a module, use that macro instead of open coding the same.

Using the macro makes the code more readable by helping abstract away some
of the Kconfig built-in and module enable details.

Signed-off-by: Javier Martinez Canillas <jav...@osg.samsung.com>
---

 drivers/net/ethernet/stmicro/stmmac/common.h | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/net/ethernet/stmicro/stmmac/common.h 
b/drivers/net/ethernet/stmicro/stmmac/common.h
index 2533b91f1421..d3292c4a6eda 100644
--- a/drivers/net/ethernet/stmicro/stmmac/common.h
+++ b/drivers/net/ethernet/stmicro/stmmac/common.h
@@ -30,7 +30,7 @@
 #include 
 #include 
 #include 
-#if defined(CONFIG_VLAN_8021Q) || defined(CONFIG_VLAN_8021Q_MODULE)
+#if IS_ENABLED(CONFIG_VLAN_8021Q)
 #define STMMAC_VLAN_TAG_USED
 #include 
 #endif



Reviewed-by: Alexandre TORGUE <alexandre.tor...@st.com>

Thanks,

Alex

Re: stmmac/RTL8211F/Meson GXBB: TX throughput problems

[Alexandre Torgue]

Hi Martin,


On 09/11/2016 10:39 PM, Martin Blumenstingl wrote:

Hello,

I have a device with a Meson GXBB SoC with an stmmac IP block.


Which Synopsys IP version do you use ?


Gbit ethernet on my device is provided by a Realtek RTL8211F RGMII PHY.
Similar issues were reported in #linux-amlogic by a user with an
Odroid C2 board (= similar hardware).

The symptoms are:
Receiving data is plenty fast (I can max out my internet connection
easily, and with iperf3 I get ~900Mbit/s).
Transmitting data from the device is unfortunately very slow, traffic
sometimes even stalls completely.

I have attached the iperf results and the output of
/sys/kernel/debug/stmmaceth/eth0/descriptors_status.
Below you can find the ifconfig, netstat and stmmac dma_cap info
(*after* I ran all tests).

The "involved parties" are:
- Meson GXBB specific network configuration registers (I have have
double-checked them with the reference drivers: everything seems fine
here)
- stmmac: it seems that nobody else has reported these kind of issues
so far, however I'd still like to hear where I should enable some
debugging bits to rule out any stmmac bug


On my side, I just tested on the same "kind" of system:
-SYNOPSYS GMAC 3.7
-RTL8211EG as PHY

With I perf, I reach:
-RX: 932 Mbps
-TX: 820Mbps

Can you check ethtool -S eth0 (most precisely "MMC"counter and errors) ?
Which kernel version do you use ?

Regards

Alex





- RTL8211F PHY driver: unfortunately there are no public datasheets
available so this is hard to debug. but I'm guessing that TX delay
could cause similar issues, so this may be the cause as well.


Thanks for any input in advance!
Regards,
Martin


[root@alarm ~]# ifconfig eth0
eth0: flags=4163  mtu 1500
inet 192.168.1.235  netmask 255.255.255.0  broadcast 192.168.1.255
ether e2:aa:53:fc:f5:c5  txqueuelen 1000  (Ethernet)
RX packets 1967602  bytes 2968750265 (2.7 GiB)
RX errors 0  dropped 0  overruns 0  frame 0
TX packets 101875  bytes 8548285 (8.1 MiB)
TX errors 0  dropped 0 overruns 0  carrier 0  collisions 0
device interrupt 18

[root@alarm ~]# netstat -i
Kernel Interface table
Iface  MTURX-OK RX-ERR RX-DRP RX-OVRTX-OK TX-ERR TX-DRP TX-OVR Flg
eth0  1500  1967801  0  0 0101934  0  0  0 BMRU

[root@alarm ~]# cat /sys/kernel/debug/stmmaceth/eth0/dma_cap
==
DMA HW features
==
10/100 Mbps Y
1000 Mbps Y
Half duple Y
Hash Filter: Y
Multiple MAC address registers: Y
PCS (TBI/SGMII/RTBI PHY interfatces): N
SMA (MDIO) Interface: Y
PMT Remote wake up: Y
PMT Magic Frame: Y
RMON module: Y
IEEE 1588-2002 Time Stamp: N
IEEE 1588-2008 Advanced Time Stamp:N
802.3az - Energy-Efficient Ethernet (EEE) Y
AV features: N
Checksum Offload in TX: Y
IP Checksum Offload (type1) in RX: N
IP Checksum Offload (type2) in RX: Y
RXFIFO > 2048bytes: Y
Number of Additional RX channel: 0
Number of Additional TX channel: 0
Enhanced descriptors: N

[RESEND PATCH v6 1/3] net: ethernet: dwmac: add Ethernet glue logic for stm32 chip

[Alexandre TORGUE]

From: Alexandre TORGUE <alexandre.tor...@gmail.com>

stm324xx family chips support Synopsys MAC 3.510 IP.
This patch adds settings for logical glue logic:
-clocks
-mode selection MII or RMII.

Reviewed-by: Joachim Eastwood <manab...@gmail.com>
Acked-by: Giuseppe Cavallaro <peppe.cavall...@st.com>
Tested-by: Maxime Coquelin <maxime.coque...@st.com>
Signed-off-by: Alexandre TORGUE <alexandre.tor...@gmail.com>

diff --git a/drivers/net/ethernet/stmicro/stmmac/Kconfig 
b/drivers/net/ethernet/stmicro/stmmac/Kconfig
index 8f06a66..c732b8c 100644
--- a/drivers/net/ethernet/stmicro/stmmac/Kconfig
+++ b/drivers/net/ethernet/stmicro/stmmac/Kconfig
@@ -104,6 +104,18 @@ config DWMAC_STI
  device driver. This driver is used on for the STi series
  SOCs GMAC ethernet controller.
 
+config DWMAC_STM32
+   tristate "STM32 DWMAC support"
+   default ARCH_STM32
+   depends on OF && HAS_IOMEM
+   select MFD_SYSCON
+   ---help---
+ Support for ethernet controller on STM32 SOCs.
+
+ This selects STM32 SoC glue layer support for the stmmac
+ device driver. This driver is used on for the STM32 series
+ SOCs GMAC ethernet controller.
+
 config DWMAC_SUNXI
tristate "Allwinner GMAC support"
default ARCH_SUNXI
diff --git a/drivers/net/ethernet/stmicro/stmmac/Makefile 
b/drivers/net/ethernet/stmicro/stmmac/Makefile
index 44b630c..f0c9396 100644
--- a/drivers/net/ethernet/stmicro/stmmac/Makefile
+++ b/drivers/net/ethernet/stmicro/stmmac/Makefile
@@ -13,6 +13,7 @@ obj-$(CONFIG_DWMAC_MESON) += dwmac-meson.o
 obj-$(CONFIG_DWMAC_ROCKCHIP)   += dwmac-rk.o
 obj-$(CONFIG_DWMAC_SOCFPGA)+= dwmac-altr-socfpga.o
 obj-$(CONFIG_DWMAC_STI)+= dwmac-sti.o
+obj-$(CONFIG_DWMAC_STM32)  += dwmac-stm32.o
 obj-$(CONFIG_DWMAC_SUNXI)  += dwmac-sunxi.o
 obj-$(CONFIG_DWMAC_GENERIC)+= dwmac-generic.o
 stmmac-platform-objs:= stmmac_platform.o
diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac-stm32.c 
b/drivers/net/ethernet/stmicro/stmmac/dwmac-stm32.c
new file mode 100644
index 000..79d8b92
--- /dev/null
+++ b/drivers/net/ethernet/stmicro/stmmac/dwmac-stm32.c
@@ -0,0 +1,193 @@
+/*
+ * dwmac-stm32.c - DWMAC Specific Glue layer for STM32 MCU
+ *
+ * Copyright (C) Alexandre Torgue 2015
+ * Author:  Alexandre Torgue <alexandre.tor...@gmail.com>
+ * License terms:  GNU General Public License (GPL), version 2
+ *
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#include "stmmac_platform.h"
+
+#define MII_PHY_SEL_MASK   BIT(23)
+
+struct stm32_dwmac {
+   struct clk *clk_tx;
+   struct clk *clk_rx;
+   u32 mode_reg;   /* MAC glue-logic mode register */
+   struct regmap *regmap;
+   u32 speed;
+};
+
+static int stm32_dwmac_init(struct plat_stmmacenet_data *plat_dat)
+{
+   struct stm32_dwmac *dwmac = plat_dat->bsp_priv;
+   u32 reg = dwmac->mode_reg;
+   u32 val;
+   int ret;
+
+   val = (plat_dat->interface == PHY_INTERFACE_MODE_MII) ? 0 : 1;
+   ret = regmap_update_bits(dwmac->regmap, reg, MII_PHY_SEL_MASK, val);
+   if (ret)
+   return ret;
+
+   ret = clk_prepare_enable(dwmac->clk_tx);
+   if (ret)
+   return ret;
+
+   ret = clk_prepare_enable(dwmac->clk_rx);
+   if (ret)
+   clk_disable_unprepare(dwmac->clk_tx);
+
+   return ret;
+}
+
+static void stm32_dwmac_clk_disable(struct stm32_dwmac *dwmac)
+{
+   clk_disable_unprepare(dwmac->clk_tx);
+   clk_disable_unprepare(dwmac->clk_rx);
+}
+
+static int stm32_dwmac_parse_data(struct stm32_dwmac *dwmac,
+ struct device *dev)
+{
+   struct device_node *np = dev->of_node;
+   int err;
+
+   /*  Get TX/RX clocks */
+   dwmac->clk_tx = devm_clk_get(dev, "mac-clk-tx");
+   if (IS_ERR(dwmac->clk_tx)) {
+   dev_err(dev, "No tx clock provided...\n");
+   return PTR_ERR(dwmac->clk_tx);
+   }
+   dwmac->clk_rx = devm_clk_get(dev, "mac-clk-rx");
+   if (IS_ERR(dwmac->clk_rx)) {
+   dev_err(dev, "No rx clock provided...\n");
+   return PTR_ERR(dwmac->clk_rx);
+   }
+
+   /* Get mode register */
+   dwmac->regmap = syscon_regmap_lookup_by_phandle(np, "st,syscon");
+   if (IS_ERR(dwmac->regmap))
+   return PTR_ERR(dwmac->regmap);
+
+   err = of_property_read_u32_index(np, "st,syscon", 1, >mode_reg);
+   if (err)
+   dev_err(dev, "Can't get sysconfig mode offset (%d)\n", err);
+
+   return err;
+}
+
+static int stm32_dwmac_probe(struct platform_device *pdev)
+{
+   struct plat_stmmacenet_data *plat_dat;
+   struct

[RESEND PATCH v6 3/3] net: ethernet: stmmac: add support of Synopsys 3.50a MAC IP

[Alexandre TORGUE]

From: Alexandre TORGUE <alexandre.tor...@gmail.com>

Adds support of Synopsys 3.50a MAC IP in stmmac driver.

Acked-by: Giuseppe Cavallaro <peppe.cavall...@st.com>
Tested-by: Maxime Coquelin <maxime.coque...@st.com>
Signed-off-by: Alexandre TORGUE <alexandre.tor...@gmail.com>

diff --git a/drivers/net/ethernet/stmicro/stmmac/stmmac_platform.c 
b/drivers/net/ethernet/stmicro/stmmac/stmmac_platform.c
index 756bb54..0a0d6a8 100644
--- a/drivers/net/ethernet/stmicro/stmmac/stmmac_platform.c
+++ b/drivers/net/ethernet/stmicro/stmmac/stmmac_platform.c
@@ -265,6 +265,7 @@ stmmac_probe_config_dt(struct platform_device *pdev, const 
char **mac)
 * once needed on other platforms.
 */
if (of_device_is_compatible(np, "st,spear600-gmac") ||
+   of_device_is_compatible(np, "snps,dwmac-3.50a") ||
of_device_is_compatible(np, "snps,dwmac-3.70a") ||
of_device_is_compatible(np, "snps,dwmac")) {
/* Note that the max-frame-size parameter as defined in the
-- 
1.9.1

[RESEND PATCH v6 0/3] Add Ethernet support on STM32F429

[Alexandre TORGUE]

STM32F429 Chip embeds a Synopsys 3.50a MAC IP.

This series enhance current stmmac driver to control it (code already
available) and adds basic glue for STM32F429 chip.

Changes since v5:
 -Fix typo in bindings documentation patch.
 -Change clocks names in stm32-dwmac glue driver / Documentation.
 -After rebase, stm32 ethernet node is now available. It has to be updated
according to new clocks names.

Changes since v4:
 -Fix dirty copy/past in bindings documentation patch.

Changes since v3:
 -Fix "tx-clk" and "rx-clk" as required clocks. Driver and bindings are
modified.

Changes since v2:
 -Fix alphabetic order in Kconfig and Makefile.
 -Improve code according to Joachim review.
 -Binding: remove useless entry.

Changes since v1:
 -Fix Kbuild issue in Kconfig.
 -Remove init/exit callbacks. Suspend/Resume and remove driver is no more
driven in stmmac_pltfr but directly in dwmac-stm32 glue driver.
 -Take into account Joachim review.

Regards.

Alexandre.

Alexandre TORGUE (3):
  net: ethernet: dwmac: add Ethernet glue logic for stm32 chip
  Documentation: Bindings: Add STM32 DWMAC glue
  net: ethernet: stmmac: add support of Synopsys 3.50a MAC IP

 .../devicetree/bindings/net/stm32-dwmac.txt|  32 
 drivers/net/ethernet/stmicro/stmmac/Kconfig|  12 ++
 drivers/net/ethernet/stmicro/stmmac/Makefile   |   1 +
 drivers/net/ethernet/stmicro/stmmac/dwmac-stm32.c  | 193 +
 .../net/ethernet/stmicro/stmmac/stmmac_platform.c  |   1 +
 5 files changed, 239 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/net/stm32-dwmac.txt
 create mode 100644 drivers/net/ethernet/stmicro/stmmac/dwmac-stm32.c

-- 
1.9.1

[RESEND PATCH v6 2/3] Documentation: Bindings: Add STM32 DWMAC glue

[Alexandre TORGUE]

From: Alexandre TORGUE <alexandre.tor...@gmail.com>

Acked-by: Rob Herring <r...@kernel.org>
Signed-off-by: Alexandre TORGUE <alexandre.tor...@gmail.com>

diff --git a/Documentation/devicetree/bindings/net/stm32-dwmac.txt 
b/Documentation/devicetree/bindings/net/stm32-dwmac.txt
new file mode 100644
index 000..c35afb7
--- /dev/null
+++ b/Documentation/devicetree/bindings/net/stm32-dwmac.txt
@@ -0,0 +1,32 @@
+STMicroelectronics STM32 / MCU DWMAC glue layer controller
+
+This file documents platform glue layer for stmmac.
+Please see stmmac.txt for the other unchanged properties.
+
+The device node has following properties.
+
+Required properties:
+- compatible:  Should be "st,stm32-dwmac" to select glue, and
+  "snps,dwmac-3.50a" to select IP version.
+- clocks: Must contain a phandle for each entry in clock-names.
+- clock-names: Should be "stmmaceth" for the host clock.
+  Should be "mac-clk-tx" for the MAC TX clock.
+  Should be "mac-clk-rx" for the MAC RX clock.
+- st,syscon : Should be phandle/offset pair. The phandle to the syscon node 
which
+ encompases the glue register, and the offset of the control 
register.
+Example:
+
+   ethernet@40028000 {
+   compatible = "st,stm32-dwmac", "snps,dwmac-3.50a";
+   status = "disabled";
+   reg = <0x40028000 0x8000>;
+   reg-names = "stmmaceth";
+   interrupts = <0 61 0>, <0 62 0>;
+   interrupt-names = "macirq", "eth_wake_irq";
+   clock-names = "stmmaceth", "mac-clk-tx", "mac-clk-rx";
+   clocks = < 0 25>, < 0 26>, < 0 27>;
+   st,syscon = < 0x4>;
+   snps,pbl = <8>;
+   snps,mixed-burst;
+   dma-ranges;
+   };
-- 
1.9.1

Re: [PATCH v2 14/15] ethernet: stmicro: stmmac: add missing of_node_put after calling of_parse_phandle

[Alexandre Torgue]

Hi,

On 08/01/2016 09:02 AM, Peter Chen wrote:

of_node_put needs to be called when the device node which is got
from of_parse_phandle has finished using.

This commit fixes both local (in stmmac_axi_setup) and global
(plat->phy_node) device_node for this issue, and using the
correct device node when tries to put node at stmmac_probe_config_dt
for error path.

Signed-off-by: Peter Chen <peter.c...@nxp.com>
---
 drivers/net/ethernet/stmicro/stmmac/stmmac_main.c | 1 +
 drivers/net/ethernet/stmicro/stmmac/stmmac_platform.c | 7 +--
 2 files changed, 6 insertions(+), 2 deletions(-)

diff --git a/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c 
b/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c
index c23ccab..4c8c60a 100644
--- a/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c
+++ b/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c
@@ -3397,6 +3397,7 @@ int stmmac_dvr_remove(struct device *dev)
stmmac_set_mac(priv->ioaddr, false);
netif_carrier_off(ndev);
unregister_netdev(ndev);
+   of_node_put(priv->plat->phy_node);
if (priv->stmmac_rst)
reset_control_assert(priv->stmmac_rst);
clk_disable_unprepare(priv->pclk);
diff --git a/drivers/net/ethernet/stmicro/stmmac/stmmac_platform.c 
b/drivers/net/ethernet/stmicro/stmmac/stmmac_platform.c
index f7dfc0a..756bb54 100644
--- a/drivers/net/ethernet/stmicro/stmmac/stmmac_platform.c
+++ b/drivers/net/ethernet/stmicro/stmmac/stmmac_platform.c
@@ -113,8 +113,10 @@ static struct stmmac_axi *stmmac_axi_setup(struct 
platform_device *pdev)
return NULL;

axi = kzalloc(sizeof(*axi), GFP_KERNEL);
-   if (!axi)
+   if (!axi) {
+   of_node_put(np);
return ERR_PTR(-ENOMEM);
+   }

axi->axi_lpi_en = of_property_read_bool(np, "snps,lpi_en");
axi->axi_xit_frm = of_property_read_bool(np, "snps,xit_frm");
@@ -127,6 +129,7 @@ static struct stmmac_axi *stmmac_axi_setup(struct 
platform_device *pdev)
of_property_read_u32(np, "snps,wr_osr_lmt", >axi_wr_osr_lmt);
of_property_read_u32(np, "snps,rd_osr_lmt", >axi_rd_osr_lmt);
of_property_read_u32_array(np, "snps,blen", axi->axi_blen, AXI_BLEN);
+   of_node_put(np);

return axi;
 }
@@ -302,7 +305,7 @@ stmmac_probe_config_dt(struct platform_device *pdev, const 
char **mac)
dma_cfg = devm_kzalloc(>dev, sizeof(*dma_cfg),
   GFP_KERNEL);
if (!dma_cfg) {
-   of_node_put(np);
+   of_node_put(plat->phy_node);
return ERR_PTR(-ENOMEM);
    }
plat->dma_cfg = dma_cfg;



You can add my:

Acked-by: Alexandre Torgue <alexandre.tor...@st.com>

Regards

Alex

Re: [PATCH 14/15] ethernet: stmicro: stmmac: stmmac_platform: add missing of_node_put after calling of_parse_phandle

[Alexandre Torgue]

Hi,

On 07/27/2016 04:20 AM, Peter Chen wrote:

of_node_put needs to be called when the device node which is got
from of_parse_phandle has finished using.

Signed-off-by: Peter Chen 
---
  drivers/net/ethernet/stmicro/stmmac/stmmac_platform.c | 5 -
  1 file changed, 4 insertions(+), 1 deletion(-)

diff --git a/drivers/net/ethernet/stmicro/stmmac/stmmac_platform.c 
b/drivers/net/ethernet/stmicro/stmmac/stmmac_platform.c
index f7dfc0a..8d88782 100644
--- a/drivers/net/ethernet/stmicro/stmmac/stmmac_platform.c
+++ b/drivers/net/ethernet/stmicro/stmmac/stmmac_platform.c
@@ -113,8 +113,10 @@ static struct stmmac_axi *stmmac_axi_setup(struct 
platform_device *pdev)
return NULL;

axi = kzalloc(sizeof(*axi), GFP_KERNEL);
-   if (!axi)
+   if (!axi) {
+   of_node_put(np);
return ERR_PTR(-ENOMEM);
+   }

axi->axi_lpi_en = of_property_read_bool(np, "snps,lpi_en");
axi->axi_xit_frm = of_property_read_bool(np, "snps,xit_frm");
@@ -127,6 +129,7 @@ static struct stmmac_axi *stmmac_axi_setup(struct 
platform_device *pdev)
of_property_read_u32(np, "snps,wr_osr_lmt", >axi_wr_osr_lmt);
of_property_read_u32(np, "snps,rd_osr_lmt", >axi_rd_osr_lmt);
of_property_read_u32_array(np, "snps,blen", axi->axi_blen, AXI_BLEN);
+   of_node_put(np);

return axi;
  }



I agree with the modification inside stmmac_axi. I just have a question 
about np = pdev->dev.of_node inside stmmac_probe_config_dt (same file). 
We could add a "of_node_put(np)" just before "return plat" ?


Regards

alex

Re: [RESEND PATCH v6 0/6] Add Ethernet support on STM32F429

[Alexandre Torgue]

Hi David,

On 05/18/2016 11:49 AM, Maxime Coquelin wrote:

2016-05-18 11:31 GMT+02:00 Arnd Bergmann <a...@arndb.de>:

On Wednesday 18 May 2016 09:48:53 Maxime Coquelin wrote:

2016-05-17 18:25 GMT+02:00 David Miller <da...@davemloft.net>:

From: Maxime Coquelin <mcoquelin.st...@gmail.com>
Date: Tue, 17 May 2016 11:20:16 +0200


Hi David,

2016-05-09 21:06 GMT+02:00 David Miller <da...@davemloft.net>:

From: Alexandre TORGUE <alexandre.tor...@gmail.com>
Date: Mon,  9 May 2016 12:31:33 +0200


STM32F429 Chip embeds a Synopsys 3.50a MAC IP.
This series:
  -enhance current stmmac driver to control it (code already
available) and adds basic glue for STM32F429 chip.
  -Enable basic Net config in kernel.


I assume this will go via the ARM tree, for the networking bits:

I would expect patches 1, 2 & 3 to got via your tree, to avoid conflicts.


I don't think putting them all via the ARM tree is going to create much
in the way of conflicts, and right now during the merge window offloading
that work from me would really help my backlog a lot.


Ok, I understand this is not the best time to pick it.

Arnd, Olof & Kevin, would you accept to pick the series in your tree?



It's too late for v4.7 for us too, please pick up the arch/arm patches
in your normal stm32 tree and send them to us along with any other changes
you may have, and resend the driver by itself to netdev time after the
merge window.

The binding document can go either way, with the dts changes or with
the driver. I see no dependencies between the patches, so we just need
to land them all in v4.8.


Ok, this is good for me.
No problem to wait for v4.8.
I will take the arch/arm patches, and David the drivers/net/ ones once
v4.7-rc1 is out.


According to this old discussion, could you please take driver patches
+ bindings one (patch 1/2/3) in your net-next tree ?
Do you need I resend them separately ?

Thanks in advance

Alex

[RESEND PATCH v6 4/6] ARM: STM32: Enable Ethernet in stm32_defconfig

[Alexandre TORGUE]

Enable basic Ethernet support (IPV4) for stm32 defconfig.

Signed-off-by: Alexandre TORGUE <alexandre.tor...@gmail.com>

diff --git a/arch/arm/configs/stm32_defconfig b/arch/arm/configs/stm32_defconfig
index 1e5ec2a..719218b 100644
--- a/arch/arm/configs/stm32_defconfig
+++ b/arch/arm/configs/stm32_defconfig
@@ -33,11 +33,20 @@ CONFIG_XIP_PHYS_ADDR=0x08008000
 CONFIG_BINFMT_FLAT=y
 CONFIG_BINFMT_SHARED_FLAT=y
 # CONFIG_COREDUMP is not set
+CONFIG_NET=y
+CONFIG_INET=y
+# CONFIG_INET_XFRM_MODE_TRANSPORT is not set
+# CONFIG_INET_XFRM_MODE_TUNNEL is not set
+# CONFIG_INET_XFRM_MODE_BEET is not set
+# CONFIG_IPV6 is not set
 CONFIG_DEVTMPFS=y
 CONFIG_DEVTMPFS_MOUNT=y
 # CONFIG_FW_LOADER is not set
 # CONFIG_BLK_DEV is not set
 CONFIG_EEPROM_93CX6=y
+CONFIG_NETDEVICES=y
+CONFIG_STMMAC_ETH=y
+# CONFIG_WLAN is not set
 # CONFIG_INPUT is not set
 # CONFIG_SERIO is not set
 # CONFIG_VT is not set
-- 
1.9.1

[RESEND PATCH v6 3/6] net: ethernet: stmmac: add support of Synopsys 3.50a MAC IP

[Alexandre TORGUE]

Adds support of Synopsys 3.50a MAC IP in stmmac driver.

Acked-by: Giuseppe Cavallaro <peppe.cavall...@st.com>
Tested-by: Maxime Coquelin <maxime.coque...@st.com>
Signed-off-by: Alexandre TORGUE <alexandre.tor...@gmail.com>

diff --git a/drivers/net/ethernet/stmicro/stmmac/stmmac_platform.c 
b/drivers/net/ethernet/stmicro/stmmac/stmmac_platform.c
index 409db91..7718247 100644
--- a/drivers/net/ethernet/stmicro/stmmac/stmmac_platform.c
+++ b/drivers/net/ethernet/stmicro/stmmac/stmmac_platform.c
@@ -262,6 +262,7 @@ stmmac_probe_config_dt(struct platform_device *pdev, const 
char **mac)
 * once needed on other platforms.
 */
if (of_device_is_compatible(np, "st,spear600-gmac") ||
+   of_device_is_compatible(np, "snps,dwmac-3.50a") ||
of_device_is_compatible(np, "snps,dwmac-3.70a") ||
of_device_is_compatible(np, "snps,dwmac")) {
/* Note that the max-frame-size parameter as defined in the
-- 
1.9.1

[RESEND PATCH v6 2/6] Documentation: Bindings: Add STM32 DWMAC glue

[Alexandre TORGUE]

Acked-by: Rob Herring <r...@kernel.org>
Signed-off-by: Alexandre TORGUE <alexandre.tor...@gmail.com>

diff --git a/Documentation/devicetree/bindings/net/stm32-dwmac.txt 
b/Documentation/devicetree/bindings/net/stm32-dwmac.txt
new file mode 100644
index 000..c35afb7
--- /dev/null
+++ b/Documentation/devicetree/bindings/net/stm32-dwmac.txt
@@ -0,0 +1,32 @@
+STMicroelectronics STM32 / MCU DWMAC glue layer controller
+
+This file documents platform glue layer for stmmac.
+Please see stmmac.txt for the other unchanged properties.
+
+The device node has following properties.
+
+Required properties:
+- compatible:  Should be "st,stm32-dwmac" to select glue, and
+  "snps,dwmac-3.50a" to select IP version.
+- clocks: Must contain a phandle for each entry in clock-names.
+- clock-names: Should be "stmmaceth" for the host clock.
+  Should be "mac-clk-tx" for the MAC TX clock.
+  Should be "mac-clk-rx" for the MAC RX clock.
+- st,syscon : Should be phandle/offset pair. The phandle to the syscon node 
which
+ encompases the glue register, and the offset of the control 
register.
+Example:
+
+   ethernet@40028000 {
+   compatible = "st,stm32-dwmac", "snps,dwmac-3.50a";
+   status = "disabled";
+   reg = <0x40028000 0x8000>;
+   reg-names = "stmmaceth";
+   interrupts = <0 61 0>, <0 62 0>;
+   interrupt-names = "macirq", "eth_wake_irq";
+   clock-names = "stmmaceth", "mac-clk-tx", "mac-clk-rx";
+   clocks = < 0 25>, < 0 26>, < 0 27>;
+   st,syscon = < 0x4>;
+   snps,pbl = <8>;
+   snps,mixed-burst;
+   dma-ranges;
+   };
-- 
1.9.1

[RESEND PATCH v6 1/6] net: ethernet: dwmac: add Ethernet glue logic for stm32 chip

[Alexandre TORGUE]

stm324xx family chips support Synopsys MAC 3.510 IP.
This patch adds settings for logical glue logic:
-clocks
-mode selection MII or RMII.

Reviewed-by: Joachim Eastwood <manab...@gmail.com>
Acked-by: Giuseppe Cavallaro <peppe.cavall...@st.com>
Tested-by: Maxime Coquelin <maxime.coque...@st.com>
Signed-off-by: Alexandre TORGUE <alexandre.tor...@gmail.com>

diff --git a/drivers/net/ethernet/stmicro/stmmac/Kconfig 
b/drivers/net/ethernet/stmicro/stmmac/Kconfig
index cec147d..235d679 100644
--- a/drivers/net/ethernet/stmicro/stmmac/Kconfig
+++ b/drivers/net/ethernet/stmicro/stmmac/Kconfig
@@ -104,6 +104,18 @@ config DWMAC_STI
  device driver. This driver is used on for the STi series
  SOCs GMAC ethernet controller.
 
+config DWMAC_STM32
+   tristate "STM32 DWMAC support"
+   default ARCH_STM32
+   depends on OF && HAS_IOMEM
+   select MFD_SYSCON
+   ---help---
+ Support for ethernet controller on STM32 SOCs.
+
+ This selects STM32 SoC glue layer support for the stmmac
+ device driver. This driver is used on for the STM32 series
+ SOCs GMAC ethernet controller.
+
 config DWMAC_SUNXI
tristate "Allwinner GMAC support"
default ARCH_SUNXI
diff --git a/drivers/net/ethernet/stmicro/stmmac/Makefile 
b/drivers/net/ethernet/stmicro/stmmac/Makefile
index 0fb362d..8828ada 100644
--- a/drivers/net/ethernet/stmicro/stmmac/Makefile
+++ b/drivers/net/ethernet/stmicro/stmmac/Makefile
@@ -13,6 +13,7 @@ obj-$(CONFIG_DWMAC_MESON) += dwmac-meson.o
 obj-$(CONFIG_DWMAC_ROCKCHIP)   += dwmac-rk.o
 obj-$(CONFIG_DWMAC_SOCFPGA)+= dwmac-socfpga.o
 obj-$(CONFIG_DWMAC_STI)+= dwmac-sti.o
+obj-$(CONFIG_DWMAC_STM32)  += dwmac-stm32.o
 obj-$(CONFIG_DWMAC_SUNXI)  += dwmac-sunxi.o
 obj-$(CONFIG_DWMAC_GENERIC)+= dwmac-generic.o
 stmmac-platform-objs:= stmmac_platform.o
diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac-stm32.c 
b/drivers/net/ethernet/stmicro/stmmac/dwmac-stm32.c
new file mode 100644
index 000..79d8b92
--- /dev/null
+++ b/drivers/net/ethernet/stmicro/stmmac/dwmac-stm32.c
@@ -0,0 +1,193 @@
+/*
+ * dwmac-stm32.c - DWMAC Specific Glue layer for STM32 MCU
+ *
+ * Copyright (C) Alexandre Torgue 2015
+ * Author:  Alexandre Torgue <alexandre.tor...@gmail.com>
+ * License terms:  GNU General Public License (GPL), version 2
+ *
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#include "stmmac_platform.h"
+
+#define MII_PHY_SEL_MASK   BIT(23)
+
+struct stm32_dwmac {
+   struct clk *clk_tx;
+   struct clk *clk_rx;
+   u32 mode_reg;   /* MAC glue-logic mode register */
+   struct regmap *regmap;
+   u32 speed;
+};
+
+static int stm32_dwmac_init(struct plat_stmmacenet_data *plat_dat)
+{
+   struct stm32_dwmac *dwmac = plat_dat->bsp_priv;
+   u32 reg = dwmac->mode_reg;
+   u32 val;
+   int ret;
+
+   val = (plat_dat->interface == PHY_INTERFACE_MODE_MII) ? 0 : 1;
+   ret = regmap_update_bits(dwmac->regmap, reg, MII_PHY_SEL_MASK, val);
+   if (ret)
+   return ret;
+
+   ret = clk_prepare_enable(dwmac->clk_tx);
+   if (ret)
+   return ret;
+
+   ret = clk_prepare_enable(dwmac->clk_rx);
+   if (ret)
+   clk_disable_unprepare(dwmac->clk_tx);
+
+   return ret;
+}
+
+static void stm32_dwmac_clk_disable(struct stm32_dwmac *dwmac)
+{
+   clk_disable_unprepare(dwmac->clk_tx);
+   clk_disable_unprepare(dwmac->clk_rx);
+}
+
+static int stm32_dwmac_parse_data(struct stm32_dwmac *dwmac,
+ struct device *dev)
+{
+   struct device_node *np = dev->of_node;
+   int err;
+
+   /*  Get TX/RX clocks */
+   dwmac->clk_tx = devm_clk_get(dev, "mac-clk-tx");
+   if (IS_ERR(dwmac->clk_tx)) {
+   dev_err(dev, "No tx clock provided...\n");
+   return PTR_ERR(dwmac->clk_tx);
+   }
+   dwmac->clk_rx = devm_clk_get(dev, "mac-clk-rx");
+   if (IS_ERR(dwmac->clk_rx)) {
+   dev_err(dev, "No rx clock provided...\n");
+   return PTR_ERR(dwmac->clk_rx);
+   }
+
+   /* Get mode register */
+   dwmac->regmap = syscon_regmap_lookup_by_phandle(np, "st,syscon");
+   if (IS_ERR(dwmac->regmap))
+   return PTR_ERR(dwmac->regmap);
+
+   err = of_property_read_u32_index(np, "st,syscon", 1, >mode_reg);
+   if (err)
+   dev_err(dev, "Can't get sysconfig mode offset (%d)\n", err);
+
+   return err;
+}
+
+static int stm32_dwmac_probe(struct platform_device *pdev)
+{
+   struct plat_stmmacenet_data *plat_dat;
+   struct stmmac_resources stmmac_res;
+   struct stm32_dwmac *dwmac;
+ 

[RESEND PATCH v6 0/6] Add Ethernet support on STM32F429

[Alexandre TORGUE]

STM32F429 Chip embeds a Synopsys 3.50a MAC IP.
This series:
 -enhance current stmmac driver to control it (code already
available) and adds basic glue for STM32F429 chip.
 -Enable basic Net config in kernel.

Changes since v5:
 -Fix typo in bindings documentation patch.
 -Change clocks names in stm32-dwmac glue driver / Documentation.
 -After rebase, stm32 ethernet node is now available. It has to be updated
according to new clocks names.

Changes since v4:
 -Fix dirty copy/past in bindings documentation patch.

Changes since v3:
 -Fix "tx-clk" and "rx-clk" as required clocks. Driver and bindings are
modified.

Changes since v2:
 -Fix alphabetic order in Kconfig and Makefile.
 -Improve code according to Joachim review.
 -Binding: remove useless entry.

Changes since v1:
 -Fix Kbuild issue in Kconfig.
 -Remove init/exit callbacks. Suspend/Resume and remove driver is no more
driven in stmmac_pltfr but directly in dwmac-stm32 glue driver.
 -Take into account Joachim review.

Regards.

Alexandre.

Alexandre TORGUE (6):
  net: ethernet: dwmac: add Ethernet glue logic for stm32 chip
  Documentation: Bindings: Add STM32 DWMAC glue
  net: ethernet: stmmac: add support of Synopsys 3.50a MAC IP
  ARM: STM32: Enable Ethernet in stm32_defconfig
  ARM: dts: stm32f429: Align Ethernet node with new bindings properties
  ARM: dts: stm32f429: Update Ethernet node on Eval board

 .../devicetree/bindings/net/stm32-dwmac.txt|  32 
 arch/arm/boot/dts/stm32429i-eval.dts   |   4 +-
 arch/arm/boot/dts/stm32f429.dtsi   |   6 +-
 arch/arm/configs/stm32_defconfig   |   9 +
 drivers/net/ethernet/stmicro/stmmac/Kconfig|  12 ++
 drivers/net/ethernet/stmicro/stmmac/Makefile   |   1 +
 drivers/net/ethernet/stmicro/stmmac/dwmac-stm32.c  | 193 +
 .../net/ethernet/stmicro/stmmac/stmmac_platform.c  |   1 +
 8 files changed, 253 insertions(+), 5 deletions(-)
 create mode 100644 Documentation/devicetree/bindings/net/stm32-dwmac.txt
 create mode 100644 drivers/net/ethernet/stmicro/stmmac/dwmac-stm32.c

-- 
1.9.1

[RESEND PATCH v6 5/6] ARM: dts: stm32f429: Align Ethernet node with new bindings properties

[Alexandre TORGUE]

This patch aligns clocks names and node reference according to new
stm32-dwmac glue binding. It also renames Ethernet pinctrl phandle
(indeed there is no need to add 0 as Ethernet instance as there is only
one IP in SOC).

Signed-off-by: Alexandre TORGUE <alexandre.tor...@gmail.com>

diff --git a/arch/arm/boot/dts/stm32f429.dtsi b/arch/arm/boot/dts/stm32f429.dtsi
index 35df462..5995998 100644
--- a/arch/arm/boot/dts/stm32f429.dtsi
+++ b/arch/arm/boot/dts/stm32f429.dtsi
@@ -304,7 +304,7 @@
};
};
 
-   ethernet0_mii: mii@0 {
+   ethernet_mii: mii@0 {
pins {
pinmux = 
,
 
,
@@ -363,13 +363,13 @@
st,mem2mem;
};
 
-   ethernet0: dwmac@40028000 {
+   mac: ethernet@40028000 {
compatible = "st,stm32-dwmac", "snps,dwmac-3.50a";
reg = <0x40028000 0x8000>;
reg-names = "stmmaceth";
interrupts = <61>, <62>;
interrupt-names = "macirq", "eth_wake_irq";
-   clock-names = "stmmaceth", "tx-clk", "rx-clk";
+   clock-names = "stmmaceth", "mac-clk-tx", "mac-clk-rx";
clocks = < 0 25>, < 0 26>, < 0 27>;
st,syscon = < 0x4>;
snps,pbl = <8>;
-- 
1.9.1

[RESEND PATCH v6 6/6] ARM: dts: stm32f429: Update Ethernet node on Eval board

[Alexandre TORGUE]

Update new pinctrl phandle name and use new node name.

Signed-off-by: Alexandre TORGUE <alexandre.tor...@gmail.com>

diff --git a/arch/arm/boot/dts/stm32429i-eval.dts 
b/arch/arm/boot/dts/stm32429i-eval.dts
index 6bfc595..9a72445 100644
--- a/arch/arm/boot/dts/stm32429i-eval.dts
+++ b/arch/arm/boot/dts/stm32429i-eval.dts
@@ -94,9 +94,9 @@
clock-frequency = <2500>;
 };
 
- {
+ {
status = "okay";
-   pinctrl-0   = <_mii>;
+   pinctrl-0   = <_mii>;
pinctrl-names   = "default";
phy-mode= "mii-id";
mdio0 {
-- 
1.9.1

[PATCH net-next] net: ethernet: stmmac: update MDIO support for GMAC4

[Alexandre TORGUE]

On new GMAC4 IP, MAC_MDIO_address register has been updated, and bitmaps
changed. This patch takes into account those changes.

Signed-off-by: Alexandre TORGUE <alexandre.tor...@st.com>

diff --git a/drivers/net/ethernet/stmicro/stmmac/stmmac_mdio.c 
b/drivers/net/ethernet/stmicro/stmmac/stmmac_mdio.c
index 06704ca..3f83c36 100644
--- a/drivers/net/ethernet/stmicro/stmmac/stmmac_mdio.c
+++ b/drivers/net/ethernet/stmicro/stmmac/stmmac_mdio.c
@@ -37,6 +37,18 @@
 #define MII_BUSY 0x0001
 #define MII_WRITE 0x0002
 
+/* GMAC4 defines */
+#define MII_GMAC4_GOC_SHIFT2
+#define MII_GMAC4_WRITE(1 << MII_GMAC4_GOC_SHIFT)
+#define MII_GMAC4_READ (3 << MII_GMAC4_GOC_SHIFT)
+
+#define MII_PHY_ADDR_GMAC4_SHIFT   21
+#define MII_PHY_ADDR_GMAC4_MASKGENMASK(25, 21)
+#define MII_PHY_REG_GMAC4_SHIFT16
+#define MII_PHY_REG_GMAC4_MASK GENMASK(20, 16)
+#define MII_CSR_CLK_GMAC4_SHIFT8
+#define MII_CSR_CLK_GMAC4_MASK GENMASK(11, 8)
+
 static int stmmac_mdio_busy_wait(void __iomem *ioaddr, unsigned int mii_addr)
 {
unsigned long curr;
@@ -124,6 +136,80 @@ static int stmmac_mdio_write(struct mii_bus *bus, int 
phyaddr, int phyreg,
 }
 
 /**
+ * stmmac_mdio_read_gmac4
+ * @bus: points to the mii_bus structure
+ * @phyaddr: MII addr reg bits 25-21
+ * @phyreg: MII addr reg bits 20-16
+ * Description: it reads data from the MII register of GMAC4 from within
+ * the phy device.
+ */
+static int stmmac_mdio_read_gmac4(struct mii_bus *bus, int phyaddr, int phyreg)
+{
+   struct net_device *ndev = bus->priv;
+   struct stmmac_priv *priv = netdev_priv(ndev);
+   unsigned int mii_address = priv->hw->mii.addr;
+   unsigned int mii_data = priv->hw->mii.data;
+   int data;
+   u32 value = (((phyaddr << MII_PHY_ADDR_GMAC4_SHIFT) &
+(MII_PHY_ADDR_GMAC4_MASK)) |
+((phyreg << MII_PHY_REG_GMAC4_SHIFT) &
+(MII_PHY_REG_GMAC4_MASK))) | MII_GMAC4_READ;
+
+   value |= MII_BUSY | ((priv->clk_csr & MII_CSR_CLK_GMAC4_MASK)
+<< MII_CSR_CLK_GMAC4_SHIFT);
+
+   if (stmmac_mdio_busy_wait(priv->ioaddr, mii_address))
+   return -EBUSY;
+
+   writel(value, priv->ioaddr + mii_address);
+
+   if (stmmac_mdio_busy_wait(priv->ioaddr, mii_address))
+   return -EBUSY;
+
+   /* Read the data from the MII data register */
+   data = (int)readl(priv->ioaddr + mii_data);
+
+   return data;
+}
+
+/**
+ * stmmac_mdio_write_gmac4
+ * @bus: points to the mii_bus structure
+ * @phyaddr: MII addr reg bits 25-21
+ * @phyreg: MII addr reg bits 20-16
+ * @phydata: phy data
+ * Description: it writes the data into the MII register of GMAC4 from within
+ * the device.
+ */
+static int stmmac_mdio_write_gmac4(struct mii_bus *bus, int phyaddr, int 
phyreg,
+  u16 phydata)
+{
+   struct net_device *ndev = bus->priv;
+   struct stmmac_priv *priv = netdev_priv(ndev);
+   unsigned int mii_address = priv->hw->mii.addr;
+   unsigned int mii_data = priv->hw->mii.data;
+
+   u32 value = (((phyaddr << MII_PHY_ADDR_GMAC4_SHIFT) &
+(MII_PHY_ADDR_GMAC4_MASK)) |
+((phyreg << MII_PHY_REG_GMAC4_SHIFT) &
+(MII_PHY_REG_GMAC4_MASK))) | MII_GMAC4_WRITE;
+
+   value |= MII_BUSY | ((priv->clk_csr & MII_CSR_CLK_GMAC4_MASK)
+<< MII_CSR_CLK_GMAC4_SHIFT);
+
+   /* Wait until any existing MII operation is complete */
+   if (stmmac_mdio_busy_wait(priv->ioaddr, mii_address))
+   return -EBUSY;
+
+   /* Set the MII address register to write */
+   writel(phydata, priv->ioaddr + mii_data);
+   writel(value, priv->ioaddr + mii_address);
+
+   /* Wait until any existing MII operation is complete */
+   return stmmac_mdio_busy_wait(priv->ioaddr, mii_address);
+}
+
+/**
  * stmmac_mdio_reset
  * @bus: points to the mii_bus structure
  * Description: reset the MII bus
@@ -180,9 +266,11 @@ int stmmac_mdio_reset(struct mii_bus *bus)
 
/* This is a workaround for problems with the STE101P PHY.
 * It doesn't complete its reset until at least one clock cycle
-* on MDC, so perform a dummy mdio read.
+* on MDC, so perform a dummy mdio read. To be upadted for GMAC4
+* if needed.
 */
-   writel(0, priv->ioaddr + mii_address);
+   if (!priv->plat->has_gmac4)
+   writel(0, priv->ioaddr + mii_address);
 #endif
return 0;
 }
@@ -217,8 +305,14 @@ int stmmac_mdio_register(struct net_device *ndev)
 #endif
 
new_bus->name = "stmmac";
-   new_bus->read = _mdio_read;
-   new_bus->write = _mdio_write;
+   if (priv->plat->

[PATCH v6 2/6] Documentation: Bindings: Add STM32 DWMAC glue

[Alexandre TORGUE]

Signed-off-by: Alexandre TORGUE <alexandre.tor...@gmail.com>

diff --git a/Documentation/devicetree/bindings/net/stm32-dwmac.txt 
b/Documentation/devicetree/bindings/net/stm32-dwmac.txt
new file mode 100644
index 000..c35afb7
--- /dev/null
+++ b/Documentation/devicetree/bindings/net/stm32-dwmac.txt
@@ -0,0 +1,32 @@
+STMicroelectronics STM32 / MCU DWMAC glue layer controller
+
+This file documents platform glue layer for stmmac.
+Please see stmmac.txt for the other unchanged properties.
+
+The device node has following properties.
+
+Required properties:
+- compatible:  Should be "st,stm32-dwmac" to select glue, and
+  "snps,dwmac-3.50a" to select IP version.
+- clocks: Must contain a phandle for each entry in clock-names.
+- clock-names: Should be "stmmaceth" for the host clock.
+  Should be "mac-clk-tx" for the MAC TX clock.
+  Should be "mac-clk-rx" for the MAC RX clock.
+- st,syscon : Should be phandle/offset pair. The phandle to the syscon node 
which
+ encompases the glue register, and the offset of the control 
register.
+Example:
+
+   ethernet@40028000 {
+   compatible = "st,stm32-dwmac", "snps,dwmac-3.50a";
+   status = "disabled";
+   reg = <0x40028000 0x8000>;
+   reg-names = "stmmaceth";
+   interrupts = <0 61 0>, <0 62 0>;
+   interrupt-names = "macirq", "eth_wake_irq";
+   clock-names = "stmmaceth", "mac-clk-tx", "mac-clk-rx";
+   clocks = < 0 25>, < 0 26>, < 0 27>;
+   st,syscon = < 0x4>;
+   snps,pbl = <8>;
+   snps,mixed-burst;
+   dma-ranges;
+   };
-- 
1.9.1

[PATCH v6 0/6] Add Ethernet support on STM32F429

[Alexandre TORGUE]

STM32F429 Chip embeds a Synopsys 3.50a MAC IP.
This series:
 -enhance current stmmac driver to control it (code already
available) and adds basic glue for STM32F429 chip.
 -Enable basic Net config in kernel.

Changes since v5:
 -Fix typo in bindings documentation patch.
 -Change clocks names in stm32-dwmac glue driver / Documentation.
 -After rebase, stm32 ethernet node is now available. It has to be updated
according to new clocks names.

Changes since v4:
 -Fix dirty copy/past in bindings documentation patch.

Changes since v3:
 -Fix "tx-clk" and "rx-clk" as required clocks. Driver and bindings are
modified.

Changes since v2:
 -Fix alphabetic order in Kconfig and Makefile.
 -Improve code according to Joachim review.
 -Binding: remove useless entry.

Changes since v1:
 -Fix Kbuild issue in Kconfig.
 -Remove init/exit callbacks. Suspend/Resume and remove driver is no more
driven in stmmac_pltfr but directly in dwmac-stm32 glue driver.
 -Take into account Joachim review.

Regards.

Alexandre.
Alexandre TORGUE (6):
  net: ethernet: dwmac: add Ethernet glue logic for stm32 chip
  Documentation: Bindings: Add STM32 DWMAC glue
  net: ethernet: stmmac: add support of Synopsys 3.50a MAC IP
  ARM: STM32: Enable Ethernet in stm32_defconfig
  ARM: dts: stm32f429: Align Ethernet node with new bindings properties
  ARM: dts: stm32f429: Update Ethernet node on Eval board

 .../devicetree/bindings/net/stm32-dwmac.txt|  32 
 arch/arm/boot/dts/stm32429i-eval.dts   |   4 +-
 arch/arm/boot/dts/stm32f429.dtsi   |   6 +-
 arch/arm/configs/stm32_defconfig   |   9 +
 drivers/net/ethernet/stmicro/stmmac/Kconfig|  12 ++
 drivers/net/ethernet/stmicro/stmmac/Makefile   |   1 +
 drivers/net/ethernet/stmicro/stmmac/dwmac-stm32.c  | 193 +
 .../net/ethernet/stmicro/stmmac/stmmac_platform.c  |   1 +
 8 files changed, 253 insertions(+), 5 deletions(-)
 create mode 100644 Documentation/devicetree/bindings/net/stm32-dwmac.txt
 create mode 100644 drivers/net/ethernet/stmicro/stmmac/dwmac-stm32.c

-- 
1.9.1

[PATCH v6 1/6] net: ethernet: dwmac: add Ethernet glue logic for stm32 chip

[Alexandre TORGUE]

stm324xx family chips support Synopsys MAC 3.510 IP.
This patch adds settings for logical glue logic:
-clocks
-mode selection MII or RMII.

Reviewed-by: Joachim Eastwood <manab...@gmail.com>
Acked-by: Giuseppe Cavallaro <peppe.cavall...@st.com>
Tested-by: Maxime Coquelin <maxime.coque...@st.com>
Signed-off-by: Alexandre TORGUE <alexandre.tor...@gmail.com>

diff --git a/drivers/net/ethernet/stmicro/stmmac/Kconfig 
b/drivers/net/ethernet/stmicro/stmmac/Kconfig
index cec147d..235d679 100644
--- a/drivers/net/ethernet/stmicro/stmmac/Kconfig
+++ b/drivers/net/ethernet/stmicro/stmmac/Kconfig
@@ -104,6 +104,18 @@ config DWMAC_STI
  device driver. This driver is used on for the STi series
  SOCs GMAC ethernet controller.
 
+config DWMAC_STM32
+   tristate "STM32 DWMAC support"
+   default ARCH_STM32
+   depends on OF && HAS_IOMEM
+   select MFD_SYSCON
+   ---help---
+ Support for ethernet controller on STM32 SOCs.
+
+ This selects STM32 SoC glue layer support for the stmmac
+ device driver. This driver is used on for the STM32 series
+ SOCs GMAC ethernet controller.
+
 config DWMAC_SUNXI
tristate "Allwinner GMAC support"
default ARCH_SUNXI
diff --git a/drivers/net/ethernet/stmicro/stmmac/Makefile 
b/drivers/net/ethernet/stmicro/stmmac/Makefile
index 0fb362d..8828ada 100644
--- a/drivers/net/ethernet/stmicro/stmmac/Makefile
+++ b/drivers/net/ethernet/stmicro/stmmac/Makefile
@@ -13,6 +13,7 @@ obj-$(CONFIG_DWMAC_MESON) += dwmac-meson.o
 obj-$(CONFIG_DWMAC_ROCKCHIP)   += dwmac-rk.o
 obj-$(CONFIG_DWMAC_SOCFPGA)+= dwmac-socfpga.o
 obj-$(CONFIG_DWMAC_STI)+= dwmac-sti.o
+obj-$(CONFIG_DWMAC_STM32)  += dwmac-stm32.o
 obj-$(CONFIG_DWMAC_SUNXI)  += dwmac-sunxi.o
 obj-$(CONFIG_DWMAC_GENERIC)+= dwmac-generic.o
 stmmac-platform-objs:= stmmac_platform.o
diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac-stm32.c 
b/drivers/net/ethernet/stmicro/stmmac/dwmac-stm32.c
new file mode 100644
index 000..5c2afe5
--- /dev/null
+++ b/drivers/net/ethernet/stmicro/stmmac/dwmac-stm32.c
@@ -0,0 +1,193 @@
+/*
+ * dwmac-stm32.c - DWMAC Specific Glue layer for STM32 MCU
+ *
+ * Copyright (C) Alexandre Torgue 2015
+ * Author:  Alexandre Torgue <alexandre.tor...@gmail.com>
+ * License terms:  GNU General Public License (GPL), version 2
+ *
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#include "stmmac_platform.h"
+
+#define MII_PHY_SEL_MASK   BIT(23)
+
+struct stm32_dwmac {
+   struct clk *clk_tx;
+   struct clk *clk_rx;
+   u32 mode_reg;   /* MAC glue-logic mode register */
+   struct regmap *regmap;
+   u32 speed;
+};
+
+static int stm32_dwmac_init(struct plat_stmmacenet_data *plat_dat)
+{
+   struct stm32_dwmac *dwmac = plat_dat->bsp_priv;
+   u32 reg = dwmac->mode_reg;
+   u32 val;
+   int ret;
+
+   val = (plat_dat->interface == PHY_INTERFACE_MODE_MII) ? 0 : 1;
+   ret = regmap_update_bits(dwmac->regmap, reg, MII_PHY_SEL_MASK, val);
+   if (ret)
+   return ret;
+
+   ret = clk_prepare_enable(dwmac->clk_tx);
+   if (ret)
+   return ret;
+
+   ret = clk_prepare_enable(dwmac->clk_rx);
+   if (ret)
+   clk_disable_unprepare(dwmac->clk_tx);
+
+   return ret;
+}
+
+static void stm32_dwmac_clk_disable(struct stm32_dwmac *dwmac)
+{
+   clk_disable_unprepare(dwmac->clk_tx);
+   clk_disable_unprepare(dwmac->clk_rx);
+}
+
+static int stm32_dwmac_parse_data(struct stm32_dwmac *dwmac,
+ struct device *dev)
+{
+   struct device_node *np = dev->of_node;
+   int err;
+
+   /*  Get TX/RX clocks */
+   dwmac->clk_tx = devm_clk_get(dev, "mac-clk-tx");
+   if (IS_ERR(dwmac->clk_tx)) {
+   dev_err(dev, "No tx clock provided...\n");
+   return PTR_ERR(dwmac->clk_tx);
+   }
+   dwmac->clk_rx = devm_clk_get(dev, "mac-clk-rx");
+   if (IS_ERR(dwmac->clk_rx)) {
+   dev_err(dev, "No rx clock provided...\n");
+   return PTR_ERR(dwmac->clk_rx);
+   }
+
+   /* Get mode register */
+   dwmac->regmap = syscon_regmap_lookup_by_phandle(np, "st,syscon");
+   if (IS_ERR(dwmac->regmap))
+   return PTR_ERR(dwmac->regmap);
+
+   err = of_property_read_u32_index(np, "st,syscon", 1, >mode_reg);
+   if (err)
+   dev_err(dev, "Can't get sysconfig mode offset (%d)\n", err);
+
+   return err;
+}
+
+static int stm32_dwmac_probe(struct platform_device *pdev)
+{
+   struct plat_stmmacenet_data *plat_dat;
+   struct stmmac_resources stmmac_res;
+   struct stm32_dwmac *dwmac;
+ 

[PATCH v6 3/6] net: ethernet: stmmac: add support of Synopsys 3.50a MAC IP

[Alexandre TORGUE]

Adds support of Synopsys 3.50a MAC IP in stmmac driver.

Acked-by: Giuseppe Cavallaro <peppe.cavall...@st.com>
Tested-by: Maxime Coquelin <maxime.coque...@st.com>
Signed-off-by: Alexandre TORGUE <alexandre.tor...@gmail.com>

diff --git a/drivers/net/ethernet/stmicro/stmmac/stmmac_platform.c 
b/drivers/net/ethernet/stmicro/stmmac/stmmac_platform.c
index effaa4f..7ef8b98 100644
--- a/drivers/net/ethernet/stmicro/stmmac/stmmac_platform.c
+++ b/drivers/net/ethernet/stmicro/stmmac/stmmac_platform.c
@@ -262,6 +262,7 @@ stmmac_probe_config_dt(struct platform_device *pdev, const 
char **mac)
 * once needed on other platforms.
 */
if (of_device_is_compatible(np, "st,spear600-gmac") ||
+   of_device_is_compatible(np, "snps,dwmac-3.50a") ||
of_device_is_compatible(np, "snps,dwmac-3.70a") ||
of_device_is_compatible(np, "snps,dwmac")) {
/* Note that the max-frame-size parameter as defined in the
-- 
1.9.1

[PATCH v6 4/6] ARM: STM32: Enable Ethernet in stm32_defconfig

[Alexandre TORGUE]

Enable basic Ethernet support (IPV4) for stm32 defconfig.

Signed-off-by: Alexandre TORGUE <alexandre.tor...@gmail.com>

diff --git a/arch/arm/configs/stm32_defconfig b/arch/arm/configs/stm32_defconfig
index 1e5ec2a..719218b 100644
--- a/arch/arm/configs/stm32_defconfig
+++ b/arch/arm/configs/stm32_defconfig
@@ -33,11 +33,20 @@ CONFIG_XIP_PHYS_ADDR=0x08008000
 CONFIG_BINFMT_FLAT=y
 CONFIG_BINFMT_SHARED_FLAT=y
 # CONFIG_COREDUMP is not set
+CONFIG_NET=y
+CONFIG_INET=y
+# CONFIG_INET_XFRM_MODE_TRANSPORT is not set
+# CONFIG_INET_XFRM_MODE_TUNNEL is not set
+# CONFIG_INET_XFRM_MODE_BEET is not set
+# CONFIG_IPV6 is not set
 CONFIG_DEVTMPFS=y
 CONFIG_DEVTMPFS_MOUNT=y
 # CONFIG_FW_LOADER is not set
 # CONFIG_BLK_DEV is not set
 CONFIG_EEPROM_93CX6=y
+CONFIG_NETDEVICES=y
+CONFIG_STMMAC_ETH=y
+# CONFIG_WLAN is not set
 # CONFIG_INPUT is not set
 # CONFIG_SERIO is not set
 # CONFIG_VT is not set
-- 
1.9.1

[PATCH v6 6/6] ARM: dts: stm32f429: Update Ethernet node on Eval board

[Alexandre TORGUE]

Update new pinctrl phandle name and use new node name.

Signed-off-by: Alexandre TORGUE <alexandre.tor...@gmail.com>

diff --git a/arch/arm/boot/dts/stm32429i-eval.dts 
b/arch/arm/boot/dts/stm32429i-eval.dts
index 6bfc595..9a72445 100644
--- a/arch/arm/boot/dts/stm32429i-eval.dts
+++ b/arch/arm/boot/dts/stm32429i-eval.dts
@@ -94,9 +94,9 @@
clock-frequency = <2500>;
 };
 
- {
+ {
status = "okay";
-   pinctrl-0   = <_mii>;
+   pinctrl-0   = <_mii>;
pinctrl-names   = "default";
phy-mode= "mii-id";
mdio0 {
-- 
1.9.1

[PATCH v6 5/6] ARM: dts: stm32f429: Align Ethernet node with new bindings properties

[Alexandre TORGUE]

This patch aligns clocks names and node reference according to new
stm32-dwmac glue binding. It also renames Ethernet pinctrl phandle
(indeed there is no need to add 0 as Ethernet instance as there is only
one IP in SOC).

Signed-off-by: Alexandre TORGUE <alexandre.tor...@gmail.com>

diff --git a/arch/arm/boot/dts/stm32f429.dtsi b/arch/arm/boot/dts/stm32f429.dtsi
index 35df462..5995998 100644
--- a/arch/arm/boot/dts/stm32f429.dtsi
+++ b/arch/arm/boot/dts/stm32f429.dtsi
@@ -304,7 +304,7 @@
};
};
 
-   ethernet0_mii: mii@0 {
+   ethernet_mii: mii@0 {
pins {
pinmux = 
,
 
,
@@ -363,13 +363,13 @@
st,mem2mem;
};
 
-   ethernet0: dwmac@40028000 {
+   mac: ethernet@40028000 {
compatible = "st,stm32-dwmac", "snps,dwmac-3.50a";
reg = <0x40028000 0x8000>;
reg-names = "stmmaceth";
interrupts = <61>, <62>;
interrupt-names = "macirq", "eth_wake_irq";
-   clock-names = "stmmaceth", "tx-clk", "rx-clk";
+   clock-names = "stmmaceth", "mac-clk-tx", "mac-clk-rx";
clocks = < 0 25>, < 0 26>, < 0 27>;
st,syscon = < 0x4>;
snps,pbl = <8>;
-- 
1.9.1

[PATCH net-next] net: ethernet: stmmac: GMAC4.xx: Fix TX descriptor preparation

[Alexandre TORGUE]

On GMAC4.xx each descriptor contains 2 buffers of 16KB (each).
Initially, those 2 buffers was filled in dwmac4_rd_prepare_tx_desc but
it is actually not needed. Indeed, stmmac driver supports frame up to
9000 bytes (jumbo). So only one buffer is needed.

Reported-by: Dan Carpenter <dan.carpen...@oracle.com>
Signed-off-by: Alexandre TORGUE <alexandre.tor...@st.com>

diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac4_descs.c 
b/drivers/net/ethernet/stmicro/stmmac/dwmac4_descs.c
index d4952c7..4ec7397 100644
--- a/drivers/net/ethernet/stmicro/stmmac/dwmac4_descs.c
+++ b/drivers/net/ethernet/stmicro/stmmac/dwmac4_descs.c
@@ -254,14 +254,7 @@ static void dwmac4_rd_prepare_tx_desc(struct dma_desc *p, 
int is_fs, int len,
 {
unsigned int tdes3 = p->des3;
 
-   if (unlikely(len > BUF_SIZE_16KiB)) {
-   p->des2 |= (((len - BUF_SIZE_16KiB) <<
-TDES2_BUFFER2_SIZE_MASK_SHIFT)
-   & TDES2_BUFFER2_SIZE_MASK)
-   | (BUF_SIZE_16KiB & TDES2_BUFFER1_SIZE_MASK);
-   } else {
-   p->des2 |= (len & TDES2_BUFFER1_SIZE_MASK);
-   }
+   p->des2 |= (len & TDES2_BUFFER1_SIZE_MASK);
 
if (is_fs)
tdes3 |= TDES3_FIRST_DESCRIPTOR;
-- 
1.9.1

Re: [PATCH v5 2/4] Documentation: Bindings: Add STM32 DWMAC glue

[Alexandre Torgue]

Hi Rob,

2016-03-22 17:11 GMT+01:00 Alexandre Torgue <alexandre.tor...@gmail.com>:
> Hi guys,
>
> I will fix typo issues (s/vesrion/version and ethernet @).
>
> Concerning compatible string. For sure "snps,dwmac-3.50a" string is
> not used inside glue driver.
> I perfere to keep it for information but if you really want that I
> remove it I will not block ;)
>
> 2016-03-21 16:36 GMT+01:00 Joachim  Eastwood <manab...@gmail.com>:
>> On 21 March 2016 at 13:40, Rob Herring <r...@kernel.org> wrote:
>>> On Sat, Mar 19, 2016 at 12:00:22AM +0800, Chen-Yu Tsai wrote:
>>>> Hi,
>>>>
>>>> On Fri, Mar 18, 2016 at 11:37 PM, Alexandre TORGUE
>>>> <alexandre.tor...@gmail.com> wrote:
>>>> > +- clocks: Must contain a phandle for each entry in clock-names.
>>>> > +- clock-names: Should be "stmmaceth" for the host clock.
>>>
> We can remove host clock (stmmac eth) entry here and refer to
> stmmac.txt binding for common entry
>
>>> This doesn't sound like the clock input signal name...
>>>
>>>> > +  Should be "tx-clk" for the MAC TX clock.
>>>> > +  Should be "rx-clk" for the MAC RX clock.
>>>
>>> How can other DWMAC blocks not have these clocks? The glue can't really
>>> add these clocks. It could combine them into one or a new version of
>>> DWMAC could have a different number of clock inputs. So if there is
>>> variation here, then some of the bindings are probably wrong. I guess
>>> the only change I'm suggesting is possibly moving these into common
>>> binding doc.
>>
>> The LPC18xx implementation probably have these clocks as well but the
>> LPC1850 user manual only documents the main clock. Someone with access
>> to the IP block doc from Synopsys should be able to check which clocks
>> the MAC really needs.
>>
>> Rockchip bindings have two clocks named "mac_clk_rx" and "mac_clk_tx".
>> These are probably the same as stm32 needs so maybe use these names
>> and move them into the main doc and update the rockchip binding.
>>
> I think we can use same name. But I have a doubt on moving it in a
> common bindings (maybe I don't well understood). When you say "common
> binding file" is it "stmmac.txt" binding ? If yes does it mean that we
> have to control it inside stmmac driver (no more in glue) ? In this
> case those clocks will become "required" for stm32 and rockship but
> not for others chip. It could create confusion?

A gentle ping. Can you give me your feedback please ?
I will send next patchset version according to your answer.

Thanks in advance

Alex

>
> Best regards
>
> Alex
>
>>
>> regards,
>> Joachim Eastwood

[RESEND PATCH net-next 10/13] stmmac: support new GMAC4

[Alexandre TORGUE]

This patch adds the whole GMAC4 support inside the
stmmac d.d. now able to use the new HW and some new features
i.e.: TSO.
It is missing the multi-queue and split Header support at this
stage.
This patch also updates the driver version and the stmmac.txt.

Signed-off-by: Alexandre TORGUE <alexandre.tor...@st.com>
Signed-off-by: Giuseppe Cavallaro <peppe.cavall...@st.com>

diff --git a/drivers/net/ethernet/stmicro/stmmac/common.h 
b/drivers/net/ethernet/stmicro/stmmac/common.h
index eabe86b..fc60368 100644
--- a/drivers/net/ethernet/stmicro/stmmac/common.h
+++ b/drivers/net/ethernet/stmicro/stmmac/common.h
@@ -169,6 +169,9 @@ struct stmmac_extra_stats {
unsigned long mtl_rx_fifo_ctrl_active;
unsigned long mac_rx_frame_ctrl_fifo;
unsigned long mac_gmii_rx_proto_engine;
+   /* TSO */
+   unsigned long tx_tso_frames;
+   unsigned long tx_tso_nfrags;
 };
 
 /* CSR Frequency Access Defines*/
@@ -545,6 +548,7 @@ void stmmac_dwmac4_set_mac(void __iomem *ioaddr, bool 
enable);
 void dwmac_dma_flush_tx_fifo(void __iomem *ioaddr);
 extern const struct stmmac_mode_ops ring_mode_ops;
 extern const struct stmmac_mode_ops chain_mode_ops;
+extern const struct stmmac_desc_ops dwmac4_desc_ops;
 
 /**
  * stmmac_get_synopsys_id - return the SYINID.
diff --git a/drivers/net/ethernet/stmicro/stmmac/stmmac.h 
b/drivers/net/ethernet/stmicro/stmmac/stmmac.h
index 26fb855..317ce35 100644
--- a/drivers/net/ethernet/stmicro/stmmac/stmmac.h
+++ b/drivers/net/ethernet/stmicro/stmmac/stmmac.h
@@ -24,7 +24,7 @@
 #define __STMMAC_H__
 
 #define STMMAC_RESOURCE_NAME   "stmmaceth"
-#define DRV_MODULE_VERSION "Oct_2015"
+#define DRV_MODULE_VERSION "Dec_2015"
 
 #include 
 #include 
@@ -67,6 +67,7 @@ struct stmmac_priv {
spinlock_t tx_lock;
bool tx_path_in_lpi_mode;
struct timer_list txtimer;
+   bool tso;
 
struct dma_desc *dma_rx cacheline_aligned_in_smp;
struct dma_extended_desc *dma_erx;
@@ -129,6 +130,9 @@ struct stmmac_priv {
int irq_wake;
spinlock_t ptp_lock;
void __iomem *mmcaddr;
+   u32 rx_tail_addr;
+   u32 tx_tail_addr;
+   u32 mss;
 
 #ifdef CONFIG_DEBUG_FS
struct dentry *dbgfs_dir;
diff --git a/drivers/net/ethernet/stmicro/stmmac/stmmac_ethtool.c 
b/drivers/net/ethernet/stmicro/stmmac/stmmac_ethtool.c
index fb2e7fc85..e2b98b0 100644
--- a/drivers/net/ethernet/stmicro/stmmac/stmmac_ethtool.c
+++ b/drivers/net/ethernet/stmicro/stmmac/stmmac_ethtool.c
@@ -161,6 +161,9 @@ static const struct stmmac_stats stmmac_gstrings_stats[] = {
STMMAC_STAT(mtl_rx_fifo_ctrl_active),
STMMAC_STAT(mac_rx_frame_ctrl_fifo),
STMMAC_STAT(mac_gmii_rx_proto_engine),
+   /* TSO */
+   STMMAC_STAT(tx_tso_frames),
+   STMMAC_STAT(tx_tso_nfrags),
 };
 #define STMMAC_STATS_LEN ARRAY_SIZE(stmmac_gstrings_stats)
 
@@ -499,7 +502,7 @@ static void stmmac_get_ethtool_stats(struct net_device *dev,
int i, j = 0;
 
/* Update the DMA HW counters for dwmac10/100 */
-   if (!priv->plat->has_gmac)
+   if (priv->hw->dma->dma_diagnostic_fr)
priv->hw->dma->dma_diagnostic_fr(>stats,
 (void *) >xstats,
 priv->ioaddr);
diff --git a/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c 
b/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c
index 977487a..cb21884 100644
--- a/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c
+++ b/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c
@@ -56,6 +56,7 @@
 #include "dwmac1000.h"
 
 #define STMMAC_ALIGN(x)L1_CACHE_ALIGN(x)
+#defineTSO_MAX_BUFF_SIZE   (SZ_16K - 1)
 
 /* Module parameters */
 #define TX_TIMEO   5000
@@ -726,13 +727,15 @@ static void stmmac_adjust_link(struct net_device *dev)
new_state = 1;
switch (phydev->speed) {
case 1000:
-   if (likely(priv->plat->has_gmac))
+   if (likely((priv->plat->has_gmac) ||
+  (priv->plat->has_gmac4)))
ctrl &= ~priv->hw->link.port;
stmmac_hw_fix_mac_speed(priv);
break;
case 100:
case 10:
-   if (priv->plat->has_gmac) {
+   if (likely((priv->plat->has_gmac) ||
+  (priv->plat->has_gmac4))) {
ctrl |= priv->hw->link.port;
if (phydev->speed == SPEED_100) {
ctrl |= priv->hw->link.speed;
@@ -977,7 +9

[RESEND PATCH net-next 12/13] stmmac: update version to Jan_2016

[Alexandre TORGUE]

This patch just updates the driver to the version fully
tested on STi platforms. This version is Jan_2016.

Signed-off-by: Alexandre TORGUE <alexandre.tor...@st.com>

diff --git a/drivers/net/ethernet/stmicro/stmmac/stmmac.h 
b/drivers/net/ethernet/stmicro/stmmac/stmmac.h
index 317ce35..ff67506 100644
--- a/drivers/net/ethernet/stmicro/stmmac/stmmac.h
+++ b/drivers/net/ethernet/stmicro/stmmac/stmmac.h
@@ -24,7 +24,7 @@
 #define __STMMAC_H__
 
 #define STMMAC_RESOURCE_NAME   "stmmaceth"
-#define DRV_MODULE_VERSION "Dec_2015"
+#define DRV_MODULE_VERSION "Jan_2016"
 
 #include 
 #include 
-- 
1.9.1

[RESEND PATCH net-next 08/13] stmmac: enhance mmc counter management

[Alexandre TORGUE]

For gmac3, the MMC addr map is: 0x100 - 0x2fc
For gmac4, the MMC addr map is: 0x700 - 0x8fc

So instead of adding 0x600 to the IO address when setup the mmc,
the RMON base address is saved inside the private structure and
then used to manage the counters.

Signed-off-by: Giuseppe Cavallaro <peppe.cavall...@st.com>
Signed-off-by: Alexandre TORGUE <alexandre.tor...@st.com>

diff --git a/drivers/net/ethernet/stmicro/stmmac/mmc.h 
b/drivers/net/ethernet/stmicro/stmmac/mmc.h
index 192c249..38a1a56 100644
--- a/drivers/net/ethernet/stmicro/stmmac/mmc.h
+++ b/drivers/net/ethernet/stmicro/stmmac/mmc.h
@@ -35,6 +35,10 @@
 * current value.*/
 #define MMC_CNTRL_PRESET   0x10
 #define MMC_CNTRL_FULL_HALF_PRESET 0x20
+
+#define MMC_GMAC4_OFFSET   0x700
+#define MMC_GMAC3_X_OFFSET 0x100
+
 struct stmmac_counters {
unsigned int mmc_tx_octetcount_gb;
unsigned int mmc_tx_framecount_gb;
diff --git a/drivers/net/ethernet/stmicro/stmmac/mmc_core.c 
b/drivers/net/ethernet/stmicro/stmmac/mmc_core.c
index 3f20bb1..ce9aa79 100644
--- a/drivers/net/ethernet/stmicro/stmmac/mmc_core.c
+++ b/drivers/net/ethernet/stmicro/stmmac/mmc_core.c
@@ -28,12 +28,12 @@
 
 /* MAC Management Counters register offset */
 
-#define MMC_CNTRL  0x0100  /* MMC Control */
-#define MMC_RX_INTR0x0104  /* MMC RX Interrupt */
-#define MMC_TX_INTR0x0108  /* MMC TX Interrupt */
-#define MMC_RX_INTR_MASK   0x010c  /* MMC Interrupt Mask */
-#define MMC_TX_INTR_MASK   0x0110  /* MMC Interrupt Mask */
-#define MMC_DEFAULT_MASK   0x
+#define MMC_CNTRL  0x00/* MMC Control */
+#define MMC_RX_INTR0x04/* MMC RX Interrupt */
+#define MMC_TX_INTR0x08/* MMC TX Interrupt */
+#define MMC_RX_INTR_MASK   0x0c/* MMC Interrupt Mask */
+#define MMC_TX_INTR_MASK   0x10/* MMC Interrupt Mask */
+#define MMC_DEFAULT_MASK   0x
 
 /* MMC TX counter registers */
 
@@ -41,115 +41,115 @@
  * _GB register stands for good and bad frames
  * _G is for good only.
  */
-#define MMC_TX_OCTETCOUNT_GB   0x0114
-#define MMC_TX_FRAMECOUNT_GB   0x0118
-#define MMC_TX_BROADCASTFRAME_G0x011c
-#define MMC_TX_MULTICASTFRAME_G0x0120
-#define MMC_TX_64_OCTETS_GB0x0124
-#define MMC_TX_65_TO_127_OCTETS_GB 0x0128
-#define MMC_TX_128_TO_255_OCTETS_GB0x012c
-#define MMC_TX_256_TO_511_OCTETS_GB0x0130
-#define MMC_TX_512_TO_1023_OCTETS_GB   0x0134
-#define MMC_TX_1024_TO_MAX_OCTETS_GB   0x0138
-#define MMC_TX_UNICAST_GB  0x013c
-#define MMC_TX_MULTICAST_GB0x0140
-#define MMC_TX_BROADCAST_GB0x0144
-#define MMC_TX_UNDERFLOW_ERROR 0x0148
-#define MMC_TX_SINGLECOL_G 0x014c
-#define MMC_TX_MULTICOL_G  0x0150
-#define MMC_TX_DEFERRED0x0154
-#define MMC_TX_LATECOL 0x0158
-#define MMC_TX_EXESSCOL0x015c
-#define MMC_TX_CARRIER_ERROR   0x0160
-#define MMC_TX_OCTETCOUNT_G0x0164
-#define MMC_TX_FRAMECOUNT_G0x0168
-#define MMC_TX_EXCESSDEF   0x016c
-#define MMC_TX_PAUSE_FRAME 0x0170
-#define MMC_TX_VLAN_FRAME_G0x0174
+#define MMC_TX_OCTETCOUNT_GB   0x14
+#define MMC_TX_FRAMECOUNT_GB   0x18
+#define MMC_TX_BROADCASTFRAME_G0x1c
+#define MMC_TX_MULTICASTFRAME_G0x20
+#define MMC_TX_64_OCTETS_GB0x24
+#define MMC_TX_65_TO_127_OCTETS_GB 0x28
+#define MMC_TX_128_TO_255_OCTETS_GB0x2c
+#define MMC_TX_256_TO_511_OCTETS_GB0x30
+#define MMC_TX_512_TO_1023_OCTETS_GB   0x34
+#define MMC_TX_1024_TO_MAX_OCTETS_GB   0x38
+#define MMC_TX_UNICAST_GB  0x3c
+#define MMC_TX_MULTICAST_GB0x40
+#define MMC_TX_BROADCAST_GB0x44
+#define MMC_TX_UNDERFLOW_ERROR 0x48
+#define MMC_TX_SINGLECOL_G 0x4c
+#define MMC_TX_MULTICOL_G  0x50
+#define MMC_TX_DEFERRED0x54
+#define MMC_TX_LATECOL 0x58
+#define MMC_TX_EXESSCOL0x5c
+#define MMC_TX_CARRIER_ERROR   0x60
+#define MMC_TX_OCTETCOUNT_G0x64
+#define MMC_TX_FRAMECOUNT_G0x68
+#define MMC_TX_EXCESSDEF   0x6c
+#define MMC_TX_PAUSE_FRAME 0x70
+#define MMC_TX_VLAN_FRAME_G0x74
 
 /* MMC RX counter registers */
-#define MMC_RX_FRAMECOUNT_GB   0x0180
-#define MMC_RX_OCTETCOUNT_GB   0x0184
-#define MMC_RX_OCTETCOUNT_G0x0188
-#define MMC_RX_BROADCASTFRAME_G0x018c
-#define MMC_RX_MULTICASTFRAME_G0x0190
-#define MMC_

[RESEND PATCH net-next 09/13] stmmac: add new DT platform entries for GMAC4

[Alexandre TORGUE]

This is to support the snps,dwmac-4.00 and snps,dwmac-4.10a
and related features on the platform driver.
See binding doc for further details.

Signed-off-by: Giuseppe Cavallaro <peppe.cavall...@st.com>
Signed-off-by: Alexandre TORGUE <alexandre.tor...@st.com>

diff --git a/Documentation/devicetree/bindings/net/stmmac.txt 
b/Documentation/devicetree/bindings/net/stmmac.txt
index 6605d19..4d302db 100644
--- a/Documentation/devicetree/bindings/net/stmmac.txt
+++ b/Documentation/devicetree/bindings/net/stmmac.txt
@@ -59,6 +59,8 @@ Optional properties:
- snps,fb: fixed-burst
- snps,mb: mixed-burst
- snps,rb: rebuild INCRx Burst
+   - snps,tso: this enables the TSO feature otherwise it will be managed by
+   MAC HW capability register.
 - mdio: with compatible = "snps,dwmac-mdio", create and register mdio bus.
 
 Examples:
diff --git a/drivers/net/ethernet/stmicro/stmmac/stmmac_platform.c 
b/drivers/net/ethernet/stmicro/stmmac/stmmac_platform.c
index dcbd2a1..6ca32f7 100644
--- a/drivers/net/ethernet/stmicro/stmmac/stmmac_platform.c
+++ b/drivers/net/ethernet/stmicro/stmmac/stmmac_platform.c
@@ -243,6 +243,13 @@ stmmac_probe_config_dt(struct platform_device *pdev, const 
char **mac)
plat->pmt = 1;
}
 
+   if (of_device_is_compatible(np, "snps,dwmac-4.00") ||
+   of_device_is_compatible(np, "snps,dwmac-4.10a")) {
+   plat->has_gmac4 = 1;
+   plat->pmt = 1;
+   plat->tso_en = of_property_read_bool(np, "snps,tso");
+   }
+
if (of_device_is_compatible(np, "snps,dwmac-3.610") ||
of_device_is_compatible(np, "snps,dwmac-3.710")) {
plat->enh_desc = 1;
diff --git a/include/linux/stmmac.h b/include/linux/stmmac.h
index 4bcf5a6..3aa1870 100644
--- a/include/linux/stmmac.h
+++ b/include/linux/stmmac.h
@@ -138,5 +138,7 @@ struct plat_stmmacenet_data {
void (*exit)(struct platform_device *pdev, void *priv);
void *bsp_priv;
struct stmmac_axi *axi;
+   int has_gmac4;
+   bool tso_en;
 };
 #endif
-- 
1.9.1

[RESEND PATCH net-next 03/13] stmmac: rework synopsys id read, moved to dwmac setup

[Alexandre TORGUE]

synopsys_uid is only used once after setup, to get synopsys_id
by using shitf/mask operation. It's no longer used then.
So, remove this temporary variable and directly compute
synopsys_id from setup routine.

Acked-by: Giuseppe Cavallaro <peppe.cavall...@st.com>
Signed-off-by: Fabrice Gasnier <fabrice.gasn...@st.com>
Signed-off-by: Alexandre TORGUE <alexandre.tor...@st.com>

diff --git a/drivers/net/ethernet/stmicro/stmmac/common.h 
b/drivers/net/ethernet/stmicro/stmmac/common.h
index 6cea61b..66e132f 100644
--- a/drivers/net/ethernet/stmicro/stmmac/common.h
+++ b/drivers/net/ethernet/stmicro/stmmac/common.h
@@ -498,7 +498,6 @@ struct mac_device_info {
const struct stmmac_hwtimestamp *ptp;
struct mii_regs mii;/* MII register Addresses */
struct mac_link link;
-   unsigned int synopsys_uid;
void __iomem *pcsr; /* vpointer to device CSRs */
int multicast_filter_bins;
int unicast_filter_entries;
@@ -507,8 +506,10 @@ struct mac_device_info {
 };
 
 struct mac_device_info *dwmac1000_setup(void __iomem *ioaddr, int mcbins,
-   int perfect_uc_entries);
-struct mac_device_info *dwmac100_setup(void __iomem *ioaddr);
+   int perfect_uc_entries,
+   int *synopsys_id);
+struct mac_device_info *dwmac100_setup(void __iomem *ioaddr, int *synopsys_id);
+
 
 void stmmac_set_mac_addr(void __iomem *ioaddr, u8 addr[6],
 unsigned int high, unsigned int low);
@@ -521,4 +522,24 @@ void dwmac_dma_flush_tx_fifo(void __iomem *ioaddr);
 extern const struct stmmac_mode_ops ring_mode_ops;
 extern const struct stmmac_mode_ops chain_mode_ops;
 
+/**
+ * stmmac_get_synopsys_id - return the SYINID.
+ * @priv: driver private structure
+ * Description: this simple function is to decode and return the SYINID
+ * starting from the HW core register.
+ */
+static inline u32 stmmac_get_synopsys_id(u32 hwid)
+{
+   /* Check Synopsys Id (not available on old chips) */
+   if (likely(hwid)) {
+   u32 uid = ((hwid & 0xff00) >> 8);
+   u32 synid = (hwid & 0x00ff);
+
+   pr_info("stmmac - user ID: 0x%x, Synopsys ID: 0x%x\n",
+   uid, synid);
+
+   return synid;
+   }
+   return 0;
+}
 #endif /* __COMMON_H__ */
diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac1000_core.c 
b/drivers/net/ethernet/stmicro/stmmac/dwmac1000_core.c
index c294117..fb1eb57 100644
--- a/drivers/net/ethernet/stmicro/stmmac/dwmac1000_core.c
+++ b/drivers/net/ethernet/stmicro/stmmac/dwmac1000_core.c
@@ -491,7 +491,8 @@ static const struct stmmac_ops dwmac1000_ops = {
 };
 
 struct mac_device_info *dwmac1000_setup(void __iomem *ioaddr, int mcbins,
-   int perfect_uc_entries)
+   int perfect_uc_entries,
+   int *synopsys_id)
 {
struct mac_device_info *mac;
u32 hwid = readl(ioaddr + GMAC_VERSION);
@@ -516,7 +517,9 @@ struct mac_device_info *dwmac1000_setup(void __iomem 
*ioaddr, int mcbins,
mac->link.speed = GMAC_CONTROL_FES;
mac->mii.addr = GMAC_MII_ADDR;
mac->mii.data = GMAC_MII_DATA;
-   mac->synopsys_uid = hwid;
+
+   /* Get and dump the chip ID */
+   *synopsys_id = stmmac_get_synopsys_id(hwid);
 
return mac;
 }
diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac100_core.c 
b/drivers/net/ethernet/stmicro/stmmac/dwmac100_core.c
index f8dd773..6418b2e 100644
--- a/drivers/net/ethernet/stmicro/stmmac/dwmac100_core.c
+++ b/drivers/net/ethernet/stmicro/stmmac/dwmac100_core.c
@@ -173,7 +173,7 @@ static const struct stmmac_ops dwmac100_ops = {
.get_umac_addr = dwmac100_get_umac_addr,
 };
 
-struct mac_device_info *dwmac100_setup(void __iomem *ioaddr)
+struct mac_device_info *dwmac100_setup(void __iomem *ioaddr, int *synopsys_id)
 {
struct mac_device_info *mac;
 
@@ -192,7 +192,8 @@ struct mac_device_info *dwmac100_setup(void __iomem *ioaddr)
mac->link.speed = 0;
mac->mii.addr = MAC_MII_ADDR;
mac->mii.data = MAC_MII_DATA;
-   mac->synopsys_uid = 0;
+   /* Synopsys Id is not available on old chips */
+   *synopsys_id = 0;
 
return mac;
 }
diff --git a/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c 
b/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c
index 8103527..2ebee81 100644
--- a/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c
+++ b/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c
@@ -1468,29 +1468,6 @@ static void stmmac_mmc_setup(struct stmmac_priv *priv)
 }
 
 /**
- * stmmac_get_synopsys_id - return the SYINID.
- * @priv: driver private structure
- * Description: this simple function is to decode and return the SYINID
- * starting from the HW core register.
- */
-static u32 stmmac_get_sy

[RESEND PATCH net-next 06/13] stmmac: add DMA support for GMAC 4.xx

[Alexandre TORGUE]

DMA behavior is linked to descriptor management:

-descriptor mechanism (Tx for example, but it is exactly the same for RX):
-useful registers:
-DMA_CH#_TxDesc_Ring_Len: length of transmit descriptor ring
-DMA_CH#_TxDesc_List_Address: start address of the ring
-DMA_CH#_TxDesc_Tail_Pointer: address of the last
  descriptor to send + 1.
-DMA_CH#_TxDesc_Current_App_TxDesc: address of the current
descriptor

-The descriptor Tail Pointer register contains the pointer to the
 descriptor address (N). The base address and the current
 descriptor decide the address of the current descriptor that the
 DMA can process. The descriptors up to one location less than the
 one indicated by the descriptor tail pointer (N-1) are owned by
 the DMA. The DMA continues to process the descriptors until the
 following condition occurs:
 "current descriptor pointer == Descriptor Tail pointer"

Then the DMA goes into suspend mode. The application must perform
a write to descriptor tail pointer register and update the tail
pointer to have the following condition and to start a new transfer:
"current descriptor pointer < Descriptor tail pointer"

The DMA automatically wraps around the base address when the end
of ring is reached.

Up to 8 DMA could be use but currently we only use one (channel0)

Signed-off-by: Alexandre TORGUE <alexandre.tor...@st.com>
Signed-off-by: Giuseppe Cavallaro <peppe.cavall...@st.com>

diff --git a/drivers/net/ethernet/stmicro/stmmac/Makefile 
b/drivers/net/ethernet/stmicro/stmmac/Makefile
index fa000fd..9398ace 100644
--- a/drivers/net/ethernet/stmicro/stmmac/Makefile
+++ b/drivers/net/ethernet/stmicro/stmmac/Makefile
@@ -3,7 +3,7 @@ stmmac-objs:= stmmac_main.o stmmac_ethtool.o stmmac_mdio.o 
ring_mode.o  \
  chain_mode.o dwmac_lib.o dwmac1000_core.o dwmac1000_dma.o \
  dwmac100_core.o dwmac100_dma.o enh_desc.o norm_desc.o \
  mmc_core.o stmmac_hwtstamp.o stmmac_ptp.o dwmac4_descs.o  \
- $(stmmac-y)
+ dwmac4_dma.o dwmac4_lib.o $(stmmac-y)
 
 # Ordering matters. Generic driver must be last.
 obj-$(CONFIG_STMMAC_PLATFORM)  += stmmac-platform.o
diff --git a/drivers/net/ethernet/stmicro/stmmac/common.h 
b/drivers/net/ethernet/stmicro/stmmac/common.h
index ea7eb0d..2a5126e 100644
--- a/drivers/net/ethernet/stmicro/stmmac/common.h
+++ b/drivers/net/ethernet/stmicro/stmmac/common.h
@@ -41,6 +41,8 @@
 /* Synopsys Core versions */
 #defineDWMAC_CORE_3_40 0x34
 #defineDWMAC_CORE_3_50 0x35
+#defineDWMAC_CORE_4_00 0x40
+#define STMMAC_CHAN0   0   /* Always supported and default for all chips */
 
 #define DMA_TX_SIZE 512
 #define DMA_RX_SIZE 512
@@ -270,6 +272,7 @@ enum dma_irq_status {
 #defineCORE_PCS_ANE_COMPLETE   (1 << 5)
 #defineCORE_PCS_LINK_STATUS(1 << 6)
 #defineCORE_RGMII_IRQ  (1 << 7)
+#define CORE_IRQ_MTL_RX_OVERFLOW   BIT(8)
 
 /* Physical Coding Sublayer */
 struct rgmii_adv {
@@ -301,8 +304,10 @@ struct dma_features {
/* 802.3az - Energy-Efficient Ethernet (EEE) */
unsigned int eee;
unsigned int av;
+   unsigned int tsoen;
/* TX and RX csum */
unsigned int tx_coe;
+   unsigned int rx_coe;
unsigned int rx_coe_type1;
unsigned int rx_coe_type2;
unsigned int rxfifo_over_2048;
@@ -425,6 +430,11 @@ struct stmmac_dma_ops {
   struct dma_features *dma_cap);
/* Program the HW RX Watchdog */
void (*rx_watchdog) (void __iomem *ioaddr, u32 riwt);
+   void (*set_tx_ring_len)(void __iomem *ioaddr, u32 len);
+   void (*set_rx_ring_len)(void __iomem *ioaddr, u32 len);
+   void (*set_rx_tail_ptr)(void __iomem *ioaddr, u32 tail_ptr, u32 chan);
+   void (*set_tx_tail_ptr)(void __iomem *ioaddr, u32 tail_ptr, u32 chan);
+   void (*enable_tso)(void __iomem *ioaddr, bool en, u32 chan);
 };
 
 struct mac_device_info;
@@ -473,6 +483,7 @@ struct stmmac_hwtimestamp {
 };
 
 extern const struct stmmac_hwtimestamp stmmac_ptp;
+extern const struct stmmac_mode_ops dwmac4_ring_mode_ops;
 
 struct mac_link {
int port;
diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac4_dma.c 
b/drivers/net/ethernet/stmicro/stmmac/dwmac4_dma.c
new file mode 100644
index 000..116151c
--- /dev/null
+++ b/drivers/net/ethernet/stmicro/stmmac/dwmac4_dma.c
@@ -0,0 +1,354 @@
+/*
+ * This is the driver for the GMAC on-chip Ethernet controller for ST SoCs.
+ * DWC Ether MAC version 4.xx  has been used for  developing this code.
+ *
+ * This contains the functions to handle the dma.
+ *
+ * Copyright (C) 2015  STMicroelectronics Ltd
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms and conditions of the GNU General Public License,
+ * ve

[RESEND PATCH net-next 13/13] stmmac: update MAINTAINERS

[Alexandre TORGUE]

Signed-off-by: Alexandre TORGUE <alexandre.tor...@st.com>

diff --git a/MAINTAINERS b/MAINTAINERS
index 32bafda..37fc112 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -3348,6 +3348,7 @@ F:Documentation/powerpc/cxlflash.txt
 
 STMMAC ETHERNET DRIVER
 M: Giuseppe Cavallaro <peppe.cavall...@st.com>
+M:     Alexandre Torgue <alexandre.tor...@st.com>
 L: netdev@vger.kernel.org
 W: http://www.stlinux.com
 S: Supported
-- 
1.9.1

[RESEND PATCH net-next 02/13] stmmac: rework the routines to show the ring status

[Alexandre TORGUE]

To avoid lot of check in stmmac_main for display ring management
and support the GMAC4 chip, the display_ring function is moved
into dedicated descriptor file.

Signed-off-by: Alexandre TORGUE <alexandre.tor...@st.com>
Signed-off-by: Giuseppe Cavallaro <peppe.cavall...@st.com>

diff --git a/drivers/net/ethernet/stmicro/stmmac/common.h 
b/drivers/net/ethernet/stmicro/stmmac/common.h
index 797a913..6cea61b 100644
--- a/drivers/net/ethernet/stmicro/stmmac/common.h
+++ b/drivers/net/ethernet/stmicro/stmmac/common.h
@@ -380,6 +380,8 @@ struct stmmac_desc_ops {
 u64(*get_timestamp) (void *desc, u32 ats);
/* get rx timestamp status */
int (*get_rx_timestamp_status) (void *desc, u32 ats);
+   /* Display ring */
+   void (*display_ring)(void *head, unsigned int size, bool rx);
 };
 
 extern const struct stmmac_desc_ops enh_desc_ops;
diff --git a/drivers/net/ethernet/stmicro/stmmac/enh_desc.c 
b/drivers/net/ethernet/stmicro/stmmac/enh_desc.c
index cfb018c..38f19c9 100644
--- a/drivers/net/ethernet/stmicro/stmmac/enh_desc.c
+++ b/drivers/net/ethernet/stmicro/stmmac/enh_desc.c
@@ -411,6 +411,26 @@ static int enh_desc_get_rx_timestamp_status(void *desc, 
u32 ats)
}
 }
 
+static void enh_desc_display_ring(void *head, unsigned int size, bool rx)
+{
+   struct dma_extended_desc *ep = (struct dma_extended_desc *)head;
+   int i;
+
+   pr_info("Extended %s descriptor ring:\n", rx ? "RX" : "TX");
+
+   for (i = 0; i < size; i++) {
+   u64 x;
+
+   x = *(u64 *)ep;
+   pr_info("%d [0x%x]: 0x%x 0x%x 0x%x 0x%x\n",
+   i, (unsigned int)virt_to_phys(ep),
+   (unsigned int)x, (unsigned int)(x >> 32),
+   ep->basic.des2, ep->basic.des3);
+   ep++;
+   }
+   pr_info("\n");
+}
+
 const struct stmmac_desc_ops enh_desc_ops = {
.tx_status = enh_desc_get_tx_status,
.rx_status = enh_desc_get_rx_status,
@@ -430,4 +450,5 @@ const struct stmmac_desc_ops enh_desc_ops = {
.get_tx_timestamp_status = enh_desc_get_tx_timestamp_status,
.get_timestamp = enh_desc_get_timestamp,
.get_rx_timestamp_status = enh_desc_get_rx_timestamp_status,
+   .display_ring = enh_desc_display_ring,
 };
diff --git a/drivers/net/ethernet/stmicro/stmmac/norm_desc.c 
b/drivers/net/ethernet/stmicro/stmmac/norm_desc.c
index e13228f..b9f6e3f 100644
--- a/drivers/net/ethernet/stmicro/stmmac/norm_desc.c
+++ b/drivers/net/ethernet/stmicro/stmmac/norm_desc.c
@@ -279,6 +279,26 @@ static int ndesc_get_rx_timestamp_status(void *desc, u32 
ats)
return 1;
 }
 
+static void ndesc_display_ring(void *head, unsigned int size, bool rx)
+{
+   struct dma_desc *p = (struct dma_desc *)head;
+   int i;
+
+   pr_info("%s descriptor ring:\n", rx ? "RX" : "TX");
+
+   for (i = 0; i < size; i++) {
+   u64 x;
+
+   x = *(u64 *)p;
+   pr_info("%d [0x%x]: 0x%x 0x%x 0x%x 0x%x",
+   i, (unsigned int)virt_to_phys(p),
+   (unsigned int)x, (unsigned int)(x >> 32),
+   p->des2, p->des3);
+   p++;
+   }
+   pr_info("\n");
+}
+
 const struct stmmac_desc_ops ndesc_ops = {
.tx_status = ndesc_get_tx_status,
.rx_status = ndesc_get_rx_status,
@@ -297,4 +317,5 @@ const struct stmmac_desc_ops ndesc_ops = {
.get_tx_timestamp_status = ndesc_get_tx_timestamp_status,
.get_timestamp = ndesc_get_timestamp,
.get_rx_timestamp_status = ndesc_get_rx_timestamp_status,
+   .display_ring = ndesc_display_ring,
 };
diff --git a/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c 
b/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c
index d3ebfea..8103527 100644
--- a/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c
+++ b/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c
@@ -883,53 +883,22 @@ static int stmmac_init_phy(struct net_device *dev)
return 0;
 }
 
-/**
- * stmmac_display_ring - display ring
- * @head: pointer to the head of the ring passed.
- * @size: size of the ring.
- * @extend_desc: to verify if extended descriptors are used.
- * Description: display the control/status and buffer descriptors.
- */
-static void stmmac_display_ring(void *head, int size, int extend_desc)
-{
-   int i;
-   struct dma_extended_desc *ep = (struct dma_extended_desc *)head;
-   struct dma_desc *p = (struct dma_desc *)head;
-
-   for (i = 0; i < size; i++) {
-   u64 x;
-   if (extend_desc) {
-   x = *(u64 *) ep;
-   pr_info("%d [0x%x]: 0x%x 0x%x 0x%x 0x%x\n",
-   i, (unsigned int)virt_to_phys(ep),
-   (unsigned int)x, (unsigned int)(x >> 32

[RESEND PATCH net-next 07/13] stmmac: add GMAC4 core support

[Alexandre TORGUE]

This is the initial support for GMAC4 that includes
the main callbacks to setup the core module: including
Csum, basic filtering, mac address and interrupt (MMC,
MTL, PMT) No LPI added.

Signed-off-by: Alexandre TORGUE <alexandre.tor...@st.com>
Signed-off-by: Giuseppe Cavallaro <peppe.cavall...@st.com>

diff --git a/drivers/net/ethernet/stmicro/stmmac/Makefile 
b/drivers/net/ethernet/stmicro/stmmac/Makefile
index 9398ace..0fb362d 100644
--- a/drivers/net/ethernet/stmicro/stmmac/Makefile
+++ b/drivers/net/ethernet/stmicro/stmmac/Makefile
@@ -3,7 +3,7 @@ stmmac-objs:= stmmac_main.o stmmac_ethtool.o stmmac_mdio.o 
ring_mode.o  \
  chain_mode.o dwmac_lib.o dwmac1000_core.o dwmac1000_dma.o \
  dwmac100_core.o dwmac100_dma.o enh_desc.o norm_desc.o \
  mmc_core.o stmmac_hwtstamp.o stmmac_ptp.o dwmac4_descs.o  \
- dwmac4_dma.o dwmac4_lib.o $(stmmac-y)
+ dwmac4_dma.o dwmac4_lib.o dwmac4_core.o $(stmmac-y)
 
 # Ordering matters. Generic driver must be last.
 obj-$(CONFIG_STMMAC_PLATFORM)  += stmmac-platform.o
diff --git a/drivers/net/ethernet/stmicro/stmmac/common.h 
b/drivers/net/ethernet/stmicro/stmmac/common.h
index 2a5126e..eabe86b 100644
--- a/drivers/net/ethernet/stmicro/stmmac/common.h
+++ b/drivers/net/ethernet/stmicro/stmmac/common.h
@@ -527,15 +527,21 @@ struct mac_device_info *dwmac1000_setup(void __iomem 
*ioaddr, int mcbins,
int perfect_uc_entries,
int *synopsys_id);
 struct mac_device_info *dwmac100_setup(void __iomem *ioaddr, int *synopsys_id);
-
+struct mac_device_info *dwmac4_setup(void __iomem *ioaddr, int mcbins,
+int perfect_uc_entries, int *synopsys_id);
 
 void stmmac_set_mac_addr(void __iomem *ioaddr, u8 addr[6],
 unsigned int high, unsigned int low);
 void stmmac_get_mac_addr(void __iomem *ioaddr, unsigned char *addr,
 unsigned int high, unsigned int low);
-
 void stmmac_set_mac(void __iomem *ioaddr, bool enable);
 
+void stmmac_dwmac4_set_mac_addr(void __iomem *ioaddr, u8 addr[6],
+   unsigned int high, unsigned int low);
+void stmmac_dwmac4_get_mac_addr(void __iomem *ioaddr, unsigned char *addr,
+   unsigned int high, unsigned int low);
+void stmmac_dwmac4_set_mac(void __iomem *ioaddr, bool enable);
+
 void dwmac_dma_flush_tx_fifo(void __iomem *ioaddr);
 extern const struct stmmac_mode_ops ring_mode_ops;
 extern const struct stmmac_mode_ops chain_mode_ops;
diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac4.h 
b/drivers/net/ethernet/stmicro/stmmac/dwmac4.h
index c12f15c..bc50952 100644
--- a/drivers/net/ethernet/stmicro/stmmac/dwmac4.h
+++ b/drivers/net/ethernet/stmicro/stmmac/dwmac4.h
@@ -221,4 +221,35 @@ enum power_event {
 /* To dump the core regs excluding  the Address Registers */
 #defineGMAC_REG_NUM132
 
+/*  MTL debug */
+#define MTL_DEBUG_TXSTSFSTSBIT(5)
+#define MTL_DEBUG_TXFSTS   BIT(4)
+#define MTL_DEBUG_TWCSTS   BIT(3)
+
+/* MTL debug: Tx FIFO Read Controller Status */
+#define MTL_DEBUG_TRCSTS_MASK  GENMASK(2, 1)
+#define MTL_DEBUG_TRCSTS_SHIFT 1
+#define MTL_DEBUG_TRCSTS_IDLE  0
+#define MTL_DEBUG_TRCSTS_READ  1
+#define MTL_DEBUG_TRCSTS_TXW   2
+#define MTL_DEBUG_TRCSTS_WRITE 3
+#define MTL_DEBUG_TXPAUSED BIT(0)
+
+/* MAC debug: GMII or MII Transmit Protocol Engine Status */
+#define MTL_DEBUG_RXFSTS_MASK  GENMASK(5, 4)
+#define MTL_DEBUG_RXFSTS_SHIFT 4
+#define MTL_DEBUG_RXFSTS_EMPTY 0
+#define MTL_DEBUG_RXFSTS_BT1
+#define MTL_DEBUG_RXFSTS_AT2
+#define MTL_DEBUG_RXFSTS_FULL  3
+#define MTL_DEBUG_RRCSTS_MASK  GENMASK(2, 1)
+#define MTL_DEBUG_RRCSTS_SHIFT 1
+#define MTL_DEBUG_RRCSTS_IDLE  0
+#define MTL_DEBUG_RRCSTS_RDATA 1
+#define MTL_DEBUG_RRCSTS_RSTAT 2
+#define MTL_DEBUG_RRCSTS_FLUSH 3
+#define MTL_DEBUG_RWCSTS   BIT(0)
+
+extern const struct stmmac_dma_ops dwmac4_dma_ops;
+extern const struct stmmac_dma_ops dwmac410_dma_ops;
 #endif /* __DWMAC4_H__ */
diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac4_core.c 
b/drivers/net/ethernet/stmicro/stmmac/dwmac4_core.c
new file mode 100644
index 000..4f7283d
--- /dev/null
+++ b/drivers/net/ethernet/stmicro/stmmac/dwmac4_core.c
@@ -0,0 +1,407 @@
+/*
+ * This is the driver for the GMAC on-chip Ethernet controller for ST SoCs.
+ * DWC Ether MAC version 4.00  has been used for developing this code.
+ *
+ * This only implements the mac core functions for this chip.
+ *
+ * Copyright (C) 2015  STMicroelectronics Ltd
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms and conditions of the GNU General Public License,
+ * version 2, as published by the Free Softwar

[RESEND PATCH net-next 00/13] Enhance stmmac driver to support GMAC4.x IP

[Alexandre TORGUE]

This is a subset of patch to enhance current stmmac driver to support
new GMAC4.x chips. New set of callbacks is defined to support this new
family: descriptors, dma, core.

One of main changes of GMAC 4.xx IP is descriptors management.
 -descriptors are only used in ring mode.
 -A descriptor is composed of 4 32bits registers (no more extended
  descriptors)
 -descriptor mechanism (Tx for example, but it is exactly the same for RX):
 -useful registers:
  -DMA_CH#_TxDesc_Ring_Len: length of transmit descriptor ring
  -DMA_CH#_TxDesc_List_Address: start address of the ring
  -DMA_CH#_TxDesc_Tail_Pointer: address of the last descriptor to send + 1.
  -DMA_CH#_TxDesc_Current_App_TxDesc: address of the current descriptor

 -The descriptor Tail Pointer register contains the pointer to the
  descriptor address (N). The base address and the current
  descriptor decide the address of the current descriptor that the
  DMA can process. The descriptors up to one location less than the
  one indicated by the descriptor tail pointer (N-1) are owned by
  the DMA. The DMA continues to process the descriptors until the
  following condition occurs:
  "current descriptor pointer == Descriptor Tail pointer"

  Then the DMA goes into suspend mode. The application must perform
  a write to descriptor tail pointer register and update the tail
  pointer to have the following condition and to start a new transfer:
  "current descriptor pointer < Descriptor tail pointer"

  The DMA automatically wraps around the base address when the end
  of ring is reached.
  
New features are available on IP:
 -TSO (TCP Segmentation Offload) for TX only
 -Split header: to have header and payload in 2 different buffers (not yet 
implemented)

Below some throughput figures obtained on some boxes:

iperf (mbps) 
--
   tcp udp
tx   rx   tx  rx  
 -
GMAC4.x 935  930  750 800 

Note: There is a change in 4.10a databook on bitfield mapping of 
DMA_CHANx_INTR_ENA register. 
This requires to have � diffrent set of callbacks between IP 4.00a and 4.10a.

Best regards

Alex

I'm resending this series because first sending was badly done during merge
window.

Alexandre TORGUE (13):
  stmmac: rework get_hw_feature function
  stmmac: rework the routines to show the ring status
  stmmac: rework synopsys id read, moved to dwmac setup
  stmmac: add descriptors function for GMAC 4.xx
  stmmac: add GMAC4 DMA/CORE Header File
  stmmac: add DMA support for GMAC 4.xx
  stmmac: add GMAC4 core support
  stmmac: enhance mmc counter management
  stmmac: add new DT platform entries for GMAC4
  stmmac: support new GMAC4
  Documentation: networking: update stmmac
  stmmac: update version to Jan_2016
  stmmac: update MAINTAINERS

 Documentation/devicetree/bindings/net/stmmac.txt   |   2 +
 Documentation/networking/stmmac.txt|  44 +-
 MAINTAINERS|   1 +
 drivers/net/ethernet/stmicro/stmmac/Makefile   |   3 +-
 drivers/net/ethernet/stmicro/stmmac/common.h   |  64 +-
 .../net/ethernet/stmicro/stmmac/dwmac1000_core.c   |   7 +-
 .../net/ethernet/stmicro/stmmac/dwmac1000_dma.c|  35 +-
 .../net/ethernet/stmicro/stmmac/dwmac100_core.c|   5 +-
 drivers/net/ethernet/stmicro/stmmac/dwmac4.h   | 255 
 drivers/net/ethernet/stmicro/stmmac/dwmac4_core.c  | 407 +
 drivers/net/ethernet/stmicro/stmmac/dwmac4_descs.c | 396 +
 drivers/net/ethernet/stmicro/stmmac/dwmac4_descs.h | 129 +
 drivers/net/ethernet/stmicro/stmmac/dwmac4_dma.c   | 354 
 drivers/net/ethernet/stmicro/stmmac/dwmac4_dma.h   | 202 +++
 drivers/net/ethernet/stmicro/stmmac/dwmac4_lib.c   | 225 +++
 drivers/net/ethernet/stmicro/stmmac/enh_desc.c |  21 +
 drivers/net/ethernet/stmicro/stmmac/mmc.h  |   4 +
 drivers/net/ethernet/stmicro/stmmac/mmc_core.c | 349 +--
 drivers/net/ethernet/stmicro/stmmac/norm_desc.c|  21 +
 drivers/net/ethernet/stmicro/stmmac/stmmac.h   |   7 +-
 .../net/ethernet/stmicro/stmmac/stmmac_ethtool.c   |   7 +-
 drivers/net/ethernet/stmicro/stmmac/stmmac_main.c  | 643 +++--
 .../net/ethernet/stmicro/stmmac/stmmac_platform.c  |   7 +
 include/linux/stmmac.h |   2 +
 24 files changed, 2821 insertions(+), 369 deletions(-)
 create mode 100644 drivers/net/ethernet/stmicro/stmmac/dwmac4.h
 create mode 100644 drivers/net/ethernet/stmicro/stmmac/dwmac4_core.c
 create mode 100644 drivers/net/ethernet/stmicro/stmmac/dwmac4_descs.c
 create mode 100644 drivers/net/ethernet/stmicro/stmmac/dwmac4_descs.h
 create mode 100644 drivers/net/ethernet/stmicro/stmmac/dwmac4_dma.c
 create mode 100644 drivers/net/ethernet/stmicro/stmmac/dwmac4_dma.h
 create mode 100644 drivers/net/ethernet/stmicro/stmmac/dwmac4_lib.c

-- 
1.9.1

[RESEND PATCH net-next 05/13] stmmac: add GMAC4 DMA/CORE Header File

[Alexandre TORGUE]

This is the main header file to define all the
macro used for GMAC4 DMA and CORE parts.

Signed-off-by: Alexandre TORGUE <alexandre.tor...@st.com>
Signed-off-by: Giuseppe Cavallaro <peppe.cavall...@st.com>

diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac4.h 
b/drivers/net/ethernet/stmicro/stmmac/dwmac4.h
new file mode 100644
index 000..c12f15c
--- /dev/null
+++ b/drivers/net/ethernet/stmicro/stmmac/dwmac4.h
@@ -0,0 +1,224 @@
+/*
+ * DWMAC4 Header file.
+ *
+ * Copyright (C) 2015  STMicroelectronics Ltd
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms and conditions of the GNU General Public License,
+ * version 2, as published by the Free Software Foundation.
+ *
+ * Author: Alexandre Torgue <alexandre.tor...@st.com>
+ */
+
+#ifndef __DWMAC4_H__
+#define __DWMAC4_H__
+
+#include "common.h"
+
+/*  MAC registers */
+#define GMAC_CONFIG0x
+#define GMAC_PACKET_FILTER 0x0008
+#define GMAC_HASH_TAB_0_31 0x0010
+#define GMAC_HASH_TAB_32_630x0014
+#define GMAC_RX_FLOW_CTRL  0x0090
+#define GMAC_QX_TX_FLOW_CTRL(x)(0x70 + x * 4)
+#define GMAC_INT_STATUS0x00b0
+#define GMAC_INT_EN0x00b4
+#define GMAC_AN_CTRL   0x00e0
+#define GMAC_AN_STATUS 0x00e4
+#define GMAC_AN_ADV0x00e8
+#define GMAC_AN_LPA0x00ec
+#define GMAC_PMT   0x00c0
+#define GMAC_VERSION   0x0110
+#define GMAC_DEBUG 0x0114
+#define GMAC_HW_FEATURE0   0x011c
+#define GMAC_HW_FEATURE1   0x0120
+#define GMAC_HW_FEATURE2   0x0124
+#define GMAC_MDIO_ADDR 0x0200
+#define GMAC_MDIO_DATA 0x0204
+#define GMAC_ADDR_HIGH(reg)(0x300 + reg * 8)
+#define GMAC_ADDR_LOW(reg) (0x304 + reg * 8)
+
+/* MAC Packet Filtering */
+#define GMAC_PACKET_FILTER_PR  BIT(0)
+#define GMAC_PACKET_FILTER_HMC BIT(2)
+#define GMAC_PACKET_FILTER_PM  BIT(4)
+
+#define GMAC_MAX_PERFECT_ADDRESSES 128
+
+/* MAC Flow Control RX */
+#define GMAC_RX_FLOW_CTRL_RFE  BIT(0)
+
+/* MAC Flow Control TX */
+#define GMAC_TX_FLOW_CTRL_TFE  BIT(1)
+#define GMAC_TX_FLOW_CTRL_PT_SHIFT 16
+
+/*  MAC Interrupt bitmap*/
+#define GMAC_INT_PMT_ENBIT(4)
+#define GMAC_INT_LPI_ENBIT(5)
+
+enum dwmac4_irq_status {
+   time_stamp_irq = 0x1000,
+   mmc_rx_csum_offload_irq = 0x0800,
+   mmc_tx_irq = 0x0400,
+   mmc_rx_irq = 0x0200,
+   mmc_irq = 0x0100,
+   pmt_irq = 0x0010,
+   pcs_ane_irq = 0x0004,
+   pcs_link_irq = 0x0002,
+};
+
+/* MAC Auto-Neg bitmap*/
+#defineGMAC_AN_CTRL_RANBIT(9)
+#defineGMAC_AN_CTRL_ANEBIT(12)
+#define GMAC_AN_CTRL_ELE   BIT(14)
+#define GMAC_AN_FD BIT(5)
+#define GMAC_AN_HD BIT(6)
+#define GMAC_AN_PSE_MASK   GENMASK(8, 7)
+#define GMAC_AN_PSE_SHIFT  7
+
+/* MAC PMT bitmap */
+enum power_event {
+   pointer_reset = 0x8000,
+   global_unicast = 0x0200,
+   wake_up_rx_frame = 0x0040,
+   magic_frame = 0x0020,
+   wake_up_frame_en = 0x0004,
+   magic_pkt_en = 0x0002,
+   power_down = 0x0001,
+};
+
+/* MAC Debug bitmap */
+#define GMAC_DEBUG_TFCSTS_MASK GENMASK(18, 17)
+#define GMAC_DEBUG_TFCSTS_SHIFT17
+#define GMAC_DEBUG_TFCSTS_IDLE 0
+#define GMAC_DEBUG_TFCSTS_WAIT 1
+#define GMAC_DEBUG_TFCSTS_GEN_PAUSE2
+#define GMAC_DEBUG_TFCSTS_XFER 3
+#define GMAC_DEBUG_TPESTS  BIT(16)
+#define GMAC_DEBUG_RFCFCSTS_MASK   GENMASK(2, 1)
+#define GMAC_DEBUG_RFCFCSTS_SHIFT  1
+#define GMAC_DEBUG_RPESTS  BIT(0)
+
+/* MAC config */
+#define GMAC_CONFIG_IPCBIT(27)
+#define GMAC_CONFIG_2K BIT(22)
+#define GMAC_CONFIG_ACSBIT(20)
+#define GMAC_CONFIG_BE BIT(18)
+#define GMAC_CONFIG_JD BIT(17)
+#define GMAC_CONFIG_JE BIT(16)
+#define GMAC_CONFIG_PS BIT(15)
+#define GMAC_CONFIG_FESBIT(14)
+#define GMAC_CONFIG_DM BIT(13)
+#define GMAC_CONFIG_DCRS   BIT(9)
+#define GMAC_CONFIG_TE BIT(1)
+#define GMAC_CONFIG_RE BIT(0)
+
+/* MAC HW features0 bitmap */
+#define GMAC_HW_FEAT_ADDMACBIT(18)
+#define GMAC_HW_FEAT_RXCOESEL  BIT(16)
+#define GMAC_HW_FEAT_TXCOSEL   BIT(14)
+#define GMAC_HW_FEAT_EEESELBIT(13)
+#define GMAC_HW_FEAT_TSSEL BIT(12)

[RESEND PATCH net-next 11/13] Documentation: networking: update stmmac

[Alexandre TORGUE]

Update stmmac driver documentation according to new GMAC 4.x family.

Signed-off-by: Alexandre TORGUE <alexandre.tor...@st.com>

diff --git a/Documentation/networking/stmmac.txt 
b/Documentation/networking/stmmac.txt
index d64a147..671fe3d 100644
--- a/Documentation/networking/stmmac.txt
+++ b/Documentation/networking/stmmac.txt
@@ -1,6 +1,6 @@
STMicroelectronics 10/100/1000 Synopsys Ethernet driver
 
-Copyright (C) 2007-2014  STMicroelectronics Ltd
+Copyright (C) 2007-2015  STMicroelectronics Ltd
 Author: Giuseppe Cavallaro <peppe.cavall...@st.com>
 
 This is the driver for the MAC 10/100/1000 on-chip Ethernet controllers
@@ -138,6 +138,8 @@ struct plat_stmmacenet_data {
int (*init)(struct platform_device *pdev, void *priv);
void (*exit)(struct platform_device *pdev, void *priv);
void *bsp_priv;
+   int has_gmac4;
+   bool tso_en;
 };
 
 Where:
@@ -181,6 +183,8 @@ Where:
 registers.  init/exit callbacks should not use or modify
 platform data.
  o bsp_priv: another private pointer.
+ o has_gmac4: uses GMAC4 core.
+ o tso_en: Enables TSO (TCP Segmentation Offload) feature.
 
 For MDIO bus The we have:
 
@@ -278,6 +282,13 @@ Please see the following document:
  o stmmac_ethtool.c: to implement the ethtool support;
  o stmmac.h: private driver structure;
  o common.h: common definitions and VFTs;
+ o mmc_core.c/mmc.h: Management MAC Counters;
+ o stmmac_hwtstamp.c: HW timestamp support for PTP;
+ o stmmac_ptp.c: PTP 1588 clock;
+ o dwmac-.c: these are for the platform glue-logic file; e.g. dwmac-sti.c
+   for STMicroelectronics SoCs.
+
+- GMAC 3.x
  o descs.h: descriptor structure definitions;
  o dwmac1000_core.c: dwmac GiGa core functions;
  o dwmac1000_dma.c: dma functions for the GMAC chip;
@@ -289,11 +300,32 @@ Please see the following document:
  o enh_desc.c: functions for handling enhanced descriptors;
  o norm_desc.c: functions for handling normal descriptors;
  o chain_mode.c/ring_mode.c:: functions to manage RING/CHAINED modes;
- o mmc_core.c/mmc.h: Management MAC Counters;
- o stmmac_hwtstamp.c: HW timestamp support for PTP;
- o stmmac_ptp.c: PTP 1588 clock;
- o dwmac-.c: these are for the platform glue-logic file; e.g. dwmac-sti.c
-   for STMicroelectronics SoCs.
+
+- GMAC4.x generation
+ o dwmac4_core.c: dwmac GMAC4.x core functions;
+ o dwmac4_desc.c: functions for handling GMAC4.x descriptors;
+ o dwmac4_descs.h: descriptor definitions;
+ o dwmac4_dma.c: dma functions for the GMAC4.x chip;
+ o dwmac4_dma.h: dma definitions for the GMAC4.x chip;
+ o dwmac4.h: core definitions for the GMAC4.x chip;
+ o dwmac4_lib.c: generic GMAC4.x functions;
+
+4.12) TSO support (GMAC4.x)
+
+TSO (Tcp Segmentation Offload) feature is supported by GMAC 4.x chip family.
+When a packet is sent through TCP protocol, the TCP stack ensures that
+the SKB provided to the low level driver (stmmac in our case) matches with
+the maximum frame len (IP header + TCP header + payload <= 1500 bytes (for
+MTU set to 1500)). It means that if an application using TCP want to send a
+packet which will have a length (after adding headers) > 1514 the packet
+will be split in several TCP packets: The data payload is split and headers
+(TCP/IP ..) are added. It is done by software.
+
+When TSO is enabled, the TCP stack doesn't care about the maximum frame
+length and provide SKB packet to stmmac as it is. The GMAC IP will have to
+perform the segmentation by it self to match with maximum frame length.
+
+This feature can be enabled in device tree through "snps,tso" entry.
 
 5) Debug Information
 
-- 
1.9.1

[RESEND PATCH net-next 04/13] stmmac: add descriptors function for GMAC 4.xx

[Alexandre TORGUE]

One of main changes of GMAC 4.xx IP is descriptors management.
-descriptors are only used in ring mode.
-A descriptor is composed of 4 32bits registers (no more extended
 descriptors)
-descriptor mechanism (Tx for example, but it is exactly the same for RX):
-useful registers:
-DMA_CH#_TxDesc_Ring_Len: length of transmit descriptor
   ring
-DMA_CH#_TxDesc_List_Address: start address of the ring
-DMA_CH#_TxDesc_Tail_Pointer: address of the last
  descriptor to send + 1.
-DMA_CH#_TxDesc_Current_App_TxDesc: address of the current
descriptor

-The descriptor Tail Pointer register contains the pointer to the
 descriptor address (N). The base address and the current
 descriptor decide the address of the current descriptor that the
 DMA can process. The descriptors up to one location less than the
 one indicated by the descriptor tail pointer (N-1) are owned by
 the DMA. The DMA continues to process the descriptors until the
 following condition occurs:
 "current descriptor pointer == Descriptor Tail pointer"

  Then the DMA goes into suspend mode. The application must perform
  a write to descriptor tail pointer register and update the tail
  pointer to have the following condition and to start a new
  transfer:
  "current descriptor pointer < Descriptor tail pointer"

  The DMA automatically wraps around the base address when the end
  of ring is reached.

-New features are available on IP:
-TSO (TCP Segmentation Offload) for TX only
-Split header: to have header and payload in 2 different buffers

Signed-off-by: Alexandre TORGUE <alexandre.tor...@st.com>
Signed-off-by: Giuseppe Cavallaro <peppe.cavall...@st.com>

diff --git a/drivers/net/ethernet/stmicro/stmmac/Makefile 
b/drivers/net/ethernet/stmicro/stmmac/Makefile
index b390161..fa000fd 100644
--- a/drivers/net/ethernet/stmicro/stmmac/Makefile
+++ b/drivers/net/ethernet/stmicro/stmmac/Makefile
@@ -2,7 +2,8 @@ obj-$(CONFIG_STMMAC_ETH) += stmmac.o
 stmmac-objs:= stmmac_main.o stmmac_ethtool.o stmmac_mdio.o ring_mode.o \
  chain_mode.o dwmac_lib.o dwmac1000_core.o dwmac1000_dma.o \
  dwmac100_core.o dwmac100_dma.o enh_desc.o norm_desc.o \
- mmc_core.o stmmac_hwtstamp.o stmmac_ptp.o $(stmmac-y)
+ mmc_core.o stmmac_hwtstamp.o stmmac_ptp.o dwmac4_descs.o  \
+ $(stmmac-y)
 
 # Ordering matters. Generic driver must be last.
 obj-$(CONFIG_STMMAC_PLATFORM)  += stmmac-platform.o
diff --git a/drivers/net/ethernet/stmicro/stmmac/common.h 
b/drivers/net/ethernet/stmicro/stmmac/common.h
index 66e132f..ea7eb0d 100644
--- a/drivers/net/ethernet/stmicro/stmmac/common.h
+++ b/drivers/net/ethernet/stmicro/stmmac/common.h
@@ -243,6 +243,7 @@ enum rx_frame_status {
csum_none = 0x2,
llc_snap = 0x4,
dma_own = 0x8,
+   rx_not_ls = 0x10,
 };
 
 /* Tx status */
@@ -348,6 +349,10 @@ struct stmmac_desc_ops {
void (*prepare_tx_desc) (struct dma_desc *p, int is_fs, int len,
 bool csum_flag, int mode, bool tx_own,
 bool ls);
+   void (*prepare_tso_tx_desc)(struct dma_desc *p, int is_fs, int len1,
+   int len2, bool tx_own, bool ls,
+   unsigned int tcphdrlen,
+   unsigned int tcppayloadlen);
/* Set/get the owner of the descriptor */
void (*set_tx_owner) (struct dma_desc *p);
int (*get_tx_owner) (struct dma_desc *p);
@@ -382,6 +387,8 @@ struct stmmac_desc_ops {
int (*get_rx_timestamp_status) (void *desc, u32 ats);
/* Display ring */
void (*display_ring)(void *head, unsigned int size, bool rx);
+   /* set MSS via context descriptor */
+   void (*set_mss)(struct dma_desc *p, unsigned int mss);
 };
 
 extern const struct stmmac_desc_ops enh_desc_ops;
diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac4_descs.c 
b/drivers/net/ethernet/stmicro/stmmac/dwmac4_descs.c
new file mode 100644
index 000..d4952c7
--- /dev/null
+++ b/drivers/net/ethernet/stmicro/stmmac/dwmac4_descs.c
@@ -0,0 +1,396 @@
+/*
+ * This contains the functions to handle the descriptors for DesignWare 
databook
+ * 4.xx.
+ *
+ * Copyright (C) 2015  STMicroelectronics Ltd
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms and conditions of the GNU General Public License,
+ * version 2, as published by the Free Software Foundation.
+ *
+ * Author: Alexandre Torgue <alexandre.tor...@st.com>
+ */
+
+#include 
+#include "common.h"
+#include "dwmac4_descs.h"
+
+static int dwmac4_wrback_get_tx_status(void *data, struct stmmac_extra_stats 
*x,
+  struct dma_desc *p,
+  void __iomem

[RESEND PATCH net-next 01/13] stmmac: rework get_hw_feature function

[Alexandre TORGUE]

On next GMAC IP generation (4.xx), the way to get hw feature
is not the same than on previous 3.xx. As it is hardware
dependent, the way to get hw capabilities should be defined in dma ops of
each MAC IP. It will avoid also a huge computation of hw capabilities in
stmmac_main.

Signed-off-by: Alexandre TORGUE <alexandre.tor...@st.com>
Signed-off-by: Giuseppe Cavallaro <peppe.cavall...@st.com>

diff --git a/drivers/net/ethernet/stmicro/stmmac/common.h 
b/drivers/net/ethernet/stmicro/stmmac/common.h
index f96d257..797a913 100644
--- a/drivers/net/ethernet/stmicro/stmmac/common.h
+++ b/drivers/net/ethernet/stmicro/stmmac/common.h
@@ -412,7 +412,8 @@ struct stmmac_dma_ops {
int (*dma_interrupt) (void __iomem *ioaddr,
  struct stmmac_extra_stats *x);
/* If supported then get the optional core features */
-   unsigned int (*get_hw_feature) (void __iomem *ioaddr);
+   void (*get_hw_feature)(void __iomem *ioaddr,
+  struct dma_features *dma_cap);
/* Program the HW RX Watchdog */
void (*rx_watchdog) (void __iomem *ioaddr, u32 riwt);
 };
diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac1000_dma.c 
b/drivers/net/ethernet/stmicro/stmmac/dwmac1000_dma.c
index da32d60..99074695 100644
--- a/drivers/net/ethernet/stmicro/stmmac/dwmac1000_dma.c
+++ b/drivers/net/ethernet/stmicro/stmmac/dwmac1000_dma.c
@@ -215,9 +215,40 @@ static void dwmac1000_dump_dma_regs(void __iomem *ioaddr)
}
 }
 
-static unsigned int dwmac1000_get_hw_feature(void __iomem *ioaddr)
+static void dwmac1000_get_hw_feature(void __iomem *ioaddr,
+struct dma_features *dma_cap)
 {
-   return readl(ioaddr + DMA_HW_FEATURE);
+   u32 hw_cap = readl(ioaddr + DMA_HW_FEATURE);
+
+   dma_cap->mbps_10_100 = (hw_cap & DMA_HW_FEAT_MIISEL);
+   dma_cap->mbps_1000 = (hw_cap & DMA_HW_FEAT_GMIISEL) >> 1;
+   dma_cap->half_duplex = (hw_cap & DMA_HW_FEAT_HDSEL) >> 2;
+   dma_cap->hash_filter = (hw_cap & DMA_HW_FEAT_HASHSEL) >> 4;
+   dma_cap->multi_addr = (hw_cap & DMA_HW_FEAT_ADDMAC) >> 5;
+   dma_cap->pcs = (hw_cap & DMA_HW_FEAT_PCSSEL) >> 6;
+   dma_cap->sma_mdio = (hw_cap & DMA_HW_FEAT_SMASEL) >> 8;
+   dma_cap->pmt_remote_wake_up = (hw_cap & DMA_HW_FEAT_RWKSEL) >> 9;
+   dma_cap->pmt_magic_frame = (hw_cap & DMA_HW_FEAT_MGKSEL) >> 10;
+   /* MMC */
+   dma_cap->rmon = (hw_cap & DMA_HW_FEAT_MMCSEL) >> 11;
+   /* IEEE 1588-2002 */
+   dma_cap->time_stamp =
+   (hw_cap & DMA_HW_FEAT_TSVER1SEL) >> 12;
+   /* IEEE 1588-2008 */
+   dma_cap->atime_stamp = (hw_cap & DMA_HW_FEAT_TSVER2SEL) >> 13;
+   /* 802.3az - Energy-Efficient Ethernet (EEE) */
+   dma_cap->eee = (hw_cap & DMA_HW_FEAT_EEESEL) >> 14;
+   dma_cap->av = (hw_cap & DMA_HW_FEAT_AVSEL) >> 15;
+   /* TX and RX csum */
+   dma_cap->tx_coe = (hw_cap & DMA_HW_FEAT_TXCOESEL) >> 16;
+   dma_cap->rx_coe_type1 = (hw_cap & DMA_HW_FEAT_RXTYP1COE) >> 17;
+   dma_cap->rx_coe_type2 = (hw_cap & DMA_HW_FEAT_RXTYP2COE) >> 18;
+   dma_cap->rxfifo_over_2048 = (hw_cap & DMA_HW_FEAT_RXFIFOSIZE) >> 19;
+   /* TX and RX number of channels */
+   dma_cap->number_rx_channel = (hw_cap & DMA_HW_FEAT_RXCHCNT) >> 20;
+   dma_cap->number_tx_channel = (hw_cap & DMA_HW_FEAT_TXCHCNT) >> 22;
+   /* Alternate (enhanced) DESC mode */
+   dma_cap->enh_desc = (hw_cap & DMA_HW_FEAT_ENHDESSEL) >> 24;
 }
 
 static void dwmac1000_rx_watchdog(void __iomem *ioaddr, u32 riwt)
diff --git a/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c 
b/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c
index 4c5ce98..d3ebfea 100644
--- a/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c
+++ b/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c
@@ -1558,51 +1558,15 @@ static void stmmac_selec_desc_mode(struct stmmac_priv 
*priv)
  */
 static int stmmac_get_hw_features(struct stmmac_priv *priv)
 {
-   u32 hw_cap = 0;
+   u32 ret = 0;
 
if (priv->hw->dma->get_hw_feature) {
-   hw_cap = priv->hw->dma->get_hw_feature(priv->ioaddr);
-
-   priv->dma_cap.mbps_10_100 = (hw_cap & DMA_HW_FEAT_MIISEL);
-   priv->dma_cap.mbps_1000 = (hw_cap & DMA_HW_FEAT_GMIISEL) >> 1;
-   priv->dma_cap.half_duplex = (hw_cap & DMA_HW_FEAT_HDSEL) >> 2;
-   priv->dma_cap.hash_filter = (hw_cap & DMA_HW_FEAT_HASHSEL) >> 4;
-   priv->dma_cap.multi_addr = (hw_cap & DMA_HW_FEAT_ADDMAC) >> 5;
-   priv->dma_cap.pcs = (hw_cap & DMA_HW_FEAT_PCSSEL) >> 6;
-  

Re: [PATCH 00/13] Enhance stmmac driver to support GMAC4.x IP

[Alexandre Torgue]

Hi,

On 03/25/2016 04:11 PM, David Miller wrote:


It is absolutely not appropriate to submit new feature patches
at this time.

Please resubmit this after the net-next tree opens back out.



No pb, I will wait and resend.

Regards

Alex



Thank you.

[PATCH 13/13] stmmac: update MAINTAINERS

[Alexandre TORGUE]

Signed-off-by: Alexandre TORGUE <alexandre.tor...@st.com>

diff --git a/MAINTAINERS b/MAINTAINERS
index b70294e..394e233 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -3293,6 +3293,7 @@ F:Documentation/powerpc/cxlflash.txt
 
 STMMAC ETHERNET DRIVER
 M: Giuseppe Cavallaro <peppe.cavall...@st.com>
+M:     Alexandre Torgue <alexandre.tor...@st.com>
 L: netdev@vger.kernel.org
 W: http://www.stlinux.com
 S: Supported
-- 
1.9.1

[PATCH 02/13] stmmac: rework the routines to show the ring status

[Alexandre TORGUE]

To avoid lot of check in stmmac_main for display ring management
and support the GMAC4 chip, the display_ring function is moved
into dedicated descriptor file.

Signed-off-by: Alexandre TORGUE <alexandre.tor...@st.com>
Signed-off-by: Giuseppe Cavallaro <peppe.cavall...@st.com>

diff --git a/drivers/net/ethernet/stmicro/stmmac/common.h 
b/drivers/net/ethernet/stmicro/stmmac/common.h
index 797a913..6cea61b 100644
--- a/drivers/net/ethernet/stmicro/stmmac/common.h
+++ b/drivers/net/ethernet/stmicro/stmmac/common.h
@@ -380,6 +380,8 @@ struct stmmac_desc_ops {
 u64(*get_timestamp) (void *desc, u32 ats);
/* get rx timestamp status */
int (*get_rx_timestamp_status) (void *desc, u32 ats);
+   /* Display ring */
+   void (*display_ring)(void *head, unsigned int size, bool rx);
 };
 
 extern const struct stmmac_desc_ops enh_desc_ops;
diff --git a/drivers/net/ethernet/stmicro/stmmac/enh_desc.c 
b/drivers/net/ethernet/stmicro/stmmac/enh_desc.c
index cfb018c..3e1b249 100644
--- a/drivers/net/ethernet/stmicro/stmmac/enh_desc.c
+++ b/drivers/net/ethernet/stmicro/stmmac/enh_desc.c
@@ -411,6 +411,26 @@ static int enh_desc_get_rx_timestamp_status(void *desc, 
u32 ats)
}
 }
 
+static void enh_desc_display_ring(void *head, unsigned size, bool rx)
+{
+   struct dma_extended_desc *ep = (struct dma_extended_desc *)head;
+   int i;
+
+   pr_info("Extended %s descriptor ring:\n", rx ? "RX" : "TX");
+
+   for (i = 0; i < size; i++) {
+   u64 x;
+
+   x = *(u64 *)ep;
+   pr_info("%d [0x%x]: 0x%x 0x%x 0x%x 0x%x\n",
+   i, (unsigned int)virt_to_phys(ep),
+   (unsigned int)x, (unsigned int)(x >> 32),
+   ep->basic.des2, ep->basic.des3);
+   ep++;
+   }
+   pr_info("\n");
+}
+
 const struct stmmac_desc_ops enh_desc_ops = {
.tx_status = enh_desc_get_tx_status,
.rx_status = enh_desc_get_rx_status,
@@ -430,4 +450,5 @@ const struct stmmac_desc_ops enh_desc_ops = {
.get_tx_timestamp_status = enh_desc_get_tx_timestamp_status,
.get_timestamp = enh_desc_get_timestamp,
.get_rx_timestamp_status = enh_desc_get_rx_timestamp_status,
+   .display_ring = enh_desc_display_ring,
 };
diff --git a/drivers/net/ethernet/stmicro/stmmac/norm_desc.c 
b/drivers/net/ethernet/stmicro/stmmac/norm_desc.c
index e13228f..d93323d 100644
--- a/drivers/net/ethernet/stmicro/stmmac/norm_desc.c
+++ b/drivers/net/ethernet/stmicro/stmmac/norm_desc.c
@@ -279,6 +279,26 @@ static int ndesc_get_rx_timestamp_status(void *desc, u32 
ats)
return 1;
 }
 
+static void ndesc_display_ring(void *head, unsigned size, bool rx)
+{
+   struct dma_desc *p = (struct dma_desc *)head;
+   int i;
+
+   pr_info("%s descriptor ring:\n", rx ? "RX" : "TX");
+
+   for (i = 0; i < size; i++) {
+   u64 x;
+
+   x = *(u64 *)p;
+   pr_info("%d [0x%x]: 0x%x 0x%x 0x%x 0x%x",
+   i, (unsigned int)virt_to_phys(p),
+   (unsigned int)x, (unsigned int)(x >> 32),
+   p->des2, p->des3);
+   p++;
+   }
+   pr_info("\n");
+}
+
 const struct stmmac_desc_ops ndesc_ops = {
.tx_status = ndesc_get_tx_status,
.rx_status = ndesc_get_rx_status,
@@ -297,4 +317,5 @@ const struct stmmac_desc_ops ndesc_ops = {
.get_tx_timestamp_status = ndesc_get_tx_timestamp_status,
.get_timestamp = ndesc_get_timestamp,
.get_rx_timestamp_status = ndesc_get_rx_timestamp_status,
+   .display_ring = ndesc_display_ring,
 };
diff --git a/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c 
b/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c
index d3ebfea..8103527 100644
--- a/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c
+++ b/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c
@@ -883,53 +883,22 @@ static int stmmac_init_phy(struct net_device *dev)
return 0;
 }
 
-/**
- * stmmac_display_ring - display ring
- * @head: pointer to the head of the ring passed.
- * @size: size of the ring.
- * @extend_desc: to verify if extended descriptors are used.
- * Description: display the control/status and buffer descriptors.
- */
-static void stmmac_display_ring(void *head, int size, int extend_desc)
-{
-   int i;
-   struct dma_extended_desc *ep = (struct dma_extended_desc *)head;
-   struct dma_desc *p = (struct dma_desc *)head;
-
-   for (i = 0; i < size; i++) {
-   u64 x;
-   if (extend_desc) {
-   x = *(u64 *) ep;
-   pr_info("%d [0x%x]: 0x%x 0x%x 0x%x 0x%x\n",
-   i, (unsigned int)virt_to_phys(ep),
-   (unsigned int)x, (unsigned int)(x >> 32

[PATCH 06/13] stmmac: add DMA support for GMAC 4.xx

[Alexandre TORGUE]

DMA behavior is linked to descriptor management:

-descriptor mechanism (Tx for example, but it is exactly the same for RX):
-useful registers:
-DMA_CH#_TxDesc_Ring_Len: length of transmit descriptor ring
-DMA_CH#_TxDesc_List_Address: start address of the ring
-DMA_CH#_TxDesc_Tail_Pointer: address of the last
  descriptor to send + 1.
-DMA_CH#_TxDesc_Current_App_TxDesc: address of the current
descriptor

-The descriptor Tail Pointer register contains the pointer to the
 descriptor address (N). The base address and the current
 descriptor decide the address of the current descriptor that the
 DMA can process. The descriptors up to one location less than the
 one indicated by the descriptor tail pointer (N-1) are owned by
 the DMA. The DMA continues to process the descriptors until the
 following condition occurs:
 "current descriptor pointer == Descriptor Tail pointer"

Then the DMA goes into suspend mode. The application must perform
a write to descriptor tail pointer register and update the tail
pointer to have the following condition and to start a new transfer:
"current descriptor pointer < Descriptor tail pointer"

The DMA automatically wraps around the base address when the end
of ring is reached.

Up to 8 DMA could be use but currently we only use one (channel0)

Signed-off-by: Alexandre TORGUE <alexandre.tor...@st.com>
Signed-off-by: Giuseppe Cavallaro <peppe.cavall...@st.com>

diff --git a/drivers/net/ethernet/stmicro/stmmac/Makefile 
b/drivers/net/ethernet/stmicro/stmmac/Makefile
index fa000fd..9398ace 100644
--- a/drivers/net/ethernet/stmicro/stmmac/Makefile
+++ b/drivers/net/ethernet/stmicro/stmmac/Makefile
@@ -3,7 +3,7 @@ stmmac-objs:= stmmac_main.o stmmac_ethtool.o stmmac_mdio.o 
ring_mode.o  \
  chain_mode.o dwmac_lib.o dwmac1000_core.o dwmac1000_dma.o \
  dwmac100_core.o dwmac100_dma.o enh_desc.o norm_desc.o \
  mmc_core.o stmmac_hwtstamp.o stmmac_ptp.o dwmac4_descs.o  \
- $(stmmac-y)
+ dwmac4_dma.o dwmac4_lib.o $(stmmac-y)
 
 # Ordering matters. Generic driver must be last.
 obj-$(CONFIG_STMMAC_PLATFORM)  += stmmac-platform.o
diff --git a/drivers/net/ethernet/stmicro/stmmac/common.h 
b/drivers/net/ethernet/stmicro/stmmac/common.h
index ea7eb0d..2a5126e 100644
--- a/drivers/net/ethernet/stmicro/stmmac/common.h
+++ b/drivers/net/ethernet/stmicro/stmmac/common.h
@@ -41,6 +41,8 @@
 /* Synopsys Core versions */
 #defineDWMAC_CORE_3_40 0x34
 #defineDWMAC_CORE_3_50 0x35
+#defineDWMAC_CORE_4_00 0x40
+#define STMMAC_CHAN0   0   /* Always supported and default for all chips */
 
 #define DMA_TX_SIZE 512
 #define DMA_RX_SIZE 512
@@ -270,6 +272,7 @@ enum dma_irq_status {
 #defineCORE_PCS_ANE_COMPLETE   (1 << 5)
 #defineCORE_PCS_LINK_STATUS(1 << 6)
 #defineCORE_RGMII_IRQ  (1 << 7)
+#define CORE_IRQ_MTL_RX_OVERFLOW   BIT(8)
 
 /* Physical Coding Sublayer */
 struct rgmii_adv {
@@ -301,8 +304,10 @@ struct dma_features {
/* 802.3az - Energy-Efficient Ethernet (EEE) */
unsigned int eee;
unsigned int av;
+   unsigned int tsoen;
/* TX and RX csum */
unsigned int tx_coe;
+   unsigned int rx_coe;
unsigned int rx_coe_type1;
unsigned int rx_coe_type2;
unsigned int rxfifo_over_2048;
@@ -425,6 +430,11 @@ struct stmmac_dma_ops {
   struct dma_features *dma_cap);
/* Program the HW RX Watchdog */
void (*rx_watchdog) (void __iomem *ioaddr, u32 riwt);
+   void (*set_tx_ring_len)(void __iomem *ioaddr, u32 len);
+   void (*set_rx_ring_len)(void __iomem *ioaddr, u32 len);
+   void (*set_rx_tail_ptr)(void __iomem *ioaddr, u32 tail_ptr, u32 chan);
+   void (*set_tx_tail_ptr)(void __iomem *ioaddr, u32 tail_ptr, u32 chan);
+   void (*enable_tso)(void __iomem *ioaddr, bool en, u32 chan);
 };
 
 struct mac_device_info;
@@ -473,6 +483,7 @@ struct stmmac_hwtimestamp {
 };
 
 extern const struct stmmac_hwtimestamp stmmac_ptp;
+extern const struct stmmac_mode_ops dwmac4_ring_mode_ops;
 
 struct mac_link {
int port;
diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac4_dma.c 
b/drivers/net/ethernet/stmicro/stmmac/dwmac4_dma.c
new file mode 100644
index 000..116151c
--- /dev/null
+++ b/drivers/net/ethernet/stmicro/stmmac/dwmac4_dma.c
@@ -0,0 +1,354 @@
+/*
+ * This is the driver for the GMAC on-chip Ethernet controller for ST SoCs.
+ * DWC Ether MAC version 4.xx  has been used for  developing this code.
+ *
+ * This contains the functions to handle the dma.
+ *
+ * Copyright (C) 2015  STMicroelectronics Ltd
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms and conditions of the GNU General Public License,
+ * ve

[PATCH 08/13] stmmac: enhance mmc counter management

[Alexandre TORGUE]

For gmac3, the MMC addr map is: 0x100 - 0x2fc
For gmac4, the MMC addr map is: 0x700 - 0x8fc

So instead of adding 0x600 to the IO address when setup the mmc,
the RMON base address is saved inside the private structure and
then used to manage the counters.

Signed-off-by: Giuseppe Cavallaro <peppe.cavall...@st.com>
Signed-off-by: Alexandre TORGUE <alexandre.tor...@st.com>

diff --git a/drivers/net/ethernet/stmicro/stmmac/mmc.h 
b/drivers/net/ethernet/stmicro/stmmac/mmc.h
index 192c249..38a1a56 100644
--- a/drivers/net/ethernet/stmicro/stmmac/mmc.h
+++ b/drivers/net/ethernet/stmicro/stmmac/mmc.h
@@ -35,6 +35,10 @@
 * current value.*/
 #define MMC_CNTRL_PRESET   0x10
 #define MMC_CNTRL_FULL_HALF_PRESET 0x20
+
+#define MMC_GMAC4_OFFSET   0x700
+#define MMC_GMAC3_X_OFFSET 0x100
+
 struct stmmac_counters {
unsigned int mmc_tx_octetcount_gb;
unsigned int mmc_tx_framecount_gb;
diff --git a/drivers/net/ethernet/stmicro/stmmac/mmc_core.c 
b/drivers/net/ethernet/stmicro/stmmac/mmc_core.c
index 3f20bb1..ce9aa79 100644
--- a/drivers/net/ethernet/stmicro/stmmac/mmc_core.c
+++ b/drivers/net/ethernet/stmicro/stmmac/mmc_core.c
@@ -28,12 +28,12 @@
 
 /* MAC Management Counters register offset */
 
-#define MMC_CNTRL  0x0100  /* MMC Control */
-#define MMC_RX_INTR0x0104  /* MMC RX Interrupt */
-#define MMC_TX_INTR0x0108  /* MMC TX Interrupt */
-#define MMC_RX_INTR_MASK   0x010c  /* MMC Interrupt Mask */
-#define MMC_TX_INTR_MASK   0x0110  /* MMC Interrupt Mask */
-#define MMC_DEFAULT_MASK   0x
+#define MMC_CNTRL  0x00/* MMC Control */
+#define MMC_RX_INTR0x04/* MMC RX Interrupt */
+#define MMC_TX_INTR0x08/* MMC TX Interrupt */
+#define MMC_RX_INTR_MASK   0x0c/* MMC Interrupt Mask */
+#define MMC_TX_INTR_MASK   0x10/* MMC Interrupt Mask */
+#define MMC_DEFAULT_MASK   0x
 
 /* MMC TX counter registers */
 
@@ -41,115 +41,115 @@
  * _GB register stands for good and bad frames
  * _G is for good only.
  */
-#define MMC_TX_OCTETCOUNT_GB   0x0114
-#define MMC_TX_FRAMECOUNT_GB   0x0118
-#define MMC_TX_BROADCASTFRAME_G0x011c
-#define MMC_TX_MULTICASTFRAME_G0x0120
-#define MMC_TX_64_OCTETS_GB0x0124
-#define MMC_TX_65_TO_127_OCTETS_GB 0x0128
-#define MMC_TX_128_TO_255_OCTETS_GB0x012c
-#define MMC_TX_256_TO_511_OCTETS_GB0x0130
-#define MMC_TX_512_TO_1023_OCTETS_GB   0x0134
-#define MMC_TX_1024_TO_MAX_OCTETS_GB   0x0138
-#define MMC_TX_UNICAST_GB  0x013c
-#define MMC_TX_MULTICAST_GB0x0140
-#define MMC_TX_BROADCAST_GB0x0144
-#define MMC_TX_UNDERFLOW_ERROR 0x0148
-#define MMC_TX_SINGLECOL_G 0x014c
-#define MMC_TX_MULTICOL_G  0x0150
-#define MMC_TX_DEFERRED0x0154
-#define MMC_TX_LATECOL 0x0158
-#define MMC_TX_EXESSCOL0x015c
-#define MMC_TX_CARRIER_ERROR   0x0160
-#define MMC_TX_OCTETCOUNT_G0x0164
-#define MMC_TX_FRAMECOUNT_G0x0168
-#define MMC_TX_EXCESSDEF   0x016c
-#define MMC_TX_PAUSE_FRAME 0x0170
-#define MMC_TX_VLAN_FRAME_G0x0174
+#define MMC_TX_OCTETCOUNT_GB   0x14
+#define MMC_TX_FRAMECOUNT_GB   0x18
+#define MMC_TX_BROADCASTFRAME_G0x1c
+#define MMC_TX_MULTICASTFRAME_G0x20
+#define MMC_TX_64_OCTETS_GB0x24
+#define MMC_TX_65_TO_127_OCTETS_GB 0x28
+#define MMC_TX_128_TO_255_OCTETS_GB0x2c
+#define MMC_TX_256_TO_511_OCTETS_GB0x30
+#define MMC_TX_512_TO_1023_OCTETS_GB   0x34
+#define MMC_TX_1024_TO_MAX_OCTETS_GB   0x38
+#define MMC_TX_UNICAST_GB  0x3c
+#define MMC_TX_MULTICAST_GB0x40
+#define MMC_TX_BROADCAST_GB0x44
+#define MMC_TX_UNDERFLOW_ERROR 0x48
+#define MMC_TX_SINGLECOL_G 0x4c
+#define MMC_TX_MULTICOL_G  0x50
+#define MMC_TX_DEFERRED0x54
+#define MMC_TX_LATECOL 0x58
+#define MMC_TX_EXESSCOL0x5c
+#define MMC_TX_CARRIER_ERROR   0x60
+#define MMC_TX_OCTETCOUNT_G0x64
+#define MMC_TX_FRAMECOUNT_G0x68
+#define MMC_TX_EXCESSDEF   0x6c
+#define MMC_TX_PAUSE_FRAME 0x70
+#define MMC_TX_VLAN_FRAME_G0x74
 
 /* MMC RX counter registers */
-#define MMC_RX_FRAMECOUNT_GB   0x0180
-#define MMC_RX_OCTETCOUNT_GB   0x0184
-#define MMC_RX_OCTETCOUNT_G0x0188
-#define MMC_RX_BROADCASTFRAME_G0x018c
-#define MMC_RX_MULTICASTFRAME_G0x0190
-#define MMC_

[PATCH 10/13] stmmac: support new GMAC4

[Alexandre TORGUE]

This patch adds the whole GMAC4 support inside the
stmmac d.d. now able to use the new HW and some new features
i.e.: TSO.
It is missing the multi-queue and split Header support at this
stage.
This patch also updates the driver version and the stmmac.txt.

Signed-off-by: Alexandre TORGUE <alexandre.tor...@st.com>
Signed-off-by: Giuseppe Cavallaro <peppe.cavall...@st.com>

diff --git a/drivers/net/ethernet/stmicro/stmmac/common.h 
b/drivers/net/ethernet/stmicro/stmmac/common.h
index eabe86b..fc60368 100644
--- a/drivers/net/ethernet/stmicro/stmmac/common.h
+++ b/drivers/net/ethernet/stmicro/stmmac/common.h
@@ -169,6 +169,9 @@ struct stmmac_extra_stats {
unsigned long mtl_rx_fifo_ctrl_active;
unsigned long mac_rx_frame_ctrl_fifo;
unsigned long mac_gmii_rx_proto_engine;
+   /* TSO */
+   unsigned long tx_tso_frames;
+   unsigned long tx_tso_nfrags;
 };
 
 /* CSR Frequency Access Defines*/
@@ -545,6 +548,7 @@ void stmmac_dwmac4_set_mac(void __iomem *ioaddr, bool 
enable);
 void dwmac_dma_flush_tx_fifo(void __iomem *ioaddr);
 extern const struct stmmac_mode_ops ring_mode_ops;
 extern const struct stmmac_mode_ops chain_mode_ops;
+extern const struct stmmac_desc_ops dwmac4_desc_ops;
 
 /**
  * stmmac_get_synopsys_id - return the SYINID.
diff --git a/drivers/net/ethernet/stmicro/stmmac/stmmac.h 
b/drivers/net/ethernet/stmicro/stmmac/stmmac.h
index 26fb855..317ce35 100644
--- a/drivers/net/ethernet/stmicro/stmmac/stmmac.h
+++ b/drivers/net/ethernet/stmicro/stmmac/stmmac.h
@@ -24,7 +24,7 @@
 #define __STMMAC_H__
 
 #define STMMAC_RESOURCE_NAME   "stmmaceth"
-#define DRV_MODULE_VERSION "Oct_2015"
+#define DRV_MODULE_VERSION "Dec_2015"
 
 #include 
 #include 
@@ -67,6 +67,7 @@ struct stmmac_priv {
spinlock_t tx_lock;
bool tx_path_in_lpi_mode;
struct timer_list txtimer;
+   bool tso;
 
struct dma_desc *dma_rx cacheline_aligned_in_smp;
struct dma_extended_desc *dma_erx;
@@ -129,6 +130,9 @@ struct stmmac_priv {
int irq_wake;
spinlock_t ptp_lock;
void __iomem *mmcaddr;
+   u32 rx_tail_addr;
+   u32 tx_tail_addr;
+   u32 mss;
 
 #ifdef CONFIG_DEBUG_FS
struct dentry *dbgfs_dir;
diff --git a/drivers/net/ethernet/stmicro/stmmac/stmmac_ethtool.c 
b/drivers/net/ethernet/stmicro/stmmac/stmmac_ethtool.c
index fb2e7fc85..e2b98b0 100644
--- a/drivers/net/ethernet/stmicro/stmmac/stmmac_ethtool.c
+++ b/drivers/net/ethernet/stmicro/stmmac/stmmac_ethtool.c
@@ -161,6 +161,9 @@ static const struct stmmac_stats stmmac_gstrings_stats[] = {
STMMAC_STAT(mtl_rx_fifo_ctrl_active),
STMMAC_STAT(mac_rx_frame_ctrl_fifo),
STMMAC_STAT(mac_gmii_rx_proto_engine),
+   /* TSO */
+   STMMAC_STAT(tx_tso_frames),
+   STMMAC_STAT(tx_tso_nfrags),
 };
 #define STMMAC_STATS_LEN ARRAY_SIZE(stmmac_gstrings_stats)
 
@@ -499,7 +502,7 @@ static void stmmac_get_ethtool_stats(struct net_device *dev,
int i, j = 0;
 
/* Update the DMA HW counters for dwmac10/100 */
-   if (!priv->plat->has_gmac)
+   if (priv->hw->dma->dma_diagnostic_fr)
priv->hw->dma->dma_diagnostic_fr(>stats,
 (void *) >xstats,
 priv->ioaddr);
diff --git a/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c 
b/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c
index 977487a..cb21884 100644
--- a/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c
+++ b/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c
@@ -56,6 +56,7 @@
 #include "dwmac1000.h"
 
 #define STMMAC_ALIGN(x)L1_CACHE_ALIGN(x)
+#defineTSO_MAX_BUFF_SIZE   (SZ_16K - 1)
 
 /* Module parameters */
 #define TX_TIMEO   5000
@@ -726,13 +727,15 @@ static void stmmac_adjust_link(struct net_device *dev)
new_state = 1;
switch (phydev->speed) {
case 1000:
-   if (likely(priv->plat->has_gmac))
+   if (likely((priv->plat->has_gmac) ||
+  (priv->plat->has_gmac4)))
ctrl &= ~priv->hw->link.port;
stmmac_hw_fix_mac_speed(priv);
break;
case 100:
case 10:
-   if (priv->plat->has_gmac) {
+   if (likely((priv->plat->has_gmac) ||
+  (priv->plat->has_gmac4))) {
ctrl |= priv->hw->link.port;
if (phydev->speed == SPEED_100) {
ctrl |= priv->hw->link.speed;
@@ -977,7 +9

[PATCH 09/13] stmmac: add new DT platform entries for GMAC4

[Alexandre TORGUE]

This is to support the snps,dwmac-4.00 and snps,dwmac-4.10a
and related features on the platform driver.
See binding doc for further details.

Signed-off-by: Giuseppe Cavallaro <peppe.cavall...@st.com>
Signed-off-by: Alexandre TORGUE <alexandre.tor...@st.com>

diff --git a/Documentation/devicetree/bindings/net/stmmac.txt 
b/Documentation/devicetree/bindings/net/stmmac.txt
index 6605d19..4d302db 100644
--- a/Documentation/devicetree/bindings/net/stmmac.txt
+++ b/Documentation/devicetree/bindings/net/stmmac.txt
@@ -59,6 +59,8 @@ Optional properties:
- snps,fb: fixed-burst
- snps,mb: mixed-burst
- snps,rb: rebuild INCRx Burst
+   - snps,tso: this enables the TSO feature otherwise it will be managed by
+   MAC HW capability register.
 - mdio: with compatible = "snps,dwmac-mdio", create and register mdio bus.
 
 Examples:
diff --git a/drivers/net/ethernet/stmicro/stmmac/stmmac_platform.c 
b/drivers/net/ethernet/stmicro/stmmac/stmmac_platform.c
index dcbd2a1..6ca32f7 100644
--- a/drivers/net/ethernet/stmicro/stmmac/stmmac_platform.c
+++ b/drivers/net/ethernet/stmicro/stmmac/stmmac_platform.c
@@ -243,6 +243,13 @@ stmmac_probe_config_dt(struct platform_device *pdev, const 
char **mac)
plat->pmt = 1;
}
 
+   if (of_device_is_compatible(np, "snps,dwmac-4.00") ||
+   of_device_is_compatible(np, "snps,dwmac-4.10a")) {
+   plat->has_gmac4 = 1;
+   plat->pmt = 1;
+   plat->tso_en = of_property_read_bool(np, "snps,tso");
+   }
+
if (of_device_is_compatible(np, "snps,dwmac-3.610") ||
of_device_is_compatible(np, "snps,dwmac-3.710")) {
plat->enh_desc = 1;
diff --git a/include/linux/stmmac.h b/include/linux/stmmac.h
index 4bcf5a6..3aa1870 100644
--- a/include/linux/stmmac.h
+++ b/include/linux/stmmac.h
@@ -138,5 +138,7 @@ struct plat_stmmacenet_data {
void (*exit)(struct platform_device *pdev, void *priv);
void *bsp_priv;
struct stmmac_axi *axi;
+   int has_gmac4;
+   bool tso_en;
 };
 #endif
-- 
1.9.1