Re: [PATCH net-next 7/8] net: eth: altera: tse: add msgdma prefetcher
Hi Dalon,
Just a few comments/questions.
On 11/14/18 6:50 PM, Dalon Westergreen wrote:
From: Dalon Westergreen
Add support for the mSGDMA prefetcher. The prefetcher adds support
for a linked list of descriptors in system memory. The prefetcher
feeds these to the mSGDMA dispatcher.
The prefetcher is configured to poll for the next descriptor in the
list to be owned by hardware, then pass the descriptor to the
dispatcher. It will then poll the next descriptor until it is
owned by hardware.
The dispatcher responses are written back to the appropriate
descriptor, and the owned by hardware bit is cleared.
The driver sets up a linked list twice the tx and rx ring sizes,
with the last descriptor pointing back to the first. This ensures
that the ring of descriptors will always have inactive descriptors
preventing the prefetcher from looping over and reusing descriptors
inappropriately. The prefetcher will continuously loop over these
descriptors. The driver modifies descriptors as required to update
the skb address and length as well as the owned by hardware bit.
In addition to the above, the mSGDMA prefetcher can be used to
handle rx and tx timestamps coming from the ethernet ip. These
can be included in the prefetcher response in the descriptor.
Signed-off-by: Dalon Westergreen
---
drivers/net/ethernet/altera/Makefile | 2 +-
.../altera/altera_msgdma_prefetcher.c | 433 ++
.../altera/altera_msgdma_prefetcher.h | 30 ++
.../altera/altera_msgdmahw_prefetcher.h | 87
drivers/net/ethernet/altera/altera_tse.h | 14 +
drivers/net/ethernet/altera/altera_tse_main.c | 51 +++
6 files changed, 616 insertions(+), 1 deletion(-)
create mode 100644 drivers/net/ethernet/altera/altera_msgdma_prefetcher.c
create mode 100644 drivers/net/ethernet/altera/altera_msgdma_prefetcher.h
create mode 100644 drivers/net/ethernet/altera/altera_msgdmahw_prefetcher.h
diff --git a/drivers/net/ethernet/altera/Makefile
b/drivers/net/ethernet/altera/Makefile
index ad80be42fa26..73b32876f126 100644
--- a/drivers/net/ethernet/altera/Makefile
+++ b/drivers/net/ethernet/altera/Makefile
@@ -5,4 +5,4 @@
obj-$(CONFIG_ALTERA_TSE) += altera_tse.o
altera_tse-objs := altera_tse_main.o altera_tse_ethtool.o \
altera_msgdma.o altera_sgdma.o altera_utils.o \
- altera_ptp.o
+ altera_ptp.o altera_msgdma_prefetcher.o
diff --git a/drivers/net/ethernet/altera/altera_msgdma_prefetcher.c
b/drivers/net/ethernet/altera/altera_msgdma_prefetcher.c
new file mode 100644
index ..55b475e9e15b
--- /dev/null
+++ b/drivers/net/ethernet/altera/altera_msgdma_prefetcher.c
@@ -0,0 +1,433 @@
+// SPDX-License-Identifier: GPL-2.0
+/* MSGDMA Prefetcher driver for Altera ethernet devices
+ *
+ * Copyright (C) 2018 Intel Corporation. All rights reserved.
+ * Author(s):
+ * Dalon Westergreen
+ */
+
+#include
+#include
+#include
+#include "altera_utils.h"
+#include "altera_tse.h"
+#include "altera_msgdma.h"
+#include "altera_msgdmahw.h"
+#include "altera_msgdma_prefetcher.h"
+#include "altera_msgdmahw_prefetcher.h"
These could be alphabetized - tse and utils at the end.
+
+int msgdma_pref_initialize(struct altera_tse_private *priv)
+{
+ int i;
+ struct msgdma_pref_extended_desc *rx_descs;
+ struct msgdma_pref_extended_desc *tx_descs;
+ dma_addr_t rx_descsphys;
+ dma_addr_t tx_descsphys;
+ u32 rx_ring_size;
+ u32 tx_ring_size;
+
+ priv->pref_rxdescphys = (dma_addr_t)0;
+ priv->pref_txdescphys = (dma_addr_t)0;
+
+ /* we need to allocate more pref descriptors than ringsize, for now
+* just double ringsize
+*/
+ rx_ring_size = priv->rx_ring_size * 2;
+ tx_ring_size = priv->tx_ring_size * 2;
+
+ /* The prefetcher requires the descriptors to be aligned to the
+* descriptor read/write master's data width which worst case is
+* 512 bits. Currently we DO NOT CHECK THIS and only support 32-bit
+* prefetcher masters.
+*/
+
+ /* allocate memory for rx descriptors */
+ priv->pref_rxdesc =
+ dma_zalloc_coherent(priv->device,
+ sizeof(struct msgdma_pref_extended_desc)
+ * rx_ring_size,
+ >pref_rxdescphys, GFP_KERNEL);
+
+ if (!priv->pref_rxdesc)
+ goto err_rx;
+
+ /* allocate memory for tx descriptors */
+ priv->pref_txdesc =
+ dma_zalloc_coherent(priv->device,
+ sizeof(struct msgdma_pref_extended_desc)
+ * tx_ring_size,
+ >pref_txdescphys, GFP_KERNEL);
+
+ if (!priv->pref_txdesc)
+ goto err_tx;
+
+ /* setup base descriptor ring for tx & rx */
+ rx_descs = (struct msgdma_pref_extended_desc
Re: [PATCH net-next 8/8] net: eth: altera: tse: update devicetree bindings documentation
+ Rob Herring, Mark Rutland and the Device Tree mailing list. On 11/14/18 6:50 PM, Dalon Westergreen wrote: From: Dalon Westergreen Update devicetree bindings documentation to include msgdma prefetcher and ptp bindings. Signed-off-by: Dalon Westergreen --- .../devicetree/bindings/net/altera_tse.txt| 98 +++ 1 file changed, 79 insertions(+), 19 deletions(-) diff --git a/Documentation/devicetree/bindings/net/altera_tse.txt b/Documentation/devicetree/bindings/net/altera_tse.txt index 0e21df94a53f..d35806942a8f 100644 --- a/Documentation/devicetree/bindings/net/altera_tse.txt +++ b/Documentation/devicetree/bindings/net/altera_tse.txt @@ -2,50 +2,79 @@ Required properties: - compatible: Should be "altr,tse-1.0" for legacy SGDMA based TSE, and should - be "altr,tse-msgdma-1.0" for the preferred MSGDMA based TSE. + be "altr,tse-msgdma-1.0" for the preferred MSGDMA based TSE, + and "altr,tse-msgdma-2.0" for MSGDMA with prefetcher based + implementations. ALTR is supported for legacy device trees, but is deprecated. altr should be used for all new designs. - reg: Address and length of the register set for the device. It contains the information of registers in the same order as described by reg-names - reg-names: Should contain the reg names - "control_port": MAC configuration space region - "tx_csr": xDMA Tx dispatcher control and status space region - "tx_desc": MSGDMA Tx dispatcher descriptor space region - "rx_csr" : xDMA Rx dispatcher control and status space region - "rx_desc": MSGDMA Rx dispatcher descriptor space region - "rx_resp": MSGDMA Rx dispatcher response space region - "s1":SGDMA descriptor memory - interrupts: Should contain the TSE interrupts and it's mode. - interrupt-names: Should contain the interrupt names - "rx_irq": xDMA Rx dispatcher interrupt - "tx_irq": xDMA Tx dispatcher interrupt + "rx_irq": DMA Rx dispatcher interrupt + "tx_irq": DMA Tx dispatcher interrupt - rx-fifo-depth: MAC receive FIFO buffer depth in bytes - tx-fifo-depth: MAC transmit FIFO buffer depth in bytes - phy-mode: See ethernet.txt in the same directory. - phy-handle: See ethernet.txt in the same directory. - phy-addr: See ethernet.txt in the same directory. A configuration should include phy-handle or phy-addr. -- altr,has-supplementary-unicast: - If present, TSE supports additional unicast addresses. - Otherwise additional unicast addresses are not supported. -- altr,has-hash-multicast-filter: - If present, TSE supports a hash based multicast filter. - Otherwise, hash-based multicast filtering is not supported. - - mdio device tree subnode: When the TSE has a phy connected to its local mdio, there must be device tree subnode with the following required properties: - - compatible: Must be "altr,tse-mdio". - #address-cells: Must be <1>. - #size-cells: Must be <0>. For each phy on the mdio bus, there must be a node with the following fields: - - reg: phy id used to communicate to phy. - device_type: Must be "ethernet-phy". +- altr,has-supplementary-unicast: + If present, TSE supports additional unicast addresses. + Otherwise additional unicast addresses are not supported. +- altr,has-hash-multicast-filter: + If present, TSE supports a hash based multicast filter. + Otherwise, hash-based multicast filtering is not supported. +- altr,has-ptp: + If present, TSE supports 1588 timestamping. Currently only + supported with the msgdma prefetcher. +- altr,tx-poll-cnt: + Optional cycle count for Tx prefetcher to poll descriptor + list. If not present, defaults to 128, which at 125MHz is + roughly 1usec. Only for "altr,tse-msgdma-2.0". +- altr,rx-poll-cnt: + Optional cycle count for Tx prefetcher to poll descriptor + list. If not present, defaults to 128, which at 125MHz is + roughly 1usec. Only for "altr,tse-msgdma-2.0". + +Required registers by compatibility string: + - "altr,tse-1.0" + "control_port": MAC configuration space region + "tx_csr": DMA Tx dispatcher control and status space region + "rx_csr" : DMA Rx dispatcher control and status space region + "s1": DMA descriptor memory + + - "altr,tse-msgdma-1.0" + "control_port": MAC configuration space region + "tx_csr": DMA Tx dispatcher control and status space region + "tx_desc": DMA Tx dispatcher descriptor space region + "rx_csr" : DMA Rx dispatcher control and status space region + "rx_desc": DMA Rx dispatcher descriptor space
Re: [PATCH net-next 5/8] net: eth: altera: tse: Move common functions to altera_utils
(!*res) {
+ dev_err(device, "resource %s not defined\n", name);
+ return -ENODEV;
+ }
+
+ region = devm_request_mem_region(device, (*res)->start,
+resource_size(*res), dev_name(device));
+ if (!region) {
+ dev_err(device, "unable to request %s\n", name);
+ return -EBUSY;
+ }
+
+ *ptr = devm_ioremap_nocache(device, region->start,
+ resource_size(region));
+ if (!*ptr) {
+ dev_err(device, "ioremap_nocache of %s failed!", name);
+ return -ENOMEM;
+ }
+
+ return 0;
+}
+
diff --git a/drivers/net/ethernet/altera/altera_utils.h
b/drivers/net/ethernet/altera/altera_utils.h
index baf100ccf587..bb7eff792bb7 100644
--- a/drivers/net/ethernet/altera/altera_utils.h
+++ b/drivers/net/ethernet/altera/altera_utils.h
@@ -14,7 +14,9 @@
* this program. If not, see <http://www.gnu.org/licenses/>.
*/
+#include
#include
+#include
#ifndef __ALTERA_UTILS_H__
#define __ALTERA_UTILS_H__
@@ -23,5 +25,49 @@ void tse_set_bit(void __iomem *ioaddr, size_t offs, u32
bit_mask);
void tse_clear_bit(void __iomem *ioaddr, size_t offs, u32 bit_mask);
int tse_bit_is_set(void __iomem *ioaddr, size_t offs, u32 bit_mask);
int tse_bit_is_clear(void __iomem *ioaddr, size_t offs, u32 bit_mask);
+int request_and_map(struct platform_device *pdev, const char *name,
+ struct resource **res, void __iomem **ptr);
+
+static inline u32 csrrd32(void __iomem *mac, size_t offs)
+{
+ void __iomem *paddr = (void __iomem *)((uintptr_t)mac + offs);
+
+ return readl(paddr);
+}
+
+static inline u16 csrrd16(void __iomem *mac, size_t offs)
+{
+ void __iomem *paddr = (void __iomem *)((uintptr_t)mac + offs);
+
+ return readw(paddr);
+}
+
+static inline u8 csrrd8(void __iomem *mac, size_t offs)
+{
+ void __iomem *paddr = (void __iomem *)((uintptr_t)mac + offs);
+
+ return readb(paddr);
+}
+
+static inline void csrwr32(u32 val, void __iomem *mac, size_t offs)
+{
+ void __iomem *paddr = (void __iomem *)((uintptr_t)mac + offs);
+
+ writel(val, paddr);
+}
+
+static inline void csrwr16(u16 val, void __iomem *mac, size_t offs)
+{
+ void __iomem *paddr = (void __iomem *)((uintptr_t)mac + offs);
+
+ writew(val, paddr);
+}
+
+static inline void csrwr8(u8 val, void __iomem *mac, size_t offs)
+{
+ void __iomem *paddr = (void __iomem *)((uintptr_t)mac + offs);
+
+ writeb(val, paddr);
+}
#endif /* __ALTERA_UTILS_H__*/
Acked-by: Thor Thayer
Re: [PATCH net-next 4/8] net: eth: altera: tse: add optional function to start tx dma
On 11/14/18 6:50 PM, Dalon Westergreen wrote:
From: Dalon Westergreen
Allow for optional start up of tx dma if the start_txdma
function is defined in altera_dmaops.
Signed-off-by: Dalon Westergreen
---
drivers/net/ethernet/altera/altera_tse.h | 1 +
drivers/net/ethernet/altera/altera_tse_main.c | 5 +
2 files changed, 6 insertions(+)
diff --git a/drivers/net/ethernet/altera/altera_tse.h
b/drivers/net/ethernet/altera/altera_tse.h
index d5b97e02e6d6..7f246040135d 100644
--- a/drivers/net/ethernet/altera/altera_tse.h
+++ b/drivers/net/ethernet/altera/altera_tse.h
@@ -412,6 +412,7 @@ struct altera_dmaops {
int (*init_dma)(struct altera_tse_private *priv);
void (*uninit_dma)(struct altera_tse_private *priv);
void (*start_rxdma)(struct altera_tse_private *priv);
+ void (*start_txdma)(struct altera_tse_private *priv);
};
/* This structure is private to each device.
diff --git a/drivers/net/ethernet/altera/altera_tse_main.c
b/drivers/net/ethernet/altera/altera_tse_main.c
index 0c0e8f9bba9b..f6b6a14b1ce9 100644
--- a/drivers/net/ethernet/altera/altera_tse_main.c
+++ b/drivers/net/ethernet/altera/altera_tse_main.c
@@ -1256,6 +1256,9 @@ static int tse_open(struct net_device *dev)
priv->dmaops->start_rxdma(priv);
+ if (priv->dmaops->start_txdma)
+ priv->dmaops->start_txdma(priv);
+
/* Start MAC Rx/Tx */
spin_lock(>mac_cfg_lock);
tse_set_mac(priv, true);
@@ -1658,6 +1661,7 @@ static const struct altera_dmaops altera_dtype_sgdma = {
.init_dma = sgdma_initialize,
.uninit_dma = sgdma_uninitialize,
.start_rxdma = sgdma_start_rxdma,
+ .start_txdma = NULL,
};
static const struct altera_dmaops altera_dtype_msgdma = {
@@ -1677,6 +1681,7 @@ static const struct altera_dmaops altera_dtype_msgdma = {
.init_dma = msgdma_initialize,
.uninit_dma = msgdma_uninitialize,
.start_rxdma = msgdma_start_rxdma,
+ .start_txdma = NULL,
};
static const struct of_device_id altera_tse_ids[] = {
Acked-by: Thor Thayer
Re: [PATCH net-next 3/8] net: eth: altera: tse: fix altera_dmaops declaration
On 11/14/18 6:50 PM, Dalon Westergreen wrote:
From: Dalon Westergreen
The declaration of struct altera_dmaops does not have
identifier names. Add identifier names to confrom with
required coding styles.
Signed-off-by: Dalon Westergreen
---
drivers/net/ethernet/altera/altera_tse.h | 30 +---
1 file changed, 16 insertions(+), 14 deletions(-)
diff --git a/drivers/net/ethernet/altera/altera_tse.h
b/drivers/net/ethernet/altera/altera_tse.h
index e2feee87180a..d5b97e02e6d6 100644
--- a/drivers/net/ethernet/altera/altera_tse.h
+++ b/drivers/net/ethernet/altera/altera_tse.h
@@ -396,20 +396,22 @@ struct altera_tse_private;
struct altera_dmaops {
int altera_dtype;
int dmamask;
- void (*reset_dma)(struct altera_tse_private *);
- void (*enable_txirq)(struct altera_tse_private *);
- void (*enable_rxirq)(struct altera_tse_private *);
- void (*disable_txirq)(struct altera_tse_private *);
- void (*disable_rxirq)(struct altera_tse_private *);
- void (*clear_txirq)(struct altera_tse_private *);
- void (*clear_rxirq)(struct altera_tse_private *);
- int (*tx_buffer)(struct altera_tse_private *, struct tse_buffer *);
- u32 (*tx_completions)(struct altera_tse_private *);
- void (*add_rx_desc)(struct altera_tse_private *, struct tse_buffer *);
- u32 (*get_rx_status)(struct altera_tse_private *);
- int (*init_dma)(struct altera_tse_private *);
- void (*uninit_dma)(struct altera_tse_private *);
- void (*start_rxdma)(struct altera_tse_private *);
+ void (*reset_dma)(struct altera_tse_private *priv);
+ void (*enable_txirq)(struct altera_tse_private *priv);
+ void (*enable_rxirq)(struct altera_tse_private *priv);
+ void (*disable_txirq)(struct altera_tse_private *priv);
+ void (*disable_rxirq)(struct altera_tse_private *priv);
+ void (*clear_txirq)(struct altera_tse_private *priv);
+ void (*clear_rxirq)(struct altera_tse_private *priv);
+ int (*tx_buffer)(struct altera_tse_private *priv,
+struct tse_buffer *buffer);
+ u32 (*tx_completions)(struct altera_tse_private *priv);
+ void (*add_rx_desc)(struct altera_tse_private *priv,
+ struct tse_buffer *buffer);
+ u32 (*get_rx_status)(struct altera_tse_private *priv);
+ int (*init_dma)(struct altera_tse_private *priv);
+ void (*uninit_dma)(struct altera_tse_private *priv);
+ void (*start_rxdma)(struct altera_tse_private *priv);
};
/* This structure is private to each device.
Acked-by: Thor Thayer
Re: [PATCH net-next 2/8] net: eth: altera: set rx and tx ring size before init_dma call
On 11/14/18 6:50 PM, Dalon Westergreen wrote:
From: Dalon Westergreen
It is more appropriate to set the rx and tx ring size before calling
the init function for the dma.
Signed-off-by: Dalon Westergreen
---
drivers/net/ethernet/altera/altera_tse_main.c | 6 --
1 file changed, 4 insertions(+), 2 deletions(-)
diff --git a/drivers/net/ethernet/altera/altera_tse_main.c
b/drivers/net/ethernet/altera/altera_tse_main.c
index dcb330129e23..0c0e8f9bba9b 100644
--- a/drivers/net/ethernet/altera/altera_tse_main.c
+++ b/drivers/net/ethernet/altera/altera_tse_main.c
@@ -1166,6 +1166,10 @@ static int tse_open(struct net_device *dev)
int i;
unsigned long int flags;
+ /* set tx and rx ring size */
+ priv->rx_ring_size = dma_rx_num;
+ priv->tx_ring_size = dma_tx_num;
+
/* Reset and configure TSE MAC and probe associated PHY */
ret = priv->dmaops->init_dma(priv);
if (ret != 0) {
@@ -1208,8 +1212,6 @@ static int tse_open(struct net_device *dev)
priv->dmaops->reset_dma(priv);
/* Create and initialize the TX/RX descriptors chains. */
- priv->rx_ring_size = dma_rx_num;
- priv->tx_ring_size = dma_tx_num;
ret = alloc_init_skbufs(priv);
if (ret) {
netdev_err(dev, "DMA descriptors initialization failed\n");
Acked-by: Thor Thayer
Re: [PATCH net-next 1/8] net: eth: altera: tse_start_xmit ignores tx_buffer call response
On 11/14/18 6:50 PM, Dalon Westergreen wrote:
From: Dalon Westergreen
The return from tx_buffer call in tse_start_xmit is
inapropriately ignored. tse_buffer calls should return
0 for success or NETDEV_TX_BUSY. tse_start_xmit should
return not report a successful transmit when the tse_buffer
call returns an error condition.
In addition to the above, the msgdma and sgdma do not return
the same value on success or failure. The sgdma_tx_buffer
returned 0 on failure and a positive number of transmitted
packets on success. Given that it only ever sends 1 packet,
this made no sense. The msgdma implementation msgdma_tx_buffer
returns 0 on success.
-> Don't ignore the return from tse_buffer calls
-> Fix sgdma tse_buffer call to return 0 on success
and NETDEV_TX_BUSY on failure.
Signed-off-by: Dalon Westergreen
---
drivers/net/ethernet/altera/altera_sgdma.c| 14 --
drivers/net/ethernet/altera/altera_tse_main.c | 4 +++-
2 files changed, 11 insertions(+), 7 deletions(-)
diff --git a/drivers/net/ethernet/altera/altera_sgdma.c
b/drivers/net/ethernet/altera/altera_sgdma.c
index 88ef67a998b4..eb47b9b820bb 100644
--- a/drivers/net/ethernet/altera/altera_sgdma.c
+++ b/drivers/net/ethernet/altera/altera_sgdma.c
@@ -15,6 +15,7 @@
*/
#include
+#include
#include "altera_utils.h"
#include "altera_tse.h"
#include "altera_sgdmahw.h"
@@ -170,10 +171,11 @@ void sgdma_clear_txirq(struct altera_tse_private *priv)
SGDMA_CTRLREG_CLRINT);
}
-/* transmits buffer through SGDMA. Returns number of buffers
- * transmitted, 0 if not possible.
- *
- * tx_lock is held by the caller
+/* transmits buffer through SGDMA.
+ * original behavior returned the number of transmitted packets (always 1) &
+ * returned 0 on error. This differs from the msgdma. the calling function
+ * will now actually look at the code, so from now, 0 is good and return
+ * NETDEV_TX_BUSY when busy.
*/
int sgdma_tx_buffer(struct altera_tse_private *priv, struct tse_buffer
*buffer)
{
@@ -185,7 +187,7 @@ int sgdma_tx_buffer(struct altera_tse_private *priv, struct
tse_buffer *buffer)
/* wait 'til the tx sgdma is ready for the next transmit request */
if (sgdma_txbusy(priv))
- return 0;
+ return NETDEV_TX_BUSY;
sgdma_setup_descrip(cdesc, /* current descriptor */
ndesc, /* next descriptor */
@@ -202,7 +204,7 @@ int sgdma_tx_buffer(struct altera_tse_private *priv, struct
tse_buffer *buffer)
/* enqueue the request to the pending transmit queue */
queue_tx(priv, buffer);
- return 1;
+ return 0;
}
diff --git a/drivers/net/ethernet/altera/altera_tse_main.c b/drivers/net/ethernet/altera/altera_tse_main.c
index baca8f704a45..dcb330129e23 100644
--- a/drivers/net/ethernet/altera/altera_tse_main.c
+++ b/drivers/net/ethernet/altera/altera_tse_main.c
@@ -606,7 +606,9 @@ static int tse_start_xmit(struct sk_buff *skb, struct
net_device *dev)
buffer->dma_addr = dma_addr;
buffer->len = nopaged_len;
- priv->dmaops->tx_buffer(priv, buffer);
+ ret = priv->dmaops->tx_buffer(priv, buffer);
+ if (ret)
+ goto out;
skb_tx_timestamp(skb);
Acked-by: Thor Thayer
[PATCHv2] MAINTAINERS: Replace Vince Bridgers as Altera TSE maintainer
From: Thor Thayer Vince has moved to a different role. Replace him as Altera TSE maintainer. Signed-off-by: Thor Thayer Acked-by: Vince Bridgers Acked-by: Alan Tull --- v2 Include netdev and David Miller --- MAINTAINERS | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/MAINTAINERS b/MAINTAINERS index e110e327bf38..827fd5fc6ebd 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -717,7 +717,7 @@ F: include/linux/mfd/altera-a10sr.h F: include/dt-bindings/reset/altr,rst-mgr-a10sr.h ALTERA TRIPLE SPEED ETHERNET DRIVER -M: Vince Bridgers +M: Thor Thayer L: netdev@vger.kernel.org L: nios2-...@lists.rocketboards.org (moderated for non-subscribers) S: Maintained -- 2.7.4
[RFT net-next] net: stmmac: Fix RX packet size > 8191
From: Thor Thayer
Ping problems with packets > 8191 as shown:
PING 192.168.1.99 (192.168.1.99) 8150(8178) bytes of data.
8158 bytes from 192.168.1.99: icmp_seq=1 ttl=64 time=0.669 ms
wrong data byte 8144 should be 0xd0 but was 0x0
1610 11 12 13 14 15 16 17 18 19 1a 1b 1c 1d 1e 1f
20 21 22 23 24 25 26 27 28 29 2a 2b 2c 2d 2e 2f
%< ---snip--
8112 b0 b1 b2 b3 b4 b5 b6 b7 b8 b9 ba bb bc bd be bf
c0 c1 c2 c3 c4 c5 c6 c7 c8 c9 ca cb cc cd ce cf
8144 0 0 0 0 d0 d1
^^^
Notice the 4 bytes of 0 before the expected byte of d0.
Databook notes that the RX buffer must be a multiple of 4/8/16
bytes [1].
Add a new define for RX DMA Buffer size since the TX descriptors
don't have this limitation. Use this new define in all the RX
buffer setup and refill functions.
Also fixup the normal descriptor RX buffer size since that has
the same limitation.
[1] Synopsys DesignWare Cores Ethernet MAC Universal v3.70a
[section 8.4.2 - Table 8-24]
[RFT] Request testing on a platform that has normal descriptors.
Tested on SoCFPGA Stratix10 with ping sweep from 100 to 8300 byte packets.
Fixes: 286a83721720 ("stmmac: add CHAINED descriptor mode support (V4)")
Suggested-by: Jose Abreu
Signed-off-by: Thor Thayer
---
drivers/net/ethernet/stmicro/stmmac/common.h | 2 ++
drivers/net/ethernet/stmicro/stmmac/descs_com.h | 4 ++--
drivers/net/ethernet/stmicro/stmmac/norm_desc.c | 2 +-
drivers/net/ethernet/stmicro/stmmac/ring_mode.c | 8
drivers/net/ethernet/stmicro/stmmac/stmmac_main.c | 2 +-
5 files changed, 10 insertions(+), 8 deletions(-)
diff --git a/drivers/net/ethernet/stmicro/stmmac/common.h
b/drivers/net/ethernet/stmicro/stmmac/common.h
index b1b305f8f414..ffc6b344a81c 100644
--- a/drivers/net/ethernet/stmicro/stmmac/common.h
+++ b/drivers/net/ethernet/stmicro/stmmac/common.h
@@ -366,6 +366,8 @@ struct dma_features {
/* GMAC TX FIFO is 8K, Rx FIFO is 16K */
#define BUF_SIZE_16KiB 16384
#define BUF_SIZE_8KiB 8192
+/* RX Buffer size must be < 8191 and multiple of 4/8/16 bytes */
+#define RX_BUF_SIZE_8KiB 8188
#define BUF_SIZE_4KiB 4096
#define BUF_SIZE_2KiB 2048
diff --git a/drivers/net/ethernet/stmicro/stmmac/descs_com.h
b/drivers/net/ethernet/stmicro/stmmac/descs_com.h
index ca9d7e48034c..4043ef6e8698 100644
--- a/drivers/net/ethernet/stmicro/stmmac/descs_com.h
+++ b/drivers/net/ethernet/stmicro/stmmac/descs_com.h
@@ -31,7 +31,7 @@
/* Enhanced descriptors */
static inline void ehn_desc_rx_set_on_ring(struct dma_desc *p, int end)
{
- p->des1 |= cpu_to_le32(((BUF_SIZE_8KiB - 1)
+ p->des1 |= cpu_to_le32((RX_BUF_SIZE_8KiB
<< ERDES1_BUFFER2_SIZE_SHIFT)
& ERDES1_BUFFER2_SIZE_MASK);
@@ -61,7 +61,7 @@ static inline void enh_set_tx_desc_len_on_ring(struct
dma_desc *p, int len)
/* Normal descriptors */
static inline void ndesc_rx_set_on_ring(struct dma_desc *p, int end)
{
- p->des1 |= cpu_to_le32(((BUF_SIZE_2KiB - 1)
+ p->des1 |= cpu_to_le32((BUF_SIZE_2KiB
<< RDES1_BUFFER2_SIZE_SHIFT)
& RDES1_BUFFER2_SIZE_MASK);
diff --git a/drivers/net/ethernet/stmicro/stmmac/norm_desc.c
b/drivers/net/ethernet/stmicro/stmmac/norm_desc.c
index de65bb29feba..74a563682945 100644
--- a/drivers/net/ethernet/stmicro/stmmac/norm_desc.c
+++ b/drivers/net/ethernet/stmicro/stmmac/norm_desc.c
@@ -138,7 +138,7 @@ static void ndesc_init_rx_desc(struct dma_desc *p, int
disable_rx_ic, int mode,
int end)
{
p->des0 |= cpu_to_le32(RDES0_OWN);
- p->des1 |= cpu_to_le32((BUF_SIZE_2KiB - 1) & RDES1_BUFFER1_SIZE_MASK);
+ p->des1 |= cpu_to_le32(BUF_SIZE_2KiB & RDES1_BUFFER1_SIZE_MASK);
if (mode == STMMAC_CHAIN_MODE)
ndesc_rx_set_on_chain(p, end);
diff --git a/drivers/net/ethernet/stmicro/stmmac/ring_mode.c
b/drivers/net/ethernet/stmicro/stmmac/ring_mode.c
index abc3f85270cd..09974a626b49 100644
--- a/drivers/net/ethernet/stmicro/stmmac/ring_mode.c
+++ b/drivers/net/ethernet/stmicro/stmmac/ring_mode.c
@@ -114,14 +114,14 @@ static void refill_desc3(void *priv_ptr, struct dma_desc
*p)
struct stmmac_priv *priv = (struct stmmac_priv *)priv_ptr;
/* Fill DES3 in case of RING mode */
- if (priv->dma_buf_sz >= BUF_SIZE_8KiB)
- p->des3 = cpu_to_le32(le32_to_cpu(p->des2) + BUF_SIZE_8KiB);
+ if (priv->dma_buf_sz >= RX_BUF_SIZE_8KiB)
+ p->des3 = cpu_to_le32(le32_to_cpu(p->des2) + RX_BUF_SIZE_8KiB);
}
/* In ring mode we need to fill the desc3 because it is used as buffer */
static void init_desc3(struct dma_desc *p)
{
- p->des3 = cpu_to_le32(le32_to_cpu(p->des2) + BUF_SIZE_8KiB);
+ p->des3 = cpu_to_le32(le32_to_cpu(p->des2) + RX_BUF_SIZE_8KiB);
}
static void clean_desc3(void *priv_ptr, str
[RFC] net: stmmac: RX Jumbo packet size > 8191 problem
Hi,
I'm running into a weird issue at the DMA boundary for large packets
(>8192) that I can't explain. I'm hoping someone here has an idea on
why I'm seeing this issue.
This is the Synopsys DesignWare Ethernet GMAC core (3.74) using the
stmmac driver found at drivers/net/ethernet/stmicro/stmmac.
If I ping with data sizes that exceed the first DMA buffer size (size
set to 8191), ping reports a data mismatch as follows at byte #8144:
$ ping -c 1 -M do -s 8150 192.168.1.99
PING 192.168.1.99 (192.168.1.99) 8150(8178) bytes of data.
8158 bytes from 192.168.1.99: icmp_seq=1 ttl=64 time=0.669 ms
wrong data byte #8144 should be 0xd0 but was 0x0
#16 10 11 12 13 14 15 16 17 18 19 1a 1b 1c 1d 1e 1f 20 21 22 23 24 25 26
27 28 29 2a 2b 2c 2d 2e 2f
%< ---snip--
#8112 b0 b1 b2 b3 b4 b5 b6 b7 b8 b9 ba bb bc bd be bf c0 c1 c2 c3 c4 c5
c6 c7 c8 c9 ca cb cc cd ce cf
#8144 0 0 0 0 d0 d1
^^^
Notice the 4 bytes of 0 there before the expected byte of d0. I
confirmed the on-wire result with wireshark - same data packet as shown
above.
Looking at the queue, I'm seeing these values in the RX descriptors (I'm
using ring mode, enhanced descriptors).
0xa0040320 0x9fff1fff 0x7a358042 0x7a35a042
^des0 ^des1 ^des2 ^desc3
desc0 => 8196 bytes, OWN, First & Last Descriptor, Frame type = Eth
desc1 => Disable IRQ on done, Rx Buffer2 sz = 8191, Rx Buffer1 sz = 8191
desc2 => Buffer 1 Addr Pointer
desc3 => Buffer 2 Addr Pointer
If I adjust init_desc3() and refill_desc3() to initialize desc3 to
desc2+BUF_SIZE_8KiB-4, I get a descriptor as show below and ping
completes successfully.
0xa0040320 0x9fff1fff 0x77df8042 0x77dfa03e
^ this is now different
But I'm not sure why the -4 works because desc3 overlaps into the end of
the first DMA buffer area (des2) which is counterintuitive.
At first I thought the 4 extra bytes were the FCS but that should occur
at the end of the complete transfer, so I'd expect it to be at the end
of all the data (in buffer2)
Here is the change that works. I ran a ping sweep with packet sizes from
8100 to 8300 successfully with this change.
---
$ git diff
diff --git a/drivers/net/ethernet/stmicro/stmmac/ring_mode.c
b/drivers/net/ethernet/stmicro/stmmac/ring_mode.c
index abc3f85270cd..b52be0235d8f 100644
--- a/drivers/net/ethernet/stmicro/stmmac/ring_mode.c
+++ b/drivers/net/ethernet/stmicro/stmmac/ring_mode.c
@@ -115,13 +115,13 @@ static void refill_desc3(void *priv_ptr, struct
dma_desc *p)
/* Fill DES3 in case of RING mode */
if (priv->dma_buf_sz >= BUF_SIZE_8KiB)
- p->des3 = cpu_to_le32(le32_to_cpu(p->des2) + BUF_SIZE_8KiB);
+ p->des3 = cpu_to_le32(le32_to_cpu(p->des2) +
+ BUF_SIZE_8KiB - 4);
}
/* In ring mode we need to fill the desc3 because it is used as buffer */
static void init_desc3(struct dma_desc *p)
{
- p->des3 = cpu_to_le32(le32_to_cpu(p->des2) + BUF_SIZE_8KiB);
+ p->des3 = cpu_to_le32(le32_to_cpu(p->des2) + BUF_SIZE_8KiB - 4);
}
static void clean_desc3(void *priv_ptr, struct dma_desc *p)
---
Any thoughts on why I need to change the indexing?
Thanks,
Thor
[PATCH] net: stmmac: Adjust dump offset of DMA registers for ethtool
From: Thor Thayer <thor.tha...@linux.intel.com>
The commit fbf68229ffe7 ("net: stmmac: unify registers dumps methods")
in the Linux kernel modified the register dump to store the DMA registers
at the DMA register offset (0x1000) but ethtool (stmmac.c) looks for the
DMA registers after the MAC registers which is offset 55.
This patch copies the DMA registers from the higher offset to the offset
where ethtool expects them.
Signed-off-by: Thor Thayer <thor.tha...@linux.intel.com>
---
drivers/net/ethernet/stmicro/stmmac/dwmac1000_dma.c | 2 +-
drivers/net/ethernet/stmicro/stmmac/dwmac100_dma.c | 2 +-
drivers/net/ethernet/stmicro/stmmac/dwmac_dma.h | 3 +++
drivers/net/ethernet/stmicro/stmmac/stmmac_ethtool.c | 5 +
4 files changed, 10 insertions(+), 2 deletions(-)
diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac1000_dma.c
b/drivers/net/ethernet/stmicro/stmmac/dwmac1000_dma.c
index cc4ea13..ec539f7 100644
--- a/drivers/net/ethernet/stmicro/stmmac/dwmac1000_dma.c
+++ b/drivers/net/ethernet/stmicro/stmmac/dwmac1000_dma.c
@@ -205,7 +205,7 @@ static void dwmac1000_dump_dma_regs(void __iomem *ioaddr,
u32 *reg_space)
{
int i;
- for (i = 0; i < 23; i++)
+ for (i = 0; i < NUM_DWMAC1000_DMA_REGS; i++)
if ((i < 12) || (i > 17))
reg_space[DMA_BUS_MODE / 4 + i] =
readl(ioaddr + DMA_BUS_MODE + i * 4);
diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac100_dma.c
b/drivers/net/ethernet/stmicro/stmmac/dwmac100_dma.c
index eef2f22..6502b9a 100644
--- a/drivers/net/ethernet/stmicro/stmmac/dwmac100_dma.c
+++ b/drivers/net/ethernet/stmicro/stmmac/dwmac100_dma.c
@@ -70,7 +70,7 @@ static void dwmac100_dump_dma_regs(void __iomem *ioaddr, u32
*reg_space)
{
int i;
- for (i = 0; i < 9; i++)
+ for (i = 0; i < NUM_DWMAC100_DMA_REGS; i++)
reg_space[DMA_BUS_MODE / 4 + i] =
readl(ioaddr + DMA_BUS_MODE + i * 4);
diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac_dma.h
b/drivers/net/ethernet/stmicro/stmmac/dwmac_dma.h
index 56e485f..3107d19 100644
--- a/drivers/net/ethernet/stmicro/stmmac/dwmac_dma.h
+++ b/drivers/net/ethernet/stmicro/stmmac/dwmac_dma.h
@@ -136,6 +136,9 @@
#define DMA_STATUS_TI 0x0001 /* Transmit Interrupt */
#define DMA_CONTROL_FTF0x0010 /* Flush transmit FIFO
*/
+#define NUM_DWMAC100_DMA_REGS 9
+#define NUM_DWMAC1000_DMA_REGS 23
+
void dwmac_enable_dma_transmission(void __iomem *ioaddr);
void dwmac_enable_dma_irq(void __iomem *ioaddr);
void dwmac_disable_dma_irq(void __iomem *ioaddr);
diff --git a/drivers/net/ethernet/stmicro/stmmac/stmmac_ethtool.c
b/drivers/net/ethernet/stmicro/stmmac/stmmac_ethtool.c
index 690b7c1..2ffb5b1 100644
--- a/drivers/net/ethernet/stmicro/stmmac/stmmac_ethtool.c
+++ b/drivers/net/ethernet/stmicro/stmmac/stmmac_ethtool.c
@@ -33,6 +33,8 @@
#define MAC100_ETHTOOL_NAME"st_mac100"
#define GMAC_ETHTOOL_NAME "st_gmac"
+#define ETHTOOL_DMA_OFFSET 55
+
struct stmmac_stats {
char stat_string[ETH_GSTRING_LEN];
int sizeof_stat;
@@ -443,6 +445,9 @@ static void stmmac_ethtool_gregs(struct net_device *dev,
priv->hw->mac->dump_regs(priv->hw, reg_space);
priv->hw->dma->dump_regs(priv->ioaddr, reg_space);
+ /* Copy DMA registers to where ethtool expects them */
+ memcpy(_space[ETHTOOL_DMA_OFFSET], _space[DMA_BUS_MODE / 4],
+ NUM_DWMAC1000_DMA_REGS * 4);
}
static void
--
2.7.4
[PATCHv3 1/2] ethtool: stmmac: Add macros for number of registers
From: Thor Thayer <thor.tha...@linux.intel.com>
This patch adds macros for the number of registers to
loop through to make the code easier to read.
Signed-off-by: Thor Thayer <thor.tha...@linux.intel.com>
---
v2 New commit. Add macros for number of registers.
v3 Only add macros - remove DMA indexing.
---
stmmac.c | 10 +++---
1 file changed, 7 insertions(+), 3 deletions(-)
diff --git a/stmmac.c b/stmmac.c
index fb69bfe..23ed31a 100644
--- a/stmmac.c
+++ b/stmmac.c
@@ -14,6 +14,10 @@
#include
#include "internal.h"
+#define MAC100_DMA_REG_NUM 9
+#define GMAC_REG_NUM 55
+#define GMAC_DMA_REG_NUM 22
+
int st_mac100_dump_regs(struct ethtool_drvinfo *info,
struct ethtool_regs *regs)
{
@@ -36,7 +40,7 @@ int st_mac100_dump_regs(struct ethtool_drvinfo *info,
fprintf(stdout, "\n");
fprintf(stdout, "DMA Registers\n");
- for (i = 0; i < 9; i++)
+ for (i = 0; i < MAC100_DMA_REG_NUM; i++)
fprintf(stdout, "CSR%d 0x%08X\n", i, *stmmac_reg++);
fprintf(stdout, "DMA cur tx buf addr 0x%08X\n", *stmmac_reg++);
@@ -54,12 +58,12 @@ int st_gmac_dump_regs(struct ethtool_drvinfo *info, struct
ethtool_regs *regs)
fprintf(stdout, "ST GMAC Registers\n");
fprintf(stdout, "GMAC Registers\n");
- for (i = 0; i < 55; i++)
+ for (i = 0; i < GMAC_REG_NUM; i++)
fprintf(stdout, "Reg%d 0x%08X\n", i, *stmmac_reg++);
fprintf(stdout, "\n");
fprintf(stdout, "DMA Registers\n");
- for (i = 0; i < 22; i++)
+ for (i = 0; i < GMAC_DMA_REG_NUM; i++)
fprintf(stdout, "Reg%d 0x%08X\n", i, *stmmac_reg++);
return 0;
--
2.7.4
[PATCHv3 2/2] ethtool: stmmac: Add DMA HW Feature Register
From: Thor Thayer <thor.tha...@linux.intel.com> This patch adds the DMA HW Feature Register which is at the end of the DMA registers and is documented in Version 3.70a. Signed-off-by: Thor Thayer <thor.tha...@linux.intel.com> Acked-by: Giuseppe Cavallaro <peppe.cavall...@st.com> --- v2 Modify for MACRO changes and add Acked-by v3 No change --- stmmac.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/stmmac.c b/stmmac.c index 23ed31a..79ef151 100644 --- a/stmmac.c +++ b/stmmac.c @@ -16,7 +16,7 @@ #define MAC100_DMA_REG_NUM 9 #define GMAC_REG_NUM 55 -#define GMAC_DMA_REG_NUM 22 +#define GMAC_DMA_REG_NUM 23 int st_mac100_dump_regs(struct ethtool_drvinfo *info, struct ethtool_regs *regs) -- 2.7.4
Re: [PATCHv2 1/3] ethtool: stmmac: Fix Designware ethtool register dump
On 06/28/2017 10:13 AM, thor.tha...@linux.intel.com wrote:
From: Thor Thayer <thor.tha...@linux.intel.com>
The commit fbf68229ffe7 ("net: stmmac: unify registers dumps methods")
in the Linux kernel modified the register dump to store the DMA registers
at the DMA register offset (0x1000) but ethtool (stmmac.c) looks for the
DMA registers after the MAC registers which is offset 12.
This patch adds the DMA register offset so that indexing is correct.
Signed-off-by: Thor Thayer <thor.tha...@linux.intel.com>
Acked-by: Giuseppe Cavallaro <peppe.cavall...@st.com>
---
v2 Modify the commit message to specify commit from Linux kernel.
Add Acked-by.
---
Please disregard this patch.
After further reflection, it would be better to leave this alone and
change the kernel driver. This change would require using different
ethtool for different versions.
The other 2 patches with macro changes are still valid.
Thanks,
Thor
stmmac.c | 5 +
1 file changed, 5 insertions(+)
diff --git a/stmmac.c b/stmmac.c
index fb69bfe..e1bb291 100644
--- a/stmmac.c
+++ b/stmmac.c
@@ -14,6 +14,9 @@
#include
#include "internal.h"
+/* The DMA Registers start at offset 0x1000 in the DW IP */
+#define DMA_REG_OFFSET (0x1000 / 4)
+
int st_mac100_dump_regs(struct ethtool_drvinfo *info,
struct ethtool_regs *regs)
{
@@ -36,6 +39,7 @@ int st_mac100_dump_regs(struct ethtool_drvinfo *info,
fprintf(stdout, "\n");
fprintf(stdout, "DMA Registers\n");
+ stmmac_reg = (unsigned int *)regs->data + DMA_REG_OFFSET;
for (i = 0; i < 9; i++)
fprintf(stdout, "CSR%d 0x%08X\n", i, *stmmac_reg++);
@@ -59,6 +63,7 @@ int st_gmac_dump_regs(struct ethtool_drvinfo *info, struct ethtool_regs *regs)
fprintf(stdout, "\n");
fprintf(stdout, "DMA Registers\n");
+ stmmac_reg = (unsigned int *)regs->data + DMA_REG_OFFSET;
for (i = 0; i < 22; i++)
fprintf(stdout, "Reg%d 0x%08X\n", i, *stmmac_reg++);
[PATCHv2 3/3] ethtool: stmmac: Add DMA HW Feature Register
From: Thor Thayer <thor.tha...@linux.intel.com> This patch adds the DMA HW Feature Register which is at the end of the DMA registers and is documented in Version 3.70a. Signed-off-by: Thor Thayer <thor.tha...@linux.intel.com> Acked-by: Giuseppe Cavallaro <peppe.cavall...@st.com> --- v2 Modify for MACRO changes and add Acked-by --- stmmac.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/stmmac.c b/stmmac.c index ab83779..e5d8c7b 100644 --- a/stmmac.c +++ b/stmmac.c @@ -16,7 +16,7 @@ #define MAC100_DMA_REG_NUM 9 #define GMAC_REG_NUM 55 -#define GMAC_DMA_REG_NUM 22 +#define GMAC_DMA_REG_NUM 23 /* The DMA Registers start at offset 0x1000 in the DW IP */ #define DMA_REG_OFFSET (0x1000 / 4) -- 2.7.4
[PATCHv2 0/3] ethtool: stmmac: Fix DMA register dump
From: Thor Thayer <thor.tha...@linux.intel.com> 1. The DMA register dump structure changed which requires this change to the indexing of the DMA registers. 2. Also dump the DMA HW Feature Register. 3. V2 also adds macros for the number of registers. Thor Thayer (3): ethtool: stmmac: Fix Designware ethtool register dump ethtool: stmmac: Add macros for number of registers ethtool: stmmac: Add DMA HW Feature Register stmmac.c | 15 --- 1 file changed, 12 insertions(+), 3 deletions(-) -- 2.7.4
[PATCHv2 1/3] ethtool: stmmac: Fix Designware ethtool register dump
From: Thor Thayer <thor.tha...@linux.intel.com>
The commit fbf68229ffe7 ("net: stmmac: unify registers dumps methods")
in the Linux kernel modified the register dump to store the DMA registers
at the DMA register offset (0x1000) but ethtool (stmmac.c) looks for the
DMA registers after the MAC registers which is offset 12.
This patch adds the DMA register offset so that indexing is correct.
Signed-off-by: Thor Thayer <thor.tha...@linux.intel.com>
Acked-by: Giuseppe Cavallaro <peppe.cavall...@st.com>
---
v2 Modify the commit message to specify commit from Linux kernel.
Add Acked-by.
---
stmmac.c | 5 +
1 file changed, 5 insertions(+)
diff --git a/stmmac.c b/stmmac.c
index fb69bfe..e1bb291 100644
--- a/stmmac.c
+++ b/stmmac.c
@@ -14,6 +14,9 @@
#include
#include "internal.h"
+/* The DMA Registers start at offset 0x1000 in the DW IP */
+#define DMA_REG_OFFSET (0x1000 / 4)
+
int st_mac100_dump_regs(struct ethtool_drvinfo *info,
struct ethtool_regs *regs)
{
@@ -36,6 +39,7 @@ int st_mac100_dump_regs(struct ethtool_drvinfo *info,
fprintf(stdout, "\n");
fprintf(stdout, "DMA Registers\n");
+ stmmac_reg = (unsigned int *)regs->data + DMA_REG_OFFSET;
for (i = 0; i < 9; i++)
fprintf(stdout, "CSR%d 0x%08X\n", i, *stmmac_reg++);
@@ -59,6 +63,7 @@ int st_gmac_dump_regs(struct ethtool_drvinfo *info, struct
ethtool_regs *regs)
fprintf(stdout, "\n");
fprintf(stdout, "DMA Registers\n");
+ stmmac_reg = (unsigned int *)regs->data + DMA_REG_OFFSET;
for (i = 0; i < 22; i++)
fprintf(stdout, "Reg%d 0x%08X\n", i, *stmmac_reg++);
--
2.7.4
[PATCHv2 2/3] ethtool: stmmac: Add macros for number of registers
From: Thor Thayer <thor.tha...@linux.intel.com> This patch adds macros for the number of registers to loop through to make the code easier to read. Signed-off-by: Thor Thayer <thor.tha...@linux.intel.com> --- v2 New commit. Add macros for number of registers. --- stmmac.c | 10 +++--- 1 file changed, 7 insertions(+), 3 deletions(-) diff --git a/stmmac.c b/stmmac.c index e1bb291..ab83779 100644 --- a/stmmac.c +++ b/stmmac.c @@ -14,6 +14,10 @@ #include #include "internal.h" +#define MAC100_DMA_REG_NUM 9 +#define GMAC_REG_NUM 55 +#define GMAC_DMA_REG_NUM 22 + /* The DMA Registers start at offset 0x1000 in the DW IP */ #define DMA_REG_OFFSET (0x1000 / 4) @@ -40,7 +44,7 @@ int st_mac100_dump_regs(struct ethtool_drvinfo *info, fprintf(stdout, "\n"); fprintf(stdout, "DMA Registers\n"); stmmac_reg = (unsigned int *)regs->data + DMA_REG_OFFSET; - for (i = 0; i < 9; i++) + for (i = 0; i < MAC100_DMA_REG_NUM; i++) fprintf(stdout, "CSR%d 0x%08X\n", i, *stmmac_reg++); fprintf(stdout, "DMA cur tx buf addr 0x%08X\n", *stmmac_reg++); @@ -58,13 +62,13 @@ int st_gmac_dump_regs(struct ethtool_drvinfo *info, struct ethtool_regs *regs) fprintf(stdout, "ST GMAC Registers\n"); fprintf(stdout, "GMAC Registers\n"); - for (i = 0; i < 55; i++) + for (i = 0; i < GMAC_REG_NUM; i++) fprintf(stdout, "Reg%d 0x%08X\n", i, *stmmac_reg++); fprintf(stdout, "\n"); fprintf(stdout, "DMA Registers\n"); stmmac_reg = (unsigned int *)regs->data + DMA_REG_OFFSET; - for (i = 0; i < 22; i++) + for (i = 0; i < GMAC_DMA_REG_NUM; i++) fprintf(stdout, "Reg%d 0x%08X\n", i, *stmmac_reg++); return 0; -- 2.7.4
Re: [PATCH 2/2] ethtool: stmmac: Add DMA HW Feature Register
On 06/28/2017 04:03 AM, Giuseppe CAVALLARO wrote: On 6/27/2017 11:51 PM, thor.tha...@linux.intel.com wrote: From: Thor Thayer <thor.tha...@linux.intel.com> This patch adds the DMA HW Feature Register which is at the end of the DMA registers and is documented in Version 3.70a. Signed-off-by: Thor Thayer <thor.tha...@linux.intel.com> --- stmmac.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/stmmac.c b/stmmac.c index e1bb291..7d7bebd 100644 --- a/stmmac.c +++ b/stmmac.c @@ -64,7 +64,7 @@ int st_gmac_dump_regs(struct ethtool_drvinfo *info, struct ethtool_regs *regs) fprintf(stdout, "\n"); fprintf(stdout, "DMA Registers\n"); stmmac_reg = (unsigned int *)regs->data + DMA_REG_OFFSET; -for (i = 0; i < 22; i++) +for (i = 0; i < 23; i++) thx Thor for these changes, I wonder if you could add a macro instead 23 while doing this kind of changes Sorry if I didn't it in the past. the, you can send the series with my Acked-by: Giuseppe Cavallaro <peppe.cavall...@st.com> Regards peppe Sure. I'll also add a macro for the # of main registers too (55). Some maintainers prefer the macros while others prefer the number to reduce the space. Thanks for the quick review! Thor fprintf(stdout, "Reg%d 0x%08X\n", i, *stmmac_reg++); return 0;
[PATCH] net: stmmac: Add additional registers for dwmac1000_dma ethtool
From: Thor Thayer <thor.tha...@linux.intel.com>
Version 3.70a of the Designware has additional DMA registers so
add those to the ethtool DMA Register dump.
Offset 9 - Receive Interrupt Watchdog Timer Register
Offset 10 - AXI Bus Mode Register
Offset 11 - AHB or AXI Status Register
Offset 22 - HW Feature Register
Signed-off-by: Thor Thayer <thor.tha...@linux.intel.com>
---
drivers/net/ethernet/stmicro/stmmac/dwmac1000_dma.c | 4 ++--
drivers/net/ethernet/stmicro/stmmac/stmmac_ethtool.c | 2 +-
2 files changed, 3 insertions(+), 3 deletions(-)
diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac1000_dma.c
b/drivers/net/ethernet/stmicro/stmmac/dwmac1000_dma.c
index 471a9aa..22cf635 100644
--- a/drivers/net/ethernet/stmicro/stmmac/dwmac1000_dma.c
+++ b/drivers/net/ethernet/stmicro/stmmac/dwmac1000_dma.c
@@ -205,8 +205,8 @@ static void dwmac1000_dump_dma_regs(void __iomem *ioaddr,
u32 *reg_space)
{
int i;
- for (i = 0; i < 22; i++)
- if ((i < 9) || (i > 17))
+ for (i = 0; i < 23; i++)
+ if ((i < 12) || (i > 17))
reg_space[DMA_BUS_MODE / 4 + i] =
readl(ioaddr + DMA_BUS_MODE + i * 4);
}
diff --git a/drivers/net/ethernet/stmicro/stmmac/stmmac_ethtool.c
b/drivers/net/ethernet/stmicro/stmmac/stmmac_ethtool.c
index 743170d..babb39c 100644
--- a/drivers/net/ethernet/stmicro/stmmac/stmmac_ethtool.c
+++ b/drivers/net/ethernet/stmicro/stmmac/stmmac_ethtool.c
@@ -29,7 +29,7 @@
#include "stmmac.h"
#include "dwmac_dma.h"
-#define REG_SPACE_SIZE 0x1054
+#define REG_SPACE_SIZE 0x1060
#define MAC100_ETHTOOL_NAME"st_mac100"
#define GMAC_ETHTOOL_NAME "st_gmac"
--
2.7.4
[PATCH 2/2] ethtool: stmmac: Add DMA HW Feature Register
From: Thor Thayer <thor.tha...@linux.intel.com> This patch adds the DMA HW Feature Register which is at the end of the DMA registers and is documented in Version 3.70a. Signed-off-by: Thor Thayer <thor.tha...@linux.intel.com> --- stmmac.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/stmmac.c b/stmmac.c index e1bb291..7d7bebd 100644 --- a/stmmac.c +++ b/stmmac.c @@ -64,7 +64,7 @@ int st_gmac_dump_regs(struct ethtool_drvinfo *info, struct ethtool_regs *regs) fprintf(stdout, "\n"); fprintf(stdout, "DMA Registers\n"); stmmac_reg = (unsigned int *)regs->data + DMA_REG_OFFSET; - for (i = 0; i < 22; i++) + for (i = 0; i < 23; i++) fprintf(stdout, "Reg%d 0x%08X\n", i, *stmmac_reg++); return 0; -- 2.7.4
[PATCH 1/2] ethtool: stmmac: Fix Designware ethtool register dump
From: Thor Thayer <thor.tha...@linux.intel.com>
The commit fbf68229ffe7 ("net: stmmac: unify registers dumps methods")
modified the register dump to store the DMA registers at the DMA register
offset (0x1000) but ethtool (stmmac.c) looks for the DMA registers after
the MAC registers which is offset 12.
This patch adds the DMA register offset so that indexing is correct.
Signed-off-by: Thor Thayer <thor.tha...@linux.intel.com>
---
stmmac.c | 5 +
1 file changed, 5 insertions(+)
diff --git a/stmmac.c b/stmmac.c
index fb69bfe..e1bb291 100644
--- a/stmmac.c
+++ b/stmmac.c
@@ -14,6 +14,9 @@
#include
#include "internal.h"
+/* The DMA Registers start at offset 0x1000 in the DW IP */
+#define DMA_REG_OFFSET (0x1000 / 4)
+
int st_mac100_dump_regs(struct ethtool_drvinfo *info,
struct ethtool_regs *regs)
{
@@ -36,6 +39,7 @@ int st_mac100_dump_regs(struct ethtool_drvinfo *info,
fprintf(stdout, "\n");
fprintf(stdout, "DMA Registers\n");
+ stmmac_reg = (unsigned int *)regs->data + DMA_REG_OFFSET;
for (i = 0; i < 9; i++)
fprintf(stdout, "CSR%d 0x%08X\n", i, *stmmac_reg++);
@@ -59,6 +63,7 @@ int st_gmac_dump_regs(struct ethtool_drvinfo *info, struct
ethtool_regs *regs)
fprintf(stdout, "\n");
fprintf(stdout, "DMA Registers\n");
+ stmmac_reg = (unsigned int *)regs->data + DMA_REG_OFFSET;
for (i = 0; i < 22; i++)
fprintf(stdout, "Reg%d 0x%08X\n", i, *stmmac_reg++);
--
2.7.4
[PATCH 0/2] ethtool: stmmac: Fix DMA register dump
From: Thor Thayer <thor.tha...@linux.intel.com> The DMA register dump structure changed which requires this change to the indexing of the DMA registers. Also dump the DMA HW Feature Register. Thor Thayer (2): ethtool: stmmac: Fix Designware ethtool register dump ethtool: stmmac: Add DMA HW Feature Register stmmac.c | 7 ++- 1 file changed, 6 insertions(+), 1 deletion(-) -- 2.7.4
[PATCH] net: ethernet: stmmac: Fix altr_tse_pcs SGMII Initialization
From: Thor Thayer <thor.tha...@linux.intel.com>
Fix NETDEV WATCHDOG timeout on startup by adding missing register
writes that properly setup SGMII.
Signed-off-by: Thor Thayer <thor.tha...@linux.intel.com>
---
drivers/net/ethernet/stmicro/stmmac/altr_tse_pcs.c | 6 +-
1 file changed, 5 insertions(+), 1 deletion(-)
diff --git a/drivers/net/ethernet/stmicro/stmmac/altr_tse_pcs.c
b/drivers/net/ethernet/stmicro/stmmac/altr_tse_pcs.c
index 489ef14..6a9c954 100644
--- a/drivers/net/ethernet/stmicro/stmmac/altr_tse_pcs.c
+++ b/drivers/net/ethernet/stmicro/stmmac/altr_tse_pcs.c
@@ -37,6 +37,7 @@
#define TSE_PCS_CONTROL_AN_EN_MASK BIT(12)
#define TSE_PCS_CONTROL_REG0x00
#define TSE_PCS_CONTROL_RESTART_AN_MASKBIT(9)
+#define TSE_PCS_CTRL_AUTONEG_SGMII 0x1140
#define TSE_PCS_IF_MODE_REG0x28
#define TSE_PCS_LINK_TIMER_0_REG 0x24
#define TSE_PCS_LINK_TIMER_1_REG 0x26
@@ -65,6 +66,7 @@
#define TSE_PCS_SW_RESET_TIMEOUT 100
#define TSE_PCS_USE_SGMII_AN_MASK BIT(1)
#define TSE_PCS_USE_SGMII_ENA BIT(0)
+#define TSE_PCS_IF_USE_SGMII 0x03
#define SGMII_ADAPTER_CTRL_REG 0x00
#define SGMII_ADAPTER_DISABLE 0x0001
@@ -101,7 +103,9 @@ int tse_pcs_init(void __iomem *base, struct tse_pcs *pcs)
{
int ret = 0;
- writew(TSE_PCS_USE_SGMII_ENA, base + TSE_PCS_IF_MODE_REG);
+ writew(TSE_PCS_IF_USE_SGMII, base + TSE_PCS_IF_MODE_REG);
+
+ writew(TSE_PCS_CTRL_AUTONEG_SGMII, base + TSE_PCS_CONTROL_REG);
writew(TSE_PCS_SGMII_LINK_TIMER_0, base + TSE_PCS_LINK_TIMER_0_REG);
writew(TSE_PCS_SGMII_LINK_TIMER_1, base + TSE_PCS_LINK_TIMER_1_REG);
--
2.7.4
