Re: [PATCH net] net: dsa: bcm_sf2: Clear IDDQ_GLOBAL_PWR bit for PHY

2017-11-23 Thread David Miller 
From: Florian Fainelli 
Date: Tue, 21 Nov 2017 17:37:46 -0800

> The PHY on BCM7278 has an additional bit that needs to be cleared:
> IDDQ_GLOBAL_PWR, without doing this, the PHY remains stuck in reset out
> of suspend/resume cycles.
> 
> Fixes: 0fe9933804eb ("net: dsa: bcm_sf2: Add support for BCM7278 integrated 
> switch")
> Signed-off-by: Florian Fainelli 

Applied and queued up for -stable, thanks!

[PATCH net] net: dsa: bcm_sf2: Clear IDDQ_GLOBAL_PWR bit for PHY

2017-11-21 Thread Florian Fainelli 
The PHY on BCM7278 has an additional bit that needs to be cleared:
IDDQ_GLOBAL_PWR, without doing this, the PHY remains stuck in reset out
of suspend/resume cycles.

Fixes: 0fe9933804eb ("net: dsa: bcm_sf2: Add support for BCM7278 integrated 
switch")
Signed-off-by: Florian Fainelli 
---
 drivers/net/dsa/bcm_sf2.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/net/dsa/bcm_sf2.c b/drivers/net/dsa/bcm_sf2.c
index 93faa1fed6f2..ea01f24f15e7 100644
--- a/drivers/net/dsa/bcm_sf2.c
+++ b/drivers/net/dsa/bcm_sf2.c
@@ -95,7 +95,7 @@ static void bcm_sf2_gphy_enable_set(struct dsa_switch *ds, 
bool enable)
reg = reg_readl(priv, REG_SPHY_CNTRL);
if (enable) {
reg |= PHY_RESET;
-   reg &= ~(EXT_PWR_DOWN | IDDQ_BIAS | CK25_DIS);
+   reg &= ~(EXT_PWR_DOWN | IDDQ_BIAS | IDDQ_GLOBAL_PWR | CK25_DIS);
reg_writel(priv, reg, REG_SPHY_CNTRL);
udelay(21);
reg = reg_readl(priv, REG_SPHY_CNTRL);
-- 
2.9.3