Re: [PATCH v4 1/2] net: phy: DP83822 initial driver submission
Andrew Thanks for the review On 10/09/2017 02:12 PM, Andrew F. Davis wrote: > On 10/09/2017 11:59 AM, Dan Murphy wrote: >> Add support for the TI DP83822 10/100Mbit ethernet phy. >> >> The DP83822 provides flexibility to connect to a MAC through a >> standard MII, RMII or RGMII interface. >> >> In addition the DP83822 needs to be removed from the DP83848 driver >> as the WoL support is added here for this device. >> >> Datasheet: >> http://www.ti.com/product/DP83822I/datasheet >> >> Signed-off-by: Dan Murphy> --- >> >> v4 - Squash DP83822 removal patch into this patch - >> https://www.mail-archive.com/netdev@vger.kernel.org/msg192424.html >> >> v3 - Fixed WoL indication bit and removed mutex for suspend/resume - >> https://www.mail-archive.com/netdev@vger.kernel.org/msg191891.html and >> https://www.mail-archive.com/netdev@vger.kernel.org/msg191665.html >> >> v2 - Updated per comments. Removed unnessary parantheis, called >> genphy_suspend/ >> resume routines and then performing WoL changes, reworked sopass storage and >> reduced >> the number of phy reads, and moved WOL_SECURE_ON - >> https://www.mail-archive.com/netdev@vger.kernel.org/msg191392.html >> >> drivers/net/phy/Kconfig | 5 + >> drivers/net/phy/Makefile | 1 + >> drivers/net/phy/dp83822.c | 302 >> ++ >> drivers/net/phy/dp83848.c | 3 - >> 4 files changed, 308 insertions(+), 3 deletions(-) >> create mode 100644 drivers/net/phy/dp83822.c >> >> diff --git a/drivers/net/phy/Kconfig b/drivers/net/phy/Kconfig >> index cd931cf9dcc2..8e78a482e09e 100644 >> --- a/drivers/net/phy/Kconfig >> +++ b/drivers/net/phy/Kconfig >> @@ -277,6 +277,11 @@ config DAVICOM_PHY >> ---help--- >>Currently supports dm9161e and dm9131 >> >> +config DP83822_PHY >> +tristate "Texas Instruments DP83822 PHY" >> +---help--- >> + Supports the DP83822 PHY. >> + >> config DP83848_PHY >> tristate "Texas Instruments DP83848 PHY" >> ---help--- >> diff --git a/drivers/net/phy/Makefile b/drivers/net/phy/Makefile >> index 416df92fbf4f..df3b82ba8550 100644 >> --- a/drivers/net/phy/Makefile >> +++ b/drivers/net/phy/Makefile >> @@ -55,6 +55,7 @@ obj-$(CONFIG_CICADA_PHY) += cicada.o >> obj-$(CONFIG_CORTINA_PHY) += cortina.o >> obj-$(CONFIG_DAVICOM_PHY) += davicom.o >> obj-$(CONFIG_DP83640_PHY) += dp83640.o >> +obj-$(CONFIG_DP83822_PHY) += dp83822.o >> obj-$(CONFIG_DP83848_PHY) += dp83848.o >> obj-$(CONFIG_DP83867_PHY) += dp83867.o >> obj-$(CONFIG_FIXED_PHY) += fixed_phy.o >> diff --git a/drivers/net/phy/dp83822.c b/drivers/net/phy/dp83822.c >> new file mode 100644 >> index ..de196dbc46cd >> --- /dev/null >> +++ b/drivers/net/phy/dp83822.c >> @@ -0,0 +1,302 @@ >> +/* >> + * Driver for the Texas Instruments DP83822 PHY >> + * >> + * Copyright (C) 2017 Texas Instruments Inc. >> + * >> + * This program is free software; you can redistribute it and/or modify >> + * it under the terms of the GNU General Public License as published by >> + * the Free Software Foundation; either version 2 of the License. >> + * >> + * This program is distributed in the hope that it will be useful, >> + * but WITHOUT ANY WARRANTY; without even the implied warranty of >> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the >> + * GNU General Public License for more details. >> + */ >> + >> +#include >> +#include >> +#include >> +#include >> +#include >> +#include >> +#include >> +#include >> + >> +#define DP83822_PHY_ID 0x2000a240 >> +#define DP83822_DEVADDR 0x1f >> + >> +#define MII_DP83822_MISR1 0x12 >> +#define MII_DP83822_MISR2 0x13 >> +#define MII_DP83822_RESET_CTRL 0x1f >> + >> +#define DP83822_HW_RESETBIT(15) >> +#define DP83822_SW_RESETBIT(14) >> + >> +/* MISR1 bits */ >> +#define DP83822_RX_ERR_HF_INT_ENBIT(0) >> +#define DP83822_FALSE_CARRIER_HF_INT_EN BIT(1) >> +#define DP83822_ANEG_COMPLETE_INT_ENBIT(2) >> +#define DP83822_DUP_MODE_CHANGE_INT_EN BIT(3) >> +#define DP83822_SPEED_CHANGED_INT_ENBIT(4) >> +#define DP83822_LINK_STAT_INT_ENBIT(5) >> +#define DP83822_ENERGY_DET_INT_EN BIT(6) >> +#define DP83822_LINK_QUAL_INT_ENBIT(7) >> + >> +/* MISR2 bits */ >> +#define DP83822_JABBER_DET_INT_EN BIT(0) >> +#define DP83822_WOL_PKT_INT_EN BIT(1) >> +#define DP83822_SLEEP_MODE_INT_EN BIT(2) >> +#define DP83822_MDI_XOVER_INT_ENBIT(3) >> +#define DP83822_LB_FIFO_INT_EN BIT(4) >> +#define DP83822_PAGE_RX_INT_EN BIT(5) >> +#define DP83822_ANEG_ERR_INT_EN BIT(6) >> +#define DP83822_EEE_ERROR_CHANGE_INT_EN BIT(7) >> + >> +/* INT_STAT1 bits */ >> +#define DP83822_WOL_INT_EN BIT(4) >> +#define DP83822_WOL_INT_STATBIT(12) >> + >> +#define MII_DP83822_RXSOP1 0x04a5 >> +#define MII_DP83822_RXSOP2 0x04a6 >> +#define MII_DP83822_RXSOP3 0x04a7 >> + >> +/* WoL Registers */ >>
Re: [PATCH v4 1/2] net: phy: DP83822 initial driver submission
On 10/09/2017 11:59 AM, Dan Murphy wrote: > Add support for the TI DP83822 10/100Mbit ethernet phy. > > The DP83822 provides flexibility to connect to a MAC through a > standard MII, RMII or RGMII interface. > > In addition the DP83822 needs to be removed from the DP83848 driver > as the WoL support is added here for this device. > > Datasheet: > http://www.ti.com/product/DP83822I/datasheet > > Signed-off-by: Dan Murphy> --- > > v4 - Squash DP83822 removal patch into this patch - > https://www.mail-archive.com/netdev@vger.kernel.org/msg192424.html > > v3 - Fixed WoL indication bit and removed mutex for suspend/resume - > https://www.mail-archive.com/netdev@vger.kernel.org/msg191891.html and > https://www.mail-archive.com/netdev@vger.kernel.org/msg191665.html > > v2 - Updated per comments. Removed unnessary parantheis, called > genphy_suspend/ > resume routines and then performing WoL changes, reworked sopass storage and > reduced > the number of phy reads, and moved WOL_SECURE_ON - > https://www.mail-archive.com/netdev@vger.kernel.org/msg191392.html > > drivers/net/phy/Kconfig | 5 + > drivers/net/phy/Makefile | 1 + > drivers/net/phy/dp83822.c | 302 > ++ > drivers/net/phy/dp83848.c | 3 - > 4 files changed, 308 insertions(+), 3 deletions(-) > create mode 100644 drivers/net/phy/dp83822.c > > diff --git a/drivers/net/phy/Kconfig b/drivers/net/phy/Kconfig > index cd931cf9dcc2..8e78a482e09e 100644 > --- a/drivers/net/phy/Kconfig > +++ b/drivers/net/phy/Kconfig > @@ -277,6 +277,11 @@ config DAVICOM_PHY > ---help--- > Currently supports dm9161e and dm9131 > > +config DP83822_PHY > + tristate "Texas Instruments DP83822 PHY" > + ---help--- > + Supports the DP83822 PHY. > + > config DP83848_PHY > tristate "Texas Instruments DP83848 PHY" > ---help--- > diff --git a/drivers/net/phy/Makefile b/drivers/net/phy/Makefile > index 416df92fbf4f..df3b82ba8550 100644 > --- a/drivers/net/phy/Makefile > +++ b/drivers/net/phy/Makefile > @@ -55,6 +55,7 @@ obj-$(CONFIG_CICADA_PHY)+= cicada.o > obj-$(CONFIG_CORTINA_PHY)+= cortina.o > obj-$(CONFIG_DAVICOM_PHY)+= davicom.o > obj-$(CONFIG_DP83640_PHY)+= dp83640.o > +obj-$(CONFIG_DP83822_PHY)+= dp83822.o > obj-$(CONFIG_DP83848_PHY)+= dp83848.o > obj-$(CONFIG_DP83867_PHY)+= dp83867.o > obj-$(CONFIG_FIXED_PHY) += fixed_phy.o > diff --git a/drivers/net/phy/dp83822.c b/drivers/net/phy/dp83822.c > new file mode 100644 > index ..de196dbc46cd > --- /dev/null > +++ b/drivers/net/phy/dp83822.c > @@ -0,0 +1,302 @@ > +/* > + * Driver for the Texas Instruments DP83822 PHY > + * > + * Copyright (C) 2017 Texas Instruments Inc. > + * > + * This program is free software; you can redistribute it and/or modify > + * it under the terms of the GNU General Public License as published by > + * the Free Software Foundation; either version 2 of the License. > + * > + * This program is distributed in the hope that it will be useful, > + * but WITHOUT ANY WARRANTY; without even the implied warranty of > + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the > + * GNU General Public License for more details. > + */ > + > +#include > +#include > +#include > +#include > +#include > +#include > +#include > +#include > + > +#define DP83822_PHY_ID 0x2000a240 > +#define DP83822_DEVADDR 0x1f > + > +#define MII_DP83822_MISR10x12 > +#define MII_DP83822_MISR20x13 > +#define MII_DP83822_RESET_CTRL 0x1f > + > +#define DP83822_HW_RESET BIT(15) > +#define DP83822_SW_RESET BIT(14) > + > +/* MISR1 bits */ > +#define DP83822_RX_ERR_HF_INT_EN BIT(0) > +#define DP83822_FALSE_CARRIER_HF_INT_EN BIT(1) > +#define DP83822_ANEG_COMPLETE_INT_EN BIT(2) > +#define DP83822_DUP_MODE_CHANGE_INT_EN BIT(3) > +#define DP83822_SPEED_CHANGED_INT_EN BIT(4) > +#define DP83822_LINK_STAT_INT_EN BIT(5) > +#define DP83822_ENERGY_DET_INT_ENBIT(6) > +#define DP83822_LINK_QUAL_INT_EN BIT(7) > + > +/* MISR2 bits */ > +#define DP83822_JABBER_DET_INT_ENBIT(0) > +#define DP83822_WOL_PKT_INT_EN BIT(1) > +#define DP83822_SLEEP_MODE_INT_ENBIT(2) > +#define DP83822_MDI_XOVER_INT_EN BIT(3) > +#define DP83822_LB_FIFO_INT_EN BIT(4) > +#define DP83822_PAGE_RX_INT_EN BIT(5) > +#define DP83822_ANEG_ERR_INT_EN BIT(6) > +#define DP83822_EEE_ERROR_CHANGE_INT_EN BIT(7) > + > +/* INT_STAT1 bits */ > +#define DP83822_WOL_INT_EN BIT(4) > +#define DP83822_WOL_INT_STAT BIT(12) > + > +#define MII_DP83822_RXSOP1 0x04a5 > +#define MII_DP83822_RXSOP2 0x04a6 > +#define MII_DP83822_RXSOP3 0x04a7 > + > +/* WoL Registers */ > +#define MII_DP83822_WOL_CFG 0x04a0 > +#define MII_DP83822_WOL_STAT0x04a1 > +#define MII_DP83822_WOL_DA1 0x04a2 > +#define MII_DP83822_WOL_DA2 0x04a3
[PATCH v4 1/2] net: phy: DP83822 initial driver submission
Add support for the TI DP83822 10/100Mbit ethernet phy. The DP83822 provides flexibility to connect to a MAC through a standard MII, RMII or RGMII interface. In addition the DP83822 needs to be removed from the DP83848 driver as the WoL support is added here for this device. Datasheet: http://www.ti.com/product/DP83822I/datasheet Signed-off-by: Dan Murphy--- v4 - Squash DP83822 removal patch into this patch - https://www.mail-archive.com/netdev@vger.kernel.org/msg192424.html v3 - Fixed WoL indication bit and removed mutex for suspend/resume - https://www.mail-archive.com/netdev@vger.kernel.org/msg191891.html and https://www.mail-archive.com/netdev@vger.kernel.org/msg191665.html v2 - Updated per comments. Removed unnessary parantheis, called genphy_suspend/ resume routines and then performing WoL changes, reworked sopass storage and reduced the number of phy reads, and moved WOL_SECURE_ON - https://www.mail-archive.com/netdev@vger.kernel.org/msg191392.html drivers/net/phy/Kconfig | 5 + drivers/net/phy/Makefile | 1 + drivers/net/phy/dp83822.c | 302 ++ drivers/net/phy/dp83848.c | 3 - 4 files changed, 308 insertions(+), 3 deletions(-) create mode 100644 drivers/net/phy/dp83822.c diff --git a/drivers/net/phy/Kconfig b/drivers/net/phy/Kconfig index cd931cf9dcc2..8e78a482e09e 100644 --- a/drivers/net/phy/Kconfig +++ b/drivers/net/phy/Kconfig @@ -277,6 +277,11 @@ config DAVICOM_PHY ---help--- Currently supports dm9161e and dm9131 +config DP83822_PHY + tristate "Texas Instruments DP83822 PHY" + ---help--- + Supports the DP83822 PHY. + config DP83848_PHY tristate "Texas Instruments DP83848 PHY" ---help--- diff --git a/drivers/net/phy/Makefile b/drivers/net/phy/Makefile index 416df92fbf4f..df3b82ba8550 100644 --- a/drivers/net/phy/Makefile +++ b/drivers/net/phy/Makefile @@ -55,6 +55,7 @@ obj-$(CONFIG_CICADA_PHY) += cicada.o obj-$(CONFIG_CORTINA_PHY) += cortina.o obj-$(CONFIG_DAVICOM_PHY) += davicom.o obj-$(CONFIG_DP83640_PHY) += dp83640.o +obj-$(CONFIG_DP83822_PHY) += dp83822.o obj-$(CONFIG_DP83848_PHY) += dp83848.o obj-$(CONFIG_DP83867_PHY) += dp83867.o obj-$(CONFIG_FIXED_PHY)+= fixed_phy.o diff --git a/drivers/net/phy/dp83822.c b/drivers/net/phy/dp83822.c new file mode 100644 index ..de196dbc46cd --- /dev/null +++ b/drivers/net/phy/dp83822.c @@ -0,0 +1,302 @@ +/* + * Driver for the Texas Instruments DP83822 PHY + * + * Copyright (C) 2017 Texas Instruments Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#include +#include +#include +#include +#include +#include +#include +#include + +#define DP83822_PHY_ID 0x2000a240 +#define DP83822_DEVADDR0x1f + +#define MII_DP83822_MISR1 0x12 +#define MII_DP83822_MISR2 0x13 +#define MII_DP83822_RESET_CTRL 0x1f + +#define DP83822_HW_RESET BIT(15) +#define DP83822_SW_RESET BIT(14) + +/* MISR1 bits */ +#define DP83822_RX_ERR_HF_INT_EN BIT(0) +#define DP83822_FALSE_CARRIER_HF_INT_ENBIT(1) +#define DP83822_ANEG_COMPLETE_INT_EN BIT(2) +#define DP83822_DUP_MODE_CHANGE_INT_EN BIT(3) +#define DP83822_SPEED_CHANGED_INT_EN BIT(4) +#define DP83822_LINK_STAT_INT_EN BIT(5) +#define DP83822_ENERGY_DET_INT_EN BIT(6) +#define DP83822_LINK_QUAL_INT_EN BIT(7) + +/* MISR2 bits */ +#define DP83822_JABBER_DET_INT_EN BIT(0) +#define DP83822_WOL_PKT_INT_EN BIT(1) +#define DP83822_SLEEP_MODE_INT_EN BIT(2) +#define DP83822_MDI_XOVER_INT_EN BIT(3) +#define DP83822_LB_FIFO_INT_EN BIT(4) +#define DP83822_PAGE_RX_INT_EN BIT(5) +#define DP83822_ANEG_ERR_INT_ENBIT(6) +#define DP83822_EEE_ERROR_CHANGE_INT_ENBIT(7) + +/* INT_STAT1 bits */ +#define DP83822_WOL_INT_EN BIT(4) +#define DP83822_WOL_INT_STAT BIT(12) + +#define MII_DP83822_RXSOP1 0x04a5 +#defineMII_DP83822_RXSOP2 0x04a6 +#defineMII_DP83822_RXSOP3 0x04a7 + +/* WoL Registers */ +#defineMII_DP83822_WOL_CFG 0x04a0 +#defineMII_DP83822_WOL_STAT0x04a1 +#defineMII_DP83822_WOL_DA1 0x04a2 +#defineMII_DP83822_WOL_DA2 0x04a3 +#defineMII_DP83822_WOL_DA3 0x04a4 + +/* WoL bits */ +#define DP83822_WOL_MAGIC_EN BIT(1) +#define DP83822_WOL_SECURE_ON BIT(5) +#define DP83822_WOL_EN BIT(7) +#define DP83822_WOL_INDICATION_SEL BIT(8) +#define DP83822_WOL_CLR_INDICATION BIT(11) +