Re: [PATCHv2 2/3] net: socionext: Add Synquacer NetSec driver

[Jassi Brar]

On Wed, Dec 13, 2017 at 2:18 AM, Andrew Lunn  wrote:
>> > +static int netsec_mac_update_to_phy_state(struct netsec_priv *priv)
>> > +{
>> > +   struct phy_device *phydev = priv->ndev->phydev;
>> > +   u32 value = 0;
>> > +
>> > +   value = phydev->duplex ? NETSEC_GMAC_MCR_REG_FULL_DUPLEX_COMMON :
>> > +NETSEC_GMAC_MCR_REG_HALF_DUPLEX_COMMON;
>> > +
>> > +   if (phydev->speed != SPEED_1000)
>> > +   value |= NETSEC_MCR_PS;
>> > +
>> > +   if (priv->phy_interface != PHY_INTERFACE_MODE_GMII &&
>> > +   phydev->speed == SPEED_100)
>> > +   value |= NETSEC_GMAC_MCR_REG_FES;
>> > +
>> > +   value |= NETSEC_GMAC_MCR_REG_CST | NETSEC_GMAC_MCR_REG_JE;
>> > +
>> > +   if (priv->phy_interface == PHY_INTERFACE_MODE_RGMII)
>> > +   value |= NETSEC_GMAC_MCR_REG_IBN;
>
> phy_interface_mode_is_rgmii() ??
>
Yes, thank you.

Re: [PATCHv2 2/3] net: socionext: Add Synquacer NetSec driver

[Jassi Brar]

On Tue, Dec 12, 2017 at 10:54 PM, Ard Biesheuvel
 wrote:
> On 12 December 2017 at 17:15,   wrote:

>> +
>> +static int netsec_netdev_load_microcode(struct netsec_priv *priv)
>> +{
>> +   int err;
>> +
>> +   err = netsec_netdev_load_ucode_region(
>> +   priv, NETSEC_REG_DMAC_HM_CMD_BUF,
>> +   le32_to_cpup(priv->eeprom_base + 
>> NETSEC_EEPROM_HM_ME_ADDRESS_H),
>> +   le32_to_cpup(priv->eeprom_base + 
>> NETSEC_EEPROM_HM_ME_ADDRESS_L),
>> +   le32_to_cpup(priv->eeprom_base + NETSEC_EEPROM_HM_ME_SIZE));
>
> ... here, and in other places below, you are still dereferencing
> eeprom_base as if it is a pointer, which is not allowed with in the
> __iomem address space. This should use readl() instead [which happens
> to incorporate the endian swap as well]
>
Ahh, how could it have been just two revisions!

thanks

Re: [PATCHv2 2/3] net: socionext: Add Synquacer NetSec driver

[Andrew Lunn]

> > +static int netsec_mac_update_to_phy_state(struct netsec_priv *priv)
> > +{
> > +   struct phy_device *phydev = priv->ndev->phydev;
> > +   u32 value = 0;
> > +
> > +   value = phydev->duplex ? NETSEC_GMAC_MCR_REG_FULL_DUPLEX_COMMON :
> > +NETSEC_GMAC_MCR_REG_HALF_DUPLEX_COMMON;
> > +
> > +   if (phydev->speed != SPEED_1000)
> > +   value |= NETSEC_MCR_PS;
> > +
> > +   if (priv->phy_interface != PHY_INTERFACE_MODE_GMII &&
> > +   phydev->speed == SPEED_100)
> > +   value |= NETSEC_GMAC_MCR_REG_FES;
> > +
> > +   value |= NETSEC_GMAC_MCR_REG_CST | NETSEC_GMAC_MCR_REG_JE;
> > +
> > +   if (priv->phy_interface == PHY_INTERFACE_MODE_RGMII)
> > +   value |= NETSEC_GMAC_MCR_REG_IBN;

phy_interface_mode_is_rgmii() ??

  Andrew

Re: [PATCHv2 2/3] net: socionext: Add Synquacer NetSec driver

[Andrew Lunn]

> > +static int netsec_register_mdio(struct netsec_priv *priv, u32 phy_addr)
> > +{
> > +   struct mii_bus *bus;
> > +   int ret;
> > +
> > +   bus = devm_mdiobus_alloc(priv->dev);
> > +   if (!bus)
> > +   return -ENOMEM;
> > +
> > +   snprintf(bus->id, MII_BUS_ID_SIZE, "%s", dev_name(priv->dev));
> > +   bus->priv = priv;
> > +   bus->name = "SNI NETSEC MDIO";
> > +   bus->read = netsec_phy_read;
> > +   bus->write = netsec_phy_write;
> > +   bus->parent = priv->dev;
> > +   priv->mii_bus = bus;
> > +
> > +   if (dev_of_node(priv->dev)) {
> > +   ret = of_mdiobus_register(bus, dev_of_node(priv->dev));
> > +   if (ret) {
> > +   dev_err(priv->dev, "mdiobus register err(%d)\n", 
> > ret);
> > +   return ret;
> > +   }
> > +   } else {
> > +   /* Mask out all PHYs from auto probing. */
> > +   bus->phy_mask = ~0;
> > +   ret = mdiobus_register(bus);
> > +   if (ret) {
> > +   dev_err(priv->dev, "mdiobus register err(%d)\n", 
> > ret);
> > +   return ret;
> > +   }
> > +
> > +   priv->phydev = get_phy_device(priv->mii_bus, phy_addr, 
> > false);
> > +   if (IS_ERR(priv->phydev)) {
> > +   ret = PTR_ERR(priv->phydev);
> > +   dev_err(priv->dev, "get_phy_device err(%d)\n", ret);
> > +   priv->phydev = NULL;
> > +   return -ENODEV;
> > +   }
> > +
> > +   ret = phy_device_register(priv->phydev);
> > +   if (ret)
> > +   dev_err(priv->dev,
> > +   "phy_device_register err(%d)\n", ret);

You should unregister the mdio bus here.

> > +   }
> > +
> > +   return ret;
> > +}

  Andrew

Re: [PATCHv2 2/3] net: socionext: Add Synquacer NetSec driver

[Ard Biesheuvel]

Hi Jassi,


On 12 December 2017 at 17:15,   wrote:
> From: Jassi Brar 
>
> This driver adds support for Socionext "netsec" IP Gigabit
> Ethernet + PHY IP used in the Synquacer SC2A11 SoC.
>
> Signed-off-by: Ard Biesheuvel 
> Signed-off-by: Jassi Brar 
> ---
>  drivers/net/ethernet/Kconfig|1 +
>  drivers/net/ethernet/Makefile   |1 +
>  drivers/net/ethernet/socionext/Kconfig  |   29 +
>  drivers/net/ethernet/socionext/Makefile |1 +
>  drivers/net/ethernet/socionext/netsec.c | 1826 
> +++
>  5 files changed, 1858 insertions(+)
>  create mode 100644 drivers/net/ethernet/socionext/Kconfig
>  create mode 100644 drivers/net/ethernet/socionext/Makefile
>  create mode 100644 drivers/net/ethernet/socionext/netsec.c
>
[...]
> diff --git a/drivers/net/ethernet/socionext/netsec.c 
> b/drivers/net/ethernet/socionext/netsec.c
> new file mode 100644
> index 000..4472303a
> --- /dev/null
> +++ b/drivers/net/ethernet/socionext/netsec.c
> @@ -0,0 +1,1826 @@
> +// SPDX-License-Identifier: GPL-2.0
> +
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +
> +#include 
> +#include 
> +
> +#define NETSEC_REG_SOFT_RST0x104
> +#define NETSEC_REG_COM_INIT0x120
> +
> +#define NETSEC_REG_TOP_STATUS  0x200
> +#define NETSEC_IRQ_RX  BIT(1)
> +#define NETSEC_IRQ_TX  BIT(0)
> +
> +#define NETSEC_REG_TOP_INTEN   0x204
> +#define NETSEC_REG_INTEN_SET   0x234
> +#define NETSEC_REG_INTEN_CLR   0x238
> +
> +#define NETSEC_REG_NRM_TX_STATUS   0x400
> +#define NETSEC_REG_NRM_TX_INTEN0x404
> +#define NETSEC_REG_NRM_TX_INTEN_SET0x428
> +#define NETSEC_REG_NRM_TX_INTEN_CLR0x42c
> +#define NRM_TX_ST_NTOWNR   BIT(17)
> +#define NRM_TX_ST_TR_ERR   BIT(16)
> +#define NRM_TX_ST_TXDONE   BIT(15)
> +#define NRM_TX_ST_TMREXP   BIT(14)
> +
> +#define NETSEC_REG_NRM_RX_STATUS   0x440
> +#define NETSEC_REG_NRM_RX_INTEN0x444
> +#define NETSEC_REG_NRM_RX_INTEN_SET0x468
> +#define NETSEC_REG_NRM_RX_INTEN_CLR0x46c
> +#define NRM_RX_ST_RC_ERR   BIT(16)
> +#define NRM_RX_ST_PKTCNT   BIT(15)
> +#define NRM_RX_ST_TMREXP   BIT(14)
> +
> +#define NETSEC_REG_PKT_CMD_BUF 0xd0
> +
> +#define NETSEC_REG_CLK_EN  0x100
> +
> +#define NETSEC_REG_PKT_CTRL0x140
> +
> +#define NETSEC_REG_DMA_TMR_CTRL0x20c
> +#define NETSEC_REG_F_TAIKI_MC_VER  0x22c
> +#define NETSEC_REG_F_TAIKI_VER 0x230
> +#define NETSEC_REG_DMA_HM_CTRL 0x214
> +#define NETSEC_REG_DMA_MH_CTRL 0x220
> +#define NETSEC_REG_ADDR_DIS_CORE   0x218
> +#define NETSEC_REG_DMAC_HM_CMD_BUF 0x210
> +#define NETSEC_REG_DMAC_MH_CMD_BUF 0x21c
> +
> +#define NETSEC_REG_NRM_TX_PKTCNT   0x410
> +
> +#define NETSEC_REG_NRM_TX_DONE_PKTCNT  0x414
> +#define NETSEC_REG_NRM_TX_DONE_TXINT_PKTCNT0x418
> +
> +#define NETSEC_REG_NRM_TX_TMR  0x41c
> +
> +#define NETSEC_REG_NRM_RX_PKTCNT   0x454
> +#define NETSEC_REG_NRM_RX_RXINT_PKTCNT 0x458
> +#define NETSEC_REG_NRM_TX_TXINT_TMR0x420
> +#define NETSEC_REG_NRM_RX_RXINT_TMR0x460
> +
> +#define NETSEC_REG_NRM_RX_TMR  0x45c
> +
> +#define NETSEC_REG_NRM_TX_DESC_START_UP0x434
> +#define NETSEC_REG_NRM_TX_DESC_START_LW0x408
> +#define NETSEC_REG_NRM_RX_DESC_START_UP0x474
> +#define NETSEC_REG_NRM_RX_DESC_START_LW0x448
> +
> +#define NETSEC_REG_NRM_TX_CONFIG   0x430
> +#define NETSEC_REG_NRM_RX_CONFIG   0x470
> +
> +#define MAC_REG_STATUS 0x1024
> +#define MAC_REG_DATA   0x11c0
> +#define MAC_REG_CMD0x11c4
> +#define MAC_REG_FLOW_TH0x11cc
> +#define MAC_REG_INTF_SEL   0x11d4
> +#define MAC_REG_DESC_INIT  0x11fc
> +#define MAC_REG_DESC_SOFT_RST  0x1204
> +#define NETSEC_REG_MODE_TRANS_COMP_STATUS  0x500
> +
> +#define GMAC_REG_MCR   0x
> +#define GMAC_REG_MFFR  0x0004
> +#define GMAC_REG_GAR   0x0010
> +#define GMAC_REG_GDR   0x0014
> +#define GMAC_REG_FCR   0x0018
> +#define GMAC_REG_BMR   0x1000
> +#define GMAC_REG_RDLAR 0x100c
> +#define GMAC_REG_TDLAR 0x1010
> 

[PATCHv2 2/3] net: socionext: Add Synquacer NetSec driver

[jassisinghbrar]

From: Jassi Brar 

This driver adds support for Socionext "netsec" IP Gigabit
Ethernet + PHY IP used in the Synquacer SC2A11 SoC.

Signed-off-by: Ard Biesheuvel 
Signed-off-by: Jassi Brar 
---
 drivers/net/ethernet/Kconfig|1 +
 drivers/net/ethernet/Makefile   |1 +
 drivers/net/ethernet/socionext/Kconfig  |   29 +
 drivers/net/ethernet/socionext/Makefile |1 +
 drivers/net/ethernet/socionext/netsec.c | 1826 +++
 5 files changed, 1858 insertions(+)
 create mode 100644 drivers/net/ethernet/socionext/Kconfig
 create mode 100644 drivers/net/ethernet/socionext/Makefile
 create mode 100644 drivers/net/ethernet/socionext/netsec.c

diff --git a/drivers/net/ethernet/Kconfig b/drivers/net/ethernet/Kconfig
index c604213..d50519e 100644
--- a/drivers/net/ethernet/Kconfig
+++ b/drivers/net/ethernet/Kconfig
@@ -170,6 +170,7 @@ source "drivers/net/ethernet/sis/Kconfig"
 source "drivers/net/ethernet/sfc/Kconfig"
 source "drivers/net/ethernet/sgi/Kconfig"
 source "drivers/net/ethernet/smsc/Kconfig"
+source "drivers/net/ethernet/socionext/Kconfig"
 source "drivers/net/ethernet/stmicro/Kconfig"
 source "drivers/net/ethernet/sun/Kconfig"
 source "drivers/net/ethernet/tehuti/Kconfig"
diff --git a/drivers/net/ethernet/Makefile b/drivers/net/ethernet/Makefile
index 39f62733..6cf5ade 100644
--- a/drivers/net/ethernet/Makefile
+++ b/drivers/net/ethernet/Makefile
@@ -82,6 +82,7 @@ obj-$(CONFIG_SFC) += sfc/
 obj-$(CONFIG_SFC_FALCON) += sfc/falcon/
 obj-$(CONFIG_NET_VENDOR_SGI) += sgi/
 obj-$(CONFIG_NET_VENDOR_SMSC) += smsc/
+obj-$(CONFIG_NET_VENDOR_SOCIONEXT) += socionext/
 obj-$(CONFIG_NET_VENDOR_STMICRO) += stmicro/
 obj-$(CONFIG_NET_VENDOR_SUN) += sun/
 obj-$(CONFIG_NET_VENDOR_TEHUTI) += tehuti/
diff --git a/drivers/net/ethernet/socionext/Kconfig 
b/drivers/net/ethernet/socionext/Kconfig
new file mode 100644
index 000..4601c2f
--- /dev/null
+++ b/drivers/net/ethernet/socionext/Kconfig
@@ -0,0 +1,29 @@
+#
+# Socionext Network device configuration
+#
+
+config NET_VENDOR_SOCIONEXT
+   bool "Socionext devices"
+   default y
+   ---help---
+ If you have a network (Ethernet) card belonging to this class, say Y.
+
+ Note that the answer to this question doesn't directly affect the
+ the questions about Socionext cards. If you say Y, you will be asked
+ for your specific card in the following questions.
+
+if NET_VENDOR_SOCIONEXT
+
+config SNI_NETSEC
+   tristate "NETSEC Driver Support"
+   depends on (ARCH_SYNQUACER || COMPILE_TEST) && OF
+   select PHYLIB
+   select MII
+help
+ Enable to add support for the SocioNext NetSec Gigabit Ethernet
+ controller + PHY, as found on the Synquacer SC2A11 SoC
+
+ To compile this driver as a module, choose M here: the module will be
+ called netsec.  If unsure, say N.
+
+endif # NET_VENDOR_SOCIONEXT
diff --git a/drivers/net/ethernet/socionext/Makefile 
b/drivers/net/ethernet/socionext/Makefile
new file mode 100644
index 000..9505923
--- /dev/null
+++ b/drivers/net/ethernet/socionext/Makefile
@@ -0,0 +1 @@
+obj-$(CONFIG_SNI_NETSEC) += netsec.o
diff --git a/drivers/net/ethernet/socionext/netsec.c 
b/drivers/net/ethernet/socionext/netsec.c
new file mode 100644
index 000..4472303a
--- /dev/null
+++ b/drivers/net/ethernet/socionext/netsec.c
@@ -0,0 +1,1826 @@
+// SPDX-License-Identifier: GPL-2.0
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#include 
+#include 
+
+#define NETSEC_REG_SOFT_RST0x104
+#define NETSEC_REG_COM_INIT0x120
+
+#define NETSEC_REG_TOP_STATUS  0x200
+#define NETSEC_IRQ_RX  BIT(1)
+#define NETSEC_IRQ_TX  BIT(0)
+
+#define NETSEC_REG_TOP_INTEN   0x204
+#define NETSEC_REG_INTEN_SET   0x234
+#define NETSEC_REG_INTEN_CLR   0x238
+
+#define NETSEC_REG_NRM_TX_STATUS   0x400
+#define NETSEC_REG_NRM_TX_INTEN0x404
+#define NETSEC_REG_NRM_TX_INTEN_SET0x428
+#define NETSEC_REG_NRM_TX_INTEN_CLR0x42c
+#define NRM_TX_ST_NTOWNR   BIT(17)
+#define NRM_TX_ST_TR_ERR   BIT(16)
+#define NRM_TX_ST_TXDONE   BIT(15)
+#define NRM_TX_ST_TMREXP   BIT(14)
+
+#define NETSEC_REG_NRM_RX_STATUS   0x440
+#define NETSEC_REG_NRM_RX_INTEN0x444
+#define NETSEC_REG_NRM_RX_INTEN_SET0x468
+#define NETSEC_REG_NRM_RX_INTEN_CLR0x46c
+#define NRM_RX_ST_RC_ERR   BIT(16)
+#define NRM_RX_ST_PKTCNT   BIT(15)
+#define NRM_RX_ST_TMREXP   BIT(14)
+
+#define NETSEC_REG_PKT_CMD_BUF 0xd0
+
+#define NETSEC_REG_CLK_EN  0x100
+
+#define NETSEC_REG_PKT_CTRL0x140
+
+#define NETSEC_REG_DMA_TMR_CTRL