Re: [PATCH 0/7] net: dsa: add QCA AR8xxx switch family support\
On Fri, May 29, 2015 at 04:00:01AM +0200, Andrew Lunn wrote: FYI: I have patches which allow DSA to use two cpu interfaces. Seems to work on my DIR665 with a Marvell Switch. I will post the patches as an RFC. Andrew Does it require the switch CPU ports to support LAG or is it generic enough to allow switch partitioning? -- To unsubscribe from this list: send the line unsubscribe netdev in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH 0/7] net: dsa: add QCA AR8xxx switch family support\
On Fri, May 29, 2015 at 12:58:12PM -0700, Florian Fainelli wrote: On 29/05/15 11:59, Andrew Lunn wrote: On Fri, May 29, 2015 at 11:49:54AM -0700, Mathieu Olivari wrote: On Fri, May 29, 2015 at 04:00:01AM +0200, Andrew Lunn wrote: FYI: I have patches which allow DSA to use two cpu interfaces. Seems to work on my DIR665 with a Marvell Switch. I will post the patches as an RFC. Andrew Does it require the switch CPU ports to support LAG or is it generic enough to allow switch partitioning? When using tags, DSA by default partitions the switch. Each user port is separate from other ports. lan4 will not bridge to lan1 unless you either do it in software, or you implement the .port_join_bridge/.port_leave_bridge/.port_stp_update methods of dsa_switch_driver. What it requires is that for each user port, you can configure what cpu port it should use. Marvell devices have this ability, and at a first look, it seems like SF2 does as well, but i will leave Florian to answer definitively. That's right, such configuration happens by using VLAN_CTL in the context of SF2, by default only Port N and CPU can talk to each other. Bridging ports involving putting them in the same domain, e.g: updating the VLAN_CTL bitmask to include all bridge members. Similar here. That would work for ar8xxx too. -- Florian -- To unsubscribe from this list: send the line unsubscribe netdev in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH 0/7] net: dsa: add QCA AR8xxx switch family support\
What it requires is that for each user port, you can configure what cpu port it should use. Marvell devices have this ability, and at a first look, it seems like SF2 does as well, but i will leave Florian to answer definitively. That's right, such configuration happens by using VLAN_CTL in the context of SF2, by default only Port N and CPU can talk to each other. Bridging ports involving putting them in the same domain, e.g: updating the VLAN_CTL bitmask to include all bridge members. Similar here. That would work for ar8xxx too. Great. I posted the patches. Comments welcome and lets try to make them work for all device types, if they don't already. Andre -- To unsubscribe from this list: send the line unsubscribe netdev in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH 0/7] net: dsa: add QCA AR8xxx switch family support\
On Fri, May 29, 2015 at 11:49:54AM -0700, Mathieu Olivari wrote: On Fri, May 29, 2015 at 04:00:01AM +0200, Andrew Lunn wrote: FYI: I have patches which allow DSA to use two cpu interfaces. Seems to work on my DIR665 with a Marvell Switch. I will post the patches as an RFC. Andrew Does it require the switch CPU ports to support LAG or is it generic enough to allow switch partitioning? When using tags, DSA by default partitions the switch. Each user port is separate from other ports. lan4 will not bridge to lan1 unless you either do it in software, or you implement the .port_join_bridge/.port_leave_bridge/.port_stp_update methods of dsa_switch_driver. What it requires is that for each user port, you can configure what cpu port it should use. Marvell devices have this ability, and at a first look, it seems like SF2 does as well, but i will leave Florian to answer definitively. I will be posting an RFC patchset later today. Andrew -- To unsubscribe from this list: send the line unsubscribe netdev in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH 0/7] net: dsa: add QCA AR8xxx switch family support\
On 29/05/15 11:59, Andrew Lunn wrote: On Fri, May 29, 2015 at 11:49:54AM -0700, Mathieu Olivari wrote: On Fri, May 29, 2015 at 04:00:01AM +0200, Andrew Lunn wrote: FYI: I have patches which allow DSA to use two cpu interfaces. Seems to work on my DIR665 with a Marvell Switch. I will post the patches as an RFC. Andrew Does it require the switch CPU ports to support LAG or is it generic enough to allow switch partitioning? When using tags, DSA by default partitions the switch. Each user port is separate from other ports. lan4 will not bridge to lan1 unless you either do it in software, or you implement the .port_join_bridge/.port_leave_bridge/.port_stp_update methods of dsa_switch_driver. What it requires is that for each user port, you can configure what cpu port it should use. Marvell devices have this ability, and at a first look, it seems like SF2 does as well, but i will leave Florian to answer definitively. That's right, such configuration happens by using VLAN_CTL in the context of SF2, by default only Port N and CPU can talk to each other. Bridging ports involving putting them in the same domain, e.g: updating the VLAN_CTL bitmask to include all bridge members. -- Florian -- To unsubscribe from this list: send the line unsubscribe netdev in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH 0/7] net: dsa: add QCA AR8xxx switch family support
On Thu, May 28, 2015 at 06:42:15PM -0700, Mathieu Olivari wrote: This patch set adds initial support for AR8xxx switches using the DSA subsystem. It currently supports QCA8337 switch, and can be extended to other hardware in the same family. This switch was already discussed in the following thread: https://www.marc.info/?t=14260141744r=1w=2 Below is a typical picture of a QCA8337 used in a standard home gateway configuration: +---+ +---+ | | SGMII | | | eth0+---+ +-- 1000baseT MDI (WAN) |wan| | 7-port +-- 1000baseT MDI (LAN1) | CPU | | ethernet +-- 1000baseT MDI (LAN2) | | RGMII | switch +-- 1000baseT MDI (LAN3) | eth1+---+ w/5 PHYs +-- 1000baseT MDI (LAN4) |lan| | | +---+ +---+ | MDIO | \/ The switch is connected to the CPU using 2 xMII interfaces. As DSA only supports one logical interface to the switch, we split the switch using device-tree information into 2 parts: *port 6 (one of the xMII switch port) will be dedicated to one particular Ethernet port. From a system perspective, it will be seen as a regular PHY. *port 0 (the other xMII port) will act as the switch master interface FYI: I have patches which allow DSA to use two cpu interfaces. Seems to work on my DIR665 with a Marvell Switch. I will post the patches as an RFC. Andrew -- To unsubscribe from this list: send the line unsubscribe netdev in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
