Re: [PATCH 30/31] dt-bindings: nds32 CPU Bindings
>>> Then having both is not valid. The strings should be in order of best >>> match to worst match where worst match is typically either older >>> implementations of IP blocks or generic'ish strings such as "ns16550" >>> for a UART. >> >> Thanks. >> I would like to explain it more clearly. >> They are independent ones in implementations. >> They are implemented based on the same nds32 ISA and architecture spec >> with different configurations >> like cache size, page size, cache type(VIPT/PIPT), pipeline stages... >> Most of them are compatible. >> They use the same toolchain to build vmlinux which can run on >> different nds32 cores. > > Du you have a name for the ISA spec that distinguishes it from other nds32 > versions that are incompatible? If you do, this could be written like > > compatible = "andestech,n13", "andestech,nds32v3.0"; > > to signify that a an 'n13' core implements the 'v3.0' ISA (will it > whatever you call the ISA in reality). > Thanks. I got you. I will use a proper name(maybe 'nds32v3') of ISA in this compatible string in the next version patch.
Re: [PATCH 30/31] dt-bindings: nds32 CPU Bindings
On Fri, Nov 10, 2017 at 7:22 AM, Greentime Huwrote: > 2017-11-09 21:57 GMT+08:00 Rob Herring : >> On Thu, Nov 9, 2017 at 3:39 AM, Greentime Hu wrote: >>> 2017-11-08 21:18 GMT+08:00 Rob Herring : Please Cc the DT list on bindings. >>> >>> Sorry. I am not sure what you mean. >>> Do you mean add devicet...@vger.kernel.org to cc list? >> >> Yes. Use get_maintainers.pl as a guide. > > Roger that! Thanks! > On Tue, Nov 7, 2017 at 11:55 PM, Greentime Hu wrote: > From: Greentime Hu >> > + device_type = "cpu"; > + compatible = "andestech,n13", "andestech,n15"; n13 is a superset of n15? >>> >>> No, they are independent ones. >> >> Then having both is not valid. The strings should be in order of best >> match to worst match where worst match is typically either older >> implementations of IP blocks or generic'ish strings such as "ns16550" >> for a UART. > > Thanks. > I would like to explain it more clearly. > They are independent ones in implementations. > They are implemented based on the same nds32 ISA and architecture spec > with different configurations > like cache size, page size, cache type(VIPT/PIPT), pipeline stages... > Most of them are compatible. > They use the same toolchain to build vmlinux which can run on > different nds32 cores. Du you have a name for the ISA spec that distinguishes it from other nds32 versions that are incompatible? If you do, this could be written like compatible = "andestech,n13", "andestech,nds32v3.0"; to signify that a an 'n13' core implements the 'v3.0' ISA (will it whatever you call the ISA in reality). Arnd
Re: [PATCH 30/31] dt-bindings: nds32 CPU Bindings
2017-11-09 21:57 GMT+08:00 Rob Herring: > On Thu, Nov 9, 2017 at 3:39 AM, Greentime Hu wrote: >> 2017-11-08 21:18 GMT+08:00 Rob Herring : >>> Please Cc the DT list on bindings. >> >> Sorry. I am not sure what you mean. >> Do you mean add devicet...@vger.kernel.org to cc list? > > Yes. Use get_maintainers.pl as a guide. Roger that! Thanks! >>> On Tue, Nov 7, 2017 at 11:55 PM, Greentime Hu wrote: From: Greentime Hu >>> > + device_type = "cpu"; + compatible = "andestech,n13", "andestech,n15"; >>> >>> n13 is a superset of n15? >> >> No, they are independent ones. > > Then having both is not valid. The strings should be in order of best > match to worst match where worst match is typically either older > implementations of IP blocks or generic'ish strings such as "ns16550" > for a UART. Thanks. I would like to explain it more clearly. They are independent ones in implementations. They are implemented based on the same nds32 ISA and architecture spec with different configurations like cache size, page size, cache type(VIPT/PIPT), pipeline stages... Most of them are compatible. They use the same toolchain to build vmlinux which can run on different nds32 cores.
Re: [PATCH 30/31] dt-bindings: nds32 CPU Bindings
On Thu, Nov 9, 2017 at 3:39 AM, Greentime Huwrote: > 2017-11-08 21:18 GMT+08:00 Rob Herring : >> Please Cc the DT list on bindings. > > Sorry. I am not sure what you mean. > Do you mean add devicet...@vger.kernel.org to cc list? Yes. Use get_maintainers.pl as a guide. >> On Tue, Nov 7, 2017 at 11:55 PM, Greentime Hu wrote: >>> From: Greentime Hu >> >>> + device_type = "cpu"; >>> + compatible = "andestech,n13", "andestech,n15"; >> >> n13 is a superset of n15? > > No, they are independent ones. Then having both is not valid. The strings should be in order of best match to worst match where worst match is typically either older implementations of IP blocks or generic'ish strings such as "ns16550" for a UART. Rob
Re: [PATCH 30/31] dt-bindings: nds32 CPU Bindings
2017-11-08 21:18 GMT+08:00 Rob Herring: > Please Cc the DT list on bindings. Sorry. I am not sure what you mean. Do you mean add devicet...@vger.kernel.org to cc list? > On Tue, Nov 7, 2017 at 11:55 PM, Greentime Hu wrote: >> From: Greentime Hu > > Commit message needed. Thanks. I will add more commit messages in the next version patch. >> Signed-off-by: Vincent Chen >> Signed-off-by: Rick Chen >> Signed-off-by: Zong Li >> Signed-off-by: Greentime Hu >> --- >> Documentation/devicetree/bindings/nds32/cpus.txt | 33 >> ++ >> 1 file changed, 33 insertions(+) >> create mode 100644 Documentation/devicetree/bindings/nds32/cpus.txt >> >> diff --git a/Documentation/devicetree/bindings/nds32/cpus.txt >> b/Documentation/devicetree/bindings/nds32/cpus.txt >> new file mode 100644 >> index 000..97394cb >> --- /dev/null >> +++ b/Documentation/devicetree/bindings/nds32/cpus.txt >> @@ -0,0 +1,33 @@ >> +* Andestech Processor Binding >> + >> +This binding specifies what properties must be available in the device tree >> +representation of a Andestech Processor Core, which is the root node in the >> +tree. >> + >> +Required properties: >> + >> + - compatible: >> + Usage: required >> + Value type: >> + Definition: should be one of: >> + "andestech,n13" >> + "andestech,n15" >> + "andestech,d15" >> + "andestech,n10" >> + "andestech,d10" > > SMP supported for any of these? We don't support SMP now. >> + >> +- device_type >> + Usage: required >> + Value type: >> + Definition: must be "cpu" >> + >> +* Examples >> + >> +/ { >> + cpus { >> + cpu@0 { > > Needs a reg property or drop the unit address. Thanks. I will fix it in the next version patch. >> + device_type = "cpu"; >> + compatible = "andestech,n13", "andestech,n15"; > > n13 is a superset of n15? No, they are independent ones.
Re: [PATCH 30/31] dt-bindings: nds32 CPU Bindings
Please Cc the DT list on bindings. On Tue, Nov 7, 2017 at 11:55 PM, Greentime Huwrote: > From: Greentime Hu Commit message needed. > Signed-off-by: Vincent Chen > Signed-off-by: Rick Chen > Signed-off-by: Zong Li > Signed-off-by: Greentime Hu > --- > Documentation/devicetree/bindings/nds32/cpus.txt | 33 > ++ > 1 file changed, 33 insertions(+) > create mode 100644 Documentation/devicetree/bindings/nds32/cpus.txt > > diff --git a/Documentation/devicetree/bindings/nds32/cpus.txt > b/Documentation/devicetree/bindings/nds32/cpus.txt > new file mode 100644 > index 000..97394cb > --- /dev/null > +++ b/Documentation/devicetree/bindings/nds32/cpus.txt > @@ -0,0 +1,33 @@ > +* Andestech Processor Binding > + > +This binding specifies what properties must be available in the device tree > +representation of a Andestech Processor Core, which is the root node in the > +tree. > + > +Required properties: > + > + - compatible: > + Usage: required > + Value type: > + Definition: should be one of: > + "andestech,n13" > + "andestech,n15" > + "andestech,d15" > + "andestech,n10" > + "andestech,d10" SMP supported for any of these? > + > +- device_type > + Usage: required > + Value type: > + Definition: must be "cpu" > + > +* Examples > + > +/ { > + cpus { > + cpu@0 { Needs a reg property or drop the unit address. > + device_type = "cpu"; > + compatible = "andestech,n13", "andestech,n15"; n13 is a superset of n15? > + }; > + }; > +}; > -- > 1.7.9.5 >