Re: [PATCH net] amd-xgbe: Fix race between access of desc and desc index

2015-11-01 Thread David Miller
From: Tom Lendacky 
Date: Wed, 28 Oct 2015 08:48:36 -0500

> On 10/27/2015 09:50 PM, David Miller wrote:
>> From: Tom Lendacky 
>> Date: Mon, 26 Oct 2015 17:13:54 -0500
>>
>>> During Tx cleanup it's still possible for the descriptor data to be
>>> read ahead of the descriptor index. A memory barrier is required
>>> between
>>> the read of the descriptor index and the start of the Tx cleanup loop.
>>> This allows a change to a lighter-weight barrier in the Tx transmit
>>> routine just before updating the current descriptor index.
>>>
>>> Since the memory barrier does result in extra overhead on arm64, keep
>>> the previous change to not chase the current descriptor value. This
>>> prevents the execution of the barrier for each loop performed.
>>>
>>> Suggested-by: Alexander Duyck 
>>> Signed-off-by: Tom Lendacky 
>>
>> Applied, thanks.
>>
> 
> Thanks David.  Could you queue this up for the 4.1 and 4.2 stable
> trees?

Ok, done.
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Re: [PATCH net] amd-xgbe: Fix race between access of desc and desc index

2015-10-28 Thread Tom Lendacky

On 10/27/2015 09:50 PM, David Miller wrote:

From: Tom Lendacky 
Date: Mon, 26 Oct 2015 17:13:54 -0500


During Tx cleanup it's still possible for the descriptor data to be
read ahead of the descriptor index. A memory barrier is required between
the read of the descriptor index and the start of the Tx cleanup loop.
This allows a change to a lighter-weight barrier in the Tx transmit
routine just before updating the current descriptor index.

Since the memory barrier does result in extra overhead on arm64, keep
the previous change to not chase the current descriptor value. This
prevents the execution of the barrier for each loop performed.

Suggested-by: Alexander Duyck 
Signed-off-by: Tom Lendacky 


Applied, thanks.



Thanks David.  Could you queue this up for the 4.1 and 4.2 stable
trees?

Thanks,
Tom
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Re: [PATCH net] amd-xgbe: Fix race between access of desc and desc index

2015-10-27 Thread David Miller
From: Tom Lendacky 
Date: Mon, 26 Oct 2015 17:13:54 -0500

> During Tx cleanup it's still possible for the descriptor data to be
> read ahead of the descriptor index. A memory barrier is required between
> the read of the descriptor index and the start of the Tx cleanup loop.
> This allows a change to a lighter-weight barrier in the Tx transmit
> routine just before updating the current descriptor index.
> 
> Since the memory barrier does result in extra overhead on arm64, keep
> the previous change to not chase the current descriptor value. This
> prevents the execution of the barrier for each loop performed.
> 
> Suggested-by: Alexander Duyck 
> Signed-off-by: Tom Lendacky 

Applied, thanks.
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