[Nouveau] [Bug 36744] [NVA5] BUG: unable to handle kernel NULL pointer dereference
https://bugs.freedesktop.org/show_bug.cgi?id=36744 --- Comment #1 from Patrice Mandin patman...@gmail.com 2011-05-06 13:08:25 PDT --- Booting kernel without 'nouveau.noaccel=1' makes it work. So it appears the noaccel case has been broken by said git commit. -- Configure bugmail: https://bugs.freedesktop.org/userprefs.cgi?tab=email --- You are receiving this mail because: --- You are the assignee for the bug. ___ Nouveau mailing list Nouveau@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/nouveau
Re: [Nouveau] [PATCH 2/2] drm/nouveau/nv50: reclock memory using PMS on nv50
On Sat, 30 Apr 2011 01:17:13 +0100, Martin Peres martin.pe...@free.fr wrote:
From: Martin Peres martin.pe...@ensi-bourges.fr
v2: Reclock memory after reclocking the other engines
Signed-off-by: Martin Peres martin.pe...@ensi-bourges.fr
---
drivers/gpu/drm/nouveau/nouveau_pm.c | 11 +--
drivers/gpu/drm/nouveau/nouveau_pms.h | 98 +
drivers/gpu/drm/nouveau/nv50_pm.c | 153 ++---
3 files changed, 242 insertions(+), 20 deletions(-)
create mode 100644 drivers/gpu/drm/nouveau/nouveau_pms.h
diff --git a/drivers/gpu/drm/nouveau/nouveau_pm.c
b/drivers/gpu/drm/nouveau/nouveau_pm.c
index 88f58b1..44d01bb 100644
--- a/drivers/gpu/drm/nouveau/nouveau_pm.c
+++ b/drivers/gpu/drm/nouveau/nouveau_pm.c
@@ -45,10 +45,6 @@ nouveau_pm_clock_set(struct drm_device *dev, struct
nouveau_pm_level *perflvl,
if (khz == 0)
return 0;
- /* Do no reclock the memory if the frequencies didn't change */
- if (id == PLL_MEMORY pm-cur-memory == khz)
- return 0;
-
pre_state = pm-clock_pre(dev, perflvl, id, khz);
if (IS_ERR(pre_state))
return PTR_ERR(pre_state);
@@ -100,7 +96,6 @@ nouveau_pm_perflvl_set(struct drm_device *dev, struct
nouveau_pm_level *perflvl)
nouveau_pm_clock_set(dev, perflvl, PLL_CORE, perflvl-core);
nouveau_pm_clock_set(dev, perflvl, PLL_SHADER, perflvl-shader);
- nouveau_pm_clock_set(dev, perflvl, PLL_MEMORY, perflvl-memory);
nouveau_pm_clock_set(dev, perflvl, PLL_UNK05, perflvl-unk05);
/* Decrease the voltage if needed*/
@@ -110,11 +105,13 @@ nouveau_pm_perflvl_set(struct drm_device *dev, struct
nouveau_pm_level *perflvl)
/* Wait for PLLs to stabilize */
udelay(100);
+ pm-unpause(dev);
+
+ nouveau_pm_clock_set(dev, perflvl, PLL_MEMORY, perflvl-memory);
+
pm-cur = perflvl;
ret = 0;
- pm-unpause(dev);
-
NV_DEBUG(dev, Reclocking took %lluns\n,
(nv04_timer_read(dev) - start));
diff --git a/drivers/gpu/drm/nouveau/nouveau_pms.h
b/drivers/gpu/drm/nouveau/nouveau_pms.h
new file mode 100644
index 000..d7a445b
--- /dev/null
+++ b/drivers/gpu/drm/nouveau/nouveau_pms.h
@@ -0,0 +1,98 @@
+/*
+ * Copyright 2010 Red Hat Inc.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the Software),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED AS IS, WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
+ * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * Authors: Ben Skeggs
+ */
+
+#ifndef __NOUVEAU_PMS_H__
+#define __NOUVEAU_PMS_H__
+
+struct pms_ucode {
+ u8 data[256];
+ union {
+ u8 *u08;
+ u16 *u16;
+ u32 *u32;
+ } ptr;
+ u16 len;
+
+ u32 reg;
+ u32 val;
+};
+
+static inline void
+pms_init(struct pms_ucode *pms)
+{
+ pms-ptr.u08 = pms-data;
+ pms-reg = 0x;
+ pms-val = 0x;
+}
+
+static inline void
+pms_fini(struct pms_ucode *pms)
+{
+ do {
+ *pms-ptr.u08++ = 0x7f;
+ pms-len = pms-ptr.u08 - pms-data;
+ } while (pms-len 3);
+ pms-ptr.u08 = pms-data;
+}
+
+static inline void
+pms_unkn(struct pms_ucode *pms, u8 v0)
+{
+ *pms-ptr.u08++ = v0;
+}
+
+static inline void
+pms_op5f(struct pms_ucode *pms, u8 v0, u8 v1)
+{
+ *pms-ptr.u08++ = 0x5f;
+ *pms-ptr.u08++ = v0;
+ *pms-ptr.u08++ = v1;
+}
+
+static inline void
+pms_wr32(struct pms_ucode *pms, u32 reg, u32 val)
+{
+ if (val != pms-val) {
+ if ((val 0x) == (pms-val 0x)) {
+ *pms-ptr.u08++ = 0x42;
+ *pms-ptr.u16++ = (val 0x);
+ } else {
+ *pms-ptr.u08++ = 0xe2;
+ *pms-ptr.u32++ = val;
+ }
+
+ pms-val = val;
+ }
+
+ if ((reg 0x) == (pms-reg 0x)) {
+ *pms-ptr.u08++ = 0x40;
+ *pms-ptr.u16++ = (reg 0x);
+ } else {
+ *pms-ptr.u08++ = 0xe0;
+
Re: [Nouveau] [PATCH 2/2] drm/nouveau/nv50: reclock memory using PMS on nv50
Le 07/05/2011 01:42, Emil Velikov a écrit :
On Sat, 30 Apr 2011 01:17:13 +0100, Martin Peres
martin.pe...@free.fr wrote:
From: Martin Peres martin.pe...@ensi-bourges.fr
v2: Reclock memory after reclocking the other engines
Signed-off-by: Martin Peres martin.pe...@ensi-bourges.fr
---
drivers/gpu/drm/nouveau/nouveau_pm.c | 11 +--
drivers/gpu/drm/nouveau/nouveau_pms.h | 98 +
drivers/gpu/drm/nouveau/nv50_pm.c | 153
++---
3 files changed, 242 insertions(+), 20 deletions(-)
create mode 100644 drivers/gpu/drm/nouveau/nouveau_pms.h
diff --git a/drivers/gpu/drm/nouveau/nouveau_pm.c
b/drivers/gpu/drm/nouveau/nouveau_pm.c
index 88f58b1..44d01bb 100644
--- a/drivers/gpu/drm/nouveau/nouveau_pm.c
+++ b/drivers/gpu/drm/nouveau/nouveau_pm.c
@@ -45,10 +45,6 @@ nouveau_pm_clock_set(struct drm_device *dev,
struct nouveau_pm_level *perflvl,
if (khz == 0)
return 0;
-/* Do no reclock the memory if the frequencies didn't change */
-if (id == PLL_MEMORY pm-cur-memory == khz)
-return 0;
-
pre_state = pm-clock_pre(dev, perflvl, id, khz);
if (IS_ERR(pre_state))
return PTR_ERR(pre_state);
@@ -100,7 +96,6 @@ nouveau_pm_perflvl_set(struct drm_device *dev,
struct nouveau_pm_level *perflvl)
nouveau_pm_clock_set(dev, perflvl, PLL_CORE, perflvl-core);
nouveau_pm_clock_set(dev, perflvl, PLL_SHADER, perflvl-shader);
-nouveau_pm_clock_set(dev, perflvl, PLL_MEMORY, perflvl-memory);
nouveau_pm_clock_set(dev, perflvl, PLL_UNK05, perflvl-unk05);
/* Decrease the voltage if needed*/
@@ -110,11 +105,13 @@ nouveau_pm_perflvl_set(struct drm_device *dev,
struct nouveau_pm_level *perflvl)
/* Wait for PLLs to stabilize */
udelay(100);
+pm-unpause(dev);
+
+nouveau_pm_clock_set(dev, perflvl, PLL_MEMORY, perflvl-memory);
+
pm-cur = perflvl;
ret = 0;
-pm-unpause(dev);
-
NV_DEBUG(dev, Reclocking took %lluns\n,
(nv04_timer_read(dev) - start));
diff --git a/drivers/gpu/drm/nouveau/nouveau_pms.h
b/drivers/gpu/drm/nouveau/nouveau_pms.h
new file mode 100644
index 000..d7a445b
--- /dev/null
+++ b/drivers/gpu/drm/nouveau/nouveau_pms.h
@@ -0,0 +1,98 @@
+/*
+ * Copyright 2010 Red Hat Inc.
+ *
+ * Permission is hereby granted, free of charge, to any person
obtaining a
+ * copy of this software and associated documentation files (the
Software),
+ * to deal in the Software without restriction, including without
limitation
+ * the rights to use, copy, modify, merge, publish, distribute,
sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom
the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be
included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED AS IS, WITHOUT WARRANTY OF ANY KIND,
EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO
EVENT SHALL
+ * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM,
DAMAGES OR
+ * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * Authors: Ben Skeggs
+ */
+
+#ifndef __NOUVEAU_PMS_H__
+#define __NOUVEAU_PMS_H__
+
+struct pms_ucode {
+u8 data[256];
+union {
+u8 *u08;
+u16 *u16;
+u32 *u32;
+} ptr;
+u16 len;
+
+u32 reg;
+u32 val;
+};
+
+static inline void
+pms_init(struct pms_ucode *pms)
+{
+pms-ptr.u08 = pms-data;
+pms-reg = 0x;
+pms-val = 0x;
+}
+
+static inline void
+pms_fini(struct pms_ucode *pms)
+{
+do {
+*pms-ptr.u08++ = 0x7f;
+pms-len = pms-ptr.u08 - pms-data;
+} while (pms-len 3);
+pms-ptr.u08 = pms-data;
+}
+
+static inline void
+pms_unkn(struct pms_ucode *pms, u8 v0)
+{
+*pms-ptr.u08++ = v0;
+}
+
+static inline void
+pms_op5f(struct pms_ucode *pms, u8 v0, u8 v1)
+{
+*pms-ptr.u08++ = 0x5f;
+*pms-ptr.u08++ = v0;
+*pms-ptr.u08++ = v1;
+}
+
+static inline void
+pms_wr32(struct pms_ucode *pms, u32 reg, u32 val)
+{
+if (val != pms-val) {
+if ((val 0x) == (pms-val 0x)) {
+*pms-ptr.u08++ = 0x42;
+*pms-ptr.u16++ = (val 0x);
+} else {
+*pms-ptr.u08++ = 0xe2;
+*pms-ptr.u32++ = val;
+}
+
+pms-val = val;
+}
+
+if ((reg 0x) == (pms-reg 0x)) {
+*pms-ptr.u08++ = 0x40;
+*pms-ptr.u16++ = (reg 0x);
+} else {
+*pms-ptr.u08++ = 0xe0;
+*pms-ptr.u32++ = reg;
+}
+pms-reg = reg;
+}
+
+#endif
diff --git a/drivers/gpu/drm/nouveau/nv50_pm.c
b/drivers/gpu/drm/nouveau/nv50_pm.c
index 4dd2d76..9b81f03 100644
---
